asm.h 6.0 KB

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  1. /*
  2. * This file is subject to the terms and conditions of the GNU General Public
  3. * License. See the file "COPYING" in the main directory of this archive
  4. * for more details.
  5. *
  6. * Copyright (C) 1995, 1996, 1997, 1999, 2001 by Ralf Baechle
  7. * Copyright (C) 1999 by Silicon Graphics, Inc.
  8. * Copyright (C) 2001 MIPS Technologies, Inc.
  9. * Copyright (C) 2002 Maciej W. Rozycki
  10. *
  11. * Some useful macros for MIPS assembler code
  12. *
  13. * Some of the routines below contain useless nops that will be optimized
  14. * away by gas in -O mode. These nops are however required to fill delay
  15. * slots in noreorder mode.
  16. */
  17. #ifndef __ASM_ASM_H
  18. #define __ASM_ASM_H
  19. #include <asm/sgidefs.h>
  20. #include <asm/asm-eva.h>
  21. /*
  22. * LEAF - declare leaf routine
  23. */
  24. #define LEAF(symbol) \
  25. .globl symbol; \
  26. .align 2; \
  27. .type symbol, @function; \
  28. .ent symbol, 0; \
  29. symbol: .frame sp, 0, ra; \
  30. .cfi_startproc; \
  31. .insn
  32. /*
  33. * NESTED - declare nested routine entry point
  34. */
  35. #define NESTED(symbol, framesize, rpc) \
  36. .globl symbol; \
  37. .align 2; \
  38. .type symbol, @function; \
  39. .ent symbol, 0; \
  40. symbol: .frame sp, framesize, rpc; \
  41. .cfi_startproc; \
  42. .insn
  43. /*
  44. * END - mark end of function
  45. */
  46. #define END(function) \
  47. .cfi_endproc; \
  48. .end function; \
  49. .size function, .-function
  50. /*
  51. * EXPORT - export definition of symbol
  52. */
  53. #define EXPORT(symbol) \
  54. .globl symbol; \
  55. symbol:
  56. /*
  57. * FEXPORT - export definition of a function symbol
  58. */
  59. #define FEXPORT(symbol) \
  60. .globl symbol; \
  61. .type symbol, @function; \
  62. symbol: .insn
  63. /*
  64. * ABS - export absolute symbol
  65. */
  66. #define ABS(symbol,value) \
  67. .globl symbol; \
  68. symbol = value
  69. #define PANIC(msg) \
  70. .set push; \
  71. .set reorder; \
  72. PTR_LA a0, 8f; \
  73. jal panic; \
  74. 9: b 9b; \
  75. .set pop; \
  76. TEXT(msg)
  77. /*
  78. * Print formatted string
  79. */
  80. #ifdef CONFIG_PRINTK
  81. #define PRINT(string) \
  82. .set push; \
  83. .set reorder; \
  84. PTR_LA a0, 8f; \
  85. jal printk; \
  86. .set pop; \
  87. TEXT(string)
  88. #else
  89. #define PRINT(string)
  90. #endif
  91. #define TEXT(msg) \
  92. .pushsection .data; \
  93. 8: .asciiz msg; \
  94. .popsection;
  95. /*
  96. * Stack alignment
  97. */
  98. #if (_MIPS_SIM == _MIPS_SIM_ABI32)
  99. #define ALSZ 7
  100. #define ALMASK ~7
  101. #endif
  102. #if (_MIPS_SIM == _MIPS_SIM_NABI32) || (_MIPS_SIM == _MIPS_SIM_ABI64)
  103. #define ALSZ 15
  104. #define ALMASK ~15
  105. #endif
  106. /*
  107. * Macros to handle different pointer/register sizes for 32/64-bit code
  108. */
  109. /*
  110. * Size of a register
  111. */
  112. #ifdef __mips64
  113. #define SZREG 8
  114. #else
  115. #define SZREG 4
  116. #endif
  117. /*
  118. * Use the following macros in assemblercode to load/store registers,
  119. * pointers etc.
  120. */
  121. #if (_MIPS_SIM == _MIPS_SIM_ABI32)
  122. #define REG_S sw
  123. #define REG_L lw
  124. #define REG_SUBU subu
  125. #define REG_ADDU addu
  126. #endif
  127. #if (_MIPS_SIM == _MIPS_SIM_NABI32) || (_MIPS_SIM == _MIPS_SIM_ABI64)
  128. #define REG_S sd
  129. #define REG_L ld
  130. #define REG_SUBU dsubu
  131. #define REG_ADDU daddu
  132. #endif
  133. /*
  134. * How to add/sub/load/store/shift C int variables.
  135. */
  136. #if (_MIPS_SZINT == 32)
  137. #define INT_ADD add
  138. #define INT_ADDU addu
  139. #define INT_ADDI addi
  140. #define INT_ADDIU addiu
  141. #define INT_SUB sub
  142. #define INT_SUBU subu
  143. #define INT_L lw
  144. #define INT_S sw
  145. #define INT_SLL sll
  146. #define INT_SLLV sllv
  147. #define INT_SRL srl
  148. #define INT_SRLV srlv
  149. #define INT_SRA sra
  150. #define INT_SRAV srav
  151. #endif
  152. #if (_MIPS_SZINT == 64)
  153. #define INT_ADD dadd
  154. #define INT_ADDU daddu
  155. #define INT_ADDI daddi
  156. #define INT_ADDIU daddiu
  157. #define INT_SUB dsub
  158. #define INT_SUBU dsubu
  159. #define INT_L ld
  160. #define INT_S sd
  161. #define INT_SLL dsll
  162. #define INT_SLLV dsllv
  163. #define INT_SRL dsrl
  164. #define INT_SRLV dsrlv
  165. #define INT_SRA dsra
  166. #define INT_SRAV dsrav
  167. #endif
  168. /*
  169. * How to add/sub/load/store/shift C long variables.
  170. */
  171. #if (_MIPS_SZLONG == 32)
  172. #define LONG_ADD add
  173. #define LONG_ADDU addu
  174. #define LONG_ADDI addi
  175. #define LONG_ADDIU addiu
  176. #define LONG_SUB sub
  177. #define LONG_SUBU subu
  178. #define LONG_L lw
  179. #define LONG_S sw
  180. #define LONG_SP swp
  181. #define LONG_SLL sll
  182. #define LONG_SLLV sllv
  183. #define LONG_SRL srl
  184. #define LONG_SRLV srlv
  185. #define LONG_SRA sra
  186. #define LONG_SRAV srav
  187. #define LONG .word
  188. #define LONGSIZE 4
  189. #define LONGMASK 3
  190. #define LONGLOG 2
  191. #endif
  192. #if (_MIPS_SZLONG == 64)
  193. #define LONG_ADD dadd
  194. #define LONG_ADDU daddu
  195. #define LONG_ADDI daddi
  196. #define LONG_ADDIU daddiu
  197. #define LONG_SUB dsub
  198. #define LONG_SUBU dsubu
  199. #define LONG_L ld
  200. #define LONG_S sd
  201. #define LONG_SP sdp
  202. #define LONG_SLL dsll
  203. #define LONG_SLLV dsllv
  204. #define LONG_SRL dsrl
  205. #define LONG_SRLV dsrlv
  206. #define LONG_SRA dsra
  207. #define LONG_SRAV dsrav
  208. #define LONG .dword
  209. #define LONGSIZE 8
  210. #define LONGMASK 7
  211. #define LONGLOG 3
  212. #endif
  213. /*
  214. * How to add/sub/load/store/shift pointers.
  215. */
  216. #if (_MIPS_SZPTR == 32)
  217. #define PTR_ADD add
  218. #define PTR_ADDU addu
  219. #define PTR_ADDI addi
  220. #define PTR_ADDIU addiu
  221. #define PTR_SUB sub
  222. #define PTR_SUBU subu
  223. #define PTR_L lw
  224. #define PTR_S sw
  225. #define PTR_LA la
  226. #define PTR_LI li
  227. #define PTR_SLL sll
  228. #define PTR_SLLV sllv
  229. #define PTR_SRL srl
  230. #define PTR_SRLV srlv
  231. #define PTR_SRA sra
  232. #define PTR_SRAV srav
  233. #define PTR_SCALESHIFT 2
  234. #define PTR .word
  235. #define PTRSIZE 4
  236. #define PTRLOG 2
  237. #endif
  238. #if (_MIPS_SZPTR == 64)
  239. #define PTR_ADD dadd
  240. #define PTR_ADDU daddu
  241. #define PTR_ADDI daddi
  242. #define PTR_ADDIU daddiu
  243. #define PTR_SUB dsub
  244. #define PTR_SUBU dsubu
  245. #define PTR_L ld
  246. #define PTR_S sd
  247. #define PTR_LA dla
  248. #define PTR_LI dli
  249. #define PTR_SLL dsll
  250. #define PTR_SLLV dsllv
  251. #define PTR_SRL dsrl
  252. #define PTR_SRLV dsrlv
  253. #define PTR_SRA dsra
  254. #define PTR_SRAV dsrav
  255. #define PTR_SCALESHIFT 3
  256. #define PTR .dword
  257. #define PTRSIZE 8
  258. #define PTRLOG 3
  259. #endif
  260. /*
  261. * Some cp0 registers were extended to 64bit for MIPS III.
  262. */
  263. #if (_MIPS_SIM == _MIPS_SIM_ABI32)
  264. #define MFC0 mfc0
  265. #define MTC0 mtc0
  266. #endif
  267. #if (_MIPS_SIM == _MIPS_SIM_NABI32) || (_MIPS_SIM == _MIPS_SIM_ABI64)
  268. #define MFC0 dmfc0
  269. #define MTC0 dmtc0
  270. #endif
  271. #define SSNOP sll zero, zero, 1
  272. #ifdef CONFIG_SGI_IP28
  273. /* Inhibit speculative stores to volatile (e.g.DMA) or invalid addresses. */
  274. #include <asm/cacheops.h>
  275. #define R10KCBARRIER(addr) cache Cache_Barrier, addr;
  276. #else
  277. #define R10KCBARRIER(addr)
  278. #endif
  279. #endif /* __ASM_ASM_H */