omap_hwmod.c 105 KB

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  1. /*
  2. * omap_hwmod implementation for OMAP2/3/4
  3. *
  4. * Copyright (C) 2009-2011 Nokia Corporation
  5. * Copyright (C) 2011-2012 Texas Instruments, Inc.
  6. *
  7. * Paul Walmsley, Benoît Cousson, Kevin Hilman
  8. *
  9. * Created in collaboration with (alphabetical order): Thara Gopinath,
  10. * Tony Lindgren, Rajendra Nayak, Vikram Pandita, Sakari Poussa, Anand
  11. * Sawant, Santosh Shilimkar, Richard Woodruff
  12. *
  13. * This program is free software; you can redistribute it and/or modify
  14. * it under the terms of the GNU General Public License version 2 as
  15. * published by the Free Software Foundation.
  16. *
  17. * Introduction
  18. * ------------
  19. * One way to view an OMAP SoC is as a collection of largely unrelated
  20. * IP blocks connected by interconnects. The IP blocks include
  21. * devices such as ARM processors, audio serial interfaces, UARTs,
  22. * etc. Some of these devices, like the DSP, are created by TI;
  23. * others, like the SGX, largely originate from external vendors. In
  24. * TI's documentation, on-chip devices are referred to as "OMAP
  25. * modules." Some of these IP blocks are identical across several
  26. * OMAP versions. Others are revised frequently.
  27. *
  28. * These OMAP modules are tied together by various interconnects.
  29. * Most of the address and data flow between modules is via OCP-based
  30. * interconnects such as the L3 and L4 buses; but there are other
  31. * interconnects that distribute the hardware clock tree, handle idle
  32. * and reset signaling, supply power, and connect the modules to
  33. * various pads or balls on the OMAP package.
  34. *
  35. * OMAP hwmod provides a consistent way to describe the on-chip
  36. * hardware blocks and their integration into the rest of the chip.
  37. * This description can be automatically generated from the TI
  38. * hardware database. OMAP hwmod provides a standard, consistent API
  39. * to reset, enable, idle, and disable these hardware blocks. And
  40. * hwmod provides a way for other core code, such as the Linux device
  41. * code or the OMAP power management and address space mapping code,
  42. * to query the hardware database.
  43. *
  44. * Using hwmod
  45. * -----------
  46. * Drivers won't call hwmod functions directly. That is done by the
  47. * omap_device code, and in rare occasions, by custom integration code
  48. * in arch/arm/ *omap*. The omap_device code includes functions to
  49. * build a struct platform_device using omap_hwmod data, and that is
  50. * currently how hwmod data is communicated to drivers and to the
  51. * Linux driver model. Most drivers will call omap_hwmod functions only
  52. * indirectly, via pm_runtime*() functions.
  53. *
  54. * From a layering perspective, here is where the OMAP hwmod code
  55. * fits into the kernel software stack:
  56. *
  57. * +-------------------------------+
  58. * | Device driver code |
  59. * | (e.g., drivers/) |
  60. * +-------------------------------+
  61. * | Linux driver model |
  62. * | (platform_device / |
  63. * | platform_driver data/code) |
  64. * +-------------------------------+
  65. * | OMAP core-driver integration |
  66. * |(arch/arm/mach-omap2/devices.c)|
  67. * +-------------------------------+
  68. * | omap_device code |
  69. * | (../plat-omap/omap_device.c) |
  70. * +-------------------------------+
  71. * ----> | omap_hwmod code/data | <-----
  72. * | (../mach-omap2/omap_hwmod*) |
  73. * +-------------------------------+
  74. * | OMAP clock/PRCM/register fns |
  75. * | ({read,write}l_relaxed, clk*) |
  76. * +-------------------------------+
  77. *
  78. * Device drivers should not contain any OMAP-specific code or data in
  79. * them. They should only contain code to operate the IP block that
  80. * the driver is responsible for. This is because these IP blocks can
  81. * also appear in other SoCs, either from TI (such as DaVinci) or from
  82. * other manufacturers; and drivers should be reusable across other
  83. * platforms.
  84. *
  85. * The OMAP hwmod code also will attempt to reset and idle all on-chip
  86. * devices upon boot. The goal here is for the kernel to be
  87. * completely self-reliant and independent from bootloaders. This is
  88. * to ensure a repeatable configuration, both to ensure consistent
  89. * runtime behavior, and to make it easier for others to reproduce
  90. * bugs.
  91. *
  92. * OMAP module activity states
  93. * ---------------------------
  94. * The hwmod code considers modules to be in one of several activity
  95. * states. IP blocks start out in an UNKNOWN state, then once they
  96. * are registered via the hwmod code, proceed to the REGISTERED state.
  97. * Once their clock names are resolved to clock pointers, the module
  98. * enters the CLKS_INITED state; and finally, once the module has been
  99. * reset and the integration registers programmed, the INITIALIZED state
  100. * is entered. The hwmod code will then place the module into either
  101. * the IDLE state to save power, or in the case of a critical system
  102. * module, the ENABLED state.
  103. *
  104. * OMAP core integration code can then call omap_hwmod*() functions
  105. * directly to move the module between the IDLE, ENABLED, and DISABLED
  106. * states, as needed. This is done during both the PM idle loop, and
  107. * in the OMAP core integration code's implementation of the PM runtime
  108. * functions.
  109. *
  110. * References
  111. * ----------
  112. * This is a partial list.
  113. * - OMAP2420 Multimedia Processor Silicon Revision 2.1.1, 2.2 (SWPU064)
  114. * - OMAP2430 Multimedia Device POP Silicon Revision 2.1 (SWPU090)
  115. * - OMAP34xx Multimedia Device Silicon Revision 3.1 (SWPU108)
  116. * - OMAP4430 Multimedia Device Silicon Revision 1.0 (SWPU140)
  117. * - Open Core Protocol Specification 2.2
  118. *
  119. * To do:
  120. * - handle IO mapping
  121. * - bus throughput & module latency measurement code
  122. *
  123. * XXX add tests at the beginning of each function to ensure the hwmod is
  124. * in the appropriate state
  125. * XXX error return values should be checked to ensure that they are
  126. * appropriate
  127. */
  128. #undef DEBUG
  129. #include <linux/kernel.h>
  130. #include <linux/errno.h>
  131. #include <linux/io.h>
  132. #include <linux/clk.h>
  133. #include <linux/clk-provider.h>
  134. #include <linux/delay.h>
  135. #include <linux/err.h>
  136. #include <linux/list.h>
  137. #include <linux/mutex.h>
  138. #include <linux/spinlock.h>
  139. #include <linux/slab.h>
  140. #include <linux/cpu.h>
  141. #include <linux/of.h>
  142. #include <linux/of_address.h>
  143. #include <asm/system_misc.h>
  144. #include "clock.h"
  145. #include "omap_hwmod.h"
  146. #include "soc.h"
  147. #include "common.h"
  148. #include "clockdomain.h"
  149. #include "powerdomain.h"
  150. #include "cm2xxx.h"
  151. #include "cm3xxx.h"
  152. #include "cm33xx.h"
  153. #include "prm.h"
  154. #include "prm3xxx.h"
  155. #include "prm44xx.h"
  156. #include "prm33xx.h"
  157. #include "prminst44xx.h"
  158. #include "pm.h"
  159. /* Name of the OMAP hwmod for the MPU */
  160. #define MPU_INITIATOR_NAME "mpu"
  161. /*
  162. * Number of struct omap_hwmod_link records per struct
  163. * omap_hwmod_ocp_if record (master->slave and slave->master)
  164. */
  165. #define LINKS_PER_OCP_IF 2
  166. /*
  167. * Address offset (in bytes) between the reset control and the reset
  168. * status registers: 4 bytes on OMAP4
  169. */
  170. #define OMAP4_RST_CTRL_ST_OFFSET 4
  171. /*
  172. * Maximum length for module clock handle names
  173. */
  174. #define MOD_CLK_MAX_NAME_LEN 32
  175. /**
  176. * struct omap_hwmod_soc_ops - fn ptrs for some SoC-specific operations
  177. * @enable_module: function to enable a module (via MODULEMODE)
  178. * @disable_module: function to disable a module (via MODULEMODE)
  179. *
  180. * XXX Eventually this functionality will be hidden inside the PRM/CM
  181. * device drivers. Until then, this should avoid huge blocks of cpu_is_*()
  182. * conditionals in this code.
  183. */
  184. struct omap_hwmod_soc_ops {
  185. void (*enable_module)(struct omap_hwmod *oh);
  186. int (*disable_module)(struct omap_hwmod *oh);
  187. int (*wait_target_ready)(struct omap_hwmod *oh);
  188. int (*assert_hardreset)(struct omap_hwmod *oh,
  189. struct omap_hwmod_rst_info *ohri);
  190. int (*deassert_hardreset)(struct omap_hwmod *oh,
  191. struct omap_hwmod_rst_info *ohri);
  192. int (*is_hardreset_asserted)(struct omap_hwmod *oh,
  193. struct omap_hwmod_rst_info *ohri);
  194. int (*init_clkdm)(struct omap_hwmod *oh);
  195. void (*update_context_lost)(struct omap_hwmod *oh);
  196. int (*get_context_lost)(struct omap_hwmod *oh);
  197. int (*disable_direct_prcm)(struct omap_hwmod *oh);
  198. };
  199. /* soc_ops: adapts the omap_hwmod code to the currently-booted SoC */
  200. static struct omap_hwmod_soc_ops soc_ops;
  201. /* omap_hwmod_list contains all registered struct omap_hwmods */
  202. static LIST_HEAD(omap_hwmod_list);
  203. /* mpu_oh: used to add/remove MPU initiator from sleepdep list */
  204. static struct omap_hwmod *mpu_oh;
  205. /* inited: set to true once the hwmod code is initialized */
  206. static bool inited;
  207. /* Private functions */
  208. /**
  209. * _update_sysc_cache - return the module OCP_SYSCONFIG register, keep copy
  210. * @oh: struct omap_hwmod *
  211. *
  212. * Load the current value of the hwmod OCP_SYSCONFIG register into the
  213. * struct omap_hwmod for later use. Returns -EINVAL if the hwmod has no
  214. * OCP_SYSCONFIG register or 0 upon success.
  215. */
  216. static int _update_sysc_cache(struct omap_hwmod *oh)
  217. {
  218. if (!oh->class->sysc) {
  219. WARN(1, "omap_hwmod: %s: cannot read OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
  220. return -EINVAL;
  221. }
  222. /* XXX ensure module interface clock is up */
  223. oh->_sysc_cache = omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
  224. if (!(oh->class->sysc->sysc_flags & SYSC_NO_CACHE))
  225. oh->_int_flags |= _HWMOD_SYSCONFIG_LOADED;
  226. return 0;
  227. }
  228. /**
  229. * _write_sysconfig - write a value to the module's OCP_SYSCONFIG register
  230. * @v: OCP_SYSCONFIG value to write
  231. * @oh: struct omap_hwmod *
  232. *
  233. * Write @v into the module class' OCP_SYSCONFIG register, if it has
  234. * one. No return value.
  235. */
  236. static void _write_sysconfig(u32 v, struct omap_hwmod *oh)
  237. {
  238. if (!oh->class->sysc) {
  239. WARN(1, "omap_hwmod: %s: cannot write OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
  240. return;
  241. }
  242. /* XXX ensure module interface clock is up */
  243. /* Module might have lost context, always update cache and register */
  244. oh->_sysc_cache = v;
  245. /*
  246. * Some IP blocks (such as RTC) require unlocking of IP before
  247. * accessing its registers. If a function pointer is present
  248. * to unlock, then call it before accessing sysconfig and
  249. * call lock after writing sysconfig.
  250. */
  251. if (oh->class->unlock)
  252. oh->class->unlock(oh);
  253. omap_hwmod_write(v, oh, oh->class->sysc->sysc_offs);
  254. if (oh->class->lock)
  255. oh->class->lock(oh);
  256. }
  257. /**
  258. * _set_master_standbymode: set the OCP_SYSCONFIG MIDLEMODE field in @v
  259. * @oh: struct omap_hwmod *
  260. * @standbymode: MIDLEMODE field bits
  261. * @v: pointer to register contents to modify
  262. *
  263. * Update the master standby mode bits in @v to be @standbymode for
  264. * the @oh hwmod. Does not write to the hardware. Returns -EINVAL
  265. * upon error or 0 upon success.
  266. */
  267. static int _set_master_standbymode(struct omap_hwmod *oh, u8 standbymode,
  268. u32 *v)
  269. {
  270. u32 mstandby_mask;
  271. u8 mstandby_shift;
  272. if (!oh->class->sysc ||
  273. !(oh->class->sysc->sysc_flags & SYSC_HAS_MIDLEMODE))
  274. return -EINVAL;
  275. if (!oh->class->sysc->sysc_fields) {
  276. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  277. return -EINVAL;
  278. }
  279. mstandby_shift = oh->class->sysc->sysc_fields->midle_shift;
  280. mstandby_mask = (0x3 << mstandby_shift);
  281. *v &= ~mstandby_mask;
  282. *v |= __ffs(standbymode) << mstandby_shift;
  283. return 0;
  284. }
  285. /**
  286. * _set_slave_idlemode: set the OCP_SYSCONFIG SIDLEMODE field in @v
  287. * @oh: struct omap_hwmod *
  288. * @idlemode: SIDLEMODE field bits
  289. * @v: pointer to register contents to modify
  290. *
  291. * Update the slave idle mode bits in @v to be @idlemode for the @oh
  292. * hwmod. Does not write to the hardware. Returns -EINVAL upon error
  293. * or 0 upon success.
  294. */
  295. static int _set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode, u32 *v)
  296. {
  297. u32 sidle_mask;
  298. u8 sidle_shift;
  299. if (!oh->class->sysc ||
  300. !(oh->class->sysc->sysc_flags & SYSC_HAS_SIDLEMODE))
  301. return -EINVAL;
  302. if (!oh->class->sysc->sysc_fields) {
  303. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  304. return -EINVAL;
  305. }
  306. sidle_shift = oh->class->sysc->sysc_fields->sidle_shift;
  307. sidle_mask = (0x3 << sidle_shift);
  308. *v &= ~sidle_mask;
  309. *v |= __ffs(idlemode) << sidle_shift;
  310. return 0;
  311. }
  312. /**
  313. * _set_clockactivity: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
  314. * @oh: struct omap_hwmod *
  315. * @clockact: CLOCKACTIVITY field bits
  316. * @v: pointer to register contents to modify
  317. *
  318. * Update the clockactivity mode bits in @v to be @clockact for the
  319. * @oh hwmod. Used for additional powersaving on some modules. Does
  320. * not write to the hardware. Returns -EINVAL upon error or 0 upon
  321. * success.
  322. */
  323. static int _set_clockactivity(struct omap_hwmod *oh, u8 clockact, u32 *v)
  324. {
  325. u32 clkact_mask;
  326. u8 clkact_shift;
  327. if (!oh->class->sysc ||
  328. !(oh->class->sysc->sysc_flags & SYSC_HAS_CLOCKACTIVITY))
  329. return -EINVAL;
  330. if (!oh->class->sysc->sysc_fields) {
  331. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  332. return -EINVAL;
  333. }
  334. clkact_shift = oh->class->sysc->sysc_fields->clkact_shift;
  335. clkact_mask = (0x3 << clkact_shift);
  336. *v &= ~clkact_mask;
  337. *v |= clockact << clkact_shift;
  338. return 0;
  339. }
  340. /**
  341. * _set_softreset: set OCP_SYSCONFIG.SOFTRESET bit in @v
  342. * @oh: struct omap_hwmod *
  343. * @v: pointer to register contents to modify
  344. *
  345. * Set the SOFTRESET bit in @v for hwmod @oh. Returns -EINVAL upon
  346. * error or 0 upon success.
  347. */
  348. static int _set_softreset(struct omap_hwmod *oh, u32 *v)
  349. {
  350. u32 softrst_mask;
  351. if (!oh->class->sysc ||
  352. !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
  353. return -EINVAL;
  354. if (!oh->class->sysc->sysc_fields) {
  355. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  356. return -EINVAL;
  357. }
  358. softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
  359. *v |= softrst_mask;
  360. return 0;
  361. }
  362. /**
  363. * _clear_softreset: clear OCP_SYSCONFIG.SOFTRESET bit in @v
  364. * @oh: struct omap_hwmod *
  365. * @v: pointer to register contents to modify
  366. *
  367. * Clear the SOFTRESET bit in @v for hwmod @oh. Returns -EINVAL upon
  368. * error or 0 upon success.
  369. */
  370. static int _clear_softreset(struct omap_hwmod *oh, u32 *v)
  371. {
  372. u32 softrst_mask;
  373. if (!oh->class->sysc ||
  374. !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
  375. return -EINVAL;
  376. if (!oh->class->sysc->sysc_fields) {
  377. WARN(1,
  378. "omap_hwmod: %s: sysc_fields absent for sysconfig class\n",
  379. oh->name);
  380. return -EINVAL;
  381. }
  382. softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
  383. *v &= ~softrst_mask;
  384. return 0;
  385. }
  386. /**
  387. * _wait_softreset_complete - wait for an OCP softreset to complete
  388. * @oh: struct omap_hwmod * to wait on
  389. *
  390. * Wait until the IP block represented by @oh reports that its OCP
  391. * softreset is complete. This can be triggered by software (see
  392. * _ocp_softreset()) or by hardware upon returning from off-mode (one
  393. * example is HSMMC). Waits for up to MAX_MODULE_SOFTRESET_WAIT
  394. * microseconds. Returns the number of microseconds waited.
  395. */
  396. static int _wait_softreset_complete(struct omap_hwmod *oh)
  397. {
  398. struct omap_hwmod_class_sysconfig *sysc;
  399. u32 softrst_mask;
  400. int c = 0;
  401. sysc = oh->class->sysc;
  402. if (sysc->sysc_flags & SYSS_HAS_RESET_STATUS)
  403. omap_test_timeout((omap_hwmod_read(oh, sysc->syss_offs)
  404. & SYSS_RESETDONE_MASK),
  405. MAX_MODULE_SOFTRESET_WAIT, c);
  406. else if (sysc->sysc_flags & SYSC_HAS_RESET_STATUS) {
  407. softrst_mask = (0x1 << sysc->sysc_fields->srst_shift);
  408. omap_test_timeout(!(omap_hwmod_read(oh, sysc->sysc_offs)
  409. & softrst_mask),
  410. MAX_MODULE_SOFTRESET_WAIT, c);
  411. }
  412. return c;
  413. }
  414. /**
  415. * _set_dmadisable: set OCP_SYSCONFIG.DMADISABLE bit in @v
  416. * @oh: struct omap_hwmod *
  417. *
  418. * The DMADISABLE bit is a semi-automatic bit present in sysconfig register
  419. * of some modules. When the DMA must perform read/write accesses, the
  420. * DMADISABLE bit is cleared by the hardware. But when the DMA must stop
  421. * for power management, software must set the DMADISABLE bit back to 1.
  422. *
  423. * Set the DMADISABLE bit in @v for hwmod @oh. Returns -EINVAL upon
  424. * error or 0 upon success.
  425. */
  426. static int _set_dmadisable(struct omap_hwmod *oh)
  427. {
  428. u32 v;
  429. u32 dmadisable_mask;
  430. if (!oh->class->sysc ||
  431. !(oh->class->sysc->sysc_flags & SYSC_HAS_DMADISABLE))
  432. return -EINVAL;
  433. if (!oh->class->sysc->sysc_fields) {
  434. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  435. return -EINVAL;
  436. }
  437. /* clocks must be on for this operation */
  438. if (oh->_state != _HWMOD_STATE_ENABLED) {
  439. pr_warn("omap_hwmod: %s: dma can be disabled only from enabled state\n", oh->name);
  440. return -EINVAL;
  441. }
  442. pr_debug("omap_hwmod: %s: setting DMADISABLE\n", oh->name);
  443. v = oh->_sysc_cache;
  444. dmadisable_mask =
  445. (0x1 << oh->class->sysc->sysc_fields->dmadisable_shift);
  446. v |= dmadisable_mask;
  447. _write_sysconfig(v, oh);
  448. return 0;
  449. }
  450. /**
  451. * _set_module_autoidle: set the OCP_SYSCONFIG AUTOIDLE field in @v
  452. * @oh: struct omap_hwmod *
  453. * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
  454. * @v: pointer to register contents to modify
  455. *
  456. * Update the module autoidle bit in @v to be @autoidle for the @oh
  457. * hwmod. The autoidle bit controls whether the module can gate
  458. * internal clocks automatically when it isn't doing anything; the
  459. * exact function of this bit varies on a per-module basis. This
  460. * function does not write to the hardware. Returns -EINVAL upon
  461. * error or 0 upon success.
  462. */
  463. static int _set_module_autoidle(struct omap_hwmod *oh, u8 autoidle,
  464. u32 *v)
  465. {
  466. u32 autoidle_mask;
  467. u8 autoidle_shift;
  468. if (!oh->class->sysc ||
  469. !(oh->class->sysc->sysc_flags & SYSC_HAS_AUTOIDLE))
  470. return -EINVAL;
  471. if (!oh->class->sysc->sysc_fields) {
  472. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  473. return -EINVAL;
  474. }
  475. autoidle_shift = oh->class->sysc->sysc_fields->autoidle_shift;
  476. autoidle_mask = (0x1 << autoidle_shift);
  477. *v &= ~autoidle_mask;
  478. *v |= autoidle << autoidle_shift;
  479. return 0;
  480. }
  481. /**
  482. * _enable_wakeup: set OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
  483. * @oh: struct omap_hwmod *
  484. *
  485. * Allow the hardware module @oh to send wakeups. Returns -EINVAL
  486. * upon error or 0 upon success.
  487. */
  488. static int _enable_wakeup(struct omap_hwmod *oh, u32 *v)
  489. {
  490. if (!oh->class->sysc ||
  491. !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
  492. (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
  493. (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
  494. return -EINVAL;
  495. if (!oh->class->sysc->sysc_fields) {
  496. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  497. return -EINVAL;
  498. }
  499. if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
  500. *v |= 0x1 << oh->class->sysc->sysc_fields->enwkup_shift;
  501. if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
  502. _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
  503. if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
  504. _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
  505. /* XXX test pwrdm_get_wken for this hwmod's subsystem */
  506. return 0;
  507. }
  508. /**
  509. * _disable_wakeup: clear OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
  510. * @oh: struct omap_hwmod *
  511. *
  512. * Prevent the hardware module @oh to send wakeups. Returns -EINVAL
  513. * upon error or 0 upon success.
  514. */
  515. static int _disable_wakeup(struct omap_hwmod *oh, u32 *v)
  516. {
  517. if (!oh->class->sysc ||
  518. !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
  519. (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
  520. (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
  521. return -EINVAL;
  522. if (!oh->class->sysc->sysc_fields) {
  523. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  524. return -EINVAL;
  525. }
  526. if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
  527. *v &= ~(0x1 << oh->class->sysc->sysc_fields->enwkup_shift);
  528. if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
  529. _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART, v);
  530. if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
  531. _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART, v);
  532. /* XXX test pwrdm_get_wken for this hwmod's subsystem */
  533. return 0;
  534. }
  535. static struct clockdomain *_get_clkdm(struct omap_hwmod *oh)
  536. {
  537. struct clk_hw_omap *clk;
  538. if (oh->clkdm) {
  539. return oh->clkdm;
  540. } else if (oh->_clk) {
  541. if (__clk_get_flags(oh->_clk) & CLK_IS_BASIC)
  542. return NULL;
  543. clk = to_clk_hw_omap(__clk_get_hw(oh->_clk));
  544. return clk->clkdm;
  545. }
  546. return NULL;
  547. }
  548. /**
  549. * _add_initiator_dep: prevent @oh from smart-idling while @init_oh is active
  550. * @oh: struct omap_hwmod *
  551. *
  552. * Prevent the hardware module @oh from entering idle while the
  553. * hardare module initiator @init_oh is active. Useful when a module
  554. * will be accessed by a particular initiator (e.g., if a module will
  555. * be accessed by the IVA, there should be a sleepdep between the IVA
  556. * initiator and the module). Only applies to modules in smart-idle
  557. * mode. If the clockdomain is marked as not needing autodeps, return
  558. * 0 without doing anything. Otherwise, returns -EINVAL upon error or
  559. * passes along clkdm_add_sleepdep() value upon success.
  560. */
  561. static int _add_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
  562. {
  563. struct clockdomain *clkdm, *init_clkdm;
  564. clkdm = _get_clkdm(oh);
  565. init_clkdm = _get_clkdm(init_oh);
  566. if (!clkdm || !init_clkdm)
  567. return -EINVAL;
  568. if (clkdm && clkdm->flags & CLKDM_NO_AUTODEPS)
  569. return 0;
  570. return clkdm_add_sleepdep(clkdm, init_clkdm);
  571. }
  572. /**
  573. * _del_initiator_dep: allow @oh to smart-idle even if @init_oh is active
  574. * @oh: struct omap_hwmod *
  575. *
  576. * Allow the hardware module @oh to enter idle while the hardare
  577. * module initiator @init_oh is active. Useful when a module will not
  578. * be accessed by a particular initiator (e.g., if a module will not
  579. * be accessed by the IVA, there should be no sleepdep between the IVA
  580. * initiator and the module). Only applies to modules in smart-idle
  581. * mode. If the clockdomain is marked as not needing autodeps, return
  582. * 0 without doing anything. Returns -EINVAL upon error or passes
  583. * along clkdm_del_sleepdep() value upon success.
  584. */
  585. static int _del_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
  586. {
  587. struct clockdomain *clkdm, *init_clkdm;
  588. clkdm = _get_clkdm(oh);
  589. init_clkdm = _get_clkdm(init_oh);
  590. if (!clkdm || !init_clkdm)
  591. return -EINVAL;
  592. if (clkdm && clkdm->flags & CLKDM_NO_AUTODEPS)
  593. return 0;
  594. return clkdm_del_sleepdep(clkdm, init_clkdm);
  595. }
  596. /**
  597. * _init_main_clk - get a struct clk * for the the hwmod's main functional clk
  598. * @oh: struct omap_hwmod *
  599. *
  600. * Called from _init_clocks(). Populates the @oh _clk (main
  601. * functional clock pointer) if a clock matching the hwmod name is found,
  602. * or a main_clk is present. Returns 0 on success or -EINVAL on error.
  603. */
  604. static int _init_main_clk(struct omap_hwmod *oh)
  605. {
  606. int ret = 0;
  607. char name[MOD_CLK_MAX_NAME_LEN];
  608. struct clk *clk;
  609. static const char modck[] = "_mod_ck";
  610. if (strlen(oh->name) >= MOD_CLK_MAX_NAME_LEN - strlen(modck))
  611. pr_warn("%s: warning: cropping name for %s\n", __func__,
  612. oh->name);
  613. strlcpy(name, oh->name, MOD_CLK_MAX_NAME_LEN - strlen(modck));
  614. strlcat(name, modck, MOD_CLK_MAX_NAME_LEN);
  615. clk = clk_get(NULL, name);
  616. if (!IS_ERR(clk)) {
  617. oh->_clk = clk;
  618. soc_ops.disable_direct_prcm(oh);
  619. oh->main_clk = kstrdup(name, GFP_KERNEL);
  620. } else {
  621. if (!oh->main_clk)
  622. return 0;
  623. oh->_clk = clk_get(NULL, oh->main_clk);
  624. }
  625. if (IS_ERR(oh->_clk)) {
  626. pr_warn("omap_hwmod: %s: cannot clk_get main_clk %s\n",
  627. oh->name, oh->main_clk);
  628. return -EINVAL;
  629. }
  630. /*
  631. * HACK: This needs a re-visit once clk_prepare() is implemented
  632. * to do something meaningful. Today its just a no-op.
  633. * If clk_prepare() is used at some point to do things like
  634. * voltage scaling etc, then this would have to be moved to
  635. * some point where subsystems like i2c and pmic become
  636. * available.
  637. */
  638. clk_prepare(oh->_clk);
  639. if (!_get_clkdm(oh))
  640. pr_debug("omap_hwmod: %s: missing clockdomain for %s.\n",
  641. oh->name, oh->main_clk);
  642. return ret;
  643. }
  644. /**
  645. * _init_interface_clks - get a struct clk * for the the hwmod's interface clks
  646. * @oh: struct omap_hwmod *
  647. *
  648. * Called from _init_clocks(). Populates the @oh OCP slave interface
  649. * clock pointers. Returns 0 on success or -EINVAL on error.
  650. */
  651. static int _init_interface_clks(struct omap_hwmod *oh)
  652. {
  653. struct omap_hwmod_ocp_if *os;
  654. struct clk *c;
  655. int ret = 0;
  656. list_for_each_entry(os, &oh->slave_ports, node) {
  657. if (!os->clk)
  658. continue;
  659. c = clk_get(NULL, os->clk);
  660. if (IS_ERR(c)) {
  661. pr_warn("omap_hwmod: %s: cannot clk_get interface_clk %s\n",
  662. oh->name, os->clk);
  663. ret = -EINVAL;
  664. continue;
  665. }
  666. os->_clk = c;
  667. /*
  668. * HACK: This needs a re-visit once clk_prepare() is implemented
  669. * to do something meaningful. Today its just a no-op.
  670. * If clk_prepare() is used at some point to do things like
  671. * voltage scaling etc, then this would have to be moved to
  672. * some point where subsystems like i2c and pmic become
  673. * available.
  674. */
  675. clk_prepare(os->_clk);
  676. }
  677. return ret;
  678. }
  679. /**
  680. * _init_opt_clk - get a struct clk * for the the hwmod's optional clocks
  681. * @oh: struct omap_hwmod *
  682. *
  683. * Called from _init_clocks(). Populates the @oh omap_hwmod_opt_clk
  684. * clock pointers. Returns 0 on success or -EINVAL on error.
  685. */
  686. static int _init_opt_clks(struct omap_hwmod *oh)
  687. {
  688. struct omap_hwmod_opt_clk *oc;
  689. struct clk *c;
  690. int i;
  691. int ret = 0;
  692. for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++) {
  693. c = clk_get(NULL, oc->clk);
  694. if (IS_ERR(c)) {
  695. pr_warn("omap_hwmod: %s: cannot clk_get opt_clk %s\n",
  696. oh->name, oc->clk);
  697. ret = -EINVAL;
  698. continue;
  699. }
  700. oc->_clk = c;
  701. /*
  702. * HACK: This needs a re-visit once clk_prepare() is implemented
  703. * to do something meaningful. Today its just a no-op.
  704. * If clk_prepare() is used at some point to do things like
  705. * voltage scaling etc, then this would have to be moved to
  706. * some point where subsystems like i2c and pmic become
  707. * available.
  708. */
  709. clk_prepare(oc->_clk);
  710. }
  711. return ret;
  712. }
  713. static void _enable_optional_clocks(struct omap_hwmod *oh)
  714. {
  715. struct omap_hwmod_opt_clk *oc;
  716. int i;
  717. pr_debug("omap_hwmod: %s: enabling optional clocks\n", oh->name);
  718. for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
  719. if (oc->_clk) {
  720. pr_debug("omap_hwmod: enable %s:%s\n", oc->role,
  721. __clk_get_name(oc->_clk));
  722. clk_enable(oc->_clk);
  723. }
  724. }
  725. static void _disable_optional_clocks(struct omap_hwmod *oh)
  726. {
  727. struct omap_hwmod_opt_clk *oc;
  728. int i;
  729. pr_debug("omap_hwmod: %s: disabling optional clocks\n", oh->name);
  730. for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
  731. if (oc->_clk) {
  732. pr_debug("omap_hwmod: disable %s:%s\n", oc->role,
  733. __clk_get_name(oc->_clk));
  734. clk_disable(oc->_clk);
  735. }
  736. }
  737. /**
  738. * _enable_clocks - enable hwmod main clock and interface clocks
  739. * @oh: struct omap_hwmod *
  740. *
  741. * Enables all clocks necessary for register reads and writes to succeed
  742. * on the hwmod @oh. Returns 0.
  743. */
  744. static int _enable_clocks(struct omap_hwmod *oh)
  745. {
  746. struct omap_hwmod_ocp_if *os;
  747. pr_debug("omap_hwmod: %s: enabling clocks\n", oh->name);
  748. if (oh->_clk)
  749. clk_enable(oh->_clk);
  750. list_for_each_entry(os, &oh->slave_ports, node) {
  751. if (os->_clk && (os->flags & OCPIF_SWSUP_IDLE))
  752. clk_enable(os->_clk);
  753. }
  754. if (oh->flags & HWMOD_OPT_CLKS_NEEDED)
  755. _enable_optional_clocks(oh);
  756. /* The opt clocks are controlled by the device driver. */
  757. return 0;
  758. }
  759. /**
  760. * _disable_clocks - disable hwmod main clock and interface clocks
  761. * @oh: struct omap_hwmod *
  762. *
  763. * Disables the hwmod @oh main functional and interface clocks. Returns 0.
  764. */
  765. static int _disable_clocks(struct omap_hwmod *oh)
  766. {
  767. struct omap_hwmod_ocp_if *os;
  768. pr_debug("omap_hwmod: %s: disabling clocks\n", oh->name);
  769. if (oh->_clk)
  770. clk_disable(oh->_clk);
  771. list_for_each_entry(os, &oh->slave_ports, node) {
  772. if (os->_clk && (os->flags & OCPIF_SWSUP_IDLE))
  773. clk_disable(os->_clk);
  774. }
  775. if (oh->flags & HWMOD_OPT_CLKS_NEEDED)
  776. _disable_optional_clocks(oh);
  777. /* The opt clocks are controlled by the device driver. */
  778. return 0;
  779. }
  780. /**
  781. * _omap4_enable_module - enable CLKCTRL modulemode on OMAP4
  782. * @oh: struct omap_hwmod *
  783. *
  784. * Enables the PRCM module mode related to the hwmod @oh.
  785. * No return value.
  786. */
  787. static void _omap4_enable_module(struct omap_hwmod *oh)
  788. {
  789. if (!oh->clkdm || !oh->prcm.omap4.modulemode)
  790. return;
  791. pr_debug("omap_hwmod: %s: %s: %d\n",
  792. oh->name, __func__, oh->prcm.omap4.modulemode);
  793. omap_cm_module_enable(oh->prcm.omap4.modulemode,
  794. oh->clkdm->prcm_partition,
  795. oh->clkdm->cm_inst, oh->prcm.omap4.clkctrl_offs);
  796. }
  797. /**
  798. * _omap4_wait_target_disable - wait for a module to be disabled on OMAP4
  799. * @oh: struct omap_hwmod *
  800. *
  801. * Wait for a module @oh to enter slave idle. Returns 0 if the module
  802. * does not have an IDLEST bit or if the module successfully enters
  803. * slave idle; otherwise, pass along the return value of the
  804. * appropriate *_cm*_wait_module_idle() function.
  805. */
  806. static int _omap4_wait_target_disable(struct omap_hwmod *oh)
  807. {
  808. if (!oh)
  809. return -EINVAL;
  810. if (oh->_int_flags & _HWMOD_NO_MPU_PORT || !oh->clkdm)
  811. return 0;
  812. if (oh->flags & HWMOD_NO_IDLEST)
  813. return 0;
  814. if (!oh->prcm.omap4.clkctrl_offs &&
  815. !(oh->prcm.omap4.flags & HWMOD_OMAP4_ZERO_CLKCTRL_OFFSET))
  816. return 0;
  817. return omap_cm_wait_module_idle(oh->clkdm->prcm_partition,
  818. oh->clkdm->cm_inst,
  819. oh->prcm.omap4.clkctrl_offs, 0);
  820. }
  821. /**
  822. * _count_mpu_irqs - count the number of MPU IRQ lines associated with @oh
  823. * @oh: struct omap_hwmod *oh
  824. *
  825. * Count and return the number of MPU IRQs associated with the hwmod
  826. * @oh. Used to allocate struct resource data. Returns 0 if @oh is
  827. * NULL.
  828. */
  829. static int _count_mpu_irqs(struct omap_hwmod *oh)
  830. {
  831. struct omap_hwmod_irq_info *ohii;
  832. int i = 0;
  833. if (!oh || !oh->mpu_irqs)
  834. return 0;
  835. do {
  836. ohii = &oh->mpu_irqs[i++];
  837. } while (ohii->irq != -1);
  838. return i-1;
  839. }
  840. /**
  841. * _count_sdma_reqs - count the number of SDMA request lines associated with @oh
  842. * @oh: struct omap_hwmod *oh
  843. *
  844. * Count and return the number of SDMA request lines associated with
  845. * the hwmod @oh. Used to allocate struct resource data. Returns 0
  846. * if @oh is NULL.
  847. */
  848. static int _count_sdma_reqs(struct omap_hwmod *oh)
  849. {
  850. struct omap_hwmod_dma_info *ohdi;
  851. int i = 0;
  852. if (!oh || !oh->sdma_reqs)
  853. return 0;
  854. do {
  855. ohdi = &oh->sdma_reqs[i++];
  856. } while (ohdi->dma_req != -1);
  857. return i-1;
  858. }
  859. /**
  860. * _count_ocp_if_addr_spaces - count the number of address space entries for @oh
  861. * @oh: struct omap_hwmod *oh
  862. *
  863. * Count and return the number of address space ranges associated with
  864. * the hwmod @oh. Used to allocate struct resource data. Returns 0
  865. * if @oh is NULL.
  866. */
  867. static int _count_ocp_if_addr_spaces(struct omap_hwmod_ocp_if *os)
  868. {
  869. struct omap_hwmod_addr_space *mem;
  870. int i = 0;
  871. if (!os || !os->addr)
  872. return 0;
  873. do {
  874. mem = &os->addr[i++];
  875. } while (mem->pa_start != mem->pa_end);
  876. return i-1;
  877. }
  878. /**
  879. * _get_mpu_irq_by_name - fetch MPU interrupt line number by name
  880. * @oh: struct omap_hwmod * to operate on
  881. * @name: pointer to the name of the MPU interrupt number to fetch (optional)
  882. * @irq: pointer to an unsigned int to store the MPU IRQ number to
  883. *
  884. * Retrieve a MPU hardware IRQ line number named by @name associated
  885. * with the IP block pointed to by @oh. The IRQ number will be filled
  886. * into the address pointed to by @dma. When @name is non-null, the
  887. * IRQ line number associated with the named entry will be returned.
  888. * If @name is null, the first matching entry will be returned. Data
  889. * order is not meaningful in hwmod data, so callers are strongly
  890. * encouraged to use a non-null @name whenever possible to avoid
  891. * unpredictable effects if hwmod data is later added that causes data
  892. * ordering to change. Returns 0 upon success or a negative error
  893. * code upon error.
  894. */
  895. static int _get_mpu_irq_by_name(struct omap_hwmod *oh, const char *name,
  896. unsigned int *irq)
  897. {
  898. int i;
  899. bool found = false;
  900. if (!oh->mpu_irqs)
  901. return -ENOENT;
  902. i = 0;
  903. while (oh->mpu_irqs[i].irq != -1) {
  904. if (name == oh->mpu_irqs[i].name ||
  905. !strcmp(name, oh->mpu_irqs[i].name)) {
  906. found = true;
  907. break;
  908. }
  909. i++;
  910. }
  911. if (!found)
  912. return -ENOENT;
  913. *irq = oh->mpu_irqs[i].irq;
  914. return 0;
  915. }
  916. /**
  917. * _get_sdma_req_by_name - fetch SDMA request line ID by name
  918. * @oh: struct omap_hwmod * to operate on
  919. * @name: pointer to the name of the SDMA request line to fetch (optional)
  920. * @dma: pointer to an unsigned int to store the request line ID to
  921. *
  922. * Retrieve an SDMA request line ID named by @name on the IP block
  923. * pointed to by @oh. The ID will be filled into the address pointed
  924. * to by @dma. When @name is non-null, the request line ID associated
  925. * with the named entry will be returned. If @name is null, the first
  926. * matching entry will be returned. Data order is not meaningful in
  927. * hwmod data, so callers are strongly encouraged to use a non-null
  928. * @name whenever possible to avoid unpredictable effects if hwmod
  929. * data is later added that causes data ordering to change. Returns 0
  930. * upon success or a negative error code upon error.
  931. */
  932. static int _get_sdma_req_by_name(struct omap_hwmod *oh, const char *name,
  933. unsigned int *dma)
  934. {
  935. int i;
  936. bool found = false;
  937. if (!oh->sdma_reqs)
  938. return -ENOENT;
  939. i = 0;
  940. while (oh->sdma_reqs[i].dma_req != -1) {
  941. if (name == oh->sdma_reqs[i].name ||
  942. !strcmp(name, oh->sdma_reqs[i].name)) {
  943. found = true;
  944. break;
  945. }
  946. i++;
  947. }
  948. if (!found)
  949. return -ENOENT;
  950. *dma = oh->sdma_reqs[i].dma_req;
  951. return 0;
  952. }
  953. /**
  954. * _get_addr_space_by_name - fetch address space start & end by name
  955. * @oh: struct omap_hwmod * to operate on
  956. * @name: pointer to the name of the address space to fetch (optional)
  957. * @pa_start: pointer to a u32 to store the starting address to
  958. * @pa_end: pointer to a u32 to store the ending address to
  959. *
  960. * Retrieve address space start and end addresses for the IP block
  961. * pointed to by @oh. The data will be filled into the addresses
  962. * pointed to by @pa_start and @pa_end. When @name is non-null, the
  963. * address space data associated with the named entry will be
  964. * returned. If @name is null, the first matching entry will be
  965. * returned. Data order is not meaningful in hwmod data, so callers
  966. * are strongly encouraged to use a non-null @name whenever possible
  967. * to avoid unpredictable effects if hwmod data is later added that
  968. * causes data ordering to change. Returns 0 upon success or a
  969. * negative error code upon error.
  970. */
  971. static int _get_addr_space_by_name(struct omap_hwmod *oh, const char *name,
  972. u32 *pa_start, u32 *pa_end)
  973. {
  974. int j;
  975. struct omap_hwmod_ocp_if *os;
  976. bool found = false;
  977. list_for_each_entry(os, &oh->slave_ports, node) {
  978. if (!os->addr)
  979. return -ENOENT;
  980. j = 0;
  981. while (os->addr[j].pa_start != os->addr[j].pa_end) {
  982. if (name == os->addr[j].name ||
  983. !strcmp(name, os->addr[j].name)) {
  984. found = true;
  985. break;
  986. }
  987. j++;
  988. }
  989. if (found)
  990. break;
  991. }
  992. if (!found)
  993. return -ENOENT;
  994. *pa_start = os->addr[j].pa_start;
  995. *pa_end = os->addr[j].pa_end;
  996. return 0;
  997. }
  998. /**
  999. * _save_mpu_port_index - find and save the index to @oh's MPU port
  1000. * @oh: struct omap_hwmod *
  1001. *
  1002. * Determines the array index of the OCP slave port that the MPU uses
  1003. * to address the device, and saves it into the struct omap_hwmod.
  1004. * Intended to be called during hwmod registration only. No return
  1005. * value.
  1006. */
  1007. static void __init _save_mpu_port_index(struct omap_hwmod *oh)
  1008. {
  1009. struct omap_hwmod_ocp_if *os = NULL;
  1010. if (!oh)
  1011. return;
  1012. oh->_int_flags |= _HWMOD_NO_MPU_PORT;
  1013. list_for_each_entry(os, &oh->slave_ports, node) {
  1014. if (os->user & OCP_USER_MPU) {
  1015. oh->_mpu_port = os;
  1016. oh->_int_flags &= ~_HWMOD_NO_MPU_PORT;
  1017. break;
  1018. }
  1019. }
  1020. return;
  1021. }
  1022. /**
  1023. * _find_mpu_rt_port - return omap_hwmod_ocp_if accessible by the MPU
  1024. * @oh: struct omap_hwmod *
  1025. *
  1026. * Given a pointer to a struct omap_hwmod record @oh, return a pointer
  1027. * to the struct omap_hwmod_ocp_if record that is used by the MPU to
  1028. * communicate with the IP block. This interface need not be directly
  1029. * connected to the MPU (and almost certainly is not), but is directly
  1030. * connected to the IP block represented by @oh. Returns a pointer
  1031. * to the struct omap_hwmod_ocp_if * upon success, or returns NULL upon
  1032. * error or if there does not appear to be a path from the MPU to this
  1033. * IP block.
  1034. */
  1035. static struct omap_hwmod_ocp_if *_find_mpu_rt_port(struct omap_hwmod *oh)
  1036. {
  1037. if (!oh || oh->_int_flags & _HWMOD_NO_MPU_PORT || oh->slaves_cnt == 0)
  1038. return NULL;
  1039. return oh->_mpu_port;
  1040. };
  1041. /**
  1042. * _find_mpu_rt_addr_space - return MPU register target address space for @oh
  1043. * @oh: struct omap_hwmod *
  1044. *
  1045. * Returns a pointer to the struct omap_hwmod_addr_space record representing
  1046. * the register target MPU address space; or returns NULL upon error.
  1047. */
  1048. static struct omap_hwmod_addr_space * __init _find_mpu_rt_addr_space(struct omap_hwmod *oh)
  1049. {
  1050. struct omap_hwmod_ocp_if *os;
  1051. struct omap_hwmod_addr_space *mem;
  1052. int found = 0, i = 0;
  1053. os = _find_mpu_rt_port(oh);
  1054. if (!os || !os->addr)
  1055. return NULL;
  1056. do {
  1057. mem = &os->addr[i++];
  1058. if (mem->flags & ADDR_TYPE_RT)
  1059. found = 1;
  1060. } while (!found && mem->pa_start != mem->pa_end);
  1061. return (found) ? mem : NULL;
  1062. }
  1063. /**
  1064. * _enable_sysc - try to bring a module out of idle via OCP_SYSCONFIG
  1065. * @oh: struct omap_hwmod *
  1066. *
  1067. * Ensure that the OCP_SYSCONFIG register for the IP block represented
  1068. * by @oh is set to indicate to the PRCM that the IP block is active.
  1069. * Usually this means placing the module into smart-idle mode and
  1070. * smart-standby, but if there is a bug in the automatic idle handling
  1071. * for the IP block, it may need to be placed into the force-idle or
  1072. * no-idle variants of these modes. No return value.
  1073. */
  1074. static void _enable_sysc(struct omap_hwmod *oh)
  1075. {
  1076. u8 idlemode, sf;
  1077. u32 v;
  1078. bool clkdm_act;
  1079. struct clockdomain *clkdm;
  1080. if (!oh->class->sysc)
  1081. return;
  1082. /*
  1083. * Wait until reset has completed, this is needed as the IP
  1084. * block is reset automatically by hardware in some cases
  1085. * (off-mode for example), and the drivers require the
  1086. * IP to be ready when they access it
  1087. */
  1088. if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
  1089. _enable_optional_clocks(oh);
  1090. _wait_softreset_complete(oh);
  1091. if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
  1092. _disable_optional_clocks(oh);
  1093. v = oh->_sysc_cache;
  1094. sf = oh->class->sysc->sysc_flags;
  1095. clkdm = _get_clkdm(oh);
  1096. if (sf & SYSC_HAS_SIDLEMODE) {
  1097. if (oh->flags & HWMOD_SWSUP_SIDLE ||
  1098. oh->flags & HWMOD_SWSUP_SIDLE_ACT) {
  1099. idlemode = HWMOD_IDLEMODE_NO;
  1100. } else {
  1101. if (sf & SYSC_HAS_ENAWAKEUP)
  1102. _enable_wakeup(oh, &v);
  1103. if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
  1104. idlemode = HWMOD_IDLEMODE_SMART_WKUP;
  1105. else
  1106. idlemode = HWMOD_IDLEMODE_SMART;
  1107. }
  1108. /*
  1109. * This is special handling for some IPs like
  1110. * 32k sync timer. Force them to idle!
  1111. */
  1112. clkdm_act = (clkdm && clkdm->flags & CLKDM_ACTIVE_WITH_MPU);
  1113. if (clkdm_act && !(oh->class->sysc->idlemodes &
  1114. (SIDLE_SMART | SIDLE_SMART_WKUP)))
  1115. idlemode = HWMOD_IDLEMODE_FORCE;
  1116. _set_slave_idlemode(oh, idlemode, &v);
  1117. }
  1118. if (sf & SYSC_HAS_MIDLEMODE) {
  1119. if (oh->flags & HWMOD_FORCE_MSTANDBY) {
  1120. idlemode = HWMOD_IDLEMODE_FORCE;
  1121. } else if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
  1122. idlemode = HWMOD_IDLEMODE_NO;
  1123. } else {
  1124. if (sf & SYSC_HAS_ENAWAKEUP)
  1125. _enable_wakeup(oh, &v);
  1126. if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
  1127. idlemode = HWMOD_IDLEMODE_SMART_WKUP;
  1128. else
  1129. idlemode = HWMOD_IDLEMODE_SMART;
  1130. }
  1131. _set_master_standbymode(oh, idlemode, &v);
  1132. }
  1133. /*
  1134. * XXX The clock framework should handle this, by
  1135. * calling into this code. But this must wait until the
  1136. * clock structures are tagged with omap_hwmod entries
  1137. */
  1138. if ((oh->flags & HWMOD_SET_DEFAULT_CLOCKACT) &&
  1139. (sf & SYSC_HAS_CLOCKACTIVITY))
  1140. _set_clockactivity(oh, CLOCKACT_TEST_ICLK, &v);
  1141. _write_sysconfig(v, oh);
  1142. /*
  1143. * Set the autoidle bit only after setting the smartidle bit
  1144. * Setting this will not have any impact on the other modules.
  1145. */
  1146. if (sf & SYSC_HAS_AUTOIDLE) {
  1147. idlemode = (oh->flags & HWMOD_NO_OCP_AUTOIDLE) ?
  1148. 0 : 1;
  1149. _set_module_autoidle(oh, idlemode, &v);
  1150. _write_sysconfig(v, oh);
  1151. }
  1152. }
  1153. /**
  1154. * _idle_sysc - try to put a module into idle via OCP_SYSCONFIG
  1155. * @oh: struct omap_hwmod *
  1156. *
  1157. * If module is marked as SWSUP_SIDLE, force the module into slave
  1158. * idle; otherwise, configure it for smart-idle. If module is marked
  1159. * as SWSUP_MSUSPEND, force the module into master standby; otherwise,
  1160. * configure it for smart-standby. No return value.
  1161. */
  1162. static void _idle_sysc(struct omap_hwmod *oh)
  1163. {
  1164. u8 idlemode, sf;
  1165. u32 v;
  1166. if (!oh->class->sysc)
  1167. return;
  1168. v = oh->_sysc_cache;
  1169. sf = oh->class->sysc->sysc_flags;
  1170. if (sf & SYSC_HAS_SIDLEMODE) {
  1171. if (oh->flags & HWMOD_SWSUP_SIDLE) {
  1172. idlemode = HWMOD_IDLEMODE_FORCE;
  1173. } else {
  1174. if (sf & SYSC_HAS_ENAWAKEUP)
  1175. _enable_wakeup(oh, &v);
  1176. if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
  1177. idlemode = HWMOD_IDLEMODE_SMART_WKUP;
  1178. else
  1179. idlemode = HWMOD_IDLEMODE_SMART;
  1180. }
  1181. _set_slave_idlemode(oh, idlemode, &v);
  1182. }
  1183. if (sf & SYSC_HAS_MIDLEMODE) {
  1184. if ((oh->flags & HWMOD_SWSUP_MSTANDBY) ||
  1185. (oh->flags & HWMOD_FORCE_MSTANDBY)) {
  1186. idlemode = HWMOD_IDLEMODE_FORCE;
  1187. } else {
  1188. if (sf & SYSC_HAS_ENAWAKEUP)
  1189. _enable_wakeup(oh, &v);
  1190. if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
  1191. idlemode = HWMOD_IDLEMODE_SMART_WKUP;
  1192. else
  1193. idlemode = HWMOD_IDLEMODE_SMART;
  1194. }
  1195. _set_master_standbymode(oh, idlemode, &v);
  1196. }
  1197. /* If the cached value is the same as the new value, skip the write */
  1198. if (oh->_sysc_cache != v)
  1199. _write_sysconfig(v, oh);
  1200. }
  1201. /**
  1202. * _shutdown_sysc - force a module into idle via OCP_SYSCONFIG
  1203. * @oh: struct omap_hwmod *
  1204. *
  1205. * Force the module into slave idle and master suspend. No return
  1206. * value.
  1207. */
  1208. static void _shutdown_sysc(struct omap_hwmod *oh)
  1209. {
  1210. u32 v;
  1211. u8 sf;
  1212. if (!oh->class->sysc)
  1213. return;
  1214. v = oh->_sysc_cache;
  1215. sf = oh->class->sysc->sysc_flags;
  1216. if (sf & SYSC_HAS_SIDLEMODE)
  1217. _set_slave_idlemode(oh, HWMOD_IDLEMODE_FORCE, &v);
  1218. if (sf & SYSC_HAS_MIDLEMODE)
  1219. _set_master_standbymode(oh, HWMOD_IDLEMODE_FORCE, &v);
  1220. if (sf & SYSC_HAS_AUTOIDLE)
  1221. _set_module_autoidle(oh, 1, &v);
  1222. _write_sysconfig(v, oh);
  1223. }
  1224. /**
  1225. * _lookup - find an omap_hwmod by name
  1226. * @name: find an omap_hwmod by name
  1227. *
  1228. * Return a pointer to an omap_hwmod by name, or NULL if not found.
  1229. */
  1230. static struct omap_hwmod *_lookup(const char *name)
  1231. {
  1232. struct omap_hwmod *oh, *temp_oh;
  1233. oh = NULL;
  1234. list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
  1235. if (!strcmp(name, temp_oh->name)) {
  1236. oh = temp_oh;
  1237. break;
  1238. }
  1239. }
  1240. return oh;
  1241. }
  1242. /**
  1243. * _init_clkdm - look up a clockdomain name, store pointer in omap_hwmod
  1244. * @oh: struct omap_hwmod *
  1245. *
  1246. * Convert a clockdomain name stored in a struct omap_hwmod into a
  1247. * clockdomain pointer, and save it into the struct omap_hwmod.
  1248. * Return -EINVAL if the clkdm_name lookup failed.
  1249. */
  1250. static int _init_clkdm(struct omap_hwmod *oh)
  1251. {
  1252. if (!oh->clkdm_name) {
  1253. pr_debug("omap_hwmod: %s: missing clockdomain\n", oh->name);
  1254. return 0;
  1255. }
  1256. oh->clkdm = clkdm_lookup(oh->clkdm_name);
  1257. if (!oh->clkdm) {
  1258. pr_warn("omap_hwmod: %s: could not associate to clkdm %s\n",
  1259. oh->name, oh->clkdm_name);
  1260. return 0;
  1261. }
  1262. pr_debug("omap_hwmod: %s: associated to clkdm %s\n",
  1263. oh->name, oh->clkdm_name);
  1264. return 0;
  1265. }
  1266. /**
  1267. * _init_clocks - clk_get() all clocks associated with this hwmod. Retrieve as
  1268. * well the clockdomain.
  1269. * @oh: struct omap_hwmod *
  1270. * @data: not used; pass NULL
  1271. *
  1272. * Called by omap_hwmod_setup_*() (after omap2_clk_init()).
  1273. * Resolves all clock names embedded in the hwmod. Returns 0 on
  1274. * success, or a negative error code on failure.
  1275. */
  1276. static int _init_clocks(struct omap_hwmod *oh, void *data)
  1277. {
  1278. int ret = 0;
  1279. if (oh->_state != _HWMOD_STATE_REGISTERED)
  1280. return 0;
  1281. pr_debug("omap_hwmod: %s: looking up clocks\n", oh->name);
  1282. if (soc_ops.init_clkdm)
  1283. ret |= soc_ops.init_clkdm(oh);
  1284. ret |= _init_main_clk(oh);
  1285. ret |= _init_interface_clks(oh);
  1286. ret |= _init_opt_clks(oh);
  1287. if (!ret)
  1288. oh->_state = _HWMOD_STATE_CLKS_INITED;
  1289. else
  1290. pr_warn("omap_hwmod: %s: cannot _init_clocks\n", oh->name);
  1291. return ret;
  1292. }
  1293. /**
  1294. * _lookup_hardreset - fill register bit info for this hwmod/reset line
  1295. * @oh: struct omap_hwmod *
  1296. * @name: name of the reset line in the context of this hwmod
  1297. * @ohri: struct omap_hwmod_rst_info * that this function will fill in
  1298. *
  1299. * Return the bit position of the reset line that match the
  1300. * input name. Return -ENOENT if not found.
  1301. */
  1302. static int _lookup_hardreset(struct omap_hwmod *oh, const char *name,
  1303. struct omap_hwmod_rst_info *ohri)
  1304. {
  1305. int i;
  1306. for (i = 0; i < oh->rst_lines_cnt; i++) {
  1307. const char *rst_line = oh->rst_lines[i].name;
  1308. if (!strcmp(rst_line, name)) {
  1309. ohri->rst_shift = oh->rst_lines[i].rst_shift;
  1310. ohri->st_shift = oh->rst_lines[i].st_shift;
  1311. pr_debug("omap_hwmod: %s: %s: %s: rst %d st %d\n",
  1312. oh->name, __func__, rst_line, ohri->rst_shift,
  1313. ohri->st_shift);
  1314. return 0;
  1315. }
  1316. }
  1317. return -ENOENT;
  1318. }
  1319. /**
  1320. * _assert_hardreset - assert the HW reset line of submodules
  1321. * contained in the hwmod module.
  1322. * @oh: struct omap_hwmod *
  1323. * @name: name of the reset line to lookup and assert
  1324. *
  1325. * Some IP like dsp, ipu or iva contain processor that require an HW
  1326. * reset line to be assert / deassert in order to enable fully the IP.
  1327. * Returns -EINVAL if @oh is null, -ENOSYS if we have no way of
  1328. * asserting the hardreset line on the currently-booted SoC, or passes
  1329. * along the return value from _lookup_hardreset() or the SoC's
  1330. * assert_hardreset code.
  1331. */
  1332. static int _assert_hardreset(struct omap_hwmod *oh, const char *name)
  1333. {
  1334. struct omap_hwmod_rst_info ohri;
  1335. int ret = -EINVAL;
  1336. if (!oh)
  1337. return -EINVAL;
  1338. if (!soc_ops.assert_hardreset)
  1339. return -ENOSYS;
  1340. ret = _lookup_hardreset(oh, name, &ohri);
  1341. if (ret < 0)
  1342. return ret;
  1343. ret = soc_ops.assert_hardreset(oh, &ohri);
  1344. return ret;
  1345. }
  1346. /**
  1347. * _deassert_hardreset - deassert the HW reset line of submodules contained
  1348. * in the hwmod module.
  1349. * @oh: struct omap_hwmod *
  1350. * @name: name of the reset line to look up and deassert
  1351. *
  1352. * Some IP like dsp, ipu or iva contain processor that require an HW
  1353. * reset line to be assert / deassert in order to enable fully the IP.
  1354. * Returns -EINVAL if @oh is null, -ENOSYS if we have no way of
  1355. * deasserting the hardreset line on the currently-booted SoC, or passes
  1356. * along the return value from _lookup_hardreset() or the SoC's
  1357. * deassert_hardreset code.
  1358. */
  1359. static int _deassert_hardreset(struct omap_hwmod *oh, const char *name)
  1360. {
  1361. struct omap_hwmod_rst_info ohri;
  1362. int ret = -EINVAL;
  1363. if (!oh)
  1364. return -EINVAL;
  1365. if (!soc_ops.deassert_hardreset)
  1366. return -ENOSYS;
  1367. ret = _lookup_hardreset(oh, name, &ohri);
  1368. if (ret < 0)
  1369. return ret;
  1370. if (oh->clkdm) {
  1371. /*
  1372. * A clockdomain must be in SW_SUP otherwise reset
  1373. * might not be completed. The clockdomain can be set
  1374. * in HW_AUTO only when the module become ready.
  1375. */
  1376. clkdm_deny_idle(oh->clkdm);
  1377. ret = clkdm_hwmod_enable(oh->clkdm, oh);
  1378. if (ret) {
  1379. WARN(1, "omap_hwmod: %s: could not enable clockdomain %s: %d\n",
  1380. oh->name, oh->clkdm->name, ret);
  1381. return ret;
  1382. }
  1383. }
  1384. _enable_clocks(oh);
  1385. if (soc_ops.enable_module)
  1386. soc_ops.enable_module(oh);
  1387. ret = soc_ops.deassert_hardreset(oh, &ohri);
  1388. if (soc_ops.disable_module)
  1389. soc_ops.disable_module(oh);
  1390. _disable_clocks(oh);
  1391. if (ret == -EBUSY)
  1392. pr_warn("omap_hwmod: %s: failed to hardreset\n", oh->name);
  1393. if (oh->clkdm) {
  1394. /*
  1395. * Set the clockdomain to HW_AUTO, assuming that the
  1396. * previous state was HW_AUTO.
  1397. */
  1398. clkdm_allow_idle(oh->clkdm);
  1399. clkdm_hwmod_disable(oh->clkdm, oh);
  1400. }
  1401. return ret;
  1402. }
  1403. /**
  1404. * _read_hardreset - read the HW reset line state of submodules
  1405. * contained in the hwmod module
  1406. * @oh: struct omap_hwmod *
  1407. * @name: name of the reset line to look up and read
  1408. *
  1409. * Return the state of the reset line. Returns -EINVAL if @oh is
  1410. * null, -ENOSYS if we have no way of reading the hardreset line
  1411. * status on the currently-booted SoC, or passes along the return
  1412. * value from _lookup_hardreset() or the SoC's is_hardreset_asserted
  1413. * code.
  1414. */
  1415. static int _read_hardreset(struct omap_hwmod *oh, const char *name)
  1416. {
  1417. struct omap_hwmod_rst_info ohri;
  1418. int ret = -EINVAL;
  1419. if (!oh)
  1420. return -EINVAL;
  1421. if (!soc_ops.is_hardreset_asserted)
  1422. return -ENOSYS;
  1423. ret = _lookup_hardreset(oh, name, &ohri);
  1424. if (ret < 0)
  1425. return ret;
  1426. return soc_ops.is_hardreset_asserted(oh, &ohri);
  1427. }
  1428. /**
  1429. * _are_all_hardreset_lines_asserted - return true if the @oh is hard-reset
  1430. * @oh: struct omap_hwmod *
  1431. *
  1432. * If all hardreset lines associated with @oh are asserted, then return true.
  1433. * Otherwise, if part of @oh is out hardreset or if no hardreset lines
  1434. * associated with @oh are asserted, then return false.
  1435. * This function is used to avoid executing some parts of the IP block
  1436. * enable/disable sequence if its hardreset line is set.
  1437. */
  1438. static bool _are_all_hardreset_lines_asserted(struct omap_hwmod *oh)
  1439. {
  1440. int i, rst_cnt = 0;
  1441. if (oh->rst_lines_cnt == 0)
  1442. return false;
  1443. for (i = 0; i < oh->rst_lines_cnt; i++)
  1444. if (_read_hardreset(oh, oh->rst_lines[i].name) > 0)
  1445. rst_cnt++;
  1446. if (oh->rst_lines_cnt == rst_cnt)
  1447. return true;
  1448. return false;
  1449. }
  1450. /**
  1451. * _are_any_hardreset_lines_asserted - return true if any part of @oh is
  1452. * hard-reset
  1453. * @oh: struct omap_hwmod *
  1454. *
  1455. * If any hardreset lines associated with @oh are asserted, then
  1456. * return true. Otherwise, if no hardreset lines associated with @oh
  1457. * are asserted, or if @oh has no hardreset lines, then return false.
  1458. * This function is used to avoid executing some parts of the IP block
  1459. * enable/disable sequence if any hardreset line is set.
  1460. */
  1461. static bool _are_any_hardreset_lines_asserted(struct omap_hwmod *oh)
  1462. {
  1463. int rst_cnt = 0;
  1464. int i;
  1465. for (i = 0; i < oh->rst_lines_cnt && rst_cnt == 0; i++)
  1466. if (_read_hardreset(oh, oh->rst_lines[i].name) > 0)
  1467. rst_cnt++;
  1468. return (rst_cnt) ? true : false;
  1469. }
  1470. /**
  1471. * _omap4_disable_module - enable CLKCTRL modulemode on OMAP4
  1472. * @oh: struct omap_hwmod *
  1473. *
  1474. * Disable the PRCM module mode related to the hwmod @oh.
  1475. * Return EINVAL if the modulemode is not supported and 0 in case of success.
  1476. */
  1477. static int _omap4_disable_module(struct omap_hwmod *oh)
  1478. {
  1479. int v;
  1480. if (!oh->clkdm || !oh->prcm.omap4.modulemode)
  1481. return -EINVAL;
  1482. /*
  1483. * Since integration code might still be doing something, only
  1484. * disable if all lines are under hardreset.
  1485. */
  1486. if (_are_any_hardreset_lines_asserted(oh))
  1487. return 0;
  1488. pr_debug("omap_hwmod: %s: %s\n", oh->name, __func__);
  1489. omap_cm_module_disable(oh->clkdm->prcm_partition, oh->clkdm->cm_inst,
  1490. oh->prcm.omap4.clkctrl_offs);
  1491. v = _omap4_wait_target_disable(oh);
  1492. if (v)
  1493. pr_warn("omap_hwmod: %s: _wait_target_disable failed\n",
  1494. oh->name);
  1495. return 0;
  1496. }
  1497. /**
  1498. * _ocp_softreset - reset an omap_hwmod via the OCP_SYSCONFIG bit
  1499. * @oh: struct omap_hwmod *
  1500. *
  1501. * Resets an omap_hwmod @oh via the OCP_SYSCONFIG bit. hwmod must be
  1502. * enabled for this to work. Returns -ENOENT if the hwmod cannot be
  1503. * reset this way, -EINVAL if the hwmod is in the wrong state,
  1504. * -ETIMEDOUT if the module did not reset in time, or 0 upon success.
  1505. *
  1506. * In OMAP3 a specific SYSSTATUS register is used to get the reset status.
  1507. * Starting in OMAP4, some IPs do not have SYSSTATUS registers and instead
  1508. * use the SYSCONFIG softreset bit to provide the status.
  1509. *
  1510. * Note that some IP like McBSP do have reset control but don't have
  1511. * reset status.
  1512. */
  1513. static int _ocp_softreset(struct omap_hwmod *oh)
  1514. {
  1515. u32 v;
  1516. int c = 0;
  1517. int ret = 0;
  1518. if (!oh->class->sysc ||
  1519. !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
  1520. return -ENOENT;
  1521. /* clocks must be on for this operation */
  1522. if (oh->_state != _HWMOD_STATE_ENABLED) {
  1523. pr_warn("omap_hwmod: %s: reset can only be entered from enabled state\n",
  1524. oh->name);
  1525. return -EINVAL;
  1526. }
  1527. /* For some modules, all optionnal clocks need to be enabled as well */
  1528. if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
  1529. _enable_optional_clocks(oh);
  1530. pr_debug("omap_hwmod: %s: resetting via OCP SOFTRESET\n", oh->name);
  1531. v = oh->_sysc_cache;
  1532. ret = _set_softreset(oh, &v);
  1533. if (ret)
  1534. goto dis_opt_clks;
  1535. _write_sysconfig(v, oh);
  1536. if (oh->class->sysc->srst_udelay)
  1537. udelay(oh->class->sysc->srst_udelay);
  1538. c = _wait_softreset_complete(oh);
  1539. if (c == MAX_MODULE_SOFTRESET_WAIT) {
  1540. pr_warn("omap_hwmod: %s: softreset failed (waited %d usec)\n",
  1541. oh->name, MAX_MODULE_SOFTRESET_WAIT);
  1542. ret = -ETIMEDOUT;
  1543. goto dis_opt_clks;
  1544. } else {
  1545. pr_debug("omap_hwmod: %s: softreset in %d usec\n", oh->name, c);
  1546. }
  1547. ret = _clear_softreset(oh, &v);
  1548. if (ret)
  1549. goto dis_opt_clks;
  1550. _write_sysconfig(v, oh);
  1551. /*
  1552. * XXX add _HWMOD_STATE_WEDGED for modules that don't come back from
  1553. * _wait_target_ready() or _reset()
  1554. */
  1555. dis_opt_clks:
  1556. if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
  1557. _disable_optional_clocks(oh);
  1558. return ret;
  1559. }
  1560. /**
  1561. * _reset - reset an omap_hwmod
  1562. * @oh: struct omap_hwmod *
  1563. *
  1564. * Resets an omap_hwmod @oh. If the module has a custom reset
  1565. * function pointer defined, then call it to reset the IP block, and
  1566. * pass along its return value to the caller. Otherwise, if the IP
  1567. * block has an OCP_SYSCONFIG register with a SOFTRESET bitfield
  1568. * associated with it, call a function to reset the IP block via that
  1569. * method, and pass along the return value to the caller. Finally, if
  1570. * the IP block has some hardreset lines associated with it, assert
  1571. * all of those, but do _not_ deassert them. (This is because driver
  1572. * authors have expressed an apparent requirement to control the
  1573. * deassertion of the hardreset lines themselves.)
  1574. *
  1575. * The default software reset mechanism for most OMAP IP blocks is
  1576. * triggered via the OCP_SYSCONFIG.SOFTRESET bit. However, some
  1577. * hwmods cannot be reset via this method. Some are not targets and
  1578. * therefore have no OCP header registers to access. Others (like the
  1579. * IVA) have idiosyncratic reset sequences. So for these relatively
  1580. * rare cases, custom reset code can be supplied in the struct
  1581. * omap_hwmod_class .reset function pointer.
  1582. *
  1583. * _set_dmadisable() is called to set the DMADISABLE bit so that it
  1584. * does not prevent idling of the system. This is necessary for cases
  1585. * where ROMCODE/BOOTLOADER uses dma and transfers control to the
  1586. * kernel without disabling dma.
  1587. *
  1588. * Passes along the return value from either _ocp_softreset() or the
  1589. * custom reset function - these must return -EINVAL if the hwmod
  1590. * cannot be reset this way or if the hwmod is in the wrong state,
  1591. * -ETIMEDOUT if the module did not reset in time, or 0 upon success.
  1592. */
  1593. static int _reset(struct omap_hwmod *oh)
  1594. {
  1595. int i, r;
  1596. pr_debug("omap_hwmod: %s: resetting\n", oh->name);
  1597. if (oh->class->reset) {
  1598. r = oh->class->reset(oh);
  1599. } else {
  1600. if (oh->rst_lines_cnt > 0) {
  1601. for (i = 0; i < oh->rst_lines_cnt; i++)
  1602. _assert_hardreset(oh, oh->rst_lines[i].name);
  1603. return 0;
  1604. } else {
  1605. r = _ocp_softreset(oh);
  1606. if (r == -ENOENT)
  1607. r = 0;
  1608. }
  1609. }
  1610. _set_dmadisable(oh);
  1611. /*
  1612. * OCP_SYSCONFIG bits need to be reprogrammed after a
  1613. * softreset. The _enable() function should be split to avoid
  1614. * the rewrite of the OCP_SYSCONFIG register.
  1615. */
  1616. if (oh->class->sysc) {
  1617. _update_sysc_cache(oh);
  1618. _enable_sysc(oh);
  1619. }
  1620. return r;
  1621. }
  1622. /**
  1623. * _omap4_update_context_lost - increment hwmod context loss counter if
  1624. * hwmod context was lost, and clear hardware context loss reg
  1625. * @oh: hwmod to check for context loss
  1626. *
  1627. * If the PRCM indicates that the hwmod @oh lost context, increment
  1628. * our in-memory context loss counter, and clear the RM_*_CONTEXT
  1629. * bits. No return value.
  1630. */
  1631. static void _omap4_update_context_lost(struct omap_hwmod *oh)
  1632. {
  1633. if (oh->prcm.omap4.flags & HWMOD_OMAP4_NO_CONTEXT_LOSS_BIT)
  1634. return;
  1635. if (!prm_was_any_context_lost_old(oh->clkdm->pwrdm.ptr->prcm_partition,
  1636. oh->clkdm->pwrdm.ptr->prcm_offs,
  1637. oh->prcm.omap4.context_offs))
  1638. return;
  1639. oh->prcm.omap4.context_lost_counter++;
  1640. prm_clear_context_loss_flags_old(oh->clkdm->pwrdm.ptr->prcm_partition,
  1641. oh->clkdm->pwrdm.ptr->prcm_offs,
  1642. oh->prcm.omap4.context_offs);
  1643. }
  1644. /**
  1645. * _omap4_get_context_lost - get context loss counter for a hwmod
  1646. * @oh: hwmod to get context loss counter for
  1647. *
  1648. * Returns the in-memory context loss counter for a hwmod.
  1649. */
  1650. static int _omap4_get_context_lost(struct omap_hwmod *oh)
  1651. {
  1652. return oh->prcm.omap4.context_lost_counter;
  1653. }
  1654. /**
  1655. * _enable_preprogram - Pre-program an IP block during the _enable() process
  1656. * @oh: struct omap_hwmod *
  1657. *
  1658. * Some IP blocks (such as AESS) require some additional programming
  1659. * after enable before they can enter idle. If a function pointer to
  1660. * do so is present in the hwmod data, then call it and pass along the
  1661. * return value; otherwise, return 0.
  1662. */
  1663. static int _enable_preprogram(struct omap_hwmod *oh)
  1664. {
  1665. if (!oh->class->enable_preprogram)
  1666. return 0;
  1667. return oh->class->enable_preprogram(oh);
  1668. }
  1669. /**
  1670. * _enable - enable an omap_hwmod
  1671. * @oh: struct omap_hwmod *
  1672. *
  1673. * Enables an omap_hwmod @oh such that the MPU can access the hwmod's
  1674. * register target. Returns -EINVAL if the hwmod is in the wrong
  1675. * state or passes along the return value of _wait_target_ready().
  1676. */
  1677. static int _enable(struct omap_hwmod *oh)
  1678. {
  1679. int r;
  1680. pr_debug("omap_hwmod: %s: enabling\n", oh->name);
  1681. /*
  1682. * hwmods with HWMOD_INIT_NO_IDLE flag set are left in enabled
  1683. * state at init.
  1684. */
  1685. if (oh->_int_flags & _HWMOD_SKIP_ENABLE) {
  1686. oh->_int_flags &= ~_HWMOD_SKIP_ENABLE;
  1687. return 0;
  1688. }
  1689. if (oh->_state != _HWMOD_STATE_INITIALIZED &&
  1690. oh->_state != _HWMOD_STATE_IDLE &&
  1691. oh->_state != _HWMOD_STATE_DISABLED) {
  1692. WARN(1, "omap_hwmod: %s: enabled state can only be entered from initialized, idle, or disabled state\n",
  1693. oh->name);
  1694. return -EINVAL;
  1695. }
  1696. /*
  1697. * If an IP block contains HW reset lines and all of them are
  1698. * asserted, we let integration code associated with that
  1699. * block handle the enable. We've received very little
  1700. * information on what those driver authors need, and until
  1701. * detailed information is provided and the driver code is
  1702. * posted to the public lists, this is probably the best we
  1703. * can do.
  1704. */
  1705. if (_are_all_hardreset_lines_asserted(oh))
  1706. return 0;
  1707. _add_initiator_dep(oh, mpu_oh);
  1708. if (oh->clkdm) {
  1709. /*
  1710. * A clockdomain must be in SW_SUP before enabling
  1711. * completely the module. The clockdomain can be set
  1712. * in HW_AUTO only when the module become ready.
  1713. */
  1714. clkdm_deny_idle(oh->clkdm);
  1715. r = clkdm_hwmod_enable(oh->clkdm, oh);
  1716. if (r) {
  1717. WARN(1, "omap_hwmod: %s: could not enable clockdomain %s: %d\n",
  1718. oh->name, oh->clkdm->name, r);
  1719. return r;
  1720. }
  1721. }
  1722. _enable_clocks(oh);
  1723. if (soc_ops.enable_module)
  1724. soc_ops.enable_module(oh);
  1725. if (oh->flags & HWMOD_BLOCK_WFI)
  1726. cpu_idle_poll_ctrl(true);
  1727. if (soc_ops.update_context_lost)
  1728. soc_ops.update_context_lost(oh);
  1729. r = (soc_ops.wait_target_ready) ? soc_ops.wait_target_ready(oh) :
  1730. -EINVAL;
  1731. if (oh->clkdm)
  1732. clkdm_allow_idle(oh->clkdm);
  1733. if (!r) {
  1734. oh->_state = _HWMOD_STATE_ENABLED;
  1735. /* Access the sysconfig only if the target is ready */
  1736. if (oh->class->sysc) {
  1737. if (!(oh->_int_flags & _HWMOD_SYSCONFIG_LOADED))
  1738. _update_sysc_cache(oh);
  1739. _enable_sysc(oh);
  1740. }
  1741. r = _enable_preprogram(oh);
  1742. } else {
  1743. if (soc_ops.disable_module)
  1744. soc_ops.disable_module(oh);
  1745. _disable_clocks(oh);
  1746. pr_err("omap_hwmod: %s: _wait_target_ready failed: %d\n",
  1747. oh->name, r);
  1748. if (oh->clkdm)
  1749. clkdm_hwmod_disable(oh->clkdm, oh);
  1750. }
  1751. return r;
  1752. }
  1753. /**
  1754. * _idle - idle an omap_hwmod
  1755. * @oh: struct omap_hwmod *
  1756. *
  1757. * Idles an omap_hwmod @oh. This should be called once the hwmod has
  1758. * no further work. Returns -EINVAL if the hwmod is in the wrong
  1759. * state or returns 0.
  1760. */
  1761. static int _idle(struct omap_hwmod *oh)
  1762. {
  1763. if (oh->flags & HWMOD_NO_IDLE) {
  1764. oh->_int_flags |= _HWMOD_SKIP_ENABLE;
  1765. return 0;
  1766. }
  1767. pr_debug("omap_hwmod: %s: idling\n", oh->name);
  1768. if (_are_all_hardreset_lines_asserted(oh))
  1769. return 0;
  1770. if (oh->_state != _HWMOD_STATE_ENABLED) {
  1771. WARN(1, "omap_hwmod: %s: idle state can only be entered from enabled state\n",
  1772. oh->name);
  1773. return -EINVAL;
  1774. }
  1775. if (oh->class->sysc)
  1776. _idle_sysc(oh);
  1777. _del_initiator_dep(oh, mpu_oh);
  1778. if (oh->clkdm)
  1779. clkdm_deny_idle(oh->clkdm);
  1780. if (oh->flags & HWMOD_BLOCK_WFI)
  1781. cpu_idle_poll_ctrl(false);
  1782. if (soc_ops.disable_module)
  1783. soc_ops.disable_module(oh);
  1784. /*
  1785. * The module must be in idle mode before disabling any parents
  1786. * clocks. Otherwise, the parent clock might be disabled before
  1787. * the module transition is done, and thus will prevent the
  1788. * transition to complete properly.
  1789. */
  1790. _disable_clocks(oh);
  1791. if (oh->clkdm) {
  1792. clkdm_allow_idle(oh->clkdm);
  1793. clkdm_hwmod_disable(oh->clkdm, oh);
  1794. }
  1795. oh->_state = _HWMOD_STATE_IDLE;
  1796. return 0;
  1797. }
  1798. /**
  1799. * _shutdown - shutdown an omap_hwmod
  1800. * @oh: struct omap_hwmod *
  1801. *
  1802. * Shut down an omap_hwmod @oh. This should be called when the driver
  1803. * used for the hwmod is removed or unloaded or if the driver is not
  1804. * used by the system. Returns -EINVAL if the hwmod is in the wrong
  1805. * state or returns 0.
  1806. */
  1807. static int _shutdown(struct omap_hwmod *oh)
  1808. {
  1809. int ret, i;
  1810. u8 prev_state;
  1811. if (_are_all_hardreset_lines_asserted(oh))
  1812. return 0;
  1813. if (oh->_state != _HWMOD_STATE_IDLE &&
  1814. oh->_state != _HWMOD_STATE_ENABLED) {
  1815. WARN(1, "omap_hwmod: %s: disabled state can only be entered from idle, or enabled state\n",
  1816. oh->name);
  1817. return -EINVAL;
  1818. }
  1819. pr_debug("omap_hwmod: %s: disabling\n", oh->name);
  1820. if (oh->class->pre_shutdown) {
  1821. prev_state = oh->_state;
  1822. if (oh->_state == _HWMOD_STATE_IDLE)
  1823. _enable(oh);
  1824. ret = oh->class->pre_shutdown(oh);
  1825. if (ret) {
  1826. if (prev_state == _HWMOD_STATE_IDLE)
  1827. _idle(oh);
  1828. return ret;
  1829. }
  1830. }
  1831. if (oh->class->sysc) {
  1832. if (oh->_state == _HWMOD_STATE_IDLE)
  1833. _enable(oh);
  1834. _shutdown_sysc(oh);
  1835. }
  1836. /* clocks and deps are already disabled in idle */
  1837. if (oh->_state == _HWMOD_STATE_ENABLED) {
  1838. _del_initiator_dep(oh, mpu_oh);
  1839. /* XXX what about the other system initiators here? dma, dsp */
  1840. if (oh->flags & HWMOD_BLOCK_WFI)
  1841. cpu_idle_poll_ctrl(false);
  1842. if (soc_ops.disable_module)
  1843. soc_ops.disable_module(oh);
  1844. _disable_clocks(oh);
  1845. if (oh->clkdm)
  1846. clkdm_hwmod_disable(oh->clkdm, oh);
  1847. }
  1848. /* XXX Should this code also force-disable the optional clocks? */
  1849. for (i = 0; i < oh->rst_lines_cnt; i++)
  1850. _assert_hardreset(oh, oh->rst_lines[i].name);
  1851. oh->_state = _HWMOD_STATE_DISABLED;
  1852. return 0;
  1853. }
  1854. static int of_dev_find_hwmod(struct device_node *np,
  1855. struct omap_hwmod *oh)
  1856. {
  1857. int count, i, res;
  1858. const char *p;
  1859. count = of_property_count_strings(np, "ti,hwmods");
  1860. if (count < 1)
  1861. return -ENODEV;
  1862. for (i = 0; i < count; i++) {
  1863. res = of_property_read_string_index(np, "ti,hwmods",
  1864. i, &p);
  1865. if (res)
  1866. continue;
  1867. if (!strcmp(p, oh->name)) {
  1868. pr_debug("omap_hwmod: dt %s[%i] uses hwmod %s\n",
  1869. np->name, i, oh->name);
  1870. return i;
  1871. }
  1872. }
  1873. return -ENODEV;
  1874. }
  1875. /**
  1876. * of_dev_hwmod_lookup - look up needed hwmod from dt blob
  1877. * @np: struct device_node *
  1878. * @oh: struct omap_hwmod *
  1879. * @index: index of the entry found
  1880. * @found: struct device_node * found or NULL
  1881. *
  1882. * Parse the dt blob and find out needed hwmod. Recursive function is
  1883. * implemented to take care hierarchical dt blob parsing.
  1884. * Return: Returns 0 on success, -ENODEV when not found.
  1885. */
  1886. static int of_dev_hwmod_lookup(struct device_node *np,
  1887. struct omap_hwmod *oh,
  1888. int *index,
  1889. struct device_node **found)
  1890. {
  1891. struct device_node *np0 = NULL;
  1892. int res;
  1893. res = of_dev_find_hwmod(np, oh);
  1894. if (res >= 0) {
  1895. *found = np;
  1896. *index = res;
  1897. return 0;
  1898. }
  1899. for_each_child_of_node(np, np0) {
  1900. struct device_node *fc;
  1901. int i;
  1902. res = of_dev_hwmod_lookup(np0, oh, &i, &fc);
  1903. if (res == 0) {
  1904. *found = fc;
  1905. *index = i;
  1906. return 0;
  1907. }
  1908. }
  1909. *found = NULL;
  1910. *index = 0;
  1911. return -ENODEV;
  1912. }
  1913. /**
  1914. * _init_mpu_rt_base - populate the virtual address for a hwmod
  1915. * @oh: struct omap_hwmod * to locate the virtual address
  1916. * @data: (unused, caller should pass NULL)
  1917. * @index: index of the reg entry iospace in device tree
  1918. * @np: struct device_node * of the IP block's device node in the DT data
  1919. *
  1920. * Cache the virtual address used by the MPU to access this IP block's
  1921. * registers. This address is needed early so the OCP registers that
  1922. * are part of the device's address space can be ioremapped properly.
  1923. *
  1924. * If SYSC access is not needed, the registers will not be remapped
  1925. * and non-availability of MPU access is not treated as an error.
  1926. *
  1927. * Returns 0 on success, -EINVAL if an invalid hwmod is passed, and
  1928. * -ENXIO on absent or invalid register target address space.
  1929. */
  1930. static int __init _init_mpu_rt_base(struct omap_hwmod *oh, void *data,
  1931. int index, struct device_node *np)
  1932. {
  1933. struct omap_hwmod_addr_space *mem;
  1934. void __iomem *va_start = NULL;
  1935. if (!oh)
  1936. return -EINVAL;
  1937. _save_mpu_port_index(oh);
  1938. /* if we don't need sysc access we don't need to ioremap */
  1939. if (!oh->class->sysc)
  1940. return 0;
  1941. /* we can't continue without MPU PORT if we need sysc access */
  1942. if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
  1943. return -ENXIO;
  1944. mem = _find_mpu_rt_addr_space(oh);
  1945. if (!mem) {
  1946. pr_debug("omap_hwmod: %s: no MPU register target found\n",
  1947. oh->name);
  1948. /* Extract the IO space from device tree blob */
  1949. if (!np) {
  1950. pr_err("omap_hwmod: %s: no dt node\n", oh->name);
  1951. return -ENXIO;
  1952. }
  1953. va_start = of_iomap(np, index + oh->mpu_rt_idx);
  1954. } else {
  1955. va_start = ioremap(mem->pa_start, mem->pa_end - mem->pa_start);
  1956. }
  1957. if (!va_start) {
  1958. if (mem)
  1959. pr_err("omap_hwmod: %s: Could not ioremap\n", oh->name);
  1960. else
  1961. pr_err("omap_hwmod: %s: Missing dt reg%i for %s\n",
  1962. oh->name, index, np->full_name);
  1963. return -ENXIO;
  1964. }
  1965. pr_debug("omap_hwmod: %s: MPU register target at va %p\n",
  1966. oh->name, va_start);
  1967. oh->_mpu_rt_va = va_start;
  1968. return 0;
  1969. }
  1970. /**
  1971. * _init - initialize internal data for the hwmod @oh
  1972. * @oh: struct omap_hwmod *
  1973. * @n: (unused)
  1974. *
  1975. * Look up the clocks and the address space used by the MPU to access
  1976. * registers belonging to the hwmod @oh. @oh must already be
  1977. * registered at this point. This is the first of two phases for
  1978. * hwmod initialization. Code called here does not touch any hardware
  1979. * registers, it simply prepares internal data structures. Returns 0
  1980. * upon success or if the hwmod isn't registered or if the hwmod's
  1981. * address space is not defined, or -EINVAL upon failure.
  1982. */
  1983. static int __init _init(struct omap_hwmod *oh, void *data)
  1984. {
  1985. int r, index;
  1986. struct device_node *np = NULL;
  1987. if (oh->_state != _HWMOD_STATE_REGISTERED)
  1988. return 0;
  1989. if (of_have_populated_dt()) {
  1990. struct device_node *bus;
  1991. bus = of_find_node_by_name(NULL, "ocp");
  1992. if (!bus)
  1993. return -ENODEV;
  1994. r = of_dev_hwmod_lookup(bus, oh, &index, &np);
  1995. if (r)
  1996. pr_debug("omap_hwmod: %s missing dt data\n", oh->name);
  1997. else if (np && index)
  1998. pr_warn("omap_hwmod: %s using broken dt data from %s\n",
  1999. oh->name, np->name);
  2000. }
  2001. r = _init_mpu_rt_base(oh, NULL, index, np);
  2002. if (r < 0) {
  2003. WARN(1, "omap_hwmod: %s: doesn't have mpu register target base\n",
  2004. oh->name);
  2005. return 0;
  2006. }
  2007. r = _init_clocks(oh, NULL);
  2008. if (r < 0) {
  2009. WARN(1, "omap_hwmod: %s: couldn't init clocks\n", oh->name);
  2010. return -EINVAL;
  2011. }
  2012. if (np) {
  2013. if (of_find_property(np, "ti,no-reset-on-init", NULL))
  2014. oh->flags |= HWMOD_INIT_NO_RESET;
  2015. if (of_find_property(np, "ti,no-idle-on-init", NULL))
  2016. oh->flags |= HWMOD_INIT_NO_IDLE;
  2017. if (of_find_property(np, "ti,no-idle", NULL))
  2018. oh->flags |= HWMOD_NO_IDLE;
  2019. }
  2020. oh->_state = _HWMOD_STATE_INITIALIZED;
  2021. return 0;
  2022. }
  2023. /**
  2024. * _setup_iclk_autoidle - configure an IP block's interface clocks
  2025. * @oh: struct omap_hwmod *
  2026. *
  2027. * Set up the module's interface clocks. XXX This function is still mostly
  2028. * a stub; implementing this properly requires iclk autoidle usecounting in
  2029. * the clock code. No return value.
  2030. */
  2031. static void __init _setup_iclk_autoidle(struct omap_hwmod *oh)
  2032. {
  2033. struct omap_hwmod_ocp_if *os;
  2034. if (oh->_state != _HWMOD_STATE_INITIALIZED)
  2035. return;
  2036. list_for_each_entry(os, &oh->slave_ports, node) {
  2037. if (!os->_clk)
  2038. continue;
  2039. if (os->flags & OCPIF_SWSUP_IDLE) {
  2040. /* XXX omap_iclk_deny_idle(c); */
  2041. } else {
  2042. /* XXX omap_iclk_allow_idle(c); */
  2043. clk_enable(os->_clk);
  2044. }
  2045. }
  2046. return;
  2047. }
  2048. /**
  2049. * _setup_reset - reset an IP block during the setup process
  2050. * @oh: struct omap_hwmod *
  2051. *
  2052. * Reset the IP block corresponding to the hwmod @oh during the setup
  2053. * process. The IP block is first enabled so it can be successfully
  2054. * reset. Returns 0 upon success or a negative error code upon
  2055. * failure.
  2056. */
  2057. static int __init _setup_reset(struct omap_hwmod *oh)
  2058. {
  2059. int r;
  2060. if (oh->_state != _HWMOD_STATE_INITIALIZED)
  2061. return -EINVAL;
  2062. if (oh->flags & HWMOD_EXT_OPT_MAIN_CLK)
  2063. return -EPERM;
  2064. if (oh->rst_lines_cnt == 0) {
  2065. r = _enable(oh);
  2066. if (r) {
  2067. pr_warn("omap_hwmod: %s: cannot be enabled for reset (%d)\n",
  2068. oh->name, oh->_state);
  2069. return -EINVAL;
  2070. }
  2071. }
  2072. if (!(oh->flags & HWMOD_INIT_NO_RESET))
  2073. r = _reset(oh);
  2074. return r;
  2075. }
  2076. /**
  2077. * _setup_postsetup - transition to the appropriate state after _setup
  2078. * @oh: struct omap_hwmod *
  2079. *
  2080. * Place an IP block represented by @oh into a "post-setup" state --
  2081. * either IDLE, ENABLED, or DISABLED. ("post-setup" simply means that
  2082. * this function is called at the end of _setup().) The postsetup
  2083. * state for an IP block can be changed by calling
  2084. * omap_hwmod_enter_postsetup_state() early in the boot process,
  2085. * before one of the omap_hwmod_setup*() functions are called for the
  2086. * IP block.
  2087. *
  2088. * The IP block stays in this state until a PM runtime-based driver is
  2089. * loaded for that IP block. A post-setup state of IDLE is
  2090. * appropriate for almost all IP blocks with runtime PM-enabled
  2091. * drivers, since those drivers are able to enable the IP block. A
  2092. * post-setup state of ENABLED is appropriate for kernels with PM
  2093. * runtime disabled. The DISABLED state is appropriate for unusual IP
  2094. * blocks such as the MPU WDTIMER on kernels without WDTIMER drivers
  2095. * included, since the WDTIMER starts running on reset and will reset
  2096. * the MPU if left active.
  2097. *
  2098. * This post-setup mechanism is deprecated. Once all of the OMAP
  2099. * drivers have been converted to use PM runtime, and all of the IP
  2100. * block data and interconnect data is available to the hwmod code, it
  2101. * should be possible to replace this mechanism with a "lazy reset"
  2102. * arrangement. In a "lazy reset" setup, each IP block is enabled
  2103. * when the driver first probes, then all remaining IP blocks without
  2104. * drivers are either shut down or enabled after the drivers have
  2105. * loaded. However, this cannot take place until the above
  2106. * preconditions have been met, since otherwise the late reset code
  2107. * has no way of knowing which IP blocks are in use by drivers, and
  2108. * which ones are unused.
  2109. *
  2110. * No return value.
  2111. */
  2112. static void __init _setup_postsetup(struct omap_hwmod *oh)
  2113. {
  2114. u8 postsetup_state;
  2115. if (oh->rst_lines_cnt > 0)
  2116. return;
  2117. postsetup_state = oh->_postsetup_state;
  2118. if (postsetup_state == _HWMOD_STATE_UNKNOWN)
  2119. postsetup_state = _HWMOD_STATE_ENABLED;
  2120. /*
  2121. * XXX HWMOD_INIT_NO_IDLE does not belong in hwmod data -
  2122. * it should be set by the core code as a runtime flag during startup
  2123. */
  2124. if ((oh->flags & (HWMOD_INIT_NO_IDLE | HWMOD_NO_IDLE)) &&
  2125. (postsetup_state == _HWMOD_STATE_IDLE)) {
  2126. oh->_int_flags |= _HWMOD_SKIP_ENABLE;
  2127. postsetup_state = _HWMOD_STATE_ENABLED;
  2128. }
  2129. if (postsetup_state == _HWMOD_STATE_IDLE)
  2130. _idle(oh);
  2131. else if (postsetup_state == _HWMOD_STATE_DISABLED)
  2132. _shutdown(oh);
  2133. else if (postsetup_state != _HWMOD_STATE_ENABLED)
  2134. WARN(1, "hwmod: %s: unknown postsetup state %d! defaulting to enabled\n",
  2135. oh->name, postsetup_state);
  2136. return;
  2137. }
  2138. /**
  2139. * _setup - prepare IP block hardware for use
  2140. * @oh: struct omap_hwmod *
  2141. * @n: (unused, pass NULL)
  2142. *
  2143. * Configure the IP block represented by @oh. This may include
  2144. * enabling the IP block, resetting it, and placing it into a
  2145. * post-setup state, depending on the type of IP block and applicable
  2146. * flags. IP blocks are reset to prevent any previous configuration
  2147. * by the bootloader or previous operating system from interfering
  2148. * with power management or other parts of the system. The reset can
  2149. * be avoided; see omap_hwmod_no_setup_reset(). This is the second of
  2150. * two phases for hwmod initialization. Code called here generally
  2151. * affects the IP block hardware, or system integration hardware
  2152. * associated with the IP block. Returns 0.
  2153. */
  2154. static int __init _setup(struct omap_hwmod *oh, void *data)
  2155. {
  2156. if (oh->_state != _HWMOD_STATE_INITIALIZED)
  2157. return 0;
  2158. if (oh->parent_hwmod) {
  2159. int r;
  2160. r = _enable(oh->parent_hwmod);
  2161. WARN(r, "hwmod: %s: setup: failed to enable parent hwmod %s\n",
  2162. oh->name, oh->parent_hwmod->name);
  2163. }
  2164. _setup_iclk_autoidle(oh);
  2165. if (!_setup_reset(oh))
  2166. _setup_postsetup(oh);
  2167. if (oh->parent_hwmod) {
  2168. u8 postsetup_state;
  2169. postsetup_state = oh->parent_hwmod->_postsetup_state;
  2170. if (postsetup_state == _HWMOD_STATE_IDLE)
  2171. _idle(oh->parent_hwmod);
  2172. else if (postsetup_state == _HWMOD_STATE_DISABLED)
  2173. _shutdown(oh->parent_hwmod);
  2174. else if (postsetup_state != _HWMOD_STATE_ENABLED)
  2175. WARN(1, "hwmod: %s: unknown postsetup state %d! defaulting to enabled\n",
  2176. oh->parent_hwmod->name, postsetup_state);
  2177. }
  2178. return 0;
  2179. }
  2180. /**
  2181. * _register - register a struct omap_hwmod
  2182. * @oh: struct omap_hwmod *
  2183. *
  2184. * Registers the omap_hwmod @oh. Returns -EEXIST if an omap_hwmod
  2185. * already has been registered by the same name; -EINVAL if the
  2186. * omap_hwmod is in the wrong state, if @oh is NULL, if the
  2187. * omap_hwmod's class field is NULL; if the omap_hwmod is missing a
  2188. * name, or if the omap_hwmod's class is missing a name; or 0 upon
  2189. * success.
  2190. *
  2191. * XXX The data should be copied into bootmem, so the original data
  2192. * should be marked __initdata and freed after init. This would allow
  2193. * unneeded omap_hwmods to be freed on multi-OMAP configurations. Note
  2194. * that the copy process would be relatively complex due to the large number
  2195. * of substructures.
  2196. */
  2197. static int __init _register(struct omap_hwmod *oh)
  2198. {
  2199. if (!oh || !oh->name || !oh->class || !oh->class->name ||
  2200. (oh->_state != _HWMOD_STATE_UNKNOWN))
  2201. return -EINVAL;
  2202. pr_debug("omap_hwmod: %s: registering\n", oh->name);
  2203. if (_lookup(oh->name))
  2204. return -EEXIST;
  2205. list_add_tail(&oh->node, &omap_hwmod_list);
  2206. INIT_LIST_HEAD(&oh->slave_ports);
  2207. spin_lock_init(&oh->_lock);
  2208. lockdep_set_class(&oh->_lock, &oh->hwmod_key);
  2209. oh->_state = _HWMOD_STATE_REGISTERED;
  2210. /*
  2211. * XXX Rather than doing a strcmp(), this should test a flag
  2212. * set in the hwmod data, inserted by the autogenerator code.
  2213. */
  2214. if (!strcmp(oh->name, MPU_INITIATOR_NAME))
  2215. mpu_oh = oh;
  2216. return 0;
  2217. }
  2218. /**
  2219. * _add_link - add an interconnect between two IP blocks
  2220. * @oi: pointer to a struct omap_hwmod_ocp_if record
  2221. *
  2222. * Add struct omap_hwmod_link records connecting the slave IP block
  2223. * specified in @oi->slave to @oi. This code is assumed to run before
  2224. * preemption or SMP has been enabled, thus avoiding the need for
  2225. * locking in this code. Changes to this assumption will require
  2226. * additional locking. Returns 0.
  2227. */
  2228. static int __init _add_link(struct omap_hwmod_ocp_if *oi)
  2229. {
  2230. pr_debug("omap_hwmod: %s -> %s: adding link\n", oi->master->name,
  2231. oi->slave->name);
  2232. list_add(&oi->node, &oi->slave->slave_ports);
  2233. oi->slave->slaves_cnt++;
  2234. return 0;
  2235. }
  2236. /**
  2237. * _register_link - register a struct omap_hwmod_ocp_if
  2238. * @oi: struct omap_hwmod_ocp_if *
  2239. *
  2240. * Registers the omap_hwmod_ocp_if record @oi. Returns -EEXIST if it
  2241. * has already been registered; -EINVAL if @oi is NULL or if the
  2242. * record pointed to by @oi is missing required fields; or 0 upon
  2243. * success.
  2244. *
  2245. * XXX The data should be copied into bootmem, so the original data
  2246. * should be marked __initdata and freed after init. This would allow
  2247. * unneeded omap_hwmods to be freed on multi-OMAP configurations.
  2248. */
  2249. static int __init _register_link(struct omap_hwmod_ocp_if *oi)
  2250. {
  2251. if (!oi || !oi->master || !oi->slave || !oi->user)
  2252. return -EINVAL;
  2253. if (oi->_int_flags & _OCPIF_INT_FLAGS_REGISTERED)
  2254. return -EEXIST;
  2255. pr_debug("omap_hwmod: registering link from %s to %s\n",
  2256. oi->master->name, oi->slave->name);
  2257. /*
  2258. * Register the connected hwmods, if they haven't been
  2259. * registered already
  2260. */
  2261. if (oi->master->_state != _HWMOD_STATE_REGISTERED)
  2262. _register(oi->master);
  2263. if (oi->slave->_state != _HWMOD_STATE_REGISTERED)
  2264. _register(oi->slave);
  2265. _add_link(oi);
  2266. oi->_int_flags |= _OCPIF_INT_FLAGS_REGISTERED;
  2267. return 0;
  2268. }
  2269. /* Static functions intended only for use in soc_ops field function pointers */
  2270. /**
  2271. * _omap2xxx_3xxx_wait_target_ready - wait for a module to leave slave idle
  2272. * @oh: struct omap_hwmod *
  2273. *
  2274. * Wait for a module @oh to leave slave idle. Returns 0 if the module
  2275. * does not have an IDLEST bit or if the module successfully leaves
  2276. * slave idle; otherwise, pass along the return value of the
  2277. * appropriate *_cm*_wait_module_ready() function.
  2278. */
  2279. static int _omap2xxx_3xxx_wait_target_ready(struct omap_hwmod *oh)
  2280. {
  2281. if (!oh)
  2282. return -EINVAL;
  2283. if (oh->flags & HWMOD_NO_IDLEST)
  2284. return 0;
  2285. if (!_find_mpu_rt_port(oh))
  2286. return 0;
  2287. /* XXX check module SIDLEMODE, hardreset status, enabled clocks */
  2288. return omap_cm_wait_module_ready(0, oh->prcm.omap2.module_offs,
  2289. oh->prcm.omap2.idlest_reg_id,
  2290. oh->prcm.omap2.idlest_idle_bit);
  2291. }
  2292. /**
  2293. * _omap4_wait_target_ready - wait for a module to leave slave idle
  2294. * @oh: struct omap_hwmod *
  2295. *
  2296. * Wait for a module @oh to leave slave idle. Returns 0 if the module
  2297. * does not have an IDLEST bit or if the module successfully leaves
  2298. * slave idle; otherwise, pass along the return value of the
  2299. * appropriate *_cm*_wait_module_ready() function.
  2300. */
  2301. static int _omap4_wait_target_ready(struct omap_hwmod *oh)
  2302. {
  2303. if (!oh)
  2304. return -EINVAL;
  2305. if (oh->flags & HWMOD_NO_IDLEST || !oh->clkdm)
  2306. return 0;
  2307. if (!_find_mpu_rt_port(oh))
  2308. return 0;
  2309. if (!oh->prcm.omap4.clkctrl_offs &&
  2310. !(oh->prcm.omap4.flags & HWMOD_OMAP4_ZERO_CLKCTRL_OFFSET))
  2311. return 0;
  2312. /* XXX check module SIDLEMODE, hardreset status */
  2313. return omap_cm_wait_module_ready(oh->clkdm->prcm_partition,
  2314. oh->clkdm->cm_inst,
  2315. oh->prcm.omap4.clkctrl_offs, 0);
  2316. }
  2317. /**
  2318. * _omap2_assert_hardreset - call OMAP2 PRM hardreset fn with hwmod args
  2319. * @oh: struct omap_hwmod * to assert hardreset
  2320. * @ohri: hardreset line data
  2321. *
  2322. * Call omap2_prm_assert_hardreset() with parameters extracted from
  2323. * the hwmod @oh and the hardreset line data @ohri. Only intended for
  2324. * use as an soc_ops function pointer. Passes along the return value
  2325. * from omap2_prm_assert_hardreset(). XXX This function is scheduled
  2326. * for removal when the PRM code is moved into drivers/.
  2327. */
  2328. static int _omap2_assert_hardreset(struct omap_hwmod *oh,
  2329. struct omap_hwmod_rst_info *ohri)
  2330. {
  2331. return omap_prm_assert_hardreset(ohri->rst_shift, 0,
  2332. oh->prcm.omap2.module_offs, 0);
  2333. }
  2334. /**
  2335. * _omap2_deassert_hardreset - call OMAP2 PRM hardreset fn with hwmod args
  2336. * @oh: struct omap_hwmod * to deassert hardreset
  2337. * @ohri: hardreset line data
  2338. *
  2339. * Call omap2_prm_deassert_hardreset() with parameters extracted from
  2340. * the hwmod @oh and the hardreset line data @ohri. Only intended for
  2341. * use as an soc_ops function pointer. Passes along the return value
  2342. * from omap2_prm_deassert_hardreset(). XXX This function is
  2343. * scheduled for removal when the PRM code is moved into drivers/.
  2344. */
  2345. static int _omap2_deassert_hardreset(struct omap_hwmod *oh,
  2346. struct omap_hwmod_rst_info *ohri)
  2347. {
  2348. return omap_prm_deassert_hardreset(ohri->rst_shift, ohri->st_shift, 0,
  2349. oh->prcm.omap2.module_offs, 0, 0);
  2350. }
  2351. /**
  2352. * _omap2_is_hardreset_asserted - call OMAP2 PRM hardreset fn with hwmod args
  2353. * @oh: struct omap_hwmod * to test hardreset
  2354. * @ohri: hardreset line data
  2355. *
  2356. * Call omap2_prm_is_hardreset_asserted() with parameters extracted
  2357. * from the hwmod @oh and the hardreset line data @ohri. Only
  2358. * intended for use as an soc_ops function pointer. Passes along the
  2359. * return value from omap2_prm_is_hardreset_asserted(). XXX This
  2360. * function is scheduled for removal when the PRM code is moved into
  2361. * drivers/.
  2362. */
  2363. static int _omap2_is_hardreset_asserted(struct omap_hwmod *oh,
  2364. struct omap_hwmod_rst_info *ohri)
  2365. {
  2366. return omap_prm_is_hardreset_asserted(ohri->st_shift, 0,
  2367. oh->prcm.omap2.module_offs, 0);
  2368. }
  2369. /**
  2370. * _omap4_assert_hardreset - call OMAP4 PRM hardreset fn with hwmod args
  2371. * @oh: struct omap_hwmod * to assert hardreset
  2372. * @ohri: hardreset line data
  2373. *
  2374. * Call omap4_prminst_assert_hardreset() with parameters extracted
  2375. * from the hwmod @oh and the hardreset line data @ohri. Only
  2376. * intended for use as an soc_ops function pointer. Passes along the
  2377. * return value from omap4_prminst_assert_hardreset(). XXX This
  2378. * function is scheduled for removal when the PRM code is moved into
  2379. * drivers/.
  2380. */
  2381. static int _omap4_assert_hardreset(struct omap_hwmod *oh,
  2382. struct omap_hwmod_rst_info *ohri)
  2383. {
  2384. if (!oh->clkdm)
  2385. return -EINVAL;
  2386. return omap_prm_assert_hardreset(ohri->rst_shift,
  2387. oh->clkdm->pwrdm.ptr->prcm_partition,
  2388. oh->clkdm->pwrdm.ptr->prcm_offs,
  2389. oh->prcm.omap4.rstctrl_offs);
  2390. }
  2391. /**
  2392. * _omap4_deassert_hardreset - call OMAP4 PRM hardreset fn with hwmod args
  2393. * @oh: struct omap_hwmod * to deassert hardreset
  2394. * @ohri: hardreset line data
  2395. *
  2396. * Call omap4_prminst_deassert_hardreset() with parameters extracted
  2397. * from the hwmod @oh and the hardreset line data @ohri. Only
  2398. * intended for use as an soc_ops function pointer. Passes along the
  2399. * return value from omap4_prminst_deassert_hardreset(). XXX This
  2400. * function is scheduled for removal when the PRM code is moved into
  2401. * drivers/.
  2402. */
  2403. static int _omap4_deassert_hardreset(struct omap_hwmod *oh,
  2404. struct omap_hwmod_rst_info *ohri)
  2405. {
  2406. if (!oh->clkdm)
  2407. return -EINVAL;
  2408. if (ohri->st_shift)
  2409. pr_err("omap_hwmod: %s: %s: hwmod data error: OMAP4 does not support st_shift\n",
  2410. oh->name, ohri->name);
  2411. return omap_prm_deassert_hardreset(ohri->rst_shift, ohri->rst_shift,
  2412. oh->clkdm->pwrdm.ptr->prcm_partition,
  2413. oh->clkdm->pwrdm.ptr->prcm_offs,
  2414. oh->prcm.omap4.rstctrl_offs,
  2415. oh->prcm.omap4.rstctrl_offs +
  2416. OMAP4_RST_CTRL_ST_OFFSET);
  2417. }
  2418. /**
  2419. * _omap4_is_hardreset_asserted - call OMAP4 PRM hardreset fn with hwmod args
  2420. * @oh: struct omap_hwmod * to test hardreset
  2421. * @ohri: hardreset line data
  2422. *
  2423. * Call omap4_prminst_is_hardreset_asserted() with parameters
  2424. * extracted from the hwmod @oh and the hardreset line data @ohri.
  2425. * Only intended for use as an soc_ops function pointer. Passes along
  2426. * the return value from omap4_prminst_is_hardreset_asserted(). XXX
  2427. * This function is scheduled for removal when the PRM code is moved
  2428. * into drivers/.
  2429. */
  2430. static int _omap4_is_hardreset_asserted(struct omap_hwmod *oh,
  2431. struct omap_hwmod_rst_info *ohri)
  2432. {
  2433. if (!oh->clkdm)
  2434. return -EINVAL;
  2435. return omap_prm_is_hardreset_asserted(ohri->rst_shift,
  2436. oh->clkdm->pwrdm.ptr->
  2437. prcm_partition,
  2438. oh->clkdm->pwrdm.ptr->prcm_offs,
  2439. oh->prcm.omap4.rstctrl_offs);
  2440. }
  2441. /**
  2442. * _omap4_disable_direct_prcm - disable direct PRCM control for hwmod
  2443. * @oh: struct omap_hwmod * to disable control for
  2444. *
  2445. * Disables direct PRCM clkctrl done by hwmod core. Instead, the hwmod
  2446. * will be using its main_clk to enable/disable the module. Returns
  2447. * 0 if successful.
  2448. */
  2449. static int _omap4_disable_direct_prcm(struct omap_hwmod *oh)
  2450. {
  2451. if (!oh)
  2452. return -EINVAL;
  2453. oh->prcm.omap4.clkctrl_offs = 0;
  2454. oh->prcm.omap4.modulemode = 0;
  2455. return 0;
  2456. }
  2457. /**
  2458. * _am33xx_deassert_hardreset - call AM33XX PRM hardreset fn with hwmod args
  2459. * @oh: struct omap_hwmod * to deassert hardreset
  2460. * @ohri: hardreset line data
  2461. *
  2462. * Call am33xx_prminst_deassert_hardreset() with parameters extracted
  2463. * from the hwmod @oh and the hardreset line data @ohri. Only
  2464. * intended for use as an soc_ops function pointer. Passes along the
  2465. * return value from am33xx_prminst_deassert_hardreset(). XXX This
  2466. * function is scheduled for removal when the PRM code is moved into
  2467. * drivers/.
  2468. */
  2469. static int _am33xx_deassert_hardreset(struct omap_hwmod *oh,
  2470. struct omap_hwmod_rst_info *ohri)
  2471. {
  2472. return omap_prm_deassert_hardreset(ohri->rst_shift, ohri->st_shift,
  2473. oh->clkdm->pwrdm.ptr->prcm_partition,
  2474. oh->clkdm->pwrdm.ptr->prcm_offs,
  2475. oh->prcm.omap4.rstctrl_offs,
  2476. oh->prcm.omap4.rstst_offs);
  2477. }
  2478. /* Public functions */
  2479. u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs)
  2480. {
  2481. if (oh->flags & HWMOD_16BIT_REG)
  2482. return readw_relaxed(oh->_mpu_rt_va + reg_offs);
  2483. else
  2484. return readl_relaxed(oh->_mpu_rt_va + reg_offs);
  2485. }
  2486. void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs)
  2487. {
  2488. if (oh->flags & HWMOD_16BIT_REG)
  2489. writew_relaxed(v, oh->_mpu_rt_va + reg_offs);
  2490. else
  2491. writel_relaxed(v, oh->_mpu_rt_va + reg_offs);
  2492. }
  2493. /**
  2494. * omap_hwmod_softreset - reset a module via SYSCONFIG.SOFTRESET bit
  2495. * @oh: struct omap_hwmod *
  2496. *
  2497. * This is a public function exposed to drivers. Some drivers may need to do
  2498. * some settings before and after resetting the device. Those drivers after
  2499. * doing the necessary settings could use this function to start a reset by
  2500. * setting the SYSCONFIG.SOFTRESET bit.
  2501. */
  2502. int omap_hwmod_softreset(struct omap_hwmod *oh)
  2503. {
  2504. u32 v;
  2505. int ret;
  2506. if (!oh || !(oh->_sysc_cache))
  2507. return -EINVAL;
  2508. v = oh->_sysc_cache;
  2509. ret = _set_softreset(oh, &v);
  2510. if (ret)
  2511. goto error;
  2512. _write_sysconfig(v, oh);
  2513. ret = _clear_softreset(oh, &v);
  2514. if (ret)
  2515. goto error;
  2516. _write_sysconfig(v, oh);
  2517. error:
  2518. return ret;
  2519. }
  2520. /**
  2521. * omap_hwmod_lookup - look up a registered omap_hwmod by name
  2522. * @name: name of the omap_hwmod to look up
  2523. *
  2524. * Given a @name of an omap_hwmod, return a pointer to the registered
  2525. * struct omap_hwmod *, or NULL upon error.
  2526. */
  2527. struct omap_hwmod *omap_hwmod_lookup(const char *name)
  2528. {
  2529. struct omap_hwmod *oh;
  2530. if (!name)
  2531. return NULL;
  2532. oh = _lookup(name);
  2533. return oh;
  2534. }
  2535. /**
  2536. * omap_hwmod_for_each - call function for each registered omap_hwmod
  2537. * @fn: pointer to a callback function
  2538. * @data: void * data to pass to callback function
  2539. *
  2540. * Call @fn for each registered omap_hwmod, passing @data to each
  2541. * function. @fn must return 0 for success or any other value for
  2542. * failure. If @fn returns non-zero, the iteration across omap_hwmods
  2543. * will stop and the non-zero return value will be passed to the
  2544. * caller of omap_hwmod_for_each(). @fn is called with
  2545. * omap_hwmod_for_each() held.
  2546. */
  2547. int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh, void *data),
  2548. void *data)
  2549. {
  2550. struct omap_hwmod *temp_oh;
  2551. int ret = 0;
  2552. if (!fn)
  2553. return -EINVAL;
  2554. list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
  2555. ret = (*fn)(temp_oh, data);
  2556. if (ret)
  2557. break;
  2558. }
  2559. return ret;
  2560. }
  2561. /**
  2562. * omap_hwmod_register_links - register an array of hwmod links
  2563. * @ois: pointer to an array of omap_hwmod_ocp_if to register
  2564. *
  2565. * Intended to be called early in boot before the clock framework is
  2566. * initialized. If @ois is not null, will register all omap_hwmods
  2567. * listed in @ois that are valid for this chip. Returns -EINVAL if
  2568. * omap_hwmod_init() hasn't been called before calling this function,
  2569. * -ENOMEM if the link memory area can't be allocated, or 0 upon
  2570. * success.
  2571. */
  2572. int __init omap_hwmod_register_links(struct omap_hwmod_ocp_if **ois)
  2573. {
  2574. int r, i;
  2575. if (!inited)
  2576. return -EINVAL;
  2577. if (!ois)
  2578. return 0;
  2579. if (ois[0] == NULL) /* Empty list */
  2580. return 0;
  2581. i = 0;
  2582. do {
  2583. r = _register_link(ois[i]);
  2584. WARN(r && r != -EEXIST,
  2585. "omap_hwmod: _register_link(%s -> %s) returned %d\n",
  2586. ois[i]->master->name, ois[i]->slave->name, r);
  2587. } while (ois[++i]);
  2588. return 0;
  2589. }
  2590. /**
  2591. * _ensure_mpu_hwmod_is_setup - ensure the MPU SS hwmod is init'ed and set up
  2592. * @oh: pointer to the hwmod currently being set up (usually not the MPU)
  2593. *
  2594. * If the hwmod data corresponding to the MPU subsystem IP block
  2595. * hasn't been initialized and set up yet, do so now. This must be
  2596. * done first since sleep dependencies may be added from other hwmods
  2597. * to the MPU. Intended to be called only by omap_hwmod_setup*(). No
  2598. * return value.
  2599. */
  2600. static void __init _ensure_mpu_hwmod_is_setup(struct omap_hwmod *oh)
  2601. {
  2602. if (!mpu_oh || mpu_oh->_state == _HWMOD_STATE_UNKNOWN)
  2603. pr_err("omap_hwmod: %s: MPU initiator hwmod %s not yet registered\n",
  2604. __func__, MPU_INITIATOR_NAME);
  2605. else if (mpu_oh->_state == _HWMOD_STATE_REGISTERED && oh != mpu_oh)
  2606. omap_hwmod_setup_one(MPU_INITIATOR_NAME);
  2607. }
  2608. /**
  2609. * omap_hwmod_setup_one - set up a single hwmod
  2610. * @oh_name: const char * name of the already-registered hwmod to set up
  2611. *
  2612. * Initialize and set up a single hwmod. Intended to be used for a
  2613. * small number of early devices, such as the timer IP blocks used for
  2614. * the scheduler clock. Must be called after omap2_clk_init().
  2615. * Resolves the struct clk names to struct clk pointers for each
  2616. * registered omap_hwmod. Also calls _setup() on each hwmod. Returns
  2617. * -EINVAL upon error or 0 upon success.
  2618. */
  2619. int __init omap_hwmod_setup_one(const char *oh_name)
  2620. {
  2621. struct omap_hwmod *oh;
  2622. pr_debug("omap_hwmod: %s: %s\n", oh_name, __func__);
  2623. oh = _lookup(oh_name);
  2624. if (!oh) {
  2625. WARN(1, "omap_hwmod: %s: hwmod not yet registered\n", oh_name);
  2626. return -EINVAL;
  2627. }
  2628. _ensure_mpu_hwmod_is_setup(oh);
  2629. _init(oh, NULL);
  2630. _setup(oh, NULL);
  2631. return 0;
  2632. }
  2633. /**
  2634. * omap_hwmod_setup_earlycon_flags - set up flags for early console
  2635. *
  2636. * Enable DEBUG_OMAPUART_FLAGS for uart hwmod that is being used as
  2637. * early concole so that hwmod core doesn't reset and keep it in idle
  2638. * that specific uart.
  2639. */
  2640. #ifdef CONFIG_SERIAL_EARLYCON
  2641. static void __init omap_hwmod_setup_earlycon_flags(void)
  2642. {
  2643. struct device_node *np;
  2644. struct omap_hwmod *oh;
  2645. const char *uart;
  2646. np = of_find_node_by_path("/chosen");
  2647. if (np) {
  2648. uart = of_get_property(np, "stdout-path", NULL);
  2649. if (uart) {
  2650. np = of_find_node_by_path(uart);
  2651. if (np) {
  2652. uart = of_get_property(np, "ti,hwmods", NULL);
  2653. oh = omap_hwmod_lookup(uart);
  2654. if (oh)
  2655. oh->flags |= DEBUG_OMAPUART_FLAGS;
  2656. }
  2657. }
  2658. }
  2659. }
  2660. #endif
  2661. /**
  2662. * omap_hwmod_setup_all - set up all registered IP blocks
  2663. *
  2664. * Initialize and set up all IP blocks registered with the hwmod code.
  2665. * Must be called after omap2_clk_init(). Resolves the struct clk
  2666. * names to struct clk pointers for each registered omap_hwmod. Also
  2667. * calls _setup() on each hwmod. Returns 0 upon success.
  2668. */
  2669. static int __init omap_hwmod_setup_all(void)
  2670. {
  2671. _ensure_mpu_hwmod_is_setup(NULL);
  2672. omap_hwmod_for_each(_init, NULL);
  2673. #ifdef CONFIG_SERIAL_EARLYCON
  2674. omap_hwmod_setup_earlycon_flags();
  2675. #endif
  2676. omap_hwmod_for_each(_setup, NULL);
  2677. return 0;
  2678. }
  2679. omap_postcore_initcall(omap_hwmod_setup_all);
  2680. /**
  2681. * omap_hwmod_enable - enable an omap_hwmod
  2682. * @oh: struct omap_hwmod *
  2683. *
  2684. * Enable an omap_hwmod @oh. Intended to be called by omap_device_enable().
  2685. * Returns -EINVAL on error or passes along the return value from _enable().
  2686. */
  2687. int omap_hwmod_enable(struct omap_hwmod *oh)
  2688. {
  2689. int r;
  2690. unsigned long flags;
  2691. if (!oh)
  2692. return -EINVAL;
  2693. spin_lock_irqsave(&oh->_lock, flags);
  2694. r = _enable(oh);
  2695. spin_unlock_irqrestore(&oh->_lock, flags);
  2696. return r;
  2697. }
  2698. /**
  2699. * omap_hwmod_idle - idle an omap_hwmod
  2700. * @oh: struct omap_hwmod *
  2701. *
  2702. * Idle an omap_hwmod @oh. Intended to be called by omap_device_idle().
  2703. * Returns -EINVAL on error or passes along the return value from _idle().
  2704. */
  2705. int omap_hwmod_idle(struct omap_hwmod *oh)
  2706. {
  2707. int r;
  2708. unsigned long flags;
  2709. if (!oh)
  2710. return -EINVAL;
  2711. spin_lock_irqsave(&oh->_lock, flags);
  2712. r = _idle(oh);
  2713. spin_unlock_irqrestore(&oh->_lock, flags);
  2714. return r;
  2715. }
  2716. /**
  2717. * omap_hwmod_shutdown - shutdown an omap_hwmod
  2718. * @oh: struct omap_hwmod *
  2719. *
  2720. * Shutdown an omap_hwmod @oh. Intended to be called by
  2721. * omap_device_shutdown(). Returns -EINVAL on error or passes along
  2722. * the return value from _shutdown().
  2723. */
  2724. int omap_hwmod_shutdown(struct omap_hwmod *oh)
  2725. {
  2726. int r;
  2727. unsigned long flags;
  2728. if (!oh)
  2729. return -EINVAL;
  2730. spin_lock_irqsave(&oh->_lock, flags);
  2731. r = _shutdown(oh);
  2732. spin_unlock_irqrestore(&oh->_lock, flags);
  2733. return r;
  2734. }
  2735. /*
  2736. * IP block data retrieval functions
  2737. */
  2738. /**
  2739. * omap_hwmod_count_resources - count number of struct resources needed by hwmod
  2740. * @oh: struct omap_hwmod *
  2741. * @flags: Type of resources to include when counting (IRQ/DMA/MEM)
  2742. *
  2743. * Count the number of struct resource array elements necessary to
  2744. * contain omap_hwmod @oh resources. Intended to be called by code
  2745. * that registers omap_devices. Intended to be used to determine the
  2746. * size of a dynamically-allocated struct resource array, before
  2747. * calling omap_hwmod_fill_resources(). Returns the number of struct
  2748. * resource array elements needed.
  2749. *
  2750. * XXX This code is not optimized. It could attempt to merge adjacent
  2751. * resource IDs.
  2752. *
  2753. */
  2754. int omap_hwmod_count_resources(struct omap_hwmod *oh, unsigned long flags)
  2755. {
  2756. int ret = 0;
  2757. if (flags & IORESOURCE_IRQ)
  2758. ret += _count_mpu_irqs(oh);
  2759. if (flags & IORESOURCE_DMA)
  2760. ret += _count_sdma_reqs(oh);
  2761. if (flags & IORESOURCE_MEM) {
  2762. struct omap_hwmod_ocp_if *os;
  2763. list_for_each_entry(os, &oh->slave_ports, node)
  2764. ret += _count_ocp_if_addr_spaces(os);
  2765. }
  2766. return ret;
  2767. }
  2768. /**
  2769. * omap_hwmod_fill_resources - fill struct resource array with hwmod data
  2770. * @oh: struct omap_hwmod *
  2771. * @res: pointer to the first element of an array of struct resource to fill
  2772. *
  2773. * Fill the struct resource array @res with resource data from the
  2774. * omap_hwmod @oh. Intended to be called by code that registers
  2775. * omap_devices. See also omap_hwmod_count_resources(). Returns the
  2776. * number of array elements filled.
  2777. */
  2778. int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res)
  2779. {
  2780. struct omap_hwmod_ocp_if *os;
  2781. int i, j, mpu_irqs_cnt, sdma_reqs_cnt, addr_cnt;
  2782. int r = 0;
  2783. /* For each IRQ, DMA, memory area, fill in array.*/
  2784. mpu_irqs_cnt = _count_mpu_irqs(oh);
  2785. for (i = 0; i < mpu_irqs_cnt; i++) {
  2786. unsigned int irq;
  2787. if (oh->xlate_irq)
  2788. irq = oh->xlate_irq((oh->mpu_irqs + i)->irq);
  2789. else
  2790. irq = (oh->mpu_irqs + i)->irq;
  2791. (res + r)->name = (oh->mpu_irqs + i)->name;
  2792. (res + r)->start = irq;
  2793. (res + r)->end = irq;
  2794. (res + r)->flags = IORESOURCE_IRQ;
  2795. r++;
  2796. }
  2797. sdma_reqs_cnt = _count_sdma_reqs(oh);
  2798. for (i = 0; i < sdma_reqs_cnt; i++) {
  2799. (res + r)->name = (oh->sdma_reqs + i)->name;
  2800. (res + r)->start = (oh->sdma_reqs + i)->dma_req;
  2801. (res + r)->end = (oh->sdma_reqs + i)->dma_req;
  2802. (res + r)->flags = IORESOURCE_DMA;
  2803. r++;
  2804. }
  2805. list_for_each_entry(os, &oh->slave_ports, node) {
  2806. addr_cnt = _count_ocp_if_addr_spaces(os);
  2807. for (j = 0; j < addr_cnt; j++) {
  2808. (res + r)->name = (os->addr + j)->name;
  2809. (res + r)->start = (os->addr + j)->pa_start;
  2810. (res + r)->end = (os->addr + j)->pa_end;
  2811. (res + r)->flags = IORESOURCE_MEM;
  2812. r++;
  2813. }
  2814. }
  2815. return r;
  2816. }
  2817. /**
  2818. * omap_hwmod_fill_dma_resources - fill struct resource array with dma data
  2819. * @oh: struct omap_hwmod *
  2820. * @res: pointer to the array of struct resource to fill
  2821. *
  2822. * Fill the struct resource array @res with dma resource data from the
  2823. * omap_hwmod @oh. Intended to be called by code that registers
  2824. * omap_devices. See also omap_hwmod_count_resources(). Returns the
  2825. * number of array elements filled.
  2826. */
  2827. int omap_hwmod_fill_dma_resources(struct omap_hwmod *oh, struct resource *res)
  2828. {
  2829. int i, sdma_reqs_cnt;
  2830. int r = 0;
  2831. sdma_reqs_cnt = _count_sdma_reqs(oh);
  2832. for (i = 0; i < sdma_reqs_cnt; i++) {
  2833. (res + r)->name = (oh->sdma_reqs + i)->name;
  2834. (res + r)->start = (oh->sdma_reqs + i)->dma_req;
  2835. (res + r)->end = (oh->sdma_reqs + i)->dma_req;
  2836. (res + r)->flags = IORESOURCE_DMA;
  2837. r++;
  2838. }
  2839. return r;
  2840. }
  2841. /**
  2842. * omap_hwmod_get_resource_byname - fetch IP block integration data by name
  2843. * @oh: struct omap_hwmod * to operate on
  2844. * @type: one of the IORESOURCE_* constants from include/linux/ioport.h
  2845. * @name: pointer to the name of the data to fetch (optional)
  2846. * @rsrc: pointer to a struct resource, allocated by the caller
  2847. *
  2848. * Retrieve MPU IRQ, SDMA request line, or address space start/end
  2849. * data for the IP block pointed to by @oh. The data will be filled
  2850. * into a struct resource record pointed to by @rsrc. The struct
  2851. * resource must be allocated by the caller. When @name is non-null,
  2852. * the data associated with the matching entry in the IRQ/SDMA/address
  2853. * space hwmod data arrays will be returned. If @name is null, the
  2854. * first array entry will be returned. Data order is not meaningful
  2855. * in hwmod data, so callers are strongly encouraged to use a non-null
  2856. * @name whenever possible to avoid unpredictable effects if hwmod
  2857. * data is later added that causes data ordering to change. This
  2858. * function is only intended for use by OMAP core code. Device
  2859. * drivers should not call this function - the appropriate bus-related
  2860. * data accessor functions should be used instead. Returns 0 upon
  2861. * success or a negative error code upon error.
  2862. */
  2863. int omap_hwmod_get_resource_byname(struct omap_hwmod *oh, unsigned int type,
  2864. const char *name, struct resource *rsrc)
  2865. {
  2866. int r;
  2867. unsigned int irq, dma;
  2868. u32 pa_start, pa_end;
  2869. if (!oh || !rsrc)
  2870. return -EINVAL;
  2871. if (type == IORESOURCE_IRQ) {
  2872. r = _get_mpu_irq_by_name(oh, name, &irq);
  2873. if (r)
  2874. return r;
  2875. rsrc->start = irq;
  2876. rsrc->end = irq;
  2877. } else if (type == IORESOURCE_DMA) {
  2878. r = _get_sdma_req_by_name(oh, name, &dma);
  2879. if (r)
  2880. return r;
  2881. rsrc->start = dma;
  2882. rsrc->end = dma;
  2883. } else if (type == IORESOURCE_MEM) {
  2884. r = _get_addr_space_by_name(oh, name, &pa_start, &pa_end);
  2885. if (r)
  2886. return r;
  2887. rsrc->start = pa_start;
  2888. rsrc->end = pa_end;
  2889. } else {
  2890. return -EINVAL;
  2891. }
  2892. rsrc->flags = type;
  2893. rsrc->name = name;
  2894. return 0;
  2895. }
  2896. /**
  2897. * omap_hwmod_get_pwrdm - return pointer to this module's main powerdomain
  2898. * @oh: struct omap_hwmod *
  2899. *
  2900. * Return the powerdomain pointer associated with the OMAP module
  2901. * @oh's main clock. If @oh does not have a main clk, return the
  2902. * powerdomain associated with the interface clock associated with the
  2903. * module's MPU port. (XXX Perhaps this should use the SDMA port
  2904. * instead?) Returns NULL on error, or a struct powerdomain * on
  2905. * success.
  2906. */
  2907. struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh)
  2908. {
  2909. struct clk *c;
  2910. struct omap_hwmod_ocp_if *oi;
  2911. struct clockdomain *clkdm;
  2912. struct clk_hw_omap *clk;
  2913. if (!oh)
  2914. return NULL;
  2915. if (oh->clkdm)
  2916. return oh->clkdm->pwrdm.ptr;
  2917. if (oh->_clk) {
  2918. c = oh->_clk;
  2919. } else {
  2920. oi = _find_mpu_rt_port(oh);
  2921. if (!oi)
  2922. return NULL;
  2923. c = oi->_clk;
  2924. }
  2925. clk = to_clk_hw_omap(__clk_get_hw(c));
  2926. clkdm = clk->clkdm;
  2927. if (!clkdm)
  2928. return NULL;
  2929. return clkdm->pwrdm.ptr;
  2930. }
  2931. /**
  2932. * omap_hwmod_get_mpu_rt_va - return the module's base address (for the MPU)
  2933. * @oh: struct omap_hwmod *
  2934. *
  2935. * Returns the virtual address corresponding to the beginning of the
  2936. * module's register target, in the address range that is intended to
  2937. * be used by the MPU. Returns the virtual address upon success or NULL
  2938. * upon error.
  2939. */
  2940. void __iomem *omap_hwmod_get_mpu_rt_va(struct omap_hwmod *oh)
  2941. {
  2942. if (!oh)
  2943. return NULL;
  2944. if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
  2945. return NULL;
  2946. if (oh->_state == _HWMOD_STATE_UNKNOWN)
  2947. return NULL;
  2948. return oh->_mpu_rt_va;
  2949. }
  2950. /*
  2951. * XXX what about functions for drivers to save/restore ocp_sysconfig
  2952. * for context save/restore operations?
  2953. */
  2954. /**
  2955. * omap_hwmod_enable_wakeup - allow device to wake up the system
  2956. * @oh: struct omap_hwmod *
  2957. *
  2958. * Sets the module OCP socket ENAWAKEUP bit to allow the module to
  2959. * send wakeups to the PRCM, and enable I/O ring wakeup events for
  2960. * this IP block if it has dynamic mux entries. Eventually this
  2961. * should set PRCM wakeup registers to cause the PRCM to receive
  2962. * wakeup events from the module. Does not set any wakeup routing
  2963. * registers beyond this point - if the module is to wake up any other
  2964. * module or subsystem, that must be set separately. Called by
  2965. * omap_device code. Returns -EINVAL on error or 0 upon success.
  2966. */
  2967. int omap_hwmod_enable_wakeup(struct omap_hwmod *oh)
  2968. {
  2969. unsigned long flags;
  2970. u32 v;
  2971. spin_lock_irqsave(&oh->_lock, flags);
  2972. if (oh->class->sysc &&
  2973. (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)) {
  2974. v = oh->_sysc_cache;
  2975. _enable_wakeup(oh, &v);
  2976. _write_sysconfig(v, oh);
  2977. }
  2978. spin_unlock_irqrestore(&oh->_lock, flags);
  2979. return 0;
  2980. }
  2981. /**
  2982. * omap_hwmod_disable_wakeup - prevent device from waking the system
  2983. * @oh: struct omap_hwmod *
  2984. *
  2985. * Clears the module OCP socket ENAWAKEUP bit to prevent the module
  2986. * from sending wakeups to the PRCM, and disable I/O ring wakeup
  2987. * events for this IP block if it has dynamic mux entries. Eventually
  2988. * this should clear PRCM wakeup registers to cause the PRCM to ignore
  2989. * wakeup events from the module. Does not set any wakeup routing
  2990. * registers beyond this point - if the module is to wake up any other
  2991. * module or subsystem, that must be set separately. Called by
  2992. * omap_device code. Returns -EINVAL on error or 0 upon success.
  2993. */
  2994. int omap_hwmod_disable_wakeup(struct omap_hwmod *oh)
  2995. {
  2996. unsigned long flags;
  2997. u32 v;
  2998. spin_lock_irqsave(&oh->_lock, flags);
  2999. if (oh->class->sysc &&
  3000. (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)) {
  3001. v = oh->_sysc_cache;
  3002. _disable_wakeup(oh, &v);
  3003. _write_sysconfig(v, oh);
  3004. }
  3005. spin_unlock_irqrestore(&oh->_lock, flags);
  3006. return 0;
  3007. }
  3008. /**
  3009. * omap_hwmod_assert_hardreset - assert the HW reset line of submodules
  3010. * contained in the hwmod module.
  3011. * @oh: struct omap_hwmod *
  3012. * @name: name of the reset line to lookup and assert
  3013. *
  3014. * Some IP like dsp, ipu or iva contain processor that require
  3015. * an HW reset line to be assert / deassert in order to enable fully
  3016. * the IP. Returns -EINVAL if @oh is null or if the operation is not
  3017. * yet supported on this OMAP; otherwise, passes along the return value
  3018. * from _assert_hardreset().
  3019. */
  3020. int omap_hwmod_assert_hardreset(struct omap_hwmod *oh, const char *name)
  3021. {
  3022. int ret;
  3023. unsigned long flags;
  3024. if (!oh)
  3025. return -EINVAL;
  3026. spin_lock_irqsave(&oh->_lock, flags);
  3027. ret = _assert_hardreset(oh, name);
  3028. spin_unlock_irqrestore(&oh->_lock, flags);
  3029. return ret;
  3030. }
  3031. /**
  3032. * omap_hwmod_deassert_hardreset - deassert the HW reset line of submodules
  3033. * contained in the hwmod module.
  3034. * @oh: struct omap_hwmod *
  3035. * @name: name of the reset line to look up and deassert
  3036. *
  3037. * Some IP like dsp, ipu or iva contain processor that require
  3038. * an HW reset line to be assert / deassert in order to enable fully
  3039. * the IP. Returns -EINVAL if @oh is null or if the operation is not
  3040. * yet supported on this OMAP; otherwise, passes along the return value
  3041. * from _deassert_hardreset().
  3042. */
  3043. int omap_hwmod_deassert_hardreset(struct omap_hwmod *oh, const char *name)
  3044. {
  3045. int ret;
  3046. unsigned long flags;
  3047. if (!oh)
  3048. return -EINVAL;
  3049. spin_lock_irqsave(&oh->_lock, flags);
  3050. ret = _deassert_hardreset(oh, name);
  3051. spin_unlock_irqrestore(&oh->_lock, flags);
  3052. return ret;
  3053. }
  3054. /**
  3055. * omap_hwmod_for_each_by_class - call @fn for each hwmod of class @classname
  3056. * @classname: struct omap_hwmod_class name to search for
  3057. * @fn: callback function pointer to call for each hwmod in class @classname
  3058. * @user: arbitrary context data to pass to the callback function
  3059. *
  3060. * For each omap_hwmod of class @classname, call @fn.
  3061. * If the callback function returns something other than
  3062. * zero, the iterator is terminated, and the callback function's return
  3063. * value is passed back to the caller. Returns 0 upon success, -EINVAL
  3064. * if @classname or @fn are NULL, or passes back the error code from @fn.
  3065. */
  3066. int omap_hwmod_for_each_by_class(const char *classname,
  3067. int (*fn)(struct omap_hwmod *oh,
  3068. void *user),
  3069. void *user)
  3070. {
  3071. struct omap_hwmod *temp_oh;
  3072. int ret = 0;
  3073. if (!classname || !fn)
  3074. return -EINVAL;
  3075. pr_debug("omap_hwmod: %s: looking for modules of class %s\n",
  3076. __func__, classname);
  3077. list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
  3078. if (!strcmp(temp_oh->class->name, classname)) {
  3079. pr_debug("omap_hwmod: %s: %s: calling callback fn\n",
  3080. __func__, temp_oh->name);
  3081. ret = (*fn)(temp_oh, user);
  3082. if (ret)
  3083. break;
  3084. }
  3085. }
  3086. if (ret)
  3087. pr_debug("omap_hwmod: %s: iterator terminated early: %d\n",
  3088. __func__, ret);
  3089. return ret;
  3090. }
  3091. /**
  3092. * omap_hwmod_set_postsetup_state - set the post-_setup() state for this hwmod
  3093. * @oh: struct omap_hwmod *
  3094. * @state: state that _setup() should leave the hwmod in
  3095. *
  3096. * Sets the hwmod state that @oh will enter at the end of _setup()
  3097. * (called by omap_hwmod_setup_*()). See also the documentation
  3098. * for _setup_postsetup(), above. Returns 0 upon success or
  3099. * -EINVAL if there is a problem with the arguments or if the hwmod is
  3100. * in the wrong state.
  3101. */
  3102. int omap_hwmod_set_postsetup_state(struct omap_hwmod *oh, u8 state)
  3103. {
  3104. int ret;
  3105. unsigned long flags;
  3106. if (!oh)
  3107. return -EINVAL;
  3108. if (state != _HWMOD_STATE_DISABLED &&
  3109. state != _HWMOD_STATE_ENABLED &&
  3110. state != _HWMOD_STATE_IDLE)
  3111. return -EINVAL;
  3112. spin_lock_irqsave(&oh->_lock, flags);
  3113. if (oh->_state != _HWMOD_STATE_REGISTERED) {
  3114. ret = -EINVAL;
  3115. goto ohsps_unlock;
  3116. }
  3117. oh->_postsetup_state = state;
  3118. ret = 0;
  3119. ohsps_unlock:
  3120. spin_unlock_irqrestore(&oh->_lock, flags);
  3121. return ret;
  3122. }
  3123. /**
  3124. * omap_hwmod_get_context_loss_count - get lost context count
  3125. * @oh: struct omap_hwmod *
  3126. *
  3127. * Returns the context loss count of associated @oh
  3128. * upon success, or zero if no context loss data is available.
  3129. *
  3130. * On OMAP4, this queries the per-hwmod context loss register,
  3131. * assuming one exists. If not, or on OMAP2/3, this queries the
  3132. * enclosing powerdomain context loss count.
  3133. */
  3134. int omap_hwmod_get_context_loss_count(struct omap_hwmod *oh)
  3135. {
  3136. struct powerdomain *pwrdm;
  3137. int ret = 0;
  3138. if (soc_ops.get_context_lost)
  3139. return soc_ops.get_context_lost(oh);
  3140. pwrdm = omap_hwmod_get_pwrdm(oh);
  3141. if (pwrdm)
  3142. ret = pwrdm_get_context_loss_count(pwrdm);
  3143. return ret;
  3144. }
  3145. /**
  3146. * omap_hwmod_init - initialize the hwmod code
  3147. *
  3148. * Sets up some function pointers needed by the hwmod code to operate on the
  3149. * currently-booted SoC. Intended to be called once during kernel init
  3150. * before any hwmods are registered. No return value.
  3151. */
  3152. void __init omap_hwmod_init(void)
  3153. {
  3154. if (cpu_is_omap24xx()) {
  3155. soc_ops.wait_target_ready = _omap2xxx_3xxx_wait_target_ready;
  3156. soc_ops.assert_hardreset = _omap2_assert_hardreset;
  3157. soc_ops.deassert_hardreset = _omap2_deassert_hardreset;
  3158. soc_ops.is_hardreset_asserted = _omap2_is_hardreset_asserted;
  3159. } else if (cpu_is_omap34xx()) {
  3160. soc_ops.wait_target_ready = _omap2xxx_3xxx_wait_target_ready;
  3161. soc_ops.assert_hardreset = _omap2_assert_hardreset;
  3162. soc_ops.deassert_hardreset = _omap2_deassert_hardreset;
  3163. soc_ops.is_hardreset_asserted = _omap2_is_hardreset_asserted;
  3164. soc_ops.init_clkdm = _init_clkdm;
  3165. } else if (cpu_is_omap44xx() || soc_is_omap54xx() || soc_is_dra7xx()) {
  3166. soc_ops.enable_module = _omap4_enable_module;
  3167. soc_ops.disable_module = _omap4_disable_module;
  3168. soc_ops.wait_target_ready = _omap4_wait_target_ready;
  3169. soc_ops.assert_hardreset = _omap4_assert_hardreset;
  3170. soc_ops.deassert_hardreset = _omap4_deassert_hardreset;
  3171. soc_ops.is_hardreset_asserted = _omap4_is_hardreset_asserted;
  3172. soc_ops.init_clkdm = _init_clkdm;
  3173. soc_ops.update_context_lost = _omap4_update_context_lost;
  3174. soc_ops.get_context_lost = _omap4_get_context_lost;
  3175. soc_ops.disable_direct_prcm = _omap4_disable_direct_prcm;
  3176. } else if (cpu_is_ti814x() || cpu_is_ti816x() || soc_is_am33xx() ||
  3177. soc_is_am43xx()) {
  3178. soc_ops.enable_module = _omap4_enable_module;
  3179. soc_ops.disable_module = _omap4_disable_module;
  3180. soc_ops.wait_target_ready = _omap4_wait_target_ready;
  3181. soc_ops.assert_hardreset = _omap4_assert_hardreset;
  3182. soc_ops.deassert_hardreset = _am33xx_deassert_hardreset;
  3183. soc_ops.is_hardreset_asserted = _omap4_is_hardreset_asserted;
  3184. soc_ops.init_clkdm = _init_clkdm;
  3185. soc_ops.disable_direct_prcm = _omap4_disable_direct_prcm;
  3186. } else {
  3187. WARN(1, "omap_hwmod: unknown SoC type\n");
  3188. }
  3189. inited = true;
  3190. }
  3191. /**
  3192. * omap_hwmod_get_main_clk - get pointer to main clock name
  3193. * @oh: struct omap_hwmod *
  3194. *
  3195. * Returns the main clock name assocated with @oh upon success,
  3196. * or NULL if @oh is NULL.
  3197. */
  3198. const char *omap_hwmod_get_main_clk(struct omap_hwmod *oh)
  3199. {
  3200. if (!oh)
  3201. return NULL;
  3202. return oh->main_clk;
  3203. }