max3421-hcd.c 50 KB

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  1. /*
  2. * MAX3421 Host Controller driver for USB.
  3. *
  4. * Author: David Mosberger-Tang <davidm@egauge.net>
  5. *
  6. * (C) Copyright 2014 David Mosberger-Tang <davidm@egauge.net>
  7. *
  8. * MAX3421 is a chip implementing a USB 2.0 Full-/Low-Speed host
  9. * controller on a SPI bus.
  10. *
  11. * Based on:
  12. * o MAX3421E datasheet
  13. * http://datasheets.maximintegrated.com/en/ds/MAX3421E.pdf
  14. * o MAX3421E Programming Guide
  15. * http://www.hdl.co.jp/ftpdata/utl-001/AN3785.pdf
  16. * o gadget/dummy_hcd.c
  17. * For USB HCD implementation.
  18. * o Arduino MAX3421 driver
  19. * https://github.com/felis/USB_Host_Shield_2.0/blob/master/Usb.cpp
  20. *
  21. * This file is licenced under the GPL v2.
  22. *
  23. * Important note on worst-case (full-speed) packet size constraints
  24. * (See USB 2.0 Section 5.6.3 and following):
  25. *
  26. * - control: 64 bytes
  27. * - isochronous: 1023 bytes
  28. * - interrupt: 64 bytes
  29. * - bulk: 64 bytes
  30. *
  31. * Since the MAX3421 FIFO size is 64 bytes, we do not have to work about
  32. * multi-FIFO writes/reads for a single USB packet *except* for isochronous
  33. * transfers. We don't support isochronous transfers at this time, so we
  34. * just assume that a USB packet always fits into a single FIFO buffer.
  35. *
  36. * NOTE: The June 2006 version of "MAX3421E Programming Guide"
  37. * (AN3785) has conflicting info for the RCVDAVIRQ bit:
  38. *
  39. * The description of RCVDAVIRQ says "The CPU *must* clear
  40. * this IRQ bit (by writing a 1 to it) before reading the
  41. * RCVFIFO data.
  42. *
  43. * However, the earlier section on "Programming BULK-IN
  44. * Transfers" says * that:
  45. *
  46. * After the CPU retrieves the data, it clears the
  47. * RCVDAVIRQ bit.
  48. *
  49. * The December 2006 version has been corrected and it consistently
  50. * states the second behavior is the correct one.
  51. *
  52. * Synchronous SPI transactions sleep so we can't perform any such
  53. * transactions while holding a spin-lock (and/or while interrupts are
  54. * masked). To achieve this, all SPI transactions are issued from a
  55. * single thread (max3421_spi_thread).
  56. */
  57. #include <linux/module.h>
  58. #include <linux/spi/spi.h>
  59. #include <linux/usb.h>
  60. #include <linux/usb/hcd.h>
  61. #include <linux/platform_data/max3421-hcd.h>
  62. #define DRIVER_DESC "MAX3421 USB Host-Controller Driver"
  63. #define DRIVER_VERSION "1.0"
  64. /* 11-bit counter that wraps around (USB 2.0 Section 8.3.3): */
  65. #define USB_MAX_FRAME_NUMBER 0x7ff
  66. #define USB_MAX_RETRIES 3 /* # of retries before error is reported */
  67. /*
  68. * Max. # of times we're willing to retransmit a request immediately in
  69. * resposne to a NAK. Afterwards, we fall back on trying once a frame.
  70. */
  71. #define NAK_MAX_FAST_RETRANSMITS 2
  72. #define POWER_BUDGET 500 /* in mA; use 8 for low-power port testing */
  73. /* Port-change mask: */
  74. #define PORT_C_MASK ((USB_PORT_STAT_C_CONNECTION | \
  75. USB_PORT_STAT_C_ENABLE | \
  76. USB_PORT_STAT_C_SUSPEND | \
  77. USB_PORT_STAT_C_OVERCURRENT | \
  78. USB_PORT_STAT_C_RESET) << 16)
  79. enum max3421_rh_state {
  80. MAX3421_RH_RESET,
  81. MAX3421_RH_SUSPENDED,
  82. MAX3421_RH_RUNNING
  83. };
  84. enum pkt_state {
  85. PKT_STATE_SETUP, /* waiting to send setup packet to ctrl pipe */
  86. PKT_STATE_TRANSFER, /* waiting to xfer transfer_buffer */
  87. PKT_STATE_TERMINATE /* waiting to terminate control transfer */
  88. };
  89. enum scheduling_pass {
  90. SCHED_PASS_PERIODIC,
  91. SCHED_PASS_NON_PERIODIC,
  92. SCHED_PASS_DONE
  93. };
  94. /* Bit numbers for max3421_hcd->todo: */
  95. enum {
  96. ENABLE_IRQ = 0,
  97. RESET_HCD,
  98. RESET_PORT,
  99. CHECK_UNLINK,
  100. IOPIN_UPDATE
  101. };
  102. struct max3421_dma_buf {
  103. u8 data[2];
  104. };
  105. struct max3421_hcd {
  106. spinlock_t lock;
  107. struct task_struct *spi_thread;
  108. struct max3421_hcd *next;
  109. enum max3421_rh_state rh_state;
  110. /* lower 16 bits contain port status, upper 16 bits the change mask: */
  111. u32 port_status;
  112. unsigned active:1;
  113. struct list_head ep_list; /* list of EP's with work */
  114. /*
  115. * The following are owned by spi_thread (may be accessed by
  116. * SPI-thread without acquiring the HCD lock:
  117. */
  118. u8 rev; /* chip revision */
  119. u16 frame_number;
  120. /*
  121. * kmalloc'd buffers guaranteed to be in separate (DMA)
  122. * cache-lines:
  123. */
  124. struct max3421_dma_buf *tx;
  125. struct max3421_dma_buf *rx;
  126. /*
  127. * URB we're currently processing. Must not be reset to NULL
  128. * unless MAX3421E chip is idle:
  129. */
  130. struct urb *curr_urb;
  131. enum scheduling_pass sched_pass;
  132. struct usb_device *loaded_dev; /* dev that's loaded into the chip */
  133. int loaded_epnum; /* epnum whose toggles are loaded */
  134. int urb_done; /* > 0 -> no errors, < 0: errno */
  135. size_t curr_len;
  136. u8 hien;
  137. u8 mode;
  138. u8 iopins[2];
  139. unsigned long todo;
  140. #ifdef DEBUG
  141. unsigned long err_stat[16];
  142. #endif
  143. };
  144. struct max3421_ep {
  145. struct usb_host_endpoint *ep;
  146. struct list_head ep_list;
  147. u32 naks;
  148. u16 last_active; /* frame # this ep was last active */
  149. enum pkt_state pkt_state;
  150. u8 retries;
  151. u8 retransmit; /* packet needs retransmission */
  152. };
  153. static struct max3421_hcd *max3421_hcd_list;
  154. #define MAX3421_FIFO_SIZE 64
  155. #define MAX3421_SPI_DIR_RD 0 /* read register from MAX3421 */
  156. #define MAX3421_SPI_DIR_WR 1 /* write register to MAX3421 */
  157. /* SPI commands: */
  158. #define MAX3421_SPI_DIR_SHIFT 1
  159. #define MAX3421_SPI_REG_SHIFT 3
  160. #define MAX3421_REG_RCVFIFO 1
  161. #define MAX3421_REG_SNDFIFO 2
  162. #define MAX3421_REG_SUDFIFO 4
  163. #define MAX3421_REG_RCVBC 6
  164. #define MAX3421_REG_SNDBC 7
  165. #define MAX3421_REG_USBIRQ 13
  166. #define MAX3421_REG_USBIEN 14
  167. #define MAX3421_REG_USBCTL 15
  168. #define MAX3421_REG_CPUCTL 16
  169. #define MAX3421_REG_PINCTL 17
  170. #define MAX3421_REG_REVISION 18
  171. #define MAX3421_REG_IOPINS1 20
  172. #define MAX3421_REG_IOPINS2 21
  173. #define MAX3421_REG_GPINIRQ 22
  174. #define MAX3421_REG_GPINIEN 23
  175. #define MAX3421_REG_GPINPOL 24
  176. #define MAX3421_REG_HIRQ 25
  177. #define MAX3421_REG_HIEN 26
  178. #define MAX3421_REG_MODE 27
  179. #define MAX3421_REG_PERADDR 28
  180. #define MAX3421_REG_HCTL 29
  181. #define MAX3421_REG_HXFR 30
  182. #define MAX3421_REG_HRSL 31
  183. enum {
  184. MAX3421_USBIRQ_OSCOKIRQ_BIT = 0,
  185. MAX3421_USBIRQ_NOVBUSIRQ_BIT = 5,
  186. MAX3421_USBIRQ_VBUSIRQ_BIT
  187. };
  188. enum {
  189. MAX3421_CPUCTL_IE_BIT = 0,
  190. MAX3421_CPUCTL_PULSEWID0_BIT = 6,
  191. MAX3421_CPUCTL_PULSEWID1_BIT
  192. };
  193. enum {
  194. MAX3421_USBCTL_PWRDOWN_BIT = 4,
  195. MAX3421_USBCTL_CHIPRES_BIT
  196. };
  197. enum {
  198. MAX3421_PINCTL_GPXA_BIT = 0,
  199. MAX3421_PINCTL_GPXB_BIT,
  200. MAX3421_PINCTL_POSINT_BIT,
  201. MAX3421_PINCTL_INTLEVEL_BIT,
  202. MAX3421_PINCTL_FDUPSPI_BIT,
  203. MAX3421_PINCTL_EP0INAK_BIT,
  204. MAX3421_PINCTL_EP2INAK_BIT,
  205. MAX3421_PINCTL_EP3INAK_BIT,
  206. };
  207. enum {
  208. MAX3421_HI_BUSEVENT_BIT = 0, /* bus-reset/-resume */
  209. MAX3421_HI_RWU_BIT, /* remote wakeup */
  210. MAX3421_HI_RCVDAV_BIT, /* receive FIFO data available */
  211. MAX3421_HI_SNDBAV_BIT, /* send buffer available */
  212. MAX3421_HI_SUSDN_BIT, /* suspend operation done */
  213. MAX3421_HI_CONDET_BIT, /* peripheral connect/disconnect */
  214. MAX3421_HI_FRAME_BIT, /* frame generator */
  215. MAX3421_HI_HXFRDN_BIT, /* host transfer done */
  216. };
  217. enum {
  218. MAX3421_HCTL_BUSRST_BIT = 0,
  219. MAX3421_HCTL_FRMRST_BIT,
  220. MAX3421_HCTL_SAMPLEBUS_BIT,
  221. MAX3421_HCTL_SIGRSM_BIT,
  222. MAX3421_HCTL_RCVTOG0_BIT,
  223. MAX3421_HCTL_RCVTOG1_BIT,
  224. MAX3421_HCTL_SNDTOG0_BIT,
  225. MAX3421_HCTL_SNDTOG1_BIT
  226. };
  227. enum {
  228. MAX3421_MODE_HOST_BIT = 0,
  229. MAX3421_MODE_LOWSPEED_BIT,
  230. MAX3421_MODE_HUBPRE_BIT,
  231. MAX3421_MODE_SOFKAENAB_BIT,
  232. MAX3421_MODE_SEPIRQ_BIT,
  233. MAX3421_MODE_DELAYISO_BIT,
  234. MAX3421_MODE_DMPULLDN_BIT,
  235. MAX3421_MODE_DPPULLDN_BIT
  236. };
  237. enum {
  238. MAX3421_HRSL_OK = 0,
  239. MAX3421_HRSL_BUSY,
  240. MAX3421_HRSL_BADREQ,
  241. MAX3421_HRSL_UNDEF,
  242. MAX3421_HRSL_NAK,
  243. MAX3421_HRSL_STALL,
  244. MAX3421_HRSL_TOGERR,
  245. MAX3421_HRSL_WRONGPID,
  246. MAX3421_HRSL_BADBC,
  247. MAX3421_HRSL_PIDERR,
  248. MAX3421_HRSL_PKTERR,
  249. MAX3421_HRSL_CRCERR,
  250. MAX3421_HRSL_KERR,
  251. MAX3421_HRSL_JERR,
  252. MAX3421_HRSL_TIMEOUT,
  253. MAX3421_HRSL_BABBLE,
  254. MAX3421_HRSL_RESULT_MASK = 0xf,
  255. MAX3421_HRSL_RCVTOGRD_BIT = 4,
  256. MAX3421_HRSL_SNDTOGRD_BIT,
  257. MAX3421_HRSL_KSTATUS_BIT,
  258. MAX3421_HRSL_JSTATUS_BIT
  259. };
  260. /* Return same error-codes as ohci.h:cc_to_error: */
  261. static const int hrsl_to_error[] = {
  262. [MAX3421_HRSL_OK] = 0,
  263. [MAX3421_HRSL_BUSY] = -EINVAL,
  264. [MAX3421_HRSL_BADREQ] = -EINVAL,
  265. [MAX3421_HRSL_UNDEF] = -EINVAL,
  266. [MAX3421_HRSL_NAK] = -EAGAIN,
  267. [MAX3421_HRSL_STALL] = -EPIPE,
  268. [MAX3421_HRSL_TOGERR] = -EILSEQ,
  269. [MAX3421_HRSL_WRONGPID] = -EPROTO,
  270. [MAX3421_HRSL_BADBC] = -EREMOTEIO,
  271. [MAX3421_HRSL_PIDERR] = -EPROTO,
  272. [MAX3421_HRSL_PKTERR] = -EPROTO,
  273. [MAX3421_HRSL_CRCERR] = -EILSEQ,
  274. [MAX3421_HRSL_KERR] = -EIO,
  275. [MAX3421_HRSL_JERR] = -EIO,
  276. [MAX3421_HRSL_TIMEOUT] = -ETIME,
  277. [MAX3421_HRSL_BABBLE] = -EOVERFLOW
  278. };
  279. /*
  280. * See http://www.beyondlogic.org/usbnutshell/usb4.shtml#Control for a
  281. * reasonable overview of how control transfers use the the IN/OUT
  282. * tokens.
  283. */
  284. #define MAX3421_HXFR_BULK_IN(ep) (0x00 | (ep)) /* bulk or interrupt */
  285. #define MAX3421_HXFR_SETUP 0x10
  286. #define MAX3421_HXFR_BULK_OUT(ep) (0x20 | (ep)) /* bulk or interrupt */
  287. #define MAX3421_HXFR_ISO_IN(ep) (0x40 | (ep))
  288. #define MAX3421_HXFR_ISO_OUT(ep) (0x60 | (ep))
  289. #define MAX3421_HXFR_HS_IN 0x80 /* handshake in */
  290. #define MAX3421_HXFR_HS_OUT 0xa0 /* handshake out */
  291. #define field(val, bit) ((val) << (bit))
  292. static inline s16
  293. frame_diff(u16 left, u16 right)
  294. {
  295. return ((unsigned) (left - right)) % (USB_MAX_FRAME_NUMBER + 1);
  296. }
  297. static inline struct max3421_hcd *
  298. hcd_to_max3421(struct usb_hcd *hcd)
  299. {
  300. return (struct max3421_hcd *) hcd->hcd_priv;
  301. }
  302. static inline struct usb_hcd *
  303. max3421_to_hcd(struct max3421_hcd *max3421_hcd)
  304. {
  305. return container_of((void *) max3421_hcd, struct usb_hcd, hcd_priv);
  306. }
  307. static u8
  308. spi_rd8(struct usb_hcd *hcd, unsigned int reg)
  309. {
  310. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  311. struct spi_device *spi = to_spi_device(hcd->self.controller);
  312. struct spi_transfer transfer;
  313. struct spi_message msg;
  314. memset(&transfer, 0, sizeof(transfer));
  315. spi_message_init(&msg);
  316. max3421_hcd->tx->data[0] =
  317. (field(reg, MAX3421_SPI_REG_SHIFT) |
  318. field(MAX3421_SPI_DIR_RD, MAX3421_SPI_DIR_SHIFT));
  319. transfer.tx_buf = max3421_hcd->tx->data;
  320. transfer.rx_buf = max3421_hcd->rx->data;
  321. transfer.len = 2;
  322. spi_message_add_tail(&transfer, &msg);
  323. spi_sync(spi, &msg);
  324. return max3421_hcd->rx->data[1];
  325. }
  326. static void
  327. spi_wr8(struct usb_hcd *hcd, unsigned int reg, u8 val)
  328. {
  329. struct spi_device *spi = to_spi_device(hcd->self.controller);
  330. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  331. struct spi_transfer transfer;
  332. struct spi_message msg;
  333. memset(&transfer, 0, sizeof(transfer));
  334. spi_message_init(&msg);
  335. max3421_hcd->tx->data[0] =
  336. (field(reg, MAX3421_SPI_REG_SHIFT) |
  337. field(MAX3421_SPI_DIR_WR, MAX3421_SPI_DIR_SHIFT));
  338. max3421_hcd->tx->data[1] = val;
  339. transfer.tx_buf = max3421_hcd->tx->data;
  340. transfer.len = 2;
  341. spi_message_add_tail(&transfer, &msg);
  342. spi_sync(spi, &msg);
  343. }
  344. static void
  345. spi_rd_buf(struct usb_hcd *hcd, unsigned int reg, void *buf, size_t len)
  346. {
  347. struct spi_device *spi = to_spi_device(hcd->self.controller);
  348. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  349. struct spi_transfer transfer[2];
  350. struct spi_message msg;
  351. memset(transfer, 0, sizeof(transfer));
  352. spi_message_init(&msg);
  353. max3421_hcd->tx->data[0] =
  354. (field(reg, MAX3421_SPI_REG_SHIFT) |
  355. field(MAX3421_SPI_DIR_RD, MAX3421_SPI_DIR_SHIFT));
  356. transfer[0].tx_buf = max3421_hcd->tx->data;
  357. transfer[0].len = 1;
  358. transfer[1].rx_buf = buf;
  359. transfer[1].len = len;
  360. spi_message_add_tail(&transfer[0], &msg);
  361. spi_message_add_tail(&transfer[1], &msg);
  362. spi_sync(spi, &msg);
  363. }
  364. static void
  365. spi_wr_buf(struct usb_hcd *hcd, unsigned int reg, void *buf, size_t len)
  366. {
  367. struct spi_device *spi = to_spi_device(hcd->self.controller);
  368. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  369. struct spi_transfer transfer[2];
  370. struct spi_message msg;
  371. memset(transfer, 0, sizeof(transfer));
  372. spi_message_init(&msg);
  373. max3421_hcd->tx->data[0] =
  374. (field(reg, MAX3421_SPI_REG_SHIFT) |
  375. field(MAX3421_SPI_DIR_WR, MAX3421_SPI_DIR_SHIFT));
  376. transfer[0].tx_buf = max3421_hcd->tx->data;
  377. transfer[0].len = 1;
  378. transfer[1].tx_buf = buf;
  379. transfer[1].len = len;
  380. spi_message_add_tail(&transfer[0], &msg);
  381. spi_message_add_tail(&transfer[1], &msg);
  382. spi_sync(spi, &msg);
  383. }
  384. /*
  385. * Figure out the correct setting for the LOWSPEED and HUBPRE mode
  386. * bits. The HUBPRE bit needs to be set when MAX3421E operates at
  387. * full speed, but it's talking to a low-speed device (i.e., through a
  388. * hub). Setting that bit ensures that every low-speed packet is
  389. * preceded by a full-speed PRE PID. Possible configurations:
  390. *
  391. * Hub speed: Device speed: => LOWSPEED bit: HUBPRE bit:
  392. * FULL FULL => 0 0
  393. * FULL LOW => 1 1
  394. * LOW LOW => 1 0
  395. * LOW FULL => 1 0
  396. */
  397. static void
  398. max3421_set_speed(struct usb_hcd *hcd, struct usb_device *dev)
  399. {
  400. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  401. u8 mode_lowspeed, mode_hubpre, mode = max3421_hcd->mode;
  402. mode_lowspeed = BIT(MAX3421_MODE_LOWSPEED_BIT);
  403. mode_hubpre = BIT(MAX3421_MODE_HUBPRE_BIT);
  404. if (max3421_hcd->port_status & USB_PORT_STAT_LOW_SPEED) {
  405. mode |= mode_lowspeed;
  406. mode &= ~mode_hubpre;
  407. } else if (dev->speed == USB_SPEED_LOW) {
  408. mode |= mode_lowspeed | mode_hubpre;
  409. } else {
  410. mode &= ~(mode_lowspeed | mode_hubpre);
  411. }
  412. if (mode != max3421_hcd->mode) {
  413. max3421_hcd->mode = mode;
  414. spi_wr8(hcd, MAX3421_REG_MODE, max3421_hcd->mode);
  415. }
  416. }
  417. /*
  418. * Caller must NOT hold HCD spinlock.
  419. */
  420. static void
  421. max3421_set_address(struct usb_hcd *hcd, struct usb_device *dev, int epnum,
  422. int force_toggles)
  423. {
  424. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  425. int old_epnum, same_ep, rcvtog, sndtog;
  426. struct usb_device *old_dev;
  427. u8 hctl;
  428. old_dev = max3421_hcd->loaded_dev;
  429. old_epnum = max3421_hcd->loaded_epnum;
  430. same_ep = (dev == old_dev && epnum == old_epnum);
  431. if (same_ep && !force_toggles)
  432. return;
  433. if (old_dev && !same_ep) {
  434. /* save the old end-points toggles: */
  435. u8 hrsl = spi_rd8(hcd, MAX3421_REG_HRSL);
  436. rcvtog = (hrsl >> MAX3421_HRSL_RCVTOGRD_BIT) & 1;
  437. sndtog = (hrsl >> MAX3421_HRSL_SNDTOGRD_BIT) & 1;
  438. /* no locking: HCD (i.e., we) own toggles, don't we? */
  439. usb_settoggle(old_dev, old_epnum, 0, rcvtog);
  440. usb_settoggle(old_dev, old_epnum, 1, sndtog);
  441. }
  442. /* setup new endpoint's toggle bits: */
  443. rcvtog = usb_gettoggle(dev, epnum, 0);
  444. sndtog = usb_gettoggle(dev, epnum, 1);
  445. hctl = (BIT(rcvtog + MAX3421_HCTL_RCVTOG0_BIT) |
  446. BIT(sndtog + MAX3421_HCTL_SNDTOG0_BIT));
  447. max3421_hcd->loaded_epnum = epnum;
  448. spi_wr8(hcd, MAX3421_REG_HCTL, hctl);
  449. /*
  450. * Note: devnum for one and the same device can change during
  451. * address-assignment so it's best to just always load the
  452. * address whenever the end-point changed/was forced.
  453. */
  454. max3421_hcd->loaded_dev = dev;
  455. spi_wr8(hcd, MAX3421_REG_PERADDR, dev->devnum);
  456. }
  457. static int
  458. max3421_ctrl_setup(struct usb_hcd *hcd, struct urb *urb)
  459. {
  460. spi_wr_buf(hcd, MAX3421_REG_SUDFIFO, urb->setup_packet, 8);
  461. return MAX3421_HXFR_SETUP;
  462. }
  463. static int
  464. max3421_transfer_in(struct usb_hcd *hcd, struct urb *urb)
  465. {
  466. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  467. int epnum = usb_pipeendpoint(urb->pipe);
  468. max3421_hcd->curr_len = 0;
  469. max3421_hcd->hien |= BIT(MAX3421_HI_RCVDAV_BIT);
  470. return MAX3421_HXFR_BULK_IN(epnum);
  471. }
  472. static int
  473. max3421_transfer_out(struct usb_hcd *hcd, struct urb *urb, int fast_retransmit)
  474. {
  475. struct spi_device *spi = to_spi_device(hcd->self.controller);
  476. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  477. int epnum = usb_pipeendpoint(urb->pipe);
  478. u32 max_packet;
  479. void *src;
  480. src = urb->transfer_buffer + urb->actual_length;
  481. if (fast_retransmit) {
  482. if (max3421_hcd->rev == 0x12) {
  483. /* work around rev 0x12 bug: */
  484. spi_wr8(hcd, MAX3421_REG_SNDBC, 0);
  485. spi_wr8(hcd, MAX3421_REG_SNDFIFO, ((u8 *) src)[0]);
  486. spi_wr8(hcd, MAX3421_REG_SNDBC, max3421_hcd->curr_len);
  487. }
  488. return MAX3421_HXFR_BULK_OUT(epnum);
  489. }
  490. max_packet = usb_maxpacket(urb->dev, urb->pipe, 1);
  491. if (max_packet > MAX3421_FIFO_SIZE) {
  492. /*
  493. * We do not support isochronous transfers at this
  494. * time.
  495. */
  496. dev_err(&spi->dev,
  497. "%s: packet-size of %u too big (limit is %u bytes)",
  498. __func__, max_packet, MAX3421_FIFO_SIZE);
  499. max3421_hcd->urb_done = -EMSGSIZE;
  500. return -EMSGSIZE;
  501. }
  502. max3421_hcd->curr_len = min((urb->transfer_buffer_length -
  503. urb->actual_length), max_packet);
  504. spi_wr_buf(hcd, MAX3421_REG_SNDFIFO, src, max3421_hcd->curr_len);
  505. spi_wr8(hcd, MAX3421_REG_SNDBC, max3421_hcd->curr_len);
  506. return MAX3421_HXFR_BULK_OUT(epnum);
  507. }
  508. /*
  509. * Issue the next host-transfer command.
  510. * Caller must NOT hold HCD spinlock.
  511. */
  512. static void
  513. max3421_next_transfer(struct usb_hcd *hcd, int fast_retransmit)
  514. {
  515. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  516. struct urb *urb = max3421_hcd->curr_urb;
  517. struct max3421_ep *max3421_ep;
  518. int cmd = -EINVAL;
  519. if (!urb)
  520. return; /* nothing to do */
  521. max3421_ep = urb->ep->hcpriv;
  522. switch (max3421_ep->pkt_state) {
  523. case PKT_STATE_SETUP:
  524. cmd = max3421_ctrl_setup(hcd, urb);
  525. break;
  526. case PKT_STATE_TRANSFER:
  527. if (usb_urb_dir_in(urb))
  528. cmd = max3421_transfer_in(hcd, urb);
  529. else
  530. cmd = max3421_transfer_out(hcd, urb, fast_retransmit);
  531. break;
  532. case PKT_STATE_TERMINATE:
  533. /*
  534. * IN transfers are terminated with HS_OUT token,
  535. * OUT transfers with HS_IN:
  536. */
  537. if (usb_urb_dir_in(urb))
  538. cmd = MAX3421_HXFR_HS_OUT;
  539. else
  540. cmd = MAX3421_HXFR_HS_IN;
  541. break;
  542. }
  543. if (cmd < 0)
  544. return;
  545. /* issue the command and wait for host-xfer-done interrupt: */
  546. spi_wr8(hcd, MAX3421_REG_HXFR, cmd);
  547. max3421_hcd->hien |= BIT(MAX3421_HI_HXFRDN_BIT);
  548. }
  549. /*
  550. * Find the next URB to process and start its execution.
  551. *
  552. * At this time, we do not anticipate ever connecting a USB hub to the
  553. * MAX3421 chip, so at most USB device can be connected and we can use
  554. * a simplistic scheduler: at the start of a frame, schedule all
  555. * periodic transfers. Once that is done, use the remainder of the
  556. * frame to process non-periodic (bulk & control) transfers.
  557. *
  558. * Preconditions:
  559. * o Caller must NOT hold HCD spinlock.
  560. * o max3421_hcd->curr_urb MUST BE NULL.
  561. * o MAX3421E chip must be idle.
  562. */
  563. static int
  564. max3421_select_and_start_urb(struct usb_hcd *hcd)
  565. {
  566. struct spi_device *spi = to_spi_device(hcd->self.controller);
  567. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  568. struct urb *urb, *curr_urb = NULL;
  569. struct max3421_ep *max3421_ep;
  570. int epnum, force_toggles = 0;
  571. struct usb_host_endpoint *ep;
  572. struct list_head *pos;
  573. unsigned long flags;
  574. spin_lock_irqsave(&max3421_hcd->lock, flags);
  575. for (;
  576. max3421_hcd->sched_pass < SCHED_PASS_DONE;
  577. ++max3421_hcd->sched_pass)
  578. list_for_each(pos, &max3421_hcd->ep_list) {
  579. urb = NULL;
  580. max3421_ep = container_of(pos, struct max3421_ep,
  581. ep_list);
  582. ep = max3421_ep->ep;
  583. switch (usb_endpoint_type(&ep->desc)) {
  584. case USB_ENDPOINT_XFER_ISOC:
  585. case USB_ENDPOINT_XFER_INT:
  586. if (max3421_hcd->sched_pass !=
  587. SCHED_PASS_PERIODIC)
  588. continue;
  589. break;
  590. case USB_ENDPOINT_XFER_CONTROL:
  591. case USB_ENDPOINT_XFER_BULK:
  592. if (max3421_hcd->sched_pass !=
  593. SCHED_PASS_NON_PERIODIC)
  594. continue;
  595. break;
  596. }
  597. if (list_empty(&ep->urb_list))
  598. continue; /* nothing to do */
  599. urb = list_first_entry(&ep->urb_list, struct urb,
  600. urb_list);
  601. if (urb->unlinked) {
  602. dev_dbg(&spi->dev, "%s: URB %p unlinked=%d",
  603. __func__, urb, urb->unlinked);
  604. max3421_hcd->curr_urb = urb;
  605. max3421_hcd->urb_done = 1;
  606. spin_unlock_irqrestore(&max3421_hcd->lock,
  607. flags);
  608. return 1;
  609. }
  610. switch (usb_endpoint_type(&ep->desc)) {
  611. case USB_ENDPOINT_XFER_CONTROL:
  612. /*
  613. * Allow one control transaction per
  614. * frame per endpoint:
  615. */
  616. if (frame_diff(max3421_ep->last_active,
  617. max3421_hcd->frame_number) == 0)
  618. continue;
  619. break;
  620. case USB_ENDPOINT_XFER_BULK:
  621. if (max3421_ep->retransmit
  622. && (frame_diff(max3421_ep->last_active,
  623. max3421_hcd->frame_number)
  624. == 0))
  625. /*
  626. * We already tried this EP
  627. * during this frame and got a
  628. * NAK or error; wait for next frame
  629. */
  630. continue;
  631. break;
  632. case USB_ENDPOINT_XFER_ISOC:
  633. case USB_ENDPOINT_XFER_INT:
  634. if (frame_diff(max3421_hcd->frame_number,
  635. max3421_ep->last_active)
  636. < urb->interval)
  637. /*
  638. * We already processed this
  639. * end-point in the current
  640. * frame
  641. */
  642. continue;
  643. break;
  644. }
  645. /* move current ep to tail: */
  646. list_move_tail(pos, &max3421_hcd->ep_list);
  647. curr_urb = urb;
  648. goto done;
  649. }
  650. done:
  651. if (!curr_urb) {
  652. spin_unlock_irqrestore(&max3421_hcd->lock, flags);
  653. return 0;
  654. }
  655. urb = max3421_hcd->curr_urb = curr_urb;
  656. epnum = usb_endpoint_num(&urb->ep->desc);
  657. if (max3421_ep->retransmit)
  658. /* restart (part of) a USB transaction: */
  659. max3421_ep->retransmit = 0;
  660. else {
  661. /* start USB transaction: */
  662. if (usb_endpoint_xfer_control(&ep->desc)) {
  663. /*
  664. * See USB 2.0 spec section 8.6.1
  665. * Initialization via SETUP Token:
  666. */
  667. usb_settoggle(urb->dev, epnum, 0, 1);
  668. usb_settoggle(urb->dev, epnum, 1, 1);
  669. max3421_ep->pkt_state = PKT_STATE_SETUP;
  670. force_toggles = 1;
  671. } else
  672. max3421_ep->pkt_state = PKT_STATE_TRANSFER;
  673. }
  674. spin_unlock_irqrestore(&max3421_hcd->lock, flags);
  675. max3421_ep->last_active = max3421_hcd->frame_number;
  676. max3421_set_address(hcd, urb->dev, epnum, force_toggles);
  677. max3421_set_speed(hcd, urb->dev);
  678. max3421_next_transfer(hcd, 0);
  679. return 1;
  680. }
  681. /*
  682. * Check all endpoints for URBs that got unlinked.
  683. *
  684. * Caller must NOT hold HCD spinlock.
  685. */
  686. static int
  687. max3421_check_unlink(struct usb_hcd *hcd)
  688. {
  689. struct spi_device *spi = to_spi_device(hcd->self.controller);
  690. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  691. struct list_head *pos, *upos, *next_upos;
  692. struct max3421_ep *max3421_ep;
  693. struct usb_host_endpoint *ep;
  694. struct urb *urb;
  695. unsigned long flags;
  696. int retval = 0;
  697. spin_lock_irqsave(&max3421_hcd->lock, flags);
  698. list_for_each(pos, &max3421_hcd->ep_list) {
  699. max3421_ep = container_of(pos, struct max3421_ep, ep_list);
  700. ep = max3421_ep->ep;
  701. list_for_each_safe(upos, next_upos, &ep->urb_list) {
  702. urb = container_of(upos, struct urb, urb_list);
  703. if (urb->unlinked) {
  704. retval = 1;
  705. dev_dbg(&spi->dev, "%s: URB %p unlinked=%d",
  706. __func__, urb, urb->unlinked);
  707. usb_hcd_unlink_urb_from_ep(hcd, urb);
  708. spin_unlock_irqrestore(&max3421_hcd->lock,
  709. flags);
  710. usb_hcd_giveback_urb(hcd, urb, 0);
  711. spin_lock_irqsave(&max3421_hcd->lock, flags);
  712. }
  713. }
  714. }
  715. spin_unlock_irqrestore(&max3421_hcd->lock, flags);
  716. return retval;
  717. }
  718. /*
  719. * Caller must NOT hold HCD spinlock.
  720. */
  721. static void
  722. max3421_slow_retransmit(struct usb_hcd *hcd)
  723. {
  724. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  725. struct urb *urb = max3421_hcd->curr_urb;
  726. struct max3421_ep *max3421_ep;
  727. max3421_ep = urb->ep->hcpriv;
  728. max3421_ep->retransmit = 1;
  729. max3421_hcd->curr_urb = NULL;
  730. }
  731. /*
  732. * Caller must NOT hold HCD spinlock.
  733. */
  734. static void
  735. max3421_recv_data_available(struct usb_hcd *hcd)
  736. {
  737. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  738. struct urb *urb = max3421_hcd->curr_urb;
  739. size_t remaining, transfer_size;
  740. u8 rcvbc;
  741. rcvbc = spi_rd8(hcd, MAX3421_REG_RCVBC);
  742. if (rcvbc > MAX3421_FIFO_SIZE)
  743. rcvbc = MAX3421_FIFO_SIZE;
  744. if (urb->actual_length >= urb->transfer_buffer_length)
  745. remaining = 0;
  746. else
  747. remaining = urb->transfer_buffer_length - urb->actual_length;
  748. transfer_size = rcvbc;
  749. if (transfer_size > remaining)
  750. transfer_size = remaining;
  751. if (transfer_size > 0) {
  752. void *dst = urb->transfer_buffer + urb->actual_length;
  753. spi_rd_buf(hcd, MAX3421_REG_RCVFIFO, dst, transfer_size);
  754. urb->actual_length += transfer_size;
  755. max3421_hcd->curr_len = transfer_size;
  756. }
  757. /* ack the RCVDAV irq now that the FIFO has been read: */
  758. spi_wr8(hcd, MAX3421_REG_HIRQ, BIT(MAX3421_HI_RCVDAV_BIT));
  759. }
  760. static void
  761. max3421_handle_error(struct usb_hcd *hcd, u8 hrsl)
  762. {
  763. struct spi_device *spi = to_spi_device(hcd->self.controller);
  764. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  765. u8 result_code = hrsl & MAX3421_HRSL_RESULT_MASK;
  766. struct urb *urb = max3421_hcd->curr_urb;
  767. struct max3421_ep *max3421_ep = urb->ep->hcpriv;
  768. int switch_sndfifo;
  769. /*
  770. * If an OUT command results in any response other than OK
  771. * (i.e., error or NAK), we have to perform a dummy-write to
  772. * SNDBC so the FIFO gets switched back to us. Otherwise, we
  773. * get out of sync with the SNDFIFO double buffer.
  774. */
  775. switch_sndfifo = (max3421_ep->pkt_state == PKT_STATE_TRANSFER &&
  776. usb_urb_dir_out(urb));
  777. switch (result_code) {
  778. case MAX3421_HRSL_OK:
  779. return; /* this shouldn't happen */
  780. case MAX3421_HRSL_WRONGPID: /* received wrong PID */
  781. case MAX3421_HRSL_BUSY: /* SIE busy */
  782. case MAX3421_HRSL_BADREQ: /* bad val in HXFR */
  783. case MAX3421_HRSL_UNDEF: /* reserved */
  784. case MAX3421_HRSL_KERR: /* K-state instead of response */
  785. case MAX3421_HRSL_JERR: /* J-state instead of response */
  786. /*
  787. * packet experienced an error that we cannot recover
  788. * from; report error
  789. */
  790. max3421_hcd->urb_done = hrsl_to_error[result_code];
  791. dev_dbg(&spi->dev, "%s: unexpected error HRSL=0x%02x",
  792. __func__, hrsl);
  793. break;
  794. case MAX3421_HRSL_TOGERR:
  795. if (usb_urb_dir_in(urb))
  796. ; /* don't do anything (device will switch toggle) */
  797. else {
  798. /* flip the send toggle bit: */
  799. int sndtog = (hrsl >> MAX3421_HRSL_SNDTOGRD_BIT) & 1;
  800. sndtog ^= 1;
  801. spi_wr8(hcd, MAX3421_REG_HCTL,
  802. BIT(sndtog + MAX3421_HCTL_SNDTOG0_BIT));
  803. }
  804. /* FALL THROUGH */
  805. case MAX3421_HRSL_BADBC: /* bad byte count */
  806. case MAX3421_HRSL_PIDERR: /* received PID is corrupted */
  807. case MAX3421_HRSL_PKTERR: /* packet error (stuff, EOP) */
  808. case MAX3421_HRSL_CRCERR: /* CRC error */
  809. case MAX3421_HRSL_BABBLE: /* device talked too long */
  810. case MAX3421_HRSL_TIMEOUT:
  811. if (max3421_ep->retries++ < USB_MAX_RETRIES)
  812. /* retry the packet again in the next frame */
  813. max3421_slow_retransmit(hcd);
  814. else {
  815. /* Based on ohci.h cc_to_err[]: */
  816. max3421_hcd->urb_done = hrsl_to_error[result_code];
  817. dev_dbg(&spi->dev, "%s: unexpected error HRSL=0x%02x",
  818. __func__, hrsl);
  819. }
  820. break;
  821. case MAX3421_HRSL_STALL:
  822. dev_dbg(&spi->dev, "%s: unexpected error HRSL=0x%02x",
  823. __func__, hrsl);
  824. max3421_hcd->urb_done = hrsl_to_error[result_code];
  825. break;
  826. case MAX3421_HRSL_NAK:
  827. /*
  828. * Device wasn't ready for data or has no data
  829. * available: retry the packet again.
  830. */
  831. if (max3421_ep->naks++ < NAK_MAX_FAST_RETRANSMITS) {
  832. max3421_next_transfer(hcd, 1);
  833. switch_sndfifo = 0;
  834. } else
  835. max3421_slow_retransmit(hcd);
  836. break;
  837. }
  838. if (switch_sndfifo)
  839. spi_wr8(hcd, MAX3421_REG_SNDBC, 0);
  840. }
  841. /*
  842. * Caller must NOT hold HCD spinlock.
  843. */
  844. static int
  845. max3421_transfer_in_done(struct usb_hcd *hcd, struct urb *urb)
  846. {
  847. struct spi_device *spi = to_spi_device(hcd->self.controller);
  848. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  849. u32 max_packet;
  850. if (urb->actual_length >= urb->transfer_buffer_length)
  851. return 1; /* read is complete, so we're done */
  852. /*
  853. * USB 2.0 Section 5.3.2 Pipes: packets must be full size
  854. * except for last one.
  855. */
  856. max_packet = usb_maxpacket(urb->dev, urb->pipe, 0);
  857. if (max_packet > MAX3421_FIFO_SIZE) {
  858. /*
  859. * We do not support isochronous transfers at this
  860. * time...
  861. */
  862. dev_err(&spi->dev,
  863. "%s: packet-size of %u too big (limit is %u bytes)",
  864. __func__, max_packet, MAX3421_FIFO_SIZE);
  865. return -EINVAL;
  866. }
  867. if (max3421_hcd->curr_len < max_packet) {
  868. if (urb->transfer_flags & URB_SHORT_NOT_OK) {
  869. /*
  870. * remaining > 0 and received an
  871. * unexpected partial packet ->
  872. * error
  873. */
  874. return -EREMOTEIO;
  875. } else
  876. /* short read, but it's OK */
  877. return 1;
  878. }
  879. return 0; /* not done */
  880. }
  881. /*
  882. * Caller must NOT hold HCD spinlock.
  883. */
  884. static int
  885. max3421_transfer_out_done(struct usb_hcd *hcd, struct urb *urb)
  886. {
  887. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  888. urb->actual_length += max3421_hcd->curr_len;
  889. if (urb->actual_length < urb->transfer_buffer_length)
  890. return 0;
  891. if (urb->transfer_flags & URB_ZERO_PACKET) {
  892. /*
  893. * Some hardware needs a zero-size packet at the end
  894. * of a bulk-out transfer if the last transfer was a
  895. * full-sized packet (i.e., such hardware use <
  896. * max_packet as an indicator that the end of the
  897. * packet has been reached).
  898. */
  899. u32 max_packet = usb_maxpacket(urb->dev, urb->pipe, 1);
  900. if (max3421_hcd->curr_len == max_packet)
  901. return 0;
  902. }
  903. return 1;
  904. }
  905. /*
  906. * Caller must NOT hold HCD spinlock.
  907. */
  908. static void
  909. max3421_host_transfer_done(struct usb_hcd *hcd)
  910. {
  911. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  912. struct urb *urb = max3421_hcd->curr_urb;
  913. struct max3421_ep *max3421_ep;
  914. u8 result_code, hrsl;
  915. int urb_done = 0;
  916. max3421_hcd->hien &= ~(BIT(MAX3421_HI_HXFRDN_BIT) |
  917. BIT(MAX3421_HI_RCVDAV_BIT));
  918. hrsl = spi_rd8(hcd, MAX3421_REG_HRSL);
  919. result_code = hrsl & MAX3421_HRSL_RESULT_MASK;
  920. #ifdef DEBUG
  921. ++max3421_hcd->err_stat[result_code];
  922. #endif
  923. max3421_ep = urb->ep->hcpriv;
  924. if (unlikely(result_code != MAX3421_HRSL_OK)) {
  925. max3421_handle_error(hcd, hrsl);
  926. return;
  927. }
  928. max3421_ep->naks = 0;
  929. max3421_ep->retries = 0;
  930. switch (max3421_ep->pkt_state) {
  931. case PKT_STATE_SETUP:
  932. if (urb->transfer_buffer_length > 0)
  933. max3421_ep->pkt_state = PKT_STATE_TRANSFER;
  934. else
  935. max3421_ep->pkt_state = PKT_STATE_TERMINATE;
  936. break;
  937. case PKT_STATE_TRANSFER:
  938. if (usb_urb_dir_in(urb))
  939. urb_done = max3421_transfer_in_done(hcd, urb);
  940. else
  941. urb_done = max3421_transfer_out_done(hcd, urb);
  942. if (urb_done > 0 && usb_pipetype(urb->pipe) == PIPE_CONTROL) {
  943. /*
  944. * We aren't really done - we still need to
  945. * terminate the control transfer:
  946. */
  947. max3421_hcd->urb_done = urb_done = 0;
  948. max3421_ep->pkt_state = PKT_STATE_TERMINATE;
  949. }
  950. break;
  951. case PKT_STATE_TERMINATE:
  952. urb_done = 1;
  953. break;
  954. }
  955. if (urb_done)
  956. max3421_hcd->urb_done = urb_done;
  957. else
  958. max3421_next_transfer(hcd, 0);
  959. }
  960. /*
  961. * Caller must NOT hold HCD spinlock.
  962. */
  963. static void
  964. max3421_detect_conn(struct usb_hcd *hcd)
  965. {
  966. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  967. unsigned int jk, have_conn = 0;
  968. u32 old_port_status, chg;
  969. unsigned long flags;
  970. u8 hrsl, mode;
  971. hrsl = spi_rd8(hcd, MAX3421_REG_HRSL);
  972. jk = ((((hrsl >> MAX3421_HRSL_JSTATUS_BIT) & 1) << 0) |
  973. (((hrsl >> MAX3421_HRSL_KSTATUS_BIT) & 1) << 1));
  974. mode = max3421_hcd->mode;
  975. switch (jk) {
  976. case 0x0: /* SE0: disconnect */
  977. /*
  978. * Turn off SOFKAENAB bit to avoid getting interrupt
  979. * every milli-second:
  980. */
  981. mode &= ~BIT(MAX3421_MODE_SOFKAENAB_BIT);
  982. break;
  983. case 0x1: /* J=0,K=1: low-speed (in full-speed or vice versa) */
  984. case 0x2: /* J=1,K=0: full-speed (in full-speed or vice versa) */
  985. if (jk == 0x2)
  986. /* need to switch to the other speed: */
  987. mode ^= BIT(MAX3421_MODE_LOWSPEED_BIT);
  988. /* turn on SOFKAENAB bit: */
  989. mode |= BIT(MAX3421_MODE_SOFKAENAB_BIT);
  990. have_conn = 1;
  991. break;
  992. case 0x3: /* illegal */
  993. break;
  994. }
  995. max3421_hcd->mode = mode;
  996. spi_wr8(hcd, MAX3421_REG_MODE, max3421_hcd->mode);
  997. spin_lock_irqsave(&max3421_hcd->lock, flags);
  998. old_port_status = max3421_hcd->port_status;
  999. if (have_conn)
  1000. max3421_hcd->port_status |= USB_PORT_STAT_CONNECTION;
  1001. else
  1002. max3421_hcd->port_status &= ~USB_PORT_STAT_CONNECTION;
  1003. if (mode & BIT(MAX3421_MODE_LOWSPEED_BIT))
  1004. max3421_hcd->port_status |= USB_PORT_STAT_LOW_SPEED;
  1005. else
  1006. max3421_hcd->port_status &= ~USB_PORT_STAT_LOW_SPEED;
  1007. chg = (old_port_status ^ max3421_hcd->port_status);
  1008. max3421_hcd->port_status |= chg << 16;
  1009. spin_unlock_irqrestore(&max3421_hcd->lock, flags);
  1010. }
  1011. static irqreturn_t
  1012. max3421_irq_handler(int irq, void *dev_id)
  1013. {
  1014. struct usb_hcd *hcd = dev_id;
  1015. struct spi_device *spi = to_spi_device(hcd->self.controller);
  1016. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  1017. if (max3421_hcd->spi_thread &&
  1018. max3421_hcd->spi_thread->state != TASK_RUNNING)
  1019. wake_up_process(max3421_hcd->spi_thread);
  1020. if (!test_and_set_bit(ENABLE_IRQ, &max3421_hcd->todo))
  1021. disable_irq_nosync(spi->irq);
  1022. return IRQ_HANDLED;
  1023. }
  1024. #ifdef DEBUG
  1025. static void
  1026. dump_eps(struct usb_hcd *hcd)
  1027. {
  1028. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  1029. struct max3421_ep *max3421_ep;
  1030. struct usb_host_endpoint *ep;
  1031. struct list_head *pos, *upos;
  1032. char ubuf[512], *dp, *end;
  1033. unsigned long flags;
  1034. struct urb *urb;
  1035. int epnum, ret;
  1036. spin_lock_irqsave(&max3421_hcd->lock, flags);
  1037. list_for_each(pos, &max3421_hcd->ep_list) {
  1038. max3421_ep = container_of(pos, struct max3421_ep, ep_list);
  1039. ep = max3421_ep->ep;
  1040. dp = ubuf;
  1041. end = dp + sizeof(ubuf);
  1042. *dp = '\0';
  1043. list_for_each(upos, &ep->urb_list) {
  1044. urb = container_of(upos, struct urb, urb_list);
  1045. ret = snprintf(dp, end - dp, " %p(%d.%s %d/%d)", urb,
  1046. usb_pipetype(urb->pipe),
  1047. usb_urb_dir_in(urb) ? "IN" : "OUT",
  1048. urb->actual_length,
  1049. urb->transfer_buffer_length);
  1050. if (ret < 0 || ret >= end - dp)
  1051. break; /* error or buffer full */
  1052. dp += ret;
  1053. }
  1054. epnum = usb_endpoint_num(&ep->desc);
  1055. pr_info("EP%0u %u lst %04u rtr %u nak %6u rxmt %u: %s\n",
  1056. epnum, max3421_ep->pkt_state, max3421_ep->last_active,
  1057. max3421_ep->retries, max3421_ep->naks,
  1058. max3421_ep->retransmit, ubuf);
  1059. }
  1060. spin_unlock_irqrestore(&max3421_hcd->lock, flags);
  1061. }
  1062. #endif /* DEBUG */
  1063. /* Return zero if no work was performed, 1 otherwise. */
  1064. static int
  1065. max3421_handle_irqs(struct usb_hcd *hcd)
  1066. {
  1067. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  1068. u32 chg, old_port_status;
  1069. unsigned long flags;
  1070. u8 hirq;
  1071. /*
  1072. * Read and ack pending interrupts (CPU must never
  1073. * clear SNDBAV directly and RCVDAV must be cleared by
  1074. * max3421_recv_data_available()!):
  1075. */
  1076. hirq = spi_rd8(hcd, MAX3421_REG_HIRQ);
  1077. hirq &= max3421_hcd->hien;
  1078. if (!hirq)
  1079. return 0;
  1080. spi_wr8(hcd, MAX3421_REG_HIRQ,
  1081. hirq & ~(BIT(MAX3421_HI_SNDBAV_BIT) |
  1082. BIT(MAX3421_HI_RCVDAV_BIT)));
  1083. if (hirq & BIT(MAX3421_HI_FRAME_BIT)) {
  1084. max3421_hcd->frame_number = ((max3421_hcd->frame_number + 1)
  1085. & USB_MAX_FRAME_NUMBER);
  1086. max3421_hcd->sched_pass = SCHED_PASS_PERIODIC;
  1087. }
  1088. if (hirq & BIT(MAX3421_HI_RCVDAV_BIT))
  1089. max3421_recv_data_available(hcd);
  1090. if (hirq & BIT(MAX3421_HI_HXFRDN_BIT))
  1091. max3421_host_transfer_done(hcd);
  1092. if (hirq & BIT(MAX3421_HI_CONDET_BIT))
  1093. max3421_detect_conn(hcd);
  1094. /*
  1095. * Now process interrupts that may affect HCD state
  1096. * other than the end-points:
  1097. */
  1098. spin_lock_irqsave(&max3421_hcd->lock, flags);
  1099. old_port_status = max3421_hcd->port_status;
  1100. if (hirq & BIT(MAX3421_HI_BUSEVENT_BIT)) {
  1101. if (max3421_hcd->port_status & USB_PORT_STAT_RESET) {
  1102. /* BUSEVENT due to completion of Bus Reset */
  1103. max3421_hcd->port_status &= ~USB_PORT_STAT_RESET;
  1104. max3421_hcd->port_status |= USB_PORT_STAT_ENABLE;
  1105. } else {
  1106. /* BUSEVENT due to completion of Bus Resume */
  1107. pr_info("%s: BUSEVENT Bus Resume Done\n", __func__);
  1108. }
  1109. }
  1110. if (hirq & BIT(MAX3421_HI_RWU_BIT))
  1111. pr_info("%s: RWU\n", __func__);
  1112. if (hirq & BIT(MAX3421_HI_SUSDN_BIT))
  1113. pr_info("%s: SUSDN\n", __func__);
  1114. chg = (old_port_status ^ max3421_hcd->port_status);
  1115. max3421_hcd->port_status |= chg << 16;
  1116. spin_unlock_irqrestore(&max3421_hcd->lock, flags);
  1117. #ifdef DEBUG
  1118. {
  1119. static unsigned long last_time;
  1120. char sbuf[16 * 16], *dp, *end;
  1121. int i;
  1122. if (jiffies - last_time > 5*HZ) {
  1123. dp = sbuf;
  1124. end = sbuf + sizeof(sbuf);
  1125. *dp = '\0';
  1126. for (i = 0; i < 16; ++i) {
  1127. int ret = snprintf(dp, end - dp, " %lu",
  1128. max3421_hcd->err_stat[i]);
  1129. if (ret < 0 || ret >= end - dp)
  1130. break; /* error or buffer full */
  1131. dp += ret;
  1132. }
  1133. pr_info("%s: hrsl_stats %s\n", __func__, sbuf);
  1134. memset(max3421_hcd->err_stat, 0,
  1135. sizeof(max3421_hcd->err_stat));
  1136. last_time = jiffies;
  1137. dump_eps(hcd);
  1138. }
  1139. }
  1140. #endif
  1141. return 1;
  1142. }
  1143. static int
  1144. max3421_reset_hcd(struct usb_hcd *hcd)
  1145. {
  1146. struct spi_device *spi = to_spi_device(hcd->self.controller);
  1147. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  1148. int timeout;
  1149. /* perform a chip reset and wait for OSCIRQ signal to appear: */
  1150. spi_wr8(hcd, MAX3421_REG_USBCTL, BIT(MAX3421_USBCTL_CHIPRES_BIT));
  1151. /* clear reset: */
  1152. spi_wr8(hcd, MAX3421_REG_USBCTL, 0);
  1153. timeout = 1000;
  1154. while (1) {
  1155. if (spi_rd8(hcd, MAX3421_REG_USBIRQ)
  1156. & BIT(MAX3421_USBIRQ_OSCOKIRQ_BIT))
  1157. break;
  1158. if (--timeout < 0) {
  1159. dev_err(&spi->dev,
  1160. "timed out waiting for oscillator OK signal");
  1161. return 1;
  1162. }
  1163. cond_resched();
  1164. }
  1165. /*
  1166. * Turn on host mode, automatic generation of SOF packets, and
  1167. * enable pull-down registers on DM/DP:
  1168. */
  1169. max3421_hcd->mode = (BIT(MAX3421_MODE_HOST_BIT) |
  1170. BIT(MAX3421_MODE_SOFKAENAB_BIT) |
  1171. BIT(MAX3421_MODE_DMPULLDN_BIT) |
  1172. BIT(MAX3421_MODE_DPPULLDN_BIT));
  1173. spi_wr8(hcd, MAX3421_REG_MODE, max3421_hcd->mode);
  1174. /* reset frame-number: */
  1175. max3421_hcd->frame_number = USB_MAX_FRAME_NUMBER;
  1176. spi_wr8(hcd, MAX3421_REG_HCTL, BIT(MAX3421_HCTL_FRMRST_BIT));
  1177. /* sample the state of the D+ and D- lines */
  1178. spi_wr8(hcd, MAX3421_REG_HCTL, BIT(MAX3421_HCTL_SAMPLEBUS_BIT));
  1179. max3421_detect_conn(hcd);
  1180. /* enable frame, connection-detected, and bus-event interrupts: */
  1181. max3421_hcd->hien = (BIT(MAX3421_HI_FRAME_BIT) |
  1182. BIT(MAX3421_HI_CONDET_BIT) |
  1183. BIT(MAX3421_HI_BUSEVENT_BIT));
  1184. spi_wr8(hcd, MAX3421_REG_HIEN, max3421_hcd->hien);
  1185. /* enable interrupts: */
  1186. spi_wr8(hcd, MAX3421_REG_CPUCTL, BIT(MAX3421_CPUCTL_IE_BIT));
  1187. return 1;
  1188. }
  1189. static int
  1190. max3421_urb_done(struct usb_hcd *hcd)
  1191. {
  1192. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  1193. unsigned long flags;
  1194. struct urb *urb;
  1195. int status;
  1196. status = max3421_hcd->urb_done;
  1197. max3421_hcd->urb_done = 0;
  1198. if (status > 0)
  1199. status = 0;
  1200. urb = max3421_hcd->curr_urb;
  1201. if (urb) {
  1202. max3421_hcd->curr_urb = NULL;
  1203. spin_lock_irqsave(&max3421_hcd->lock, flags);
  1204. usb_hcd_unlink_urb_from_ep(hcd, urb);
  1205. spin_unlock_irqrestore(&max3421_hcd->lock, flags);
  1206. /* must be called without the HCD spinlock: */
  1207. usb_hcd_giveback_urb(hcd, urb, status);
  1208. }
  1209. return 1;
  1210. }
  1211. static int
  1212. max3421_spi_thread(void *dev_id)
  1213. {
  1214. struct usb_hcd *hcd = dev_id;
  1215. struct spi_device *spi = to_spi_device(hcd->self.controller);
  1216. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  1217. int i, i_worked = 1;
  1218. /* set full-duplex SPI mode, low-active interrupt pin: */
  1219. spi_wr8(hcd, MAX3421_REG_PINCTL,
  1220. (BIT(MAX3421_PINCTL_FDUPSPI_BIT) | /* full-duplex */
  1221. BIT(MAX3421_PINCTL_INTLEVEL_BIT))); /* low-active irq */
  1222. while (!kthread_should_stop()) {
  1223. max3421_hcd->rev = spi_rd8(hcd, MAX3421_REG_REVISION);
  1224. if (max3421_hcd->rev == 0x12 || max3421_hcd->rev == 0x13)
  1225. break;
  1226. dev_err(&spi->dev, "bad rev 0x%02x", max3421_hcd->rev);
  1227. msleep(10000);
  1228. }
  1229. dev_info(&spi->dev, "rev 0x%x, SPI clk %dHz, bpw %u, irq %d\n",
  1230. max3421_hcd->rev, spi->max_speed_hz, spi->bits_per_word,
  1231. spi->irq);
  1232. while (!kthread_should_stop()) {
  1233. if (!i_worked) {
  1234. /*
  1235. * We'll be waiting for wakeups from the hard
  1236. * interrupt handler, so now is a good time to
  1237. * sync our hien with the chip:
  1238. */
  1239. spi_wr8(hcd, MAX3421_REG_HIEN, max3421_hcd->hien);
  1240. set_current_state(TASK_INTERRUPTIBLE);
  1241. if (test_and_clear_bit(ENABLE_IRQ, &max3421_hcd->todo))
  1242. enable_irq(spi->irq);
  1243. schedule();
  1244. __set_current_state(TASK_RUNNING);
  1245. }
  1246. i_worked = 0;
  1247. if (max3421_hcd->urb_done)
  1248. i_worked |= max3421_urb_done(hcd);
  1249. else if (max3421_handle_irqs(hcd))
  1250. i_worked = 1;
  1251. else if (!max3421_hcd->curr_urb)
  1252. i_worked |= max3421_select_and_start_urb(hcd);
  1253. if (test_and_clear_bit(RESET_HCD, &max3421_hcd->todo))
  1254. /* reset the HCD: */
  1255. i_worked |= max3421_reset_hcd(hcd);
  1256. if (test_and_clear_bit(RESET_PORT, &max3421_hcd->todo)) {
  1257. /* perform a USB bus reset: */
  1258. spi_wr8(hcd, MAX3421_REG_HCTL,
  1259. BIT(MAX3421_HCTL_BUSRST_BIT));
  1260. i_worked = 1;
  1261. }
  1262. if (test_and_clear_bit(CHECK_UNLINK, &max3421_hcd->todo))
  1263. i_worked |= max3421_check_unlink(hcd);
  1264. if (test_and_clear_bit(IOPIN_UPDATE, &max3421_hcd->todo)) {
  1265. /*
  1266. * IOPINS1/IOPINS2 do not auto-increment, so we can't
  1267. * use spi_wr_buf().
  1268. */
  1269. for (i = 0; i < ARRAY_SIZE(max3421_hcd->iopins); ++i) {
  1270. u8 val = spi_rd8(hcd, MAX3421_REG_IOPINS1);
  1271. val = ((val & 0xf0) |
  1272. (max3421_hcd->iopins[i] & 0x0f));
  1273. spi_wr8(hcd, MAX3421_REG_IOPINS1 + i, val);
  1274. max3421_hcd->iopins[i] = val;
  1275. }
  1276. i_worked = 1;
  1277. }
  1278. }
  1279. set_current_state(TASK_RUNNING);
  1280. dev_info(&spi->dev, "SPI thread exiting");
  1281. return 0;
  1282. }
  1283. static int
  1284. max3421_reset_port(struct usb_hcd *hcd)
  1285. {
  1286. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  1287. max3421_hcd->port_status &= ~(USB_PORT_STAT_ENABLE |
  1288. USB_PORT_STAT_LOW_SPEED);
  1289. max3421_hcd->port_status |= USB_PORT_STAT_RESET;
  1290. set_bit(RESET_PORT, &max3421_hcd->todo);
  1291. wake_up_process(max3421_hcd->spi_thread);
  1292. return 0;
  1293. }
  1294. static int
  1295. max3421_reset(struct usb_hcd *hcd)
  1296. {
  1297. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  1298. hcd->self.sg_tablesize = 0;
  1299. hcd->speed = HCD_USB2;
  1300. hcd->self.root_hub->speed = USB_SPEED_FULL;
  1301. set_bit(RESET_HCD, &max3421_hcd->todo);
  1302. wake_up_process(max3421_hcd->spi_thread);
  1303. return 0;
  1304. }
  1305. static int
  1306. max3421_start(struct usb_hcd *hcd)
  1307. {
  1308. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  1309. spin_lock_init(&max3421_hcd->lock);
  1310. max3421_hcd->rh_state = MAX3421_RH_RUNNING;
  1311. INIT_LIST_HEAD(&max3421_hcd->ep_list);
  1312. hcd->power_budget = POWER_BUDGET;
  1313. hcd->state = HC_STATE_RUNNING;
  1314. hcd->uses_new_polling = 1;
  1315. return 0;
  1316. }
  1317. static void
  1318. max3421_stop(struct usb_hcd *hcd)
  1319. {
  1320. }
  1321. static int
  1322. max3421_urb_enqueue(struct usb_hcd *hcd, struct urb *urb, gfp_t mem_flags)
  1323. {
  1324. struct spi_device *spi = to_spi_device(hcd->self.controller);
  1325. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  1326. struct max3421_ep *max3421_ep;
  1327. unsigned long flags;
  1328. int retval;
  1329. switch (usb_pipetype(urb->pipe)) {
  1330. case PIPE_INTERRUPT:
  1331. case PIPE_ISOCHRONOUS:
  1332. if (urb->interval < 0) {
  1333. dev_err(&spi->dev,
  1334. "%s: interval=%d for intr-/iso-pipe; expected > 0\n",
  1335. __func__, urb->interval);
  1336. return -EINVAL;
  1337. }
  1338. default:
  1339. break;
  1340. }
  1341. spin_lock_irqsave(&max3421_hcd->lock, flags);
  1342. max3421_ep = urb->ep->hcpriv;
  1343. if (!max3421_ep) {
  1344. /* gets freed in max3421_endpoint_disable: */
  1345. max3421_ep = kzalloc(sizeof(struct max3421_ep), GFP_ATOMIC);
  1346. if (!max3421_ep) {
  1347. retval = -ENOMEM;
  1348. goto out;
  1349. }
  1350. max3421_ep->ep = urb->ep;
  1351. max3421_ep->last_active = max3421_hcd->frame_number;
  1352. urb->ep->hcpriv = max3421_ep;
  1353. list_add_tail(&max3421_ep->ep_list, &max3421_hcd->ep_list);
  1354. }
  1355. retval = usb_hcd_link_urb_to_ep(hcd, urb);
  1356. if (retval == 0) {
  1357. /* Since we added to the queue, restart scheduling: */
  1358. max3421_hcd->sched_pass = SCHED_PASS_PERIODIC;
  1359. wake_up_process(max3421_hcd->spi_thread);
  1360. }
  1361. out:
  1362. spin_unlock_irqrestore(&max3421_hcd->lock, flags);
  1363. return retval;
  1364. }
  1365. static int
  1366. max3421_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
  1367. {
  1368. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  1369. unsigned long flags;
  1370. int retval;
  1371. spin_lock_irqsave(&max3421_hcd->lock, flags);
  1372. /*
  1373. * This will set urb->unlinked which in turn causes the entry
  1374. * to be dropped at the next opportunity.
  1375. */
  1376. retval = usb_hcd_check_unlink_urb(hcd, urb, status);
  1377. if (retval == 0) {
  1378. set_bit(CHECK_UNLINK, &max3421_hcd->todo);
  1379. wake_up_process(max3421_hcd->spi_thread);
  1380. }
  1381. spin_unlock_irqrestore(&max3421_hcd->lock, flags);
  1382. return retval;
  1383. }
  1384. static void
  1385. max3421_endpoint_disable(struct usb_hcd *hcd, struct usb_host_endpoint *ep)
  1386. {
  1387. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  1388. unsigned long flags;
  1389. spin_lock_irqsave(&max3421_hcd->lock, flags);
  1390. if (ep->hcpriv) {
  1391. struct max3421_ep *max3421_ep = ep->hcpriv;
  1392. /* remove myself from the ep_list: */
  1393. if (!list_empty(&max3421_ep->ep_list))
  1394. list_del(&max3421_ep->ep_list);
  1395. kfree(max3421_ep);
  1396. ep->hcpriv = NULL;
  1397. }
  1398. spin_unlock_irqrestore(&max3421_hcd->lock, flags);
  1399. }
  1400. static int
  1401. max3421_get_frame_number(struct usb_hcd *hcd)
  1402. {
  1403. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  1404. return max3421_hcd->frame_number;
  1405. }
  1406. /*
  1407. * Should return a non-zero value when any port is undergoing a resume
  1408. * transition while the root hub is suspended.
  1409. */
  1410. static int
  1411. max3421_hub_status_data(struct usb_hcd *hcd, char *buf)
  1412. {
  1413. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  1414. unsigned long flags;
  1415. int retval = 0;
  1416. spin_lock_irqsave(&max3421_hcd->lock, flags);
  1417. if (!HCD_HW_ACCESSIBLE(hcd))
  1418. goto done;
  1419. *buf = 0;
  1420. if ((max3421_hcd->port_status & PORT_C_MASK) != 0) {
  1421. *buf = (1 << 1); /* a hub over-current condition exists */
  1422. dev_dbg(hcd->self.controller,
  1423. "port status 0x%08x has changes\n",
  1424. max3421_hcd->port_status);
  1425. retval = 1;
  1426. if (max3421_hcd->rh_state == MAX3421_RH_SUSPENDED)
  1427. usb_hcd_resume_root_hub(hcd);
  1428. }
  1429. done:
  1430. spin_unlock_irqrestore(&max3421_hcd->lock, flags);
  1431. return retval;
  1432. }
  1433. static inline void
  1434. hub_descriptor(struct usb_hub_descriptor *desc)
  1435. {
  1436. memset(desc, 0, sizeof(*desc));
  1437. /*
  1438. * See Table 11-13: Hub Descriptor in USB 2.0 spec.
  1439. */
  1440. desc->bDescriptorType = 0x29; /* hub descriptor */
  1441. desc->bDescLength = 9;
  1442. desc->wHubCharacteristics = cpu_to_le16(0x0001);
  1443. desc->bNbrPorts = 1;
  1444. }
  1445. /*
  1446. * Set the MAX3421E general-purpose output with number PIN_NUMBER to
  1447. * VALUE (0 or 1). PIN_NUMBER may be in the range from 1-8. For
  1448. * any other value, this function acts as a no-op.
  1449. */
  1450. static void
  1451. max3421_gpout_set_value(struct usb_hcd *hcd, u8 pin_number, u8 value)
  1452. {
  1453. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  1454. u8 mask, idx;
  1455. --pin_number;
  1456. if (pin_number > 7)
  1457. return;
  1458. mask = 1u << pin_number;
  1459. idx = pin_number / 4;
  1460. if (value)
  1461. max3421_hcd->iopins[idx] |= mask;
  1462. else
  1463. max3421_hcd->iopins[idx] &= ~mask;
  1464. set_bit(IOPIN_UPDATE, &max3421_hcd->todo);
  1465. wake_up_process(max3421_hcd->spi_thread);
  1466. }
  1467. static int
  1468. max3421_hub_control(struct usb_hcd *hcd, u16 type_req, u16 value, u16 index,
  1469. char *buf, u16 length)
  1470. {
  1471. struct spi_device *spi = to_spi_device(hcd->self.controller);
  1472. struct max3421_hcd *max3421_hcd = hcd_to_max3421(hcd);
  1473. struct max3421_hcd_platform_data *pdata;
  1474. unsigned long flags;
  1475. int retval = 0;
  1476. spin_lock_irqsave(&max3421_hcd->lock, flags);
  1477. pdata = spi->dev.platform_data;
  1478. switch (type_req) {
  1479. case ClearHubFeature:
  1480. break;
  1481. case ClearPortFeature:
  1482. switch (value) {
  1483. case USB_PORT_FEAT_SUSPEND:
  1484. break;
  1485. case USB_PORT_FEAT_POWER:
  1486. dev_dbg(hcd->self.controller, "power-off\n");
  1487. max3421_gpout_set_value(hcd, pdata->vbus_gpout,
  1488. !pdata->vbus_active_level);
  1489. /* FALLS THROUGH */
  1490. default:
  1491. max3421_hcd->port_status &= ~(1 << value);
  1492. }
  1493. break;
  1494. case GetHubDescriptor:
  1495. hub_descriptor((struct usb_hub_descriptor *) buf);
  1496. break;
  1497. case DeviceRequest | USB_REQ_GET_DESCRIPTOR:
  1498. case GetPortErrorCount:
  1499. case SetHubDepth:
  1500. /* USB3 only */
  1501. goto error;
  1502. case GetHubStatus:
  1503. *(__le32 *) buf = cpu_to_le32(0);
  1504. break;
  1505. case GetPortStatus:
  1506. if (index != 1) {
  1507. retval = -EPIPE;
  1508. goto error;
  1509. }
  1510. ((__le16 *) buf)[0] = cpu_to_le16(max3421_hcd->port_status);
  1511. ((__le16 *) buf)[1] =
  1512. cpu_to_le16(max3421_hcd->port_status >> 16);
  1513. break;
  1514. case SetHubFeature:
  1515. retval = -EPIPE;
  1516. break;
  1517. case SetPortFeature:
  1518. switch (value) {
  1519. case USB_PORT_FEAT_LINK_STATE:
  1520. case USB_PORT_FEAT_U1_TIMEOUT:
  1521. case USB_PORT_FEAT_U2_TIMEOUT:
  1522. case USB_PORT_FEAT_BH_PORT_RESET:
  1523. goto error;
  1524. case USB_PORT_FEAT_SUSPEND:
  1525. if (max3421_hcd->active)
  1526. max3421_hcd->port_status |=
  1527. USB_PORT_STAT_SUSPEND;
  1528. break;
  1529. case USB_PORT_FEAT_POWER:
  1530. dev_dbg(hcd->self.controller, "power-on\n");
  1531. max3421_hcd->port_status |= USB_PORT_STAT_POWER;
  1532. max3421_gpout_set_value(hcd, pdata->vbus_gpout,
  1533. pdata->vbus_active_level);
  1534. break;
  1535. case USB_PORT_FEAT_RESET:
  1536. max3421_reset_port(hcd);
  1537. /* FALLS THROUGH */
  1538. default:
  1539. if ((max3421_hcd->port_status & USB_PORT_STAT_POWER)
  1540. != 0)
  1541. max3421_hcd->port_status |= (1 << value);
  1542. }
  1543. break;
  1544. default:
  1545. dev_dbg(hcd->self.controller,
  1546. "hub control req%04x v%04x i%04x l%d\n",
  1547. type_req, value, index, length);
  1548. error: /* "protocol stall" on error */
  1549. retval = -EPIPE;
  1550. }
  1551. spin_unlock_irqrestore(&max3421_hcd->lock, flags);
  1552. return retval;
  1553. }
  1554. static int
  1555. max3421_bus_suspend(struct usb_hcd *hcd)
  1556. {
  1557. return -1;
  1558. }
  1559. static int
  1560. max3421_bus_resume(struct usb_hcd *hcd)
  1561. {
  1562. return -1;
  1563. }
  1564. /*
  1565. * The SPI driver already takes care of DMA-mapping/unmapping, so no
  1566. * reason to do it twice.
  1567. */
  1568. static int
  1569. max3421_map_urb_for_dma(struct usb_hcd *hcd, struct urb *urb, gfp_t mem_flags)
  1570. {
  1571. return 0;
  1572. }
  1573. static void
  1574. max3421_unmap_urb_for_dma(struct usb_hcd *hcd, struct urb *urb)
  1575. {
  1576. }
  1577. static struct hc_driver max3421_hcd_desc = {
  1578. .description = "max3421",
  1579. .product_desc = DRIVER_DESC,
  1580. .hcd_priv_size = sizeof(struct max3421_hcd),
  1581. .flags = HCD_USB11,
  1582. .reset = max3421_reset,
  1583. .start = max3421_start,
  1584. .stop = max3421_stop,
  1585. .get_frame_number = max3421_get_frame_number,
  1586. .urb_enqueue = max3421_urb_enqueue,
  1587. .urb_dequeue = max3421_urb_dequeue,
  1588. .map_urb_for_dma = max3421_map_urb_for_dma,
  1589. .unmap_urb_for_dma = max3421_unmap_urb_for_dma,
  1590. .endpoint_disable = max3421_endpoint_disable,
  1591. .hub_status_data = max3421_hub_status_data,
  1592. .hub_control = max3421_hub_control,
  1593. .bus_suspend = max3421_bus_suspend,
  1594. .bus_resume = max3421_bus_resume,
  1595. };
  1596. static int
  1597. max3421_probe(struct spi_device *spi)
  1598. {
  1599. struct max3421_hcd *max3421_hcd;
  1600. struct usb_hcd *hcd = NULL;
  1601. int retval = -ENOMEM;
  1602. if (spi_setup(spi) < 0) {
  1603. dev_err(&spi->dev, "Unable to setup SPI bus");
  1604. return -EFAULT;
  1605. }
  1606. hcd = usb_create_hcd(&max3421_hcd_desc, &spi->dev,
  1607. dev_name(&spi->dev));
  1608. if (!hcd) {
  1609. dev_err(&spi->dev, "failed to create HCD structure\n");
  1610. goto error;
  1611. }
  1612. set_bit(HCD_FLAG_POLL_RH, &hcd->flags);
  1613. max3421_hcd = hcd_to_max3421(hcd);
  1614. max3421_hcd->next = max3421_hcd_list;
  1615. max3421_hcd_list = max3421_hcd;
  1616. INIT_LIST_HEAD(&max3421_hcd->ep_list);
  1617. max3421_hcd->tx = kmalloc(sizeof(*max3421_hcd->tx), GFP_KERNEL);
  1618. if (!max3421_hcd->tx) {
  1619. dev_err(&spi->dev, "failed to kmalloc tx buffer\n");
  1620. goto error;
  1621. }
  1622. max3421_hcd->rx = kmalloc(sizeof(*max3421_hcd->rx), GFP_KERNEL);
  1623. if (!max3421_hcd->rx) {
  1624. dev_err(&spi->dev, "failed to kmalloc rx buffer\n");
  1625. goto error;
  1626. }
  1627. max3421_hcd->spi_thread = kthread_run(max3421_spi_thread, hcd,
  1628. "max3421_spi_thread");
  1629. if (max3421_hcd->spi_thread == ERR_PTR(-ENOMEM)) {
  1630. dev_err(&spi->dev,
  1631. "failed to create SPI thread (out of memory)\n");
  1632. goto error;
  1633. }
  1634. retval = usb_add_hcd(hcd, 0, 0);
  1635. if (retval) {
  1636. dev_err(&spi->dev, "failed to add HCD\n");
  1637. goto error;
  1638. }
  1639. retval = request_irq(spi->irq, max3421_irq_handler,
  1640. IRQF_TRIGGER_LOW, "max3421", hcd);
  1641. if (retval < 0) {
  1642. dev_err(&spi->dev, "failed to request irq %d\n", spi->irq);
  1643. goto error;
  1644. }
  1645. return 0;
  1646. error:
  1647. if (hcd) {
  1648. kfree(max3421_hcd->tx);
  1649. kfree(max3421_hcd->rx);
  1650. if (max3421_hcd->spi_thread)
  1651. kthread_stop(max3421_hcd->spi_thread);
  1652. usb_put_hcd(hcd);
  1653. }
  1654. return retval;
  1655. }
  1656. static int
  1657. max3421_remove(struct spi_device *spi)
  1658. {
  1659. struct max3421_hcd *max3421_hcd = NULL, **prev;
  1660. struct usb_hcd *hcd = NULL;
  1661. unsigned long flags;
  1662. for (prev = &max3421_hcd_list; *prev; prev = &(*prev)->next) {
  1663. max3421_hcd = *prev;
  1664. hcd = max3421_to_hcd(max3421_hcd);
  1665. if (hcd->self.controller == &spi->dev)
  1666. break;
  1667. }
  1668. if (!max3421_hcd) {
  1669. dev_err(&spi->dev, "no MAX3421 HCD found for SPI device %p\n",
  1670. spi);
  1671. return -ENODEV;
  1672. }
  1673. usb_remove_hcd(hcd);
  1674. spin_lock_irqsave(&max3421_hcd->lock, flags);
  1675. kthread_stop(max3421_hcd->spi_thread);
  1676. *prev = max3421_hcd->next;
  1677. spin_unlock_irqrestore(&max3421_hcd->lock, flags);
  1678. free_irq(spi->irq, hcd);
  1679. usb_put_hcd(hcd);
  1680. return 0;
  1681. }
  1682. static struct spi_driver max3421_driver = {
  1683. .probe = max3421_probe,
  1684. .remove = max3421_remove,
  1685. .driver = {
  1686. .name = "max3421-hcd",
  1687. .owner = THIS_MODULE,
  1688. },
  1689. };
  1690. module_spi_driver(max3421_driver);
  1691. MODULE_DESCRIPTION(DRIVER_DESC);
  1692. MODULE_AUTHOR("David Mosberger <davidm@egauge.net>");
  1693. MODULE_LICENSE("GPL");