mpt2sas_base.c 137 KB

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  1. /*
  2. * This is the Fusion MPT base driver providing common API layer interface
  3. * for access to MPT (Message Passing Technology) firmware.
  4. *
  5. * This code is based on drivers/scsi/mpt2sas/mpt2_base.c
  6. * Copyright (C) 2007-2014 LSI Corporation
  7. * (mailto:DL-MPTFusionLinux@lsi.com)
  8. *
  9. * This program is free software; you can redistribute it and/or
  10. * modify it under the terms of the GNU General Public License
  11. * as published by the Free Software Foundation; either version 2
  12. * of the License, or (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * NO WARRANTY
  20. * THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR
  21. * CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT
  22. * LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,
  23. * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is
  24. * solely responsible for determining the appropriateness of using and
  25. * distributing the Program and assumes all risks associated with its
  26. * exercise of rights under this Agreement, including but not limited to
  27. * the risks and costs of program errors, damage to or loss of data,
  28. * programs or equipment, and unavailability or interruption of operations.
  29. * DISCLAIMER OF LIABILITY
  30. * NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY
  31. * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  32. * DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND
  33. * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
  34. * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
  35. * USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED
  36. * HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES
  37. * You should have received a copy of the GNU General Public License
  38. * along with this program; if not, write to the Free Software
  39. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301,
  40. * USA.
  41. */
  42. #include <linux/kernel.h>
  43. #include <linux/module.h>
  44. #include <linux/errno.h>
  45. #include <linux/init.h>
  46. #include <linux/slab.h>
  47. #include <linux/types.h>
  48. #include <linux/pci.h>
  49. #include <linux/kdev_t.h>
  50. #include <linux/blkdev.h>
  51. #include <linux/delay.h>
  52. #include <linux/interrupt.h>
  53. #include <linux/dma-mapping.h>
  54. #include <linux/sort.h>
  55. #include <linux/io.h>
  56. #include <linux/time.h>
  57. #include <linux/kthread.h>
  58. #include <linux/aer.h>
  59. #include "mpt2sas_base.h"
  60. static MPT_CALLBACK mpt_callbacks[MPT_MAX_CALLBACKS];
  61. #define FAULT_POLLING_INTERVAL 1000 /* in milliseconds */
  62. #define MAX_HBA_QUEUE_DEPTH 30000
  63. #define MAX_CHAIN_DEPTH 100000
  64. static int max_queue_depth = -1;
  65. module_param(max_queue_depth, int, 0);
  66. MODULE_PARM_DESC(max_queue_depth, " max controller queue depth ");
  67. static int max_sgl_entries = -1;
  68. module_param(max_sgl_entries, int, 0);
  69. MODULE_PARM_DESC(max_sgl_entries, " max sg entries ");
  70. static int msix_disable = -1;
  71. module_param(msix_disable, int, 0);
  72. MODULE_PARM_DESC(msix_disable, " disable msix routed interrupts (default=0)");
  73. static int max_msix_vectors = -1;
  74. module_param(max_msix_vectors, int, 0);
  75. MODULE_PARM_DESC(max_msix_vectors, " max msix vectors ");
  76. static int mpt2sas_fwfault_debug;
  77. MODULE_PARM_DESC(mpt2sas_fwfault_debug, " enable detection of firmware fault "
  78. "and halt firmware - (default=0)");
  79. static int disable_discovery = -1;
  80. module_param(disable_discovery, int, 0);
  81. MODULE_PARM_DESC(disable_discovery, " disable discovery ");
  82. static int
  83. _base_get_ioc_facts(struct MPT2SAS_ADAPTER *ioc, int sleep_flag);
  84. static int
  85. _base_diag_reset(struct MPT2SAS_ADAPTER *ioc, int sleep_flag);
  86. /**
  87. * _scsih_set_fwfault_debug - global setting of ioc->fwfault_debug.
  88. *
  89. */
  90. static int
  91. _scsih_set_fwfault_debug(const char *val, struct kernel_param *kp)
  92. {
  93. int ret = param_set_int(val, kp);
  94. struct MPT2SAS_ADAPTER *ioc;
  95. if (ret)
  96. return ret;
  97. printk(KERN_INFO "setting fwfault_debug(%d)\n", mpt2sas_fwfault_debug);
  98. list_for_each_entry(ioc, &mpt2sas_ioc_list, list)
  99. ioc->fwfault_debug = mpt2sas_fwfault_debug;
  100. return 0;
  101. }
  102. module_param_call(mpt2sas_fwfault_debug, _scsih_set_fwfault_debug,
  103. param_get_int, &mpt2sas_fwfault_debug, 0644);
  104. /**
  105. * mpt2sas_remove_dead_ioc_func - kthread context to remove dead ioc
  106. * @arg: input argument, used to derive ioc
  107. *
  108. * Return 0 if controller is removed from pci subsystem.
  109. * Return -1 for other case.
  110. */
  111. static int mpt2sas_remove_dead_ioc_func(void *arg)
  112. {
  113. struct MPT2SAS_ADAPTER *ioc = (struct MPT2SAS_ADAPTER *)arg;
  114. struct pci_dev *pdev;
  115. if ((ioc == NULL))
  116. return -1;
  117. pdev = ioc->pdev;
  118. if ((pdev == NULL))
  119. return -1;
  120. pci_stop_and_remove_bus_device_locked(pdev);
  121. return 0;
  122. }
  123. /**
  124. * _base_fault_reset_work - workq handling ioc fault conditions
  125. * @work: input argument, used to derive ioc
  126. * Context: sleep.
  127. *
  128. * Return nothing.
  129. */
  130. static void
  131. _base_fault_reset_work(struct work_struct *work)
  132. {
  133. struct MPT2SAS_ADAPTER *ioc =
  134. container_of(work, struct MPT2SAS_ADAPTER, fault_reset_work.work);
  135. unsigned long flags;
  136. u32 doorbell;
  137. int rc;
  138. struct task_struct *p;
  139. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  140. if (ioc->shost_recovery || ioc->pci_error_recovery)
  141. goto rearm_timer;
  142. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  143. doorbell = mpt2sas_base_get_iocstate(ioc, 0);
  144. if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_MASK) {
  145. printk(MPT2SAS_INFO_FMT "%s : SAS host is non-operational !!!!\n",
  146. ioc->name, __func__);
  147. /* It may be possible that EEH recovery can resolve some of
  148. * pci bus failure issues rather removing the dead ioc function
  149. * by considering controller is in a non-operational state. So
  150. * here priority is given to the EEH recovery. If it doesn't
  151. * not resolve this issue, mpt2sas driver will consider this
  152. * controller to non-operational state and remove the dead ioc
  153. * function.
  154. */
  155. if (ioc->non_operational_loop++ < 5) {
  156. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock,
  157. flags);
  158. goto rearm_timer;
  159. }
  160. /*
  161. * Call _scsih_flush_pending_cmds callback so that we flush all
  162. * pending commands back to OS. This call is required to aovid
  163. * deadlock at block layer. Dead IOC will fail to do diag reset,
  164. * and this call is safe since dead ioc will never return any
  165. * command back from HW.
  166. */
  167. ioc->schedule_dead_ioc_flush_running_cmds(ioc);
  168. /*
  169. * Set remove_host flag early since kernel thread will
  170. * take some time to execute.
  171. */
  172. ioc->remove_host = 1;
  173. /*Remove the Dead Host */
  174. p = kthread_run(mpt2sas_remove_dead_ioc_func, ioc,
  175. "mpt2sas_dead_ioc_%d", ioc->id);
  176. if (IS_ERR(p)) {
  177. printk(MPT2SAS_ERR_FMT
  178. "%s: Running mpt2sas_dead_ioc thread failed !!!!\n",
  179. ioc->name, __func__);
  180. } else {
  181. printk(MPT2SAS_ERR_FMT
  182. "%s: Running mpt2sas_dead_ioc thread success !!!!\n",
  183. ioc->name, __func__);
  184. }
  185. return; /* don't rearm timer */
  186. }
  187. ioc->non_operational_loop = 0;
  188. if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) {
  189. rc = mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP,
  190. FORCE_BIG_HAMMER);
  191. printk(MPT2SAS_WARN_FMT "%s: hard reset: %s\n", ioc->name,
  192. __func__, (rc == 0) ? "success" : "failed");
  193. doorbell = mpt2sas_base_get_iocstate(ioc, 0);
  194. if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT)
  195. mpt2sas_base_fault_info(ioc, doorbell &
  196. MPI2_DOORBELL_DATA_MASK);
  197. }
  198. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  199. rearm_timer:
  200. if (ioc->fault_reset_work_q)
  201. queue_delayed_work(ioc->fault_reset_work_q,
  202. &ioc->fault_reset_work,
  203. msecs_to_jiffies(FAULT_POLLING_INTERVAL));
  204. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  205. }
  206. /**
  207. * mpt2sas_base_start_watchdog - start the fault_reset_work_q
  208. * @ioc: per adapter object
  209. * Context: sleep.
  210. *
  211. * Return nothing.
  212. */
  213. void
  214. mpt2sas_base_start_watchdog(struct MPT2SAS_ADAPTER *ioc)
  215. {
  216. unsigned long flags;
  217. if (ioc->fault_reset_work_q)
  218. return;
  219. /* initialize fault polling */
  220. INIT_DELAYED_WORK(&ioc->fault_reset_work, _base_fault_reset_work);
  221. snprintf(ioc->fault_reset_work_q_name,
  222. sizeof(ioc->fault_reset_work_q_name), "poll_%d_status", ioc->id);
  223. ioc->fault_reset_work_q =
  224. create_singlethread_workqueue(ioc->fault_reset_work_q_name);
  225. if (!ioc->fault_reset_work_q) {
  226. printk(MPT2SAS_ERR_FMT "%s: failed (line=%d)\n",
  227. ioc->name, __func__, __LINE__);
  228. return;
  229. }
  230. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  231. if (ioc->fault_reset_work_q)
  232. queue_delayed_work(ioc->fault_reset_work_q,
  233. &ioc->fault_reset_work,
  234. msecs_to_jiffies(FAULT_POLLING_INTERVAL));
  235. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  236. }
  237. /**
  238. * mpt2sas_base_stop_watchdog - stop the fault_reset_work_q
  239. * @ioc: per adapter object
  240. * Context: sleep.
  241. *
  242. * Return nothing.
  243. */
  244. void
  245. mpt2sas_base_stop_watchdog(struct MPT2SAS_ADAPTER *ioc)
  246. {
  247. unsigned long flags;
  248. struct workqueue_struct *wq;
  249. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  250. wq = ioc->fault_reset_work_q;
  251. ioc->fault_reset_work_q = NULL;
  252. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  253. if (wq) {
  254. if (!cancel_delayed_work_sync(&ioc->fault_reset_work))
  255. flush_workqueue(wq);
  256. destroy_workqueue(wq);
  257. }
  258. }
  259. /**
  260. * mpt2sas_base_fault_info - verbose translation of firmware FAULT code
  261. * @ioc: per adapter object
  262. * @fault_code: fault code
  263. *
  264. * Return nothing.
  265. */
  266. void
  267. mpt2sas_base_fault_info(struct MPT2SAS_ADAPTER *ioc , u16 fault_code)
  268. {
  269. printk(MPT2SAS_ERR_FMT "fault_state(0x%04x)!\n",
  270. ioc->name, fault_code);
  271. }
  272. /**
  273. * mpt2sas_halt_firmware - halt's mpt controller firmware
  274. * @ioc: per adapter object
  275. *
  276. * For debugging timeout related issues. Writing 0xCOFFEE00
  277. * to the doorbell register will halt controller firmware. With
  278. * the purpose to stop both driver and firmware, the enduser can
  279. * obtain a ring buffer from controller UART.
  280. */
  281. void
  282. mpt2sas_halt_firmware(struct MPT2SAS_ADAPTER *ioc)
  283. {
  284. u32 doorbell;
  285. if (!ioc->fwfault_debug)
  286. return;
  287. dump_stack();
  288. doorbell = readl(&ioc->chip->Doorbell);
  289. if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT)
  290. mpt2sas_base_fault_info(ioc , doorbell);
  291. else {
  292. writel(0xC0FFEE00, &ioc->chip->Doorbell);
  293. printk(MPT2SAS_ERR_FMT "Firmware is halted due to command "
  294. "timeout\n", ioc->name);
  295. }
  296. panic("panic in %s\n", __func__);
  297. }
  298. #ifdef CONFIG_SCSI_MPT2SAS_LOGGING
  299. /**
  300. * _base_sas_ioc_info - verbose translation of the ioc status
  301. * @ioc: per adapter object
  302. * @mpi_reply: reply mf payload returned from firmware
  303. * @request_hdr: request mf
  304. *
  305. * Return nothing.
  306. */
  307. static void
  308. _base_sas_ioc_info(struct MPT2SAS_ADAPTER *ioc, MPI2DefaultReply_t *mpi_reply,
  309. MPI2RequestHeader_t *request_hdr)
  310. {
  311. u16 ioc_status = le16_to_cpu(mpi_reply->IOCStatus) &
  312. MPI2_IOCSTATUS_MASK;
  313. char *desc = NULL;
  314. u16 frame_sz;
  315. char *func_str = NULL;
  316. /* SCSI_IO, RAID_PASS are handled from _scsih_scsi_ioc_info */
  317. if (request_hdr->Function == MPI2_FUNCTION_SCSI_IO_REQUEST ||
  318. request_hdr->Function == MPI2_FUNCTION_RAID_SCSI_IO_PASSTHROUGH ||
  319. request_hdr->Function == MPI2_FUNCTION_EVENT_NOTIFICATION)
  320. return;
  321. if (ioc_status == MPI2_IOCSTATUS_CONFIG_INVALID_PAGE)
  322. return;
  323. switch (ioc_status) {
  324. /****************************************************************************
  325. * Common IOCStatus values for all replies
  326. ****************************************************************************/
  327. case MPI2_IOCSTATUS_INVALID_FUNCTION:
  328. desc = "invalid function";
  329. break;
  330. case MPI2_IOCSTATUS_BUSY:
  331. desc = "busy";
  332. break;
  333. case MPI2_IOCSTATUS_INVALID_SGL:
  334. desc = "invalid sgl";
  335. break;
  336. case MPI2_IOCSTATUS_INTERNAL_ERROR:
  337. desc = "internal error";
  338. break;
  339. case MPI2_IOCSTATUS_INVALID_VPID:
  340. desc = "invalid vpid";
  341. break;
  342. case MPI2_IOCSTATUS_INSUFFICIENT_RESOURCES:
  343. desc = "insufficient resources";
  344. break;
  345. case MPI2_IOCSTATUS_INVALID_FIELD:
  346. desc = "invalid field";
  347. break;
  348. case MPI2_IOCSTATUS_INVALID_STATE:
  349. desc = "invalid state";
  350. break;
  351. case MPI2_IOCSTATUS_OP_STATE_NOT_SUPPORTED:
  352. desc = "op state not supported";
  353. break;
  354. /****************************************************************************
  355. * Config IOCStatus values
  356. ****************************************************************************/
  357. case MPI2_IOCSTATUS_CONFIG_INVALID_ACTION:
  358. desc = "config invalid action";
  359. break;
  360. case MPI2_IOCSTATUS_CONFIG_INVALID_TYPE:
  361. desc = "config invalid type";
  362. break;
  363. case MPI2_IOCSTATUS_CONFIG_INVALID_PAGE:
  364. desc = "config invalid page";
  365. break;
  366. case MPI2_IOCSTATUS_CONFIG_INVALID_DATA:
  367. desc = "config invalid data";
  368. break;
  369. case MPI2_IOCSTATUS_CONFIG_NO_DEFAULTS:
  370. desc = "config no defaults";
  371. break;
  372. case MPI2_IOCSTATUS_CONFIG_CANT_COMMIT:
  373. desc = "config cant commit";
  374. break;
  375. /****************************************************************************
  376. * SCSI IO Reply
  377. ****************************************************************************/
  378. case MPI2_IOCSTATUS_SCSI_RECOVERED_ERROR:
  379. case MPI2_IOCSTATUS_SCSI_INVALID_DEVHANDLE:
  380. case MPI2_IOCSTATUS_SCSI_DEVICE_NOT_THERE:
  381. case MPI2_IOCSTATUS_SCSI_DATA_OVERRUN:
  382. case MPI2_IOCSTATUS_SCSI_DATA_UNDERRUN:
  383. case MPI2_IOCSTATUS_SCSI_IO_DATA_ERROR:
  384. case MPI2_IOCSTATUS_SCSI_PROTOCOL_ERROR:
  385. case MPI2_IOCSTATUS_SCSI_TASK_TERMINATED:
  386. case MPI2_IOCSTATUS_SCSI_RESIDUAL_MISMATCH:
  387. case MPI2_IOCSTATUS_SCSI_TASK_MGMT_FAILED:
  388. case MPI2_IOCSTATUS_SCSI_IOC_TERMINATED:
  389. case MPI2_IOCSTATUS_SCSI_EXT_TERMINATED:
  390. break;
  391. /****************************************************************************
  392. * For use by SCSI Initiator and SCSI Target end-to-end data protection
  393. ****************************************************************************/
  394. case MPI2_IOCSTATUS_EEDP_GUARD_ERROR:
  395. desc = "eedp guard error";
  396. break;
  397. case MPI2_IOCSTATUS_EEDP_REF_TAG_ERROR:
  398. desc = "eedp ref tag error";
  399. break;
  400. case MPI2_IOCSTATUS_EEDP_APP_TAG_ERROR:
  401. desc = "eedp app tag error";
  402. break;
  403. /****************************************************************************
  404. * SCSI Target values
  405. ****************************************************************************/
  406. case MPI2_IOCSTATUS_TARGET_INVALID_IO_INDEX:
  407. desc = "target invalid io index";
  408. break;
  409. case MPI2_IOCSTATUS_TARGET_ABORTED:
  410. desc = "target aborted";
  411. break;
  412. case MPI2_IOCSTATUS_TARGET_NO_CONN_RETRYABLE:
  413. desc = "target no conn retryable";
  414. break;
  415. case MPI2_IOCSTATUS_TARGET_NO_CONNECTION:
  416. desc = "target no connection";
  417. break;
  418. case MPI2_IOCSTATUS_TARGET_XFER_COUNT_MISMATCH:
  419. desc = "target xfer count mismatch";
  420. break;
  421. case MPI2_IOCSTATUS_TARGET_DATA_OFFSET_ERROR:
  422. desc = "target data offset error";
  423. break;
  424. case MPI2_IOCSTATUS_TARGET_TOO_MUCH_WRITE_DATA:
  425. desc = "target too much write data";
  426. break;
  427. case MPI2_IOCSTATUS_TARGET_IU_TOO_SHORT:
  428. desc = "target iu too short";
  429. break;
  430. case MPI2_IOCSTATUS_TARGET_ACK_NAK_TIMEOUT:
  431. desc = "target ack nak timeout";
  432. break;
  433. case MPI2_IOCSTATUS_TARGET_NAK_RECEIVED:
  434. desc = "target nak received";
  435. break;
  436. /****************************************************************************
  437. * Serial Attached SCSI values
  438. ****************************************************************************/
  439. case MPI2_IOCSTATUS_SAS_SMP_REQUEST_FAILED:
  440. desc = "smp request failed";
  441. break;
  442. case MPI2_IOCSTATUS_SAS_SMP_DATA_OVERRUN:
  443. desc = "smp data overrun";
  444. break;
  445. /****************************************************************************
  446. * Diagnostic Buffer Post / Diagnostic Release values
  447. ****************************************************************************/
  448. case MPI2_IOCSTATUS_DIAGNOSTIC_RELEASED:
  449. desc = "diagnostic released";
  450. break;
  451. default:
  452. break;
  453. }
  454. if (!desc)
  455. return;
  456. switch (request_hdr->Function) {
  457. case MPI2_FUNCTION_CONFIG:
  458. frame_sz = sizeof(Mpi2ConfigRequest_t) + ioc->sge_size;
  459. func_str = "config_page";
  460. break;
  461. case MPI2_FUNCTION_SCSI_TASK_MGMT:
  462. frame_sz = sizeof(Mpi2SCSITaskManagementRequest_t);
  463. func_str = "task_mgmt";
  464. break;
  465. case MPI2_FUNCTION_SAS_IO_UNIT_CONTROL:
  466. frame_sz = sizeof(Mpi2SasIoUnitControlRequest_t);
  467. func_str = "sas_iounit_ctl";
  468. break;
  469. case MPI2_FUNCTION_SCSI_ENCLOSURE_PROCESSOR:
  470. frame_sz = sizeof(Mpi2SepRequest_t);
  471. func_str = "enclosure";
  472. break;
  473. case MPI2_FUNCTION_IOC_INIT:
  474. frame_sz = sizeof(Mpi2IOCInitRequest_t);
  475. func_str = "ioc_init";
  476. break;
  477. case MPI2_FUNCTION_PORT_ENABLE:
  478. frame_sz = sizeof(Mpi2PortEnableRequest_t);
  479. func_str = "port_enable";
  480. break;
  481. case MPI2_FUNCTION_SMP_PASSTHROUGH:
  482. frame_sz = sizeof(Mpi2SmpPassthroughRequest_t) + ioc->sge_size;
  483. func_str = "smp_passthru";
  484. break;
  485. default:
  486. frame_sz = 32;
  487. func_str = "unknown";
  488. break;
  489. }
  490. printk(MPT2SAS_WARN_FMT "ioc_status: %s(0x%04x), request(0x%p),"
  491. " (%s)\n", ioc->name, desc, ioc_status, request_hdr, func_str);
  492. _debug_dump_mf(request_hdr, frame_sz/4);
  493. }
  494. /**
  495. * _base_display_event_data - verbose translation of firmware asyn events
  496. * @ioc: per adapter object
  497. * @mpi_reply: reply mf payload returned from firmware
  498. *
  499. * Return nothing.
  500. */
  501. static void
  502. _base_display_event_data(struct MPT2SAS_ADAPTER *ioc,
  503. Mpi2EventNotificationReply_t *mpi_reply)
  504. {
  505. char *desc = NULL;
  506. u16 event;
  507. if (!(ioc->logging_level & MPT_DEBUG_EVENTS))
  508. return;
  509. event = le16_to_cpu(mpi_reply->Event);
  510. switch (event) {
  511. case MPI2_EVENT_LOG_DATA:
  512. desc = "Log Data";
  513. break;
  514. case MPI2_EVENT_STATE_CHANGE:
  515. desc = "Status Change";
  516. break;
  517. case MPI2_EVENT_HARD_RESET_RECEIVED:
  518. desc = "Hard Reset Received";
  519. break;
  520. case MPI2_EVENT_EVENT_CHANGE:
  521. desc = "Event Change";
  522. break;
  523. case MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE:
  524. desc = "Device Status Change";
  525. break;
  526. case MPI2_EVENT_IR_OPERATION_STATUS:
  527. if (!ioc->hide_ir_msg)
  528. desc = "IR Operation Status";
  529. break;
  530. case MPI2_EVENT_SAS_DISCOVERY:
  531. {
  532. Mpi2EventDataSasDiscovery_t *event_data =
  533. (Mpi2EventDataSasDiscovery_t *)mpi_reply->EventData;
  534. printk(MPT2SAS_INFO_FMT "Discovery: (%s)", ioc->name,
  535. (event_data->ReasonCode == MPI2_EVENT_SAS_DISC_RC_STARTED) ?
  536. "start" : "stop");
  537. if (event_data->DiscoveryStatus)
  538. printk("discovery_status(0x%08x)",
  539. le32_to_cpu(event_data->DiscoveryStatus));
  540. printk("\n");
  541. return;
  542. }
  543. case MPI2_EVENT_SAS_BROADCAST_PRIMITIVE:
  544. desc = "SAS Broadcast Primitive";
  545. break;
  546. case MPI2_EVENT_SAS_INIT_DEVICE_STATUS_CHANGE:
  547. desc = "SAS Init Device Status Change";
  548. break;
  549. case MPI2_EVENT_SAS_INIT_TABLE_OVERFLOW:
  550. desc = "SAS Init Table Overflow";
  551. break;
  552. case MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST:
  553. desc = "SAS Topology Change List";
  554. break;
  555. case MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE:
  556. desc = "SAS Enclosure Device Status Change";
  557. break;
  558. case MPI2_EVENT_IR_VOLUME:
  559. if (!ioc->hide_ir_msg)
  560. desc = "IR Volume";
  561. break;
  562. case MPI2_EVENT_IR_PHYSICAL_DISK:
  563. if (!ioc->hide_ir_msg)
  564. desc = "IR Physical Disk";
  565. break;
  566. case MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST:
  567. if (!ioc->hide_ir_msg)
  568. desc = "IR Configuration Change List";
  569. break;
  570. case MPI2_EVENT_LOG_ENTRY_ADDED:
  571. if (!ioc->hide_ir_msg)
  572. desc = "Log Entry Added";
  573. break;
  574. }
  575. if (!desc)
  576. return;
  577. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name, desc);
  578. }
  579. #endif
  580. /**
  581. * _base_sas_log_info - verbose translation of firmware log info
  582. * @ioc: per adapter object
  583. * @log_info: log info
  584. *
  585. * Return nothing.
  586. */
  587. static void
  588. _base_sas_log_info(struct MPT2SAS_ADAPTER *ioc , u32 log_info)
  589. {
  590. union loginfo_type {
  591. u32 loginfo;
  592. struct {
  593. u32 subcode:16;
  594. u32 code:8;
  595. u32 originator:4;
  596. u32 bus_type:4;
  597. } dw;
  598. };
  599. union loginfo_type sas_loginfo;
  600. char *originator_str = NULL;
  601. sas_loginfo.loginfo = log_info;
  602. if (sas_loginfo.dw.bus_type != 3 /*SAS*/)
  603. return;
  604. /* each nexus loss loginfo */
  605. if (log_info == 0x31170000)
  606. return;
  607. /* eat the loginfos associated with task aborts */
  608. if (ioc->ignore_loginfos && (log_info == 0x30050000 || log_info ==
  609. 0x31140000 || log_info == 0x31130000))
  610. return;
  611. switch (sas_loginfo.dw.originator) {
  612. case 0:
  613. originator_str = "IOP";
  614. break;
  615. case 1:
  616. originator_str = "PL";
  617. break;
  618. case 2:
  619. if (!ioc->hide_ir_msg)
  620. originator_str = "IR";
  621. else
  622. originator_str = "WarpDrive";
  623. break;
  624. }
  625. printk(MPT2SAS_WARN_FMT "log_info(0x%08x): originator(%s), "
  626. "code(0x%02x), sub_code(0x%04x)\n", ioc->name, log_info,
  627. originator_str, sas_loginfo.dw.code,
  628. sas_loginfo.dw.subcode);
  629. }
  630. /**
  631. * _base_display_reply_info -
  632. * @ioc: per adapter object
  633. * @smid: system request message index
  634. * @msix_index: MSIX table index supplied by the OS
  635. * @reply: reply message frame(lower 32bit addr)
  636. *
  637. * Return nothing.
  638. */
  639. static void
  640. _base_display_reply_info(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
  641. u32 reply)
  642. {
  643. MPI2DefaultReply_t *mpi_reply;
  644. u16 ioc_status;
  645. mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
  646. if (unlikely(!mpi_reply)) {
  647. printk(MPT2SAS_ERR_FMT "mpi_reply not valid at %s:%d/%s()!\n",
  648. ioc->name, __FILE__, __LINE__, __func__);
  649. return;
  650. }
  651. ioc_status = le16_to_cpu(mpi_reply->IOCStatus);
  652. #ifdef CONFIG_SCSI_MPT2SAS_LOGGING
  653. if ((ioc_status & MPI2_IOCSTATUS_MASK) &&
  654. (ioc->logging_level & MPT_DEBUG_REPLY)) {
  655. _base_sas_ioc_info(ioc , mpi_reply,
  656. mpt2sas_base_get_msg_frame(ioc, smid));
  657. }
  658. #endif
  659. if (ioc_status & MPI2_IOCSTATUS_FLAG_LOG_INFO_AVAILABLE)
  660. _base_sas_log_info(ioc, le32_to_cpu(mpi_reply->IOCLogInfo));
  661. }
  662. /**
  663. * mpt2sas_base_done - base internal command completion routine
  664. * @ioc: per adapter object
  665. * @smid: system request message index
  666. * @msix_index: MSIX table index supplied by the OS
  667. * @reply: reply message frame(lower 32bit addr)
  668. *
  669. * Return 1 meaning mf should be freed from _base_interrupt
  670. * 0 means the mf is freed from this function.
  671. */
  672. u8
  673. mpt2sas_base_done(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
  674. u32 reply)
  675. {
  676. MPI2DefaultReply_t *mpi_reply;
  677. mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
  678. if (mpi_reply && mpi_reply->Function == MPI2_FUNCTION_EVENT_ACK)
  679. return 1;
  680. if (ioc->base_cmds.status == MPT2_CMD_NOT_USED)
  681. return 1;
  682. ioc->base_cmds.status |= MPT2_CMD_COMPLETE;
  683. if (mpi_reply) {
  684. ioc->base_cmds.status |= MPT2_CMD_REPLY_VALID;
  685. memcpy(ioc->base_cmds.reply, mpi_reply, mpi_reply->MsgLength*4);
  686. }
  687. ioc->base_cmds.status &= ~MPT2_CMD_PENDING;
  688. complete(&ioc->base_cmds.done);
  689. return 1;
  690. }
  691. /**
  692. * _base_async_event - main callback handler for firmware asyn events
  693. * @ioc: per adapter object
  694. * @msix_index: MSIX table index supplied by the OS
  695. * @reply: reply message frame(lower 32bit addr)
  696. *
  697. * Returns void.
  698. */
  699. static void
  700. _base_async_event(struct MPT2SAS_ADAPTER *ioc, u8 msix_index, u32 reply)
  701. {
  702. Mpi2EventNotificationReply_t *mpi_reply;
  703. Mpi2EventAckRequest_t *ack_request;
  704. u16 smid;
  705. mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
  706. if (!mpi_reply)
  707. return;
  708. if (mpi_reply->Function != MPI2_FUNCTION_EVENT_NOTIFICATION)
  709. return;
  710. #ifdef CONFIG_SCSI_MPT2SAS_LOGGING
  711. _base_display_event_data(ioc, mpi_reply);
  712. #endif
  713. if (!(mpi_reply->AckRequired & MPI2_EVENT_NOTIFICATION_ACK_REQUIRED))
  714. goto out;
  715. smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
  716. if (!smid) {
  717. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  718. ioc->name, __func__);
  719. goto out;
  720. }
  721. ack_request = mpt2sas_base_get_msg_frame(ioc, smid);
  722. memset(ack_request, 0, sizeof(Mpi2EventAckRequest_t));
  723. ack_request->Function = MPI2_FUNCTION_EVENT_ACK;
  724. ack_request->Event = mpi_reply->Event;
  725. ack_request->EventContext = mpi_reply->EventContext;
  726. ack_request->VF_ID = 0; /* TODO */
  727. ack_request->VP_ID = 0;
  728. mpt2sas_base_put_smid_default(ioc, smid);
  729. out:
  730. /* scsih callback handler */
  731. mpt2sas_scsih_event_callback(ioc, msix_index, reply);
  732. /* ctl callback handler */
  733. mpt2sas_ctl_event_callback(ioc, msix_index, reply);
  734. return;
  735. }
  736. /**
  737. * _base_get_cb_idx - obtain the callback index
  738. * @ioc: per adapter object
  739. * @smid: system request message index
  740. *
  741. * Return callback index.
  742. */
  743. static u8
  744. _base_get_cb_idx(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  745. {
  746. int i;
  747. u8 cb_idx;
  748. if (smid < ioc->hi_priority_smid) {
  749. i = smid - 1;
  750. cb_idx = ioc->scsi_lookup[i].cb_idx;
  751. } else if (smid < ioc->internal_smid) {
  752. i = smid - ioc->hi_priority_smid;
  753. cb_idx = ioc->hpr_lookup[i].cb_idx;
  754. } else if (smid <= ioc->hba_queue_depth) {
  755. i = smid - ioc->internal_smid;
  756. cb_idx = ioc->internal_lookup[i].cb_idx;
  757. } else
  758. cb_idx = 0xFF;
  759. return cb_idx;
  760. }
  761. /**
  762. * _base_mask_interrupts - disable interrupts
  763. * @ioc: per adapter object
  764. *
  765. * Disabling ResetIRQ, Reply and Doorbell Interrupts
  766. *
  767. * Return nothing.
  768. */
  769. static void
  770. _base_mask_interrupts(struct MPT2SAS_ADAPTER *ioc)
  771. {
  772. u32 him_register;
  773. ioc->mask_interrupts = 1;
  774. him_register = readl(&ioc->chip->HostInterruptMask);
  775. him_register |= MPI2_HIM_DIM + MPI2_HIM_RIM + MPI2_HIM_RESET_IRQ_MASK;
  776. writel(him_register, &ioc->chip->HostInterruptMask);
  777. readl(&ioc->chip->HostInterruptMask);
  778. }
  779. /**
  780. * _base_unmask_interrupts - enable interrupts
  781. * @ioc: per adapter object
  782. *
  783. * Enabling only Reply Interrupts
  784. *
  785. * Return nothing.
  786. */
  787. static void
  788. _base_unmask_interrupts(struct MPT2SAS_ADAPTER *ioc)
  789. {
  790. u32 him_register;
  791. him_register = readl(&ioc->chip->HostInterruptMask);
  792. him_register &= ~MPI2_HIM_RIM;
  793. writel(him_register, &ioc->chip->HostInterruptMask);
  794. ioc->mask_interrupts = 0;
  795. }
  796. union reply_descriptor {
  797. u64 word;
  798. struct {
  799. u32 low;
  800. u32 high;
  801. } u;
  802. };
  803. /**
  804. * _base_interrupt - MPT adapter (IOC) specific interrupt handler.
  805. * @irq: irq number (not used)
  806. * @bus_id: bus identifier cookie == pointer to MPT_ADAPTER structure
  807. * @r: pt_regs pointer (not used)
  808. *
  809. * Return IRQ_HANDLE if processed, else IRQ_NONE.
  810. */
  811. static irqreturn_t
  812. _base_interrupt(int irq, void *bus_id)
  813. {
  814. struct adapter_reply_queue *reply_q = bus_id;
  815. union reply_descriptor rd;
  816. u32 completed_cmds;
  817. u8 request_desript_type;
  818. u16 smid;
  819. u8 cb_idx;
  820. u32 reply;
  821. u8 msix_index = reply_q->msix_index;
  822. struct MPT2SAS_ADAPTER *ioc = reply_q->ioc;
  823. Mpi2ReplyDescriptorsUnion_t *rpf;
  824. u8 rc;
  825. if (ioc->mask_interrupts)
  826. return IRQ_NONE;
  827. if (!atomic_add_unless(&reply_q->busy, 1, 1))
  828. return IRQ_NONE;
  829. rpf = &reply_q->reply_post_free[reply_q->reply_post_host_index];
  830. request_desript_type = rpf->Default.ReplyFlags
  831. & MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK;
  832. if (request_desript_type == MPI2_RPY_DESCRIPT_FLAGS_UNUSED) {
  833. atomic_dec(&reply_q->busy);
  834. return IRQ_NONE;
  835. }
  836. completed_cmds = 0;
  837. cb_idx = 0xFF;
  838. do {
  839. rd.word = le64_to_cpu(rpf->Words);
  840. if (rd.u.low == UINT_MAX || rd.u.high == UINT_MAX)
  841. goto out;
  842. reply = 0;
  843. smid = le16_to_cpu(rpf->Default.DescriptorTypeDependent1);
  844. if (request_desript_type ==
  845. MPI2_RPY_DESCRIPT_FLAGS_ADDRESS_REPLY) {
  846. reply = le32_to_cpu
  847. (rpf->AddressReply.ReplyFrameAddress);
  848. if (reply > ioc->reply_dma_max_address ||
  849. reply < ioc->reply_dma_min_address)
  850. reply = 0;
  851. } else if (request_desript_type ==
  852. MPI2_RPY_DESCRIPT_FLAGS_TARGET_COMMAND_BUFFER)
  853. goto next;
  854. else if (request_desript_type ==
  855. MPI2_RPY_DESCRIPT_FLAGS_TARGETASSIST_SUCCESS)
  856. goto next;
  857. if (smid) {
  858. cb_idx = _base_get_cb_idx(ioc, smid);
  859. if ((likely(cb_idx < MPT_MAX_CALLBACKS))
  860. && (likely(mpt_callbacks[cb_idx] != NULL))) {
  861. rc = mpt_callbacks[cb_idx](ioc, smid,
  862. msix_index, reply);
  863. if (reply)
  864. _base_display_reply_info(ioc, smid,
  865. msix_index, reply);
  866. if (rc)
  867. mpt2sas_base_free_smid(ioc, smid);
  868. }
  869. }
  870. if (!smid)
  871. _base_async_event(ioc, msix_index, reply);
  872. /* reply free queue handling */
  873. if (reply) {
  874. ioc->reply_free_host_index =
  875. (ioc->reply_free_host_index ==
  876. (ioc->reply_free_queue_depth - 1)) ?
  877. 0 : ioc->reply_free_host_index + 1;
  878. ioc->reply_free[ioc->reply_free_host_index] =
  879. cpu_to_le32(reply);
  880. wmb();
  881. writel(ioc->reply_free_host_index,
  882. &ioc->chip->ReplyFreeHostIndex);
  883. }
  884. next:
  885. rpf->Words = cpu_to_le64(ULLONG_MAX);
  886. reply_q->reply_post_host_index =
  887. (reply_q->reply_post_host_index ==
  888. (ioc->reply_post_queue_depth - 1)) ? 0 :
  889. reply_q->reply_post_host_index + 1;
  890. request_desript_type =
  891. reply_q->reply_post_free[reply_q->reply_post_host_index].
  892. Default.ReplyFlags & MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK;
  893. completed_cmds++;
  894. if (request_desript_type == MPI2_RPY_DESCRIPT_FLAGS_UNUSED)
  895. goto out;
  896. if (!reply_q->reply_post_host_index)
  897. rpf = reply_q->reply_post_free;
  898. else
  899. rpf++;
  900. } while (1);
  901. out:
  902. if (!completed_cmds) {
  903. atomic_dec(&reply_q->busy);
  904. return IRQ_NONE;
  905. }
  906. wmb();
  907. if (ioc->is_warpdrive) {
  908. writel(reply_q->reply_post_host_index,
  909. ioc->reply_post_host_index[msix_index]);
  910. atomic_dec(&reply_q->busy);
  911. return IRQ_HANDLED;
  912. }
  913. writel(reply_q->reply_post_host_index | (msix_index <<
  914. MPI2_RPHI_MSIX_INDEX_SHIFT), &ioc->chip->ReplyPostHostIndex);
  915. atomic_dec(&reply_q->busy);
  916. return IRQ_HANDLED;
  917. }
  918. /**
  919. * _base_is_controller_msix_enabled - is controller support muli-reply queues
  920. * @ioc: per adapter object
  921. *
  922. */
  923. static inline int
  924. _base_is_controller_msix_enabled(struct MPT2SAS_ADAPTER *ioc)
  925. {
  926. return (ioc->facts.IOCCapabilities &
  927. MPI2_IOCFACTS_CAPABILITY_MSI_X_INDEX) && ioc->msix_enable;
  928. }
  929. /**
  930. * mpt2sas_base_flush_reply_queues - flushing the MSIX reply queues
  931. * @ioc: per adapter object
  932. * Context: ISR conext
  933. *
  934. * Called when a Task Management request has completed. We want
  935. * to flush the other reply queues so all the outstanding IO has been
  936. * completed back to OS before we process the TM completetion.
  937. *
  938. * Return nothing.
  939. */
  940. void
  941. mpt2sas_base_flush_reply_queues(struct MPT2SAS_ADAPTER *ioc)
  942. {
  943. struct adapter_reply_queue *reply_q;
  944. /* If MSIX capability is turned off
  945. * then multi-queues are not enabled
  946. */
  947. if (!_base_is_controller_msix_enabled(ioc))
  948. return;
  949. list_for_each_entry(reply_q, &ioc->reply_queue_list, list) {
  950. if (ioc->shost_recovery)
  951. return;
  952. /* TMs are on msix_index == 0 */
  953. if (reply_q->msix_index == 0)
  954. continue;
  955. _base_interrupt(reply_q->vector, (void *)reply_q);
  956. }
  957. }
  958. /**
  959. * mpt2sas_base_release_callback_handler - clear interrupt callback handler
  960. * @cb_idx: callback index
  961. *
  962. * Return nothing.
  963. */
  964. void
  965. mpt2sas_base_release_callback_handler(u8 cb_idx)
  966. {
  967. mpt_callbacks[cb_idx] = NULL;
  968. }
  969. /**
  970. * mpt2sas_base_register_callback_handler - obtain index for the interrupt callback handler
  971. * @cb_func: callback function
  972. *
  973. * Returns cb_func.
  974. */
  975. u8
  976. mpt2sas_base_register_callback_handler(MPT_CALLBACK cb_func)
  977. {
  978. u8 cb_idx;
  979. for (cb_idx = MPT_MAX_CALLBACKS-1; cb_idx; cb_idx--)
  980. if (mpt_callbacks[cb_idx] == NULL)
  981. break;
  982. mpt_callbacks[cb_idx] = cb_func;
  983. return cb_idx;
  984. }
  985. /**
  986. * mpt2sas_base_initialize_callback_handler - initialize the interrupt callback handler
  987. *
  988. * Return nothing.
  989. */
  990. void
  991. mpt2sas_base_initialize_callback_handler(void)
  992. {
  993. u8 cb_idx;
  994. for (cb_idx = 0; cb_idx < MPT_MAX_CALLBACKS; cb_idx++)
  995. mpt2sas_base_release_callback_handler(cb_idx);
  996. }
  997. /**
  998. * mpt2sas_base_build_zero_len_sge - build zero length sg entry
  999. * @ioc: per adapter object
  1000. * @paddr: virtual address for SGE
  1001. *
  1002. * Create a zero length scatter gather entry to insure the IOCs hardware has
  1003. * something to use if the target device goes brain dead and tries
  1004. * to send data even when none is asked for.
  1005. *
  1006. * Return nothing.
  1007. */
  1008. void
  1009. mpt2sas_base_build_zero_len_sge(struct MPT2SAS_ADAPTER *ioc, void *paddr)
  1010. {
  1011. u32 flags_length = (u32)((MPI2_SGE_FLAGS_LAST_ELEMENT |
  1012. MPI2_SGE_FLAGS_END_OF_BUFFER | MPI2_SGE_FLAGS_END_OF_LIST |
  1013. MPI2_SGE_FLAGS_SIMPLE_ELEMENT) <<
  1014. MPI2_SGE_FLAGS_SHIFT);
  1015. ioc->base_add_sg_single(paddr, flags_length, -1);
  1016. }
  1017. /**
  1018. * _base_add_sg_single_32 - Place a simple 32 bit SGE at address pAddr.
  1019. * @paddr: virtual address for SGE
  1020. * @flags_length: SGE flags and data transfer length
  1021. * @dma_addr: Physical address
  1022. *
  1023. * Return nothing.
  1024. */
  1025. static void
  1026. _base_add_sg_single_32(void *paddr, u32 flags_length, dma_addr_t dma_addr)
  1027. {
  1028. Mpi2SGESimple32_t *sgel = paddr;
  1029. flags_length |= (MPI2_SGE_FLAGS_32_BIT_ADDRESSING |
  1030. MPI2_SGE_FLAGS_SYSTEM_ADDRESS) << MPI2_SGE_FLAGS_SHIFT;
  1031. sgel->FlagsLength = cpu_to_le32(flags_length);
  1032. sgel->Address = cpu_to_le32(dma_addr);
  1033. }
  1034. /**
  1035. * _base_add_sg_single_64 - Place a simple 64 bit SGE at address pAddr.
  1036. * @paddr: virtual address for SGE
  1037. * @flags_length: SGE flags and data transfer length
  1038. * @dma_addr: Physical address
  1039. *
  1040. * Return nothing.
  1041. */
  1042. static void
  1043. _base_add_sg_single_64(void *paddr, u32 flags_length, dma_addr_t dma_addr)
  1044. {
  1045. Mpi2SGESimple64_t *sgel = paddr;
  1046. flags_length |= (MPI2_SGE_FLAGS_64_BIT_ADDRESSING |
  1047. MPI2_SGE_FLAGS_SYSTEM_ADDRESS) << MPI2_SGE_FLAGS_SHIFT;
  1048. sgel->FlagsLength = cpu_to_le32(flags_length);
  1049. sgel->Address = cpu_to_le64(dma_addr);
  1050. }
  1051. #define convert_to_kb(x) ((x) << (PAGE_SHIFT - 10))
  1052. /**
  1053. * _base_config_dma_addressing - set dma addressing
  1054. * @ioc: per adapter object
  1055. * @pdev: PCI device struct
  1056. *
  1057. * Returns 0 for success, non-zero for failure.
  1058. */
  1059. static int
  1060. _base_config_dma_addressing(struct MPT2SAS_ADAPTER *ioc, struct pci_dev *pdev)
  1061. {
  1062. struct sysinfo s;
  1063. u64 consistent_dma_mask;
  1064. if (ioc->dma_mask)
  1065. consistent_dma_mask = DMA_BIT_MASK(64);
  1066. else
  1067. consistent_dma_mask = DMA_BIT_MASK(32);
  1068. if (sizeof(dma_addr_t) > 4) {
  1069. const uint64_t required_mask =
  1070. dma_get_required_mask(&pdev->dev);
  1071. if ((required_mask > DMA_BIT_MASK(32)) &&
  1072. !pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) &&
  1073. !pci_set_consistent_dma_mask(pdev, consistent_dma_mask)) {
  1074. ioc->base_add_sg_single = &_base_add_sg_single_64;
  1075. ioc->sge_size = sizeof(Mpi2SGESimple64_t);
  1076. ioc->dma_mask = 64;
  1077. goto out;
  1078. }
  1079. }
  1080. if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))
  1081. && !pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32))) {
  1082. ioc->base_add_sg_single = &_base_add_sg_single_32;
  1083. ioc->sge_size = sizeof(Mpi2SGESimple32_t);
  1084. ioc->dma_mask = 32;
  1085. } else
  1086. return -ENODEV;
  1087. out:
  1088. si_meminfo(&s);
  1089. printk(MPT2SAS_INFO_FMT
  1090. "%d BIT PCI BUS DMA ADDRESSING SUPPORTED, total mem (%ld kB)\n",
  1091. ioc->name, ioc->dma_mask, convert_to_kb(s.totalram));
  1092. return 0;
  1093. }
  1094. static int
  1095. _base_change_consistent_dma_mask(struct MPT2SAS_ADAPTER *ioc,
  1096. struct pci_dev *pdev)
  1097. {
  1098. if (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64))) {
  1099. if (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)))
  1100. return -ENODEV;
  1101. }
  1102. return 0;
  1103. }
  1104. /**
  1105. * _base_check_enable_msix - checks MSIX capabable.
  1106. * @ioc: per adapter object
  1107. *
  1108. * Check to see if card is capable of MSIX, and set number
  1109. * of available msix vectors
  1110. */
  1111. static int
  1112. _base_check_enable_msix(struct MPT2SAS_ADAPTER *ioc)
  1113. {
  1114. int base;
  1115. u16 message_control;
  1116. /* Check whether controller SAS2008 B0 controller,
  1117. if it is SAS2008 B0 controller use IO-APIC instead of MSIX */
  1118. if (ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2008 &&
  1119. ioc->pdev->revision == 0x01) {
  1120. return -EINVAL;
  1121. }
  1122. base = pci_find_capability(ioc->pdev, PCI_CAP_ID_MSIX);
  1123. if (!base) {
  1124. dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "msix not "
  1125. "supported\n", ioc->name));
  1126. return -EINVAL;
  1127. }
  1128. /* get msix vector count */
  1129. /* NUMA_IO not supported for older controllers */
  1130. if (ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2004 ||
  1131. ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2008 ||
  1132. ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2108_1 ||
  1133. ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2108_2 ||
  1134. ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2108_3 ||
  1135. ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2116_1 ||
  1136. ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2116_2)
  1137. ioc->msix_vector_count = 1;
  1138. else {
  1139. pci_read_config_word(ioc->pdev, base + 2, &message_control);
  1140. ioc->msix_vector_count = (message_control & 0x3FF) + 1;
  1141. }
  1142. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "msix is supported, "
  1143. "vector_count(%d)\n", ioc->name, ioc->msix_vector_count));
  1144. return 0;
  1145. }
  1146. /**
  1147. * _base_free_irq - free irq
  1148. * @ioc: per adapter object
  1149. *
  1150. * Freeing respective reply_queue from the list.
  1151. */
  1152. static void
  1153. _base_free_irq(struct MPT2SAS_ADAPTER *ioc)
  1154. {
  1155. struct adapter_reply_queue *reply_q, *next;
  1156. if (list_empty(&ioc->reply_queue_list))
  1157. return;
  1158. list_for_each_entry_safe(reply_q, next, &ioc->reply_queue_list, list) {
  1159. list_del(&reply_q->list);
  1160. synchronize_irq(reply_q->vector);
  1161. free_irq(reply_q->vector, reply_q);
  1162. kfree(reply_q);
  1163. }
  1164. }
  1165. /**
  1166. * _base_request_irq - request irq
  1167. * @ioc: per adapter object
  1168. * @index: msix index into vector table
  1169. * @vector: irq vector
  1170. *
  1171. * Inserting respective reply_queue into the list.
  1172. */
  1173. static int
  1174. _base_request_irq(struct MPT2SAS_ADAPTER *ioc, u8 index, u32 vector)
  1175. {
  1176. struct adapter_reply_queue *reply_q;
  1177. int r;
  1178. reply_q = kzalloc(sizeof(struct adapter_reply_queue), GFP_KERNEL);
  1179. if (!reply_q) {
  1180. printk(MPT2SAS_ERR_FMT "unable to allocate memory %d!\n",
  1181. ioc->name, (int)sizeof(struct adapter_reply_queue));
  1182. return -ENOMEM;
  1183. }
  1184. reply_q->ioc = ioc;
  1185. reply_q->msix_index = index;
  1186. reply_q->vector = vector;
  1187. atomic_set(&reply_q->busy, 0);
  1188. if (ioc->msix_enable)
  1189. snprintf(reply_q->name, MPT_NAME_LENGTH, "%s%d-msix%d",
  1190. MPT2SAS_DRIVER_NAME, ioc->id, index);
  1191. else
  1192. snprintf(reply_q->name, MPT_NAME_LENGTH, "%s%d",
  1193. MPT2SAS_DRIVER_NAME, ioc->id);
  1194. r = request_irq(vector, _base_interrupt, IRQF_SHARED, reply_q->name,
  1195. reply_q);
  1196. if (r) {
  1197. printk(MPT2SAS_ERR_FMT "unable to allocate interrupt %d!\n",
  1198. reply_q->name, vector);
  1199. kfree(reply_q);
  1200. return -EBUSY;
  1201. }
  1202. INIT_LIST_HEAD(&reply_q->list);
  1203. list_add_tail(&reply_q->list, &ioc->reply_queue_list);
  1204. return 0;
  1205. }
  1206. /**
  1207. * _base_assign_reply_queues - assigning msix index for each cpu
  1208. * @ioc: per adapter object
  1209. *
  1210. * The enduser would need to set the affinity via /proc/irq/#/smp_affinity
  1211. *
  1212. * It would nice if we could call irq_set_affinity, however it is not
  1213. * an exported symbol
  1214. */
  1215. static void
  1216. _base_assign_reply_queues(struct MPT2SAS_ADAPTER *ioc)
  1217. {
  1218. unsigned int cpu, nr_cpus, nr_msix, index = 0;
  1219. if (!_base_is_controller_msix_enabled(ioc))
  1220. return;
  1221. memset(ioc->cpu_msix_table, 0, ioc->cpu_msix_table_sz);
  1222. nr_cpus = num_online_cpus();
  1223. nr_msix = ioc->reply_queue_count = min(ioc->reply_queue_count,
  1224. ioc->facts.MaxMSIxVectors);
  1225. if (!nr_msix)
  1226. return;
  1227. cpu = cpumask_first(cpu_online_mask);
  1228. do {
  1229. unsigned int i, group = nr_cpus / nr_msix;
  1230. if (index < nr_cpus % nr_msix)
  1231. group++;
  1232. for (i = 0 ; i < group ; i++) {
  1233. ioc->cpu_msix_table[cpu] = index;
  1234. cpu = cpumask_next(cpu, cpu_online_mask);
  1235. }
  1236. index++;
  1237. } while (cpu < nr_cpus);
  1238. }
  1239. /**
  1240. * _base_disable_msix - disables msix
  1241. * @ioc: per adapter object
  1242. *
  1243. */
  1244. static void
  1245. _base_disable_msix(struct MPT2SAS_ADAPTER *ioc)
  1246. {
  1247. if (ioc->msix_enable) {
  1248. pci_disable_msix(ioc->pdev);
  1249. ioc->msix_enable = 0;
  1250. }
  1251. }
  1252. /**
  1253. * _base_enable_msix - enables msix, failback to io_apic
  1254. * @ioc: per adapter object
  1255. *
  1256. */
  1257. static int
  1258. _base_enable_msix(struct MPT2SAS_ADAPTER *ioc)
  1259. {
  1260. struct msix_entry *entries, *a;
  1261. int r;
  1262. int i;
  1263. u8 try_msix = 0;
  1264. if (msix_disable == -1 || msix_disable == 0)
  1265. try_msix = 1;
  1266. if (!try_msix)
  1267. goto try_ioapic;
  1268. if (_base_check_enable_msix(ioc) != 0)
  1269. goto try_ioapic;
  1270. ioc->reply_queue_count = min_t(int, ioc->cpu_count,
  1271. ioc->msix_vector_count);
  1272. if (!ioc->rdpq_array_enable && max_msix_vectors == -1)
  1273. max_msix_vectors = 8;
  1274. if (max_msix_vectors > 0) {
  1275. ioc->reply_queue_count = min_t(int, max_msix_vectors,
  1276. ioc->reply_queue_count);
  1277. ioc->msix_vector_count = ioc->reply_queue_count;
  1278. } else if (max_msix_vectors == 0)
  1279. goto try_ioapic;
  1280. printk(MPT2SAS_INFO_FMT
  1281. "MSI-X vectors supported: %d, no of cores: %d, max_msix_vectors: %d\n",
  1282. ioc->name, ioc->msix_vector_count, ioc->cpu_count, max_msix_vectors);
  1283. entries = kcalloc(ioc->reply_queue_count, sizeof(struct msix_entry),
  1284. GFP_KERNEL);
  1285. if (!entries) {
  1286. dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "kcalloc "
  1287. "failed @ at %s:%d/%s() !!!\n", ioc->name, __FILE__,
  1288. __LINE__, __func__));
  1289. goto try_ioapic;
  1290. }
  1291. for (i = 0, a = entries; i < ioc->reply_queue_count; i++, a++)
  1292. a->entry = i;
  1293. r = pci_enable_msix_exact(ioc->pdev, entries, ioc->reply_queue_count);
  1294. if (r) {
  1295. dfailprintk(ioc, printk(MPT2SAS_INFO_FMT
  1296. "pci_enable_msix_exact failed (r=%d) !!!\n", ioc->name, r));
  1297. kfree(entries);
  1298. goto try_ioapic;
  1299. }
  1300. ioc->msix_enable = 1;
  1301. for (i = 0, a = entries; i < ioc->reply_queue_count; i++, a++) {
  1302. r = _base_request_irq(ioc, i, a->vector);
  1303. if (r) {
  1304. _base_free_irq(ioc);
  1305. _base_disable_msix(ioc);
  1306. kfree(entries);
  1307. goto try_ioapic;
  1308. }
  1309. }
  1310. kfree(entries);
  1311. return 0;
  1312. /* failback to io_apic interrupt routing */
  1313. try_ioapic:
  1314. ioc->reply_queue_count = 1;
  1315. r = _base_request_irq(ioc, 0, ioc->pdev->irq);
  1316. return r;
  1317. }
  1318. /**
  1319. * mpt2sas_base_map_resources - map in controller resources (io/irq/memap)
  1320. * @ioc: per adapter object
  1321. *
  1322. * Returns 0 for success, non-zero for failure.
  1323. */
  1324. int
  1325. mpt2sas_base_map_resources(struct MPT2SAS_ADAPTER *ioc)
  1326. {
  1327. struct pci_dev *pdev = ioc->pdev;
  1328. u32 memap_sz;
  1329. u32 pio_sz;
  1330. int i, r = 0;
  1331. u64 pio_chip = 0;
  1332. u64 chip_phys = 0;
  1333. struct adapter_reply_queue *reply_q;
  1334. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n",
  1335. ioc->name, __func__));
  1336. ioc->bars = pci_select_bars(pdev, IORESOURCE_MEM);
  1337. if (pci_enable_device_mem(pdev)) {
  1338. printk(MPT2SAS_WARN_FMT "pci_enable_device_mem: "
  1339. "failed\n", ioc->name);
  1340. ioc->bars = 0;
  1341. return -ENODEV;
  1342. }
  1343. if (pci_request_selected_regions(pdev, ioc->bars,
  1344. MPT2SAS_DRIVER_NAME)) {
  1345. printk(MPT2SAS_WARN_FMT "pci_request_selected_regions: "
  1346. "failed\n", ioc->name);
  1347. ioc->bars = 0;
  1348. r = -ENODEV;
  1349. goto out_fail;
  1350. }
  1351. /* AER (Advanced Error Reporting) hooks */
  1352. pci_enable_pcie_error_reporting(pdev);
  1353. pci_set_master(pdev);
  1354. if (_base_config_dma_addressing(ioc, pdev) != 0) {
  1355. printk(MPT2SAS_WARN_FMT "no suitable DMA mask for %s\n",
  1356. ioc->name, pci_name(pdev));
  1357. r = -ENODEV;
  1358. goto out_fail;
  1359. }
  1360. for (i = 0, memap_sz = 0, pio_sz = 0 ; i < DEVICE_COUNT_RESOURCE; i++) {
  1361. if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
  1362. if (pio_sz)
  1363. continue;
  1364. pio_chip = (u64)pci_resource_start(pdev, i);
  1365. pio_sz = pci_resource_len(pdev, i);
  1366. } else {
  1367. if (memap_sz)
  1368. continue;
  1369. /* verify memory resource is valid before using */
  1370. if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
  1371. ioc->chip_phys = pci_resource_start(pdev, i);
  1372. chip_phys = (u64)ioc->chip_phys;
  1373. memap_sz = pci_resource_len(pdev, i);
  1374. ioc->chip = ioremap(ioc->chip_phys, memap_sz);
  1375. if (ioc->chip == NULL) {
  1376. printk(MPT2SAS_ERR_FMT "unable to map "
  1377. "adapter memory!\n", ioc->name);
  1378. r = -EINVAL;
  1379. goto out_fail;
  1380. }
  1381. }
  1382. }
  1383. }
  1384. _base_mask_interrupts(ioc);
  1385. r = _base_get_ioc_facts(ioc, CAN_SLEEP);
  1386. if (r)
  1387. goto out_fail;
  1388. if (!ioc->rdpq_array_enable_assigned) {
  1389. ioc->rdpq_array_enable = ioc->rdpq_array_capable;
  1390. ioc->rdpq_array_enable_assigned = 1;
  1391. }
  1392. r = _base_enable_msix(ioc);
  1393. if (r)
  1394. goto out_fail;
  1395. list_for_each_entry(reply_q, &ioc->reply_queue_list, list)
  1396. printk(MPT2SAS_INFO_FMT "%s: IRQ %d\n",
  1397. reply_q->name, ((ioc->msix_enable) ? "PCI-MSI-X enabled" :
  1398. "IO-APIC enabled"), reply_q->vector);
  1399. printk(MPT2SAS_INFO_FMT "iomem(0x%016llx), mapped(0x%p), size(%d)\n",
  1400. ioc->name, (unsigned long long)chip_phys, ioc->chip, memap_sz);
  1401. printk(MPT2SAS_INFO_FMT "ioport(0x%016llx), size(%d)\n",
  1402. ioc->name, (unsigned long long)pio_chip, pio_sz);
  1403. /* Save PCI configuration state for recovery from PCI AER/EEH errors */
  1404. pci_save_state(pdev);
  1405. return 0;
  1406. out_fail:
  1407. if (ioc->chip_phys)
  1408. iounmap(ioc->chip);
  1409. ioc->chip_phys = 0;
  1410. pci_release_selected_regions(ioc->pdev, ioc->bars);
  1411. pci_disable_pcie_error_reporting(pdev);
  1412. pci_disable_device(pdev);
  1413. return r;
  1414. }
  1415. /**
  1416. * mpt2sas_base_get_msg_frame - obtain request mf pointer
  1417. * @ioc: per adapter object
  1418. * @smid: system request message index(smid zero is invalid)
  1419. *
  1420. * Returns virt pointer to message frame.
  1421. */
  1422. void *
  1423. mpt2sas_base_get_msg_frame(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1424. {
  1425. return (void *)(ioc->request + (smid * ioc->request_sz));
  1426. }
  1427. /**
  1428. * mpt2sas_base_get_sense_buffer - obtain a sense buffer assigned to a mf request
  1429. * @ioc: per adapter object
  1430. * @smid: system request message index
  1431. *
  1432. * Returns virt pointer to sense buffer.
  1433. */
  1434. void *
  1435. mpt2sas_base_get_sense_buffer(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1436. {
  1437. return (void *)(ioc->sense + ((smid - 1) * SCSI_SENSE_BUFFERSIZE));
  1438. }
  1439. /**
  1440. * mpt2sas_base_get_sense_buffer_dma - obtain a sense buffer assigned to a mf request
  1441. * @ioc: per adapter object
  1442. * @smid: system request message index
  1443. *
  1444. * Returns phys pointer to the low 32bit address of the sense buffer.
  1445. */
  1446. __le32
  1447. mpt2sas_base_get_sense_buffer_dma(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1448. {
  1449. return cpu_to_le32(ioc->sense_dma +
  1450. ((smid - 1) * SCSI_SENSE_BUFFERSIZE));
  1451. }
  1452. /**
  1453. * mpt2sas_base_get_reply_virt_addr - obtain reply frames virt address
  1454. * @ioc: per adapter object
  1455. * @phys_addr: lower 32 physical addr of the reply
  1456. *
  1457. * Converts 32bit lower physical addr into a virt address.
  1458. */
  1459. void *
  1460. mpt2sas_base_get_reply_virt_addr(struct MPT2SAS_ADAPTER *ioc, u32 phys_addr)
  1461. {
  1462. if (!phys_addr)
  1463. return NULL;
  1464. return ioc->reply + (phys_addr - (u32)ioc->reply_dma);
  1465. }
  1466. /**
  1467. * mpt2sas_base_get_smid - obtain a free smid from internal queue
  1468. * @ioc: per adapter object
  1469. * @cb_idx: callback index
  1470. *
  1471. * Returns smid (zero is invalid)
  1472. */
  1473. u16
  1474. mpt2sas_base_get_smid(struct MPT2SAS_ADAPTER *ioc, u8 cb_idx)
  1475. {
  1476. unsigned long flags;
  1477. struct request_tracker *request;
  1478. u16 smid;
  1479. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  1480. if (list_empty(&ioc->internal_free_list)) {
  1481. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1482. printk(MPT2SAS_ERR_FMT "%s: smid not available\n",
  1483. ioc->name, __func__);
  1484. return 0;
  1485. }
  1486. request = list_entry(ioc->internal_free_list.next,
  1487. struct request_tracker, tracker_list);
  1488. request->cb_idx = cb_idx;
  1489. smid = request->smid;
  1490. list_del(&request->tracker_list);
  1491. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1492. return smid;
  1493. }
  1494. /**
  1495. * mpt2sas_base_get_smid_scsiio - obtain a free smid from scsiio queue
  1496. * @ioc: per adapter object
  1497. * @cb_idx: callback index
  1498. * @scmd: pointer to scsi command object
  1499. *
  1500. * Returns smid (zero is invalid)
  1501. */
  1502. u16
  1503. mpt2sas_base_get_smid_scsiio(struct MPT2SAS_ADAPTER *ioc, u8 cb_idx,
  1504. struct scsi_cmnd *scmd)
  1505. {
  1506. unsigned long flags;
  1507. struct scsiio_tracker *request;
  1508. u16 smid;
  1509. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  1510. if (list_empty(&ioc->free_list)) {
  1511. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1512. printk(MPT2SAS_ERR_FMT "%s: smid not available\n",
  1513. ioc->name, __func__);
  1514. return 0;
  1515. }
  1516. request = list_entry(ioc->free_list.next,
  1517. struct scsiio_tracker, tracker_list);
  1518. request->scmd = scmd;
  1519. request->cb_idx = cb_idx;
  1520. smid = request->smid;
  1521. list_del(&request->tracker_list);
  1522. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1523. return smid;
  1524. }
  1525. /**
  1526. * mpt2sas_base_get_smid_hpr - obtain a free smid from hi-priority queue
  1527. * @ioc: per adapter object
  1528. * @cb_idx: callback index
  1529. *
  1530. * Returns smid (zero is invalid)
  1531. */
  1532. u16
  1533. mpt2sas_base_get_smid_hpr(struct MPT2SAS_ADAPTER *ioc, u8 cb_idx)
  1534. {
  1535. unsigned long flags;
  1536. struct request_tracker *request;
  1537. u16 smid;
  1538. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  1539. if (list_empty(&ioc->hpr_free_list)) {
  1540. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1541. return 0;
  1542. }
  1543. request = list_entry(ioc->hpr_free_list.next,
  1544. struct request_tracker, tracker_list);
  1545. request->cb_idx = cb_idx;
  1546. smid = request->smid;
  1547. list_del(&request->tracker_list);
  1548. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1549. return smid;
  1550. }
  1551. /**
  1552. * mpt2sas_base_free_smid - put smid back on free_list
  1553. * @ioc: per adapter object
  1554. * @smid: system request message index
  1555. *
  1556. * Return nothing.
  1557. */
  1558. void
  1559. mpt2sas_base_free_smid(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1560. {
  1561. unsigned long flags;
  1562. int i;
  1563. struct chain_tracker *chain_req, *next;
  1564. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  1565. if (smid < ioc->hi_priority_smid) {
  1566. /* scsiio queue */
  1567. i = smid - 1;
  1568. if (!list_empty(&ioc->scsi_lookup[i].chain_list)) {
  1569. list_for_each_entry_safe(chain_req, next,
  1570. &ioc->scsi_lookup[i].chain_list, tracker_list) {
  1571. list_del_init(&chain_req->tracker_list);
  1572. list_add(&chain_req->tracker_list,
  1573. &ioc->free_chain_list);
  1574. }
  1575. }
  1576. ioc->scsi_lookup[i].cb_idx = 0xFF;
  1577. ioc->scsi_lookup[i].scmd = NULL;
  1578. ioc->scsi_lookup[i].direct_io = 0;
  1579. list_add(&ioc->scsi_lookup[i].tracker_list,
  1580. &ioc->free_list);
  1581. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1582. /*
  1583. * See _wait_for_commands_to_complete() call with regards
  1584. * to this code.
  1585. */
  1586. if (ioc->shost_recovery && ioc->pending_io_count) {
  1587. if (ioc->pending_io_count == 1)
  1588. wake_up(&ioc->reset_wq);
  1589. ioc->pending_io_count--;
  1590. }
  1591. return;
  1592. } else if (smid < ioc->internal_smid) {
  1593. /* hi-priority */
  1594. i = smid - ioc->hi_priority_smid;
  1595. ioc->hpr_lookup[i].cb_idx = 0xFF;
  1596. list_add(&ioc->hpr_lookup[i].tracker_list,
  1597. &ioc->hpr_free_list);
  1598. } else if (smid <= ioc->hba_queue_depth) {
  1599. /* internal queue */
  1600. i = smid - ioc->internal_smid;
  1601. ioc->internal_lookup[i].cb_idx = 0xFF;
  1602. list_add(&ioc->internal_lookup[i].tracker_list,
  1603. &ioc->internal_free_list);
  1604. }
  1605. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1606. }
  1607. /**
  1608. * _base_writeq - 64 bit write to MMIO
  1609. * @ioc: per adapter object
  1610. * @b: data payload
  1611. * @addr: address in MMIO space
  1612. * @writeq_lock: spin lock
  1613. *
  1614. * Glue for handling an atomic 64 bit word to MMIO. This special handling takes
  1615. * care of 32 bit environment where its not quarenteed to send the entire word
  1616. * in one transfer.
  1617. */
  1618. #ifndef writeq
  1619. static inline void _base_writeq(__u64 b, volatile void __iomem *addr,
  1620. spinlock_t *writeq_lock)
  1621. {
  1622. unsigned long flags;
  1623. __u64 data_out = cpu_to_le64(b);
  1624. spin_lock_irqsave(writeq_lock, flags);
  1625. writel((u32)(data_out), addr);
  1626. writel((u32)(data_out >> 32), (addr + 4));
  1627. spin_unlock_irqrestore(writeq_lock, flags);
  1628. }
  1629. #else
  1630. static inline void _base_writeq(__u64 b, volatile void __iomem *addr,
  1631. spinlock_t *writeq_lock)
  1632. {
  1633. writeq(cpu_to_le64(b), addr);
  1634. }
  1635. #endif
  1636. static inline u8
  1637. _base_get_msix_index(struct MPT2SAS_ADAPTER *ioc)
  1638. {
  1639. return ioc->cpu_msix_table[raw_smp_processor_id()];
  1640. }
  1641. /**
  1642. * mpt2sas_base_put_smid_scsi_io - send SCSI_IO request to firmware
  1643. * @ioc: per adapter object
  1644. * @smid: system request message index
  1645. * @handle: device handle
  1646. *
  1647. * Return nothing.
  1648. */
  1649. void
  1650. mpt2sas_base_put_smid_scsi_io(struct MPT2SAS_ADAPTER *ioc, u16 smid, u16 handle)
  1651. {
  1652. Mpi2RequestDescriptorUnion_t descriptor;
  1653. u64 *request = (u64 *)&descriptor;
  1654. descriptor.SCSIIO.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_SCSI_IO;
  1655. descriptor.SCSIIO.MSIxIndex = _base_get_msix_index(ioc);
  1656. descriptor.SCSIIO.SMID = cpu_to_le16(smid);
  1657. descriptor.SCSIIO.DevHandle = cpu_to_le16(handle);
  1658. descriptor.SCSIIO.LMID = 0;
  1659. _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
  1660. &ioc->scsi_lookup_lock);
  1661. }
  1662. /**
  1663. * mpt2sas_base_put_smid_hi_priority - send Task Management request to firmware
  1664. * @ioc: per adapter object
  1665. * @smid: system request message index
  1666. *
  1667. * Return nothing.
  1668. */
  1669. void
  1670. mpt2sas_base_put_smid_hi_priority(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1671. {
  1672. Mpi2RequestDescriptorUnion_t descriptor;
  1673. u64 *request = (u64 *)&descriptor;
  1674. descriptor.HighPriority.RequestFlags =
  1675. MPI2_REQ_DESCRIPT_FLAGS_HIGH_PRIORITY;
  1676. descriptor.HighPriority.MSIxIndex = 0;
  1677. descriptor.HighPriority.SMID = cpu_to_le16(smid);
  1678. descriptor.HighPriority.LMID = 0;
  1679. descriptor.HighPriority.Reserved1 = 0;
  1680. _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
  1681. &ioc->scsi_lookup_lock);
  1682. }
  1683. /**
  1684. * mpt2sas_base_put_smid_default - Default, primarily used for config pages
  1685. * @ioc: per adapter object
  1686. * @smid: system request message index
  1687. *
  1688. * Return nothing.
  1689. */
  1690. void
  1691. mpt2sas_base_put_smid_default(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1692. {
  1693. Mpi2RequestDescriptorUnion_t descriptor;
  1694. u64 *request = (u64 *)&descriptor;
  1695. descriptor.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE;
  1696. descriptor.Default.MSIxIndex = _base_get_msix_index(ioc);
  1697. descriptor.Default.SMID = cpu_to_le16(smid);
  1698. descriptor.Default.LMID = 0;
  1699. descriptor.Default.DescriptorTypeDependent = 0;
  1700. _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
  1701. &ioc->scsi_lookup_lock);
  1702. }
  1703. /**
  1704. * mpt2sas_base_put_smid_target_assist - send Target Assist/Status to firmware
  1705. * @ioc: per adapter object
  1706. * @smid: system request message index
  1707. * @io_index: value used to track the IO
  1708. *
  1709. * Return nothing.
  1710. */
  1711. void
  1712. mpt2sas_base_put_smid_target_assist(struct MPT2SAS_ADAPTER *ioc, u16 smid,
  1713. u16 io_index)
  1714. {
  1715. Mpi2RequestDescriptorUnion_t descriptor;
  1716. u64 *request = (u64 *)&descriptor;
  1717. descriptor.SCSITarget.RequestFlags =
  1718. MPI2_REQ_DESCRIPT_FLAGS_SCSI_TARGET;
  1719. descriptor.SCSITarget.MSIxIndex = _base_get_msix_index(ioc);
  1720. descriptor.SCSITarget.SMID = cpu_to_le16(smid);
  1721. descriptor.SCSITarget.LMID = 0;
  1722. descriptor.SCSITarget.IoIndex = cpu_to_le16(io_index);
  1723. _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
  1724. &ioc->scsi_lookup_lock);
  1725. }
  1726. /**
  1727. * _base_display_dell_branding - Disply branding string
  1728. * @ioc: per adapter object
  1729. *
  1730. * Return nothing.
  1731. */
  1732. static void
  1733. _base_display_dell_branding(struct MPT2SAS_ADAPTER *ioc)
  1734. {
  1735. char dell_branding[MPT2SAS_DELL_BRANDING_SIZE];
  1736. if (ioc->pdev->subsystem_vendor != PCI_VENDOR_ID_DELL)
  1737. return;
  1738. memset(dell_branding, 0, MPT2SAS_DELL_BRANDING_SIZE);
  1739. switch (ioc->pdev->subsystem_device) {
  1740. case MPT2SAS_DELL_6GBPS_SAS_HBA_SSDID:
  1741. strncpy(dell_branding, MPT2SAS_DELL_6GBPS_SAS_HBA_BRANDING,
  1742. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1743. break;
  1744. case MPT2SAS_DELL_PERC_H200_ADAPTER_SSDID:
  1745. strncpy(dell_branding, MPT2SAS_DELL_PERC_H200_ADAPTER_BRANDING,
  1746. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1747. break;
  1748. case MPT2SAS_DELL_PERC_H200_INTEGRATED_SSDID:
  1749. strncpy(dell_branding,
  1750. MPT2SAS_DELL_PERC_H200_INTEGRATED_BRANDING,
  1751. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1752. break;
  1753. case MPT2SAS_DELL_PERC_H200_MODULAR_SSDID:
  1754. strncpy(dell_branding,
  1755. MPT2SAS_DELL_PERC_H200_MODULAR_BRANDING,
  1756. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1757. break;
  1758. case MPT2SAS_DELL_PERC_H200_EMBEDDED_SSDID:
  1759. strncpy(dell_branding,
  1760. MPT2SAS_DELL_PERC_H200_EMBEDDED_BRANDING,
  1761. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1762. break;
  1763. case MPT2SAS_DELL_PERC_H200_SSDID:
  1764. strncpy(dell_branding, MPT2SAS_DELL_PERC_H200_BRANDING,
  1765. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1766. break;
  1767. case MPT2SAS_DELL_6GBPS_SAS_SSDID:
  1768. strncpy(dell_branding, MPT2SAS_DELL_6GBPS_SAS_BRANDING,
  1769. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1770. break;
  1771. default:
  1772. sprintf(dell_branding, "0x%4X", ioc->pdev->subsystem_device);
  1773. break;
  1774. }
  1775. printk(MPT2SAS_INFO_FMT "%s: Vendor(0x%04X), Device(0x%04X),"
  1776. " SSVID(0x%04X), SSDID(0x%04X)\n", ioc->name, dell_branding,
  1777. ioc->pdev->vendor, ioc->pdev->device, ioc->pdev->subsystem_vendor,
  1778. ioc->pdev->subsystem_device);
  1779. }
  1780. /**
  1781. * _base_display_intel_branding - Display branding string
  1782. * @ioc: per adapter object
  1783. *
  1784. * Return nothing.
  1785. */
  1786. static void
  1787. _base_display_intel_branding(struct MPT2SAS_ADAPTER *ioc)
  1788. {
  1789. if (ioc->pdev->subsystem_vendor != PCI_VENDOR_ID_INTEL)
  1790. return;
  1791. switch (ioc->pdev->device) {
  1792. case MPI2_MFGPAGE_DEVID_SAS2008:
  1793. switch (ioc->pdev->subsystem_device) {
  1794. case MPT2SAS_INTEL_RMS2LL080_SSDID:
  1795. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1796. MPT2SAS_INTEL_RMS2LL080_BRANDING);
  1797. break;
  1798. case MPT2SAS_INTEL_RMS2LL040_SSDID:
  1799. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1800. MPT2SAS_INTEL_RMS2LL040_BRANDING);
  1801. break;
  1802. case MPT2SAS_INTEL_SSD910_SSDID:
  1803. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1804. MPT2SAS_INTEL_SSD910_BRANDING);
  1805. break;
  1806. default:
  1807. break;
  1808. }
  1809. case MPI2_MFGPAGE_DEVID_SAS2308_2:
  1810. switch (ioc->pdev->subsystem_device) {
  1811. case MPT2SAS_INTEL_RS25GB008_SSDID:
  1812. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1813. MPT2SAS_INTEL_RS25GB008_BRANDING);
  1814. break;
  1815. case MPT2SAS_INTEL_RMS25JB080_SSDID:
  1816. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1817. MPT2SAS_INTEL_RMS25JB080_BRANDING);
  1818. break;
  1819. case MPT2SAS_INTEL_RMS25JB040_SSDID:
  1820. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1821. MPT2SAS_INTEL_RMS25JB040_BRANDING);
  1822. break;
  1823. case MPT2SAS_INTEL_RMS25KB080_SSDID:
  1824. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1825. MPT2SAS_INTEL_RMS25KB080_BRANDING);
  1826. break;
  1827. case MPT2SAS_INTEL_RMS25KB040_SSDID:
  1828. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1829. MPT2SAS_INTEL_RMS25KB040_BRANDING);
  1830. break;
  1831. case MPT2SAS_INTEL_RMS25LB040_SSDID:
  1832. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1833. MPT2SAS_INTEL_RMS25LB040_BRANDING);
  1834. break;
  1835. case MPT2SAS_INTEL_RMS25LB080_SSDID:
  1836. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1837. MPT2SAS_INTEL_RMS25LB080_BRANDING);
  1838. break;
  1839. default:
  1840. break;
  1841. }
  1842. default:
  1843. break;
  1844. }
  1845. }
  1846. /**
  1847. * _base_display_hp_branding - Display branding string
  1848. * @ioc: per adapter object
  1849. *
  1850. * Return nothing.
  1851. */
  1852. static void
  1853. _base_display_hp_branding(struct MPT2SAS_ADAPTER *ioc)
  1854. {
  1855. if (ioc->pdev->subsystem_vendor != MPT2SAS_HP_3PAR_SSVID)
  1856. return;
  1857. switch (ioc->pdev->device) {
  1858. case MPI2_MFGPAGE_DEVID_SAS2004:
  1859. switch (ioc->pdev->subsystem_device) {
  1860. case MPT2SAS_HP_DAUGHTER_2_4_INTERNAL_SSDID:
  1861. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1862. MPT2SAS_HP_DAUGHTER_2_4_INTERNAL_BRANDING);
  1863. break;
  1864. default:
  1865. break;
  1866. }
  1867. case MPI2_MFGPAGE_DEVID_SAS2308_2:
  1868. switch (ioc->pdev->subsystem_device) {
  1869. case MPT2SAS_HP_2_4_INTERNAL_SSDID:
  1870. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1871. MPT2SAS_HP_2_4_INTERNAL_BRANDING);
  1872. break;
  1873. case MPT2SAS_HP_2_4_EXTERNAL_SSDID:
  1874. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1875. MPT2SAS_HP_2_4_EXTERNAL_BRANDING);
  1876. break;
  1877. case MPT2SAS_HP_1_4_INTERNAL_1_4_EXTERNAL_SSDID:
  1878. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1879. MPT2SAS_HP_1_4_INTERNAL_1_4_EXTERNAL_BRANDING);
  1880. break;
  1881. case MPT2SAS_HP_EMBEDDED_2_4_INTERNAL_SSDID:
  1882. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1883. MPT2SAS_HP_EMBEDDED_2_4_INTERNAL_BRANDING);
  1884. break;
  1885. default:
  1886. break;
  1887. }
  1888. default:
  1889. break;
  1890. }
  1891. }
  1892. /**
  1893. * _base_display_ioc_capabilities - Disply IOC's capabilities.
  1894. * @ioc: per adapter object
  1895. *
  1896. * Return nothing.
  1897. */
  1898. static void
  1899. _base_display_ioc_capabilities(struct MPT2SAS_ADAPTER *ioc)
  1900. {
  1901. int i = 0;
  1902. char desc[16];
  1903. u32 iounit_pg1_flags;
  1904. u32 bios_version;
  1905. bios_version = le32_to_cpu(ioc->bios_pg3.BiosVersion);
  1906. strncpy(desc, ioc->manu_pg0.ChipName, 16);
  1907. printk(MPT2SAS_INFO_FMT "%s: FWVersion(%02d.%02d.%02d.%02d), "
  1908. "ChipRevision(0x%02x), BiosVersion(%02d.%02d.%02d.%02d)\n",
  1909. ioc->name, desc,
  1910. (ioc->facts.FWVersion.Word & 0xFF000000) >> 24,
  1911. (ioc->facts.FWVersion.Word & 0x00FF0000) >> 16,
  1912. (ioc->facts.FWVersion.Word & 0x0000FF00) >> 8,
  1913. ioc->facts.FWVersion.Word & 0x000000FF,
  1914. ioc->pdev->revision,
  1915. (bios_version & 0xFF000000) >> 24,
  1916. (bios_version & 0x00FF0000) >> 16,
  1917. (bios_version & 0x0000FF00) >> 8,
  1918. bios_version & 0x000000FF);
  1919. _base_display_dell_branding(ioc);
  1920. _base_display_intel_branding(ioc);
  1921. _base_display_hp_branding(ioc);
  1922. printk(MPT2SAS_INFO_FMT "Protocol=(", ioc->name);
  1923. if (ioc->facts.ProtocolFlags & MPI2_IOCFACTS_PROTOCOL_SCSI_INITIATOR) {
  1924. printk("Initiator");
  1925. i++;
  1926. }
  1927. if (ioc->facts.ProtocolFlags & MPI2_IOCFACTS_PROTOCOL_SCSI_TARGET) {
  1928. printk("%sTarget", i ? "," : "");
  1929. i++;
  1930. }
  1931. i = 0;
  1932. printk("), ");
  1933. printk("Capabilities=(");
  1934. if (!ioc->hide_ir_msg) {
  1935. if (ioc->facts.IOCCapabilities &
  1936. MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID) {
  1937. printk("Raid");
  1938. i++;
  1939. }
  1940. }
  1941. if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_TLR) {
  1942. printk("%sTLR", i ? "," : "");
  1943. i++;
  1944. }
  1945. if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_MULTICAST) {
  1946. printk("%sMulticast", i ? "," : "");
  1947. i++;
  1948. }
  1949. if (ioc->facts.IOCCapabilities &
  1950. MPI2_IOCFACTS_CAPABILITY_BIDIRECTIONAL_TARGET) {
  1951. printk("%sBIDI Target", i ? "," : "");
  1952. i++;
  1953. }
  1954. if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_EEDP) {
  1955. printk("%sEEDP", i ? "," : "");
  1956. i++;
  1957. }
  1958. if (ioc->facts.IOCCapabilities &
  1959. MPI2_IOCFACTS_CAPABILITY_SNAPSHOT_BUFFER) {
  1960. printk("%sSnapshot Buffer", i ? "," : "");
  1961. i++;
  1962. }
  1963. if (ioc->facts.IOCCapabilities &
  1964. MPI2_IOCFACTS_CAPABILITY_DIAG_TRACE_BUFFER) {
  1965. printk("%sDiag Trace Buffer", i ? "," : "");
  1966. i++;
  1967. }
  1968. if (ioc->facts.IOCCapabilities &
  1969. MPI2_IOCFACTS_CAPABILITY_EXTENDED_BUFFER) {
  1970. printk(KERN_INFO "%sDiag Extended Buffer", i ? "," : "");
  1971. i++;
  1972. }
  1973. if (ioc->facts.IOCCapabilities &
  1974. MPI2_IOCFACTS_CAPABILITY_TASK_SET_FULL_HANDLING) {
  1975. printk("%sTask Set Full", i ? "," : "");
  1976. i++;
  1977. }
  1978. iounit_pg1_flags = le32_to_cpu(ioc->iounit_pg1.Flags);
  1979. if (!(iounit_pg1_flags & MPI2_IOUNITPAGE1_NATIVE_COMMAND_Q_DISABLE)) {
  1980. printk("%sNCQ", i ? "," : "");
  1981. i++;
  1982. }
  1983. printk(")\n");
  1984. }
  1985. /**
  1986. * mpt2sas_base_update_missing_delay - change the missing delay timers
  1987. * @ioc: per adapter object
  1988. * @device_missing_delay: amount of time till device is reported missing
  1989. * @io_missing_delay: interval IO is returned when there is a missing device
  1990. *
  1991. * Return nothing.
  1992. *
  1993. * Passed on the command line, this function will modify the device missing
  1994. * delay, as well as the io missing delay. This should be called at driver
  1995. * load time.
  1996. */
  1997. void
  1998. mpt2sas_base_update_missing_delay(struct MPT2SAS_ADAPTER *ioc,
  1999. u16 device_missing_delay, u8 io_missing_delay)
  2000. {
  2001. u16 dmd, dmd_new, dmd_orignal;
  2002. u8 io_missing_delay_original;
  2003. u16 sz;
  2004. Mpi2SasIOUnitPage1_t *sas_iounit_pg1 = NULL;
  2005. Mpi2ConfigReply_t mpi_reply;
  2006. u8 num_phys = 0;
  2007. u16 ioc_status;
  2008. mpt2sas_config_get_number_hba_phys(ioc, &num_phys);
  2009. if (!num_phys)
  2010. return;
  2011. sz = offsetof(Mpi2SasIOUnitPage1_t, PhyData) + (num_phys *
  2012. sizeof(Mpi2SasIOUnit1PhyData_t));
  2013. sas_iounit_pg1 = kzalloc(sz, GFP_KERNEL);
  2014. if (!sas_iounit_pg1) {
  2015. printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",
  2016. ioc->name, __FILE__, __LINE__, __func__);
  2017. goto out;
  2018. }
  2019. if ((mpt2sas_config_get_sas_iounit_pg1(ioc, &mpi_reply,
  2020. sas_iounit_pg1, sz))) {
  2021. printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",
  2022. ioc->name, __FILE__, __LINE__, __func__);
  2023. goto out;
  2024. }
  2025. ioc_status = le16_to_cpu(mpi_reply.IOCStatus) &
  2026. MPI2_IOCSTATUS_MASK;
  2027. if (ioc_status != MPI2_IOCSTATUS_SUCCESS) {
  2028. printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",
  2029. ioc->name, __FILE__, __LINE__, __func__);
  2030. goto out;
  2031. }
  2032. /* device missing delay */
  2033. dmd = sas_iounit_pg1->ReportDeviceMissingDelay;
  2034. if (dmd & MPI2_SASIOUNIT1_REPORT_MISSING_UNIT_16)
  2035. dmd = (dmd & MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK) * 16;
  2036. else
  2037. dmd = dmd & MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK;
  2038. dmd_orignal = dmd;
  2039. if (device_missing_delay > 0x7F) {
  2040. dmd = (device_missing_delay > 0x7F0) ? 0x7F0 :
  2041. device_missing_delay;
  2042. dmd = dmd / 16;
  2043. dmd |= MPI2_SASIOUNIT1_REPORT_MISSING_UNIT_16;
  2044. } else
  2045. dmd = device_missing_delay;
  2046. sas_iounit_pg1->ReportDeviceMissingDelay = dmd;
  2047. /* io missing delay */
  2048. io_missing_delay_original = sas_iounit_pg1->IODeviceMissingDelay;
  2049. sas_iounit_pg1->IODeviceMissingDelay = io_missing_delay;
  2050. if (!mpt2sas_config_set_sas_iounit_pg1(ioc, &mpi_reply, sas_iounit_pg1,
  2051. sz)) {
  2052. if (dmd & MPI2_SASIOUNIT1_REPORT_MISSING_UNIT_16)
  2053. dmd_new = (dmd &
  2054. MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK) * 16;
  2055. else
  2056. dmd_new =
  2057. dmd & MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK;
  2058. printk(MPT2SAS_INFO_FMT "device_missing_delay: old(%d), "
  2059. "new(%d)\n", ioc->name, dmd_orignal, dmd_new);
  2060. printk(MPT2SAS_INFO_FMT "ioc_missing_delay: old(%d), "
  2061. "new(%d)\n", ioc->name, io_missing_delay_original,
  2062. io_missing_delay);
  2063. ioc->device_missing_delay = dmd_new;
  2064. ioc->io_missing_delay = io_missing_delay;
  2065. }
  2066. out:
  2067. kfree(sas_iounit_pg1);
  2068. }
  2069. /**
  2070. * _base_static_config_pages - static start of day config pages
  2071. * @ioc: per adapter object
  2072. *
  2073. * Return nothing.
  2074. */
  2075. static void
  2076. _base_static_config_pages(struct MPT2SAS_ADAPTER *ioc)
  2077. {
  2078. Mpi2ConfigReply_t mpi_reply;
  2079. u32 iounit_pg1_flags;
  2080. mpt2sas_config_get_manufacturing_pg0(ioc, &mpi_reply, &ioc->manu_pg0);
  2081. if (ioc->ir_firmware)
  2082. mpt2sas_config_get_manufacturing_pg10(ioc, &mpi_reply,
  2083. &ioc->manu_pg10);
  2084. mpt2sas_config_get_bios_pg2(ioc, &mpi_reply, &ioc->bios_pg2);
  2085. mpt2sas_config_get_bios_pg3(ioc, &mpi_reply, &ioc->bios_pg3);
  2086. mpt2sas_config_get_ioc_pg8(ioc, &mpi_reply, &ioc->ioc_pg8);
  2087. mpt2sas_config_get_iounit_pg0(ioc, &mpi_reply, &ioc->iounit_pg0);
  2088. mpt2sas_config_get_iounit_pg1(ioc, &mpi_reply, &ioc->iounit_pg1);
  2089. _base_display_ioc_capabilities(ioc);
  2090. /*
  2091. * Enable task_set_full handling in iounit_pg1 when the
  2092. * facts capabilities indicate that its supported.
  2093. */
  2094. iounit_pg1_flags = le32_to_cpu(ioc->iounit_pg1.Flags);
  2095. if ((ioc->facts.IOCCapabilities &
  2096. MPI2_IOCFACTS_CAPABILITY_TASK_SET_FULL_HANDLING))
  2097. iounit_pg1_flags &=
  2098. ~MPI2_IOUNITPAGE1_DISABLE_TASK_SET_FULL_HANDLING;
  2099. else
  2100. iounit_pg1_flags |=
  2101. MPI2_IOUNITPAGE1_DISABLE_TASK_SET_FULL_HANDLING;
  2102. ioc->iounit_pg1.Flags = cpu_to_le32(iounit_pg1_flags);
  2103. mpt2sas_config_set_iounit_pg1(ioc, &mpi_reply, &ioc->iounit_pg1);
  2104. }
  2105. /**
  2106. * _base_release_memory_pools - release memory
  2107. * @ioc: per adapter object
  2108. *
  2109. * Free memory allocated from _base_allocate_memory_pools.
  2110. *
  2111. * Return nothing.
  2112. */
  2113. static void
  2114. _base_release_memory_pools(struct MPT2SAS_ADAPTER *ioc)
  2115. {
  2116. int i = 0;
  2117. struct reply_post_struct *rps;
  2118. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  2119. __func__));
  2120. if (ioc->request) {
  2121. pci_free_consistent(ioc->pdev, ioc->request_dma_sz,
  2122. ioc->request, ioc->request_dma);
  2123. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "request_pool(0x%p)"
  2124. ": free\n", ioc->name, ioc->request));
  2125. ioc->request = NULL;
  2126. }
  2127. if (ioc->sense) {
  2128. pci_pool_free(ioc->sense_dma_pool, ioc->sense, ioc->sense_dma);
  2129. if (ioc->sense_dma_pool)
  2130. pci_pool_destroy(ioc->sense_dma_pool);
  2131. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "sense_pool(0x%p)"
  2132. ": free\n", ioc->name, ioc->sense));
  2133. ioc->sense = NULL;
  2134. }
  2135. if (ioc->reply) {
  2136. pci_pool_free(ioc->reply_dma_pool, ioc->reply, ioc->reply_dma);
  2137. if (ioc->reply_dma_pool)
  2138. pci_pool_destroy(ioc->reply_dma_pool);
  2139. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_pool(0x%p)"
  2140. ": free\n", ioc->name, ioc->reply));
  2141. ioc->reply = NULL;
  2142. }
  2143. if (ioc->reply_free) {
  2144. pci_pool_free(ioc->reply_free_dma_pool, ioc->reply_free,
  2145. ioc->reply_free_dma);
  2146. if (ioc->reply_free_dma_pool)
  2147. pci_pool_destroy(ioc->reply_free_dma_pool);
  2148. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free_pool"
  2149. "(0x%p): free\n", ioc->name, ioc->reply_free));
  2150. ioc->reply_free = NULL;
  2151. }
  2152. if (ioc->reply_post) {
  2153. do {
  2154. rps = &ioc->reply_post[i];
  2155. if (rps->reply_post_free) {
  2156. pci_pool_free(
  2157. ioc->reply_post_free_dma_pool,
  2158. rps->reply_post_free,
  2159. rps->reply_post_free_dma);
  2160. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT
  2161. "reply_post_free_pool(0x%p): free\n",
  2162. ioc->name, rps->reply_post_free));
  2163. rps->reply_post_free = NULL;
  2164. }
  2165. } while (ioc->rdpq_array_enable &&
  2166. (++i < ioc->reply_queue_count));
  2167. if (ioc->reply_post_free_dma_pool)
  2168. pci_pool_destroy(ioc->reply_post_free_dma_pool);
  2169. kfree(ioc->reply_post);
  2170. }
  2171. if (ioc->config_page) {
  2172. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT
  2173. "config_page(0x%p): free\n", ioc->name,
  2174. ioc->config_page));
  2175. pci_free_consistent(ioc->pdev, ioc->config_page_sz,
  2176. ioc->config_page, ioc->config_page_dma);
  2177. }
  2178. if (ioc->scsi_lookup) {
  2179. free_pages((ulong)ioc->scsi_lookup, ioc->scsi_lookup_pages);
  2180. ioc->scsi_lookup = NULL;
  2181. }
  2182. kfree(ioc->hpr_lookup);
  2183. kfree(ioc->internal_lookup);
  2184. if (ioc->chain_lookup) {
  2185. for (i = 0; i < ioc->chain_depth; i++) {
  2186. if (ioc->chain_lookup[i].chain_buffer)
  2187. pci_pool_free(ioc->chain_dma_pool,
  2188. ioc->chain_lookup[i].chain_buffer,
  2189. ioc->chain_lookup[i].chain_buffer_dma);
  2190. }
  2191. if (ioc->chain_dma_pool)
  2192. pci_pool_destroy(ioc->chain_dma_pool);
  2193. free_pages((ulong)ioc->chain_lookup, ioc->chain_pages);
  2194. ioc->chain_lookup = NULL;
  2195. }
  2196. }
  2197. /**
  2198. * _base_allocate_memory_pools - allocate start of day memory pools
  2199. * @ioc: per adapter object
  2200. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2201. *
  2202. * Returns 0 success, anything else error
  2203. */
  2204. static int
  2205. _base_allocate_memory_pools(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  2206. {
  2207. struct mpt2sas_facts *facts;
  2208. u16 max_sge_elements;
  2209. u16 chains_needed_per_io;
  2210. u32 sz, total_sz, reply_post_free_sz;
  2211. u32 retry_sz;
  2212. u16 max_request_credit;
  2213. int i;
  2214. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  2215. __func__));
  2216. retry_sz = 0;
  2217. facts = &ioc->facts;
  2218. /* command line tunables for max sgl entries */
  2219. if (max_sgl_entries != -1) {
  2220. ioc->shost->sg_tablesize = (max_sgl_entries <
  2221. MPT2SAS_SG_DEPTH) ? max_sgl_entries :
  2222. MPT2SAS_SG_DEPTH;
  2223. } else {
  2224. ioc->shost->sg_tablesize = MPT2SAS_SG_DEPTH;
  2225. }
  2226. /* command line tunables for max controller queue depth */
  2227. if (max_queue_depth != -1 && max_queue_depth != 0) {
  2228. max_request_credit = min_t(u16, max_queue_depth +
  2229. ioc->hi_priority_depth + ioc->internal_depth,
  2230. facts->RequestCredit);
  2231. if (max_request_credit > MAX_HBA_QUEUE_DEPTH)
  2232. max_request_credit = MAX_HBA_QUEUE_DEPTH;
  2233. } else
  2234. max_request_credit = min_t(u16, facts->RequestCredit,
  2235. MAX_HBA_QUEUE_DEPTH);
  2236. ioc->hba_queue_depth = max_request_credit;
  2237. ioc->hi_priority_depth = facts->HighPriorityCredit;
  2238. ioc->internal_depth = ioc->hi_priority_depth + 5;
  2239. /* request frame size */
  2240. ioc->request_sz = facts->IOCRequestFrameSize * 4;
  2241. /* reply frame size */
  2242. ioc->reply_sz = facts->ReplyFrameSize * 4;
  2243. retry_allocation:
  2244. total_sz = 0;
  2245. /* calculate number of sg elements left over in the 1st frame */
  2246. max_sge_elements = ioc->request_sz - ((sizeof(Mpi2SCSIIORequest_t) -
  2247. sizeof(Mpi2SGEIOUnion_t)) + ioc->sge_size);
  2248. ioc->max_sges_in_main_message = max_sge_elements/ioc->sge_size;
  2249. /* now do the same for a chain buffer */
  2250. max_sge_elements = ioc->request_sz - ioc->sge_size;
  2251. ioc->max_sges_in_chain_message = max_sge_elements/ioc->sge_size;
  2252. ioc->chain_offset_value_for_main_message =
  2253. ((sizeof(Mpi2SCSIIORequest_t) - sizeof(Mpi2SGEIOUnion_t)) +
  2254. (ioc->max_sges_in_chain_message * ioc->sge_size)) / 4;
  2255. /*
  2256. * MPT2SAS_SG_DEPTH = CONFIG_FUSION_MAX_SGE
  2257. */
  2258. chains_needed_per_io = ((ioc->shost->sg_tablesize -
  2259. ioc->max_sges_in_main_message)/ioc->max_sges_in_chain_message)
  2260. + 1;
  2261. if (chains_needed_per_io > facts->MaxChainDepth) {
  2262. chains_needed_per_io = facts->MaxChainDepth;
  2263. ioc->shost->sg_tablesize = min_t(u16,
  2264. ioc->max_sges_in_main_message + (ioc->max_sges_in_chain_message
  2265. * chains_needed_per_io), ioc->shost->sg_tablesize);
  2266. }
  2267. ioc->chains_needed_per_io = chains_needed_per_io;
  2268. /* reply free queue sizing - taking into account for 64 FW events */
  2269. ioc->reply_free_queue_depth = ioc->hba_queue_depth + 64;
  2270. /* calculate reply descriptor post queue depth */
  2271. ioc->reply_post_queue_depth = ioc->hba_queue_depth +
  2272. ioc->reply_free_queue_depth + 1;
  2273. /* align the reply post queue on the next 16 count boundary */
  2274. if (ioc->reply_post_queue_depth % 16)
  2275. ioc->reply_post_queue_depth += 16 -
  2276. (ioc->reply_post_queue_depth % 16);
  2277. if (ioc->reply_post_queue_depth >
  2278. facts->MaxReplyDescriptorPostQueueDepth) {
  2279. ioc->reply_post_queue_depth =
  2280. facts->MaxReplyDescriptorPostQueueDepth -
  2281. (facts->MaxReplyDescriptorPostQueueDepth % 16);
  2282. ioc->hba_queue_depth =
  2283. ((ioc->reply_post_queue_depth - 64) / 2) - 1;
  2284. ioc->reply_free_queue_depth = ioc->hba_queue_depth + 64;
  2285. }
  2286. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scatter gather: "
  2287. "sge_in_main_msg(%d), sge_per_chain(%d), sge_per_io(%d), "
  2288. "chains_per_io(%d)\n", ioc->name, ioc->max_sges_in_main_message,
  2289. ioc->max_sges_in_chain_message, ioc->shost->sg_tablesize,
  2290. ioc->chains_needed_per_io));
  2291. /* reply post queue, 16 byte align */
  2292. reply_post_free_sz = ioc->reply_post_queue_depth *
  2293. sizeof(Mpi2DefaultReplyDescriptor_t);
  2294. sz = reply_post_free_sz;
  2295. if (_base_is_controller_msix_enabled(ioc) && !ioc->rdpq_array_enable)
  2296. sz *= ioc->reply_queue_count;
  2297. ioc->reply_post = kcalloc((ioc->rdpq_array_enable) ?
  2298. (ioc->reply_queue_count):1,
  2299. sizeof(struct reply_post_struct), GFP_KERNEL);
  2300. if (!ioc->reply_post) {
  2301. printk(MPT2SAS_ERR_FMT "reply_post_free pool: kcalloc failed\n",
  2302. ioc->name);
  2303. goto out;
  2304. }
  2305. ioc->reply_post_free_dma_pool = pci_pool_create("reply_post_free pool",
  2306. ioc->pdev, sz, 16, 0);
  2307. if (!ioc->reply_post_free_dma_pool) {
  2308. printk(MPT2SAS_ERR_FMT
  2309. "reply_post_free pool: pci_pool_create failed\n",
  2310. ioc->name);
  2311. goto out;
  2312. }
  2313. i = 0;
  2314. do {
  2315. ioc->reply_post[i].reply_post_free =
  2316. pci_pool_alloc(ioc->reply_post_free_dma_pool,
  2317. GFP_KERNEL,
  2318. &ioc->reply_post[i].reply_post_free_dma);
  2319. if (!ioc->reply_post[i].reply_post_free) {
  2320. printk(MPT2SAS_ERR_FMT
  2321. "reply_post_free pool: pci_pool_alloc failed\n",
  2322. ioc->name);
  2323. goto out;
  2324. }
  2325. memset(ioc->reply_post[i].reply_post_free, 0, sz);
  2326. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT
  2327. "reply post free pool (0x%p): depth(%d),"
  2328. "element_size(%d), pool_size(%d kB)\n", ioc->name,
  2329. ioc->reply_post[i].reply_post_free,
  2330. ioc->reply_post_queue_depth, 8, sz/1024));
  2331. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT
  2332. "reply_post_free_dma = (0x%llx)\n", ioc->name,
  2333. (unsigned long long)
  2334. ioc->reply_post[i].reply_post_free_dma));
  2335. total_sz += sz;
  2336. } while (ioc->rdpq_array_enable && (++i < ioc->reply_queue_count));
  2337. if (ioc->dma_mask == 64) {
  2338. if (_base_change_consistent_dma_mask(ioc, ioc->pdev) != 0) {
  2339. printk(MPT2SAS_WARN_FMT
  2340. "no suitable consistent DMA mask for %s\n",
  2341. ioc->name, pci_name(ioc->pdev));
  2342. goto out;
  2343. }
  2344. }
  2345. ioc->scsiio_depth = ioc->hba_queue_depth -
  2346. ioc->hi_priority_depth - ioc->internal_depth;
  2347. /* set the scsi host can_queue depth
  2348. * with some internal commands that could be outstanding
  2349. */
  2350. ioc->shost->can_queue = ioc->scsiio_depth;
  2351. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scsi host: "
  2352. "can_queue depth (%d)\n", ioc->name, ioc->shost->can_queue));
  2353. /* contiguous pool for request and chains, 16 byte align, one extra "
  2354. * "frame for smid=0
  2355. */
  2356. ioc->chain_depth = ioc->chains_needed_per_io * ioc->scsiio_depth;
  2357. sz = ((ioc->scsiio_depth + 1) * ioc->request_sz);
  2358. /* hi-priority queue */
  2359. sz += (ioc->hi_priority_depth * ioc->request_sz);
  2360. /* internal queue */
  2361. sz += (ioc->internal_depth * ioc->request_sz);
  2362. ioc->request_dma_sz = sz;
  2363. ioc->request = pci_alloc_consistent(ioc->pdev, sz, &ioc->request_dma);
  2364. if (!ioc->request) {
  2365. printk(MPT2SAS_ERR_FMT "request pool: pci_alloc_consistent "
  2366. "failed: hba_depth(%d), chains_per_io(%d), frame_sz(%d), "
  2367. "total(%d kB)\n", ioc->name, ioc->hba_queue_depth,
  2368. ioc->chains_needed_per_io, ioc->request_sz, sz/1024);
  2369. if (ioc->scsiio_depth < MPT2SAS_SAS_QUEUE_DEPTH)
  2370. goto out;
  2371. retry_sz += 64;
  2372. ioc->hba_queue_depth = max_request_credit - retry_sz;
  2373. goto retry_allocation;
  2374. }
  2375. if (retry_sz)
  2376. printk(MPT2SAS_ERR_FMT "request pool: pci_alloc_consistent "
  2377. "succeed: hba_depth(%d), chains_per_io(%d), frame_sz(%d), "
  2378. "total(%d kb)\n", ioc->name, ioc->hba_queue_depth,
  2379. ioc->chains_needed_per_io, ioc->request_sz, sz/1024);
  2380. /* hi-priority queue */
  2381. ioc->hi_priority = ioc->request + ((ioc->scsiio_depth + 1) *
  2382. ioc->request_sz);
  2383. ioc->hi_priority_dma = ioc->request_dma + ((ioc->scsiio_depth + 1) *
  2384. ioc->request_sz);
  2385. /* internal queue */
  2386. ioc->internal = ioc->hi_priority + (ioc->hi_priority_depth *
  2387. ioc->request_sz);
  2388. ioc->internal_dma = ioc->hi_priority_dma + (ioc->hi_priority_depth *
  2389. ioc->request_sz);
  2390. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request pool(0x%p): "
  2391. "depth(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name,
  2392. ioc->request, ioc->hba_queue_depth, ioc->request_sz,
  2393. (ioc->hba_queue_depth * ioc->request_sz)/1024));
  2394. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request pool: dma(0x%llx)\n",
  2395. ioc->name, (unsigned long long) ioc->request_dma));
  2396. total_sz += sz;
  2397. sz = ioc->scsiio_depth * sizeof(struct scsiio_tracker);
  2398. ioc->scsi_lookup_pages = get_order(sz);
  2399. ioc->scsi_lookup = (struct scsiio_tracker *)__get_free_pages(
  2400. GFP_KERNEL, ioc->scsi_lookup_pages);
  2401. if (!ioc->scsi_lookup) {
  2402. printk(MPT2SAS_ERR_FMT "scsi_lookup: get_free_pages failed, "
  2403. "sz(%d)\n", ioc->name, (int)sz);
  2404. goto out;
  2405. }
  2406. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scsiio(0x%p): "
  2407. "depth(%d)\n", ioc->name, ioc->request,
  2408. ioc->scsiio_depth));
  2409. ioc->chain_depth = min_t(u32, ioc->chain_depth, MAX_CHAIN_DEPTH);
  2410. sz = ioc->chain_depth * sizeof(struct chain_tracker);
  2411. ioc->chain_pages = get_order(sz);
  2412. ioc->chain_lookup = (struct chain_tracker *)__get_free_pages(
  2413. GFP_KERNEL, ioc->chain_pages);
  2414. if (!ioc->chain_lookup) {
  2415. printk(MPT2SAS_ERR_FMT "chain_lookup: get_free_pages failed, "
  2416. "sz(%d)\n", ioc->name, (int)sz);
  2417. goto out;
  2418. }
  2419. ioc->chain_dma_pool = pci_pool_create("chain pool", ioc->pdev,
  2420. ioc->request_sz, 16, 0);
  2421. if (!ioc->chain_dma_pool) {
  2422. printk(MPT2SAS_ERR_FMT "chain_dma_pool: pci_pool_create "
  2423. "failed\n", ioc->name);
  2424. goto out;
  2425. }
  2426. for (i = 0; i < ioc->chain_depth; i++) {
  2427. ioc->chain_lookup[i].chain_buffer = pci_pool_alloc(
  2428. ioc->chain_dma_pool , GFP_KERNEL,
  2429. &ioc->chain_lookup[i].chain_buffer_dma);
  2430. if (!ioc->chain_lookup[i].chain_buffer) {
  2431. ioc->chain_depth = i;
  2432. goto chain_done;
  2433. }
  2434. total_sz += ioc->request_sz;
  2435. }
  2436. chain_done:
  2437. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "chain pool depth"
  2438. "(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name,
  2439. ioc->chain_depth, ioc->request_sz, ((ioc->chain_depth *
  2440. ioc->request_sz))/1024));
  2441. /* initialize hi-priority queue smid's */
  2442. ioc->hpr_lookup = kcalloc(ioc->hi_priority_depth,
  2443. sizeof(struct request_tracker), GFP_KERNEL);
  2444. if (!ioc->hpr_lookup) {
  2445. printk(MPT2SAS_ERR_FMT "hpr_lookup: kcalloc failed\n",
  2446. ioc->name);
  2447. goto out;
  2448. }
  2449. ioc->hi_priority_smid = ioc->scsiio_depth + 1;
  2450. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "hi_priority(0x%p): "
  2451. "depth(%d), start smid(%d)\n", ioc->name, ioc->hi_priority,
  2452. ioc->hi_priority_depth, ioc->hi_priority_smid));
  2453. /* initialize internal queue smid's */
  2454. ioc->internal_lookup = kcalloc(ioc->internal_depth,
  2455. sizeof(struct request_tracker), GFP_KERNEL);
  2456. if (!ioc->internal_lookup) {
  2457. printk(MPT2SAS_ERR_FMT "internal_lookup: kcalloc failed\n",
  2458. ioc->name);
  2459. goto out;
  2460. }
  2461. ioc->internal_smid = ioc->hi_priority_smid + ioc->hi_priority_depth;
  2462. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "internal(0x%p): "
  2463. "depth(%d), start smid(%d)\n", ioc->name, ioc->internal,
  2464. ioc->internal_depth, ioc->internal_smid));
  2465. /* sense buffers, 4 byte align */
  2466. sz = ioc->scsiio_depth * SCSI_SENSE_BUFFERSIZE;
  2467. ioc->sense_dma_pool = pci_pool_create("sense pool", ioc->pdev, sz, 4,
  2468. 0);
  2469. if (!ioc->sense_dma_pool) {
  2470. printk(MPT2SAS_ERR_FMT "sense pool: pci_pool_create failed\n",
  2471. ioc->name);
  2472. goto out;
  2473. }
  2474. ioc->sense = pci_pool_alloc(ioc->sense_dma_pool , GFP_KERNEL,
  2475. &ioc->sense_dma);
  2476. if (!ioc->sense) {
  2477. printk(MPT2SAS_ERR_FMT "sense pool: pci_pool_alloc failed\n",
  2478. ioc->name);
  2479. goto out;
  2480. }
  2481. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT
  2482. "sense pool(0x%p): depth(%d), element_size(%d), pool_size"
  2483. "(%d kB)\n", ioc->name, ioc->sense, ioc->scsiio_depth,
  2484. SCSI_SENSE_BUFFERSIZE, sz/1024));
  2485. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "sense_dma(0x%llx)\n",
  2486. ioc->name, (unsigned long long)ioc->sense_dma));
  2487. total_sz += sz;
  2488. /* reply pool, 4 byte align */
  2489. sz = ioc->reply_free_queue_depth * ioc->reply_sz;
  2490. ioc->reply_dma_pool = pci_pool_create("reply pool", ioc->pdev, sz, 4,
  2491. 0);
  2492. if (!ioc->reply_dma_pool) {
  2493. printk(MPT2SAS_ERR_FMT "reply pool: pci_pool_create failed\n",
  2494. ioc->name);
  2495. goto out;
  2496. }
  2497. ioc->reply = pci_pool_alloc(ioc->reply_dma_pool , GFP_KERNEL,
  2498. &ioc->reply_dma);
  2499. if (!ioc->reply) {
  2500. printk(MPT2SAS_ERR_FMT "reply pool: pci_pool_alloc failed\n",
  2501. ioc->name);
  2502. goto out;
  2503. }
  2504. ioc->reply_dma_min_address = (u32)(ioc->reply_dma);
  2505. ioc->reply_dma_max_address = (u32)(ioc->reply_dma) + sz;
  2506. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply pool(0x%p): depth"
  2507. "(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name, ioc->reply,
  2508. ioc->reply_free_queue_depth, ioc->reply_sz, sz/1024));
  2509. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_dma(0x%llx)\n",
  2510. ioc->name, (unsigned long long)ioc->reply_dma));
  2511. total_sz += sz;
  2512. /* reply free queue, 16 byte align */
  2513. sz = ioc->reply_free_queue_depth * 4;
  2514. ioc->reply_free_dma_pool = pci_pool_create("reply_free pool",
  2515. ioc->pdev, sz, 16, 0);
  2516. if (!ioc->reply_free_dma_pool) {
  2517. printk(MPT2SAS_ERR_FMT "reply_free pool: pci_pool_create "
  2518. "failed\n", ioc->name);
  2519. goto out;
  2520. }
  2521. ioc->reply_free = pci_pool_alloc(ioc->reply_free_dma_pool , GFP_KERNEL,
  2522. &ioc->reply_free_dma);
  2523. if (!ioc->reply_free) {
  2524. printk(MPT2SAS_ERR_FMT "reply_free pool: pci_pool_alloc "
  2525. "failed\n", ioc->name);
  2526. goto out;
  2527. }
  2528. memset(ioc->reply_free, 0, sz);
  2529. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free pool(0x%p): "
  2530. "depth(%d), element_size(%d), pool_size(%d kB)\n", ioc->name,
  2531. ioc->reply_free, ioc->reply_free_queue_depth, 4, sz/1024));
  2532. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free_dma"
  2533. "(0x%llx)\n", ioc->name, (unsigned long long)ioc->reply_free_dma));
  2534. total_sz += sz;
  2535. ioc->config_page_sz = 512;
  2536. ioc->config_page = pci_alloc_consistent(ioc->pdev,
  2537. ioc->config_page_sz, &ioc->config_page_dma);
  2538. if (!ioc->config_page) {
  2539. printk(MPT2SAS_ERR_FMT "config page: pci_pool_alloc "
  2540. "failed\n", ioc->name);
  2541. goto out;
  2542. }
  2543. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "config page(0x%p): size"
  2544. "(%d)\n", ioc->name, ioc->config_page, ioc->config_page_sz));
  2545. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "config_page_dma"
  2546. "(0x%llx)\n", ioc->name, (unsigned long long)ioc->config_page_dma));
  2547. total_sz += ioc->config_page_sz;
  2548. printk(MPT2SAS_INFO_FMT "Allocated physical memory: size(%d kB)\n",
  2549. ioc->name, total_sz/1024);
  2550. printk(MPT2SAS_INFO_FMT "Current Controller Queue Depth(%d), "
  2551. "Max Controller Queue Depth(%d)\n",
  2552. ioc->name, ioc->shost->can_queue, facts->RequestCredit);
  2553. printk(MPT2SAS_INFO_FMT "Scatter Gather Elements per IO(%d)\n",
  2554. ioc->name, ioc->shost->sg_tablesize);
  2555. return 0;
  2556. out:
  2557. return -ENOMEM;
  2558. }
  2559. /**
  2560. * mpt2sas_base_get_iocstate - Get the current state of a MPT adapter.
  2561. * @ioc: Pointer to MPT_ADAPTER structure
  2562. * @cooked: Request raw or cooked IOC state
  2563. *
  2564. * Returns all IOC Doorbell register bits if cooked==0, else just the
  2565. * Doorbell bits in MPI_IOC_STATE_MASK.
  2566. */
  2567. u32
  2568. mpt2sas_base_get_iocstate(struct MPT2SAS_ADAPTER *ioc, int cooked)
  2569. {
  2570. u32 s, sc;
  2571. s = readl(&ioc->chip->Doorbell);
  2572. sc = s & MPI2_IOC_STATE_MASK;
  2573. return cooked ? sc : s;
  2574. }
  2575. /**
  2576. * _base_wait_on_iocstate - waiting on a particular ioc state
  2577. * @ioc_state: controller state { READY, OPERATIONAL, or RESET }
  2578. * @timeout: timeout in second
  2579. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2580. *
  2581. * Returns 0 for success, non-zero for failure.
  2582. */
  2583. static int
  2584. _base_wait_on_iocstate(struct MPT2SAS_ADAPTER *ioc, u32 ioc_state, int timeout,
  2585. int sleep_flag)
  2586. {
  2587. u32 count, cntdn;
  2588. u32 current_state;
  2589. count = 0;
  2590. cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
  2591. do {
  2592. current_state = mpt2sas_base_get_iocstate(ioc, 1);
  2593. if (current_state == ioc_state)
  2594. return 0;
  2595. if (count && current_state == MPI2_IOC_STATE_FAULT)
  2596. break;
  2597. if (sleep_flag == CAN_SLEEP)
  2598. msleep(1);
  2599. else
  2600. udelay(500);
  2601. count++;
  2602. } while (--cntdn);
  2603. return current_state;
  2604. }
  2605. /**
  2606. * _base_wait_for_doorbell_int - waiting for controller interrupt(generated by
  2607. * a write to the doorbell)
  2608. * @ioc: per adapter object
  2609. * @timeout: timeout in second
  2610. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2611. *
  2612. * Returns 0 for success, non-zero for failure.
  2613. *
  2614. * Notes: MPI2_HIS_IOC2SYS_DB_STATUS - set to one when IOC writes to doorbell.
  2615. */
  2616. static int
  2617. _base_wait_for_doorbell_int(struct MPT2SAS_ADAPTER *ioc, int timeout,
  2618. int sleep_flag)
  2619. {
  2620. u32 cntdn, count;
  2621. u32 int_status;
  2622. count = 0;
  2623. cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
  2624. do {
  2625. int_status = readl(&ioc->chip->HostInterruptStatus);
  2626. if (int_status & MPI2_HIS_IOC2SYS_DB_STATUS) {
  2627. dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
  2628. "successful count(%d), timeout(%d)\n", ioc->name,
  2629. __func__, count, timeout));
  2630. return 0;
  2631. }
  2632. if (sleep_flag == CAN_SLEEP)
  2633. msleep(1);
  2634. else
  2635. udelay(500);
  2636. count++;
  2637. } while (--cntdn);
  2638. printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), "
  2639. "int_status(%x)!\n", ioc->name, __func__, count, int_status);
  2640. return -EFAULT;
  2641. }
  2642. /**
  2643. * _base_wait_for_doorbell_ack - waiting for controller to read the doorbell.
  2644. * @ioc: per adapter object
  2645. * @timeout: timeout in second
  2646. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2647. *
  2648. * Returns 0 for success, non-zero for failure.
  2649. *
  2650. * Notes: MPI2_HIS_SYS2IOC_DB_STATUS - set to one when host writes to
  2651. * doorbell.
  2652. */
  2653. static int
  2654. _base_wait_for_doorbell_ack(struct MPT2SAS_ADAPTER *ioc, int timeout,
  2655. int sleep_flag)
  2656. {
  2657. u32 cntdn, count;
  2658. u32 int_status;
  2659. u32 doorbell;
  2660. count = 0;
  2661. cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
  2662. do {
  2663. int_status = readl(&ioc->chip->HostInterruptStatus);
  2664. if (!(int_status & MPI2_HIS_SYS2IOC_DB_STATUS)) {
  2665. dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
  2666. "successful count(%d), timeout(%d)\n", ioc->name,
  2667. __func__, count, timeout));
  2668. return 0;
  2669. } else if (int_status & MPI2_HIS_IOC2SYS_DB_STATUS) {
  2670. doorbell = readl(&ioc->chip->Doorbell);
  2671. if ((doorbell & MPI2_IOC_STATE_MASK) ==
  2672. MPI2_IOC_STATE_FAULT) {
  2673. mpt2sas_base_fault_info(ioc , doorbell);
  2674. return -EFAULT;
  2675. }
  2676. } else if (int_status == 0xFFFFFFFF)
  2677. goto out;
  2678. if (sleep_flag == CAN_SLEEP)
  2679. msleep(1);
  2680. else
  2681. udelay(500);
  2682. count++;
  2683. } while (--cntdn);
  2684. out:
  2685. printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), "
  2686. "int_status(%x)!\n", ioc->name, __func__, count, int_status);
  2687. return -EFAULT;
  2688. }
  2689. /**
  2690. * _base_wait_for_doorbell_not_used - waiting for doorbell to not be in use
  2691. * @ioc: per adapter object
  2692. * @timeout: timeout in second
  2693. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2694. *
  2695. * Returns 0 for success, non-zero for failure.
  2696. *
  2697. */
  2698. static int
  2699. _base_wait_for_doorbell_not_used(struct MPT2SAS_ADAPTER *ioc, int timeout,
  2700. int sleep_flag)
  2701. {
  2702. u32 cntdn, count;
  2703. u32 doorbell_reg;
  2704. count = 0;
  2705. cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
  2706. do {
  2707. doorbell_reg = readl(&ioc->chip->Doorbell);
  2708. if (!(doorbell_reg & MPI2_DOORBELL_USED)) {
  2709. dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
  2710. "successful count(%d), timeout(%d)\n", ioc->name,
  2711. __func__, count, timeout));
  2712. return 0;
  2713. }
  2714. if (sleep_flag == CAN_SLEEP)
  2715. msleep(1);
  2716. else
  2717. udelay(500);
  2718. count++;
  2719. } while (--cntdn);
  2720. printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), "
  2721. "doorbell_reg(%x)!\n", ioc->name, __func__, count, doorbell_reg);
  2722. return -EFAULT;
  2723. }
  2724. /**
  2725. * _base_send_ioc_reset - send doorbell reset
  2726. * @ioc: per adapter object
  2727. * @reset_type: currently only supports: MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET
  2728. * @timeout: timeout in second
  2729. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2730. *
  2731. * Returns 0 for success, non-zero for failure.
  2732. */
  2733. static int
  2734. _base_send_ioc_reset(struct MPT2SAS_ADAPTER *ioc, u8 reset_type, int timeout,
  2735. int sleep_flag)
  2736. {
  2737. u32 ioc_state;
  2738. int r = 0;
  2739. if (reset_type != MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET) {
  2740. printk(MPT2SAS_ERR_FMT "%s: unknown reset_type\n",
  2741. ioc->name, __func__);
  2742. return -EFAULT;
  2743. }
  2744. if (!(ioc->facts.IOCCapabilities &
  2745. MPI2_IOCFACTS_CAPABILITY_EVENT_REPLAY))
  2746. return -EFAULT;
  2747. printk(MPT2SAS_INFO_FMT "sending message unit reset !!\n", ioc->name);
  2748. writel(reset_type << MPI2_DOORBELL_FUNCTION_SHIFT,
  2749. &ioc->chip->Doorbell);
  2750. if ((_base_wait_for_doorbell_ack(ioc, 15, sleep_flag))) {
  2751. r = -EFAULT;
  2752. goto out;
  2753. }
  2754. ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_READY,
  2755. timeout, sleep_flag);
  2756. if (ioc_state) {
  2757. printk(MPT2SAS_ERR_FMT "%s: failed going to ready state "
  2758. " (ioc_state=0x%x)\n", ioc->name, __func__, ioc_state);
  2759. r = -EFAULT;
  2760. goto out;
  2761. }
  2762. out:
  2763. printk(MPT2SAS_INFO_FMT "message unit reset: %s\n",
  2764. ioc->name, ((r == 0) ? "SUCCESS" : "FAILED"));
  2765. return r;
  2766. }
  2767. /**
  2768. * _base_handshake_req_reply_wait - send request thru doorbell interface
  2769. * @ioc: per adapter object
  2770. * @request_bytes: request length
  2771. * @request: pointer having request payload
  2772. * @reply_bytes: reply length
  2773. * @reply: pointer to reply payload
  2774. * @timeout: timeout in second
  2775. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2776. *
  2777. * Returns 0 for success, non-zero for failure.
  2778. */
  2779. static int
  2780. _base_handshake_req_reply_wait(struct MPT2SAS_ADAPTER *ioc, int request_bytes,
  2781. u32 *request, int reply_bytes, u16 *reply, int timeout, int sleep_flag)
  2782. {
  2783. MPI2DefaultReply_t *default_reply = (MPI2DefaultReply_t *)reply;
  2784. int i;
  2785. u8 failed;
  2786. u16 dummy;
  2787. __le32 *mfp;
  2788. /* make sure doorbell is not in use */
  2789. if ((readl(&ioc->chip->Doorbell) & MPI2_DOORBELL_USED)) {
  2790. printk(MPT2SAS_ERR_FMT "doorbell is in use "
  2791. " (line=%d)\n", ioc->name, __LINE__);
  2792. return -EFAULT;
  2793. }
  2794. /* clear pending doorbell interrupts from previous state changes */
  2795. if (readl(&ioc->chip->HostInterruptStatus) &
  2796. MPI2_HIS_IOC2SYS_DB_STATUS)
  2797. writel(0, &ioc->chip->HostInterruptStatus);
  2798. /* send message to ioc */
  2799. writel(((MPI2_FUNCTION_HANDSHAKE<<MPI2_DOORBELL_FUNCTION_SHIFT) |
  2800. ((request_bytes/4)<<MPI2_DOORBELL_ADD_DWORDS_SHIFT)),
  2801. &ioc->chip->Doorbell);
  2802. if ((_base_wait_for_doorbell_int(ioc, 5, NO_SLEEP))) {
  2803. printk(MPT2SAS_ERR_FMT "doorbell handshake "
  2804. "int failed (line=%d)\n", ioc->name, __LINE__);
  2805. return -EFAULT;
  2806. }
  2807. writel(0, &ioc->chip->HostInterruptStatus);
  2808. if ((_base_wait_for_doorbell_ack(ioc, 5, sleep_flag))) {
  2809. printk(MPT2SAS_ERR_FMT "doorbell handshake "
  2810. "ack failed (line=%d)\n", ioc->name, __LINE__);
  2811. return -EFAULT;
  2812. }
  2813. /* send message 32-bits at a time */
  2814. for (i = 0, failed = 0; i < request_bytes/4 && !failed; i++) {
  2815. writel(cpu_to_le32(request[i]), &ioc->chip->Doorbell);
  2816. if ((_base_wait_for_doorbell_ack(ioc, 5, sleep_flag)))
  2817. failed = 1;
  2818. }
  2819. if (failed) {
  2820. printk(MPT2SAS_ERR_FMT "doorbell handshake "
  2821. "sending request failed (line=%d)\n", ioc->name, __LINE__);
  2822. return -EFAULT;
  2823. }
  2824. /* now wait for the reply */
  2825. if ((_base_wait_for_doorbell_int(ioc, timeout, sleep_flag))) {
  2826. printk(MPT2SAS_ERR_FMT "doorbell handshake "
  2827. "int failed (line=%d)\n", ioc->name, __LINE__);
  2828. return -EFAULT;
  2829. }
  2830. /* read the first two 16-bits, it gives the total length of the reply */
  2831. reply[0] = le16_to_cpu(readl(&ioc->chip->Doorbell)
  2832. & MPI2_DOORBELL_DATA_MASK);
  2833. writel(0, &ioc->chip->HostInterruptStatus);
  2834. if ((_base_wait_for_doorbell_int(ioc, 5, sleep_flag))) {
  2835. printk(MPT2SAS_ERR_FMT "doorbell handshake "
  2836. "int failed (line=%d)\n", ioc->name, __LINE__);
  2837. return -EFAULT;
  2838. }
  2839. reply[1] = le16_to_cpu(readl(&ioc->chip->Doorbell)
  2840. & MPI2_DOORBELL_DATA_MASK);
  2841. writel(0, &ioc->chip->HostInterruptStatus);
  2842. for (i = 2; i < default_reply->MsgLength * 2; i++) {
  2843. if ((_base_wait_for_doorbell_int(ioc, 5, sleep_flag))) {
  2844. printk(MPT2SAS_ERR_FMT "doorbell "
  2845. "handshake int failed (line=%d)\n", ioc->name,
  2846. __LINE__);
  2847. return -EFAULT;
  2848. }
  2849. if (i >= reply_bytes/2) /* overflow case */
  2850. dummy = readl(&ioc->chip->Doorbell);
  2851. else
  2852. reply[i] = le16_to_cpu(readl(&ioc->chip->Doorbell)
  2853. & MPI2_DOORBELL_DATA_MASK);
  2854. writel(0, &ioc->chip->HostInterruptStatus);
  2855. }
  2856. _base_wait_for_doorbell_int(ioc, 5, sleep_flag);
  2857. if (_base_wait_for_doorbell_not_used(ioc, 5, sleep_flag) != 0) {
  2858. dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "doorbell is in use "
  2859. " (line=%d)\n", ioc->name, __LINE__));
  2860. }
  2861. writel(0, &ioc->chip->HostInterruptStatus);
  2862. if (ioc->logging_level & MPT_DEBUG_INIT) {
  2863. mfp = (__le32 *)reply;
  2864. printk(KERN_INFO "\toffset:data\n");
  2865. for (i = 0; i < reply_bytes/4; i++)
  2866. printk(KERN_INFO "\t[0x%02x]:%08x\n", i*4,
  2867. le32_to_cpu(mfp[i]));
  2868. }
  2869. return 0;
  2870. }
  2871. /**
  2872. * mpt2sas_base_sas_iounit_control - send sas iounit control to FW
  2873. * @ioc: per adapter object
  2874. * @mpi_reply: the reply payload from FW
  2875. * @mpi_request: the request payload sent to FW
  2876. *
  2877. * The SAS IO Unit Control Request message allows the host to perform low-level
  2878. * operations, such as resets on the PHYs of the IO Unit, also allows the host
  2879. * to obtain the IOC assigned device handles for a device if it has other
  2880. * identifying information about the device, in addition allows the host to
  2881. * remove IOC resources associated with the device.
  2882. *
  2883. * Returns 0 for success, non-zero for failure.
  2884. */
  2885. int
  2886. mpt2sas_base_sas_iounit_control(struct MPT2SAS_ADAPTER *ioc,
  2887. Mpi2SasIoUnitControlReply_t *mpi_reply,
  2888. Mpi2SasIoUnitControlRequest_t *mpi_request)
  2889. {
  2890. u16 smid;
  2891. u32 ioc_state;
  2892. unsigned long timeleft;
  2893. u8 issue_reset;
  2894. int rc;
  2895. void *request;
  2896. u16 wait_state_count;
  2897. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  2898. __func__));
  2899. mutex_lock(&ioc->base_cmds.mutex);
  2900. if (ioc->base_cmds.status != MPT2_CMD_NOT_USED) {
  2901. printk(MPT2SAS_ERR_FMT "%s: base_cmd in use\n",
  2902. ioc->name, __func__);
  2903. rc = -EAGAIN;
  2904. goto out;
  2905. }
  2906. wait_state_count = 0;
  2907. ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
  2908. while (ioc_state != MPI2_IOC_STATE_OPERATIONAL) {
  2909. if (wait_state_count++ == 10) {
  2910. printk(MPT2SAS_ERR_FMT
  2911. "%s: failed due to ioc not operational\n",
  2912. ioc->name, __func__);
  2913. rc = -EFAULT;
  2914. goto out;
  2915. }
  2916. ssleep(1);
  2917. ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
  2918. printk(MPT2SAS_INFO_FMT "%s: waiting for "
  2919. "operational state(count=%d)\n", ioc->name,
  2920. __func__, wait_state_count);
  2921. }
  2922. smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
  2923. if (!smid) {
  2924. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  2925. ioc->name, __func__);
  2926. rc = -EAGAIN;
  2927. goto out;
  2928. }
  2929. rc = 0;
  2930. ioc->base_cmds.status = MPT2_CMD_PENDING;
  2931. request = mpt2sas_base_get_msg_frame(ioc, smid);
  2932. ioc->base_cmds.smid = smid;
  2933. memcpy(request, mpi_request, sizeof(Mpi2SasIoUnitControlRequest_t));
  2934. if (mpi_request->Operation == MPI2_SAS_OP_PHY_HARD_RESET ||
  2935. mpi_request->Operation == MPI2_SAS_OP_PHY_LINK_RESET)
  2936. ioc->ioc_link_reset_in_progress = 1;
  2937. init_completion(&ioc->base_cmds.done);
  2938. mpt2sas_base_put_smid_default(ioc, smid);
  2939. timeleft = wait_for_completion_timeout(&ioc->base_cmds.done,
  2940. msecs_to_jiffies(10000));
  2941. if ((mpi_request->Operation == MPI2_SAS_OP_PHY_HARD_RESET ||
  2942. mpi_request->Operation == MPI2_SAS_OP_PHY_LINK_RESET) &&
  2943. ioc->ioc_link_reset_in_progress)
  2944. ioc->ioc_link_reset_in_progress = 0;
  2945. if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
  2946. printk(MPT2SAS_ERR_FMT "%s: timeout\n",
  2947. ioc->name, __func__);
  2948. _debug_dump_mf(mpi_request,
  2949. sizeof(Mpi2SasIoUnitControlRequest_t)/4);
  2950. if (!(ioc->base_cmds.status & MPT2_CMD_RESET))
  2951. issue_reset = 1;
  2952. goto issue_host_reset;
  2953. }
  2954. if (ioc->base_cmds.status & MPT2_CMD_REPLY_VALID)
  2955. memcpy(mpi_reply, ioc->base_cmds.reply,
  2956. sizeof(Mpi2SasIoUnitControlReply_t));
  2957. else
  2958. memset(mpi_reply, 0, sizeof(Mpi2SasIoUnitControlReply_t));
  2959. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  2960. goto out;
  2961. issue_host_reset:
  2962. if (issue_reset)
  2963. mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP,
  2964. FORCE_BIG_HAMMER);
  2965. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  2966. rc = -EFAULT;
  2967. out:
  2968. mutex_unlock(&ioc->base_cmds.mutex);
  2969. return rc;
  2970. }
  2971. /**
  2972. * mpt2sas_base_scsi_enclosure_processor - sending request to sep device
  2973. * @ioc: per adapter object
  2974. * @mpi_reply: the reply payload from FW
  2975. * @mpi_request: the request payload sent to FW
  2976. *
  2977. * The SCSI Enclosure Processor request message causes the IOC to
  2978. * communicate with SES devices to control LED status signals.
  2979. *
  2980. * Returns 0 for success, non-zero for failure.
  2981. */
  2982. int
  2983. mpt2sas_base_scsi_enclosure_processor(struct MPT2SAS_ADAPTER *ioc,
  2984. Mpi2SepReply_t *mpi_reply, Mpi2SepRequest_t *mpi_request)
  2985. {
  2986. u16 smid;
  2987. u32 ioc_state;
  2988. unsigned long timeleft;
  2989. u8 issue_reset;
  2990. int rc;
  2991. void *request;
  2992. u16 wait_state_count;
  2993. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  2994. __func__));
  2995. mutex_lock(&ioc->base_cmds.mutex);
  2996. if (ioc->base_cmds.status != MPT2_CMD_NOT_USED) {
  2997. printk(MPT2SAS_ERR_FMT "%s: base_cmd in use\n",
  2998. ioc->name, __func__);
  2999. rc = -EAGAIN;
  3000. goto out;
  3001. }
  3002. wait_state_count = 0;
  3003. ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
  3004. while (ioc_state != MPI2_IOC_STATE_OPERATIONAL) {
  3005. if (wait_state_count++ == 10) {
  3006. printk(MPT2SAS_ERR_FMT
  3007. "%s: failed due to ioc not operational\n",
  3008. ioc->name, __func__);
  3009. rc = -EFAULT;
  3010. goto out;
  3011. }
  3012. ssleep(1);
  3013. ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
  3014. printk(MPT2SAS_INFO_FMT "%s: waiting for "
  3015. "operational state(count=%d)\n", ioc->name,
  3016. __func__, wait_state_count);
  3017. }
  3018. smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
  3019. if (!smid) {
  3020. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  3021. ioc->name, __func__);
  3022. rc = -EAGAIN;
  3023. goto out;
  3024. }
  3025. rc = 0;
  3026. ioc->base_cmds.status = MPT2_CMD_PENDING;
  3027. request = mpt2sas_base_get_msg_frame(ioc, smid);
  3028. ioc->base_cmds.smid = smid;
  3029. memcpy(request, mpi_request, sizeof(Mpi2SepReply_t));
  3030. init_completion(&ioc->base_cmds.done);
  3031. mpt2sas_base_put_smid_default(ioc, smid);
  3032. timeleft = wait_for_completion_timeout(&ioc->base_cmds.done,
  3033. msecs_to_jiffies(10000));
  3034. if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
  3035. printk(MPT2SAS_ERR_FMT "%s: timeout\n",
  3036. ioc->name, __func__);
  3037. _debug_dump_mf(mpi_request,
  3038. sizeof(Mpi2SepRequest_t)/4);
  3039. if (!(ioc->base_cmds.status & MPT2_CMD_RESET))
  3040. issue_reset = 1;
  3041. goto issue_host_reset;
  3042. }
  3043. if (ioc->base_cmds.status & MPT2_CMD_REPLY_VALID)
  3044. memcpy(mpi_reply, ioc->base_cmds.reply,
  3045. sizeof(Mpi2SepReply_t));
  3046. else
  3047. memset(mpi_reply, 0, sizeof(Mpi2SepReply_t));
  3048. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  3049. goto out;
  3050. issue_host_reset:
  3051. if (issue_reset)
  3052. mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP,
  3053. FORCE_BIG_HAMMER);
  3054. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  3055. rc = -EFAULT;
  3056. out:
  3057. mutex_unlock(&ioc->base_cmds.mutex);
  3058. return rc;
  3059. }
  3060. /**
  3061. * _base_get_port_facts - obtain port facts reply and save in ioc
  3062. * @ioc: per adapter object
  3063. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3064. *
  3065. * Returns 0 for success, non-zero for failure.
  3066. */
  3067. static int
  3068. _base_get_port_facts(struct MPT2SAS_ADAPTER *ioc, int port, int sleep_flag)
  3069. {
  3070. Mpi2PortFactsRequest_t mpi_request;
  3071. Mpi2PortFactsReply_t mpi_reply;
  3072. struct mpt2sas_port_facts *pfacts;
  3073. int mpi_reply_sz, mpi_request_sz, r;
  3074. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  3075. __func__));
  3076. mpi_reply_sz = sizeof(Mpi2PortFactsReply_t);
  3077. mpi_request_sz = sizeof(Mpi2PortFactsRequest_t);
  3078. memset(&mpi_request, 0, mpi_request_sz);
  3079. mpi_request.Function = MPI2_FUNCTION_PORT_FACTS;
  3080. mpi_request.PortNumber = port;
  3081. r = _base_handshake_req_reply_wait(ioc, mpi_request_sz,
  3082. (u32 *)&mpi_request, mpi_reply_sz, (u16 *)&mpi_reply, 5, CAN_SLEEP);
  3083. if (r != 0) {
  3084. printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n",
  3085. ioc->name, __func__, r);
  3086. return r;
  3087. }
  3088. pfacts = &ioc->pfacts[port];
  3089. memset(pfacts, 0, sizeof(struct mpt2sas_port_facts));
  3090. pfacts->PortNumber = mpi_reply.PortNumber;
  3091. pfacts->VP_ID = mpi_reply.VP_ID;
  3092. pfacts->VF_ID = mpi_reply.VF_ID;
  3093. pfacts->MaxPostedCmdBuffers =
  3094. le16_to_cpu(mpi_reply.MaxPostedCmdBuffers);
  3095. return 0;
  3096. }
  3097. /**
  3098. * _base_wait_for_iocstate - Wait until the card is in READY or OPERATIONAL
  3099. * @ioc: per adapter object
  3100. * @timeout:
  3101. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3102. *
  3103. * Returns 0 for success, non-zero for failure.
  3104. */
  3105. static int
  3106. _base_wait_for_iocstate(struct MPT2SAS_ADAPTER *ioc, int timeout,
  3107. int sleep_flag)
  3108. {
  3109. u32 ioc_state, doorbell;
  3110. int rc;
  3111. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  3112. __func__));
  3113. if (ioc->pci_error_recovery)
  3114. return 0;
  3115. doorbell = mpt2sas_base_get_iocstate(ioc, 0);
  3116. ioc_state = doorbell & MPI2_IOC_STATE_MASK;
  3117. dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: ioc_state(0x%08x)\n",
  3118. ioc->name, __func__, ioc_state));
  3119. switch (ioc_state) {
  3120. case MPI2_IOC_STATE_READY:
  3121. case MPI2_IOC_STATE_OPERATIONAL:
  3122. return 0;
  3123. }
  3124. if (doorbell & MPI2_DOORBELL_USED) {
  3125. dhsprintk(ioc, printk(MPT2SAS_INFO_FMT
  3126. "unexpected doorbell activ!e\n", ioc->name));
  3127. goto issue_diag_reset;
  3128. }
  3129. if (ioc_state == MPI2_IOC_STATE_FAULT) {
  3130. mpt2sas_base_fault_info(ioc, doorbell &
  3131. MPI2_DOORBELL_DATA_MASK);
  3132. goto issue_diag_reset;
  3133. }
  3134. ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_READY,
  3135. timeout, sleep_flag);
  3136. if (ioc_state) {
  3137. printk(MPT2SAS_ERR_FMT
  3138. "%s: failed going to ready state (ioc_state=0x%x)\n",
  3139. ioc->name, __func__, ioc_state);
  3140. return -EFAULT;
  3141. }
  3142. issue_diag_reset:
  3143. rc = _base_diag_reset(ioc, sleep_flag);
  3144. return rc;
  3145. }
  3146. /**
  3147. * _base_get_ioc_facts - obtain ioc facts reply and save in ioc
  3148. * @ioc: per adapter object
  3149. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3150. *
  3151. * Returns 0 for success, non-zero for failure.
  3152. */
  3153. static int
  3154. _base_get_ioc_facts(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  3155. {
  3156. Mpi2IOCFactsRequest_t mpi_request;
  3157. Mpi2IOCFactsReply_t mpi_reply;
  3158. struct mpt2sas_facts *facts;
  3159. int mpi_reply_sz, mpi_request_sz, r;
  3160. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  3161. __func__));
  3162. r = _base_wait_for_iocstate(ioc, 10, sleep_flag);
  3163. if (r) {
  3164. printk(MPT2SAS_ERR_FMT "%s: failed getting to correct state\n",
  3165. ioc->name, __func__);
  3166. return r;
  3167. }
  3168. mpi_reply_sz = sizeof(Mpi2IOCFactsReply_t);
  3169. mpi_request_sz = sizeof(Mpi2IOCFactsRequest_t);
  3170. memset(&mpi_request, 0, mpi_request_sz);
  3171. mpi_request.Function = MPI2_FUNCTION_IOC_FACTS;
  3172. r = _base_handshake_req_reply_wait(ioc, mpi_request_sz,
  3173. (u32 *)&mpi_request, mpi_reply_sz, (u16 *)&mpi_reply, 5, CAN_SLEEP);
  3174. if (r != 0) {
  3175. printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n",
  3176. ioc->name, __func__, r);
  3177. return r;
  3178. }
  3179. facts = &ioc->facts;
  3180. memset(facts, 0, sizeof(struct mpt2sas_facts));
  3181. facts->MsgVersion = le16_to_cpu(mpi_reply.MsgVersion);
  3182. facts->HeaderVersion = le16_to_cpu(mpi_reply.HeaderVersion);
  3183. facts->VP_ID = mpi_reply.VP_ID;
  3184. facts->VF_ID = mpi_reply.VF_ID;
  3185. facts->IOCExceptions = le16_to_cpu(mpi_reply.IOCExceptions);
  3186. facts->MaxChainDepth = mpi_reply.MaxChainDepth;
  3187. facts->WhoInit = mpi_reply.WhoInit;
  3188. facts->NumberOfPorts = mpi_reply.NumberOfPorts;
  3189. facts->MaxMSIxVectors = mpi_reply.MaxMSIxVectors;
  3190. facts->RequestCredit = le16_to_cpu(mpi_reply.RequestCredit);
  3191. facts->MaxReplyDescriptorPostQueueDepth =
  3192. le16_to_cpu(mpi_reply.MaxReplyDescriptorPostQueueDepth);
  3193. facts->ProductID = le16_to_cpu(mpi_reply.ProductID);
  3194. facts->IOCCapabilities = le32_to_cpu(mpi_reply.IOCCapabilities);
  3195. if ((facts->IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID))
  3196. ioc->ir_firmware = 1;
  3197. if ((facts->IOCCapabilities &
  3198. MPI2_IOCFACTS_CAPABILITY_RDPQ_ARRAY_CAPABLE))
  3199. ioc->rdpq_array_capable = 1;
  3200. facts->FWVersion.Word = le32_to_cpu(mpi_reply.FWVersion.Word);
  3201. facts->IOCRequestFrameSize =
  3202. le16_to_cpu(mpi_reply.IOCRequestFrameSize);
  3203. facts->MaxInitiators = le16_to_cpu(mpi_reply.MaxInitiators);
  3204. facts->MaxTargets = le16_to_cpu(mpi_reply.MaxTargets);
  3205. ioc->shost->max_id = -1;
  3206. facts->MaxSasExpanders = le16_to_cpu(mpi_reply.MaxSasExpanders);
  3207. facts->MaxEnclosures = le16_to_cpu(mpi_reply.MaxEnclosures);
  3208. facts->ProtocolFlags = le16_to_cpu(mpi_reply.ProtocolFlags);
  3209. facts->HighPriorityCredit =
  3210. le16_to_cpu(mpi_reply.HighPriorityCredit);
  3211. facts->ReplyFrameSize = mpi_reply.ReplyFrameSize;
  3212. facts->MaxDevHandle = le16_to_cpu(mpi_reply.MaxDevHandle);
  3213. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "hba queue depth(%d), "
  3214. "max chains per io(%d)\n", ioc->name, facts->RequestCredit,
  3215. facts->MaxChainDepth));
  3216. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request frame size(%d), "
  3217. "reply frame size(%d)\n", ioc->name,
  3218. facts->IOCRequestFrameSize * 4, facts->ReplyFrameSize * 4));
  3219. return 0;
  3220. }
  3221. /**
  3222. * _base_send_ioc_init - send ioc_init to firmware
  3223. * @ioc: per adapter object
  3224. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3225. *
  3226. * Returns 0 for success, non-zero for failure.
  3227. */
  3228. static int
  3229. _base_send_ioc_init(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  3230. {
  3231. Mpi2IOCInitRequest_t mpi_request;
  3232. Mpi2IOCInitReply_t mpi_reply;
  3233. int i, r = 0;
  3234. struct timeval current_time;
  3235. u16 ioc_status;
  3236. u32 reply_post_free_array_sz = 0;
  3237. Mpi2IOCInitRDPQArrayEntry *reply_post_free_array = NULL;
  3238. dma_addr_t reply_post_free_array_dma;
  3239. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  3240. __func__));
  3241. memset(&mpi_request, 0, sizeof(Mpi2IOCInitRequest_t));
  3242. mpi_request.Function = MPI2_FUNCTION_IOC_INIT;
  3243. mpi_request.WhoInit = MPI2_WHOINIT_HOST_DRIVER;
  3244. mpi_request.VF_ID = 0; /* TODO */
  3245. mpi_request.VP_ID = 0;
  3246. mpi_request.MsgVersion = cpu_to_le16(MPI2_VERSION);
  3247. mpi_request.HeaderVersion = cpu_to_le16(MPI2_HEADER_VERSION);
  3248. if (_base_is_controller_msix_enabled(ioc))
  3249. mpi_request.HostMSIxVectors = ioc->reply_queue_count;
  3250. mpi_request.SystemRequestFrameSize = cpu_to_le16(ioc->request_sz/4);
  3251. mpi_request.ReplyDescriptorPostQueueDepth =
  3252. cpu_to_le16(ioc->reply_post_queue_depth);
  3253. mpi_request.ReplyFreeQueueDepth =
  3254. cpu_to_le16(ioc->reply_free_queue_depth);
  3255. mpi_request.SenseBufferAddressHigh =
  3256. cpu_to_le32((u64)ioc->sense_dma >> 32);
  3257. mpi_request.SystemReplyAddressHigh =
  3258. cpu_to_le32((u64)ioc->reply_dma >> 32);
  3259. mpi_request.SystemRequestFrameBaseAddress =
  3260. cpu_to_le64((u64)ioc->request_dma);
  3261. mpi_request.ReplyFreeQueueAddress =
  3262. cpu_to_le64((u64)ioc->reply_free_dma);
  3263. if (ioc->rdpq_array_enable) {
  3264. reply_post_free_array_sz = ioc->reply_queue_count *
  3265. sizeof(Mpi2IOCInitRDPQArrayEntry);
  3266. reply_post_free_array = pci_alloc_consistent(ioc->pdev,
  3267. reply_post_free_array_sz, &reply_post_free_array_dma);
  3268. if (!reply_post_free_array) {
  3269. printk(MPT2SAS_ERR_FMT
  3270. "reply_post_free_array: pci_alloc_consistent failed\n",
  3271. ioc->name);
  3272. r = -ENOMEM;
  3273. goto out;
  3274. }
  3275. memset(reply_post_free_array, 0, reply_post_free_array_sz);
  3276. for (i = 0; i < ioc->reply_queue_count; i++)
  3277. reply_post_free_array[i].RDPQBaseAddress =
  3278. cpu_to_le64(
  3279. (u64)ioc->reply_post[i].reply_post_free_dma);
  3280. mpi_request.MsgFlags = MPI2_IOCINIT_MSGFLAG_RDPQ_ARRAY_MODE;
  3281. mpi_request.ReplyDescriptorPostQueueAddress =
  3282. cpu_to_le64((u64)reply_post_free_array_dma);
  3283. } else {
  3284. mpi_request.ReplyDescriptorPostQueueAddress =
  3285. cpu_to_le64((u64)ioc->reply_post[0].reply_post_free_dma);
  3286. }
  3287. /* This time stamp specifies number of milliseconds
  3288. * since epoch ~ midnight January 1, 1970.
  3289. */
  3290. do_gettimeofday(&current_time);
  3291. mpi_request.TimeStamp = cpu_to_le64((u64)current_time.tv_sec * 1000 +
  3292. (current_time.tv_usec / 1000));
  3293. if (ioc->logging_level & MPT_DEBUG_INIT) {
  3294. __le32 *mfp;
  3295. int i;
  3296. mfp = (__le32 *)&mpi_request;
  3297. printk(KERN_INFO "\toffset:data\n");
  3298. for (i = 0; i < sizeof(Mpi2IOCInitRequest_t)/4; i++)
  3299. printk(KERN_INFO "\t[0x%02x]:%08x\n", i*4,
  3300. le32_to_cpu(mfp[i]));
  3301. }
  3302. r = _base_handshake_req_reply_wait(ioc,
  3303. sizeof(Mpi2IOCInitRequest_t), (u32 *)&mpi_request,
  3304. sizeof(Mpi2IOCInitReply_t), (u16 *)&mpi_reply, 10,
  3305. sleep_flag);
  3306. if (r != 0) {
  3307. printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n",
  3308. ioc->name, __func__, r);
  3309. goto out;
  3310. }
  3311. ioc_status = le16_to_cpu(mpi_reply.IOCStatus) & MPI2_IOCSTATUS_MASK;
  3312. if (ioc_status != MPI2_IOCSTATUS_SUCCESS ||
  3313. mpi_reply.IOCLogInfo) {
  3314. printk(MPT2SAS_ERR_FMT "%s: failed\n", ioc->name, __func__);
  3315. r = -EIO;
  3316. }
  3317. out:
  3318. if (reply_post_free_array)
  3319. pci_free_consistent(ioc->pdev, reply_post_free_array_sz,
  3320. reply_post_free_array,
  3321. reply_post_free_array_dma);
  3322. return r;
  3323. }
  3324. /**
  3325. * mpt2sas_port_enable_done - command completion routine for port enable
  3326. * @ioc: per adapter object
  3327. * @smid: system request message index
  3328. * @msix_index: MSIX table index supplied by the OS
  3329. * @reply: reply message frame(lower 32bit addr)
  3330. *
  3331. * Return 1 meaning mf should be freed from _base_interrupt
  3332. * 0 means the mf is freed from this function.
  3333. */
  3334. u8
  3335. mpt2sas_port_enable_done(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
  3336. u32 reply)
  3337. {
  3338. MPI2DefaultReply_t *mpi_reply;
  3339. u16 ioc_status;
  3340. mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
  3341. if (mpi_reply && mpi_reply->Function == MPI2_FUNCTION_EVENT_ACK)
  3342. return 1;
  3343. if (ioc->port_enable_cmds.status == MPT2_CMD_NOT_USED)
  3344. return 1;
  3345. ioc->port_enable_cmds.status |= MPT2_CMD_COMPLETE;
  3346. if (mpi_reply) {
  3347. ioc->port_enable_cmds.status |= MPT2_CMD_REPLY_VALID;
  3348. memcpy(ioc->port_enable_cmds.reply, mpi_reply,
  3349. mpi_reply->MsgLength*4);
  3350. }
  3351. ioc->port_enable_cmds.status &= ~MPT2_CMD_PENDING;
  3352. ioc_status = le16_to_cpu(mpi_reply->IOCStatus) & MPI2_IOCSTATUS_MASK;
  3353. if (ioc_status != MPI2_IOCSTATUS_SUCCESS)
  3354. ioc->port_enable_failed = 1;
  3355. if (ioc->is_driver_loading) {
  3356. if (ioc_status == MPI2_IOCSTATUS_SUCCESS) {
  3357. mpt2sas_port_enable_complete(ioc);
  3358. return 1;
  3359. } else {
  3360. ioc->start_scan_failed = ioc_status;
  3361. ioc->start_scan = 0;
  3362. return 1;
  3363. }
  3364. }
  3365. complete(&ioc->port_enable_cmds.done);
  3366. return 1;
  3367. }
  3368. /**
  3369. * _base_send_port_enable - send port_enable(discovery stuff) to firmware
  3370. * @ioc: per adapter object
  3371. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3372. *
  3373. * Returns 0 for success, non-zero for failure.
  3374. */
  3375. static int
  3376. _base_send_port_enable(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  3377. {
  3378. Mpi2PortEnableRequest_t *mpi_request;
  3379. Mpi2PortEnableReply_t *mpi_reply;
  3380. unsigned long timeleft;
  3381. int r = 0;
  3382. u16 smid;
  3383. u16 ioc_status;
  3384. printk(MPT2SAS_INFO_FMT "sending port enable !!\n", ioc->name);
  3385. if (ioc->port_enable_cmds.status & MPT2_CMD_PENDING) {
  3386. printk(MPT2SAS_ERR_FMT "%s: internal command already in use\n",
  3387. ioc->name, __func__);
  3388. return -EAGAIN;
  3389. }
  3390. smid = mpt2sas_base_get_smid(ioc, ioc->port_enable_cb_idx);
  3391. if (!smid) {
  3392. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  3393. ioc->name, __func__);
  3394. return -EAGAIN;
  3395. }
  3396. ioc->port_enable_cmds.status = MPT2_CMD_PENDING;
  3397. mpi_request = mpt2sas_base_get_msg_frame(ioc, smid);
  3398. ioc->port_enable_cmds.smid = smid;
  3399. memset(mpi_request, 0, sizeof(Mpi2PortEnableRequest_t));
  3400. mpi_request->Function = MPI2_FUNCTION_PORT_ENABLE;
  3401. init_completion(&ioc->port_enable_cmds.done);
  3402. mpt2sas_base_put_smid_default(ioc, smid);
  3403. timeleft = wait_for_completion_timeout(&ioc->port_enable_cmds.done,
  3404. 300*HZ);
  3405. if (!(ioc->port_enable_cmds.status & MPT2_CMD_COMPLETE)) {
  3406. printk(MPT2SAS_ERR_FMT "%s: timeout\n",
  3407. ioc->name, __func__);
  3408. _debug_dump_mf(mpi_request,
  3409. sizeof(Mpi2PortEnableRequest_t)/4);
  3410. if (ioc->port_enable_cmds.status & MPT2_CMD_RESET)
  3411. r = -EFAULT;
  3412. else
  3413. r = -ETIME;
  3414. goto out;
  3415. }
  3416. mpi_reply = ioc->port_enable_cmds.reply;
  3417. ioc_status = le16_to_cpu(mpi_reply->IOCStatus) & MPI2_IOCSTATUS_MASK;
  3418. if (ioc_status != MPI2_IOCSTATUS_SUCCESS) {
  3419. printk(MPT2SAS_ERR_FMT "%s: failed with (ioc_status=0x%08x)\n",
  3420. ioc->name, __func__, ioc_status);
  3421. r = -EFAULT;
  3422. goto out;
  3423. }
  3424. out:
  3425. ioc->port_enable_cmds.status = MPT2_CMD_NOT_USED;
  3426. printk(MPT2SAS_INFO_FMT "port enable: %s\n", ioc->name, ((r == 0) ?
  3427. "SUCCESS" : "FAILED"));
  3428. return r;
  3429. }
  3430. /**
  3431. * mpt2sas_port_enable - initiate firmware discovery (don't wait for reply)
  3432. * @ioc: per adapter object
  3433. *
  3434. * Returns 0 for success, non-zero for failure.
  3435. */
  3436. int
  3437. mpt2sas_port_enable(struct MPT2SAS_ADAPTER *ioc)
  3438. {
  3439. Mpi2PortEnableRequest_t *mpi_request;
  3440. u16 smid;
  3441. printk(MPT2SAS_INFO_FMT "sending port enable !!\n", ioc->name);
  3442. if (ioc->port_enable_cmds.status & MPT2_CMD_PENDING) {
  3443. printk(MPT2SAS_ERR_FMT "%s: internal command already in use\n",
  3444. ioc->name, __func__);
  3445. return -EAGAIN;
  3446. }
  3447. smid = mpt2sas_base_get_smid(ioc, ioc->port_enable_cb_idx);
  3448. if (!smid) {
  3449. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  3450. ioc->name, __func__);
  3451. return -EAGAIN;
  3452. }
  3453. ioc->port_enable_cmds.status = MPT2_CMD_PENDING;
  3454. mpi_request = mpt2sas_base_get_msg_frame(ioc, smid);
  3455. ioc->port_enable_cmds.smid = smid;
  3456. memset(mpi_request, 0, sizeof(Mpi2PortEnableRequest_t));
  3457. mpi_request->Function = MPI2_FUNCTION_PORT_ENABLE;
  3458. mpt2sas_base_put_smid_default(ioc, smid);
  3459. return 0;
  3460. }
  3461. /**
  3462. * _base_determine_wait_on_discovery - desposition
  3463. * @ioc: per adapter object
  3464. *
  3465. * Decide whether to wait on discovery to complete. Used to either
  3466. * locate boot device, or report volumes ahead of physical devices.
  3467. *
  3468. * Returns 1 for wait, 0 for don't wait
  3469. */
  3470. static int
  3471. _base_determine_wait_on_discovery(struct MPT2SAS_ADAPTER *ioc)
  3472. {
  3473. /* We wait for discovery to complete if IR firmware is loaded.
  3474. * The sas topology events arrive before PD events, so we need time to
  3475. * turn on the bit in ioc->pd_handles to indicate PD
  3476. * Also, it maybe required to report Volumes ahead of physical
  3477. * devices when MPI2_IOCPAGE8_IRFLAGS_LOW_VOLUME_MAPPING is set.
  3478. */
  3479. if (ioc->ir_firmware)
  3480. return 1;
  3481. /* if no Bios, then we don't need to wait */
  3482. if (!ioc->bios_pg3.BiosVersion)
  3483. return 0;
  3484. /* Bios is present, then we drop down here.
  3485. *
  3486. * If there any entries in the Bios Page 2, then we wait
  3487. * for discovery to complete.
  3488. */
  3489. /* Current Boot Device */
  3490. if ((ioc->bios_pg2.CurrentBootDeviceForm &
  3491. MPI2_BIOSPAGE2_FORM_MASK) ==
  3492. MPI2_BIOSPAGE2_FORM_NO_DEVICE_SPECIFIED &&
  3493. /* Request Boot Device */
  3494. (ioc->bios_pg2.ReqBootDeviceForm &
  3495. MPI2_BIOSPAGE2_FORM_MASK) ==
  3496. MPI2_BIOSPAGE2_FORM_NO_DEVICE_SPECIFIED &&
  3497. /* Alternate Request Boot Device */
  3498. (ioc->bios_pg2.ReqAltBootDeviceForm &
  3499. MPI2_BIOSPAGE2_FORM_MASK) ==
  3500. MPI2_BIOSPAGE2_FORM_NO_DEVICE_SPECIFIED)
  3501. return 0;
  3502. return 1;
  3503. }
  3504. /**
  3505. * _base_unmask_events - turn on notification for this event
  3506. * @ioc: per adapter object
  3507. * @event: firmware event
  3508. *
  3509. * The mask is stored in ioc->event_masks.
  3510. */
  3511. static void
  3512. _base_unmask_events(struct MPT2SAS_ADAPTER *ioc, u16 event)
  3513. {
  3514. u32 desired_event;
  3515. if (event >= 128)
  3516. return;
  3517. desired_event = (1 << (event % 32));
  3518. if (event < 32)
  3519. ioc->event_masks[0] &= ~desired_event;
  3520. else if (event < 64)
  3521. ioc->event_masks[1] &= ~desired_event;
  3522. else if (event < 96)
  3523. ioc->event_masks[2] &= ~desired_event;
  3524. else if (event < 128)
  3525. ioc->event_masks[3] &= ~desired_event;
  3526. }
  3527. /**
  3528. * _base_event_notification - send event notification
  3529. * @ioc: per adapter object
  3530. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3531. *
  3532. * Returns 0 for success, non-zero for failure.
  3533. */
  3534. static int
  3535. _base_event_notification(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  3536. {
  3537. Mpi2EventNotificationRequest_t *mpi_request;
  3538. unsigned long timeleft;
  3539. u16 smid;
  3540. int r = 0;
  3541. int i;
  3542. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  3543. __func__));
  3544. if (ioc->base_cmds.status & MPT2_CMD_PENDING) {
  3545. printk(MPT2SAS_ERR_FMT "%s: internal command already in use\n",
  3546. ioc->name, __func__);
  3547. return -EAGAIN;
  3548. }
  3549. smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
  3550. if (!smid) {
  3551. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  3552. ioc->name, __func__);
  3553. return -EAGAIN;
  3554. }
  3555. ioc->base_cmds.status = MPT2_CMD_PENDING;
  3556. mpi_request = mpt2sas_base_get_msg_frame(ioc, smid);
  3557. ioc->base_cmds.smid = smid;
  3558. memset(mpi_request, 0, sizeof(Mpi2EventNotificationRequest_t));
  3559. mpi_request->Function = MPI2_FUNCTION_EVENT_NOTIFICATION;
  3560. mpi_request->VF_ID = 0; /* TODO */
  3561. mpi_request->VP_ID = 0;
  3562. for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++)
  3563. mpi_request->EventMasks[i] =
  3564. cpu_to_le32(ioc->event_masks[i]);
  3565. init_completion(&ioc->base_cmds.done);
  3566. mpt2sas_base_put_smid_default(ioc, smid);
  3567. timeleft = wait_for_completion_timeout(&ioc->base_cmds.done, 30*HZ);
  3568. if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
  3569. printk(MPT2SAS_ERR_FMT "%s: timeout\n",
  3570. ioc->name, __func__);
  3571. _debug_dump_mf(mpi_request,
  3572. sizeof(Mpi2EventNotificationRequest_t)/4);
  3573. if (ioc->base_cmds.status & MPT2_CMD_RESET)
  3574. r = -EFAULT;
  3575. else
  3576. r = -ETIME;
  3577. } else
  3578. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: complete\n",
  3579. ioc->name, __func__));
  3580. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  3581. return r;
  3582. }
  3583. /**
  3584. * mpt2sas_base_validate_event_type - validating event types
  3585. * @ioc: per adapter object
  3586. * @event: firmware event
  3587. *
  3588. * This will turn on firmware event notification when application
  3589. * ask for that event. We don't mask events that are already enabled.
  3590. */
  3591. void
  3592. mpt2sas_base_validate_event_type(struct MPT2SAS_ADAPTER *ioc, u32 *event_type)
  3593. {
  3594. int i, j;
  3595. u32 event_mask, desired_event;
  3596. u8 send_update_to_fw;
  3597. for (i = 0, send_update_to_fw = 0; i <
  3598. MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++) {
  3599. event_mask = ~event_type[i];
  3600. desired_event = 1;
  3601. for (j = 0; j < 32; j++) {
  3602. if (!(event_mask & desired_event) &&
  3603. (ioc->event_masks[i] & desired_event)) {
  3604. ioc->event_masks[i] &= ~desired_event;
  3605. send_update_to_fw = 1;
  3606. }
  3607. desired_event = (desired_event << 1);
  3608. }
  3609. }
  3610. if (!send_update_to_fw)
  3611. return;
  3612. mutex_lock(&ioc->base_cmds.mutex);
  3613. _base_event_notification(ioc, CAN_SLEEP);
  3614. mutex_unlock(&ioc->base_cmds.mutex);
  3615. }
  3616. /**
  3617. * _base_diag_reset - the "big hammer" start of day reset
  3618. * @ioc: per adapter object
  3619. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3620. *
  3621. * Returns 0 for success, non-zero for failure.
  3622. */
  3623. static int
  3624. _base_diag_reset(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  3625. {
  3626. u32 host_diagnostic;
  3627. u32 ioc_state;
  3628. u32 count;
  3629. u32 hcb_size;
  3630. printk(MPT2SAS_INFO_FMT "sending diag reset !!\n", ioc->name);
  3631. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "clear interrupts\n",
  3632. ioc->name));
  3633. count = 0;
  3634. do {
  3635. /* Write magic sequence to WriteSequence register
  3636. * Loop until in diagnostic mode
  3637. */
  3638. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "write magic "
  3639. "sequence\n", ioc->name));
  3640. writel(MPI2_WRSEQ_FLUSH_KEY_VALUE, &ioc->chip->WriteSequence);
  3641. writel(MPI2_WRSEQ_1ST_KEY_VALUE, &ioc->chip->WriteSequence);
  3642. writel(MPI2_WRSEQ_2ND_KEY_VALUE, &ioc->chip->WriteSequence);
  3643. writel(MPI2_WRSEQ_3RD_KEY_VALUE, &ioc->chip->WriteSequence);
  3644. writel(MPI2_WRSEQ_4TH_KEY_VALUE, &ioc->chip->WriteSequence);
  3645. writel(MPI2_WRSEQ_5TH_KEY_VALUE, &ioc->chip->WriteSequence);
  3646. writel(MPI2_WRSEQ_6TH_KEY_VALUE, &ioc->chip->WriteSequence);
  3647. /* wait 100 msec */
  3648. if (sleep_flag == CAN_SLEEP)
  3649. msleep(100);
  3650. else
  3651. mdelay(100);
  3652. if (count++ > 20)
  3653. goto out;
  3654. host_diagnostic = readl(&ioc->chip->HostDiagnostic);
  3655. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "wrote magic "
  3656. "sequence: count(%d), host_diagnostic(0x%08x)\n",
  3657. ioc->name, count, host_diagnostic));
  3658. } while ((host_diagnostic & MPI2_DIAG_DIAG_WRITE_ENABLE) == 0);
  3659. hcb_size = readl(&ioc->chip->HCBSize);
  3660. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "diag reset: issued\n",
  3661. ioc->name));
  3662. writel(host_diagnostic | MPI2_DIAG_RESET_ADAPTER,
  3663. &ioc->chip->HostDiagnostic);
  3664. /* This delay allows the chip PCIe hardware time to finish reset tasks*/
  3665. if (sleep_flag == CAN_SLEEP)
  3666. msleep(MPI2_HARD_RESET_PCIE_FIRST_READ_DELAY_MICRO_SEC/1000);
  3667. else
  3668. mdelay(MPI2_HARD_RESET_PCIE_FIRST_READ_DELAY_MICRO_SEC/1000);
  3669. /* Approximately 300 second max wait */
  3670. for (count = 0; count < (300000000 /
  3671. MPI2_HARD_RESET_PCIE_SECOND_READ_DELAY_MICRO_SEC); count++) {
  3672. host_diagnostic = readl(&ioc->chip->HostDiagnostic);
  3673. if (host_diagnostic == 0xFFFFFFFF)
  3674. goto out;
  3675. if (!(host_diagnostic & MPI2_DIAG_RESET_ADAPTER))
  3676. break;
  3677. /* Wait to pass the second read delay window */
  3678. if (sleep_flag == CAN_SLEEP)
  3679. msleep(MPI2_HARD_RESET_PCIE_SECOND_READ_DELAY_MICRO_SEC
  3680. /1000);
  3681. else
  3682. mdelay(MPI2_HARD_RESET_PCIE_SECOND_READ_DELAY_MICRO_SEC
  3683. /1000);
  3684. }
  3685. if (host_diagnostic & MPI2_DIAG_HCB_MODE) {
  3686. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "restart the adapter "
  3687. "assuming the HCB Address points to good F/W\n",
  3688. ioc->name));
  3689. host_diagnostic &= ~MPI2_DIAG_BOOT_DEVICE_SELECT_MASK;
  3690. host_diagnostic |= MPI2_DIAG_BOOT_DEVICE_SELECT_HCDW;
  3691. writel(host_diagnostic, &ioc->chip->HostDiagnostic);
  3692. drsprintk(ioc, printk(MPT2SAS_INFO_FMT
  3693. "re-enable the HCDW\n", ioc->name));
  3694. writel(hcb_size | MPI2_HCB_SIZE_HCB_ENABLE,
  3695. &ioc->chip->HCBSize);
  3696. }
  3697. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "restart the adapter\n",
  3698. ioc->name));
  3699. writel(host_diagnostic & ~MPI2_DIAG_HOLD_IOC_RESET,
  3700. &ioc->chip->HostDiagnostic);
  3701. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "disable writes to the "
  3702. "diagnostic register\n", ioc->name));
  3703. writel(MPI2_WRSEQ_FLUSH_KEY_VALUE, &ioc->chip->WriteSequence);
  3704. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "Wait for FW to go to the "
  3705. "READY state\n", ioc->name));
  3706. ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_READY, 20,
  3707. sleep_flag);
  3708. if (ioc_state) {
  3709. printk(MPT2SAS_ERR_FMT "%s: failed going to ready state "
  3710. " (ioc_state=0x%x)\n", ioc->name, __func__, ioc_state);
  3711. goto out;
  3712. }
  3713. printk(MPT2SAS_INFO_FMT "diag reset: SUCCESS\n", ioc->name);
  3714. return 0;
  3715. out:
  3716. printk(MPT2SAS_ERR_FMT "diag reset: FAILED\n", ioc->name);
  3717. return -EFAULT;
  3718. }
  3719. /**
  3720. * _base_make_ioc_ready - put controller in READY state
  3721. * @ioc: per adapter object
  3722. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3723. * @type: FORCE_BIG_HAMMER or SOFT_RESET
  3724. *
  3725. * Returns 0 for success, non-zero for failure.
  3726. */
  3727. static int
  3728. _base_make_ioc_ready(struct MPT2SAS_ADAPTER *ioc, int sleep_flag,
  3729. enum reset_type type)
  3730. {
  3731. u32 ioc_state;
  3732. int rc;
  3733. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  3734. __func__));
  3735. if (ioc->pci_error_recovery)
  3736. return 0;
  3737. ioc_state = mpt2sas_base_get_iocstate(ioc, 0);
  3738. dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: ioc_state(0x%08x)\n",
  3739. ioc->name, __func__, ioc_state));
  3740. if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_READY)
  3741. return 0;
  3742. if (ioc_state & MPI2_DOORBELL_USED) {
  3743. dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "unexpected doorbell "
  3744. "active!\n", ioc->name));
  3745. goto issue_diag_reset;
  3746. }
  3747. if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) {
  3748. mpt2sas_base_fault_info(ioc, ioc_state &
  3749. MPI2_DOORBELL_DATA_MASK);
  3750. goto issue_diag_reset;
  3751. }
  3752. if (type == FORCE_BIG_HAMMER)
  3753. goto issue_diag_reset;
  3754. if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_OPERATIONAL)
  3755. if (!(_base_send_ioc_reset(ioc,
  3756. MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET, 15, CAN_SLEEP))) {
  3757. ioc->ioc_reset_count++;
  3758. return 0;
  3759. }
  3760. issue_diag_reset:
  3761. rc = _base_diag_reset(ioc, CAN_SLEEP);
  3762. ioc->ioc_reset_count++;
  3763. return rc;
  3764. }
  3765. /**
  3766. * _base_make_ioc_operational - put controller in OPERATIONAL state
  3767. * @ioc: per adapter object
  3768. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3769. *
  3770. * Returns 0 for success, non-zero for failure.
  3771. */
  3772. static int
  3773. _base_make_ioc_operational(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  3774. {
  3775. int r, i;
  3776. unsigned long flags;
  3777. u32 reply_address;
  3778. u16 smid;
  3779. struct _tr_list *delayed_tr, *delayed_tr_next;
  3780. u8 hide_flag;
  3781. struct adapter_reply_queue *reply_q;
  3782. long reply_post_free;
  3783. u32 reply_post_free_sz, index = 0;
  3784. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  3785. __func__));
  3786. /* clean the delayed target reset list */
  3787. list_for_each_entry_safe(delayed_tr, delayed_tr_next,
  3788. &ioc->delayed_tr_list, list) {
  3789. list_del(&delayed_tr->list);
  3790. kfree(delayed_tr);
  3791. }
  3792. list_for_each_entry_safe(delayed_tr, delayed_tr_next,
  3793. &ioc->delayed_tr_volume_list, list) {
  3794. list_del(&delayed_tr->list);
  3795. kfree(delayed_tr);
  3796. }
  3797. /* initialize the scsi lookup free list */
  3798. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  3799. INIT_LIST_HEAD(&ioc->free_list);
  3800. smid = 1;
  3801. for (i = 0; i < ioc->scsiio_depth; i++, smid++) {
  3802. INIT_LIST_HEAD(&ioc->scsi_lookup[i].chain_list);
  3803. ioc->scsi_lookup[i].cb_idx = 0xFF;
  3804. ioc->scsi_lookup[i].smid = smid;
  3805. ioc->scsi_lookup[i].scmd = NULL;
  3806. ioc->scsi_lookup[i].direct_io = 0;
  3807. list_add_tail(&ioc->scsi_lookup[i].tracker_list,
  3808. &ioc->free_list);
  3809. }
  3810. /* hi-priority queue */
  3811. INIT_LIST_HEAD(&ioc->hpr_free_list);
  3812. smid = ioc->hi_priority_smid;
  3813. for (i = 0; i < ioc->hi_priority_depth; i++, smid++) {
  3814. ioc->hpr_lookup[i].cb_idx = 0xFF;
  3815. ioc->hpr_lookup[i].smid = smid;
  3816. list_add_tail(&ioc->hpr_lookup[i].tracker_list,
  3817. &ioc->hpr_free_list);
  3818. }
  3819. /* internal queue */
  3820. INIT_LIST_HEAD(&ioc->internal_free_list);
  3821. smid = ioc->internal_smid;
  3822. for (i = 0; i < ioc->internal_depth; i++, smid++) {
  3823. ioc->internal_lookup[i].cb_idx = 0xFF;
  3824. ioc->internal_lookup[i].smid = smid;
  3825. list_add_tail(&ioc->internal_lookup[i].tracker_list,
  3826. &ioc->internal_free_list);
  3827. }
  3828. /* chain pool */
  3829. INIT_LIST_HEAD(&ioc->free_chain_list);
  3830. for (i = 0; i < ioc->chain_depth; i++)
  3831. list_add_tail(&ioc->chain_lookup[i].tracker_list,
  3832. &ioc->free_chain_list);
  3833. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  3834. /* initialize Reply Free Queue */
  3835. for (i = 0, reply_address = (u32)ioc->reply_dma ;
  3836. i < ioc->reply_free_queue_depth ; i++, reply_address +=
  3837. ioc->reply_sz)
  3838. ioc->reply_free[i] = cpu_to_le32(reply_address);
  3839. /* initialize reply queues */
  3840. if (ioc->is_driver_loading)
  3841. _base_assign_reply_queues(ioc);
  3842. /* initialize Reply Post Free Queue */
  3843. reply_post_free_sz = ioc->reply_post_queue_depth *
  3844. sizeof(Mpi2DefaultReplyDescriptor_t);
  3845. reply_post_free = (long)ioc->reply_post[index].reply_post_free;
  3846. list_for_each_entry(reply_q, &ioc->reply_queue_list, list) {
  3847. reply_q->reply_post_host_index = 0;
  3848. reply_q->reply_post_free = (Mpi2ReplyDescriptorsUnion_t *)
  3849. reply_post_free;
  3850. for (i = 0; i < ioc->reply_post_queue_depth; i++)
  3851. reply_q->reply_post_free[i].Words =
  3852. cpu_to_le64(ULLONG_MAX);
  3853. if (!_base_is_controller_msix_enabled(ioc))
  3854. goto skip_init_reply_post_free_queue;
  3855. /*
  3856. * If RDPQ is enabled, switch to the next allocation.
  3857. * Otherwise advance within the contiguous region.
  3858. */
  3859. if (ioc->rdpq_array_enable)
  3860. reply_post_free = (long)
  3861. ioc->reply_post[++index].reply_post_free;
  3862. else
  3863. reply_post_free += reply_post_free_sz;
  3864. }
  3865. skip_init_reply_post_free_queue:
  3866. r = _base_send_ioc_init(ioc, sleep_flag);
  3867. if (r)
  3868. return r;
  3869. /* initialize reply free host index */
  3870. ioc->reply_free_host_index = ioc->reply_free_queue_depth - 1;
  3871. writel(ioc->reply_free_host_index, &ioc->chip->ReplyFreeHostIndex);
  3872. /* initialize reply post host index */
  3873. list_for_each_entry(reply_q, &ioc->reply_queue_list, list) {
  3874. writel(reply_q->msix_index << MPI2_RPHI_MSIX_INDEX_SHIFT,
  3875. &ioc->chip->ReplyPostHostIndex);
  3876. if (!_base_is_controller_msix_enabled(ioc))
  3877. goto skip_init_reply_post_host_index;
  3878. }
  3879. skip_init_reply_post_host_index:
  3880. _base_unmask_interrupts(ioc);
  3881. r = _base_event_notification(ioc, sleep_flag);
  3882. if (r)
  3883. return r;
  3884. if (sleep_flag == CAN_SLEEP)
  3885. _base_static_config_pages(ioc);
  3886. if (ioc->is_driver_loading) {
  3887. if (ioc->is_warpdrive && ioc->manu_pg10.OEMIdentifier
  3888. == 0x80) {
  3889. hide_flag = (u8) (
  3890. le32_to_cpu(ioc->manu_pg10.OEMSpecificFlags0) &
  3891. MFG_PAGE10_HIDE_SSDS_MASK);
  3892. if (hide_flag != MFG_PAGE10_HIDE_SSDS_MASK)
  3893. ioc->mfg_pg10_hide_flag = hide_flag;
  3894. }
  3895. ioc->wait_for_discovery_to_complete =
  3896. _base_determine_wait_on_discovery(ioc);
  3897. return r; /* scan_start and scan_finished support */
  3898. }
  3899. r = _base_send_port_enable(ioc, sleep_flag);
  3900. if (r)
  3901. return r;
  3902. return r;
  3903. }
  3904. /**
  3905. * mpt2sas_base_free_resources - free resources controller resources (io/irq/memap)
  3906. * @ioc: per adapter object
  3907. *
  3908. * Return nothing.
  3909. */
  3910. void
  3911. mpt2sas_base_free_resources(struct MPT2SAS_ADAPTER *ioc)
  3912. {
  3913. struct pci_dev *pdev = ioc->pdev;
  3914. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  3915. __func__));
  3916. if (ioc->chip_phys && ioc->chip) {
  3917. _base_mask_interrupts(ioc);
  3918. ioc->shost_recovery = 1;
  3919. _base_make_ioc_ready(ioc, CAN_SLEEP, SOFT_RESET);
  3920. ioc->shost_recovery = 0;
  3921. }
  3922. _base_free_irq(ioc);
  3923. _base_disable_msix(ioc);
  3924. if (ioc->chip_phys && ioc->chip)
  3925. iounmap(ioc->chip);
  3926. ioc->chip_phys = 0;
  3927. if (pci_is_enabled(pdev)) {
  3928. pci_release_selected_regions(ioc->pdev, ioc->bars);
  3929. pci_disable_pcie_error_reporting(pdev);
  3930. pci_disable_device(pdev);
  3931. }
  3932. return;
  3933. }
  3934. /**
  3935. * mpt2sas_base_attach - attach controller instance
  3936. * @ioc: per adapter object
  3937. *
  3938. * Returns 0 for success, non-zero for failure.
  3939. */
  3940. int
  3941. mpt2sas_base_attach(struct MPT2SAS_ADAPTER *ioc)
  3942. {
  3943. int r, i;
  3944. int cpu_id, last_cpu_id = 0;
  3945. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  3946. __func__));
  3947. /* setup cpu_msix_table */
  3948. ioc->cpu_count = num_online_cpus();
  3949. for_each_online_cpu(cpu_id)
  3950. last_cpu_id = cpu_id;
  3951. ioc->cpu_msix_table_sz = last_cpu_id + 1;
  3952. ioc->cpu_msix_table = kzalloc(ioc->cpu_msix_table_sz, GFP_KERNEL);
  3953. ioc->reply_queue_count = 1;
  3954. if (!ioc->cpu_msix_table) {
  3955. dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "allocation for "
  3956. "cpu_msix_table failed!!!\n", ioc->name));
  3957. r = -ENOMEM;
  3958. goto out_free_resources;
  3959. }
  3960. if (ioc->is_warpdrive) {
  3961. ioc->reply_post_host_index = kcalloc(ioc->cpu_msix_table_sz,
  3962. sizeof(resource_size_t *), GFP_KERNEL);
  3963. if (!ioc->reply_post_host_index) {
  3964. dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "allocation "
  3965. "for cpu_msix_table failed!!!\n", ioc->name));
  3966. r = -ENOMEM;
  3967. goto out_free_resources;
  3968. }
  3969. }
  3970. ioc->rdpq_array_enable_assigned = 0;
  3971. ioc->dma_mask = 0;
  3972. r = mpt2sas_base_map_resources(ioc);
  3973. if (r)
  3974. goto out_free_resources;
  3975. if (ioc->is_warpdrive) {
  3976. ioc->reply_post_host_index[0] = (resource_size_t __iomem *)
  3977. &ioc->chip->ReplyPostHostIndex;
  3978. for (i = 1; i < ioc->cpu_msix_table_sz; i++)
  3979. ioc->reply_post_host_index[i] =
  3980. (resource_size_t __iomem *)
  3981. ((u8 __iomem *)&ioc->chip->Doorbell + (0x4000 + ((i - 1)
  3982. * 4)));
  3983. }
  3984. pci_set_drvdata(ioc->pdev, ioc->shost);
  3985. r = _base_get_ioc_facts(ioc, CAN_SLEEP);
  3986. if (r)
  3987. goto out_free_resources;
  3988. r = _base_make_ioc_ready(ioc, CAN_SLEEP, SOFT_RESET);
  3989. if (r)
  3990. goto out_free_resources;
  3991. ioc->pfacts = kcalloc(ioc->facts.NumberOfPorts,
  3992. sizeof(struct mpt2sas_port_facts), GFP_KERNEL);
  3993. if (!ioc->pfacts) {
  3994. r = -ENOMEM;
  3995. goto out_free_resources;
  3996. }
  3997. for (i = 0 ; i < ioc->facts.NumberOfPorts; i++) {
  3998. r = _base_get_port_facts(ioc, i, CAN_SLEEP);
  3999. if (r)
  4000. goto out_free_resources;
  4001. }
  4002. r = _base_allocate_memory_pools(ioc, CAN_SLEEP);
  4003. if (r)
  4004. goto out_free_resources;
  4005. init_waitqueue_head(&ioc->reset_wq);
  4006. /* allocate memory pd handle bitmask list */
  4007. ioc->pd_handles_sz = (ioc->facts.MaxDevHandle / 8);
  4008. if (ioc->facts.MaxDevHandle % 8)
  4009. ioc->pd_handles_sz++;
  4010. ioc->pd_handles = kzalloc(ioc->pd_handles_sz,
  4011. GFP_KERNEL);
  4012. if (!ioc->pd_handles) {
  4013. r = -ENOMEM;
  4014. goto out_free_resources;
  4015. }
  4016. ioc->blocking_handles = kzalloc(ioc->pd_handles_sz,
  4017. GFP_KERNEL);
  4018. if (!ioc->blocking_handles) {
  4019. r = -ENOMEM;
  4020. goto out_free_resources;
  4021. }
  4022. ioc->fwfault_debug = mpt2sas_fwfault_debug;
  4023. /* base internal command bits */
  4024. mutex_init(&ioc->base_cmds.mutex);
  4025. ioc->base_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  4026. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  4027. /* port_enable command bits */
  4028. ioc->port_enable_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  4029. ioc->port_enable_cmds.status = MPT2_CMD_NOT_USED;
  4030. /* transport internal command bits */
  4031. ioc->transport_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  4032. ioc->transport_cmds.status = MPT2_CMD_NOT_USED;
  4033. mutex_init(&ioc->transport_cmds.mutex);
  4034. /* scsih internal command bits */
  4035. ioc->scsih_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  4036. ioc->scsih_cmds.status = MPT2_CMD_NOT_USED;
  4037. mutex_init(&ioc->scsih_cmds.mutex);
  4038. /* task management internal command bits */
  4039. ioc->tm_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  4040. ioc->tm_cmds.status = MPT2_CMD_NOT_USED;
  4041. mutex_init(&ioc->tm_cmds.mutex);
  4042. /* config page internal command bits */
  4043. ioc->config_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  4044. ioc->config_cmds.status = MPT2_CMD_NOT_USED;
  4045. mutex_init(&ioc->config_cmds.mutex);
  4046. /* ctl module internal command bits */
  4047. ioc->ctl_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  4048. ioc->ctl_cmds.sense = kzalloc(SCSI_SENSE_BUFFERSIZE, GFP_KERNEL);
  4049. ioc->ctl_cmds.status = MPT2_CMD_NOT_USED;
  4050. mutex_init(&ioc->ctl_cmds.mutex);
  4051. if (!ioc->base_cmds.reply || !ioc->transport_cmds.reply ||
  4052. !ioc->scsih_cmds.reply || !ioc->tm_cmds.reply ||
  4053. !ioc->config_cmds.reply || !ioc->ctl_cmds.reply ||
  4054. !ioc->ctl_cmds.sense) {
  4055. r = -ENOMEM;
  4056. goto out_free_resources;
  4057. }
  4058. if (!ioc->base_cmds.reply || !ioc->transport_cmds.reply ||
  4059. !ioc->scsih_cmds.reply || !ioc->tm_cmds.reply ||
  4060. !ioc->config_cmds.reply || !ioc->ctl_cmds.reply) {
  4061. r = -ENOMEM;
  4062. goto out_free_resources;
  4063. }
  4064. for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++)
  4065. ioc->event_masks[i] = -1;
  4066. /* here we enable the events we care about */
  4067. _base_unmask_events(ioc, MPI2_EVENT_SAS_DISCOVERY);
  4068. _base_unmask_events(ioc, MPI2_EVENT_SAS_BROADCAST_PRIMITIVE);
  4069. _base_unmask_events(ioc, MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST);
  4070. _base_unmask_events(ioc, MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE);
  4071. _base_unmask_events(ioc, MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE);
  4072. _base_unmask_events(ioc, MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST);
  4073. _base_unmask_events(ioc, MPI2_EVENT_IR_VOLUME);
  4074. _base_unmask_events(ioc, MPI2_EVENT_IR_PHYSICAL_DISK);
  4075. _base_unmask_events(ioc, MPI2_EVENT_IR_OPERATION_STATUS);
  4076. _base_unmask_events(ioc, MPI2_EVENT_LOG_ENTRY_ADDED);
  4077. r = _base_make_ioc_operational(ioc, CAN_SLEEP);
  4078. if (r)
  4079. goto out_free_resources;
  4080. ioc->non_operational_loop = 0;
  4081. return 0;
  4082. out_free_resources:
  4083. ioc->remove_host = 1;
  4084. mpt2sas_base_free_resources(ioc);
  4085. _base_release_memory_pools(ioc);
  4086. pci_set_drvdata(ioc->pdev, NULL);
  4087. kfree(ioc->cpu_msix_table);
  4088. if (ioc->is_warpdrive)
  4089. kfree(ioc->reply_post_host_index);
  4090. kfree(ioc->pd_handles);
  4091. kfree(ioc->blocking_handles);
  4092. kfree(ioc->tm_cmds.reply);
  4093. kfree(ioc->transport_cmds.reply);
  4094. kfree(ioc->scsih_cmds.reply);
  4095. kfree(ioc->config_cmds.reply);
  4096. kfree(ioc->base_cmds.reply);
  4097. kfree(ioc->port_enable_cmds.reply);
  4098. kfree(ioc->ctl_cmds.reply);
  4099. kfree(ioc->ctl_cmds.sense);
  4100. kfree(ioc->pfacts);
  4101. ioc->ctl_cmds.reply = NULL;
  4102. ioc->base_cmds.reply = NULL;
  4103. ioc->tm_cmds.reply = NULL;
  4104. ioc->scsih_cmds.reply = NULL;
  4105. ioc->transport_cmds.reply = NULL;
  4106. ioc->config_cmds.reply = NULL;
  4107. ioc->pfacts = NULL;
  4108. return r;
  4109. }
  4110. /**
  4111. * mpt2sas_base_detach - remove controller instance
  4112. * @ioc: per adapter object
  4113. *
  4114. * Return nothing.
  4115. */
  4116. void
  4117. mpt2sas_base_detach(struct MPT2SAS_ADAPTER *ioc)
  4118. {
  4119. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  4120. __func__));
  4121. mpt2sas_base_stop_watchdog(ioc);
  4122. mpt2sas_base_free_resources(ioc);
  4123. _base_release_memory_pools(ioc);
  4124. pci_set_drvdata(ioc->pdev, NULL);
  4125. kfree(ioc->cpu_msix_table);
  4126. if (ioc->is_warpdrive)
  4127. kfree(ioc->reply_post_host_index);
  4128. kfree(ioc->pd_handles);
  4129. kfree(ioc->blocking_handles);
  4130. kfree(ioc->pfacts);
  4131. kfree(ioc->ctl_cmds.reply);
  4132. kfree(ioc->ctl_cmds.sense);
  4133. kfree(ioc->base_cmds.reply);
  4134. kfree(ioc->port_enable_cmds.reply);
  4135. kfree(ioc->tm_cmds.reply);
  4136. kfree(ioc->transport_cmds.reply);
  4137. kfree(ioc->scsih_cmds.reply);
  4138. kfree(ioc->config_cmds.reply);
  4139. }
  4140. /**
  4141. * _base_reset_handler - reset callback handler (for base)
  4142. * @ioc: per adapter object
  4143. * @reset_phase: phase
  4144. *
  4145. * The handler for doing any required cleanup or initialization.
  4146. *
  4147. * The reset phase can be MPT2_IOC_PRE_RESET, MPT2_IOC_AFTER_RESET,
  4148. * MPT2_IOC_DONE_RESET
  4149. *
  4150. * Return nothing.
  4151. */
  4152. static void
  4153. _base_reset_handler(struct MPT2SAS_ADAPTER *ioc, int reset_phase)
  4154. {
  4155. mpt2sas_scsih_reset_handler(ioc, reset_phase);
  4156. mpt2sas_ctl_reset_handler(ioc, reset_phase);
  4157. switch (reset_phase) {
  4158. case MPT2_IOC_PRE_RESET:
  4159. dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
  4160. "MPT2_IOC_PRE_RESET\n", ioc->name, __func__));
  4161. break;
  4162. case MPT2_IOC_AFTER_RESET:
  4163. dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
  4164. "MPT2_IOC_AFTER_RESET\n", ioc->name, __func__));
  4165. if (ioc->transport_cmds.status & MPT2_CMD_PENDING) {
  4166. ioc->transport_cmds.status |= MPT2_CMD_RESET;
  4167. mpt2sas_base_free_smid(ioc, ioc->transport_cmds.smid);
  4168. complete(&ioc->transport_cmds.done);
  4169. }
  4170. if (ioc->base_cmds.status & MPT2_CMD_PENDING) {
  4171. ioc->base_cmds.status |= MPT2_CMD_RESET;
  4172. mpt2sas_base_free_smid(ioc, ioc->base_cmds.smid);
  4173. complete(&ioc->base_cmds.done);
  4174. }
  4175. if (ioc->port_enable_cmds.status & MPT2_CMD_PENDING) {
  4176. ioc->port_enable_failed = 1;
  4177. ioc->port_enable_cmds.status |= MPT2_CMD_RESET;
  4178. mpt2sas_base_free_smid(ioc, ioc->port_enable_cmds.smid);
  4179. if (ioc->is_driver_loading) {
  4180. ioc->start_scan_failed =
  4181. MPI2_IOCSTATUS_INTERNAL_ERROR;
  4182. ioc->start_scan = 0;
  4183. ioc->port_enable_cmds.status =
  4184. MPT2_CMD_NOT_USED;
  4185. } else
  4186. complete(&ioc->port_enable_cmds.done);
  4187. }
  4188. if (ioc->config_cmds.status & MPT2_CMD_PENDING) {
  4189. ioc->config_cmds.status |= MPT2_CMD_RESET;
  4190. mpt2sas_base_free_smid(ioc, ioc->config_cmds.smid);
  4191. ioc->config_cmds.smid = USHRT_MAX;
  4192. complete(&ioc->config_cmds.done);
  4193. }
  4194. break;
  4195. case MPT2_IOC_DONE_RESET:
  4196. dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
  4197. "MPT2_IOC_DONE_RESET\n", ioc->name, __func__));
  4198. break;
  4199. }
  4200. }
  4201. /**
  4202. * _wait_for_commands_to_complete - reset controller
  4203. * @ioc: Pointer to MPT_ADAPTER structure
  4204. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  4205. *
  4206. * This function waiting(3s) for all pending commands to complete
  4207. * prior to putting controller in reset.
  4208. */
  4209. static void
  4210. _wait_for_commands_to_complete(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  4211. {
  4212. u32 ioc_state;
  4213. unsigned long flags;
  4214. u16 i;
  4215. ioc->pending_io_count = 0;
  4216. if (sleep_flag != CAN_SLEEP)
  4217. return;
  4218. ioc_state = mpt2sas_base_get_iocstate(ioc, 0);
  4219. if ((ioc_state & MPI2_IOC_STATE_MASK) != MPI2_IOC_STATE_OPERATIONAL)
  4220. return;
  4221. /* pending command count */
  4222. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  4223. for (i = 0; i < ioc->scsiio_depth; i++)
  4224. if (ioc->scsi_lookup[i].cb_idx != 0xFF)
  4225. ioc->pending_io_count++;
  4226. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  4227. if (!ioc->pending_io_count)
  4228. return;
  4229. /* wait for pending commands to complete */
  4230. wait_event_timeout(ioc->reset_wq, ioc->pending_io_count == 0, 10 * HZ);
  4231. }
  4232. /**
  4233. * mpt2sas_base_hard_reset_handler - reset controller
  4234. * @ioc: Pointer to MPT_ADAPTER structure
  4235. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  4236. * @type: FORCE_BIG_HAMMER or SOFT_RESET
  4237. *
  4238. * Returns 0 for success, non-zero for failure.
  4239. */
  4240. int
  4241. mpt2sas_base_hard_reset_handler(struct MPT2SAS_ADAPTER *ioc, int sleep_flag,
  4242. enum reset_type type)
  4243. {
  4244. int r;
  4245. unsigned long flags;
  4246. dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: enter\n", ioc->name,
  4247. __func__));
  4248. if (ioc->pci_error_recovery) {
  4249. printk(MPT2SAS_ERR_FMT "%s: pci error recovery reset\n",
  4250. ioc->name, __func__);
  4251. r = 0;
  4252. goto out_unlocked;
  4253. }
  4254. if (mpt2sas_fwfault_debug)
  4255. mpt2sas_halt_firmware(ioc);
  4256. /* TODO - What we really should be doing is pulling
  4257. * out all the code associated with NO_SLEEP; its never used.
  4258. * That is legacy code from mpt fusion driver, ported over.
  4259. * I will leave this BUG_ON here for now till its been resolved.
  4260. */
  4261. BUG_ON(sleep_flag == NO_SLEEP);
  4262. /* wait for an active reset in progress to complete */
  4263. if (!mutex_trylock(&ioc->reset_in_progress_mutex)) {
  4264. do {
  4265. ssleep(1);
  4266. } while (ioc->shost_recovery == 1);
  4267. dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: exit\n", ioc->name,
  4268. __func__));
  4269. return ioc->ioc_reset_in_progress_status;
  4270. }
  4271. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  4272. ioc->shost_recovery = 1;
  4273. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  4274. _base_reset_handler(ioc, MPT2_IOC_PRE_RESET);
  4275. _wait_for_commands_to_complete(ioc, sleep_flag);
  4276. _base_mask_interrupts(ioc);
  4277. r = _base_make_ioc_ready(ioc, sleep_flag, type);
  4278. if (r)
  4279. goto out;
  4280. _base_reset_handler(ioc, MPT2_IOC_AFTER_RESET);
  4281. /* If this hard reset is called while port enable is active, then
  4282. * there is no reason to call make_ioc_operational
  4283. */
  4284. if (ioc->is_driver_loading && ioc->port_enable_failed) {
  4285. ioc->remove_host = 1;
  4286. r = -EFAULT;
  4287. goto out;
  4288. }
  4289. r = _base_get_ioc_facts(ioc, CAN_SLEEP);
  4290. if (r)
  4291. goto out;
  4292. if (ioc->rdpq_array_enable && !ioc->rdpq_array_capable)
  4293. panic("%s: Issue occurred with flashing controller firmware."
  4294. "Please reboot the system and ensure that the correct"
  4295. " firmware version is running\n", ioc->name);
  4296. r = _base_make_ioc_operational(ioc, sleep_flag);
  4297. if (!r)
  4298. _base_reset_handler(ioc, MPT2_IOC_DONE_RESET);
  4299. out:
  4300. dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: %s\n",
  4301. ioc->name, __func__, ((r == 0) ? "SUCCESS" : "FAILED")));
  4302. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  4303. ioc->ioc_reset_in_progress_status = r;
  4304. ioc->shost_recovery = 0;
  4305. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  4306. mutex_unlock(&ioc->reset_in_progress_mutex);
  4307. out_unlocked:
  4308. dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: exit\n", ioc->name,
  4309. __func__));
  4310. return r;
  4311. }