qeth_core_main.c 162 KB

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  1. /*
  2. * Copyright IBM Corp. 2007, 2009
  3. * Author(s): Utz Bacher <utz.bacher@de.ibm.com>,
  4. * Frank Pavlic <fpavlic@de.ibm.com>,
  5. * Thomas Spatzier <tspat@de.ibm.com>,
  6. * Frank Blaschka <frank.blaschka@de.ibm.com>
  7. */
  8. #define KMSG_COMPONENT "qeth"
  9. #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
  10. #include <linux/module.h>
  11. #include <linux/moduleparam.h>
  12. #include <linux/string.h>
  13. #include <linux/errno.h>
  14. #include <linux/kernel.h>
  15. #include <linux/ip.h>
  16. #include <linux/tcp.h>
  17. #include <linux/mii.h>
  18. #include <linux/kthread.h>
  19. #include <linux/slab.h>
  20. #include <net/iucv/af_iucv.h>
  21. #include <net/dsfield.h>
  22. #include <asm/ebcdic.h>
  23. #include <asm/chpid.h>
  24. #include <asm/io.h>
  25. #include <asm/sysinfo.h>
  26. #include <asm/compat.h>
  27. #include "qeth_core.h"
  28. struct qeth_dbf_info qeth_dbf[QETH_DBF_INFOS] = {
  29. /* define dbf - Name, Pages, Areas, Maxlen, Level, View, Handle */
  30. /* N P A M L V H */
  31. [QETH_DBF_SETUP] = {"qeth_setup",
  32. 8, 1, 8, 5, &debug_hex_ascii_view, NULL},
  33. [QETH_DBF_MSG] = {"qeth_msg", 8, 1, 11 * sizeof(long), 3,
  34. &debug_sprintf_view, NULL},
  35. [QETH_DBF_CTRL] = {"qeth_control",
  36. 8, 1, QETH_DBF_CTRL_LEN, 5, &debug_hex_ascii_view, NULL},
  37. };
  38. EXPORT_SYMBOL_GPL(qeth_dbf);
  39. struct qeth_card_list_struct qeth_core_card_list;
  40. EXPORT_SYMBOL_GPL(qeth_core_card_list);
  41. struct kmem_cache *qeth_core_header_cache;
  42. EXPORT_SYMBOL_GPL(qeth_core_header_cache);
  43. static struct kmem_cache *qeth_qdio_outbuf_cache;
  44. static struct device *qeth_core_root_dev;
  45. static unsigned int known_devices[][6] = QETH_MODELLIST_ARRAY;
  46. static struct lock_class_key qdio_out_skb_queue_key;
  47. static struct mutex qeth_mod_mutex;
  48. static void qeth_send_control_data_cb(struct qeth_channel *,
  49. struct qeth_cmd_buffer *);
  50. static int qeth_issue_next_read(struct qeth_card *);
  51. static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *);
  52. static void qeth_setup_ccw(struct qeth_channel *, unsigned char *, __u32);
  53. static void qeth_free_buffer_pool(struct qeth_card *);
  54. static int qeth_qdio_establish(struct qeth_card *);
  55. static void qeth_free_qdio_buffers(struct qeth_card *);
  56. static void qeth_notify_skbs(struct qeth_qdio_out_q *queue,
  57. struct qeth_qdio_out_buffer *buf,
  58. enum iucv_tx_notify notification);
  59. static void qeth_release_skbs(struct qeth_qdio_out_buffer *buf);
  60. static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue,
  61. struct qeth_qdio_out_buffer *buf,
  62. enum qeth_qdio_buffer_states newbufstate);
  63. static int qeth_init_qdio_out_buf(struct qeth_qdio_out_q *, int);
  64. struct workqueue_struct *qeth_wq;
  65. EXPORT_SYMBOL_GPL(qeth_wq);
  66. int qeth_card_hw_is_reachable(struct qeth_card *card)
  67. {
  68. return (card->state == CARD_STATE_SOFTSETUP) ||
  69. (card->state == CARD_STATE_UP);
  70. }
  71. EXPORT_SYMBOL_GPL(qeth_card_hw_is_reachable);
  72. static void qeth_close_dev_handler(struct work_struct *work)
  73. {
  74. struct qeth_card *card;
  75. card = container_of(work, struct qeth_card, close_dev_work);
  76. QETH_CARD_TEXT(card, 2, "cldevhdl");
  77. rtnl_lock();
  78. dev_close(card->dev);
  79. rtnl_unlock();
  80. ccwgroup_set_offline(card->gdev);
  81. }
  82. void qeth_close_dev(struct qeth_card *card)
  83. {
  84. QETH_CARD_TEXT(card, 2, "cldevsubm");
  85. queue_work(qeth_wq, &card->close_dev_work);
  86. }
  87. EXPORT_SYMBOL_GPL(qeth_close_dev);
  88. static inline const char *qeth_get_cardname(struct qeth_card *card)
  89. {
  90. if (card->info.guestlan) {
  91. switch (card->info.type) {
  92. case QETH_CARD_TYPE_OSD:
  93. return " Virtual NIC QDIO";
  94. case QETH_CARD_TYPE_IQD:
  95. return " Virtual NIC Hiper";
  96. case QETH_CARD_TYPE_OSM:
  97. return " Virtual NIC QDIO - OSM";
  98. case QETH_CARD_TYPE_OSX:
  99. return " Virtual NIC QDIO - OSX";
  100. default:
  101. return " unknown";
  102. }
  103. } else {
  104. switch (card->info.type) {
  105. case QETH_CARD_TYPE_OSD:
  106. return " OSD Express";
  107. case QETH_CARD_TYPE_IQD:
  108. return " HiperSockets";
  109. case QETH_CARD_TYPE_OSN:
  110. return " OSN QDIO";
  111. case QETH_CARD_TYPE_OSM:
  112. return " OSM QDIO";
  113. case QETH_CARD_TYPE_OSX:
  114. return " OSX QDIO";
  115. default:
  116. return " unknown";
  117. }
  118. }
  119. return " n/a";
  120. }
  121. /* max length to be returned: 14 */
  122. const char *qeth_get_cardname_short(struct qeth_card *card)
  123. {
  124. if (card->info.guestlan) {
  125. switch (card->info.type) {
  126. case QETH_CARD_TYPE_OSD:
  127. return "Virt.NIC QDIO";
  128. case QETH_CARD_TYPE_IQD:
  129. return "Virt.NIC Hiper";
  130. case QETH_CARD_TYPE_OSM:
  131. return "Virt.NIC OSM";
  132. case QETH_CARD_TYPE_OSX:
  133. return "Virt.NIC OSX";
  134. default:
  135. return "unknown";
  136. }
  137. } else {
  138. switch (card->info.type) {
  139. case QETH_CARD_TYPE_OSD:
  140. switch (card->info.link_type) {
  141. case QETH_LINK_TYPE_FAST_ETH:
  142. return "OSD_100";
  143. case QETH_LINK_TYPE_HSTR:
  144. return "HSTR";
  145. case QETH_LINK_TYPE_GBIT_ETH:
  146. return "OSD_1000";
  147. case QETH_LINK_TYPE_10GBIT_ETH:
  148. return "OSD_10GIG";
  149. case QETH_LINK_TYPE_LANE_ETH100:
  150. return "OSD_FE_LANE";
  151. case QETH_LINK_TYPE_LANE_TR:
  152. return "OSD_TR_LANE";
  153. case QETH_LINK_TYPE_LANE_ETH1000:
  154. return "OSD_GbE_LANE";
  155. case QETH_LINK_TYPE_LANE:
  156. return "OSD_ATM_LANE";
  157. default:
  158. return "OSD_Express";
  159. }
  160. case QETH_CARD_TYPE_IQD:
  161. return "HiperSockets";
  162. case QETH_CARD_TYPE_OSN:
  163. return "OSN";
  164. case QETH_CARD_TYPE_OSM:
  165. return "OSM_1000";
  166. case QETH_CARD_TYPE_OSX:
  167. return "OSX_10GIG";
  168. default:
  169. return "unknown";
  170. }
  171. }
  172. return "n/a";
  173. }
  174. void qeth_set_recovery_task(struct qeth_card *card)
  175. {
  176. card->recovery_task = current;
  177. }
  178. EXPORT_SYMBOL_GPL(qeth_set_recovery_task);
  179. void qeth_clear_recovery_task(struct qeth_card *card)
  180. {
  181. card->recovery_task = NULL;
  182. }
  183. EXPORT_SYMBOL_GPL(qeth_clear_recovery_task);
  184. static bool qeth_is_recovery_task(const struct qeth_card *card)
  185. {
  186. return card->recovery_task == current;
  187. }
  188. void qeth_set_allowed_threads(struct qeth_card *card, unsigned long threads,
  189. int clear_start_mask)
  190. {
  191. unsigned long flags;
  192. spin_lock_irqsave(&card->thread_mask_lock, flags);
  193. card->thread_allowed_mask = threads;
  194. if (clear_start_mask)
  195. card->thread_start_mask &= threads;
  196. spin_unlock_irqrestore(&card->thread_mask_lock, flags);
  197. wake_up(&card->wait_q);
  198. }
  199. EXPORT_SYMBOL_GPL(qeth_set_allowed_threads);
  200. int qeth_threads_running(struct qeth_card *card, unsigned long threads)
  201. {
  202. unsigned long flags;
  203. int rc = 0;
  204. spin_lock_irqsave(&card->thread_mask_lock, flags);
  205. rc = (card->thread_running_mask & threads);
  206. spin_unlock_irqrestore(&card->thread_mask_lock, flags);
  207. return rc;
  208. }
  209. EXPORT_SYMBOL_GPL(qeth_threads_running);
  210. int qeth_wait_for_threads(struct qeth_card *card, unsigned long threads)
  211. {
  212. if (qeth_is_recovery_task(card))
  213. return 0;
  214. return wait_event_interruptible(card->wait_q,
  215. qeth_threads_running(card, threads) == 0);
  216. }
  217. EXPORT_SYMBOL_GPL(qeth_wait_for_threads);
  218. void qeth_clear_working_pool_list(struct qeth_card *card)
  219. {
  220. struct qeth_buffer_pool_entry *pool_entry, *tmp;
  221. QETH_CARD_TEXT(card, 5, "clwrklst");
  222. list_for_each_entry_safe(pool_entry, tmp,
  223. &card->qdio.in_buf_pool.entry_list, list){
  224. list_del(&pool_entry->list);
  225. }
  226. }
  227. EXPORT_SYMBOL_GPL(qeth_clear_working_pool_list);
  228. static int qeth_alloc_buffer_pool(struct qeth_card *card)
  229. {
  230. struct qeth_buffer_pool_entry *pool_entry;
  231. void *ptr;
  232. int i, j;
  233. QETH_CARD_TEXT(card, 5, "alocpool");
  234. for (i = 0; i < card->qdio.init_pool.buf_count; ++i) {
  235. pool_entry = kzalloc(sizeof(*pool_entry), GFP_KERNEL);
  236. if (!pool_entry) {
  237. qeth_free_buffer_pool(card);
  238. return -ENOMEM;
  239. }
  240. for (j = 0; j < QETH_MAX_BUFFER_ELEMENTS(card); ++j) {
  241. ptr = (void *) __get_free_page(GFP_KERNEL);
  242. if (!ptr) {
  243. while (j > 0)
  244. free_page((unsigned long)
  245. pool_entry->elements[--j]);
  246. kfree(pool_entry);
  247. qeth_free_buffer_pool(card);
  248. return -ENOMEM;
  249. }
  250. pool_entry->elements[j] = ptr;
  251. }
  252. list_add(&pool_entry->init_list,
  253. &card->qdio.init_pool.entry_list);
  254. }
  255. return 0;
  256. }
  257. int qeth_realloc_buffer_pool(struct qeth_card *card, int bufcnt)
  258. {
  259. QETH_CARD_TEXT(card, 2, "realcbp");
  260. if ((card->state != CARD_STATE_DOWN) &&
  261. (card->state != CARD_STATE_RECOVER))
  262. return -EPERM;
  263. /* TODO: steel/add buffers from/to a running card's buffer pool (?) */
  264. qeth_clear_working_pool_list(card);
  265. qeth_free_buffer_pool(card);
  266. card->qdio.in_buf_pool.buf_count = bufcnt;
  267. card->qdio.init_pool.buf_count = bufcnt;
  268. return qeth_alloc_buffer_pool(card);
  269. }
  270. EXPORT_SYMBOL_GPL(qeth_realloc_buffer_pool);
  271. static void qeth_free_qdio_queue(struct qeth_qdio_q *q)
  272. {
  273. if (!q)
  274. return;
  275. qdio_free_buffers(q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q);
  276. kfree(q);
  277. }
  278. static struct qeth_qdio_q *qeth_alloc_qdio_queue(void)
  279. {
  280. struct qeth_qdio_q *q = kzalloc(sizeof(*q), GFP_KERNEL);
  281. int i;
  282. if (!q)
  283. return NULL;
  284. if (qdio_alloc_buffers(q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q)) {
  285. kfree(q);
  286. return NULL;
  287. }
  288. for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i)
  289. q->bufs[i].buffer = q->qdio_bufs[i];
  290. QETH_DBF_HEX(SETUP, 2, &q, sizeof(void *));
  291. return q;
  292. }
  293. static inline int qeth_cq_init(struct qeth_card *card)
  294. {
  295. int rc;
  296. if (card->options.cq == QETH_CQ_ENABLED) {
  297. QETH_DBF_TEXT(SETUP, 2, "cqinit");
  298. qdio_reset_buffers(card->qdio.c_q->qdio_bufs,
  299. QDIO_MAX_BUFFERS_PER_Q);
  300. card->qdio.c_q->next_buf_to_init = 127;
  301. rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT,
  302. card->qdio.no_in_queues - 1, 0,
  303. 127);
  304. if (rc) {
  305. QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
  306. goto out;
  307. }
  308. }
  309. rc = 0;
  310. out:
  311. return rc;
  312. }
  313. static inline int qeth_alloc_cq(struct qeth_card *card)
  314. {
  315. int rc;
  316. if (card->options.cq == QETH_CQ_ENABLED) {
  317. int i;
  318. struct qdio_outbuf_state *outbuf_states;
  319. QETH_DBF_TEXT(SETUP, 2, "cqon");
  320. card->qdio.c_q = qeth_alloc_qdio_queue();
  321. if (!card->qdio.c_q) {
  322. rc = -1;
  323. goto kmsg_out;
  324. }
  325. card->qdio.no_in_queues = 2;
  326. card->qdio.out_bufstates =
  327. kzalloc(card->qdio.no_out_queues *
  328. QDIO_MAX_BUFFERS_PER_Q *
  329. sizeof(struct qdio_outbuf_state), GFP_KERNEL);
  330. outbuf_states = card->qdio.out_bufstates;
  331. if (outbuf_states == NULL) {
  332. rc = -1;
  333. goto free_cq_out;
  334. }
  335. for (i = 0; i < card->qdio.no_out_queues; ++i) {
  336. card->qdio.out_qs[i]->bufstates = outbuf_states;
  337. outbuf_states += QDIO_MAX_BUFFERS_PER_Q;
  338. }
  339. } else {
  340. QETH_DBF_TEXT(SETUP, 2, "nocq");
  341. card->qdio.c_q = NULL;
  342. card->qdio.no_in_queues = 1;
  343. }
  344. QETH_DBF_TEXT_(SETUP, 2, "iqc%d", card->qdio.no_in_queues);
  345. rc = 0;
  346. out:
  347. return rc;
  348. free_cq_out:
  349. qeth_free_qdio_queue(card->qdio.c_q);
  350. card->qdio.c_q = NULL;
  351. kmsg_out:
  352. dev_err(&card->gdev->dev, "Failed to create completion queue\n");
  353. goto out;
  354. }
  355. static inline void qeth_free_cq(struct qeth_card *card)
  356. {
  357. if (card->qdio.c_q) {
  358. --card->qdio.no_in_queues;
  359. qeth_free_qdio_queue(card->qdio.c_q);
  360. card->qdio.c_q = NULL;
  361. }
  362. kfree(card->qdio.out_bufstates);
  363. card->qdio.out_bufstates = NULL;
  364. }
  365. static inline enum iucv_tx_notify qeth_compute_cq_notification(int sbalf15,
  366. int delayed) {
  367. enum iucv_tx_notify n;
  368. switch (sbalf15) {
  369. case 0:
  370. n = delayed ? TX_NOTIFY_DELAYED_OK : TX_NOTIFY_OK;
  371. break;
  372. case 4:
  373. case 16:
  374. case 17:
  375. case 18:
  376. n = delayed ? TX_NOTIFY_DELAYED_UNREACHABLE :
  377. TX_NOTIFY_UNREACHABLE;
  378. break;
  379. default:
  380. n = delayed ? TX_NOTIFY_DELAYED_GENERALERROR :
  381. TX_NOTIFY_GENERALERROR;
  382. break;
  383. }
  384. return n;
  385. }
  386. static inline void qeth_cleanup_handled_pending(struct qeth_qdio_out_q *q,
  387. int bidx, int forced_cleanup)
  388. {
  389. if (q->card->options.cq != QETH_CQ_ENABLED)
  390. return;
  391. if (q->bufs[bidx]->next_pending != NULL) {
  392. struct qeth_qdio_out_buffer *head = q->bufs[bidx];
  393. struct qeth_qdio_out_buffer *c = q->bufs[bidx]->next_pending;
  394. while (c) {
  395. if (forced_cleanup ||
  396. atomic_read(&c->state) ==
  397. QETH_QDIO_BUF_HANDLED_DELAYED) {
  398. struct qeth_qdio_out_buffer *f = c;
  399. QETH_CARD_TEXT(f->q->card, 5, "fp");
  400. QETH_CARD_TEXT_(f->q->card, 5, "%lx", (long) f);
  401. /* release here to avoid interleaving between
  402. outbound tasklet and inbound tasklet
  403. regarding notifications and lifecycle */
  404. qeth_release_skbs(c);
  405. c = f->next_pending;
  406. WARN_ON_ONCE(head->next_pending != f);
  407. head->next_pending = c;
  408. kmem_cache_free(qeth_qdio_outbuf_cache, f);
  409. } else {
  410. head = c;
  411. c = c->next_pending;
  412. }
  413. }
  414. }
  415. if (forced_cleanup && (atomic_read(&(q->bufs[bidx]->state)) ==
  416. QETH_QDIO_BUF_HANDLED_DELAYED)) {
  417. /* for recovery situations */
  418. q->bufs[bidx]->aob = q->bufstates[bidx].aob;
  419. qeth_init_qdio_out_buf(q, bidx);
  420. QETH_CARD_TEXT(q->card, 2, "clprecov");
  421. }
  422. }
  423. static inline void qeth_qdio_handle_aob(struct qeth_card *card,
  424. unsigned long phys_aob_addr) {
  425. struct qaob *aob;
  426. struct qeth_qdio_out_buffer *buffer;
  427. enum iucv_tx_notify notification;
  428. aob = (struct qaob *) phys_to_virt(phys_aob_addr);
  429. QETH_CARD_TEXT(card, 5, "haob");
  430. QETH_CARD_TEXT_(card, 5, "%lx", phys_aob_addr);
  431. buffer = (struct qeth_qdio_out_buffer *) aob->user1;
  432. QETH_CARD_TEXT_(card, 5, "%lx", aob->user1);
  433. if (atomic_cmpxchg(&buffer->state, QETH_QDIO_BUF_PRIMED,
  434. QETH_QDIO_BUF_IN_CQ) == QETH_QDIO_BUF_PRIMED) {
  435. notification = TX_NOTIFY_OK;
  436. } else {
  437. WARN_ON_ONCE(atomic_read(&buffer->state) !=
  438. QETH_QDIO_BUF_PENDING);
  439. atomic_set(&buffer->state, QETH_QDIO_BUF_IN_CQ);
  440. notification = TX_NOTIFY_DELAYED_OK;
  441. }
  442. if (aob->aorc != 0) {
  443. QETH_CARD_TEXT_(card, 2, "aorc%02X", aob->aorc);
  444. notification = qeth_compute_cq_notification(aob->aorc, 1);
  445. }
  446. qeth_notify_skbs(buffer->q, buffer, notification);
  447. buffer->aob = NULL;
  448. qeth_clear_output_buffer(buffer->q, buffer,
  449. QETH_QDIO_BUF_HANDLED_DELAYED);
  450. /* from here on: do not touch buffer anymore */
  451. qdio_release_aob(aob);
  452. }
  453. static inline int qeth_is_cq(struct qeth_card *card, unsigned int queue)
  454. {
  455. return card->options.cq == QETH_CQ_ENABLED &&
  456. card->qdio.c_q != NULL &&
  457. queue != 0 &&
  458. queue == card->qdio.no_in_queues - 1;
  459. }
  460. static int qeth_issue_next_read(struct qeth_card *card)
  461. {
  462. int rc;
  463. struct qeth_cmd_buffer *iob;
  464. QETH_CARD_TEXT(card, 5, "issnxrd");
  465. if (card->read.state != CH_STATE_UP)
  466. return -EIO;
  467. iob = qeth_get_buffer(&card->read);
  468. if (!iob) {
  469. dev_warn(&card->gdev->dev, "The qeth device driver "
  470. "failed to recover an error on the device\n");
  471. QETH_DBF_MESSAGE(2, "%s issue_next_read failed: no iob "
  472. "available\n", dev_name(&card->gdev->dev));
  473. return -ENOMEM;
  474. }
  475. qeth_setup_ccw(&card->read, iob->data, QETH_BUFSIZE);
  476. QETH_CARD_TEXT(card, 6, "noirqpnd");
  477. rc = ccw_device_start(card->read.ccwdev, &card->read.ccw,
  478. (addr_t) iob, 0, 0);
  479. if (rc) {
  480. QETH_DBF_MESSAGE(2, "%s error in starting next read ccw! "
  481. "rc=%i\n", dev_name(&card->gdev->dev), rc);
  482. atomic_set(&card->read.irq_pending, 0);
  483. card->read_or_write_problem = 1;
  484. qeth_schedule_recovery(card);
  485. wake_up(&card->wait_q);
  486. }
  487. return rc;
  488. }
  489. static struct qeth_reply *qeth_alloc_reply(struct qeth_card *card)
  490. {
  491. struct qeth_reply *reply;
  492. reply = kzalloc(sizeof(struct qeth_reply), GFP_ATOMIC);
  493. if (reply) {
  494. atomic_set(&reply->refcnt, 1);
  495. atomic_set(&reply->received, 0);
  496. reply->card = card;
  497. }
  498. return reply;
  499. }
  500. static void qeth_get_reply(struct qeth_reply *reply)
  501. {
  502. WARN_ON(atomic_read(&reply->refcnt) <= 0);
  503. atomic_inc(&reply->refcnt);
  504. }
  505. static void qeth_put_reply(struct qeth_reply *reply)
  506. {
  507. WARN_ON(atomic_read(&reply->refcnt) <= 0);
  508. if (atomic_dec_and_test(&reply->refcnt))
  509. kfree(reply);
  510. }
  511. static void qeth_issue_ipa_msg(struct qeth_ipa_cmd *cmd, int rc,
  512. struct qeth_card *card)
  513. {
  514. char *ipa_name;
  515. int com = cmd->hdr.command;
  516. ipa_name = qeth_get_ipa_cmd_name(com);
  517. if (rc)
  518. QETH_DBF_MESSAGE(2, "IPA: %s(x%X) for %s/%s returned "
  519. "x%X \"%s\"\n",
  520. ipa_name, com, dev_name(&card->gdev->dev),
  521. QETH_CARD_IFNAME(card), rc,
  522. qeth_get_ipa_msg(rc));
  523. else
  524. QETH_DBF_MESSAGE(5, "IPA: %s(x%X) for %s/%s succeeded\n",
  525. ipa_name, com, dev_name(&card->gdev->dev),
  526. QETH_CARD_IFNAME(card));
  527. }
  528. static struct qeth_ipa_cmd *qeth_check_ipa_data(struct qeth_card *card,
  529. struct qeth_cmd_buffer *iob)
  530. {
  531. struct qeth_ipa_cmd *cmd = NULL;
  532. QETH_CARD_TEXT(card, 5, "chkipad");
  533. if (IS_IPA(iob->data)) {
  534. cmd = (struct qeth_ipa_cmd *) PDU_ENCAPSULATION(iob->data);
  535. if (IS_IPA_REPLY(cmd)) {
  536. if (cmd->hdr.command != IPA_CMD_SETCCID &&
  537. cmd->hdr.command != IPA_CMD_DELCCID &&
  538. cmd->hdr.command != IPA_CMD_MODCCID &&
  539. cmd->hdr.command != IPA_CMD_SET_DIAG_ASS)
  540. qeth_issue_ipa_msg(cmd,
  541. cmd->hdr.return_code, card);
  542. return cmd;
  543. } else {
  544. switch (cmd->hdr.command) {
  545. case IPA_CMD_STOPLAN:
  546. if (cmd->hdr.return_code ==
  547. IPA_RC_VEPA_TO_VEB_TRANSITION) {
  548. dev_err(&card->gdev->dev,
  549. "Interface %s is down because the "
  550. "adjacent port is no longer in "
  551. "reflective relay mode\n",
  552. QETH_CARD_IFNAME(card));
  553. qeth_close_dev(card);
  554. } else {
  555. dev_warn(&card->gdev->dev,
  556. "The link for interface %s on CHPID"
  557. " 0x%X failed\n",
  558. QETH_CARD_IFNAME(card),
  559. card->info.chpid);
  560. qeth_issue_ipa_msg(cmd,
  561. cmd->hdr.return_code, card);
  562. }
  563. card->lan_online = 0;
  564. if (card->dev && netif_carrier_ok(card->dev))
  565. netif_carrier_off(card->dev);
  566. return NULL;
  567. case IPA_CMD_STARTLAN:
  568. dev_info(&card->gdev->dev,
  569. "The link for %s on CHPID 0x%X has"
  570. " been restored\n",
  571. QETH_CARD_IFNAME(card),
  572. card->info.chpid);
  573. netif_carrier_on(card->dev);
  574. card->lan_online = 1;
  575. if (card->info.hwtrap)
  576. card->info.hwtrap = 2;
  577. qeth_schedule_recovery(card);
  578. return NULL;
  579. case IPA_CMD_SETBRIDGEPORT:
  580. case IPA_CMD_ADDRESS_CHANGE_NOTIF:
  581. if (card->discipline->control_event_handler
  582. (card, cmd))
  583. return cmd;
  584. else
  585. return NULL;
  586. case IPA_CMD_MODCCID:
  587. return cmd;
  588. case IPA_CMD_REGISTER_LOCAL_ADDR:
  589. QETH_CARD_TEXT(card, 3, "irla");
  590. break;
  591. case IPA_CMD_UNREGISTER_LOCAL_ADDR:
  592. QETH_CARD_TEXT(card, 3, "urla");
  593. break;
  594. default:
  595. QETH_DBF_MESSAGE(2, "Received data is IPA "
  596. "but not a reply!\n");
  597. break;
  598. }
  599. }
  600. }
  601. return cmd;
  602. }
  603. void qeth_clear_ipacmd_list(struct qeth_card *card)
  604. {
  605. struct qeth_reply *reply, *r;
  606. unsigned long flags;
  607. QETH_CARD_TEXT(card, 4, "clipalst");
  608. spin_lock_irqsave(&card->lock, flags);
  609. list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
  610. qeth_get_reply(reply);
  611. reply->rc = -EIO;
  612. atomic_inc(&reply->received);
  613. list_del_init(&reply->list);
  614. wake_up(&reply->wait_q);
  615. qeth_put_reply(reply);
  616. }
  617. spin_unlock_irqrestore(&card->lock, flags);
  618. atomic_set(&card->write.irq_pending, 0);
  619. }
  620. EXPORT_SYMBOL_GPL(qeth_clear_ipacmd_list);
  621. static int qeth_check_idx_response(struct qeth_card *card,
  622. unsigned char *buffer)
  623. {
  624. if (!buffer)
  625. return 0;
  626. QETH_DBF_HEX(CTRL, 2, buffer, QETH_DBF_CTRL_LEN);
  627. if ((buffer[2] & 0xc0) == 0xc0) {
  628. QETH_DBF_MESSAGE(2, "received an IDX TERMINATE "
  629. "with cause code 0x%02x%s\n",
  630. buffer[4],
  631. ((buffer[4] == 0x22) ?
  632. " -- try another portname" : ""));
  633. QETH_CARD_TEXT(card, 2, "ckidxres");
  634. QETH_CARD_TEXT(card, 2, " idxterm");
  635. QETH_CARD_TEXT_(card, 2, " rc%d", -EIO);
  636. if (buffer[4] == 0xf6) {
  637. dev_err(&card->gdev->dev,
  638. "The qeth device is not configured "
  639. "for the OSI layer required by z/VM\n");
  640. return -EPERM;
  641. }
  642. return -EIO;
  643. }
  644. return 0;
  645. }
  646. static void qeth_setup_ccw(struct qeth_channel *channel, unsigned char *iob,
  647. __u32 len)
  648. {
  649. struct qeth_card *card;
  650. card = CARD_FROM_CDEV(channel->ccwdev);
  651. QETH_CARD_TEXT(card, 4, "setupccw");
  652. if (channel == &card->read)
  653. memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1));
  654. else
  655. memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1));
  656. channel->ccw.count = len;
  657. channel->ccw.cda = (__u32) __pa(iob);
  658. }
  659. static struct qeth_cmd_buffer *__qeth_get_buffer(struct qeth_channel *channel)
  660. {
  661. __u8 index;
  662. QETH_CARD_TEXT(CARD_FROM_CDEV(channel->ccwdev), 6, "getbuff");
  663. index = channel->io_buf_no;
  664. do {
  665. if (channel->iob[index].state == BUF_STATE_FREE) {
  666. channel->iob[index].state = BUF_STATE_LOCKED;
  667. channel->io_buf_no = (channel->io_buf_no + 1) %
  668. QETH_CMD_BUFFER_NO;
  669. memset(channel->iob[index].data, 0, QETH_BUFSIZE);
  670. return channel->iob + index;
  671. }
  672. index = (index + 1) % QETH_CMD_BUFFER_NO;
  673. } while (index != channel->io_buf_no);
  674. return NULL;
  675. }
  676. void qeth_release_buffer(struct qeth_channel *channel,
  677. struct qeth_cmd_buffer *iob)
  678. {
  679. unsigned long flags;
  680. QETH_CARD_TEXT(CARD_FROM_CDEV(channel->ccwdev), 6, "relbuff");
  681. spin_lock_irqsave(&channel->iob_lock, flags);
  682. memset(iob->data, 0, QETH_BUFSIZE);
  683. iob->state = BUF_STATE_FREE;
  684. iob->callback = qeth_send_control_data_cb;
  685. iob->rc = 0;
  686. spin_unlock_irqrestore(&channel->iob_lock, flags);
  687. wake_up(&channel->wait_q);
  688. }
  689. EXPORT_SYMBOL_GPL(qeth_release_buffer);
  690. static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *channel)
  691. {
  692. struct qeth_cmd_buffer *buffer = NULL;
  693. unsigned long flags;
  694. spin_lock_irqsave(&channel->iob_lock, flags);
  695. buffer = __qeth_get_buffer(channel);
  696. spin_unlock_irqrestore(&channel->iob_lock, flags);
  697. return buffer;
  698. }
  699. struct qeth_cmd_buffer *qeth_wait_for_buffer(struct qeth_channel *channel)
  700. {
  701. struct qeth_cmd_buffer *buffer;
  702. wait_event(channel->wait_q,
  703. ((buffer = qeth_get_buffer(channel)) != NULL));
  704. return buffer;
  705. }
  706. EXPORT_SYMBOL_GPL(qeth_wait_for_buffer);
  707. void qeth_clear_cmd_buffers(struct qeth_channel *channel)
  708. {
  709. int cnt;
  710. for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
  711. qeth_release_buffer(channel, &channel->iob[cnt]);
  712. channel->buf_no = 0;
  713. channel->io_buf_no = 0;
  714. }
  715. EXPORT_SYMBOL_GPL(qeth_clear_cmd_buffers);
  716. static void qeth_send_control_data_cb(struct qeth_channel *channel,
  717. struct qeth_cmd_buffer *iob)
  718. {
  719. struct qeth_card *card;
  720. struct qeth_reply *reply, *r;
  721. struct qeth_ipa_cmd *cmd;
  722. unsigned long flags;
  723. int keep_reply;
  724. int rc = 0;
  725. card = CARD_FROM_CDEV(channel->ccwdev);
  726. QETH_CARD_TEXT(card, 4, "sndctlcb");
  727. rc = qeth_check_idx_response(card, iob->data);
  728. switch (rc) {
  729. case 0:
  730. break;
  731. case -EIO:
  732. qeth_clear_ipacmd_list(card);
  733. qeth_schedule_recovery(card);
  734. /* fall through */
  735. default:
  736. goto out;
  737. }
  738. cmd = qeth_check_ipa_data(card, iob);
  739. if ((cmd == NULL) && (card->state != CARD_STATE_DOWN))
  740. goto out;
  741. /*in case of OSN : check if cmd is set */
  742. if (card->info.type == QETH_CARD_TYPE_OSN &&
  743. cmd &&
  744. cmd->hdr.command != IPA_CMD_STARTLAN &&
  745. card->osn_info.assist_cb != NULL) {
  746. card->osn_info.assist_cb(card->dev, cmd);
  747. goto out;
  748. }
  749. spin_lock_irqsave(&card->lock, flags);
  750. list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
  751. if ((reply->seqno == QETH_IDX_COMMAND_SEQNO) ||
  752. ((cmd) && (reply->seqno == cmd->hdr.seqno))) {
  753. qeth_get_reply(reply);
  754. list_del_init(&reply->list);
  755. spin_unlock_irqrestore(&card->lock, flags);
  756. keep_reply = 0;
  757. if (reply->callback != NULL) {
  758. if (cmd) {
  759. reply->offset = (__u16)((char *)cmd -
  760. (char *)iob->data);
  761. keep_reply = reply->callback(card,
  762. reply,
  763. (unsigned long)cmd);
  764. } else
  765. keep_reply = reply->callback(card,
  766. reply,
  767. (unsigned long)iob);
  768. }
  769. if (cmd)
  770. reply->rc = (u16) cmd->hdr.return_code;
  771. else if (iob->rc)
  772. reply->rc = iob->rc;
  773. if (keep_reply) {
  774. spin_lock_irqsave(&card->lock, flags);
  775. list_add_tail(&reply->list,
  776. &card->cmd_waiter_list);
  777. spin_unlock_irqrestore(&card->lock, flags);
  778. } else {
  779. atomic_inc(&reply->received);
  780. wake_up(&reply->wait_q);
  781. }
  782. qeth_put_reply(reply);
  783. goto out;
  784. }
  785. }
  786. spin_unlock_irqrestore(&card->lock, flags);
  787. out:
  788. memcpy(&card->seqno.pdu_hdr_ack,
  789. QETH_PDU_HEADER_SEQ_NO(iob->data),
  790. QETH_SEQ_NO_LENGTH);
  791. qeth_release_buffer(channel, iob);
  792. }
  793. static int qeth_setup_channel(struct qeth_channel *channel)
  794. {
  795. int cnt;
  796. QETH_DBF_TEXT(SETUP, 2, "setupch");
  797. for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++) {
  798. channel->iob[cnt].data =
  799. kzalloc(QETH_BUFSIZE, GFP_DMA|GFP_KERNEL);
  800. if (channel->iob[cnt].data == NULL)
  801. break;
  802. channel->iob[cnt].state = BUF_STATE_FREE;
  803. channel->iob[cnt].channel = channel;
  804. channel->iob[cnt].callback = qeth_send_control_data_cb;
  805. channel->iob[cnt].rc = 0;
  806. }
  807. if (cnt < QETH_CMD_BUFFER_NO) {
  808. while (cnt-- > 0)
  809. kfree(channel->iob[cnt].data);
  810. return -ENOMEM;
  811. }
  812. channel->buf_no = 0;
  813. channel->io_buf_no = 0;
  814. atomic_set(&channel->irq_pending, 0);
  815. spin_lock_init(&channel->iob_lock);
  816. init_waitqueue_head(&channel->wait_q);
  817. return 0;
  818. }
  819. static int qeth_set_thread_start_bit(struct qeth_card *card,
  820. unsigned long thread)
  821. {
  822. unsigned long flags;
  823. spin_lock_irqsave(&card->thread_mask_lock, flags);
  824. if (!(card->thread_allowed_mask & thread) ||
  825. (card->thread_start_mask & thread)) {
  826. spin_unlock_irqrestore(&card->thread_mask_lock, flags);
  827. return -EPERM;
  828. }
  829. card->thread_start_mask |= thread;
  830. spin_unlock_irqrestore(&card->thread_mask_lock, flags);
  831. return 0;
  832. }
  833. void qeth_clear_thread_start_bit(struct qeth_card *card, unsigned long thread)
  834. {
  835. unsigned long flags;
  836. spin_lock_irqsave(&card->thread_mask_lock, flags);
  837. card->thread_start_mask &= ~thread;
  838. spin_unlock_irqrestore(&card->thread_mask_lock, flags);
  839. wake_up(&card->wait_q);
  840. }
  841. EXPORT_SYMBOL_GPL(qeth_clear_thread_start_bit);
  842. void qeth_clear_thread_running_bit(struct qeth_card *card, unsigned long thread)
  843. {
  844. unsigned long flags;
  845. spin_lock_irqsave(&card->thread_mask_lock, flags);
  846. card->thread_running_mask &= ~thread;
  847. spin_unlock_irqrestore(&card->thread_mask_lock, flags);
  848. wake_up(&card->wait_q);
  849. }
  850. EXPORT_SYMBOL_GPL(qeth_clear_thread_running_bit);
  851. static int __qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
  852. {
  853. unsigned long flags;
  854. int rc = 0;
  855. spin_lock_irqsave(&card->thread_mask_lock, flags);
  856. if (card->thread_start_mask & thread) {
  857. if ((card->thread_allowed_mask & thread) &&
  858. !(card->thread_running_mask & thread)) {
  859. rc = 1;
  860. card->thread_start_mask &= ~thread;
  861. card->thread_running_mask |= thread;
  862. } else
  863. rc = -EPERM;
  864. }
  865. spin_unlock_irqrestore(&card->thread_mask_lock, flags);
  866. return rc;
  867. }
  868. int qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
  869. {
  870. int rc = 0;
  871. wait_event(card->wait_q,
  872. (rc = __qeth_do_run_thread(card, thread)) >= 0);
  873. return rc;
  874. }
  875. EXPORT_SYMBOL_GPL(qeth_do_run_thread);
  876. void qeth_schedule_recovery(struct qeth_card *card)
  877. {
  878. QETH_CARD_TEXT(card, 2, "startrec");
  879. if (qeth_set_thread_start_bit(card, QETH_RECOVER_THREAD) == 0)
  880. schedule_work(&card->kernel_thread_starter);
  881. }
  882. EXPORT_SYMBOL_GPL(qeth_schedule_recovery);
  883. static int qeth_get_problem(struct ccw_device *cdev, struct irb *irb)
  884. {
  885. int dstat, cstat;
  886. char *sense;
  887. struct qeth_card *card;
  888. sense = (char *) irb->ecw;
  889. cstat = irb->scsw.cmd.cstat;
  890. dstat = irb->scsw.cmd.dstat;
  891. card = CARD_FROM_CDEV(cdev);
  892. if (cstat & (SCHN_STAT_CHN_CTRL_CHK | SCHN_STAT_INTF_CTRL_CHK |
  893. SCHN_STAT_CHN_DATA_CHK | SCHN_STAT_CHAIN_CHECK |
  894. SCHN_STAT_PROT_CHECK | SCHN_STAT_PROG_CHECK)) {
  895. QETH_CARD_TEXT(card, 2, "CGENCHK");
  896. dev_warn(&cdev->dev, "The qeth device driver "
  897. "failed to recover an error on the device\n");
  898. QETH_DBF_MESSAGE(2, "%s check on device dstat=x%x, cstat=x%x\n",
  899. dev_name(&cdev->dev), dstat, cstat);
  900. print_hex_dump(KERN_WARNING, "qeth: irb ", DUMP_PREFIX_OFFSET,
  901. 16, 1, irb, 64, 1);
  902. return 1;
  903. }
  904. if (dstat & DEV_STAT_UNIT_CHECK) {
  905. if (sense[SENSE_RESETTING_EVENT_BYTE] &
  906. SENSE_RESETTING_EVENT_FLAG) {
  907. QETH_CARD_TEXT(card, 2, "REVIND");
  908. return 1;
  909. }
  910. if (sense[SENSE_COMMAND_REJECT_BYTE] &
  911. SENSE_COMMAND_REJECT_FLAG) {
  912. QETH_CARD_TEXT(card, 2, "CMDREJi");
  913. return 1;
  914. }
  915. if ((sense[2] == 0xaf) && (sense[3] == 0xfe)) {
  916. QETH_CARD_TEXT(card, 2, "AFFE");
  917. return 1;
  918. }
  919. if ((!sense[0]) && (!sense[1]) && (!sense[2]) && (!sense[3])) {
  920. QETH_CARD_TEXT(card, 2, "ZEROSEN");
  921. return 0;
  922. }
  923. QETH_CARD_TEXT(card, 2, "DGENCHK");
  924. return 1;
  925. }
  926. return 0;
  927. }
  928. static long __qeth_check_irb_error(struct ccw_device *cdev,
  929. unsigned long intparm, struct irb *irb)
  930. {
  931. struct qeth_card *card;
  932. card = CARD_FROM_CDEV(cdev);
  933. if (!card || !IS_ERR(irb))
  934. return 0;
  935. switch (PTR_ERR(irb)) {
  936. case -EIO:
  937. QETH_DBF_MESSAGE(2, "%s i/o-error on device\n",
  938. dev_name(&cdev->dev));
  939. QETH_CARD_TEXT(card, 2, "ckirberr");
  940. QETH_CARD_TEXT_(card, 2, " rc%d", -EIO);
  941. break;
  942. case -ETIMEDOUT:
  943. dev_warn(&cdev->dev, "A hardware operation timed out"
  944. " on the device\n");
  945. QETH_CARD_TEXT(card, 2, "ckirberr");
  946. QETH_CARD_TEXT_(card, 2, " rc%d", -ETIMEDOUT);
  947. if (intparm == QETH_RCD_PARM) {
  948. if (card->data.ccwdev == cdev) {
  949. card->data.state = CH_STATE_DOWN;
  950. wake_up(&card->wait_q);
  951. }
  952. }
  953. break;
  954. default:
  955. QETH_DBF_MESSAGE(2, "%s unknown error %ld on device\n",
  956. dev_name(&cdev->dev), PTR_ERR(irb));
  957. QETH_CARD_TEXT(card, 2, "ckirberr");
  958. QETH_CARD_TEXT(card, 2, " rc???");
  959. }
  960. return PTR_ERR(irb);
  961. }
  962. static void qeth_irq(struct ccw_device *cdev, unsigned long intparm,
  963. struct irb *irb)
  964. {
  965. int rc;
  966. int cstat, dstat;
  967. struct qeth_cmd_buffer *buffer;
  968. struct qeth_channel *channel;
  969. struct qeth_card *card;
  970. struct qeth_cmd_buffer *iob;
  971. __u8 index;
  972. if (__qeth_check_irb_error(cdev, intparm, irb))
  973. return;
  974. cstat = irb->scsw.cmd.cstat;
  975. dstat = irb->scsw.cmd.dstat;
  976. card = CARD_FROM_CDEV(cdev);
  977. if (!card)
  978. return;
  979. QETH_CARD_TEXT(card, 5, "irq");
  980. if (card->read.ccwdev == cdev) {
  981. channel = &card->read;
  982. QETH_CARD_TEXT(card, 5, "read");
  983. } else if (card->write.ccwdev == cdev) {
  984. channel = &card->write;
  985. QETH_CARD_TEXT(card, 5, "write");
  986. } else {
  987. channel = &card->data;
  988. QETH_CARD_TEXT(card, 5, "data");
  989. }
  990. atomic_set(&channel->irq_pending, 0);
  991. if (irb->scsw.cmd.fctl & (SCSW_FCTL_CLEAR_FUNC))
  992. channel->state = CH_STATE_STOPPED;
  993. if (irb->scsw.cmd.fctl & (SCSW_FCTL_HALT_FUNC))
  994. channel->state = CH_STATE_HALTED;
  995. /*let's wake up immediately on data channel*/
  996. if ((channel == &card->data) && (intparm != 0) &&
  997. (intparm != QETH_RCD_PARM))
  998. goto out;
  999. if (intparm == QETH_CLEAR_CHANNEL_PARM) {
  1000. QETH_CARD_TEXT(card, 6, "clrchpar");
  1001. /* we don't have to handle this further */
  1002. intparm = 0;
  1003. }
  1004. if (intparm == QETH_HALT_CHANNEL_PARM) {
  1005. QETH_CARD_TEXT(card, 6, "hltchpar");
  1006. /* we don't have to handle this further */
  1007. intparm = 0;
  1008. }
  1009. if ((dstat & DEV_STAT_UNIT_EXCEP) ||
  1010. (dstat & DEV_STAT_UNIT_CHECK) ||
  1011. (cstat)) {
  1012. if (irb->esw.esw0.erw.cons) {
  1013. dev_warn(&channel->ccwdev->dev,
  1014. "The qeth device driver failed to recover "
  1015. "an error on the device\n");
  1016. QETH_DBF_MESSAGE(2, "%s sense data available. cstat "
  1017. "0x%X dstat 0x%X\n",
  1018. dev_name(&channel->ccwdev->dev), cstat, dstat);
  1019. print_hex_dump(KERN_WARNING, "qeth: irb ",
  1020. DUMP_PREFIX_OFFSET, 16, 1, irb, 32, 1);
  1021. print_hex_dump(KERN_WARNING, "qeth: sense data ",
  1022. DUMP_PREFIX_OFFSET, 16, 1, irb->ecw, 32, 1);
  1023. }
  1024. if (intparm == QETH_RCD_PARM) {
  1025. channel->state = CH_STATE_DOWN;
  1026. goto out;
  1027. }
  1028. rc = qeth_get_problem(cdev, irb);
  1029. if (rc) {
  1030. qeth_clear_ipacmd_list(card);
  1031. qeth_schedule_recovery(card);
  1032. goto out;
  1033. }
  1034. }
  1035. if (intparm == QETH_RCD_PARM) {
  1036. channel->state = CH_STATE_RCD_DONE;
  1037. goto out;
  1038. }
  1039. if (intparm) {
  1040. buffer = (struct qeth_cmd_buffer *) __va((addr_t)intparm);
  1041. buffer->state = BUF_STATE_PROCESSED;
  1042. }
  1043. if (channel == &card->data)
  1044. return;
  1045. if (channel == &card->read &&
  1046. channel->state == CH_STATE_UP)
  1047. qeth_issue_next_read(card);
  1048. iob = channel->iob;
  1049. index = channel->buf_no;
  1050. while (iob[index].state == BUF_STATE_PROCESSED) {
  1051. if (iob[index].callback != NULL)
  1052. iob[index].callback(channel, iob + index);
  1053. index = (index + 1) % QETH_CMD_BUFFER_NO;
  1054. }
  1055. channel->buf_no = index;
  1056. out:
  1057. wake_up(&card->wait_q);
  1058. return;
  1059. }
  1060. static void qeth_notify_skbs(struct qeth_qdio_out_q *q,
  1061. struct qeth_qdio_out_buffer *buf,
  1062. enum iucv_tx_notify notification)
  1063. {
  1064. struct sk_buff *skb;
  1065. if (skb_queue_empty(&buf->skb_list))
  1066. goto out;
  1067. skb = skb_peek(&buf->skb_list);
  1068. while (skb) {
  1069. QETH_CARD_TEXT_(q->card, 5, "skbn%d", notification);
  1070. QETH_CARD_TEXT_(q->card, 5, "%lx", (long) skb);
  1071. if (skb->protocol == ETH_P_AF_IUCV) {
  1072. if (skb->sk) {
  1073. struct iucv_sock *iucv = iucv_sk(skb->sk);
  1074. iucv->sk_txnotify(skb, notification);
  1075. }
  1076. }
  1077. if (skb_queue_is_last(&buf->skb_list, skb))
  1078. skb = NULL;
  1079. else
  1080. skb = skb_queue_next(&buf->skb_list, skb);
  1081. }
  1082. out:
  1083. return;
  1084. }
  1085. static void qeth_release_skbs(struct qeth_qdio_out_buffer *buf)
  1086. {
  1087. struct sk_buff *skb;
  1088. struct iucv_sock *iucv;
  1089. int notify_general_error = 0;
  1090. if (atomic_read(&buf->state) == QETH_QDIO_BUF_PENDING)
  1091. notify_general_error = 1;
  1092. /* release may never happen from within CQ tasklet scope */
  1093. WARN_ON_ONCE(atomic_read(&buf->state) == QETH_QDIO_BUF_IN_CQ);
  1094. skb = skb_dequeue(&buf->skb_list);
  1095. while (skb) {
  1096. QETH_CARD_TEXT(buf->q->card, 5, "skbr");
  1097. QETH_CARD_TEXT_(buf->q->card, 5, "%lx", (long) skb);
  1098. if (notify_general_error && skb->protocol == ETH_P_AF_IUCV) {
  1099. if (skb->sk) {
  1100. iucv = iucv_sk(skb->sk);
  1101. iucv->sk_txnotify(skb, TX_NOTIFY_GENERALERROR);
  1102. }
  1103. }
  1104. atomic_dec(&skb->users);
  1105. dev_kfree_skb_any(skb);
  1106. skb = skb_dequeue(&buf->skb_list);
  1107. }
  1108. }
  1109. static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue,
  1110. struct qeth_qdio_out_buffer *buf,
  1111. enum qeth_qdio_buffer_states newbufstate)
  1112. {
  1113. int i;
  1114. /* is PCI flag set on buffer? */
  1115. if (buf->buffer->element[0].sflags & SBAL_SFLAGS0_PCI_REQ)
  1116. atomic_dec(&queue->set_pci_flags_count);
  1117. if (newbufstate == QETH_QDIO_BUF_EMPTY) {
  1118. qeth_release_skbs(buf);
  1119. }
  1120. for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(queue->card); ++i) {
  1121. if (buf->buffer->element[i].addr && buf->is_header[i])
  1122. kmem_cache_free(qeth_core_header_cache,
  1123. buf->buffer->element[i].addr);
  1124. buf->is_header[i] = 0;
  1125. buf->buffer->element[i].length = 0;
  1126. buf->buffer->element[i].addr = NULL;
  1127. buf->buffer->element[i].eflags = 0;
  1128. buf->buffer->element[i].sflags = 0;
  1129. }
  1130. buf->buffer->element[15].eflags = 0;
  1131. buf->buffer->element[15].sflags = 0;
  1132. buf->next_element_to_fill = 0;
  1133. atomic_set(&buf->state, newbufstate);
  1134. }
  1135. static void qeth_clear_outq_buffers(struct qeth_qdio_out_q *q, int free)
  1136. {
  1137. int j;
  1138. for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
  1139. if (!q->bufs[j])
  1140. continue;
  1141. qeth_cleanup_handled_pending(q, j, 1);
  1142. qeth_clear_output_buffer(q, q->bufs[j], QETH_QDIO_BUF_EMPTY);
  1143. if (free) {
  1144. kmem_cache_free(qeth_qdio_outbuf_cache, q->bufs[j]);
  1145. q->bufs[j] = NULL;
  1146. }
  1147. }
  1148. }
  1149. void qeth_clear_qdio_buffers(struct qeth_card *card)
  1150. {
  1151. int i;
  1152. QETH_CARD_TEXT(card, 2, "clearqdbf");
  1153. /* clear outbound buffers to free skbs */
  1154. for (i = 0; i < card->qdio.no_out_queues; ++i) {
  1155. if (card->qdio.out_qs[i]) {
  1156. qeth_clear_outq_buffers(card->qdio.out_qs[i], 0);
  1157. }
  1158. }
  1159. }
  1160. EXPORT_SYMBOL_GPL(qeth_clear_qdio_buffers);
  1161. static void qeth_free_buffer_pool(struct qeth_card *card)
  1162. {
  1163. struct qeth_buffer_pool_entry *pool_entry, *tmp;
  1164. int i = 0;
  1165. list_for_each_entry_safe(pool_entry, tmp,
  1166. &card->qdio.init_pool.entry_list, init_list){
  1167. for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i)
  1168. free_page((unsigned long)pool_entry->elements[i]);
  1169. list_del(&pool_entry->init_list);
  1170. kfree(pool_entry);
  1171. }
  1172. }
  1173. static void qeth_clean_channel(struct qeth_channel *channel)
  1174. {
  1175. int cnt;
  1176. QETH_DBF_TEXT(SETUP, 2, "freech");
  1177. for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
  1178. kfree(channel->iob[cnt].data);
  1179. }
  1180. static void qeth_set_single_write_queues(struct qeth_card *card)
  1181. {
  1182. if ((atomic_read(&card->qdio.state) != QETH_QDIO_UNINITIALIZED) &&
  1183. (card->qdio.no_out_queues == 4))
  1184. qeth_free_qdio_buffers(card);
  1185. card->qdio.no_out_queues = 1;
  1186. if (card->qdio.default_out_queue != 0)
  1187. dev_info(&card->gdev->dev, "Priority Queueing not supported\n");
  1188. card->qdio.default_out_queue = 0;
  1189. }
  1190. static void qeth_set_multiple_write_queues(struct qeth_card *card)
  1191. {
  1192. if ((atomic_read(&card->qdio.state) != QETH_QDIO_UNINITIALIZED) &&
  1193. (card->qdio.no_out_queues == 1)) {
  1194. qeth_free_qdio_buffers(card);
  1195. card->qdio.default_out_queue = 2;
  1196. }
  1197. card->qdio.no_out_queues = 4;
  1198. }
  1199. static void qeth_update_from_chp_desc(struct qeth_card *card)
  1200. {
  1201. struct ccw_device *ccwdev;
  1202. struct channel_path_desc *chp_dsc;
  1203. QETH_DBF_TEXT(SETUP, 2, "chp_desc");
  1204. ccwdev = card->data.ccwdev;
  1205. chp_dsc = ccw_device_get_chp_desc(ccwdev, 0);
  1206. if (!chp_dsc)
  1207. goto out;
  1208. card->info.func_level = 0x4100 + chp_dsc->desc;
  1209. if (card->info.type == QETH_CARD_TYPE_IQD)
  1210. goto out;
  1211. /* CHPP field bit 6 == 1 -> single queue */
  1212. if ((chp_dsc->chpp & 0x02) == 0x02)
  1213. qeth_set_single_write_queues(card);
  1214. else
  1215. qeth_set_multiple_write_queues(card);
  1216. out:
  1217. kfree(chp_dsc);
  1218. QETH_DBF_TEXT_(SETUP, 2, "nr:%x", card->qdio.no_out_queues);
  1219. QETH_DBF_TEXT_(SETUP, 2, "lvl:%02x", card->info.func_level);
  1220. }
  1221. static void qeth_init_qdio_info(struct qeth_card *card)
  1222. {
  1223. QETH_DBF_TEXT(SETUP, 4, "intqdinf");
  1224. atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
  1225. /* inbound */
  1226. card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
  1227. if (card->info.type == QETH_CARD_TYPE_IQD)
  1228. card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_HSDEFAULT;
  1229. else
  1230. card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_DEFAULT;
  1231. card->qdio.in_buf_pool.buf_count = card->qdio.init_pool.buf_count;
  1232. INIT_LIST_HEAD(&card->qdio.in_buf_pool.entry_list);
  1233. INIT_LIST_HEAD(&card->qdio.init_pool.entry_list);
  1234. }
  1235. static void qeth_set_intial_options(struct qeth_card *card)
  1236. {
  1237. card->options.route4.type = NO_ROUTER;
  1238. card->options.route6.type = NO_ROUTER;
  1239. card->options.fake_broadcast = 0;
  1240. card->options.add_hhlen = DEFAULT_ADD_HHLEN;
  1241. card->options.performance_stats = 0;
  1242. card->options.rx_sg_cb = QETH_RX_SG_CB;
  1243. card->options.isolation = ISOLATION_MODE_NONE;
  1244. card->options.cq = QETH_CQ_DISABLED;
  1245. }
  1246. static int qeth_do_start_thread(struct qeth_card *card, unsigned long thread)
  1247. {
  1248. unsigned long flags;
  1249. int rc = 0;
  1250. spin_lock_irqsave(&card->thread_mask_lock, flags);
  1251. QETH_CARD_TEXT_(card, 4, " %02x%02x%02x",
  1252. (u8) card->thread_start_mask,
  1253. (u8) card->thread_allowed_mask,
  1254. (u8) card->thread_running_mask);
  1255. rc = (card->thread_start_mask & thread);
  1256. spin_unlock_irqrestore(&card->thread_mask_lock, flags);
  1257. return rc;
  1258. }
  1259. static void qeth_start_kernel_thread(struct work_struct *work)
  1260. {
  1261. struct task_struct *ts;
  1262. struct qeth_card *card = container_of(work, struct qeth_card,
  1263. kernel_thread_starter);
  1264. QETH_CARD_TEXT(card , 2, "strthrd");
  1265. if (card->read.state != CH_STATE_UP &&
  1266. card->write.state != CH_STATE_UP)
  1267. return;
  1268. if (qeth_do_start_thread(card, QETH_RECOVER_THREAD)) {
  1269. ts = kthread_run(card->discipline->recover, (void *)card,
  1270. "qeth_recover");
  1271. if (IS_ERR(ts)) {
  1272. qeth_clear_thread_start_bit(card, QETH_RECOVER_THREAD);
  1273. qeth_clear_thread_running_bit(card,
  1274. QETH_RECOVER_THREAD);
  1275. }
  1276. }
  1277. }
  1278. static int qeth_setup_card(struct qeth_card *card)
  1279. {
  1280. QETH_DBF_TEXT(SETUP, 2, "setupcrd");
  1281. QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
  1282. card->read.state = CH_STATE_DOWN;
  1283. card->write.state = CH_STATE_DOWN;
  1284. card->data.state = CH_STATE_DOWN;
  1285. card->state = CARD_STATE_DOWN;
  1286. card->lan_online = 0;
  1287. card->read_or_write_problem = 0;
  1288. card->dev = NULL;
  1289. spin_lock_init(&card->vlanlock);
  1290. spin_lock_init(&card->mclock);
  1291. spin_lock_init(&card->lock);
  1292. spin_lock_init(&card->ip_lock);
  1293. spin_lock_init(&card->thread_mask_lock);
  1294. mutex_init(&card->conf_mutex);
  1295. mutex_init(&card->discipline_mutex);
  1296. card->thread_start_mask = 0;
  1297. card->thread_allowed_mask = 0;
  1298. card->thread_running_mask = 0;
  1299. INIT_WORK(&card->kernel_thread_starter, qeth_start_kernel_thread);
  1300. INIT_LIST_HEAD(&card->ip_list);
  1301. INIT_LIST_HEAD(card->ip_tbd_list);
  1302. INIT_LIST_HEAD(&card->cmd_waiter_list);
  1303. init_waitqueue_head(&card->wait_q);
  1304. /* initial options */
  1305. qeth_set_intial_options(card);
  1306. /* IP address takeover */
  1307. INIT_LIST_HEAD(&card->ipato.entries);
  1308. card->ipato.enabled = 0;
  1309. card->ipato.invert4 = 0;
  1310. card->ipato.invert6 = 0;
  1311. /* init QDIO stuff */
  1312. qeth_init_qdio_info(card);
  1313. INIT_DELAYED_WORK(&card->buffer_reclaim_work, qeth_buffer_reclaim_work);
  1314. INIT_WORK(&card->close_dev_work, qeth_close_dev_handler);
  1315. return 0;
  1316. }
  1317. static void qeth_core_sl_print(struct seq_file *m, struct service_level *slr)
  1318. {
  1319. struct qeth_card *card = container_of(slr, struct qeth_card,
  1320. qeth_service_level);
  1321. if (card->info.mcl_level[0])
  1322. seq_printf(m, "qeth: %s firmware level %s\n",
  1323. CARD_BUS_ID(card), card->info.mcl_level);
  1324. }
  1325. static struct qeth_card *qeth_alloc_card(void)
  1326. {
  1327. struct qeth_card *card;
  1328. QETH_DBF_TEXT(SETUP, 2, "alloccrd");
  1329. card = kzalloc(sizeof(struct qeth_card), GFP_DMA|GFP_KERNEL);
  1330. if (!card)
  1331. goto out;
  1332. QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
  1333. card->ip_tbd_list = kzalloc(sizeof(struct list_head), GFP_KERNEL);
  1334. if (!card->ip_tbd_list) {
  1335. QETH_DBF_TEXT(SETUP, 0, "iptbdnom");
  1336. goto out_card;
  1337. }
  1338. if (qeth_setup_channel(&card->read))
  1339. goto out_ip;
  1340. if (qeth_setup_channel(&card->write))
  1341. goto out_channel;
  1342. card->options.layer2 = -1;
  1343. card->qeth_service_level.seq_print = qeth_core_sl_print;
  1344. register_service_level(&card->qeth_service_level);
  1345. return card;
  1346. out_channel:
  1347. qeth_clean_channel(&card->read);
  1348. out_ip:
  1349. kfree(card->ip_tbd_list);
  1350. out_card:
  1351. kfree(card);
  1352. out:
  1353. return NULL;
  1354. }
  1355. static int qeth_determine_card_type(struct qeth_card *card)
  1356. {
  1357. int i = 0;
  1358. QETH_DBF_TEXT(SETUP, 2, "detcdtyp");
  1359. card->qdio.do_prio_queueing = QETH_PRIOQ_DEFAULT;
  1360. card->qdio.default_out_queue = QETH_DEFAULT_QUEUE;
  1361. while (known_devices[i][QETH_DEV_MODEL_IND]) {
  1362. if ((CARD_RDEV(card)->id.dev_type ==
  1363. known_devices[i][QETH_DEV_TYPE_IND]) &&
  1364. (CARD_RDEV(card)->id.dev_model ==
  1365. known_devices[i][QETH_DEV_MODEL_IND])) {
  1366. card->info.type = known_devices[i][QETH_DEV_MODEL_IND];
  1367. card->qdio.no_out_queues =
  1368. known_devices[i][QETH_QUEUE_NO_IND];
  1369. card->qdio.no_in_queues = 1;
  1370. card->info.is_multicast_different =
  1371. known_devices[i][QETH_MULTICAST_IND];
  1372. qeth_update_from_chp_desc(card);
  1373. return 0;
  1374. }
  1375. i++;
  1376. }
  1377. card->info.type = QETH_CARD_TYPE_UNKNOWN;
  1378. dev_err(&card->gdev->dev, "The adapter hardware is of an "
  1379. "unknown type\n");
  1380. return -ENOENT;
  1381. }
  1382. static int qeth_clear_channel(struct qeth_channel *channel)
  1383. {
  1384. unsigned long flags;
  1385. struct qeth_card *card;
  1386. int rc;
  1387. card = CARD_FROM_CDEV(channel->ccwdev);
  1388. QETH_CARD_TEXT(card, 3, "clearch");
  1389. spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
  1390. rc = ccw_device_clear(channel->ccwdev, QETH_CLEAR_CHANNEL_PARM);
  1391. spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
  1392. if (rc)
  1393. return rc;
  1394. rc = wait_event_interruptible_timeout(card->wait_q,
  1395. channel->state == CH_STATE_STOPPED, QETH_TIMEOUT);
  1396. if (rc == -ERESTARTSYS)
  1397. return rc;
  1398. if (channel->state != CH_STATE_STOPPED)
  1399. return -ETIME;
  1400. channel->state = CH_STATE_DOWN;
  1401. return 0;
  1402. }
  1403. static int qeth_halt_channel(struct qeth_channel *channel)
  1404. {
  1405. unsigned long flags;
  1406. struct qeth_card *card;
  1407. int rc;
  1408. card = CARD_FROM_CDEV(channel->ccwdev);
  1409. QETH_CARD_TEXT(card, 3, "haltch");
  1410. spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
  1411. rc = ccw_device_halt(channel->ccwdev, QETH_HALT_CHANNEL_PARM);
  1412. spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
  1413. if (rc)
  1414. return rc;
  1415. rc = wait_event_interruptible_timeout(card->wait_q,
  1416. channel->state == CH_STATE_HALTED, QETH_TIMEOUT);
  1417. if (rc == -ERESTARTSYS)
  1418. return rc;
  1419. if (channel->state != CH_STATE_HALTED)
  1420. return -ETIME;
  1421. return 0;
  1422. }
  1423. static int qeth_halt_channels(struct qeth_card *card)
  1424. {
  1425. int rc1 = 0, rc2 = 0, rc3 = 0;
  1426. QETH_CARD_TEXT(card, 3, "haltchs");
  1427. rc1 = qeth_halt_channel(&card->read);
  1428. rc2 = qeth_halt_channel(&card->write);
  1429. rc3 = qeth_halt_channel(&card->data);
  1430. if (rc1)
  1431. return rc1;
  1432. if (rc2)
  1433. return rc2;
  1434. return rc3;
  1435. }
  1436. static int qeth_clear_channels(struct qeth_card *card)
  1437. {
  1438. int rc1 = 0, rc2 = 0, rc3 = 0;
  1439. QETH_CARD_TEXT(card, 3, "clearchs");
  1440. rc1 = qeth_clear_channel(&card->read);
  1441. rc2 = qeth_clear_channel(&card->write);
  1442. rc3 = qeth_clear_channel(&card->data);
  1443. if (rc1)
  1444. return rc1;
  1445. if (rc2)
  1446. return rc2;
  1447. return rc3;
  1448. }
  1449. static int qeth_clear_halt_card(struct qeth_card *card, int halt)
  1450. {
  1451. int rc = 0;
  1452. QETH_CARD_TEXT(card, 3, "clhacrd");
  1453. if (halt)
  1454. rc = qeth_halt_channels(card);
  1455. if (rc)
  1456. return rc;
  1457. return qeth_clear_channels(card);
  1458. }
  1459. int qeth_qdio_clear_card(struct qeth_card *card, int use_halt)
  1460. {
  1461. int rc = 0;
  1462. QETH_CARD_TEXT(card, 3, "qdioclr");
  1463. switch (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ESTABLISHED,
  1464. QETH_QDIO_CLEANING)) {
  1465. case QETH_QDIO_ESTABLISHED:
  1466. if (card->info.type == QETH_CARD_TYPE_IQD)
  1467. rc = qdio_shutdown(CARD_DDEV(card),
  1468. QDIO_FLAG_CLEANUP_USING_HALT);
  1469. else
  1470. rc = qdio_shutdown(CARD_DDEV(card),
  1471. QDIO_FLAG_CLEANUP_USING_CLEAR);
  1472. if (rc)
  1473. QETH_CARD_TEXT_(card, 3, "1err%d", rc);
  1474. atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
  1475. break;
  1476. case QETH_QDIO_CLEANING:
  1477. return rc;
  1478. default:
  1479. break;
  1480. }
  1481. rc = qeth_clear_halt_card(card, use_halt);
  1482. if (rc)
  1483. QETH_CARD_TEXT_(card, 3, "2err%d", rc);
  1484. card->state = CARD_STATE_DOWN;
  1485. return rc;
  1486. }
  1487. EXPORT_SYMBOL_GPL(qeth_qdio_clear_card);
  1488. static int qeth_read_conf_data(struct qeth_card *card, void **buffer,
  1489. int *length)
  1490. {
  1491. struct ciw *ciw;
  1492. char *rcd_buf;
  1493. int ret;
  1494. struct qeth_channel *channel = &card->data;
  1495. unsigned long flags;
  1496. /*
  1497. * scan for RCD command in extended SenseID data
  1498. */
  1499. ciw = ccw_device_get_ciw(channel->ccwdev, CIW_TYPE_RCD);
  1500. if (!ciw || ciw->cmd == 0)
  1501. return -EOPNOTSUPP;
  1502. rcd_buf = kzalloc(ciw->count, GFP_KERNEL | GFP_DMA);
  1503. if (!rcd_buf)
  1504. return -ENOMEM;
  1505. channel->ccw.cmd_code = ciw->cmd;
  1506. channel->ccw.cda = (__u32) __pa(rcd_buf);
  1507. channel->ccw.count = ciw->count;
  1508. channel->ccw.flags = CCW_FLAG_SLI;
  1509. channel->state = CH_STATE_RCD;
  1510. spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
  1511. ret = ccw_device_start_timeout(channel->ccwdev, &channel->ccw,
  1512. QETH_RCD_PARM, LPM_ANYPATH, 0,
  1513. QETH_RCD_TIMEOUT);
  1514. spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
  1515. if (!ret)
  1516. wait_event(card->wait_q,
  1517. (channel->state == CH_STATE_RCD_DONE ||
  1518. channel->state == CH_STATE_DOWN));
  1519. if (channel->state == CH_STATE_DOWN)
  1520. ret = -EIO;
  1521. else
  1522. channel->state = CH_STATE_DOWN;
  1523. if (ret) {
  1524. kfree(rcd_buf);
  1525. *buffer = NULL;
  1526. *length = 0;
  1527. } else {
  1528. *length = ciw->count;
  1529. *buffer = rcd_buf;
  1530. }
  1531. return ret;
  1532. }
  1533. static void qeth_configure_unitaddr(struct qeth_card *card, char *prcd)
  1534. {
  1535. QETH_DBF_TEXT(SETUP, 2, "cfgunit");
  1536. card->info.chpid = prcd[30];
  1537. card->info.unit_addr2 = prcd[31];
  1538. card->info.cula = prcd[63];
  1539. card->info.guestlan = ((prcd[0x10] == _ascebc['V']) &&
  1540. (prcd[0x11] == _ascebc['M']));
  1541. }
  1542. static void qeth_configure_blkt_default(struct qeth_card *card, char *prcd)
  1543. {
  1544. QETH_DBF_TEXT(SETUP, 2, "cfgblkt");
  1545. if (prcd[74] == 0xF0 && prcd[75] == 0xF0 &&
  1546. prcd[76] >= 0xF1 && prcd[76] <= 0xF4) {
  1547. card->info.blkt.time_total = 0;
  1548. card->info.blkt.inter_packet = 0;
  1549. card->info.blkt.inter_packet_jumbo = 0;
  1550. } else {
  1551. card->info.blkt.time_total = 250;
  1552. card->info.blkt.inter_packet = 5;
  1553. card->info.blkt.inter_packet_jumbo = 15;
  1554. }
  1555. }
  1556. static void qeth_init_tokens(struct qeth_card *card)
  1557. {
  1558. card->token.issuer_rm_w = 0x00010103UL;
  1559. card->token.cm_filter_w = 0x00010108UL;
  1560. card->token.cm_connection_w = 0x0001010aUL;
  1561. card->token.ulp_filter_w = 0x0001010bUL;
  1562. card->token.ulp_connection_w = 0x0001010dUL;
  1563. }
  1564. static void qeth_init_func_level(struct qeth_card *card)
  1565. {
  1566. switch (card->info.type) {
  1567. case QETH_CARD_TYPE_IQD:
  1568. card->info.func_level = QETH_IDX_FUNC_LEVEL_IQD;
  1569. break;
  1570. case QETH_CARD_TYPE_OSD:
  1571. case QETH_CARD_TYPE_OSN:
  1572. card->info.func_level = QETH_IDX_FUNC_LEVEL_OSD;
  1573. break;
  1574. default:
  1575. break;
  1576. }
  1577. }
  1578. static int qeth_idx_activate_get_answer(struct qeth_channel *channel,
  1579. void (*idx_reply_cb)(struct qeth_channel *,
  1580. struct qeth_cmd_buffer *))
  1581. {
  1582. struct qeth_cmd_buffer *iob;
  1583. unsigned long flags;
  1584. int rc;
  1585. struct qeth_card *card;
  1586. QETH_DBF_TEXT(SETUP, 2, "idxanswr");
  1587. card = CARD_FROM_CDEV(channel->ccwdev);
  1588. iob = qeth_get_buffer(channel);
  1589. iob->callback = idx_reply_cb;
  1590. memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1));
  1591. channel->ccw.count = QETH_BUFSIZE;
  1592. channel->ccw.cda = (__u32) __pa(iob->data);
  1593. wait_event(card->wait_q,
  1594. atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
  1595. QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
  1596. spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
  1597. rc = ccw_device_start(channel->ccwdev,
  1598. &channel->ccw, (addr_t) iob, 0, 0);
  1599. spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
  1600. if (rc) {
  1601. QETH_DBF_MESSAGE(2, "Error2 in activating channel rc=%d\n", rc);
  1602. QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
  1603. atomic_set(&channel->irq_pending, 0);
  1604. wake_up(&card->wait_q);
  1605. return rc;
  1606. }
  1607. rc = wait_event_interruptible_timeout(card->wait_q,
  1608. channel->state == CH_STATE_UP, QETH_TIMEOUT);
  1609. if (rc == -ERESTARTSYS)
  1610. return rc;
  1611. if (channel->state != CH_STATE_UP) {
  1612. rc = -ETIME;
  1613. QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
  1614. qeth_clear_cmd_buffers(channel);
  1615. } else
  1616. rc = 0;
  1617. return rc;
  1618. }
  1619. static int qeth_idx_activate_channel(struct qeth_channel *channel,
  1620. void (*idx_reply_cb)(struct qeth_channel *,
  1621. struct qeth_cmd_buffer *))
  1622. {
  1623. struct qeth_card *card;
  1624. struct qeth_cmd_buffer *iob;
  1625. unsigned long flags;
  1626. __u16 temp;
  1627. __u8 tmp;
  1628. int rc;
  1629. struct ccw_dev_id temp_devid;
  1630. card = CARD_FROM_CDEV(channel->ccwdev);
  1631. QETH_DBF_TEXT(SETUP, 2, "idxactch");
  1632. iob = qeth_get_buffer(channel);
  1633. iob->callback = idx_reply_cb;
  1634. memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1));
  1635. channel->ccw.count = IDX_ACTIVATE_SIZE;
  1636. channel->ccw.cda = (__u32) __pa(iob->data);
  1637. if (channel == &card->write) {
  1638. memcpy(iob->data, IDX_ACTIVATE_WRITE, IDX_ACTIVATE_SIZE);
  1639. memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
  1640. &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
  1641. card->seqno.trans_hdr++;
  1642. } else {
  1643. memcpy(iob->data, IDX_ACTIVATE_READ, IDX_ACTIVATE_SIZE);
  1644. memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
  1645. &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
  1646. }
  1647. tmp = ((__u8)card->info.portno) | 0x80;
  1648. memcpy(QETH_IDX_ACT_PNO(iob->data), &tmp, 1);
  1649. memcpy(QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
  1650. &card->token.issuer_rm_w, QETH_MPC_TOKEN_LENGTH);
  1651. memcpy(QETH_IDX_ACT_FUNC_LEVEL(iob->data),
  1652. &card->info.func_level, sizeof(__u16));
  1653. ccw_device_get_id(CARD_DDEV(card), &temp_devid);
  1654. memcpy(QETH_IDX_ACT_QDIO_DEV_CUA(iob->data), &temp_devid.devno, 2);
  1655. temp = (card->info.cula << 8) + card->info.unit_addr2;
  1656. memcpy(QETH_IDX_ACT_QDIO_DEV_REALADDR(iob->data), &temp, 2);
  1657. wait_event(card->wait_q,
  1658. atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
  1659. QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
  1660. spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
  1661. rc = ccw_device_start(channel->ccwdev,
  1662. &channel->ccw, (addr_t) iob, 0, 0);
  1663. spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
  1664. if (rc) {
  1665. QETH_DBF_MESSAGE(2, "Error1 in activating channel. rc=%d\n",
  1666. rc);
  1667. QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
  1668. atomic_set(&channel->irq_pending, 0);
  1669. wake_up(&card->wait_q);
  1670. return rc;
  1671. }
  1672. rc = wait_event_interruptible_timeout(card->wait_q,
  1673. channel->state == CH_STATE_ACTIVATING, QETH_TIMEOUT);
  1674. if (rc == -ERESTARTSYS)
  1675. return rc;
  1676. if (channel->state != CH_STATE_ACTIVATING) {
  1677. dev_warn(&channel->ccwdev->dev, "The qeth device driver"
  1678. " failed to recover an error on the device\n");
  1679. QETH_DBF_MESSAGE(2, "%s IDX activate timed out\n",
  1680. dev_name(&channel->ccwdev->dev));
  1681. QETH_DBF_TEXT_(SETUP, 2, "2err%d", -ETIME);
  1682. qeth_clear_cmd_buffers(channel);
  1683. return -ETIME;
  1684. }
  1685. return qeth_idx_activate_get_answer(channel, idx_reply_cb);
  1686. }
  1687. static int qeth_peer_func_level(int level)
  1688. {
  1689. if ((level & 0xff) == 8)
  1690. return (level & 0xff) + 0x400;
  1691. if (((level >> 8) & 3) == 1)
  1692. return (level & 0xff) + 0x200;
  1693. return level;
  1694. }
  1695. static void qeth_idx_write_cb(struct qeth_channel *channel,
  1696. struct qeth_cmd_buffer *iob)
  1697. {
  1698. struct qeth_card *card;
  1699. __u16 temp;
  1700. QETH_DBF_TEXT(SETUP , 2, "idxwrcb");
  1701. if (channel->state == CH_STATE_DOWN) {
  1702. channel->state = CH_STATE_ACTIVATING;
  1703. goto out;
  1704. }
  1705. card = CARD_FROM_CDEV(channel->ccwdev);
  1706. if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
  1707. if (QETH_IDX_ACT_CAUSE_CODE(iob->data) == QETH_IDX_ACT_ERR_EXCL)
  1708. dev_err(&card->write.ccwdev->dev,
  1709. "The adapter is used exclusively by another "
  1710. "host\n");
  1711. else
  1712. QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel:"
  1713. " negative reply\n",
  1714. dev_name(&card->write.ccwdev->dev));
  1715. goto out;
  1716. }
  1717. memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
  1718. if ((temp & ~0x0100) != qeth_peer_func_level(card->info.func_level)) {
  1719. QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel: "
  1720. "function level mismatch (sent: 0x%x, received: "
  1721. "0x%x)\n", dev_name(&card->write.ccwdev->dev),
  1722. card->info.func_level, temp);
  1723. goto out;
  1724. }
  1725. channel->state = CH_STATE_UP;
  1726. out:
  1727. qeth_release_buffer(channel, iob);
  1728. }
  1729. static void qeth_idx_read_cb(struct qeth_channel *channel,
  1730. struct qeth_cmd_buffer *iob)
  1731. {
  1732. struct qeth_card *card;
  1733. __u16 temp;
  1734. QETH_DBF_TEXT(SETUP , 2, "idxrdcb");
  1735. if (channel->state == CH_STATE_DOWN) {
  1736. channel->state = CH_STATE_ACTIVATING;
  1737. goto out;
  1738. }
  1739. card = CARD_FROM_CDEV(channel->ccwdev);
  1740. if (qeth_check_idx_response(card, iob->data))
  1741. goto out;
  1742. if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
  1743. switch (QETH_IDX_ACT_CAUSE_CODE(iob->data)) {
  1744. case QETH_IDX_ACT_ERR_EXCL:
  1745. dev_err(&card->write.ccwdev->dev,
  1746. "The adapter is used exclusively by another "
  1747. "host\n");
  1748. break;
  1749. case QETH_IDX_ACT_ERR_AUTH:
  1750. case QETH_IDX_ACT_ERR_AUTH_USER:
  1751. dev_err(&card->read.ccwdev->dev,
  1752. "Setting the device online failed because of "
  1753. "insufficient authorization\n");
  1754. break;
  1755. default:
  1756. QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel:"
  1757. " negative reply\n",
  1758. dev_name(&card->read.ccwdev->dev));
  1759. }
  1760. QETH_CARD_TEXT_(card, 2, "idxread%c",
  1761. QETH_IDX_ACT_CAUSE_CODE(iob->data));
  1762. goto out;
  1763. }
  1764. /**
  1765. * * temporary fix for microcode bug
  1766. * * to revert it,replace OR by AND
  1767. * */
  1768. if ((!QETH_IDX_NO_PORTNAME_REQUIRED(iob->data)) ||
  1769. (card->info.type == QETH_CARD_TYPE_OSD))
  1770. card->info.portname_required = 1;
  1771. memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
  1772. if (temp != qeth_peer_func_level(card->info.func_level)) {
  1773. QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel: function "
  1774. "level mismatch (sent: 0x%x, received: 0x%x)\n",
  1775. dev_name(&card->read.ccwdev->dev),
  1776. card->info.func_level, temp);
  1777. goto out;
  1778. }
  1779. memcpy(&card->token.issuer_rm_r,
  1780. QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
  1781. QETH_MPC_TOKEN_LENGTH);
  1782. memcpy(&card->info.mcl_level[0],
  1783. QETH_IDX_REPLY_LEVEL(iob->data), QETH_MCL_LENGTH);
  1784. channel->state = CH_STATE_UP;
  1785. out:
  1786. qeth_release_buffer(channel, iob);
  1787. }
  1788. void qeth_prepare_control_data(struct qeth_card *card, int len,
  1789. struct qeth_cmd_buffer *iob)
  1790. {
  1791. qeth_setup_ccw(&card->write, iob->data, len);
  1792. iob->callback = qeth_release_buffer;
  1793. memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
  1794. &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
  1795. card->seqno.trans_hdr++;
  1796. memcpy(QETH_PDU_HEADER_SEQ_NO(iob->data),
  1797. &card->seqno.pdu_hdr, QETH_SEQ_NO_LENGTH);
  1798. card->seqno.pdu_hdr++;
  1799. memcpy(QETH_PDU_HEADER_ACK_SEQ_NO(iob->data),
  1800. &card->seqno.pdu_hdr_ack, QETH_SEQ_NO_LENGTH);
  1801. QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN);
  1802. }
  1803. EXPORT_SYMBOL_GPL(qeth_prepare_control_data);
  1804. int qeth_send_control_data(struct qeth_card *card, int len,
  1805. struct qeth_cmd_buffer *iob,
  1806. int (*reply_cb)(struct qeth_card *, struct qeth_reply *,
  1807. unsigned long),
  1808. void *reply_param)
  1809. {
  1810. int rc;
  1811. unsigned long flags;
  1812. struct qeth_reply *reply = NULL;
  1813. unsigned long timeout, event_timeout;
  1814. struct qeth_ipa_cmd *cmd;
  1815. QETH_CARD_TEXT(card, 2, "sendctl");
  1816. if (card->read_or_write_problem) {
  1817. qeth_release_buffer(iob->channel, iob);
  1818. return -EIO;
  1819. }
  1820. reply = qeth_alloc_reply(card);
  1821. if (!reply) {
  1822. return -ENOMEM;
  1823. }
  1824. reply->callback = reply_cb;
  1825. reply->param = reply_param;
  1826. if (card->state == CARD_STATE_DOWN)
  1827. reply->seqno = QETH_IDX_COMMAND_SEQNO;
  1828. else
  1829. reply->seqno = card->seqno.ipa++;
  1830. init_waitqueue_head(&reply->wait_q);
  1831. spin_lock_irqsave(&card->lock, flags);
  1832. list_add_tail(&reply->list, &card->cmd_waiter_list);
  1833. spin_unlock_irqrestore(&card->lock, flags);
  1834. QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN);
  1835. while (atomic_cmpxchg(&card->write.irq_pending, 0, 1)) ;
  1836. qeth_prepare_control_data(card, len, iob);
  1837. if (IS_IPA(iob->data))
  1838. event_timeout = QETH_IPA_TIMEOUT;
  1839. else
  1840. event_timeout = QETH_TIMEOUT;
  1841. timeout = jiffies + event_timeout;
  1842. QETH_CARD_TEXT(card, 6, "noirqpnd");
  1843. spin_lock_irqsave(get_ccwdev_lock(card->write.ccwdev), flags);
  1844. rc = ccw_device_start(card->write.ccwdev, &card->write.ccw,
  1845. (addr_t) iob, 0, 0);
  1846. spin_unlock_irqrestore(get_ccwdev_lock(card->write.ccwdev), flags);
  1847. if (rc) {
  1848. QETH_DBF_MESSAGE(2, "%s qeth_send_control_data: "
  1849. "ccw_device_start rc = %i\n",
  1850. dev_name(&card->write.ccwdev->dev), rc);
  1851. QETH_CARD_TEXT_(card, 2, " err%d", rc);
  1852. spin_lock_irqsave(&card->lock, flags);
  1853. list_del_init(&reply->list);
  1854. qeth_put_reply(reply);
  1855. spin_unlock_irqrestore(&card->lock, flags);
  1856. qeth_release_buffer(iob->channel, iob);
  1857. atomic_set(&card->write.irq_pending, 0);
  1858. wake_up(&card->wait_q);
  1859. return rc;
  1860. }
  1861. /* we have only one long running ipassist, since we can ensure
  1862. process context of this command we can sleep */
  1863. cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
  1864. if ((cmd->hdr.command == IPA_CMD_SETIP) &&
  1865. (cmd->hdr.prot_version == QETH_PROT_IPV4)) {
  1866. if (!wait_event_timeout(reply->wait_q,
  1867. atomic_read(&reply->received), event_timeout))
  1868. goto time_err;
  1869. } else {
  1870. while (!atomic_read(&reply->received)) {
  1871. if (time_after(jiffies, timeout))
  1872. goto time_err;
  1873. cpu_relax();
  1874. }
  1875. }
  1876. if (reply->rc == -EIO)
  1877. goto error;
  1878. rc = reply->rc;
  1879. qeth_put_reply(reply);
  1880. return rc;
  1881. time_err:
  1882. reply->rc = -ETIME;
  1883. spin_lock_irqsave(&reply->card->lock, flags);
  1884. list_del_init(&reply->list);
  1885. spin_unlock_irqrestore(&reply->card->lock, flags);
  1886. atomic_inc(&reply->received);
  1887. error:
  1888. atomic_set(&card->write.irq_pending, 0);
  1889. qeth_release_buffer(iob->channel, iob);
  1890. card->write.buf_no = (card->write.buf_no + 1) % QETH_CMD_BUFFER_NO;
  1891. rc = reply->rc;
  1892. qeth_put_reply(reply);
  1893. return rc;
  1894. }
  1895. EXPORT_SYMBOL_GPL(qeth_send_control_data);
  1896. static int qeth_cm_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
  1897. unsigned long data)
  1898. {
  1899. struct qeth_cmd_buffer *iob;
  1900. QETH_DBF_TEXT(SETUP, 2, "cmenblcb");
  1901. iob = (struct qeth_cmd_buffer *) data;
  1902. memcpy(&card->token.cm_filter_r,
  1903. QETH_CM_ENABLE_RESP_FILTER_TOKEN(iob->data),
  1904. QETH_MPC_TOKEN_LENGTH);
  1905. QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
  1906. return 0;
  1907. }
  1908. static int qeth_cm_enable(struct qeth_card *card)
  1909. {
  1910. int rc;
  1911. struct qeth_cmd_buffer *iob;
  1912. QETH_DBF_TEXT(SETUP, 2, "cmenable");
  1913. iob = qeth_wait_for_buffer(&card->write);
  1914. memcpy(iob->data, CM_ENABLE, CM_ENABLE_SIZE);
  1915. memcpy(QETH_CM_ENABLE_ISSUER_RM_TOKEN(iob->data),
  1916. &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
  1917. memcpy(QETH_CM_ENABLE_FILTER_TOKEN(iob->data),
  1918. &card->token.cm_filter_w, QETH_MPC_TOKEN_LENGTH);
  1919. rc = qeth_send_control_data(card, CM_ENABLE_SIZE, iob,
  1920. qeth_cm_enable_cb, NULL);
  1921. return rc;
  1922. }
  1923. static int qeth_cm_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
  1924. unsigned long data)
  1925. {
  1926. struct qeth_cmd_buffer *iob;
  1927. QETH_DBF_TEXT(SETUP, 2, "cmsetpcb");
  1928. iob = (struct qeth_cmd_buffer *) data;
  1929. memcpy(&card->token.cm_connection_r,
  1930. QETH_CM_SETUP_RESP_DEST_ADDR(iob->data),
  1931. QETH_MPC_TOKEN_LENGTH);
  1932. QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
  1933. return 0;
  1934. }
  1935. static int qeth_cm_setup(struct qeth_card *card)
  1936. {
  1937. int rc;
  1938. struct qeth_cmd_buffer *iob;
  1939. QETH_DBF_TEXT(SETUP, 2, "cmsetup");
  1940. iob = qeth_wait_for_buffer(&card->write);
  1941. memcpy(iob->data, CM_SETUP, CM_SETUP_SIZE);
  1942. memcpy(QETH_CM_SETUP_DEST_ADDR(iob->data),
  1943. &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
  1944. memcpy(QETH_CM_SETUP_CONNECTION_TOKEN(iob->data),
  1945. &card->token.cm_connection_w, QETH_MPC_TOKEN_LENGTH);
  1946. memcpy(QETH_CM_SETUP_FILTER_TOKEN(iob->data),
  1947. &card->token.cm_filter_r, QETH_MPC_TOKEN_LENGTH);
  1948. rc = qeth_send_control_data(card, CM_SETUP_SIZE, iob,
  1949. qeth_cm_setup_cb, NULL);
  1950. return rc;
  1951. }
  1952. static inline int qeth_get_initial_mtu_for_card(struct qeth_card *card)
  1953. {
  1954. switch (card->info.type) {
  1955. case QETH_CARD_TYPE_UNKNOWN:
  1956. return 1500;
  1957. case QETH_CARD_TYPE_IQD:
  1958. return card->info.max_mtu;
  1959. case QETH_CARD_TYPE_OSD:
  1960. switch (card->info.link_type) {
  1961. case QETH_LINK_TYPE_HSTR:
  1962. case QETH_LINK_TYPE_LANE_TR:
  1963. return 2000;
  1964. default:
  1965. return card->options.layer2 ? 1500 : 1492;
  1966. }
  1967. case QETH_CARD_TYPE_OSM:
  1968. case QETH_CARD_TYPE_OSX:
  1969. return card->options.layer2 ? 1500 : 1492;
  1970. default:
  1971. return 1500;
  1972. }
  1973. }
  1974. static inline int qeth_get_mtu_outof_framesize(int framesize)
  1975. {
  1976. switch (framesize) {
  1977. case 0x4000:
  1978. return 8192;
  1979. case 0x6000:
  1980. return 16384;
  1981. case 0xa000:
  1982. return 32768;
  1983. case 0xffff:
  1984. return 57344;
  1985. default:
  1986. return 0;
  1987. }
  1988. }
  1989. static inline int qeth_mtu_is_valid(struct qeth_card *card, int mtu)
  1990. {
  1991. switch (card->info.type) {
  1992. case QETH_CARD_TYPE_OSD:
  1993. case QETH_CARD_TYPE_OSM:
  1994. case QETH_CARD_TYPE_OSX:
  1995. case QETH_CARD_TYPE_IQD:
  1996. return ((mtu >= 576) &&
  1997. (mtu <= card->info.max_mtu));
  1998. case QETH_CARD_TYPE_OSN:
  1999. case QETH_CARD_TYPE_UNKNOWN:
  2000. default:
  2001. return 1;
  2002. }
  2003. }
  2004. static int qeth_ulp_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
  2005. unsigned long data)
  2006. {
  2007. __u16 mtu, framesize;
  2008. __u16 len;
  2009. __u8 link_type;
  2010. struct qeth_cmd_buffer *iob;
  2011. QETH_DBF_TEXT(SETUP, 2, "ulpenacb");
  2012. iob = (struct qeth_cmd_buffer *) data;
  2013. memcpy(&card->token.ulp_filter_r,
  2014. QETH_ULP_ENABLE_RESP_FILTER_TOKEN(iob->data),
  2015. QETH_MPC_TOKEN_LENGTH);
  2016. if (card->info.type == QETH_CARD_TYPE_IQD) {
  2017. memcpy(&framesize, QETH_ULP_ENABLE_RESP_MAX_MTU(iob->data), 2);
  2018. mtu = qeth_get_mtu_outof_framesize(framesize);
  2019. if (!mtu) {
  2020. iob->rc = -EINVAL;
  2021. QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
  2022. return 0;
  2023. }
  2024. if (card->info.initial_mtu && (card->info.initial_mtu != mtu)) {
  2025. /* frame size has changed */
  2026. if (card->dev &&
  2027. ((card->dev->mtu == card->info.initial_mtu) ||
  2028. (card->dev->mtu > mtu)))
  2029. card->dev->mtu = mtu;
  2030. qeth_free_qdio_buffers(card);
  2031. }
  2032. card->info.initial_mtu = mtu;
  2033. card->info.max_mtu = mtu;
  2034. card->qdio.in_buf_size = mtu + 2 * PAGE_SIZE;
  2035. } else {
  2036. card->info.max_mtu = *(__u16 *)QETH_ULP_ENABLE_RESP_MAX_MTU(
  2037. iob->data);
  2038. card->info.initial_mtu = min(card->info.max_mtu,
  2039. qeth_get_initial_mtu_for_card(card));
  2040. card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
  2041. }
  2042. memcpy(&len, QETH_ULP_ENABLE_RESP_DIFINFO_LEN(iob->data), 2);
  2043. if (len >= QETH_MPC_DIFINFO_LEN_INDICATES_LINK_TYPE) {
  2044. memcpy(&link_type,
  2045. QETH_ULP_ENABLE_RESP_LINK_TYPE(iob->data), 1);
  2046. card->info.link_type = link_type;
  2047. } else
  2048. card->info.link_type = 0;
  2049. QETH_DBF_TEXT_(SETUP, 2, "link%d", card->info.link_type);
  2050. QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
  2051. return 0;
  2052. }
  2053. static int qeth_ulp_enable(struct qeth_card *card)
  2054. {
  2055. int rc;
  2056. char prot_type;
  2057. struct qeth_cmd_buffer *iob;
  2058. /*FIXME: trace view callbacks*/
  2059. QETH_DBF_TEXT(SETUP, 2, "ulpenabl");
  2060. iob = qeth_wait_for_buffer(&card->write);
  2061. memcpy(iob->data, ULP_ENABLE, ULP_ENABLE_SIZE);
  2062. *(QETH_ULP_ENABLE_LINKNUM(iob->data)) =
  2063. (__u8) card->info.portno;
  2064. if (card->options.layer2)
  2065. if (card->info.type == QETH_CARD_TYPE_OSN)
  2066. prot_type = QETH_PROT_OSN2;
  2067. else
  2068. prot_type = QETH_PROT_LAYER2;
  2069. else
  2070. prot_type = QETH_PROT_TCPIP;
  2071. memcpy(QETH_ULP_ENABLE_PROT_TYPE(iob->data), &prot_type, 1);
  2072. memcpy(QETH_ULP_ENABLE_DEST_ADDR(iob->data),
  2073. &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
  2074. memcpy(QETH_ULP_ENABLE_FILTER_TOKEN(iob->data),
  2075. &card->token.ulp_filter_w, QETH_MPC_TOKEN_LENGTH);
  2076. memcpy(QETH_ULP_ENABLE_PORTNAME_AND_LL(iob->data),
  2077. card->info.portname, 9);
  2078. rc = qeth_send_control_data(card, ULP_ENABLE_SIZE, iob,
  2079. qeth_ulp_enable_cb, NULL);
  2080. return rc;
  2081. }
  2082. static int qeth_ulp_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
  2083. unsigned long data)
  2084. {
  2085. struct qeth_cmd_buffer *iob;
  2086. QETH_DBF_TEXT(SETUP, 2, "ulpstpcb");
  2087. iob = (struct qeth_cmd_buffer *) data;
  2088. memcpy(&card->token.ulp_connection_r,
  2089. QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data),
  2090. QETH_MPC_TOKEN_LENGTH);
  2091. if (!strncmp("00S", QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data),
  2092. 3)) {
  2093. QETH_DBF_TEXT(SETUP, 2, "olmlimit");
  2094. dev_err(&card->gdev->dev, "A connection could not be "
  2095. "established because of an OLM limit\n");
  2096. iob->rc = -EMLINK;
  2097. }
  2098. QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
  2099. return 0;
  2100. }
  2101. static int qeth_ulp_setup(struct qeth_card *card)
  2102. {
  2103. int rc;
  2104. __u16 temp;
  2105. struct qeth_cmd_buffer *iob;
  2106. struct ccw_dev_id dev_id;
  2107. QETH_DBF_TEXT(SETUP, 2, "ulpsetup");
  2108. iob = qeth_wait_for_buffer(&card->write);
  2109. memcpy(iob->data, ULP_SETUP, ULP_SETUP_SIZE);
  2110. memcpy(QETH_ULP_SETUP_DEST_ADDR(iob->data),
  2111. &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
  2112. memcpy(QETH_ULP_SETUP_CONNECTION_TOKEN(iob->data),
  2113. &card->token.ulp_connection_w, QETH_MPC_TOKEN_LENGTH);
  2114. memcpy(QETH_ULP_SETUP_FILTER_TOKEN(iob->data),
  2115. &card->token.ulp_filter_r, QETH_MPC_TOKEN_LENGTH);
  2116. ccw_device_get_id(CARD_DDEV(card), &dev_id);
  2117. memcpy(QETH_ULP_SETUP_CUA(iob->data), &dev_id.devno, 2);
  2118. temp = (card->info.cula << 8) + card->info.unit_addr2;
  2119. memcpy(QETH_ULP_SETUP_REAL_DEVADDR(iob->data), &temp, 2);
  2120. rc = qeth_send_control_data(card, ULP_SETUP_SIZE, iob,
  2121. qeth_ulp_setup_cb, NULL);
  2122. return rc;
  2123. }
  2124. static int qeth_init_qdio_out_buf(struct qeth_qdio_out_q *q, int bidx)
  2125. {
  2126. int rc;
  2127. struct qeth_qdio_out_buffer *newbuf;
  2128. rc = 0;
  2129. newbuf = kmem_cache_zalloc(qeth_qdio_outbuf_cache, GFP_ATOMIC);
  2130. if (!newbuf) {
  2131. rc = -ENOMEM;
  2132. goto out;
  2133. }
  2134. newbuf->buffer = q->qdio_bufs[bidx];
  2135. skb_queue_head_init(&newbuf->skb_list);
  2136. lockdep_set_class(&newbuf->skb_list.lock, &qdio_out_skb_queue_key);
  2137. newbuf->q = q;
  2138. newbuf->aob = NULL;
  2139. newbuf->next_pending = q->bufs[bidx];
  2140. atomic_set(&newbuf->state, QETH_QDIO_BUF_EMPTY);
  2141. q->bufs[bidx] = newbuf;
  2142. if (q->bufstates) {
  2143. q->bufstates[bidx].user = newbuf;
  2144. QETH_CARD_TEXT_(q->card, 2, "nbs%d", bidx);
  2145. QETH_CARD_TEXT_(q->card, 2, "%lx", (long) newbuf);
  2146. QETH_CARD_TEXT_(q->card, 2, "%lx",
  2147. (long) newbuf->next_pending);
  2148. }
  2149. out:
  2150. return rc;
  2151. }
  2152. static void qeth_free_qdio_out_buf(struct qeth_qdio_out_q *q)
  2153. {
  2154. if (!q)
  2155. return;
  2156. qdio_free_buffers(q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q);
  2157. kfree(q);
  2158. }
  2159. static struct qeth_qdio_out_q *qeth_alloc_qdio_out_buf(void)
  2160. {
  2161. struct qeth_qdio_out_q *q = kzalloc(sizeof(*q), GFP_KERNEL);
  2162. if (!q)
  2163. return NULL;
  2164. if (qdio_alloc_buffers(q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q)) {
  2165. kfree(q);
  2166. return NULL;
  2167. }
  2168. return q;
  2169. }
  2170. static int qeth_alloc_qdio_buffers(struct qeth_card *card)
  2171. {
  2172. int i, j;
  2173. QETH_DBF_TEXT(SETUP, 2, "allcqdbf");
  2174. if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED,
  2175. QETH_QDIO_ALLOCATED) != QETH_QDIO_UNINITIALIZED)
  2176. return 0;
  2177. QETH_DBF_TEXT(SETUP, 2, "inq");
  2178. card->qdio.in_q = qeth_alloc_qdio_queue();
  2179. if (!card->qdio.in_q)
  2180. goto out_nomem;
  2181. /* inbound buffer pool */
  2182. if (qeth_alloc_buffer_pool(card))
  2183. goto out_freeinq;
  2184. /* outbound */
  2185. card->qdio.out_qs =
  2186. kzalloc(card->qdio.no_out_queues *
  2187. sizeof(struct qeth_qdio_out_q *), GFP_KERNEL);
  2188. if (!card->qdio.out_qs)
  2189. goto out_freepool;
  2190. for (i = 0; i < card->qdio.no_out_queues; ++i) {
  2191. card->qdio.out_qs[i] = qeth_alloc_qdio_out_buf();
  2192. if (!card->qdio.out_qs[i])
  2193. goto out_freeoutq;
  2194. QETH_DBF_TEXT_(SETUP, 2, "outq %i", i);
  2195. QETH_DBF_HEX(SETUP, 2, &card->qdio.out_qs[i], sizeof(void *));
  2196. card->qdio.out_qs[i]->queue_no = i;
  2197. /* give outbound qeth_qdio_buffers their qdio_buffers */
  2198. for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
  2199. WARN_ON(card->qdio.out_qs[i]->bufs[j] != NULL);
  2200. if (qeth_init_qdio_out_buf(card->qdio.out_qs[i], j))
  2201. goto out_freeoutqbufs;
  2202. }
  2203. }
  2204. /* completion */
  2205. if (qeth_alloc_cq(card))
  2206. goto out_freeoutq;
  2207. return 0;
  2208. out_freeoutqbufs:
  2209. while (j > 0) {
  2210. --j;
  2211. kmem_cache_free(qeth_qdio_outbuf_cache,
  2212. card->qdio.out_qs[i]->bufs[j]);
  2213. card->qdio.out_qs[i]->bufs[j] = NULL;
  2214. }
  2215. out_freeoutq:
  2216. while (i > 0) {
  2217. qeth_free_qdio_out_buf(card->qdio.out_qs[--i]);
  2218. qeth_clear_outq_buffers(card->qdio.out_qs[i], 1);
  2219. }
  2220. kfree(card->qdio.out_qs);
  2221. card->qdio.out_qs = NULL;
  2222. out_freepool:
  2223. qeth_free_buffer_pool(card);
  2224. out_freeinq:
  2225. qeth_free_qdio_queue(card->qdio.in_q);
  2226. card->qdio.in_q = NULL;
  2227. out_nomem:
  2228. atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
  2229. return -ENOMEM;
  2230. }
  2231. static void qeth_free_qdio_buffers(struct qeth_card *card)
  2232. {
  2233. int i, j;
  2234. if (atomic_xchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED) ==
  2235. QETH_QDIO_UNINITIALIZED)
  2236. return;
  2237. qeth_free_cq(card);
  2238. cancel_delayed_work_sync(&card->buffer_reclaim_work);
  2239. for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
  2240. if (card->qdio.in_q->bufs[j].rx_skb)
  2241. dev_kfree_skb_any(card->qdio.in_q->bufs[j].rx_skb);
  2242. }
  2243. qeth_free_qdio_queue(card->qdio.in_q);
  2244. card->qdio.in_q = NULL;
  2245. /* inbound buffer pool */
  2246. qeth_free_buffer_pool(card);
  2247. /* free outbound qdio_qs */
  2248. if (card->qdio.out_qs) {
  2249. for (i = 0; i < card->qdio.no_out_queues; ++i) {
  2250. qeth_clear_outq_buffers(card->qdio.out_qs[i], 1);
  2251. qeth_free_qdio_out_buf(card->qdio.out_qs[i]);
  2252. }
  2253. kfree(card->qdio.out_qs);
  2254. card->qdio.out_qs = NULL;
  2255. }
  2256. }
  2257. static void qeth_create_qib_param_field(struct qeth_card *card,
  2258. char *param_field)
  2259. {
  2260. param_field[0] = _ascebc['P'];
  2261. param_field[1] = _ascebc['C'];
  2262. param_field[2] = _ascebc['I'];
  2263. param_field[3] = _ascebc['T'];
  2264. *((unsigned int *) (&param_field[4])) = QETH_PCI_THRESHOLD_A(card);
  2265. *((unsigned int *) (&param_field[8])) = QETH_PCI_THRESHOLD_B(card);
  2266. *((unsigned int *) (&param_field[12])) = QETH_PCI_TIMER_VALUE(card);
  2267. }
  2268. static void qeth_create_qib_param_field_blkt(struct qeth_card *card,
  2269. char *param_field)
  2270. {
  2271. param_field[16] = _ascebc['B'];
  2272. param_field[17] = _ascebc['L'];
  2273. param_field[18] = _ascebc['K'];
  2274. param_field[19] = _ascebc['T'];
  2275. *((unsigned int *) (&param_field[20])) = card->info.blkt.time_total;
  2276. *((unsigned int *) (&param_field[24])) = card->info.blkt.inter_packet;
  2277. *((unsigned int *) (&param_field[28])) =
  2278. card->info.blkt.inter_packet_jumbo;
  2279. }
  2280. static int qeth_qdio_activate(struct qeth_card *card)
  2281. {
  2282. QETH_DBF_TEXT(SETUP, 3, "qdioact");
  2283. return qdio_activate(CARD_DDEV(card));
  2284. }
  2285. static int qeth_dm_act(struct qeth_card *card)
  2286. {
  2287. int rc;
  2288. struct qeth_cmd_buffer *iob;
  2289. QETH_DBF_TEXT(SETUP, 2, "dmact");
  2290. iob = qeth_wait_for_buffer(&card->write);
  2291. memcpy(iob->data, DM_ACT, DM_ACT_SIZE);
  2292. memcpy(QETH_DM_ACT_DEST_ADDR(iob->data),
  2293. &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
  2294. memcpy(QETH_DM_ACT_CONNECTION_TOKEN(iob->data),
  2295. &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
  2296. rc = qeth_send_control_data(card, DM_ACT_SIZE, iob, NULL, NULL);
  2297. return rc;
  2298. }
  2299. static int qeth_mpc_initialize(struct qeth_card *card)
  2300. {
  2301. int rc;
  2302. QETH_DBF_TEXT(SETUP, 2, "mpcinit");
  2303. rc = qeth_issue_next_read(card);
  2304. if (rc) {
  2305. QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
  2306. return rc;
  2307. }
  2308. rc = qeth_cm_enable(card);
  2309. if (rc) {
  2310. QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
  2311. goto out_qdio;
  2312. }
  2313. rc = qeth_cm_setup(card);
  2314. if (rc) {
  2315. QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
  2316. goto out_qdio;
  2317. }
  2318. rc = qeth_ulp_enable(card);
  2319. if (rc) {
  2320. QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
  2321. goto out_qdio;
  2322. }
  2323. rc = qeth_ulp_setup(card);
  2324. if (rc) {
  2325. QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
  2326. goto out_qdio;
  2327. }
  2328. rc = qeth_alloc_qdio_buffers(card);
  2329. if (rc) {
  2330. QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
  2331. goto out_qdio;
  2332. }
  2333. rc = qeth_qdio_establish(card);
  2334. if (rc) {
  2335. QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
  2336. qeth_free_qdio_buffers(card);
  2337. goto out_qdio;
  2338. }
  2339. rc = qeth_qdio_activate(card);
  2340. if (rc) {
  2341. QETH_DBF_TEXT_(SETUP, 2, "7err%d", rc);
  2342. goto out_qdio;
  2343. }
  2344. rc = qeth_dm_act(card);
  2345. if (rc) {
  2346. QETH_DBF_TEXT_(SETUP, 2, "8err%d", rc);
  2347. goto out_qdio;
  2348. }
  2349. return 0;
  2350. out_qdio:
  2351. qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
  2352. qdio_free(CARD_DDEV(card));
  2353. return rc;
  2354. }
  2355. static void qeth_print_status_with_portname(struct qeth_card *card)
  2356. {
  2357. char dbf_text[15];
  2358. int i;
  2359. sprintf(dbf_text, "%s", card->info.portname + 1);
  2360. for (i = 0; i < 8; i++)
  2361. dbf_text[i] =
  2362. (char) _ebcasc[(__u8) dbf_text[i]];
  2363. dbf_text[8] = 0;
  2364. dev_info(&card->gdev->dev, "Device is a%s card%s%s%s\n"
  2365. "with link type %s (portname: %s)\n",
  2366. qeth_get_cardname(card),
  2367. (card->info.mcl_level[0]) ? " (level: " : "",
  2368. (card->info.mcl_level[0]) ? card->info.mcl_level : "",
  2369. (card->info.mcl_level[0]) ? ")" : "",
  2370. qeth_get_cardname_short(card),
  2371. dbf_text);
  2372. }
  2373. static void qeth_print_status_no_portname(struct qeth_card *card)
  2374. {
  2375. if (card->info.portname[0])
  2376. dev_info(&card->gdev->dev, "Device is a%s "
  2377. "card%s%s%s\nwith link type %s "
  2378. "(no portname needed by interface).\n",
  2379. qeth_get_cardname(card),
  2380. (card->info.mcl_level[0]) ? " (level: " : "",
  2381. (card->info.mcl_level[0]) ? card->info.mcl_level : "",
  2382. (card->info.mcl_level[0]) ? ")" : "",
  2383. qeth_get_cardname_short(card));
  2384. else
  2385. dev_info(&card->gdev->dev, "Device is a%s "
  2386. "card%s%s%s\nwith link type %s.\n",
  2387. qeth_get_cardname(card),
  2388. (card->info.mcl_level[0]) ? " (level: " : "",
  2389. (card->info.mcl_level[0]) ? card->info.mcl_level : "",
  2390. (card->info.mcl_level[0]) ? ")" : "",
  2391. qeth_get_cardname_short(card));
  2392. }
  2393. void qeth_print_status_message(struct qeth_card *card)
  2394. {
  2395. switch (card->info.type) {
  2396. case QETH_CARD_TYPE_OSD:
  2397. case QETH_CARD_TYPE_OSM:
  2398. case QETH_CARD_TYPE_OSX:
  2399. /* VM will use a non-zero first character
  2400. * to indicate a HiperSockets like reporting
  2401. * of the level OSA sets the first character to zero
  2402. * */
  2403. if (!card->info.mcl_level[0]) {
  2404. sprintf(card->info.mcl_level, "%02x%02x",
  2405. card->info.mcl_level[2],
  2406. card->info.mcl_level[3]);
  2407. card->info.mcl_level[QETH_MCL_LENGTH] = 0;
  2408. break;
  2409. }
  2410. /* fallthrough */
  2411. case QETH_CARD_TYPE_IQD:
  2412. if ((card->info.guestlan) ||
  2413. (card->info.mcl_level[0] & 0x80)) {
  2414. card->info.mcl_level[0] = (char) _ebcasc[(__u8)
  2415. card->info.mcl_level[0]];
  2416. card->info.mcl_level[1] = (char) _ebcasc[(__u8)
  2417. card->info.mcl_level[1]];
  2418. card->info.mcl_level[2] = (char) _ebcasc[(__u8)
  2419. card->info.mcl_level[2]];
  2420. card->info.mcl_level[3] = (char) _ebcasc[(__u8)
  2421. card->info.mcl_level[3]];
  2422. card->info.mcl_level[QETH_MCL_LENGTH] = 0;
  2423. }
  2424. break;
  2425. default:
  2426. memset(&card->info.mcl_level[0], 0, QETH_MCL_LENGTH + 1);
  2427. }
  2428. if (card->info.portname_required)
  2429. qeth_print_status_with_portname(card);
  2430. else
  2431. qeth_print_status_no_portname(card);
  2432. }
  2433. EXPORT_SYMBOL_GPL(qeth_print_status_message);
  2434. static void qeth_initialize_working_pool_list(struct qeth_card *card)
  2435. {
  2436. struct qeth_buffer_pool_entry *entry;
  2437. QETH_CARD_TEXT(card, 5, "inwrklst");
  2438. list_for_each_entry(entry,
  2439. &card->qdio.init_pool.entry_list, init_list) {
  2440. qeth_put_buffer_pool_entry(card, entry);
  2441. }
  2442. }
  2443. static inline struct qeth_buffer_pool_entry *qeth_find_free_buffer_pool_entry(
  2444. struct qeth_card *card)
  2445. {
  2446. struct list_head *plh;
  2447. struct qeth_buffer_pool_entry *entry;
  2448. int i, free;
  2449. struct page *page;
  2450. if (list_empty(&card->qdio.in_buf_pool.entry_list))
  2451. return NULL;
  2452. list_for_each(plh, &card->qdio.in_buf_pool.entry_list) {
  2453. entry = list_entry(plh, struct qeth_buffer_pool_entry, list);
  2454. free = 1;
  2455. for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
  2456. if (page_count(virt_to_page(entry->elements[i])) > 1) {
  2457. free = 0;
  2458. break;
  2459. }
  2460. }
  2461. if (free) {
  2462. list_del_init(&entry->list);
  2463. return entry;
  2464. }
  2465. }
  2466. /* no free buffer in pool so take first one and swap pages */
  2467. entry = list_entry(card->qdio.in_buf_pool.entry_list.next,
  2468. struct qeth_buffer_pool_entry, list);
  2469. for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
  2470. if (page_count(virt_to_page(entry->elements[i])) > 1) {
  2471. page = alloc_page(GFP_ATOMIC);
  2472. if (!page) {
  2473. return NULL;
  2474. } else {
  2475. free_page((unsigned long)entry->elements[i]);
  2476. entry->elements[i] = page_address(page);
  2477. if (card->options.performance_stats)
  2478. card->perf_stats.sg_alloc_page_rx++;
  2479. }
  2480. }
  2481. }
  2482. list_del_init(&entry->list);
  2483. return entry;
  2484. }
  2485. static int qeth_init_input_buffer(struct qeth_card *card,
  2486. struct qeth_qdio_buffer *buf)
  2487. {
  2488. struct qeth_buffer_pool_entry *pool_entry;
  2489. int i;
  2490. if ((card->options.cq == QETH_CQ_ENABLED) && (!buf->rx_skb)) {
  2491. buf->rx_skb = dev_alloc_skb(QETH_RX_PULL_LEN + ETH_HLEN);
  2492. if (!buf->rx_skb)
  2493. return 1;
  2494. }
  2495. pool_entry = qeth_find_free_buffer_pool_entry(card);
  2496. if (!pool_entry)
  2497. return 1;
  2498. /*
  2499. * since the buffer is accessed only from the input_tasklet
  2500. * there shouldn't be a need to synchronize; also, since we use
  2501. * the QETH_IN_BUF_REQUEUE_THRESHOLD we should never run out off
  2502. * buffers
  2503. */
  2504. buf->pool_entry = pool_entry;
  2505. for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
  2506. buf->buffer->element[i].length = PAGE_SIZE;
  2507. buf->buffer->element[i].addr = pool_entry->elements[i];
  2508. if (i == QETH_MAX_BUFFER_ELEMENTS(card) - 1)
  2509. buf->buffer->element[i].eflags = SBAL_EFLAGS_LAST_ENTRY;
  2510. else
  2511. buf->buffer->element[i].eflags = 0;
  2512. buf->buffer->element[i].sflags = 0;
  2513. }
  2514. return 0;
  2515. }
  2516. int qeth_init_qdio_queues(struct qeth_card *card)
  2517. {
  2518. int i, j;
  2519. int rc;
  2520. QETH_DBF_TEXT(SETUP, 2, "initqdqs");
  2521. /* inbound queue */
  2522. qdio_reset_buffers(card->qdio.in_q->qdio_bufs,
  2523. QDIO_MAX_BUFFERS_PER_Q);
  2524. qeth_initialize_working_pool_list(card);
  2525. /*give only as many buffers to hardware as we have buffer pool entries*/
  2526. for (i = 0; i < card->qdio.in_buf_pool.buf_count - 1; ++i)
  2527. qeth_init_input_buffer(card, &card->qdio.in_q->bufs[i]);
  2528. card->qdio.in_q->next_buf_to_init =
  2529. card->qdio.in_buf_pool.buf_count - 1;
  2530. rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0, 0,
  2531. card->qdio.in_buf_pool.buf_count - 1);
  2532. if (rc) {
  2533. QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
  2534. return rc;
  2535. }
  2536. /* completion */
  2537. rc = qeth_cq_init(card);
  2538. if (rc) {
  2539. return rc;
  2540. }
  2541. /* outbound queue */
  2542. for (i = 0; i < card->qdio.no_out_queues; ++i) {
  2543. qdio_reset_buffers(card->qdio.out_qs[i]->qdio_bufs,
  2544. QDIO_MAX_BUFFERS_PER_Q);
  2545. for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
  2546. qeth_clear_output_buffer(card->qdio.out_qs[i],
  2547. card->qdio.out_qs[i]->bufs[j],
  2548. QETH_QDIO_BUF_EMPTY);
  2549. }
  2550. card->qdio.out_qs[i]->card = card;
  2551. card->qdio.out_qs[i]->next_buf_to_fill = 0;
  2552. card->qdio.out_qs[i]->do_pack = 0;
  2553. atomic_set(&card->qdio.out_qs[i]->used_buffers, 0);
  2554. atomic_set(&card->qdio.out_qs[i]->set_pci_flags_count, 0);
  2555. atomic_set(&card->qdio.out_qs[i]->state,
  2556. QETH_OUT_Q_UNLOCKED);
  2557. }
  2558. return 0;
  2559. }
  2560. EXPORT_SYMBOL_GPL(qeth_init_qdio_queues);
  2561. static inline __u8 qeth_get_ipa_adp_type(enum qeth_link_types link_type)
  2562. {
  2563. switch (link_type) {
  2564. case QETH_LINK_TYPE_HSTR:
  2565. return 2;
  2566. default:
  2567. return 1;
  2568. }
  2569. }
  2570. static void qeth_fill_ipacmd_header(struct qeth_card *card,
  2571. struct qeth_ipa_cmd *cmd, __u8 command,
  2572. enum qeth_prot_versions prot)
  2573. {
  2574. memset(cmd, 0, sizeof(struct qeth_ipa_cmd));
  2575. cmd->hdr.command = command;
  2576. cmd->hdr.initiator = IPA_CMD_INITIATOR_HOST;
  2577. cmd->hdr.seqno = card->seqno.ipa;
  2578. cmd->hdr.adapter_type = qeth_get_ipa_adp_type(card->info.link_type);
  2579. cmd->hdr.rel_adapter_no = (__u8) card->info.portno;
  2580. if (card->options.layer2)
  2581. cmd->hdr.prim_version_no = 2;
  2582. else
  2583. cmd->hdr.prim_version_no = 1;
  2584. cmd->hdr.param_count = 1;
  2585. cmd->hdr.prot_version = prot;
  2586. cmd->hdr.ipa_supported = 0;
  2587. cmd->hdr.ipa_enabled = 0;
  2588. }
  2589. struct qeth_cmd_buffer *qeth_get_ipacmd_buffer(struct qeth_card *card,
  2590. enum qeth_ipa_cmds ipacmd, enum qeth_prot_versions prot)
  2591. {
  2592. struct qeth_cmd_buffer *iob;
  2593. struct qeth_ipa_cmd *cmd;
  2594. iob = qeth_wait_for_buffer(&card->write);
  2595. cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
  2596. qeth_fill_ipacmd_header(card, cmd, ipacmd, prot);
  2597. return iob;
  2598. }
  2599. EXPORT_SYMBOL_GPL(qeth_get_ipacmd_buffer);
  2600. void qeth_prepare_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
  2601. char prot_type)
  2602. {
  2603. memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
  2604. memcpy(QETH_IPA_CMD_PROT_TYPE(iob->data), &prot_type, 1);
  2605. memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
  2606. &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
  2607. }
  2608. EXPORT_SYMBOL_GPL(qeth_prepare_ipa_cmd);
  2609. int qeth_send_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
  2610. int (*reply_cb)(struct qeth_card *, struct qeth_reply*,
  2611. unsigned long),
  2612. void *reply_param)
  2613. {
  2614. int rc;
  2615. char prot_type;
  2616. QETH_CARD_TEXT(card, 4, "sendipa");
  2617. if (card->options.layer2)
  2618. if (card->info.type == QETH_CARD_TYPE_OSN)
  2619. prot_type = QETH_PROT_OSN2;
  2620. else
  2621. prot_type = QETH_PROT_LAYER2;
  2622. else
  2623. prot_type = QETH_PROT_TCPIP;
  2624. qeth_prepare_ipa_cmd(card, iob, prot_type);
  2625. rc = qeth_send_control_data(card, IPA_CMD_LENGTH,
  2626. iob, reply_cb, reply_param);
  2627. if (rc == -ETIME) {
  2628. qeth_clear_ipacmd_list(card);
  2629. qeth_schedule_recovery(card);
  2630. }
  2631. return rc;
  2632. }
  2633. EXPORT_SYMBOL_GPL(qeth_send_ipa_cmd);
  2634. int qeth_send_startlan(struct qeth_card *card)
  2635. {
  2636. int rc;
  2637. struct qeth_cmd_buffer *iob;
  2638. QETH_DBF_TEXT(SETUP, 2, "strtlan");
  2639. iob = qeth_get_ipacmd_buffer(card, IPA_CMD_STARTLAN, 0);
  2640. rc = qeth_send_ipa_cmd(card, iob, NULL, NULL);
  2641. return rc;
  2642. }
  2643. EXPORT_SYMBOL_GPL(qeth_send_startlan);
  2644. static int qeth_default_setadapterparms_cb(struct qeth_card *card,
  2645. struct qeth_reply *reply, unsigned long data)
  2646. {
  2647. struct qeth_ipa_cmd *cmd;
  2648. QETH_CARD_TEXT(card, 4, "defadpcb");
  2649. cmd = (struct qeth_ipa_cmd *) data;
  2650. if (cmd->hdr.return_code == 0)
  2651. cmd->hdr.return_code =
  2652. cmd->data.setadapterparms.hdr.return_code;
  2653. return 0;
  2654. }
  2655. static int qeth_query_setadapterparms_cb(struct qeth_card *card,
  2656. struct qeth_reply *reply, unsigned long data)
  2657. {
  2658. struct qeth_ipa_cmd *cmd;
  2659. QETH_CARD_TEXT(card, 3, "quyadpcb");
  2660. cmd = (struct qeth_ipa_cmd *) data;
  2661. if (cmd->data.setadapterparms.data.query_cmds_supp.lan_type & 0x7f) {
  2662. card->info.link_type =
  2663. cmd->data.setadapterparms.data.query_cmds_supp.lan_type;
  2664. QETH_DBF_TEXT_(SETUP, 2, "lnk %d", card->info.link_type);
  2665. }
  2666. card->options.adp.supported_funcs =
  2667. cmd->data.setadapterparms.data.query_cmds_supp.supported_cmds;
  2668. return qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd);
  2669. }
  2670. static struct qeth_cmd_buffer *qeth_get_adapter_cmd(struct qeth_card *card,
  2671. __u32 command, __u32 cmdlen)
  2672. {
  2673. struct qeth_cmd_buffer *iob;
  2674. struct qeth_ipa_cmd *cmd;
  2675. iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SETADAPTERPARMS,
  2676. QETH_PROT_IPV4);
  2677. cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
  2678. cmd->data.setadapterparms.hdr.cmdlength = cmdlen;
  2679. cmd->data.setadapterparms.hdr.command_code = command;
  2680. cmd->data.setadapterparms.hdr.used_total = 1;
  2681. cmd->data.setadapterparms.hdr.seq_no = 1;
  2682. return iob;
  2683. }
  2684. int qeth_query_setadapterparms(struct qeth_card *card)
  2685. {
  2686. int rc;
  2687. struct qeth_cmd_buffer *iob;
  2688. QETH_CARD_TEXT(card, 3, "queryadp");
  2689. iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_COMMANDS_SUPPORTED,
  2690. sizeof(struct qeth_ipacmd_setadpparms));
  2691. rc = qeth_send_ipa_cmd(card, iob, qeth_query_setadapterparms_cb, NULL);
  2692. return rc;
  2693. }
  2694. EXPORT_SYMBOL_GPL(qeth_query_setadapterparms);
  2695. static int qeth_query_ipassists_cb(struct qeth_card *card,
  2696. struct qeth_reply *reply, unsigned long data)
  2697. {
  2698. struct qeth_ipa_cmd *cmd;
  2699. QETH_DBF_TEXT(SETUP, 2, "qipasscb");
  2700. cmd = (struct qeth_ipa_cmd *) data;
  2701. switch (cmd->hdr.return_code) {
  2702. case IPA_RC_NOTSUPP:
  2703. case IPA_RC_L2_UNSUPPORTED_CMD:
  2704. QETH_DBF_TEXT(SETUP, 2, "ipaunsup");
  2705. card->options.ipa4.supported_funcs |= IPA_SETADAPTERPARMS;
  2706. card->options.ipa6.supported_funcs |= IPA_SETADAPTERPARMS;
  2707. return -0;
  2708. default:
  2709. if (cmd->hdr.return_code) {
  2710. QETH_DBF_MESSAGE(1, "%s IPA_CMD_QIPASSIST: Unhandled "
  2711. "rc=%d\n",
  2712. dev_name(&card->gdev->dev),
  2713. cmd->hdr.return_code);
  2714. return 0;
  2715. }
  2716. }
  2717. if (cmd->hdr.prot_version == QETH_PROT_IPV4) {
  2718. card->options.ipa4.supported_funcs = cmd->hdr.ipa_supported;
  2719. card->options.ipa4.enabled_funcs = cmd->hdr.ipa_enabled;
  2720. } else if (cmd->hdr.prot_version == QETH_PROT_IPV6) {
  2721. card->options.ipa6.supported_funcs = cmd->hdr.ipa_supported;
  2722. card->options.ipa6.enabled_funcs = cmd->hdr.ipa_enabled;
  2723. } else
  2724. QETH_DBF_MESSAGE(1, "%s IPA_CMD_QIPASSIST: Flawed LIC detected"
  2725. "\n", dev_name(&card->gdev->dev));
  2726. return 0;
  2727. }
  2728. int qeth_query_ipassists(struct qeth_card *card, enum qeth_prot_versions prot)
  2729. {
  2730. int rc;
  2731. struct qeth_cmd_buffer *iob;
  2732. QETH_DBF_TEXT_(SETUP, 2, "qipassi%i", prot);
  2733. iob = qeth_get_ipacmd_buffer(card, IPA_CMD_QIPASSIST, prot);
  2734. rc = qeth_send_ipa_cmd(card, iob, qeth_query_ipassists_cb, NULL);
  2735. return rc;
  2736. }
  2737. EXPORT_SYMBOL_GPL(qeth_query_ipassists);
  2738. static int qeth_query_switch_attributes_cb(struct qeth_card *card,
  2739. struct qeth_reply *reply, unsigned long data)
  2740. {
  2741. struct qeth_ipa_cmd *cmd;
  2742. struct qeth_switch_info *sw_info;
  2743. struct qeth_query_switch_attributes *attrs;
  2744. QETH_CARD_TEXT(card, 2, "qswiatcb");
  2745. cmd = (struct qeth_ipa_cmd *) data;
  2746. sw_info = (struct qeth_switch_info *)reply->param;
  2747. if (cmd->data.setadapterparms.hdr.return_code == 0) {
  2748. attrs = &cmd->data.setadapterparms.data.query_switch_attributes;
  2749. sw_info->capabilities = attrs->capabilities;
  2750. sw_info->settings = attrs->settings;
  2751. QETH_CARD_TEXT_(card, 2, "%04x%04x", sw_info->capabilities,
  2752. sw_info->settings);
  2753. }
  2754. qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
  2755. return 0;
  2756. }
  2757. int qeth_query_switch_attributes(struct qeth_card *card,
  2758. struct qeth_switch_info *sw_info)
  2759. {
  2760. struct qeth_cmd_buffer *iob;
  2761. QETH_CARD_TEXT(card, 2, "qswiattr");
  2762. if (!qeth_adp_supported(card, IPA_SETADP_QUERY_SWITCH_ATTRIBUTES))
  2763. return -EOPNOTSUPP;
  2764. if (!netif_carrier_ok(card->dev))
  2765. return -ENOMEDIUM;
  2766. iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_SWITCH_ATTRIBUTES,
  2767. sizeof(struct qeth_ipacmd_setadpparms_hdr));
  2768. return qeth_send_ipa_cmd(card, iob,
  2769. qeth_query_switch_attributes_cb, sw_info);
  2770. }
  2771. EXPORT_SYMBOL_GPL(qeth_query_switch_attributes);
  2772. static int qeth_query_setdiagass_cb(struct qeth_card *card,
  2773. struct qeth_reply *reply, unsigned long data)
  2774. {
  2775. struct qeth_ipa_cmd *cmd;
  2776. __u16 rc;
  2777. cmd = (struct qeth_ipa_cmd *)data;
  2778. rc = cmd->hdr.return_code;
  2779. if (rc)
  2780. QETH_CARD_TEXT_(card, 2, "diagq:%x", rc);
  2781. else
  2782. card->info.diagass_support = cmd->data.diagass.ext;
  2783. return 0;
  2784. }
  2785. static int qeth_query_setdiagass(struct qeth_card *card)
  2786. {
  2787. struct qeth_cmd_buffer *iob;
  2788. struct qeth_ipa_cmd *cmd;
  2789. QETH_DBF_TEXT(SETUP, 2, "qdiagass");
  2790. iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SET_DIAG_ASS, 0);
  2791. cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
  2792. cmd->data.diagass.subcmd_len = 16;
  2793. cmd->data.diagass.subcmd = QETH_DIAGS_CMD_QUERY;
  2794. return qeth_send_ipa_cmd(card, iob, qeth_query_setdiagass_cb, NULL);
  2795. }
  2796. static void qeth_get_trap_id(struct qeth_card *card, struct qeth_trap_id *tid)
  2797. {
  2798. unsigned long info = get_zeroed_page(GFP_KERNEL);
  2799. struct sysinfo_2_2_2 *info222 = (struct sysinfo_2_2_2 *)info;
  2800. struct sysinfo_3_2_2 *info322 = (struct sysinfo_3_2_2 *)info;
  2801. struct ccw_dev_id ccwid;
  2802. int level;
  2803. tid->chpid = card->info.chpid;
  2804. ccw_device_get_id(CARD_RDEV(card), &ccwid);
  2805. tid->ssid = ccwid.ssid;
  2806. tid->devno = ccwid.devno;
  2807. if (!info)
  2808. return;
  2809. level = stsi(NULL, 0, 0, 0);
  2810. if ((level >= 2) && (stsi(info222, 2, 2, 2) == 0))
  2811. tid->lparnr = info222->lpar_number;
  2812. if ((level >= 3) && (stsi(info322, 3, 2, 2) == 0)) {
  2813. EBCASC(info322->vm[0].name, sizeof(info322->vm[0].name));
  2814. memcpy(tid->vmname, info322->vm[0].name, sizeof(tid->vmname));
  2815. }
  2816. free_page(info);
  2817. return;
  2818. }
  2819. static int qeth_hw_trap_cb(struct qeth_card *card,
  2820. struct qeth_reply *reply, unsigned long data)
  2821. {
  2822. struct qeth_ipa_cmd *cmd;
  2823. __u16 rc;
  2824. cmd = (struct qeth_ipa_cmd *)data;
  2825. rc = cmd->hdr.return_code;
  2826. if (rc)
  2827. QETH_CARD_TEXT_(card, 2, "trapc:%x", rc);
  2828. return 0;
  2829. }
  2830. int qeth_hw_trap(struct qeth_card *card, enum qeth_diags_trap_action action)
  2831. {
  2832. struct qeth_cmd_buffer *iob;
  2833. struct qeth_ipa_cmd *cmd;
  2834. QETH_DBF_TEXT(SETUP, 2, "diagtrap");
  2835. iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SET_DIAG_ASS, 0);
  2836. cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
  2837. cmd->data.diagass.subcmd_len = 80;
  2838. cmd->data.diagass.subcmd = QETH_DIAGS_CMD_TRAP;
  2839. cmd->data.diagass.type = 1;
  2840. cmd->data.diagass.action = action;
  2841. switch (action) {
  2842. case QETH_DIAGS_TRAP_ARM:
  2843. cmd->data.diagass.options = 0x0003;
  2844. cmd->data.diagass.ext = 0x00010000 +
  2845. sizeof(struct qeth_trap_id);
  2846. qeth_get_trap_id(card,
  2847. (struct qeth_trap_id *)cmd->data.diagass.cdata);
  2848. break;
  2849. case QETH_DIAGS_TRAP_DISARM:
  2850. cmd->data.diagass.options = 0x0001;
  2851. break;
  2852. case QETH_DIAGS_TRAP_CAPTURE:
  2853. break;
  2854. }
  2855. return qeth_send_ipa_cmd(card, iob, qeth_hw_trap_cb, NULL);
  2856. }
  2857. EXPORT_SYMBOL_GPL(qeth_hw_trap);
  2858. int qeth_check_qdio_errors(struct qeth_card *card, struct qdio_buffer *buf,
  2859. unsigned int qdio_error, const char *dbftext)
  2860. {
  2861. if (qdio_error) {
  2862. QETH_CARD_TEXT(card, 2, dbftext);
  2863. QETH_CARD_TEXT_(card, 2, " F15=%02X",
  2864. buf->element[15].sflags);
  2865. QETH_CARD_TEXT_(card, 2, " F14=%02X",
  2866. buf->element[14].sflags);
  2867. QETH_CARD_TEXT_(card, 2, " qerr=%X", qdio_error);
  2868. if ((buf->element[15].sflags) == 0x12) {
  2869. card->stats.rx_dropped++;
  2870. return 0;
  2871. } else
  2872. return 1;
  2873. }
  2874. return 0;
  2875. }
  2876. EXPORT_SYMBOL_GPL(qeth_check_qdio_errors);
  2877. void qeth_buffer_reclaim_work(struct work_struct *work)
  2878. {
  2879. struct qeth_card *card = container_of(work, struct qeth_card,
  2880. buffer_reclaim_work.work);
  2881. QETH_CARD_TEXT_(card, 2, "brw:%x", card->reclaim_index);
  2882. qeth_queue_input_buffer(card, card->reclaim_index);
  2883. }
  2884. void qeth_queue_input_buffer(struct qeth_card *card, int index)
  2885. {
  2886. struct qeth_qdio_q *queue = card->qdio.in_q;
  2887. struct list_head *lh;
  2888. int count;
  2889. int i;
  2890. int rc;
  2891. int newcount = 0;
  2892. count = (index < queue->next_buf_to_init)?
  2893. card->qdio.in_buf_pool.buf_count -
  2894. (queue->next_buf_to_init - index) :
  2895. card->qdio.in_buf_pool.buf_count -
  2896. (queue->next_buf_to_init + QDIO_MAX_BUFFERS_PER_Q - index);
  2897. /* only requeue at a certain threshold to avoid SIGAs */
  2898. if (count >= QETH_IN_BUF_REQUEUE_THRESHOLD(card)) {
  2899. for (i = queue->next_buf_to_init;
  2900. i < queue->next_buf_to_init + count; ++i) {
  2901. if (qeth_init_input_buffer(card,
  2902. &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q])) {
  2903. break;
  2904. } else {
  2905. newcount++;
  2906. }
  2907. }
  2908. if (newcount < count) {
  2909. /* we are in memory shortage so we switch back to
  2910. traditional skb allocation and drop packages */
  2911. atomic_set(&card->force_alloc_skb, 3);
  2912. count = newcount;
  2913. } else {
  2914. atomic_add_unless(&card->force_alloc_skb, -1, 0);
  2915. }
  2916. if (!count) {
  2917. i = 0;
  2918. list_for_each(lh, &card->qdio.in_buf_pool.entry_list)
  2919. i++;
  2920. if (i == card->qdio.in_buf_pool.buf_count) {
  2921. QETH_CARD_TEXT(card, 2, "qsarbw");
  2922. card->reclaim_index = index;
  2923. schedule_delayed_work(
  2924. &card->buffer_reclaim_work,
  2925. QETH_RECLAIM_WORK_TIME);
  2926. }
  2927. return;
  2928. }
  2929. /*
  2930. * according to old code it should be avoided to requeue all
  2931. * 128 buffers in order to benefit from PCI avoidance.
  2932. * this function keeps at least one buffer (the buffer at
  2933. * 'index') un-requeued -> this buffer is the first buffer that
  2934. * will be requeued the next time
  2935. */
  2936. if (card->options.performance_stats) {
  2937. card->perf_stats.inbound_do_qdio_cnt++;
  2938. card->perf_stats.inbound_do_qdio_start_time =
  2939. qeth_get_micros();
  2940. }
  2941. rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0,
  2942. queue->next_buf_to_init, count);
  2943. if (card->options.performance_stats)
  2944. card->perf_stats.inbound_do_qdio_time +=
  2945. qeth_get_micros() -
  2946. card->perf_stats.inbound_do_qdio_start_time;
  2947. if (rc) {
  2948. QETH_CARD_TEXT(card, 2, "qinberr");
  2949. }
  2950. queue->next_buf_to_init = (queue->next_buf_to_init + count) %
  2951. QDIO_MAX_BUFFERS_PER_Q;
  2952. }
  2953. }
  2954. EXPORT_SYMBOL_GPL(qeth_queue_input_buffer);
  2955. static int qeth_handle_send_error(struct qeth_card *card,
  2956. struct qeth_qdio_out_buffer *buffer, unsigned int qdio_err)
  2957. {
  2958. int sbalf15 = buffer->buffer->element[15].sflags;
  2959. QETH_CARD_TEXT(card, 6, "hdsnderr");
  2960. if (card->info.type == QETH_CARD_TYPE_IQD) {
  2961. if (sbalf15 == 0) {
  2962. qdio_err = 0;
  2963. } else {
  2964. qdio_err = 1;
  2965. }
  2966. }
  2967. qeth_check_qdio_errors(card, buffer->buffer, qdio_err, "qouterr");
  2968. if (!qdio_err)
  2969. return QETH_SEND_ERROR_NONE;
  2970. if ((sbalf15 >= 15) && (sbalf15 <= 31))
  2971. return QETH_SEND_ERROR_RETRY;
  2972. QETH_CARD_TEXT(card, 1, "lnkfail");
  2973. QETH_CARD_TEXT_(card, 1, "%04x %02x",
  2974. (u16)qdio_err, (u8)sbalf15);
  2975. return QETH_SEND_ERROR_LINK_FAILURE;
  2976. }
  2977. /*
  2978. * Switched to packing state if the number of used buffers on a queue
  2979. * reaches a certain limit.
  2980. */
  2981. static void qeth_switch_to_packing_if_needed(struct qeth_qdio_out_q *queue)
  2982. {
  2983. if (!queue->do_pack) {
  2984. if (atomic_read(&queue->used_buffers)
  2985. >= QETH_HIGH_WATERMARK_PACK){
  2986. /* switch non-PACKING -> PACKING */
  2987. QETH_CARD_TEXT(queue->card, 6, "np->pack");
  2988. if (queue->card->options.performance_stats)
  2989. queue->card->perf_stats.sc_dp_p++;
  2990. queue->do_pack = 1;
  2991. }
  2992. }
  2993. }
  2994. /*
  2995. * Switches from packing to non-packing mode. If there is a packing
  2996. * buffer on the queue this buffer will be prepared to be flushed.
  2997. * In that case 1 is returned to inform the caller. If no buffer
  2998. * has to be flushed, zero is returned.
  2999. */
  3000. static int qeth_switch_to_nonpacking_if_needed(struct qeth_qdio_out_q *queue)
  3001. {
  3002. struct qeth_qdio_out_buffer *buffer;
  3003. int flush_count = 0;
  3004. if (queue->do_pack) {
  3005. if (atomic_read(&queue->used_buffers)
  3006. <= QETH_LOW_WATERMARK_PACK) {
  3007. /* switch PACKING -> non-PACKING */
  3008. QETH_CARD_TEXT(queue->card, 6, "pack->np");
  3009. if (queue->card->options.performance_stats)
  3010. queue->card->perf_stats.sc_p_dp++;
  3011. queue->do_pack = 0;
  3012. /* flush packing buffers */
  3013. buffer = queue->bufs[queue->next_buf_to_fill];
  3014. if ((atomic_read(&buffer->state) ==
  3015. QETH_QDIO_BUF_EMPTY) &&
  3016. (buffer->next_element_to_fill > 0)) {
  3017. atomic_set(&buffer->state,
  3018. QETH_QDIO_BUF_PRIMED);
  3019. flush_count++;
  3020. queue->next_buf_to_fill =
  3021. (queue->next_buf_to_fill + 1) %
  3022. QDIO_MAX_BUFFERS_PER_Q;
  3023. }
  3024. }
  3025. }
  3026. return flush_count;
  3027. }
  3028. /*
  3029. * Called to flush a packing buffer if no more pci flags are on the queue.
  3030. * Checks if there is a packing buffer and prepares it to be flushed.
  3031. * In that case returns 1, otherwise zero.
  3032. */
  3033. static int qeth_flush_buffers_on_no_pci(struct qeth_qdio_out_q *queue)
  3034. {
  3035. struct qeth_qdio_out_buffer *buffer;
  3036. buffer = queue->bufs[queue->next_buf_to_fill];
  3037. if ((atomic_read(&buffer->state) == QETH_QDIO_BUF_EMPTY) &&
  3038. (buffer->next_element_to_fill > 0)) {
  3039. /* it's a packing buffer */
  3040. atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED);
  3041. queue->next_buf_to_fill =
  3042. (queue->next_buf_to_fill + 1) % QDIO_MAX_BUFFERS_PER_Q;
  3043. return 1;
  3044. }
  3045. return 0;
  3046. }
  3047. static void qeth_flush_buffers(struct qeth_qdio_out_q *queue, int index,
  3048. int count)
  3049. {
  3050. struct qeth_qdio_out_buffer *buf;
  3051. int rc;
  3052. int i;
  3053. unsigned int qdio_flags;
  3054. for (i = index; i < index + count; ++i) {
  3055. int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
  3056. buf = queue->bufs[bidx];
  3057. buf->buffer->element[buf->next_element_to_fill - 1].eflags |=
  3058. SBAL_EFLAGS_LAST_ENTRY;
  3059. if (queue->bufstates)
  3060. queue->bufstates[bidx].user = buf;
  3061. if (queue->card->info.type == QETH_CARD_TYPE_IQD)
  3062. continue;
  3063. if (!queue->do_pack) {
  3064. if ((atomic_read(&queue->used_buffers) >=
  3065. (QETH_HIGH_WATERMARK_PACK -
  3066. QETH_WATERMARK_PACK_FUZZ)) &&
  3067. !atomic_read(&queue->set_pci_flags_count)) {
  3068. /* it's likely that we'll go to packing
  3069. * mode soon */
  3070. atomic_inc(&queue->set_pci_flags_count);
  3071. buf->buffer->element[0].sflags |= SBAL_SFLAGS0_PCI_REQ;
  3072. }
  3073. } else {
  3074. if (!atomic_read(&queue->set_pci_flags_count)) {
  3075. /*
  3076. * there's no outstanding PCI any more, so we
  3077. * have to request a PCI to be sure the the PCI
  3078. * will wake at some time in the future then we
  3079. * can flush packed buffers that might still be
  3080. * hanging around, which can happen if no
  3081. * further send was requested by the stack
  3082. */
  3083. atomic_inc(&queue->set_pci_flags_count);
  3084. buf->buffer->element[0].sflags |= SBAL_SFLAGS0_PCI_REQ;
  3085. }
  3086. }
  3087. }
  3088. queue->card->dev->trans_start = jiffies;
  3089. if (queue->card->options.performance_stats) {
  3090. queue->card->perf_stats.outbound_do_qdio_cnt++;
  3091. queue->card->perf_stats.outbound_do_qdio_start_time =
  3092. qeth_get_micros();
  3093. }
  3094. qdio_flags = QDIO_FLAG_SYNC_OUTPUT;
  3095. if (atomic_read(&queue->set_pci_flags_count))
  3096. qdio_flags |= QDIO_FLAG_PCI_OUT;
  3097. rc = do_QDIO(CARD_DDEV(queue->card), qdio_flags,
  3098. queue->queue_no, index, count);
  3099. if (queue->card->options.performance_stats)
  3100. queue->card->perf_stats.outbound_do_qdio_time +=
  3101. qeth_get_micros() -
  3102. queue->card->perf_stats.outbound_do_qdio_start_time;
  3103. atomic_add(count, &queue->used_buffers);
  3104. if (rc) {
  3105. queue->card->stats.tx_errors += count;
  3106. /* ignore temporary SIGA errors without busy condition */
  3107. if (rc == -ENOBUFS)
  3108. return;
  3109. QETH_CARD_TEXT(queue->card, 2, "flushbuf");
  3110. QETH_CARD_TEXT_(queue->card, 2, " q%d", queue->queue_no);
  3111. QETH_CARD_TEXT_(queue->card, 2, " idx%d", index);
  3112. QETH_CARD_TEXT_(queue->card, 2, " c%d", count);
  3113. QETH_CARD_TEXT_(queue->card, 2, " err%d", rc);
  3114. /* this must not happen under normal circumstances. if it
  3115. * happens something is really wrong -> recover */
  3116. qeth_schedule_recovery(queue->card);
  3117. return;
  3118. }
  3119. if (queue->card->options.performance_stats)
  3120. queue->card->perf_stats.bufs_sent += count;
  3121. }
  3122. static void qeth_check_outbound_queue(struct qeth_qdio_out_q *queue)
  3123. {
  3124. int index;
  3125. int flush_cnt = 0;
  3126. int q_was_packing = 0;
  3127. /*
  3128. * check if weed have to switch to non-packing mode or if
  3129. * we have to get a pci flag out on the queue
  3130. */
  3131. if ((atomic_read(&queue->used_buffers) <= QETH_LOW_WATERMARK_PACK) ||
  3132. !atomic_read(&queue->set_pci_flags_count)) {
  3133. if (atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH) ==
  3134. QETH_OUT_Q_UNLOCKED) {
  3135. /*
  3136. * If we get in here, there was no action in
  3137. * do_send_packet. So, we check if there is a
  3138. * packing buffer to be flushed here.
  3139. */
  3140. netif_stop_queue(queue->card->dev);
  3141. index = queue->next_buf_to_fill;
  3142. q_was_packing = queue->do_pack;
  3143. /* queue->do_pack may change */
  3144. barrier();
  3145. flush_cnt += qeth_switch_to_nonpacking_if_needed(queue);
  3146. if (!flush_cnt &&
  3147. !atomic_read(&queue->set_pci_flags_count))
  3148. flush_cnt +=
  3149. qeth_flush_buffers_on_no_pci(queue);
  3150. if (queue->card->options.performance_stats &&
  3151. q_was_packing)
  3152. queue->card->perf_stats.bufs_sent_pack +=
  3153. flush_cnt;
  3154. if (flush_cnt)
  3155. qeth_flush_buffers(queue, index, flush_cnt);
  3156. atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
  3157. }
  3158. }
  3159. }
  3160. void qeth_qdio_start_poll(struct ccw_device *ccwdev, int queue,
  3161. unsigned long card_ptr)
  3162. {
  3163. struct qeth_card *card = (struct qeth_card *)card_ptr;
  3164. if (card->dev && (card->dev->flags & IFF_UP))
  3165. napi_schedule(&card->napi);
  3166. }
  3167. EXPORT_SYMBOL_GPL(qeth_qdio_start_poll);
  3168. int qeth_configure_cq(struct qeth_card *card, enum qeth_cq cq)
  3169. {
  3170. int rc;
  3171. if (card->options.cq == QETH_CQ_NOTAVAILABLE) {
  3172. rc = -1;
  3173. goto out;
  3174. } else {
  3175. if (card->options.cq == cq) {
  3176. rc = 0;
  3177. goto out;
  3178. }
  3179. if (card->state != CARD_STATE_DOWN &&
  3180. card->state != CARD_STATE_RECOVER) {
  3181. rc = -1;
  3182. goto out;
  3183. }
  3184. qeth_free_qdio_buffers(card);
  3185. card->options.cq = cq;
  3186. rc = 0;
  3187. }
  3188. out:
  3189. return rc;
  3190. }
  3191. EXPORT_SYMBOL_GPL(qeth_configure_cq);
  3192. static void qeth_qdio_cq_handler(struct qeth_card *card,
  3193. unsigned int qdio_err,
  3194. unsigned int queue, int first_element, int count) {
  3195. struct qeth_qdio_q *cq = card->qdio.c_q;
  3196. int i;
  3197. int rc;
  3198. if (!qeth_is_cq(card, queue))
  3199. goto out;
  3200. QETH_CARD_TEXT_(card, 5, "qcqhe%d", first_element);
  3201. QETH_CARD_TEXT_(card, 5, "qcqhc%d", count);
  3202. QETH_CARD_TEXT_(card, 5, "qcqherr%d", qdio_err);
  3203. if (qdio_err) {
  3204. netif_stop_queue(card->dev);
  3205. qeth_schedule_recovery(card);
  3206. goto out;
  3207. }
  3208. if (card->options.performance_stats) {
  3209. card->perf_stats.cq_cnt++;
  3210. card->perf_stats.cq_start_time = qeth_get_micros();
  3211. }
  3212. for (i = first_element; i < first_element + count; ++i) {
  3213. int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
  3214. struct qdio_buffer *buffer = cq->qdio_bufs[bidx];
  3215. int e;
  3216. e = 0;
  3217. while (buffer->element[e].addr) {
  3218. unsigned long phys_aob_addr;
  3219. phys_aob_addr = (unsigned long) buffer->element[e].addr;
  3220. qeth_qdio_handle_aob(card, phys_aob_addr);
  3221. buffer->element[e].addr = NULL;
  3222. buffer->element[e].eflags = 0;
  3223. buffer->element[e].sflags = 0;
  3224. buffer->element[e].length = 0;
  3225. ++e;
  3226. }
  3227. buffer->element[15].eflags = 0;
  3228. buffer->element[15].sflags = 0;
  3229. }
  3230. rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, queue,
  3231. card->qdio.c_q->next_buf_to_init,
  3232. count);
  3233. if (rc) {
  3234. dev_warn(&card->gdev->dev,
  3235. "QDIO reported an error, rc=%i\n", rc);
  3236. QETH_CARD_TEXT(card, 2, "qcqherr");
  3237. }
  3238. card->qdio.c_q->next_buf_to_init = (card->qdio.c_q->next_buf_to_init
  3239. + count) % QDIO_MAX_BUFFERS_PER_Q;
  3240. netif_wake_queue(card->dev);
  3241. if (card->options.performance_stats) {
  3242. int delta_t = qeth_get_micros();
  3243. delta_t -= card->perf_stats.cq_start_time;
  3244. card->perf_stats.cq_time += delta_t;
  3245. }
  3246. out:
  3247. return;
  3248. }
  3249. void qeth_qdio_input_handler(struct ccw_device *ccwdev, unsigned int qdio_err,
  3250. unsigned int queue, int first_elem, int count,
  3251. unsigned long card_ptr)
  3252. {
  3253. struct qeth_card *card = (struct qeth_card *)card_ptr;
  3254. QETH_CARD_TEXT_(card, 2, "qihq%d", queue);
  3255. QETH_CARD_TEXT_(card, 2, "qiec%d", qdio_err);
  3256. if (qeth_is_cq(card, queue))
  3257. qeth_qdio_cq_handler(card, qdio_err, queue, first_elem, count);
  3258. else if (qdio_err)
  3259. qeth_schedule_recovery(card);
  3260. }
  3261. EXPORT_SYMBOL_GPL(qeth_qdio_input_handler);
  3262. void qeth_qdio_output_handler(struct ccw_device *ccwdev,
  3263. unsigned int qdio_error, int __queue, int first_element,
  3264. int count, unsigned long card_ptr)
  3265. {
  3266. struct qeth_card *card = (struct qeth_card *) card_ptr;
  3267. struct qeth_qdio_out_q *queue = card->qdio.out_qs[__queue];
  3268. struct qeth_qdio_out_buffer *buffer;
  3269. int i;
  3270. QETH_CARD_TEXT(card, 6, "qdouhdl");
  3271. if (qdio_error & QDIO_ERROR_FATAL) {
  3272. QETH_CARD_TEXT(card, 2, "achkcond");
  3273. netif_stop_queue(card->dev);
  3274. qeth_schedule_recovery(card);
  3275. return;
  3276. }
  3277. if (card->options.performance_stats) {
  3278. card->perf_stats.outbound_handler_cnt++;
  3279. card->perf_stats.outbound_handler_start_time =
  3280. qeth_get_micros();
  3281. }
  3282. for (i = first_element; i < (first_element + count); ++i) {
  3283. int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
  3284. buffer = queue->bufs[bidx];
  3285. qeth_handle_send_error(card, buffer, qdio_error);
  3286. if (queue->bufstates &&
  3287. (queue->bufstates[bidx].flags &
  3288. QDIO_OUTBUF_STATE_FLAG_PENDING) != 0) {
  3289. WARN_ON_ONCE(card->options.cq != QETH_CQ_ENABLED);
  3290. if (atomic_cmpxchg(&buffer->state,
  3291. QETH_QDIO_BUF_PRIMED,
  3292. QETH_QDIO_BUF_PENDING) ==
  3293. QETH_QDIO_BUF_PRIMED) {
  3294. qeth_notify_skbs(queue, buffer,
  3295. TX_NOTIFY_PENDING);
  3296. }
  3297. buffer->aob = queue->bufstates[bidx].aob;
  3298. QETH_CARD_TEXT_(queue->card, 5, "pel%d", bidx);
  3299. QETH_CARD_TEXT(queue->card, 5, "aob");
  3300. QETH_CARD_TEXT_(queue->card, 5, "%lx",
  3301. virt_to_phys(buffer->aob));
  3302. if (qeth_init_qdio_out_buf(queue, bidx)) {
  3303. QETH_CARD_TEXT(card, 2, "outofbuf");
  3304. qeth_schedule_recovery(card);
  3305. }
  3306. } else {
  3307. if (card->options.cq == QETH_CQ_ENABLED) {
  3308. enum iucv_tx_notify n;
  3309. n = qeth_compute_cq_notification(
  3310. buffer->buffer->element[15].sflags, 0);
  3311. qeth_notify_skbs(queue, buffer, n);
  3312. }
  3313. qeth_clear_output_buffer(queue, buffer,
  3314. QETH_QDIO_BUF_EMPTY);
  3315. }
  3316. qeth_cleanup_handled_pending(queue, bidx, 0);
  3317. }
  3318. atomic_sub(count, &queue->used_buffers);
  3319. /* check if we need to do something on this outbound queue */
  3320. if (card->info.type != QETH_CARD_TYPE_IQD)
  3321. qeth_check_outbound_queue(queue);
  3322. netif_wake_queue(queue->card->dev);
  3323. if (card->options.performance_stats)
  3324. card->perf_stats.outbound_handler_time += qeth_get_micros() -
  3325. card->perf_stats.outbound_handler_start_time;
  3326. }
  3327. EXPORT_SYMBOL_GPL(qeth_qdio_output_handler);
  3328. /**
  3329. * Note: Function assumes that we have 4 outbound queues.
  3330. */
  3331. int qeth_get_priority_queue(struct qeth_card *card, struct sk_buff *skb,
  3332. int ipv, int cast_type)
  3333. {
  3334. __be16 *tci;
  3335. u8 tos;
  3336. if (cast_type && card->info.is_multicast_different)
  3337. return card->info.is_multicast_different &
  3338. (card->qdio.no_out_queues - 1);
  3339. switch (card->qdio.do_prio_queueing) {
  3340. case QETH_PRIO_Q_ING_TOS:
  3341. case QETH_PRIO_Q_ING_PREC:
  3342. switch (ipv) {
  3343. case 4:
  3344. tos = ipv4_get_dsfield(ip_hdr(skb));
  3345. break;
  3346. case 6:
  3347. tos = ipv6_get_dsfield(ipv6_hdr(skb));
  3348. break;
  3349. default:
  3350. return card->qdio.default_out_queue;
  3351. }
  3352. if (card->qdio.do_prio_queueing == QETH_PRIO_Q_ING_PREC)
  3353. return ~tos >> 6 & 3;
  3354. if (tos & IPTOS_MINCOST)
  3355. return 3;
  3356. if (tos & IPTOS_RELIABILITY)
  3357. return 2;
  3358. if (tos & IPTOS_THROUGHPUT)
  3359. return 1;
  3360. if (tos & IPTOS_LOWDELAY)
  3361. return 0;
  3362. break;
  3363. case QETH_PRIO_Q_ING_SKB:
  3364. if (skb->priority > 5)
  3365. return 0;
  3366. return ~skb->priority >> 1 & 3;
  3367. case QETH_PRIO_Q_ING_VLAN:
  3368. tci = &((struct ethhdr *)skb->data)->h_proto;
  3369. if (*tci == ETH_P_8021Q)
  3370. return ~*(tci + 1) >> (VLAN_PRIO_SHIFT + 1) & 3;
  3371. break;
  3372. default:
  3373. break;
  3374. }
  3375. return card->qdio.default_out_queue;
  3376. }
  3377. EXPORT_SYMBOL_GPL(qeth_get_priority_queue);
  3378. int qeth_get_elements_for_frags(struct sk_buff *skb)
  3379. {
  3380. int cnt, length, e, elements = 0;
  3381. struct skb_frag_struct *frag;
  3382. char *data;
  3383. for (cnt = 0; cnt < skb_shinfo(skb)->nr_frags; cnt++) {
  3384. frag = &skb_shinfo(skb)->frags[cnt];
  3385. data = (char *)page_to_phys(skb_frag_page(frag)) +
  3386. frag->page_offset;
  3387. length = frag->size;
  3388. e = PFN_UP((unsigned long)data + length - 1) -
  3389. PFN_DOWN((unsigned long)data);
  3390. elements += e;
  3391. }
  3392. return elements;
  3393. }
  3394. EXPORT_SYMBOL_GPL(qeth_get_elements_for_frags);
  3395. int qeth_get_elements_no(struct qeth_card *card,
  3396. struct sk_buff *skb, int elems)
  3397. {
  3398. int dlen = skb->len - skb->data_len;
  3399. int elements_needed = PFN_UP((unsigned long)skb->data + dlen - 1) -
  3400. PFN_DOWN((unsigned long)skb->data);
  3401. elements_needed += qeth_get_elements_for_frags(skb);
  3402. if ((elements_needed + elems) > QETH_MAX_BUFFER_ELEMENTS(card)) {
  3403. QETH_DBF_MESSAGE(2, "Invalid size of IP packet "
  3404. "(Number=%d / Length=%d). Discarded.\n",
  3405. (elements_needed+elems), skb->len);
  3406. return 0;
  3407. }
  3408. return elements_needed;
  3409. }
  3410. EXPORT_SYMBOL_GPL(qeth_get_elements_no);
  3411. int qeth_hdr_chk_and_bounce(struct sk_buff *skb, struct qeth_hdr **hdr, int len)
  3412. {
  3413. int hroom, inpage, rest;
  3414. if (((unsigned long)skb->data & PAGE_MASK) !=
  3415. (((unsigned long)skb->data + len - 1) & PAGE_MASK)) {
  3416. hroom = skb_headroom(skb);
  3417. inpage = PAGE_SIZE - ((unsigned long) skb->data % PAGE_SIZE);
  3418. rest = len - inpage;
  3419. if (rest > hroom)
  3420. return 1;
  3421. memmove(skb->data - rest, skb->data, skb->len - skb->data_len);
  3422. skb->data -= rest;
  3423. skb->tail -= rest;
  3424. *hdr = (struct qeth_hdr *)skb->data;
  3425. QETH_DBF_MESSAGE(2, "skb bounce len: %d rest: %d\n", len, rest);
  3426. }
  3427. return 0;
  3428. }
  3429. EXPORT_SYMBOL_GPL(qeth_hdr_chk_and_bounce);
  3430. static inline void __qeth_fill_buffer(struct sk_buff *skb,
  3431. struct qdio_buffer *buffer, int is_tso, int *next_element_to_fill,
  3432. int offset)
  3433. {
  3434. int length = skb->len - skb->data_len;
  3435. int length_here;
  3436. int element;
  3437. char *data;
  3438. int first_lap, cnt;
  3439. struct skb_frag_struct *frag;
  3440. element = *next_element_to_fill;
  3441. data = skb->data;
  3442. first_lap = (is_tso == 0 ? 1 : 0);
  3443. if (offset >= 0) {
  3444. data = skb->data + offset;
  3445. length -= offset;
  3446. first_lap = 0;
  3447. }
  3448. while (length > 0) {
  3449. /* length_here is the remaining amount of data in this page */
  3450. length_here = PAGE_SIZE - ((unsigned long) data % PAGE_SIZE);
  3451. if (length < length_here)
  3452. length_here = length;
  3453. buffer->element[element].addr = data;
  3454. buffer->element[element].length = length_here;
  3455. length -= length_here;
  3456. if (!length) {
  3457. if (first_lap)
  3458. if (skb_shinfo(skb)->nr_frags)
  3459. buffer->element[element].eflags =
  3460. SBAL_EFLAGS_FIRST_FRAG;
  3461. else
  3462. buffer->element[element].eflags = 0;
  3463. else
  3464. buffer->element[element].eflags =
  3465. SBAL_EFLAGS_MIDDLE_FRAG;
  3466. } else {
  3467. if (first_lap)
  3468. buffer->element[element].eflags =
  3469. SBAL_EFLAGS_FIRST_FRAG;
  3470. else
  3471. buffer->element[element].eflags =
  3472. SBAL_EFLAGS_MIDDLE_FRAG;
  3473. }
  3474. data += length_here;
  3475. element++;
  3476. first_lap = 0;
  3477. }
  3478. for (cnt = 0; cnt < skb_shinfo(skb)->nr_frags; cnt++) {
  3479. frag = &skb_shinfo(skb)->frags[cnt];
  3480. data = (char *)page_to_phys(skb_frag_page(frag)) +
  3481. frag->page_offset;
  3482. length = frag->size;
  3483. while (length > 0) {
  3484. length_here = PAGE_SIZE -
  3485. ((unsigned long) data % PAGE_SIZE);
  3486. if (length < length_here)
  3487. length_here = length;
  3488. buffer->element[element].addr = data;
  3489. buffer->element[element].length = length_here;
  3490. buffer->element[element].eflags =
  3491. SBAL_EFLAGS_MIDDLE_FRAG;
  3492. length -= length_here;
  3493. data += length_here;
  3494. element++;
  3495. }
  3496. }
  3497. if (buffer->element[element - 1].eflags)
  3498. buffer->element[element - 1].eflags = SBAL_EFLAGS_LAST_FRAG;
  3499. *next_element_to_fill = element;
  3500. }
  3501. static inline int qeth_fill_buffer(struct qeth_qdio_out_q *queue,
  3502. struct qeth_qdio_out_buffer *buf, struct sk_buff *skb,
  3503. struct qeth_hdr *hdr, int offset, int hd_len)
  3504. {
  3505. struct qdio_buffer *buffer;
  3506. int flush_cnt = 0, hdr_len, large_send = 0;
  3507. buffer = buf->buffer;
  3508. atomic_inc(&skb->users);
  3509. skb_queue_tail(&buf->skb_list, skb);
  3510. /*check first on TSO ....*/
  3511. if (hdr->hdr.l3.id == QETH_HEADER_TYPE_TSO) {
  3512. int element = buf->next_element_to_fill;
  3513. hdr_len = sizeof(struct qeth_hdr_tso) +
  3514. ((struct qeth_hdr_tso *)hdr)->ext.dg_hdr_len;
  3515. /*fill first buffer entry only with header information */
  3516. buffer->element[element].addr = skb->data;
  3517. buffer->element[element].length = hdr_len;
  3518. buffer->element[element].eflags = SBAL_EFLAGS_FIRST_FRAG;
  3519. buf->next_element_to_fill++;
  3520. skb->data += hdr_len;
  3521. skb->len -= hdr_len;
  3522. large_send = 1;
  3523. }
  3524. if (offset >= 0) {
  3525. int element = buf->next_element_to_fill;
  3526. buffer->element[element].addr = hdr;
  3527. buffer->element[element].length = sizeof(struct qeth_hdr) +
  3528. hd_len;
  3529. buffer->element[element].eflags = SBAL_EFLAGS_FIRST_FRAG;
  3530. buf->is_header[element] = 1;
  3531. buf->next_element_to_fill++;
  3532. }
  3533. __qeth_fill_buffer(skb, buffer, large_send,
  3534. (int *)&buf->next_element_to_fill, offset);
  3535. if (!queue->do_pack) {
  3536. QETH_CARD_TEXT(queue->card, 6, "fillbfnp");
  3537. /* set state to PRIMED -> will be flushed */
  3538. atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
  3539. flush_cnt = 1;
  3540. } else {
  3541. QETH_CARD_TEXT(queue->card, 6, "fillbfpa");
  3542. if (queue->card->options.performance_stats)
  3543. queue->card->perf_stats.skbs_sent_pack++;
  3544. if (buf->next_element_to_fill >=
  3545. QETH_MAX_BUFFER_ELEMENTS(queue->card)) {
  3546. /*
  3547. * packed buffer if full -> set state PRIMED
  3548. * -> will be flushed
  3549. */
  3550. atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
  3551. flush_cnt = 1;
  3552. }
  3553. }
  3554. return flush_cnt;
  3555. }
  3556. int qeth_do_send_packet_fast(struct qeth_card *card,
  3557. struct qeth_qdio_out_q *queue, struct sk_buff *skb,
  3558. struct qeth_hdr *hdr, int elements_needed,
  3559. int offset, int hd_len)
  3560. {
  3561. struct qeth_qdio_out_buffer *buffer;
  3562. int index;
  3563. /* spin until we get the queue ... */
  3564. while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED,
  3565. QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED);
  3566. /* ... now we've got the queue */
  3567. index = queue->next_buf_to_fill;
  3568. buffer = queue->bufs[queue->next_buf_to_fill];
  3569. /*
  3570. * check if buffer is empty to make sure that we do not 'overtake'
  3571. * ourselves and try to fill a buffer that is already primed
  3572. */
  3573. if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY)
  3574. goto out;
  3575. queue->next_buf_to_fill = (queue->next_buf_to_fill + 1) %
  3576. QDIO_MAX_BUFFERS_PER_Q;
  3577. atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
  3578. qeth_fill_buffer(queue, buffer, skb, hdr, offset, hd_len);
  3579. qeth_flush_buffers(queue, index, 1);
  3580. return 0;
  3581. out:
  3582. atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
  3583. return -EBUSY;
  3584. }
  3585. EXPORT_SYMBOL_GPL(qeth_do_send_packet_fast);
  3586. int qeth_do_send_packet(struct qeth_card *card, struct qeth_qdio_out_q *queue,
  3587. struct sk_buff *skb, struct qeth_hdr *hdr,
  3588. int elements_needed)
  3589. {
  3590. struct qeth_qdio_out_buffer *buffer;
  3591. int start_index;
  3592. int flush_count = 0;
  3593. int do_pack = 0;
  3594. int tmp;
  3595. int rc = 0;
  3596. /* spin until we get the queue ... */
  3597. while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED,
  3598. QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED);
  3599. start_index = queue->next_buf_to_fill;
  3600. buffer = queue->bufs[queue->next_buf_to_fill];
  3601. /*
  3602. * check if buffer is empty to make sure that we do not 'overtake'
  3603. * ourselves and try to fill a buffer that is already primed
  3604. */
  3605. if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY) {
  3606. atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
  3607. return -EBUSY;
  3608. }
  3609. /* check if we need to switch packing state of this queue */
  3610. qeth_switch_to_packing_if_needed(queue);
  3611. if (queue->do_pack) {
  3612. do_pack = 1;
  3613. /* does packet fit in current buffer? */
  3614. if ((QETH_MAX_BUFFER_ELEMENTS(card) -
  3615. buffer->next_element_to_fill) < elements_needed) {
  3616. /* ... no -> set state PRIMED */
  3617. atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED);
  3618. flush_count++;
  3619. queue->next_buf_to_fill =
  3620. (queue->next_buf_to_fill + 1) %
  3621. QDIO_MAX_BUFFERS_PER_Q;
  3622. buffer = queue->bufs[queue->next_buf_to_fill];
  3623. /* we did a step forward, so check buffer state
  3624. * again */
  3625. if (atomic_read(&buffer->state) !=
  3626. QETH_QDIO_BUF_EMPTY) {
  3627. qeth_flush_buffers(queue, start_index,
  3628. flush_count);
  3629. atomic_set(&queue->state,
  3630. QETH_OUT_Q_UNLOCKED);
  3631. return -EBUSY;
  3632. }
  3633. }
  3634. }
  3635. tmp = qeth_fill_buffer(queue, buffer, skb, hdr, -1, 0);
  3636. queue->next_buf_to_fill = (queue->next_buf_to_fill + tmp) %
  3637. QDIO_MAX_BUFFERS_PER_Q;
  3638. flush_count += tmp;
  3639. if (flush_count)
  3640. qeth_flush_buffers(queue, start_index, flush_count);
  3641. else if (!atomic_read(&queue->set_pci_flags_count))
  3642. atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH);
  3643. /*
  3644. * queue->state will go from LOCKED -> UNLOCKED or from
  3645. * LOCKED_FLUSH -> LOCKED if output_handler wanted to 'notify' us
  3646. * (switch packing state or flush buffer to get another pci flag out).
  3647. * In that case we will enter this loop
  3648. */
  3649. while (atomic_dec_return(&queue->state)) {
  3650. flush_count = 0;
  3651. start_index = queue->next_buf_to_fill;
  3652. /* check if we can go back to non-packing state */
  3653. flush_count += qeth_switch_to_nonpacking_if_needed(queue);
  3654. /*
  3655. * check if we need to flush a packing buffer to get a pci
  3656. * flag out on the queue
  3657. */
  3658. if (!flush_count && !atomic_read(&queue->set_pci_flags_count))
  3659. flush_count += qeth_flush_buffers_on_no_pci(queue);
  3660. if (flush_count)
  3661. qeth_flush_buffers(queue, start_index, flush_count);
  3662. }
  3663. /* at this point the queue is UNLOCKED again */
  3664. if (queue->card->options.performance_stats && do_pack)
  3665. queue->card->perf_stats.bufs_sent_pack += flush_count;
  3666. return rc;
  3667. }
  3668. EXPORT_SYMBOL_GPL(qeth_do_send_packet);
  3669. static int qeth_setadp_promisc_mode_cb(struct qeth_card *card,
  3670. struct qeth_reply *reply, unsigned long data)
  3671. {
  3672. struct qeth_ipa_cmd *cmd;
  3673. struct qeth_ipacmd_setadpparms *setparms;
  3674. QETH_CARD_TEXT(card, 4, "prmadpcb");
  3675. cmd = (struct qeth_ipa_cmd *) data;
  3676. setparms = &(cmd->data.setadapterparms);
  3677. qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd);
  3678. if (cmd->hdr.return_code) {
  3679. QETH_CARD_TEXT_(card, 4, "prmrc%2.2x", cmd->hdr.return_code);
  3680. setparms->data.mode = SET_PROMISC_MODE_OFF;
  3681. }
  3682. card->info.promisc_mode = setparms->data.mode;
  3683. return 0;
  3684. }
  3685. void qeth_setadp_promisc_mode(struct qeth_card *card)
  3686. {
  3687. enum qeth_ipa_promisc_modes mode;
  3688. struct net_device *dev = card->dev;
  3689. struct qeth_cmd_buffer *iob;
  3690. struct qeth_ipa_cmd *cmd;
  3691. QETH_CARD_TEXT(card, 4, "setprom");
  3692. if (((dev->flags & IFF_PROMISC) &&
  3693. (card->info.promisc_mode == SET_PROMISC_MODE_ON)) ||
  3694. (!(dev->flags & IFF_PROMISC) &&
  3695. (card->info.promisc_mode == SET_PROMISC_MODE_OFF)))
  3696. return;
  3697. mode = SET_PROMISC_MODE_OFF;
  3698. if (dev->flags & IFF_PROMISC)
  3699. mode = SET_PROMISC_MODE_ON;
  3700. QETH_CARD_TEXT_(card, 4, "mode:%x", mode);
  3701. iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_PROMISC_MODE,
  3702. sizeof(struct qeth_ipacmd_setadpparms));
  3703. cmd = (struct qeth_ipa_cmd *)(iob->data + IPA_PDU_HEADER_SIZE);
  3704. cmd->data.setadapterparms.data.mode = mode;
  3705. qeth_send_ipa_cmd(card, iob, qeth_setadp_promisc_mode_cb, NULL);
  3706. }
  3707. EXPORT_SYMBOL_GPL(qeth_setadp_promisc_mode);
  3708. int qeth_change_mtu(struct net_device *dev, int new_mtu)
  3709. {
  3710. struct qeth_card *card;
  3711. char dbf_text[15];
  3712. card = dev->ml_priv;
  3713. QETH_CARD_TEXT(card, 4, "chgmtu");
  3714. sprintf(dbf_text, "%8x", new_mtu);
  3715. QETH_CARD_TEXT(card, 4, dbf_text);
  3716. if (new_mtu < 64)
  3717. return -EINVAL;
  3718. if (new_mtu > 65535)
  3719. return -EINVAL;
  3720. if ((!qeth_is_supported(card, IPA_IP_FRAGMENTATION)) &&
  3721. (!qeth_mtu_is_valid(card, new_mtu)))
  3722. return -EINVAL;
  3723. dev->mtu = new_mtu;
  3724. return 0;
  3725. }
  3726. EXPORT_SYMBOL_GPL(qeth_change_mtu);
  3727. struct net_device_stats *qeth_get_stats(struct net_device *dev)
  3728. {
  3729. struct qeth_card *card;
  3730. card = dev->ml_priv;
  3731. QETH_CARD_TEXT(card, 5, "getstat");
  3732. return &card->stats;
  3733. }
  3734. EXPORT_SYMBOL_GPL(qeth_get_stats);
  3735. static int qeth_setadpparms_change_macaddr_cb(struct qeth_card *card,
  3736. struct qeth_reply *reply, unsigned long data)
  3737. {
  3738. struct qeth_ipa_cmd *cmd;
  3739. QETH_CARD_TEXT(card, 4, "chgmaccb");
  3740. cmd = (struct qeth_ipa_cmd *) data;
  3741. if (!card->options.layer2 ||
  3742. !(card->info.mac_bits & QETH_LAYER2_MAC_READ)) {
  3743. memcpy(card->dev->dev_addr,
  3744. &cmd->data.setadapterparms.data.change_addr.addr,
  3745. OSA_ADDR_LEN);
  3746. card->info.mac_bits |= QETH_LAYER2_MAC_READ;
  3747. }
  3748. qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
  3749. return 0;
  3750. }
  3751. int qeth_setadpparms_change_macaddr(struct qeth_card *card)
  3752. {
  3753. int rc;
  3754. struct qeth_cmd_buffer *iob;
  3755. struct qeth_ipa_cmd *cmd;
  3756. QETH_CARD_TEXT(card, 4, "chgmac");
  3757. iob = qeth_get_adapter_cmd(card, IPA_SETADP_ALTER_MAC_ADDRESS,
  3758. sizeof(struct qeth_ipacmd_setadpparms));
  3759. cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
  3760. cmd->data.setadapterparms.data.change_addr.cmd = CHANGE_ADDR_READ_MAC;
  3761. cmd->data.setadapterparms.data.change_addr.addr_size = OSA_ADDR_LEN;
  3762. memcpy(&cmd->data.setadapterparms.data.change_addr.addr,
  3763. card->dev->dev_addr, OSA_ADDR_LEN);
  3764. rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_change_macaddr_cb,
  3765. NULL);
  3766. return rc;
  3767. }
  3768. EXPORT_SYMBOL_GPL(qeth_setadpparms_change_macaddr);
  3769. static int qeth_setadpparms_set_access_ctrl_cb(struct qeth_card *card,
  3770. struct qeth_reply *reply, unsigned long data)
  3771. {
  3772. struct qeth_ipa_cmd *cmd;
  3773. struct qeth_set_access_ctrl *access_ctrl_req;
  3774. int fallback = *(int *)reply->param;
  3775. QETH_CARD_TEXT(card, 4, "setaccb");
  3776. cmd = (struct qeth_ipa_cmd *) data;
  3777. access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl;
  3778. QETH_DBF_TEXT_(SETUP, 2, "setaccb");
  3779. QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name);
  3780. QETH_DBF_TEXT_(SETUP, 2, "rc=%d",
  3781. cmd->data.setadapterparms.hdr.return_code);
  3782. if (cmd->data.setadapterparms.hdr.return_code !=
  3783. SET_ACCESS_CTRL_RC_SUCCESS)
  3784. QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_CTRL(%s,%d)==%d\n",
  3785. card->gdev->dev.kobj.name,
  3786. access_ctrl_req->subcmd_code,
  3787. cmd->data.setadapterparms.hdr.return_code);
  3788. switch (cmd->data.setadapterparms.hdr.return_code) {
  3789. case SET_ACCESS_CTRL_RC_SUCCESS:
  3790. if (card->options.isolation == ISOLATION_MODE_NONE) {
  3791. dev_info(&card->gdev->dev,
  3792. "QDIO data connection isolation is deactivated\n");
  3793. } else {
  3794. dev_info(&card->gdev->dev,
  3795. "QDIO data connection isolation is activated\n");
  3796. }
  3797. break;
  3798. case SET_ACCESS_CTRL_RC_ALREADY_NOT_ISOLATED:
  3799. QETH_DBF_MESSAGE(2, "%s QDIO data connection isolation already "
  3800. "deactivated\n", dev_name(&card->gdev->dev));
  3801. if (fallback)
  3802. card->options.isolation = card->options.prev_isolation;
  3803. break;
  3804. case SET_ACCESS_CTRL_RC_ALREADY_ISOLATED:
  3805. QETH_DBF_MESSAGE(2, "%s QDIO data connection isolation already"
  3806. " activated\n", dev_name(&card->gdev->dev));
  3807. if (fallback)
  3808. card->options.isolation = card->options.prev_isolation;
  3809. break;
  3810. case SET_ACCESS_CTRL_RC_NOT_SUPPORTED:
  3811. dev_err(&card->gdev->dev, "Adapter does not "
  3812. "support QDIO data connection isolation\n");
  3813. break;
  3814. case SET_ACCESS_CTRL_RC_NONE_SHARED_ADAPTER:
  3815. dev_err(&card->gdev->dev,
  3816. "Adapter is dedicated. "
  3817. "QDIO data connection isolation not supported\n");
  3818. if (fallback)
  3819. card->options.isolation = card->options.prev_isolation;
  3820. break;
  3821. case SET_ACCESS_CTRL_RC_ACTIVE_CHECKSUM_OFF:
  3822. dev_err(&card->gdev->dev,
  3823. "TSO does not permit QDIO data connection isolation\n");
  3824. if (fallback)
  3825. card->options.isolation = card->options.prev_isolation;
  3826. break;
  3827. case SET_ACCESS_CTRL_RC_REFLREL_UNSUPPORTED:
  3828. dev_err(&card->gdev->dev, "The adjacent switch port does not "
  3829. "support reflective relay mode\n");
  3830. if (fallback)
  3831. card->options.isolation = card->options.prev_isolation;
  3832. break;
  3833. case SET_ACCESS_CTRL_RC_REFLREL_FAILED:
  3834. dev_err(&card->gdev->dev, "The reflective relay mode cannot be "
  3835. "enabled at the adjacent switch port");
  3836. if (fallback)
  3837. card->options.isolation = card->options.prev_isolation;
  3838. break;
  3839. case SET_ACCESS_CTRL_RC_REFLREL_DEACT_FAILED:
  3840. dev_warn(&card->gdev->dev, "Turning off reflective relay mode "
  3841. "at the adjacent switch failed\n");
  3842. break;
  3843. default:
  3844. /* this should never happen */
  3845. if (fallback)
  3846. card->options.isolation = card->options.prev_isolation;
  3847. break;
  3848. }
  3849. qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
  3850. return 0;
  3851. }
  3852. static int qeth_setadpparms_set_access_ctrl(struct qeth_card *card,
  3853. enum qeth_ipa_isolation_modes isolation, int fallback)
  3854. {
  3855. int rc;
  3856. struct qeth_cmd_buffer *iob;
  3857. struct qeth_ipa_cmd *cmd;
  3858. struct qeth_set_access_ctrl *access_ctrl_req;
  3859. QETH_CARD_TEXT(card, 4, "setacctl");
  3860. QETH_DBF_TEXT_(SETUP, 2, "setacctl");
  3861. QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name);
  3862. iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_ACCESS_CONTROL,
  3863. sizeof(struct qeth_ipacmd_setadpparms_hdr) +
  3864. sizeof(struct qeth_set_access_ctrl));
  3865. cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
  3866. access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl;
  3867. access_ctrl_req->subcmd_code = isolation;
  3868. rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_set_access_ctrl_cb,
  3869. &fallback);
  3870. QETH_DBF_TEXT_(SETUP, 2, "rc=%d", rc);
  3871. return rc;
  3872. }
  3873. int qeth_set_access_ctrl_online(struct qeth_card *card, int fallback)
  3874. {
  3875. int rc = 0;
  3876. QETH_CARD_TEXT(card, 4, "setactlo");
  3877. if ((card->info.type == QETH_CARD_TYPE_OSD ||
  3878. card->info.type == QETH_CARD_TYPE_OSX) &&
  3879. qeth_adp_supported(card, IPA_SETADP_SET_ACCESS_CONTROL)) {
  3880. rc = qeth_setadpparms_set_access_ctrl(card,
  3881. card->options.isolation, fallback);
  3882. if (rc) {
  3883. QETH_DBF_MESSAGE(3,
  3884. "IPA(SET_ACCESS_CTRL,%s,%d) sent failed\n",
  3885. card->gdev->dev.kobj.name,
  3886. rc);
  3887. rc = -EOPNOTSUPP;
  3888. }
  3889. } else if (card->options.isolation != ISOLATION_MODE_NONE) {
  3890. card->options.isolation = ISOLATION_MODE_NONE;
  3891. dev_err(&card->gdev->dev, "Adapter does not "
  3892. "support QDIO data connection isolation\n");
  3893. rc = -EOPNOTSUPP;
  3894. }
  3895. return rc;
  3896. }
  3897. EXPORT_SYMBOL_GPL(qeth_set_access_ctrl_online);
  3898. void qeth_tx_timeout(struct net_device *dev)
  3899. {
  3900. struct qeth_card *card;
  3901. card = dev->ml_priv;
  3902. QETH_CARD_TEXT(card, 4, "txtimeo");
  3903. card->stats.tx_errors++;
  3904. qeth_schedule_recovery(card);
  3905. }
  3906. EXPORT_SYMBOL_GPL(qeth_tx_timeout);
  3907. int qeth_mdio_read(struct net_device *dev, int phy_id, int regnum)
  3908. {
  3909. struct qeth_card *card = dev->ml_priv;
  3910. int rc = 0;
  3911. switch (regnum) {
  3912. case MII_BMCR: /* Basic mode control register */
  3913. rc = BMCR_FULLDPLX;
  3914. if ((card->info.link_type != QETH_LINK_TYPE_GBIT_ETH) &&
  3915. (card->info.link_type != QETH_LINK_TYPE_OSN) &&
  3916. (card->info.link_type != QETH_LINK_TYPE_10GBIT_ETH))
  3917. rc |= BMCR_SPEED100;
  3918. break;
  3919. case MII_BMSR: /* Basic mode status register */
  3920. rc = BMSR_ERCAP | BMSR_ANEGCOMPLETE | BMSR_LSTATUS |
  3921. BMSR_10HALF | BMSR_10FULL | BMSR_100HALF | BMSR_100FULL |
  3922. BMSR_100BASE4;
  3923. break;
  3924. case MII_PHYSID1: /* PHYS ID 1 */
  3925. rc = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 8) |
  3926. dev->dev_addr[2];
  3927. rc = (rc >> 5) & 0xFFFF;
  3928. break;
  3929. case MII_PHYSID2: /* PHYS ID 2 */
  3930. rc = (dev->dev_addr[2] << 10) & 0xFFFF;
  3931. break;
  3932. case MII_ADVERTISE: /* Advertisement control reg */
  3933. rc = ADVERTISE_ALL;
  3934. break;
  3935. case MII_LPA: /* Link partner ability reg */
  3936. rc = LPA_10HALF | LPA_10FULL | LPA_100HALF | LPA_100FULL |
  3937. LPA_100BASE4 | LPA_LPACK;
  3938. break;
  3939. case MII_EXPANSION: /* Expansion register */
  3940. break;
  3941. case MII_DCOUNTER: /* disconnect counter */
  3942. break;
  3943. case MII_FCSCOUNTER: /* false carrier counter */
  3944. break;
  3945. case MII_NWAYTEST: /* N-way auto-neg test register */
  3946. break;
  3947. case MII_RERRCOUNTER: /* rx error counter */
  3948. rc = card->stats.rx_errors;
  3949. break;
  3950. case MII_SREVISION: /* silicon revision */
  3951. break;
  3952. case MII_RESV1: /* reserved 1 */
  3953. break;
  3954. case MII_LBRERROR: /* loopback, rx, bypass error */
  3955. break;
  3956. case MII_PHYADDR: /* physical address */
  3957. break;
  3958. case MII_RESV2: /* reserved 2 */
  3959. break;
  3960. case MII_TPISTATUS: /* TPI status for 10mbps */
  3961. break;
  3962. case MII_NCONFIG: /* network interface config */
  3963. break;
  3964. default:
  3965. break;
  3966. }
  3967. return rc;
  3968. }
  3969. EXPORT_SYMBOL_GPL(qeth_mdio_read);
  3970. static int qeth_send_ipa_snmp_cmd(struct qeth_card *card,
  3971. struct qeth_cmd_buffer *iob, int len,
  3972. int (*reply_cb)(struct qeth_card *, struct qeth_reply *,
  3973. unsigned long),
  3974. void *reply_param)
  3975. {
  3976. u16 s1, s2;
  3977. QETH_CARD_TEXT(card, 4, "sendsnmp");
  3978. memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
  3979. memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
  3980. &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
  3981. /* adjust PDU length fields in IPA_PDU_HEADER */
  3982. s1 = (u32) IPA_PDU_HEADER_SIZE + len;
  3983. s2 = (u32) len;
  3984. memcpy(QETH_IPA_PDU_LEN_TOTAL(iob->data), &s1, 2);
  3985. memcpy(QETH_IPA_PDU_LEN_PDU1(iob->data), &s2, 2);
  3986. memcpy(QETH_IPA_PDU_LEN_PDU2(iob->data), &s2, 2);
  3987. memcpy(QETH_IPA_PDU_LEN_PDU3(iob->data), &s2, 2);
  3988. return qeth_send_control_data(card, IPA_PDU_HEADER_SIZE + len, iob,
  3989. reply_cb, reply_param);
  3990. }
  3991. static int qeth_snmp_command_cb(struct qeth_card *card,
  3992. struct qeth_reply *reply, unsigned long sdata)
  3993. {
  3994. struct qeth_ipa_cmd *cmd;
  3995. struct qeth_arp_query_info *qinfo;
  3996. struct qeth_snmp_cmd *snmp;
  3997. unsigned char *data;
  3998. __u16 data_len;
  3999. QETH_CARD_TEXT(card, 3, "snpcmdcb");
  4000. cmd = (struct qeth_ipa_cmd *) sdata;
  4001. data = (unsigned char *)((char *)cmd - reply->offset);
  4002. qinfo = (struct qeth_arp_query_info *) reply->param;
  4003. snmp = &cmd->data.setadapterparms.data.snmp;
  4004. if (cmd->hdr.return_code) {
  4005. QETH_CARD_TEXT_(card, 4, "scer1%i", cmd->hdr.return_code);
  4006. return 0;
  4007. }
  4008. if (cmd->data.setadapterparms.hdr.return_code) {
  4009. cmd->hdr.return_code =
  4010. cmd->data.setadapterparms.hdr.return_code;
  4011. QETH_CARD_TEXT_(card, 4, "scer2%i", cmd->hdr.return_code);
  4012. return 0;
  4013. }
  4014. data_len = *((__u16 *)QETH_IPA_PDU_LEN_PDU1(data));
  4015. if (cmd->data.setadapterparms.hdr.seq_no == 1)
  4016. data_len -= (__u16)((char *)&snmp->data - (char *)cmd);
  4017. else
  4018. data_len -= (__u16)((char *)&snmp->request - (char *)cmd);
  4019. /* check if there is enough room in userspace */
  4020. if ((qinfo->udata_len - qinfo->udata_offset) < data_len) {
  4021. QETH_CARD_TEXT_(card, 4, "scer3%i", -ENOMEM);
  4022. cmd->hdr.return_code = IPA_RC_ENOMEM;
  4023. return 0;
  4024. }
  4025. QETH_CARD_TEXT_(card, 4, "snore%i",
  4026. cmd->data.setadapterparms.hdr.used_total);
  4027. QETH_CARD_TEXT_(card, 4, "sseqn%i",
  4028. cmd->data.setadapterparms.hdr.seq_no);
  4029. /*copy entries to user buffer*/
  4030. if (cmd->data.setadapterparms.hdr.seq_no == 1) {
  4031. memcpy(qinfo->udata + qinfo->udata_offset,
  4032. (char *)snmp,
  4033. data_len + offsetof(struct qeth_snmp_cmd, data));
  4034. qinfo->udata_offset += offsetof(struct qeth_snmp_cmd, data);
  4035. } else {
  4036. memcpy(qinfo->udata + qinfo->udata_offset,
  4037. (char *)&snmp->request, data_len);
  4038. }
  4039. qinfo->udata_offset += data_len;
  4040. /* check if all replies received ... */
  4041. QETH_CARD_TEXT_(card, 4, "srtot%i",
  4042. cmd->data.setadapterparms.hdr.used_total);
  4043. QETH_CARD_TEXT_(card, 4, "srseq%i",
  4044. cmd->data.setadapterparms.hdr.seq_no);
  4045. if (cmd->data.setadapterparms.hdr.seq_no <
  4046. cmd->data.setadapterparms.hdr.used_total)
  4047. return 1;
  4048. return 0;
  4049. }
  4050. int qeth_snmp_command(struct qeth_card *card, char __user *udata)
  4051. {
  4052. struct qeth_cmd_buffer *iob;
  4053. struct qeth_ipa_cmd *cmd;
  4054. struct qeth_snmp_ureq *ureq;
  4055. unsigned int req_len;
  4056. struct qeth_arp_query_info qinfo = {0, };
  4057. int rc = 0;
  4058. QETH_CARD_TEXT(card, 3, "snmpcmd");
  4059. if (card->info.guestlan)
  4060. return -EOPNOTSUPP;
  4061. if ((!qeth_adp_supported(card, IPA_SETADP_SET_SNMP_CONTROL)) &&
  4062. (!card->options.layer2)) {
  4063. return -EOPNOTSUPP;
  4064. }
  4065. /* skip 4 bytes (data_len struct member) to get req_len */
  4066. if (copy_from_user(&req_len, udata + sizeof(int), sizeof(int)))
  4067. return -EFAULT;
  4068. if (req_len > (QETH_BUFSIZE - IPA_PDU_HEADER_SIZE -
  4069. sizeof(struct qeth_ipacmd_hdr) -
  4070. sizeof(struct qeth_ipacmd_setadpparms_hdr)))
  4071. return -EINVAL;
  4072. ureq = memdup_user(udata, req_len + sizeof(struct qeth_snmp_ureq_hdr));
  4073. if (IS_ERR(ureq)) {
  4074. QETH_CARD_TEXT(card, 2, "snmpnome");
  4075. return PTR_ERR(ureq);
  4076. }
  4077. qinfo.udata_len = ureq->hdr.data_len;
  4078. qinfo.udata = kzalloc(qinfo.udata_len, GFP_KERNEL);
  4079. if (!qinfo.udata) {
  4080. kfree(ureq);
  4081. return -ENOMEM;
  4082. }
  4083. qinfo.udata_offset = sizeof(struct qeth_snmp_ureq_hdr);
  4084. iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_SNMP_CONTROL,
  4085. QETH_SNMP_SETADP_CMDLENGTH + req_len);
  4086. cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
  4087. memcpy(&cmd->data.setadapterparms.data.snmp, &ureq->cmd, req_len);
  4088. rc = qeth_send_ipa_snmp_cmd(card, iob, QETH_SETADP_BASE_LEN + req_len,
  4089. qeth_snmp_command_cb, (void *)&qinfo);
  4090. if (rc)
  4091. QETH_DBF_MESSAGE(2, "SNMP command failed on %s: (0x%x)\n",
  4092. QETH_CARD_IFNAME(card), rc);
  4093. else {
  4094. if (copy_to_user(udata, qinfo.udata, qinfo.udata_len))
  4095. rc = -EFAULT;
  4096. }
  4097. kfree(ureq);
  4098. kfree(qinfo.udata);
  4099. return rc;
  4100. }
  4101. EXPORT_SYMBOL_GPL(qeth_snmp_command);
  4102. static int qeth_setadpparms_query_oat_cb(struct qeth_card *card,
  4103. struct qeth_reply *reply, unsigned long data)
  4104. {
  4105. struct qeth_ipa_cmd *cmd;
  4106. struct qeth_qoat_priv *priv;
  4107. char *resdata;
  4108. int resdatalen;
  4109. QETH_CARD_TEXT(card, 3, "qoatcb");
  4110. cmd = (struct qeth_ipa_cmd *)data;
  4111. priv = (struct qeth_qoat_priv *)reply->param;
  4112. resdatalen = cmd->data.setadapterparms.hdr.cmdlength;
  4113. resdata = (char *)data + 28;
  4114. if (resdatalen > (priv->buffer_len - priv->response_len)) {
  4115. cmd->hdr.return_code = IPA_RC_FFFF;
  4116. return 0;
  4117. }
  4118. memcpy((priv->buffer + priv->response_len), resdata,
  4119. resdatalen);
  4120. priv->response_len += resdatalen;
  4121. if (cmd->data.setadapterparms.hdr.seq_no <
  4122. cmd->data.setadapterparms.hdr.used_total)
  4123. return 1;
  4124. return 0;
  4125. }
  4126. int qeth_query_oat_command(struct qeth_card *card, char __user *udata)
  4127. {
  4128. int rc = 0;
  4129. struct qeth_cmd_buffer *iob;
  4130. struct qeth_ipa_cmd *cmd;
  4131. struct qeth_query_oat *oat_req;
  4132. struct qeth_query_oat_data oat_data;
  4133. struct qeth_qoat_priv priv;
  4134. void __user *tmp;
  4135. QETH_CARD_TEXT(card, 3, "qoatcmd");
  4136. if (!qeth_adp_supported(card, IPA_SETADP_QUERY_OAT)) {
  4137. rc = -EOPNOTSUPP;
  4138. goto out;
  4139. }
  4140. if (copy_from_user(&oat_data, udata,
  4141. sizeof(struct qeth_query_oat_data))) {
  4142. rc = -EFAULT;
  4143. goto out;
  4144. }
  4145. priv.buffer_len = oat_data.buffer_len;
  4146. priv.response_len = 0;
  4147. priv.buffer = kzalloc(oat_data.buffer_len, GFP_KERNEL);
  4148. if (!priv.buffer) {
  4149. rc = -ENOMEM;
  4150. goto out;
  4151. }
  4152. iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_OAT,
  4153. sizeof(struct qeth_ipacmd_setadpparms_hdr) +
  4154. sizeof(struct qeth_query_oat));
  4155. cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
  4156. oat_req = &cmd->data.setadapterparms.data.query_oat;
  4157. oat_req->subcmd_code = oat_data.command;
  4158. rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_query_oat_cb,
  4159. &priv);
  4160. if (!rc) {
  4161. if (is_compat_task())
  4162. tmp = compat_ptr(oat_data.ptr);
  4163. else
  4164. tmp = (void __user *)(unsigned long)oat_data.ptr;
  4165. if (copy_to_user(tmp, priv.buffer,
  4166. priv.response_len)) {
  4167. rc = -EFAULT;
  4168. goto out_free;
  4169. }
  4170. oat_data.response_len = priv.response_len;
  4171. if (copy_to_user(udata, &oat_data,
  4172. sizeof(struct qeth_query_oat_data)))
  4173. rc = -EFAULT;
  4174. } else
  4175. if (rc == IPA_RC_FFFF)
  4176. rc = -EFAULT;
  4177. out_free:
  4178. kfree(priv.buffer);
  4179. out:
  4180. return rc;
  4181. }
  4182. EXPORT_SYMBOL_GPL(qeth_query_oat_command);
  4183. static int qeth_query_card_info_cb(struct qeth_card *card,
  4184. struct qeth_reply *reply, unsigned long data)
  4185. {
  4186. struct qeth_ipa_cmd *cmd;
  4187. struct qeth_query_card_info *card_info;
  4188. struct carrier_info *carrier_info;
  4189. QETH_CARD_TEXT(card, 2, "qcrdincb");
  4190. carrier_info = (struct carrier_info *)reply->param;
  4191. cmd = (struct qeth_ipa_cmd *)data;
  4192. card_info = &cmd->data.setadapterparms.data.card_info;
  4193. if (cmd->data.setadapterparms.hdr.return_code == 0) {
  4194. carrier_info->card_type = card_info->card_type;
  4195. carrier_info->port_mode = card_info->port_mode;
  4196. carrier_info->port_speed = card_info->port_speed;
  4197. }
  4198. qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
  4199. return 0;
  4200. }
  4201. int qeth_query_card_info(struct qeth_card *card,
  4202. struct carrier_info *carrier_info)
  4203. {
  4204. struct qeth_cmd_buffer *iob;
  4205. QETH_CARD_TEXT(card, 2, "qcrdinfo");
  4206. if (!qeth_adp_supported(card, IPA_SETADP_QUERY_CARD_INFO))
  4207. return -EOPNOTSUPP;
  4208. iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_CARD_INFO,
  4209. sizeof(struct qeth_ipacmd_setadpparms_hdr));
  4210. return qeth_send_ipa_cmd(card, iob, qeth_query_card_info_cb,
  4211. (void *)carrier_info);
  4212. }
  4213. EXPORT_SYMBOL_GPL(qeth_query_card_info);
  4214. static inline int qeth_get_qdio_q_format(struct qeth_card *card)
  4215. {
  4216. switch (card->info.type) {
  4217. case QETH_CARD_TYPE_IQD:
  4218. return 2;
  4219. default:
  4220. return 0;
  4221. }
  4222. }
  4223. static void qeth_determine_capabilities(struct qeth_card *card)
  4224. {
  4225. int rc;
  4226. int length;
  4227. char *prcd;
  4228. struct ccw_device *ddev;
  4229. int ddev_offline = 0;
  4230. QETH_DBF_TEXT(SETUP, 2, "detcapab");
  4231. ddev = CARD_DDEV(card);
  4232. if (!ddev->online) {
  4233. ddev_offline = 1;
  4234. rc = ccw_device_set_online(ddev);
  4235. if (rc) {
  4236. QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
  4237. goto out;
  4238. }
  4239. }
  4240. rc = qeth_read_conf_data(card, (void **) &prcd, &length);
  4241. if (rc) {
  4242. QETH_DBF_MESSAGE(2, "%s qeth_read_conf_data returned %i\n",
  4243. dev_name(&card->gdev->dev), rc);
  4244. QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
  4245. goto out_offline;
  4246. }
  4247. qeth_configure_unitaddr(card, prcd);
  4248. if (ddev_offline)
  4249. qeth_configure_blkt_default(card, prcd);
  4250. kfree(prcd);
  4251. rc = qdio_get_ssqd_desc(ddev, &card->ssqd);
  4252. if (rc)
  4253. QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
  4254. QETH_DBF_TEXT_(SETUP, 2, "qfmt%d", card->ssqd.qfmt);
  4255. QETH_DBF_TEXT_(SETUP, 2, "%d", card->ssqd.qdioac1);
  4256. QETH_DBF_TEXT_(SETUP, 2, "%d", card->ssqd.qdioac3);
  4257. QETH_DBF_TEXT_(SETUP, 2, "icnt%d", card->ssqd.icnt);
  4258. if (!((card->ssqd.qfmt != QDIO_IQDIO_QFMT) ||
  4259. ((card->ssqd.qdioac1 & CHSC_AC1_INITIATE_INPUTQ) == 0) ||
  4260. ((card->ssqd.qdioac3 & CHSC_AC3_FORMAT2_CQ_AVAILABLE) == 0))) {
  4261. dev_info(&card->gdev->dev,
  4262. "Completion Queueing supported\n");
  4263. } else {
  4264. card->options.cq = QETH_CQ_NOTAVAILABLE;
  4265. }
  4266. out_offline:
  4267. if (ddev_offline == 1)
  4268. ccw_device_set_offline(ddev);
  4269. out:
  4270. return;
  4271. }
  4272. static inline void qeth_qdio_establish_cq(struct qeth_card *card,
  4273. struct qdio_buffer **in_sbal_ptrs,
  4274. void (**queue_start_poll) (struct ccw_device *, int, unsigned long)) {
  4275. int i;
  4276. if (card->options.cq == QETH_CQ_ENABLED) {
  4277. int offset = QDIO_MAX_BUFFERS_PER_Q *
  4278. (card->qdio.no_in_queues - 1);
  4279. i = QDIO_MAX_BUFFERS_PER_Q * (card->qdio.no_in_queues - 1);
  4280. for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) {
  4281. in_sbal_ptrs[offset + i] = (struct qdio_buffer *)
  4282. virt_to_phys(card->qdio.c_q->bufs[i].buffer);
  4283. }
  4284. queue_start_poll[card->qdio.no_in_queues - 1] = NULL;
  4285. }
  4286. }
  4287. static int qeth_qdio_establish(struct qeth_card *card)
  4288. {
  4289. struct qdio_initialize init_data;
  4290. char *qib_param_field;
  4291. struct qdio_buffer **in_sbal_ptrs;
  4292. void (**queue_start_poll) (struct ccw_device *, int, unsigned long);
  4293. struct qdio_buffer **out_sbal_ptrs;
  4294. int i, j, k;
  4295. int rc = 0;
  4296. QETH_DBF_TEXT(SETUP, 2, "qdioest");
  4297. qib_param_field = kzalloc(QDIO_MAX_BUFFERS_PER_Q * sizeof(char),
  4298. GFP_KERNEL);
  4299. if (!qib_param_field) {
  4300. rc = -ENOMEM;
  4301. goto out_free_nothing;
  4302. }
  4303. qeth_create_qib_param_field(card, qib_param_field);
  4304. qeth_create_qib_param_field_blkt(card, qib_param_field);
  4305. in_sbal_ptrs = kzalloc(card->qdio.no_in_queues *
  4306. QDIO_MAX_BUFFERS_PER_Q * sizeof(void *),
  4307. GFP_KERNEL);
  4308. if (!in_sbal_ptrs) {
  4309. rc = -ENOMEM;
  4310. goto out_free_qib_param;
  4311. }
  4312. for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) {
  4313. in_sbal_ptrs[i] = (struct qdio_buffer *)
  4314. virt_to_phys(card->qdio.in_q->bufs[i].buffer);
  4315. }
  4316. queue_start_poll = kzalloc(sizeof(void *) * card->qdio.no_in_queues,
  4317. GFP_KERNEL);
  4318. if (!queue_start_poll) {
  4319. rc = -ENOMEM;
  4320. goto out_free_in_sbals;
  4321. }
  4322. for (i = 0; i < card->qdio.no_in_queues; ++i)
  4323. queue_start_poll[i] = card->discipline->start_poll;
  4324. qeth_qdio_establish_cq(card, in_sbal_ptrs, queue_start_poll);
  4325. out_sbal_ptrs =
  4326. kzalloc(card->qdio.no_out_queues * QDIO_MAX_BUFFERS_PER_Q *
  4327. sizeof(void *), GFP_KERNEL);
  4328. if (!out_sbal_ptrs) {
  4329. rc = -ENOMEM;
  4330. goto out_free_queue_start_poll;
  4331. }
  4332. for (i = 0, k = 0; i < card->qdio.no_out_queues; ++i)
  4333. for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j, ++k) {
  4334. out_sbal_ptrs[k] = (struct qdio_buffer *)virt_to_phys(
  4335. card->qdio.out_qs[i]->bufs[j]->buffer);
  4336. }
  4337. memset(&init_data, 0, sizeof(struct qdio_initialize));
  4338. init_data.cdev = CARD_DDEV(card);
  4339. init_data.q_format = qeth_get_qdio_q_format(card);
  4340. init_data.qib_param_field_format = 0;
  4341. init_data.qib_param_field = qib_param_field;
  4342. init_data.no_input_qs = card->qdio.no_in_queues;
  4343. init_data.no_output_qs = card->qdio.no_out_queues;
  4344. init_data.input_handler = card->discipline->input_handler;
  4345. init_data.output_handler = card->discipline->output_handler;
  4346. init_data.queue_start_poll_array = queue_start_poll;
  4347. init_data.int_parm = (unsigned long) card;
  4348. init_data.input_sbal_addr_array = (void **) in_sbal_ptrs;
  4349. init_data.output_sbal_addr_array = (void **) out_sbal_ptrs;
  4350. init_data.output_sbal_state_array = card->qdio.out_bufstates;
  4351. init_data.scan_threshold =
  4352. (card->info.type == QETH_CARD_TYPE_IQD) ? 1 : 32;
  4353. if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ALLOCATED,
  4354. QETH_QDIO_ESTABLISHED) == QETH_QDIO_ALLOCATED) {
  4355. rc = qdio_allocate(&init_data);
  4356. if (rc) {
  4357. atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
  4358. goto out;
  4359. }
  4360. rc = qdio_establish(&init_data);
  4361. if (rc) {
  4362. atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
  4363. qdio_free(CARD_DDEV(card));
  4364. }
  4365. }
  4366. switch (card->options.cq) {
  4367. case QETH_CQ_ENABLED:
  4368. dev_info(&card->gdev->dev, "Completion Queue support enabled");
  4369. break;
  4370. case QETH_CQ_DISABLED:
  4371. dev_info(&card->gdev->dev, "Completion Queue support disabled");
  4372. break;
  4373. default:
  4374. break;
  4375. }
  4376. out:
  4377. kfree(out_sbal_ptrs);
  4378. out_free_queue_start_poll:
  4379. kfree(queue_start_poll);
  4380. out_free_in_sbals:
  4381. kfree(in_sbal_ptrs);
  4382. out_free_qib_param:
  4383. kfree(qib_param_field);
  4384. out_free_nothing:
  4385. return rc;
  4386. }
  4387. static void qeth_core_free_card(struct qeth_card *card)
  4388. {
  4389. QETH_DBF_TEXT(SETUP, 2, "freecrd");
  4390. QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
  4391. qeth_clean_channel(&card->read);
  4392. qeth_clean_channel(&card->write);
  4393. if (card->dev)
  4394. free_netdev(card->dev);
  4395. kfree(card->ip_tbd_list);
  4396. qeth_free_qdio_buffers(card);
  4397. unregister_service_level(&card->qeth_service_level);
  4398. kfree(card);
  4399. }
  4400. void qeth_trace_features(struct qeth_card *card)
  4401. {
  4402. QETH_CARD_TEXT(card, 2, "features");
  4403. QETH_CARD_TEXT_(card, 2, "%x", card->options.ipa4.supported_funcs);
  4404. QETH_CARD_TEXT_(card, 2, "%x", card->options.ipa4.enabled_funcs);
  4405. QETH_CARD_TEXT_(card, 2, "%x", card->options.ipa6.supported_funcs);
  4406. QETH_CARD_TEXT_(card, 2, "%x", card->options.ipa6.enabled_funcs);
  4407. QETH_CARD_TEXT_(card, 2, "%x", card->options.adp.supported_funcs);
  4408. QETH_CARD_TEXT_(card, 2, "%x", card->options.adp.enabled_funcs);
  4409. QETH_CARD_TEXT_(card, 2, "%x", card->info.diagass_support);
  4410. }
  4411. EXPORT_SYMBOL_GPL(qeth_trace_features);
  4412. static struct ccw_device_id qeth_ids[] = {
  4413. {CCW_DEVICE_DEVTYPE(0x1731, 0x01, 0x1732, 0x01),
  4414. .driver_info = QETH_CARD_TYPE_OSD},
  4415. {CCW_DEVICE_DEVTYPE(0x1731, 0x05, 0x1732, 0x05),
  4416. .driver_info = QETH_CARD_TYPE_IQD},
  4417. {CCW_DEVICE_DEVTYPE(0x1731, 0x06, 0x1732, 0x06),
  4418. .driver_info = QETH_CARD_TYPE_OSN},
  4419. {CCW_DEVICE_DEVTYPE(0x1731, 0x02, 0x1732, 0x03),
  4420. .driver_info = QETH_CARD_TYPE_OSM},
  4421. {CCW_DEVICE_DEVTYPE(0x1731, 0x02, 0x1732, 0x02),
  4422. .driver_info = QETH_CARD_TYPE_OSX},
  4423. {},
  4424. };
  4425. MODULE_DEVICE_TABLE(ccw, qeth_ids);
  4426. static struct ccw_driver qeth_ccw_driver = {
  4427. .driver = {
  4428. .owner = THIS_MODULE,
  4429. .name = "qeth",
  4430. },
  4431. .ids = qeth_ids,
  4432. .probe = ccwgroup_probe_ccwdev,
  4433. .remove = ccwgroup_remove_ccwdev,
  4434. };
  4435. int qeth_core_hardsetup_card(struct qeth_card *card)
  4436. {
  4437. int retries = 3;
  4438. int rc;
  4439. QETH_DBF_TEXT(SETUP, 2, "hrdsetup");
  4440. atomic_set(&card->force_alloc_skb, 0);
  4441. qeth_update_from_chp_desc(card);
  4442. retry:
  4443. if (retries < 3)
  4444. QETH_DBF_MESSAGE(2, "%s Retrying to do IDX activates.\n",
  4445. dev_name(&card->gdev->dev));
  4446. rc = qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
  4447. ccw_device_set_offline(CARD_DDEV(card));
  4448. ccw_device_set_offline(CARD_WDEV(card));
  4449. ccw_device_set_offline(CARD_RDEV(card));
  4450. qdio_free(CARD_DDEV(card));
  4451. rc = ccw_device_set_online(CARD_RDEV(card));
  4452. if (rc)
  4453. goto retriable;
  4454. rc = ccw_device_set_online(CARD_WDEV(card));
  4455. if (rc)
  4456. goto retriable;
  4457. rc = ccw_device_set_online(CARD_DDEV(card));
  4458. if (rc)
  4459. goto retriable;
  4460. retriable:
  4461. if (rc == -ERESTARTSYS) {
  4462. QETH_DBF_TEXT(SETUP, 2, "break1");
  4463. return rc;
  4464. } else if (rc) {
  4465. QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
  4466. if (--retries < 0)
  4467. goto out;
  4468. else
  4469. goto retry;
  4470. }
  4471. qeth_determine_capabilities(card);
  4472. qeth_init_tokens(card);
  4473. qeth_init_func_level(card);
  4474. rc = qeth_idx_activate_channel(&card->read, qeth_idx_read_cb);
  4475. if (rc == -ERESTARTSYS) {
  4476. QETH_DBF_TEXT(SETUP, 2, "break2");
  4477. return rc;
  4478. } else if (rc) {
  4479. QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
  4480. if (--retries < 0)
  4481. goto out;
  4482. else
  4483. goto retry;
  4484. }
  4485. rc = qeth_idx_activate_channel(&card->write, qeth_idx_write_cb);
  4486. if (rc == -ERESTARTSYS) {
  4487. QETH_DBF_TEXT(SETUP, 2, "break3");
  4488. return rc;
  4489. } else if (rc) {
  4490. QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
  4491. if (--retries < 0)
  4492. goto out;
  4493. else
  4494. goto retry;
  4495. }
  4496. card->read_or_write_problem = 0;
  4497. rc = qeth_mpc_initialize(card);
  4498. if (rc) {
  4499. QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
  4500. goto out;
  4501. }
  4502. card->options.ipa4.supported_funcs = 0;
  4503. card->options.adp.supported_funcs = 0;
  4504. card->options.sbp.supported_funcs = 0;
  4505. card->info.diagass_support = 0;
  4506. qeth_query_ipassists(card, QETH_PROT_IPV4);
  4507. if (qeth_is_supported(card, IPA_SETADAPTERPARMS))
  4508. qeth_query_setadapterparms(card);
  4509. if (qeth_adp_supported(card, IPA_SETADP_SET_DIAG_ASSIST))
  4510. qeth_query_setdiagass(card);
  4511. return 0;
  4512. out:
  4513. dev_warn(&card->gdev->dev, "The qeth device driver failed to recover "
  4514. "an error on the device\n");
  4515. QETH_DBF_MESSAGE(2, "%s Initialization in hardsetup failed! rc=%d\n",
  4516. dev_name(&card->gdev->dev), rc);
  4517. return rc;
  4518. }
  4519. EXPORT_SYMBOL_GPL(qeth_core_hardsetup_card);
  4520. static inline int qeth_create_skb_frag(struct qeth_qdio_buffer *qethbuffer,
  4521. struct qdio_buffer_element *element,
  4522. struct sk_buff **pskb, int offset, int *pfrag, int data_len)
  4523. {
  4524. struct page *page = virt_to_page(element->addr);
  4525. if (*pskb == NULL) {
  4526. if (qethbuffer->rx_skb) {
  4527. /* only if qeth_card.options.cq == QETH_CQ_ENABLED */
  4528. *pskb = qethbuffer->rx_skb;
  4529. qethbuffer->rx_skb = NULL;
  4530. } else {
  4531. *pskb = dev_alloc_skb(QETH_RX_PULL_LEN + ETH_HLEN);
  4532. if (!(*pskb))
  4533. return -ENOMEM;
  4534. }
  4535. skb_reserve(*pskb, ETH_HLEN);
  4536. if (data_len <= QETH_RX_PULL_LEN) {
  4537. memcpy(skb_put(*pskb, data_len), element->addr + offset,
  4538. data_len);
  4539. } else {
  4540. get_page(page);
  4541. memcpy(skb_put(*pskb, QETH_RX_PULL_LEN),
  4542. element->addr + offset, QETH_RX_PULL_LEN);
  4543. skb_fill_page_desc(*pskb, *pfrag, page,
  4544. offset + QETH_RX_PULL_LEN,
  4545. data_len - QETH_RX_PULL_LEN);
  4546. (*pskb)->data_len += data_len - QETH_RX_PULL_LEN;
  4547. (*pskb)->len += data_len - QETH_RX_PULL_LEN;
  4548. (*pskb)->truesize += data_len - QETH_RX_PULL_LEN;
  4549. (*pfrag)++;
  4550. }
  4551. } else {
  4552. get_page(page);
  4553. skb_fill_page_desc(*pskb, *pfrag, page, offset, data_len);
  4554. (*pskb)->data_len += data_len;
  4555. (*pskb)->len += data_len;
  4556. (*pskb)->truesize += data_len;
  4557. (*pfrag)++;
  4558. }
  4559. return 0;
  4560. }
  4561. struct sk_buff *qeth_core_get_next_skb(struct qeth_card *card,
  4562. struct qeth_qdio_buffer *qethbuffer,
  4563. struct qdio_buffer_element **__element, int *__offset,
  4564. struct qeth_hdr **hdr)
  4565. {
  4566. struct qdio_buffer_element *element = *__element;
  4567. struct qdio_buffer *buffer = qethbuffer->buffer;
  4568. int offset = *__offset;
  4569. struct sk_buff *skb = NULL;
  4570. int skb_len = 0;
  4571. void *data_ptr;
  4572. int data_len;
  4573. int headroom = 0;
  4574. int use_rx_sg = 0;
  4575. int frag = 0;
  4576. /* qeth_hdr must not cross element boundaries */
  4577. if (element->length < offset + sizeof(struct qeth_hdr)) {
  4578. if (qeth_is_last_sbale(element))
  4579. return NULL;
  4580. element++;
  4581. offset = 0;
  4582. if (element->length < sizeof(struct qeth_hdr))
  4583. return NULL;
  4584. }
  4585. *hdr = element->addr + offset;
  4586. offset += sizeof(struct qeth_hdr);
  4587. switch ((*hdr)->hdr.l2.id) {
  4588. case QETH_HEADER_TYPE_LAYER2:
  4589. skb_len = (*hdr)->hdr.l2.pkt_length;
  4590. break;
  4591. case QETH_HEADER_TYPE_LAYER3:
  4592. skb_len = (*hdr)->hdr.l3.length;
  4593. headroom = ETH_HLEN;
  4594. break;
  4595. case QETH_HEADER_TYPE_OSN:
  4596. skb_len = (*hdr)->hdr.osn.pdu_length;
  4597. headroom = sizeof(struct qeth_hdr);
  4598. break;
  4599. default:
  4600. break;
  4601. }
  4602. if (!skb_len)
  4603. return NULL;
  4604. if (((skb_len >= card->options.rx_sg_cb) &&
  4605. (!(card->info.type == QETH_CARD_TYPE_OSN)) &&
  4606. (!atomic_read(&card->force_alloc_skb))) ||
  4607. (card->options.cq == QETH_CQ_ENABLED)) {
  4608. use_rx_sg = 1;
  4609. } else {
  4610. skb = dev_alloc_skb(skb_len + headroom);
  4611. if (!skb)
  4612. goto no_mem;
  4613. if (headroom)
  4614. skb_reserve(skb, headroom);
  4615. }
  4616. data_ptr = element->addr + offset;
  4617. while (skb_len) {
  4618. data_len = min(skb_len, (int)(element->length - offset));
  4619. if (data_len) {
  4620. if (use_rx_sg) {
  4621. if (qeth_create_skb_frag(qethbuffer, element,
  4622. &skb, offset, &frag, data_len))
  4623. goto no_mem;
  4624. } else {
  4625. memcpy(skb_put(skb, data_len), data_ptr,
  4626. data_len);
  4627. }
  4628. }
  4629. skb_len -= data_len;
  4630. if (skb_len) {
  4631. if (qeth_is_last_sbale(element)) {
  4632. QETH_CARD_TEXT(card, 4, "unexeob");
  4633. QETH_CARD_HEX(card, 2, buffer, sizeof(void *));
  4634. dev_kfree_skb_any(skb);
  4635. card->stats.rx_errors++;
  4636. return NULL;
  4637. }
  4638. element++;
  4639. offset = 0;
  4640. data_ptr = element->addr;
  4641. } else {
  4642. offset += data_len;
  4643. }
  4644. }
  4645. *__element = element;
  4646. *__offset = offset;
  4647. if (use_rx_sg && card->options.performance_stats) {
  4648. card->perf_stats.sg_skbs_rx++;
  4649. card->perf_stats.sg_frags_rx += skb_shinfo(skb)->nr_frags;
  4650. }
  4651. return skb;
  4652. no_mem:
  4653. if (net_ratelimit()) {
  4654. QETH_CARD_TEXT(card, 2, "noskbmem");
  4655. }
  4656. card->stats.rx_dropped++;
  4657. return NULL;
  4658. }
  4659. EXPORT_SYMBOL_GPL(qeth_core_get_next_skb);
  4660. static void qeth_unregister_dbf_views(void)
  4661. {
  4662. int x;
  4663. for (x = 0; x < QETH_DBF_INFOS; x++) {
  4664. debug_unregister(qeth_dbf[x].id);
  4665. qeth_dbf[x].id = NULL;
  4666. }
  4667. }
  4668. void qeth_dbf_longtext(debug_info_t *id, int level, char *fmt, ...)
  4669. {
  4670. char dbf_txt_buf[32];
  4671. va_list args;
  4672. if (!debug_level_enabled(id, level))
  4673. return;
  4674. va_start(args, fmt);
  4675. vsnprintf(dbf_txt_buf, sizeof(dbf_txt_buf), fmt, args);
  4676. va_end(args);
  4677. debug_text_event(id, level, dbf_txt_buf);
  4678. }
  4679. EXPORT_SYMBOL_GPL(qeth_dbf_longtext);
  4680. static int qeth_register_dbf_views(void)
  4681. {
  4682. int ret;
  4683. int x;
  4684. for (x = 0; x < QETH_DBF_INFOS; x++) {
  4685. /* register the areas */
  4686. qeth_dbf[x].id = debug_register(qeth_dbf[x].name,
  4687. qeth_dbf[x].pages,
  4688. qeth_dbf[x].areas,
  4689. qeth_dbf[x].len);
  4690. if (qeth_dbf[x].id == NULL) {
  4691. qeth_unregister_dbf_views();
  4692. return -ENOMEM;
  4693. }
  4694. /* register a view */
  4695. ret = debug_register_view(qeth_dbf[x].id, qeth_dbf[x].view);
  4696. if (ret) {
  4697. qeth_unregister_dbf_views();
  4698. return ret;
  4699. }
  4700. /* set a passing level */
  4701. debug_set_level(qeth_dbf[x].id, qeth_dbf[x].level);
  4702. }
  4703. return 0;
  4704. }
  4705. int qeth_core_load_discipline(struct qeth_card *card,
  4706. enum qeth_discipline_id discipline)
  4707. {
  4708. int rc = 0;
  4709. mutex_lock(&qeth_mod_mutex);
  4710. switch (discipline) {
  4711. case QETH_DISCIPLINE_LAYER3:
  4712. card->discipline = try_then_request_module(
  4713. symbol_get(qeth_l3_discipline), "qeth_l3");
  4714. break;
  4715. case QETH_DISCIPLINE_LAYER2:
  4716. card->discipline = try_then_request_module(
  4717. symbol_get(qeth_l2_discipline), "qeth_l2");
  4718. break;
  4719. }
  4720. if (!card->discipline) {
  4721. dev_err(&card->gdev->dev, "There is no kernel module to "
  4722. "support discipline %d\n", discipline);
  4723. rc = -EINVAL;
  4724. }
  4725. mutex_unlock(&qeth_mod_mutex);
  4726. return rc;
  4727. }
  4728. void qeth_core_free_discipline(struct qeth_card *card)
  4729. {
  4730. if (card->options.layer2)
  4731. symbol_put(qeth_l2_discipline);
  4732. else
  4733. symbol_put(qeth_l3_discipline);
  4734. card->discipline = NULL;
  4735. }
  4736. static const struct device_type qeth_generic_devtype = {
  4737. .name = "qeth_generic",
  4738. .groups = qeth_generic_attr_groups,
  4739. };
  4740. static const struct device_type qeth_osn_devtype = {
  4741. .name = "qeth_osn",
  4742. .groups = qeth_osn_attr_groups,
  4743. };
  4744. #define DBF_NAME_LEN 20
  4745. struct qeth_dbf_entry {
  4746. char dbf_name[DBF_NAME_LEN];
  4747. debug_info_t *dbf_info;
  4748. struct list_head dbf_list;
  4749. };
  4750. static LIST_HEAD(qeth_dbf_list);
  4751. static DEFINE_MUTEX(qeth_dbf_list_mutex);
  4752. static debug_info_t *qeth_get_dbf_entry(char *name)
  4753. {
  4754. struct qeth_dbf_entry *entry;
  4755. debug_info_t *rc = NULL;
  4756. mutex_lock(&qeth_dbf_list_mutex);
  4757. list_for_each_entry(entry, &qeth_dbf_list, dbf_list) {
  4758. if (strcmp(entry->dbf_name, name) == 0) {
  4759. rc = entry->dbf_info;
  4760. break;
  4761. }
  4762. }
  4763. mutex_unlock(&qeth_dbf_list_mutex);
  4764. return rc;
  4765. }
  4766. static int qeth_add_dbf_entry(struct qeth_card *card, char *name)
  4767. {
  4768. struct qeth_dbf_entry *new_entry;
  4769. card->debug = debug_register(name, 2, 1, 8);
  4770. if (!card->debug) {
  4771. QETH_DBF_TEXT_(SETUP, 2, "%s", "qcdbf");
  4772. goto err;
  4773. }
  4774. if (debug_register_view(card->debug, &debug_hex_ascii_view))
  4775. goto err_dbg;
  4776. new_entry = kzalloc(sizeof(struct qeth_dbf_entry), GFP_KERNEL);
  4777. if (!new_entry)
  4778. goto err_dbg;
  4779. strncpy(new_entry->dbf_name, name, DBF_NAME_LEN);
  4780. new_entry->dbf_info = card->debug;
  4781. mutex_lock(&qeth_dbf_list_mutex);
  4782. list_add(&new_entry->dbf_list, &qeth_dbf_list);
  4783. mutex_unlock(&qeth_dbf_list_mutex);
  4784. return 0;
  4785. err_dbg:
  4786. debug_unregister(card->debug);
  4787. err:
  4788. return -ENOMEM;
  4789. }
  4790. static void qeth_clear_dbf_list(void)
  4791. {
  4792. struct qeth_dbf_entry *entry, *tmp;
  4793. mutex_lock(&qeth_dbf_list_mutex);
  4794. list_for_each_entry_safe(entry, tmp, &qeth_dbf_list, dbf_list) {
  4795. list_del(&entry->dbf_list);
  4796. debug_unregister(entry->dbf_info);
  4797. kfree(entry);
  4798. }
  4799. mutex_unlock(&qeth_dbf_list_mutex);
  4800. }
  4801. static int qeth_core_probe_device(struct ccwgroup_device *gdev)
  4802. {
  4803. struct qeth_card *card;
  4804. struct device *dev;
  4805. int rc;
  4806. unsigned long flags;
  4807. char dbf_name[DBF_NAME_LEN];
  4808. QETH_DBF_TEXT(SETUP, 2, "probedev");
  4809. dev = &gdev->dev;
  4810. if (!get_device(dev))
  4811. return -ENODEV;
  4812. QETH_DBF_TEXT_(SETUP, 2, "%s", dev_name(&gdev->dev));
  4813. card = qeth_alloc_card();
  4814. if (!card) {
  4815. QETH_DBF_TEXT_(SETUP, 2, "1err%d", -ENOMEM);
  4816. rc = -ENOMEM;
  4817. goto err_dev;
  4818. }
  4819. snprintf(dbf_name, sizeof(dbf_name), "qeth_card_%s",
  4820. dev_name(&gdev->dev));
  4821. card->debug = qeth_get_dbf_entry(dbf_name);
  4822. if (!card->debug) {
  4823. rc = qeth_add_dbf_entry(card, dbf_name);
  4824. if (rc)
  4825. goto err_card;
  4826. }
  4827. card->read.ccwdev = gdev->cdev[0];
  4828. card->write.ccwdev = gdev->cdev[1];
  4829. card->data.ccwdev = gdev->cdev[2];
  4830. dev_set_drvdata(&gdev->dev, card);
  4831. card->gdev = gdev;
  4832. gdev->cdev[0]->handler = qeth_irq;
  4833. gdev->cdev[1]->handler = qeth_irq;
  4834. gdev->cdev[2]->handler = qeth_irq;
  4835. rc = qeth_determine_card_type(card);
  4836. if (rc) {
  4837. QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
  4838. goto err_card;
  4839. }
  4840. rc = qeth_setup_card(card);
  4841. if (rc) {
  4842. QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
  4843. goto err_card;
  4844. }
  4845. if (card->info.type == QETH_CARD_TYPE_OSN)
  4846. gdev->dev.type = &qeth_osn_devtype;
  4847. else
  4848. gdev->dev.type = &qeth_generic_devtype;
  4849. switch (card->info.type) {
  4850. case QETH_CARD_TYPE_OSN:
  4851. case QETH_CARD_TYPE_OSM:
  4852. rc = qeth_core_load_discipline(card, QETH_DISCIPLINE_LAYER2);
  4853. if (rc)
  4854. goto err_card;
  4855. rc = card->discipline->setup(card->gdev);
  4856. if (rc)
  4857. goto err_disc;
  4858. case QETH_CARD_TYPE_OSD:
  4859. case QETH_CARD_TYPE_OSX:
  4860. default:
  4861. break;
  4862. }
  4863. write_lock_irqsave(&qeth_core_card_list.rwlock, flags);
  4864. list_add_tail(&card->list, &qeth_core_card_list.list);
  4865. write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags);
  4866. qeth_determine_capabilities(card);
  4867. return 0;
  4868. err_disc:
  4869. qeth_core_free_discipline(card);
  4870. err_card:
  4871. qeth_core_free_card(card);
  4872. err_dev:
  4873. put_device(dev);
  4874. return rc;
  4875. }
  4876. static void qeth_core_remove_device(struct ccwgroup_device *gdev)
  4877. {
  4878. unsigned long flags;
  4879. struct qeth_card *card = dev_get_drvdata(&gdev->dev);
  4880. QETH_DBF_TEXT(SETUP, 2, "removedv");
  4881. if (card->discipline) {
  4882. card->discipline->remove(gdev);
  4883. qeth_core_free_discipline(card);
  4884. }
  4885. write_lock_irqsave(&qeth_core_card_list.rwlock, flags);
  4886. list_del(&card->list);
  4887. write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags);
  4888. qeth_core_free_card(card);
  4889. dev_set_drvdata(&gdev->dev, NULL);
  4890. put_device(&gdev->dev);
  4891. return;
  4892. }
  4893. static int qeth_core_set_online(struct ccwgroup_device *gdev)
  4894. {
  4895. struct qeth_card *card = dev_get_drvdata(&gdev->dev);
  4896. int rc = 0;
  4897. int def_discipline;
  4898. if (!card->discipline) {
  4899. if (card->info.type == QETH_CARD_TYPE_IQD)
  4900. def_discipline = QETH_DISCIPLINE_LAYER3;
  4901. else
  4902. def_discipline = QETH_DISCIPLINE_LAYER2;
  4903. rc = qeth_core_load_discipline(card, def_discipline);
  4904. if (rc)
  4905. goto err;
  4906. rc = card->discipline->setup(card->gdev);
  4907. if (rc)
  4908. goto err;
  4909. }
  4910. rc = card->discipline->set_online(gdev);
  4911. err:
  4912. return rc;
  4913. }
  4914. static int qeth_core_set_offline(struct ccwgroup_device *gdev)
  4915. {
  4916. struct qeth_card *card = dev_get_drvdata(&gdev->dev);
  4917. return card->discipline->set_offline(gdev);
  4918. }
  4919. static void qeth_core_shutdown(struct ccwgroup_device *gdev)
  4920. {
  4921. struct qeth_card *card = dev_get_drvdata(&gdev->dev);
  4922. if (card->discipline && card->discipline->shutdown)
  4923. card->discipline->shutdown(gdev);
  4924. }
  4925. static int qeth_core_prepare(struct ccwgroup_device *gdev)
  4926. {
  4927. struct qeth_card *card = dev_get_drvdata(&gdev->dev);
  4928. if (card->discipline && card->discipline->prepare)
  4929. return card->discipline->prepare(gdev);
  4930. return 0;
  4931. }
  4932. static void qeth_core_complete(struct ccwgroup_device *gdev)
  4933. {
  4934. struct qeth_card *card = dev_get_drvdata(&gdev->dev);
  4935. if (card->discipline && card->discipline->complete)
  4936. card->discipline->complete(gdev);
  4937. }
  4938. static int qeth_core_freeze(struct ccwgroup_device *gdev)
  4939. {
  4940. struct qeth_card *card = dev_get_drvdata(&gdev->dev);
  4941. if (card->discipline && card->discipline->freeze)
  4942. return card->discipline->freeze(gdev);
  4943. return 0;
  4944. }
  4945. static int qeth_core_thaw(struct ccwgroup_device *gdev)
  4946. {
  4947. struct qeth_card *card = dev_get_drvdata(&gdev->dev);
  4948. if (card->discipline && card->discipline->thaw)
  4949. return card->discipline->thaw(gdev);
  4950. return 0;
  4951. }
  4952. static int qeth_core_restore(struct ccwgroup_device *gdev)
  4953. {
  4954. struct qeth_card *card = dev_get_drvdata(&gdev->dev);
  4955. if (card->discipline && card->discipline->restore)
  4956. return card->discipline->restore(gdev);
  4957. return 0;
  4958. }
  4959. static struct ccwgroup_driver qeth_core_ccwgroup_driver = {
  4960. .driver = {
  4961. .owner = THIS_MODULE,
  4962. .name = "qeth",
  4963. },
  4964. .setup = qeth_core_probe_device,
  4965. .remove = qeth_core_remove_device,
  4966. .set_online = qeth_core_set_online,
  4967. .set_offline = qeth_core_set_offline,
  4968. .shutdown = qeth_core_shutdown,
  4969. .prepare = qeth_core_prepare,
  4970. .complete = qeth_core_complete,
  4971. .freeze = qeth_core_freeze,
  4972. .thaw = qeth_core_thaw,
  4973. .restore = qeth_core_restore,
  4974. };
  4975. static ssize_t qeth_core_driver_group_store(struct device_driver *ddrv,
  4976. const char *buf, size_t count)
  4977. {
  4978. int err;
  4979. err = ccwgroup_create_dev(qeth_core_root_dev,
  4980. &qeth_core_ccwgroup_driver, 3, buf);
  4981. return err ? err : count;
  4982. }
  4983. static DRIVER_ATTR(group, 0200, NULL, qeth_core_driver_group_store);
  4984. static struct attribute *qeth_drv_attrs[] = {
  4985. &driver_attr_group.attr,
  4986. NULL,
  4987. };
  4988. static struct attribute_group qeth_drv_attr_group = {
  4989. .attrs = qeth_drv_attrs,
  4990. };
  4991. static const struct attribute_group *qeth_drv_attr_groups[] = {
  4992. &qeth_drv_attr_group,
  4993. NULL,
  4994. };
  4995. static struct {
  4996. const char str[ETH_GSTRING_LEN];
  4997. } qeth_ethtool_stats_keys[] = {
  4998. /* 0 */{"rx skbs"},
  4999. {"rx buffers"},
  5000. {"tx skbs"},
  5001. {"tx buffers"},
  5002. {"tx skbs no packing"},
  5003. {"tx buffers no packing"},
  5004. {"tx skbs packing"},
  5005. {"tx buffers packing"},
  5006. {"tx sg skbs"},
  5007. {"tx sg frags"},
  5008. /* 10 */{"rx sg skbs"},
  5009. {"rx sg frags"},
  5010. {"rx sg page allocs"},
  5011. {"tx large kbytes"},
  5012. {"tx large count"},
  5013. {"tx pk state ch n->p"},
  5014. {"tx pk state ch p->n"},
  5015. {"tx pk watermark low"},
  5016. {"tx pk watermark high"},
  5017. {"queue 0 buffer usage"},
  5018. /* 20 */{"queue 1 buffer usage"},
  5019. {"queue 2 buffer usage"},
  5020. {"queue 3 buffer usage"},
  5021. {"rx poll time"},
  5022. {"rx poll count"},
  5023. {"rx do_QDIO time"},
  5024. {"rx do_QDIO count"},
  5025. {"tx handler time"},
  5026. {"tx handler count"},
  5027. {"tx time"},
  5028. /* 30 */{"tx count"},
  5029. {"tx do_QDIO time"},
  5030. {"tx do_QDIO count"},
  5031. {"tx csum"},
  5032. {"tx lin"},
  5033. {"cq handler count"},
  5034. {"cq handler time"}
  5035. };
  5036. int qeth_core_get_sset_count(struct net_device *dev, int stringset)
  5037. {
  5038. switch (stringset) {
  5039. case ETH_SS_STATS:
  5040. return (sizeof(qeth_ethtool_stats_keys) / ETH_GSTRING_LEN);
  5041. default:
  5042. return -EINVAL;
  5043. }
  5044. }
  5045. EXPORT_SYMBOL_GPL(qeth_core_get_sset_count);
  5046. void qeth_core_get_ethtool_stats(struct net_device *dev,
  5047. struct ethtool_stats *stats, u64 *data)
  5048. {
  5049. struct qeth_card *card = dev->ml_priv;
  5050. data[0] = card->stats.rx_packets -
  5051. card->perf_stats.initial_rx_packets;
  5052. data[1] = card->perf_stats.bufs_rec;
  5053. data[2] = card->stats.tx_packets -
  5054. card->perf_stats.initial_tx_packets;
  5055. data[3] = card->perf_stats.bufs_sent;
  5056. data[4] = card->stats.tx_packets - card->perf_stats.initial_tx_packets
  5057. - card->perf_stats.skbs_sent_pack;
  5058. data[5] = card->perf_stats.bufs_sent - card->perf_stats.bufs_sent_pack;
  5059. data[6] = card->perf_stats.skbs_sent_pack;
  5060. data[7] = card->perf_stats.bufs_sent_pack;
  5061. data[8] = card->perf_stats.sg_skbs_sent;
  5062. data[9] = card->perf_stats.sg_frags_sent;
  5063. data[10] = card->perf_stats.sg_skbs_rx;
  5064. data[11] = card->perf_stats.sg_frags_rx;
  5065. data[12] = card->perf_stats.sg_alloc_page_rx;
  5066. data[13] = (card->perf_stats.large_send_bytes >> 10);
  5067. data[14] = card->perf_stats.large_send_cnt;
  5068. data[15] = card->perf_stats.sc_dp_p;
  5069. data[16] = card->perf_stats.sc_p_dp;
  5070. data[17] = QETH_LOW_WATERMARK_PACK;
  5071. data[18] = QETH_HIGH_WATERMARK_PACK;
  5072. data[19] = atomic_read(&card->qdio.out_qs[0]->used_buffers);
  5073. data[20] = (card->qdio.no_out_queues > 1) ?
  5074. atomic_read(&card->qdio.out_qs[1]->used_buffers) : 0;
  5075. data[21] = (card->qdio.no_out_queues > 2) ?
  5076. atomic_read(&card->qdio.out_qs[2]->used_buffers) : 0;
  5077. data[22] = (card->qdio.no_out_queues > 3) ?
  5078. atomic_read(&card->qdio.out_qs[3]->used_buffers) : 0;
  5079. data[23] = card->perf_stats.inbound_time;
  5080. data[24] = card->perf_stats.inbound_cnt;
  5081. data[25] = card->perf_stats.inbound_do_qdio_time;
  5082. data[26] = card->perf_stats.inbound_do_qdio_cnt;
  5083. data[27] = card->perf_stats.outbound_handler_time;
  5084. data[28] = card->perf_stats.outbound_handler_cnt;
  5085. data[29] = card->perf_stats.outbound_time;
  5086. data[30] = card->perf_stats.outbound_cnt;
  5087. data[31] = card->perf_stats.outbound_do_qdio_time;
  5088. data[32] = card->perf_stats.outbound_do_qdio_cnt;
  5089. data[33] = card->perf_stats.tx_csum;
  5090. data[34] = card->perf_stats.tx_lin;
  5091. data[35] = card->perf_stats.cq_cnt;
  5092. data[36] = card->perf_stats.cq_time;
  5093. }
  5094. EXPORT_SYMBOL_GPL(qeth_core_get_ethtool_stats);
  5095. void qeth_core_get_strings(struct net_device *dev, u32 stringset, u8 *data)
  5096. {
  5097. switch (stringset) {
  5098. case ETH_SS_STATS:
  5099. memcpy(data, &qeth_ethtool_stats_keys,
  5100. sizeof(qeth_ethtool_stats_keys));
  5101. break;
  5102. default:
  5103. WARN_ON(1);
  5104. break;
  5105. }
  5106. }
  5107. EXPORT_SYMBOL_GPL(qeth_core_get_strings);
  5108. void qeth_core_get_drvinfo(struct net_device *dev,
  5109. struct ethtool_drvinfo *info)
  5110. {
  5111. struct qeth_card *card = dev->ml_priv;
  5112. strlcpy(info->driver, card->options.layer2 ? "qeth_l2" : "qeth_l3",
  5113. sizeof(info->driver));
  5114. strlcpy(info->version, "1.0", sizeof(info->version));
  5115. strlcpy(info->fw_version, card->info.mcl_level,
  5116. sizeof(info->fw_version));
  5117. snprintf(info->bus_info, sizeof(info->bus_info), "%s/%s/%s",
  5118. CARD_RDEV_ID(card), CARD_WDEV_ID(card), CARD_DDEV_ID(card));
  5119. }
  5120. EXPORT_SYMBOL_GPL(qeth_core_get_drvinfo);
  5121. /* Helper function to fill 'advertizing' and 'supported' which are the same. */
  5122. /* Autoneg and full-duplex are supported and advertized uncondionally. */
  5123. /* Always advertize and support all speeds up to specified, and only one */
  5124. /* specified port type. */
  5125. static void qeth_set_ecmd_adv_sup(struct ethtool_cmd *ecmd,
  5126. int maxspeed, int porttype)
  5127. {
  5128. int port_sup, port_adv, spd_sup, spd_adv;
  5129. switch (porttype) {
  5130. case PORT_TP:
  5131. port_sup = SUPPORTED_TP;
  5132. port_adv = ADVERTISED_TP;
  5133. break;
  5134. case PORT_FIBRE:
  5135. port_sup = SUPPORTED_FIBRE;
  5136. port_adv = ADVERTISED_FIBRE;
  5137. break;
  5138. default:
  5139. port_sup = SUPPORTED_TP;
  5140. port_adv = ADVERTISED_TP;
  5141. WARN_ON_ONCE(1);
  5142. }
  5143. /* "Fallthrough" case'es ordered from high to low result in setting */
  5144. /* flags cumulatively, starting from the specified speed and down to */
  5145. /* the lowest possible. */
  5146. spd_sup = 0;
  5147. spd_adv = 0;
  5148. switch (maxspeed) {
  5149. case SPEED_10000:
  5150. spd_sup |= SUPPORTED_10000baseT_Full;
  5151. spd_adv |= ADVERTISED_10000baseT_Full;
  5152. case SPEED_1000:
  5153. spd_sup |= SUPPORTED_1000baseT_Half | SUPPORTED_1000baseT_Full;
  5154. spd_adv |= ADVERTISED_1000baseT_Half |
  5155. ADVERTISED_1000baseT_Full;
  5156. case SPEED_100:
  5157. spd_sup |= SUPPORTED_100baseT_Half | SUPPORTED_100baseT_Full;
  5158. spd_adv |= ADVERTISED_100baseT_Half | ADVERTISED_100baseT_Full;
  5159. case SPEED_10:
  5160. spd_sup |= SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full;
  5161. spd_adv |= ADVERTISED_10baseT_Half | ADVERTISED_10baseT_Full;
  5162. break;
  5163. default:
  5164. spd_sup = SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full;
  5165. spd_adv = ADVERTISED_10baseT_Half | ADVERTISED_10baseT_Full;
  5166. WARN_ON_ONCE(1);
  5167. }
  5168. ecmd->advertising = ADVERTISED_Autoneg | port_adv | spd_adv;
  5169. ecmd->supported = SUPPORTED_Autoneg | port_sup | spd_sup;
  5170. }
  5171. int qeth_core_ethtool_get_settings(struct net_device *netdev,
  5172. struct ethtool_cmd *ecmd)
  5173. {
  5174. struct qeth_card *card = netdev->ml_priv;
  5175. enum qeth_link_types link_type;
  5176. struct carrier_info carrier_info;
  5177. int rc;
  5178. u32 speed;
  5179. if ((card->info.type == QETH_CARD_TYPE_IQD) || (card->info.guestlan))
  5180. link_type = QETH_LINK_TYPE_10GBIT_ETH;
  5181. else
  5182. link_type = card->info.link_type;
  5183. ecmd->transceiver = XCVR_INTERNAL;
  5184. ecmd->duplex = DUPLEX_FULL;
  5185. ecmd->autoneg = AUTONEG_ENABLE;
  5186. switch (link_type) {
  5187. case QETH_LINK_TYPE_FAST_ETH:
  5188. case QETH_LINK_TYPE_LANE_ETH100:
  5189. qeth_set_ecmd_adv_sup(ecmd, SPEED_100, PORT_TP);
  5190. speed = SPEED_100;
  5191. ecmd->port = PORT_TP;
  5192. break;
  5193. case QETH_LINK_TYPE_GBIT_ETH:
  5194. case QETH_LINK_TYPE_LANE_ETH1000:
  5195. qeth_set_ecmd_adv_sup(ecmd, SPEED_1000, PORT_FIBRE);
  5196. speed = SPEED_1000;
  5197. ecmd->port = PORT_FIBRE;
  5198. break;
  5199. case QETH_LINK_TYPE_10GBIT_ETH:
  5200. qeth_set_ecmd_adv_sup(ecmd, SPEED_10000, PORT_FIBRE);
  5201. speed = SPEED_10000;
  5202. ecmd->port = PORT_FIBRE;
  5203. break;
  5204. default:
  5205. qeth_set_ecmd_adv_sup(ecmd, SPEED_10, PORT_TP);
  5206. speed = SPEED_10;
  5207. ecmd->port = PORT_TP;
  5208. }
  5209. ethtool_cmd_speed_set(ecmd, speed);
  5210. /* Check if we can obtain more accurate information. */
  5211. /* If QUERY_CARD_INFO command is not supported or fails, */
  5212. /* just return the heuristics that was filled above. */
  5213. if (!qeth_card_hw_is_reachable(card))
  5214. return -ENODEV;
  5215. rc = qeth_query_card_info(card, &carrier_info);
  5216. if (rc == -EOPNOTSUPP) /* for old hardware, return heuristic */
  5217. return 0;
  5218. if (rc) /* report error from the hardware operation */
  5219. return rc;
  5220. /* on success, fill in the information got from the hardware */
  5221. netdev_dbg(netdev,
  5222. "card info: card_type=0x%02x, port_mode=0x%04x, port_speed=0x%08x\n",
  5223. carrier_info.card_type,
  5224. carrier_info.port_mode,
  5225. carrier_info.port_speed);
  5226. /* Update attributes for which we've obtained more authoritative */
  5227. /* information, leave the rest the way they where filled above. */
  5228. switch (carrier_info.card_type) {
  5229. case CARD_INFO_TYPE_1G_COPPER_A:
  5230. case CARD_INFO_TYPE_1G_COPPER_B:
  5231. qeth_set_ecmd_adv_sup(ecmd, SPEED_1000, PORT_TP);
  5232. ecmd->port = PORT_TP;
  5233. break;
  5234. case CARD_INFO_TYPE_1G_FIBRE_A:
  5235. case CARD_INFO_TYPE_1G_FIBRE_B:
  5236. qeth_set_ecmd_adv_sup(ecmd, SPEED_1000, PORT_FIBRE);
  5237. ecmd->port = PORT_FIBRE;
  5238. break;
  5239. case CARD_INFO_TYPE_10G_FIBRE_A:
  5240. case CARD_INFO_TYPE_10G_FIBRE_B:
  5241. qeth_set_ecmd_adv_sup(ecmd, SPEED_10000, PORT_FIBRE);
  5242. ecmd->port = PORT_FIBRE;
  5243. break;
  5244. }
  5245. switch (carrier_info.port_mode) {
  5246. case CARD_INFO_PORTM_FULLDUPLEX:
  5247. ecmd->duplex = DUPLEX_FULL;
  5248. break;
  5249. case CARD_INFO_PORTM_HALFDUPLEX:
  5250. ecmd->duplex = DUPLEX_HALF;
  5251. break;
  5252. }
  5253. switch (carrier_info.port_speed) {
  5254. case CARD_INFO_PORTS_10M:
  5255. speed = SPEED_10;
  5256. break;
  5257. case CARD_INFO_PORTS_100M:
  5258. speed = SPEED_100;
  5259. break;
  5260. case CARD_INFO_PORTS_1G:
  5261. speed = SPEED_1000;
  5262. break;
  5263. case CARD_INFO_PORTS_10G:
  5264. speed = SPEED_10000;
  5265. break;
  5266. }
  5267. ethtool_cmd_speed_set(ecmd, speed);
  5268. return 0;
  5269. }
  5270. EXPORT_SYMBOL_GPL(qeth_core_ethtool_get_settings);
  5271. static int __init qeth_core_init(void)
  5272. {
  5273. int rc;
  5274. pr_info("loading core functions\n");
  5275. INIT_LIST_HEAD(&qeth_core_card_list.list);
  5276. INIT_LIST_HEAD(&qeth_dbf_list);
  5277. rwlock_init(&qeth_core_card_list.rwlock);
  5278. mutex_init(&qeth_mod_mutex);
  5279. qeth_wq = create_singlethread_workqueue("qeth_wq");
  5280. rc = qeth_register_dbf_views();
  5281. if (rc)
  5282. goto out_err;
  5283. qeth_core_root_dev = root_device_register("qeth");
  5284. rc = PTR_ERR_OR_ZERO(qeth_core_root_dev);
  5285. if (rc)
  5286. goto register_err;
  5287. qeth_core_header_cache = kmem_cache_create("qeth_hdr",
  5288. sizeof(struct qeth_hdr) + ETH_HLEN, 64, 0, NULL);
  5289. if (!qeth_core_header_cache) {
  5290. rc = -ENOMEM;
  5291. goto slab_err;
  5292. }
  5293. qeth_qdio_outbuf_cache = kmem_cache_create("qeth_buf",
  5294. sizeof(struct qeth_qdio_out_buffer), 0, 0, NULL);
  5295. if (!qeth_qdio_outbuf_cache) {
  5296. rc = -ENOMEM;
  5297. goto cqslab_err;
  5298. }
  5299. rc = ccw_driver_register(&qeth_ccw_driver);
  5300. if (rc)
  5301. goto ccw_err;
  5302. qeth_core_ccwgroup_driver.driver.groups = qeth_drv_attr_groups;
  5303. rc = ccwgroup_driver_register(&qeth_core_ccwgroup_driver);
  5304. if (rc)
  5305. goto ccwgroup_err;
  5306. return 0;
  5307. ccwgroup_err:
  5308. ccw_driver_unregister(&qeth_ccw_driver);
  5309. ccw_err:
  5310. kmem_cache_destroy(qeth_qdio_outbuf_cache);
  5311. cqslab_err:
  5312. kmem_cache_destroy(qeth_core_header_cache);
  5313. slab_err:
  5314. root_device_unregister(qeth_core_root_dev);
  5315. register_err:
  5316. qeth_unregister_dbf_views();
  5317. out_err:
  5318. pr_err("Initializing the qeth device driver failed\n");
  5319. return rc;
  5320. }
  5321. static void __exit qeth_core_exit(void)
  5322. {
  5323. qeth_clear_dbf_list();
  5324. destroy_workqueue(qeth_wq);
  5325. ccwgroup_driver_unregister(&qeth_core_ccwgroup_driver);
  5326. ccw_driver_unregister(&qeth_ccw_driver);
  5327. kmem_cache_destroy(qeth_qdio_outbuf_cache);
  5328. kmem_cache_destroy(qeth_core_header_cache);
  5329. root_device_unregister(qeth_core_root_dev);
  5330. qeth_unregister_dbf_views();
  5331. pr_info("core functions removed\n");
  5332. }
  5333. module_init(qeth_core_init);
  5334. module_exit(qeth_core_exit);
  5335. MODULE_AUTHOR("Frank Blaschka <frank.blaschka@de.ibm.com>");
  5336. MODULE_DESCRIPTION("qeth core functions");
  5337. MODULE_LICENSE("GPL");