intel_rapl.c 36 KB

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  1. /*
  2. * Intel Running Average Power Limit (RAPL) Driver
  3. * Copyright (c) 2013, Intel Corporation.
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms and conditions of the GNU General Public License,
  7. * version 2, as published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. *
  14. * You should have received a copy of the GNU General Public License along with
  15. * this program; if not, write to the Free Software Foundation, Inc.
  16. *
  17. */
  18. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  19. #include <linux/kernel.h>
  20. #include <linux/module.h>
  21. #include <linux/list.h>
  22. #include <linux/types.h>
  23. #include <linux/device.h>
  24. #include <linux/slab.h>
  25. #include <linux/log2.h>
  26. #include <linux/bitmap.h>
  27. #include <linux/delay.h>
  28. #include <linux/sysfs.h>
  29. #include <linux/cpu.h>
  30. #include <linux/powercap.h>
  31. #include <asm/processor.h>
  32. #include <asm/cpu_device_id.h>
  33. /* bitmasks for RAPL MSRs, used by primitive access functions */
  34. #define ENERGY_STATUS_MASK 0xffffffff
  35. #define POWER_LIMIT1_MASK 0x7FFF
  36. #define POWER_LIMIT1_ENABLE BIT(15)
  37. #define POWER_LIMIT1_CLAMP BIT(16)
  38. #define POWER_LIMIT2_MASK (0x7FFFULL<<32)
  39. #define POWER_LIMIT2_ENABLE BIT_ULL(47)
  40. #define POWER_LIMIT2_CLAMP BIT_ULL(48)
  41. #define POWER_PACKAGE_LOCK BIT_ULL(63)
  42. #define POWER_PP_LOCK BIT(31)
  43. #define TIME_WINDOW1_MASK (0x7FULL<<17)
  44. #define TIME_WINDOW2_MASK (0x7FULL<<49)
  45. #define POWER_UNIT_OFFSET 0
  46. #define POWER_UNIT_MASK 0x0F
  47. #define ENERGY_UNIT_OFFSET 0x08
  48. #define ENERGY_UNIT_MASK 0x1F00
  49. #define TIME_UNIT_OFFSET 0x10
  50. #define TIME_UNIT_MASK 0xF0000
  51. #define POWER_INFO_MAX_MASK (0x7fffULL<<32)
  52. #define POWER_INFO_MIN_MASK (0x7fffULL<<16)
  53. #define POWER_INFO_MAX_TIME_WIN_MASK (0x3fULL<<48)
  54. #define POWER_INFO_THERMAL_SPEC_MASK 0x7fff
  55. #define PERF_STATUS_THROTTLE_TIME_MASK 0xffffffff
  56. #define PP_POLICY_MASK 0x1F
  57. /* Non HW constants */
  58. #define RAPL_PRIMITIVE_DERIVED BIT(1) /* not from raw data */
  59. #define RAPL_PRIMITIVE_DUMMY BIT(2)
  60. /* scale RAPL units to avoid floating point math inside kernel */
  61. #define POWER_UNIT_SCALE (1000000)
  62. #define ENERGY_UNIT_SCALE (1000000)
  63. #define TIME_UNIT_SCALE (1000000)
  64. #define TIME_WINDOW_MAX_MSEC 40000
  65. #define TIME_WINDOW_MIN_MSEC 250
  66. enum unit_type {
  67. ARBITRARY_UNIT, /* no translation */
  68. POWER_UNIT,
  69. ENERGY_UNIT,
  70. TIME_UNIT,
  71. };
  72. enum rapl_domain_type {
  73. RAPL_DOMAIN_PACKAGE, /* entire package/socket */
  74. RAPL_DOMAIN_PP0, /* core power plane */
  75. RAPL_DOMAIN_PP1, /* graphics uncore */
  76. RAPL_DOMAIN_DRAM,/* DRAM control_type */
  77. RAPL_DOMAIN_MAX,
  78. };
  79. enum rapl_domain_msr_id {
  80. RAPL_DOMAIN_MSR_LIMIT,
  81. RAPL_DOMAIN_MSR_STATUS,
  82. RAPL_DOMAIN_MSR_PERF,
  83. RAPL_DOMAIN_MSR_POLICY,
  84. RAPL_DOMAIN_MSR_INFO,
  85. RAPL_DOMAIN_MSR_MAX,
  86. };
  87. /* per domain data, some are optional */
  88. enum rapl_primitives {
  89. ENERGY_COUNTER,
  90. POWER_LIMIT1,
  91. POWER_LIMIT2,
  92. FW_LOCK,
  93. PL1_ENABLE, /* power limit 1, aka long term */
  94. PL1_CLAMP, /* allow frequency to go below OS request */
  95. PL2_ENABLE, /* power limit 2, aka short term, instantaneous */
  96. PL2_CLAMP,
  97. TIME_WINDOW1, /* long term */
  98. TIME_WINDOW2, /* short term */
  99. THERMAL_SPEC_POWER,
  100. MAX_POWER,
  101. MIN_POWER,
  102. MAX_TIME_WINDOW,
  103. THROTTLED_TIME,
  104. PRIORITY_LEVEL,
  105. /* below are not raw primitive data */
  106. AVERAGE_POWER,
  107. NR_RAPL_PRIMITIVES,
  108. };
  109. #define NR_RAW_PRIMITIVES (NR_RAPL_PRIMITIVES - 2)
  110. /* Can be expanded to include events, etc.*/
  111. struct rapl_domain_data {
  112. u64 primitives[NR_RAPL_PRIMITIVES];
  113. unsigned long timestamp;
  114. };
  115. #define DOMAIN_STATE_INACTIVE BIT(0)
  116. #define DOMAIN_STATE_POWER_LIMIT_SET BIT(1)
  117. #define DOMAIN_STATE_BIOS_LOCKED BIT(2)
  118. #define NR_POWER_LIMITS (2)
  119. struct rapl_power_limit {
  120. struct powercap_zone_constraint *constraint;
  121. int prim_id; /* primitive ID used to enable */
  122. struct rapl_domain *domain;
  123. const char *name;
  124. };
  125. static const char pl1_name[] = "long_term";
  126. static const char pl2_name[] = "short_term";
  127. struct rapl_domain {
  128. const char *name;
  129. enum rapl_domain_type id;
  130. int msrs[RAPL_DOMAIN_MSR_MAX];
  131. struct powercap_zone power_zone;
  132. struct rapl_domain_data rdd;
  133. struct rapl_power_limit rpl[NR_POWER_LIMITS];
  134. u64 attr_map; /* track capabilities */
  135. unsigned int state;
  136. int package_id;
  137. };
  138. #define power_zone_to_rapl_domain(_zone) \
  139. container_of(_zone, struct rapl_domain, power_zone)
  140. /* Each physical package contains multiple domains, these are the common
  141. * data across RAPL domains within a package.
  142. */
  143. struct rapl_package {
  144. unsigned int id; /* physical package/socket id */
  145. unsigned int nr_domains;
  146. unsigned long domain_map; /* bit map of active domains */
  147. unsigned int power_unit_divisor;
  148. unsigned int energy_unit_divisor;
  149. unsigned int time_unit_divisor;
  150. struct rapl_domain *domains; /* array of domains, sized at runtime */
  151. struct powercap_zone *power_zone; /* keep track of parent zone */
  152. int nr_cpus; /* active cpus on the package, topology info is lost during
  153. * cpu hotplug. so we have to track ourselves.
  154. */
  155. unsigned long power_limit_irq; /* keep track of package power limit
  156. * notify interrupt enable status.
  157. */
  158. struct list_head plist;
  159. };
  160. #define PACKAGE_PLN_INT_SAVED BIT(0)
  161. #define MAX_PRIM_NAME (32)
  162. /* per domain data. used to describe individual knobs such that access function
  163. * can be consolidated into one instead of many inline functions.
  164. */
  165. struct rapl_primitive_info {
  166. const char *name;
  167. u64 mask;
  168. int shift;
  169. enum rapl_domain_msr_id id;
  170. enum unit_type unit;
  171. u32 flag;
  172. };
  173. #define PRIMITIVE_INFO_INIT(p, m, s, i, u, f) { \
  174. .name = #p, \
  175. .mask = m, \
  176. .shift = s, \
  177. .id = i, \
  178. .unit = u, \
  179. .flag = f \
  180. }
  181. static void rapl_init_domains(struct rapl_package *rp);
  182. static int rapl_read_data_raw(struct rapl_domain *rd,
  183. enum rapl_primitives prim,
  184. bool xlate, u64 *data);
  185. static int rapl_write_data_raw(struct rapl_domain *rd,
  186. enum rapl_primitives prim,
  187. unsigned long long value);
  188. static u64 rapl_unit_xlate(int package, enum unit_type type, u64 value,
  189. int to_raw);
  190. static void package_power_limit_irq_save(int package_id);
  191. static LIST_HEAD(rapl_packages); /* guarded by CPU hotplug lock */
  192. static const char * const rapl_domain_names[] = {
  193. "package",
  194. "core",
  195. "uncore",
  196. "dram",
  197. };
  198. static struct powercap_control_type *control_type; /* PowerCap Controller */
  199. /* caller to ensure CPU hotplug lock is held */
  200. static struct rapl_package *find_package_by_id(int id)
  201. {
  202. struct rapl_package *rp;
  203. list_for_each_entry(rp, &rapl_packages, plist) {
  204. if (rp->id == id)
  205. return rp;
  206. }
  207. return NULL;
  208. }
  209. /* caller to ensure CPU hotplug lock is held */
  210. static int find_active_cpu_on_package(int package_id)
  211. {
  212. int i;
  213. for_each_online_cpu(i) {
  214. if (topology_physical_package_id(i) == package_id)
  215. return i;
  216. }
  217. /* all CPUs on this package are offline */
  218. return -ENODEV;
  219. }
  220. /* caller must hold cpu hotplug lock */
  221. static void rapl_cleanup_data(void)
  222. {
  223. struct rapl_package *p, *tmp;
  224. list_for_each_entry_safe(p, tmp, &rapl_packages, plist) {
  225. kfree(p->domains);
  226. list_del(&p->plist);
  227. kfree(p);
  228. }
  229. }
  230. static int get_energy_counter(struct powercap_zone *power_zone, u64 *energy_raw)
  231. {
  232. struct rapl_domain *rd;
  233. u64 energy_now;
  234. /* prevent CPU hotplug, make sure the RAPL domain does not go
  235. * away while reading the counter.
  236. */
  237. get_online_cpus();
  238. rd = power_zone_to_rapl_domain(power_zone);
  239. if (!rapl_read_data_raw(rd, ENERGY_COUNTER, true, &energy_now)) {
  240. *energy_raw = energy_now;
  241. put_online_cpus();
  242. return 0;
  243. }
  244. put_online_cpus();
  245. return -EIO;
  246. }
  247. static int get_max_energy_counter(struct powercap_zone *pcd_dev, u64 *energy)
  248. {
  249. *energy = rapl_unit_xlate(0, ENERGY_UNIT, ENERGY_STATUS_MASK, 0);
  250. return 0;
  251. }
  252. static int release_zone(struct powercap_zone *power_zone)
  253. {
  254. struct rapl_domain *rd = power_zone_to_rapl_domain(power_zone);
  255. struct rapl_package *rp;
  256. /* package zone is the last zone of a package, we can free
  257. * memory here since all children has been unregistered.
  258. */
  259. if (rd->id == RAPL_DOMAIN_PACKAGE) {
  260. rp = find_package_by_id(rd->package_id);
  261. if (!rp) {
  262. dev_warn(&power_zone->dev, "no package id %s\n",
  263. rd->name);
  264. return -ENODEV;
  265. }
  266. kfree(rd);
  267. rp->domains = NULL;
  268. }
  269. return 0;
  270. }
  271. static int find_nr_power_limit(struct rapl_domain *rd)
  272. {
  273. int i;
  274. for (i = 0; i < NR_POWER_LIMITS; i++) {
  275. if (rd->rpl[i].name == NULL)
  276. break;
  277. }
  278. return i;
  279. }
  280. static int set_domain_enable(struct powercap_zone *power_zone, bool mode)
  281. {
  282. struct rapl_domain *rd = power_zone_to_rapl_domain(power_zone);
  283. int nr_powerlimit;
  284. if (rd->state & DOMAIN_STATE_BIOS_LOCKED)
  285. return -EACCES;
  286. get_online_cpus();
  287. nr_powerlimit = find_nr_power_limit(rd);
  288. /* here we activate/deactivate the hardware for power limiting */
  289. rapl_write_data_raw(rd, PL1_ENABLE, mode);
  290. /* always enable clamp such that p-state can go below OS requested
  291. * range. power capping priority over guranteed frequency.
  292. */
  293. rapl_write_data_raw(rd, PL1_CLAMP, mode);
  294. /* some domains have pl2 */
  295. if (nr_powerlimit > 1) {
  296. rapl_write_data_raw(rd, PL2_ENABLE, mode);
  297. rapl_write_data_raw(rd, PL2_CLAMP, mode);
  298. }
  299. put_online_cpus();
  300. return 0;
  301. }
  302. static int get_domain_enable(struct powercap_zone *power_zone, bool *mode)
  303. {
  304. struct rapl_domain *rd = power_zone_to_rapl_domain(power_zone);
  305. u64 val;
  306. if (rd->state & DOMAIN_STATE_BIOS_LOCKED) {
  307. *mode = false;
  308. return 0;
  309. }
  310. get_online_cpus();
  311. if (rapl_read_data_raw(rd, PL1_ENABLE, true, &val)) {
  312. put_online_cpus();
  313. return -EIO;
  314. }
  315. *mode = val;
  316. put_online_cpus();
  317. return 0;
  318. }
  319. /* per RAPL domain ops, in the order of rapl_domain_type */
  320. static struct powercap_zone_ops zone_ops[] = {
  321. /* RAPL_DOMAIN_PACKAGE */
  322. {
  323. .get_energy_uj = get_energy_counter,
  324. .get_max_energy_range_uj = get_max_energy_counter,
  325. .release = release_zone,
  326. .set_enable = set_domain_enable,
  327. .get_enable = get_domain_enable,
  328. },
  329. /* RAPL_DOMAIN_PP0 */
  330. {
  331. .get_energy_uj = get_energy_counter,
  332. .get_max_energy_range_uj = get_max_energy_counter,
  333. .release = release_zone,
  334. .set_enable = set_domain_enable,
  335. .get_enable = get_domain_enable,
  336. },
  337. /* RAPL_DOMAIN_PP1 */
  338. {
  339. .get_energy_uj = get_energy_counter,
  340. .get_max_energy_range_uj = get_max_energy_counter,
  341. .release = release_zone,
  342. .set_enable = set_domain_enable,
  343. .get_enable = get_domain_enable,
  344. },
  345. /* RAPL_DOMAIN_DRAM */
  346. {
  347. .get_energy_uj = get_energy_counter,
  348. .get_max_energy_range_uj = get_max_energy_counter,
  349. .release = release_zone,
  350. .set_enable = set_domain_enable,
  351. .get_enable = get_domain_enable,
  352. },
  353. };
  354. static int set_power_limit(struct powercap_zone *power_zone, int id,
  355. u64 power_limit)
  356. {
  357. struct rapl_domain *rd;
  358. struct rapl_package *rp;
  359. int ret = 0;
  360. get_online_cpus();
  361. rd = power_zone_to_rapl_domain(power_zone);
  362. rp = find_package_by_id(rd->package_id);
  363. if (!rp) {
  364. ret = -ENODEV;
  365. goto set_exit;
  366. }
  367. if (rd->state & DOMAIN_STATE_BIOS_LOCKED) {
  368. dev_warn(&power_zone->dev, "%s locked by BIOS, monitoring only\n",
  369. rd->name);
  370. ret = -EACCES;
  371. goto set_exit;
  372. }
  373. switch (rd->rpl[id].prim_id) {
  374. case PL1_ENABLE:
  375. rapl_write_data_raw(rd, POWER_LIMIT1, power_limit);
  376. break;
  377. case PL2_ENABLE:
  378. rapl_write_data_raw(rd, POWER_LIMIT2, power_limit);
  379. break;
  380. default:
  381. ret = -EINVAL;
  382. }
  383. if (!ret)
  384. package_power_limit_irq_save(rd->package_id);
  385. set_exit:
  386. put_online_cpus();
  387. return ret;
  388. }
  389. static int get_current_power_limit(struct powercap_zone *power_zone, int id,
  390. u64 *data)
  391. {
  392. struct rapl_domain *rd;
  393. u64 val;
  394. int prim;
  395. int ret = 0;
  396. get_online_cpus();
  397. rd = power_zone_to_rapl_domain(power_zone);
  398. switch (rd->rpl[id].prim_id) {
  399. case PL1_ENABLE:
  400. prim = POWER_LIMIT1;
  401. break;
  402. case PL2_ENABLE:
  403. prim = POWER_LIMIT2;
  404. break;
  405. default:
  406. put_online_cpus();
  407. return -EINVAL;
  408. }
  409. if (rapl_read_data_raw(rd, prim, true, &val))
  410. ret = -EIO;
  411. else
  412. *data = val;
  413. put_online_cpus();
  414. return ret;
  415. }
  416. static int set_time_window(struct powercap_zone *power_zone, int id,
  417. u64 window)
  418. {
  419. struct rapl_domain *rd;
  420. int ret = 0;
  421. get_online_cpus();
  422. rd = power_zone_to_rapl_domain(power_zone);
  423. switch (rd->rpl[id].prim_id) {
  424. case PL1_ENABLE:
  425. rapl_write_data_raw(rd, TIME_WINDOW1, window);
  426. break;
  427. case PL2_ENABLE:
  428. rapl_write_data_raw(rd, TIME_WINDOW2, window);
  429. break;
  430. default:
  431. ret = -EINVAL;
  432. }
  433. put_online_cpus();
  434. return ret;
  435. }
  436. static int get_time_window(struct powercap_zone *power_zone, int id, u64 *data)
  437. {
  438. struct rapl_domain *rd;
  439. u64 val;
  440. int ret = 0;
  441. get_online_cpus();
  442. rd = power_zone_to_rapl_domain(power_zone);
  443. switch (rd->rpl[id].prim_id) {
  444. case PL1_ENABLE:
  445. ret = rapl_read_data_raw(rd, TIME_WINDOW1, true, &val);
  446. break;
  447. case PL2_ENABLE:
  448. ret = rapl_read_data_raw(rd, TIME_WINDOW2, true, &val);
  449. break;
  450. default:
  451. put_online_cpus();
  452. return -EINVAL;
  453. }
  454. if (!ret)
  455. *data = val;
  456. put_online_cpus();
  457. return ret;
  458. }
  459. static const char *get_constraint_name(struct powercap_zone *power_zone, int id)
  460. {
  461. struct rapl_power_limit *rpl;
  462. struct rapl_domain *rd;
  463. rd = power_zone_to_rapl_domain(power_zone);
  464. rpl = (struct rapl_power_limit *) &rd->rpl[id];
  465. return rpl->name;
  466. }
  467. static int get_max_power(struct powercap_zone *power_zone, int id,
  468. u64 *data)
  469. {
  470. struct rapl_domain *rd;
  471. u64 val;
  472. int prim;
  473. int ret = 0;
  474. get_online_cpus();
  475. rd = power_zone_to_rapl_domain(power_zone);
  476. switch (rd->rpl[id].prim_id) {
  477. case PL1_ENABLE:
  478. prim = THERMAL_SPEC_POWER;
  479. break;
  480. case PL2_ENABLE:
  481. prim = MAX_POWER;
  482. break;
  483. default:
  484. put_online_cpus();
  485. return -EINVAL;
  486. }
  487. if (rapl_read_data_raw(rd, prim, true, &val))
  488. ret = -EIO;
  489. else
  490. *data = val;
  491. put_online_cpus();
  492. return ret;
  493. }
  494. static struct powercap_zone_constraint_ops constraint_ops = {
  495. .set_power_limit_uw = set_power_limit,
  496. .get_power_limit_uw = get_current_power_limit,
  497. .set_time_window_us = set_time_window,
  498. .get_time_window_us = get_time_window,
  499. .get_max_power_uw = get_max_power,
  500. .get_name = get_constraint_name,
  501. };
  502. /* called after domain detection and package level data are set */
  503. static void rapl_init_domains(struct rapl_package *rp)
  504. {
  505. int i;
  506. struct rapl_domain *rd = rp->domains;
  507. for (i = 0; i < RAPL_DOMAIN_MAX; i++) {
  508. unsigned int mask = rp->domain_map & (1 << i);
  509. switch (mask) {
  510. case BIT(RAPL_DOMAIN_PACKAGE):
  511. rd->name = rapl_domain_names[RAPL_DOMAIN_PACKAGE];
  512. rd->id = RAPL_DOMAIN_PACKAGE;
  513. rd->msrs[0] = MSR_PKG_POWER_LIMIT;
  514. rd->msrs[1] = MSR_PKG_ENERGY_STATUS;
  515. rd->msrs[2] = MSR_PKG_PERF_STATUS;
  516. rd->msrs[3] = 0;
  517. rd->msrs[4] = MSR_PKG_POWER_INFO;
  518. rd->rpl[0].prim_id = PL1_ENABLE;
  519. rd->rpl[0].name = pl1_name;
  520. rd->rpl[1].prim_id = PL2_ENABLE;
  521. rd->rpl[1].name = pl2_name;
  522. break;
  523. case BIT(RAPL_DOMAIN_PP0):
  524. rd->name = rapl_domain_names[RAPL_DOMAIN_PP0];
  525. rd->id = RAPL_DOMAIN_PP0;
  526. rd->msrs[0] = MSR_PP0_POWER_LIMIT;
  527. rd->msrs[1] = MSR_PP0_ENERGY_STATUS;
  528. rd->msrs[2] = 0;
  529. rd->msrs[3] = MSR_PP0_POLICY;
  530. rd->msrs[4] = 0;
  531. rd->rpl[0].prim_id = PL1_ENABLE;
  532. rd->rpl[0].name = pl1_name;
  533. break;
  534. case BIT(RAPL_DOMAIN_PP1):
  535. rd->name = rapl_domain_names[RAPL_DOMAIN_PP1];
  536. rd->id = RAPL_DOMAIN_PP1;
  537. rd->msrs[0] = MSR_PP1_POWER_LIMIT;
  538. rd->msrs[1] = MSR_PP1_ENERGY_STATUS;
  539. rd->msrs[2] = 0;
  540. rd->msrs[3] = MSR_PP1_POLICY;
  541. rd->msrs[4] = 0;
  542. rd->rpl[0].prim_id = PL1_ENABLE;
  543. rd->rpl[0].name = pl1_name;
  544. break;
  545. case BIT(RAPL_DOMAIN_DRAM):
  546. rd->name = rapl_domain_names[RAPL_DOMAIN_DRAM];
  547. rd->id = RAPL_DOMAIN_DRAM;
  548. rd->msrs[0] = MSR_DRAM_POWER_LIMIT;
  549. rd->msrs[1] = MSR_DRAM_ENERGY_STATUS;
  550. rd->msrs[2] = MSR_DRAM_PERF_STATUS;
  551. rd->msrs[3] = 0;
  552. rd->msrs[4] = MSR_DRAM_POWER_INFO;
  553. rd->rpl[0].prim_id = PL1_ENABLE;
  554. rd->rpl[0].name = pl1_name;
  555. break;
  556. }
  557. if (mask) {
  558. rd->package_id = rp->id;
  559. rd++;
  560. }
  561. }
  562. }
  563. static u64 rapl_unit_xlate(int package, enum unit_type type, u64 value,
  564. int to_raw)
  565. {
  566. u64 divisor = 1;
  567. int scale = 1; /* scale to user friendly data without floating point */
  568. u64 f, y; /* fraction and exp. used for time unit */
  569. struct rapl_package *rp;
  570. rp = find_package_by_id(package);
  571. if (!rp)
  572. return value;
  573. switch (type) {
  574. case POWER_UNIT:
  575. divisor = rp->power_unit_divisor;
  576. scale = POWER_UNIT_SCALE;
  577. break;
  578. case ENERGY_UNIT:
  579. scale = ENERGY_UNIT_SCALE;
  580. divisor = rp->energy_unit_divisor;
  581. break;
  582. case TIME_UNIT:
  583. divisor = rp->time_unit_divisor;
  584. scale = TIME_UNIT_SCALE;
  585. /* special processing based on 2^Y*(1+F)/4 = val/divisor, refer
  586. * to Intel Software Developer's manual Vol. 3a, CH 14.7.4.
  587. */
  588. if (!to_raw) {
  589. f = (value & 0x60) >> 5;
  590. y = value & 0x1f;
  591. value = (1 << y) * (4 + f) * scale / 4;
  592. return div64_u64(value, divisor);
  593. } else {
  594. do_div(value, scale);
  595. value *= divisor;
  596. y = ilog2(value);
  597. f = div64_u64(4 * (value - (1 << y)), 1 << y);
  598. value = (y & 0x1f) | ((f & 0x3) << 5);
  599. return value;
  600. }
  601. break;
  602. case ARBITRARY_UNIT:
  603. default:
  604. return value;
  605. };
  606. if (to_raw)
  607. return div64_u64(value * divisor, scale);
  608. else
  609. return div64_u64(value * scale, divisor);
  610. }
  611. /* in the order of enum rapl_primitives */
  612. static struct rapl_primitive_info rpi[] = {
  613. /* name, mask, shift, msr index, unit divisor */
  614. PRIMITIVE_INFO_INIT(ENERGY_COUNTER, ENERGY_STATUS_MASK, 0,
  615. RAPL_DOMAIN_MSR_STATUS, ENERGY_UNIT, 0),
  616. PRIMITIVE_INFO_INIT(POWER_LIMIT1, POWER_LIMIT1_MASK, 0,
  617. RAPL_DOMAIN_MSR_LIMIT, POWER_UNIT, 0),
  618. PRIMITIVE_INFO_INIT(POWER_LIMIT2, POWER_LIMIT2_MASK, 32,
  619. RAPL_DOMAIN_MSR_LIMIT, POWER_UNIT, 0),
  620. PRIMITIVE_INFO_INIT(FW_LOCK, POWER_PP_LOCK, 31,
  621. RAPL_DOMAIN_MSR_LIMIT, ARBITRARY_UNIT, 0),
  622. PRIMITIVE_INFO_INIT(PL1_ENABLE, POWER_LIMIT1_ENABLE, 15,
  623. RAPL_DOMAIN_MSR_LIMIT, ARBITRARY_UNIT, 0),
  624. PRIMITIVE_INFO_INIT(PL1_CLAMP, POWER_LIMIT1_CLAMP, 16,
  625. RAPL_DOMAIN_MSR_LIMIT, ARBITRARY_UNIT, 0),
  626. PRIMITIVE_INFO_INIT(PL2_ENABLE, POWER_LIMIT2_ENABLE, 47,
  627. RAPL_DOMAIN_MSR_LIMIT, ARBITRARY_UNIT, 0),
  628. PRIMITIVE_INFO_INIT(PL2_CLAMP, POWER_LIMIT2_CLAMP, 48,
  629. RAPL_DOMAIN_MSR_LIMIT, ARBITRARY_UNIT, 0),
  630. PRIMITIVE_INFO_INIT(TIME_WINDOW1, TIME_WINDOW1_MASK, 17,
  631. RAPL_DOMAIN_MSR_LIMIT, TIME_UNIT, 0),
  632. PRIMITIVE_INFO_INIT(TIME_WINDOW2, TIME_WINDOW2_MASK, 49,
  633. RAPL_DOMAIN_MSR_LIMIT, TIME_UNIT, 0),
  634. PRIMITIVE_INFO_INIT(THERMAL_SPEC_POWER, POWER_INFO_THERMAL_SPEC_MASK,
  635. 0, RAPL_DOMAIN_MSR_INFO, POWER_UNIT, 0),
  636. PRIMITIVE_INFO_INIT(MAX_POWER, POWER_INFO_MAX_MASK, 32,
  637. RAPL_DOMAIN_MSR_INFO, POWER_UNIT, 0),
  638. PRIMITIVE_INFO_INIT(MIN_POWER, POWER_INFO_MIN_MASK, 16,
  639. RAPL_DOMAIN_MSR_INFO, POWER_UNIT, 0),
  640. PRIMITIVE_INFO_INIT(MAX_TIME_WINDOW, POWER_INFO_MAX_TIME_WIN_MASK, 48,
  641. RAPL_DOMAIN_MSR_INFO, TIME_UNIT, 0),
  642. PRIMITIVE_INFO_INIT(THROTTLED_TIME, PERF_STATUS_THROTTLE_TIME_MASK, 0,
  643. RAPL_DOMAIN_MSR_PERF, TIME_UNIT, 0),
  644. PRIMITIVE_INFO_INIT(PRIORITY_LEVEL, PP_POLICY_MASK, 0,
  645. RAPL_DOMAIN_MSR_POLICY, ARBITRARY_UNIT, 0),
  646. /* non-hardware */
  647. PRIMITIVE_INFO_INIT(AVERAGE_POWER, 0, 0, 0, POWER_UNIT,
  648. RAPL_PRIMITIVE_DERIVED),
  649. {NULL, 0, 0, 0},
  650. };
  651. /* Read primitive data based on its related struct rapl_primitive_info.
  652. * if xlate flag is set, return translated data based on data units, i.e.
  653. * time, energy, and power.
  654. * RAPL MSRs are non-architectual and are laid out not consistently across
  655. * domains. Here we use primitive info to allow writing consolidated access
  656. * functions.
  657. * For a given primitive, it is processed by MSR mask and shift. Unit conversion
  658. * is pre-assigned based on RAPL unit MSRs read at init time.
  659. * 63-------------------------- 31--------------------------- 0
  660. * | xxxxx (mask) |
  661. * | |<- shift ----------------|
  662. * 63-------------------------- 31--------------------------- 0
  663. */
  664. static int rapl_read_data_raw(struct rapl_domain *rd,
  665. enum rapl_primitives prim,
  666. bool xlate, u64 *data)
  667. {
  668. u64 value, final;
  669. u32 msr;
  670. struct rapl_primitive_info *rp = &rpi[prim];
  671. int cpu;
  672. if (!rp->name || rp->flag & RAPL_PRIMITIVE_DUMMY)
  673. return -EINVAL;
  674. msr = rd->msrs[rp->id];
  675. if (!msr)
  676. return -EINVAL;
  677. /* use physical package id to look up active cpus */
  678. cpu = find_active_cpu_on_package(rd->package_id);
  679. if (cpu < 0)
  680. return cpu;
  681. /* special-case package domain, which uses a different bit*/
  682. if (prim == FW_LOCK && rd->id == RAPL_DOMAIN_PACKAGE) {
  683. rp->mask = POWER_PACKAGE_LOCK;
  684. rp->shift = 63;
  685. }
  686. /* non-hardware data are collected by the polling thread */
  687. if (rp->flag & RAPL_PRIMITIVE_DERIVED) {
  688. *data = rd->rdd.primitives[prim];
  689. return 0;
  690. }
  691. if (rdmsrl_safe_on_cpu(cpu, msr, &value)) {
  692. pr_debug("failed to read msr 0x%x on cpu %d\n", msr, cpu);
  693. return -EIO;
  694. }
  695. final = value & rp->mask;
  696. final = final >> rp->shift;
  697. if (xlate)
  698. *data = rapl_unit_xlate(rd->package_id, rp->unit, final, 0);
  699. else
  700. *data = final;
  701. return 0;
  702. }
  703. /* Similar use of primitive info in the read counterpart */
  704. static int rapl_write_data_raw(struct rapl_domain *rd,
  705. enum rapl_primitives prim,
  706. unsigned long long value)
  707. {
  708. u64 msr_val;
  709. u32 msr;
  710. struct rapl_primitive_info *rp = &rpi[prim];
  711. int cpu;
  712. cpu = find_active_cpu_on_package(rd->package_id);
  713. if (cpu < 0)
  714. return cpu;
  715. msr = rd->msrs[rp->id];
  716. if (rdmsrl_safe_on_cpu(cpu, msr, &msr_val)) {
  717. dev_dbg(&rd->power_zone.dev,
  718. "failed to read msr 0x%x on cpu %d\n", msr, cpu);
  719. return -EIO;
  720. }
  721. value = rapl_unit_xlate(rd->package_id, rp->unit, value, 1);
  722. msr_val &= ~rp->mask;
  723. msr_val |= value << rp->shift;
  724. if (wrmsrl_safe_on_cpu(cpu, msr, msr_val)) {
  725. dev_dbg(&rd->power_zone.dev,
  726. "failed to write msr 0x%x on cpu %d\n", msr, cpu);
  727. return -EIO;
  728. }
  729. return 0;
  730. }
  731. static const struct x86_cpu_id energy_unit_quirk_ids[] = {
  732. { X86_VENDOR_INTEL, 6, 0x37},/* Valleyview */
  733. {}
  734. };
  735. static int rapl_check_unit(struct rapl_package *rp, int cpu)
  736. {
  737. u64 msr_val;
  738. u32 value;
  739. if (rdmsrl_safe_on_cpu(cpu, MSR_RAPL_POWER_UNIT, &msr_val)) {
  740. pr_err("Failed to read power unit MSR 0x%x on CPU %d, exit.\n",
  741. MSR_RAPL_POWER_UNIT, cpu);
  742. return -ENODEV;
  743. }
  744. /* Raw RAPL data stored in MSRs are in certain scales. We need to
  745. * convert them into standard units based on the divisors reported in
  746. * the RAPL unit MSRs.
  747. * i.e.
  748. * energy unit: 1/enery_unit_divisor Joules
  749. * power unit: 1/power_unit_divisor Watts
  750. * time unit: 1/time_unit_divisor Seconds
  751. */
  752. value = (msr_val & ENERGY_UNIT_MASK) >> ENERGY_UNIT_OFFSET;
  753. /* some CPUs have different way to calculate energy unit */
  754. if (x86_match_cpu(energy_unit_quirk_ids))
  755. rp->energy_unit_divisor = 1000000 / (1 << value);
  756. else
  757. rp->energy_unit_divisor = 1 << value;
  758. value = (msr_val & POWER_UNIT_MASK) >> POWER_UNIT_OFFSET;
  759. rp->power_unit_divisor = 1 << value;
  760. value = (msr_val & TIME_UNIT_MASK) >> TIME_UNIT_OFFSET;
  761. rp->time_unit_divisor = 1 << value;
  762. pr_debug("Physical package %d units: energy=%d, time=%d, power=%d\n",
  763. rp->id,
  764. rp->energy_unit_divisor,
  765. rp->time_unit_divisor,
  766. rp->power_unit_divisor);
  767. return 0;
  768. }
  769. /* REVISIT:
  770. * When package power limit is set artificially low by RAPL, LVT
  771. * thermal interrupt for package power limit should be ignored
  772. * since we are not really exceeding the real limit. The intention
  773. * is to avoid excessive interrupts while we are trying to save power.
  774. * A useful feature might be routing the package_power_limit interrupt
  775. * to userspace via eventfd. once we have a usecase, this is simple
  776. * to do by adding an atomic notifier.
  777. */
  778. static void package_power_limit_irq_save(int package_id)
  779. {
  780. u32 l, h = 0;
  781. int cpu;
  782. struct rapl_package *rp;
  783. rp = find_package_by_id(package_id);
  784. if (!rp)
  785. return;
  786. if (!boot_cpu_has(X86_FEATURE_PTS) || !boot_cpu_has(X86_FEATURE_PLN))
  787. return;
  788. cpu = find_active_cpu_on_package(package_id);
  789. if (cpu < 0)
  790. return;
  791. /* save the state of PLN irq mask bit before disabling it */
  792. rdmsr_safe_on_cpu(cpu, MSR_IA32_PACKAGE_THERM_INTERRUPT, &l, &h);
  793. if (!(rp->power_limit_irq & PACKAGE_PLN_INT_SAVED)) {
  794. rp->power_limit_irq = l & PACKAGE_THERM_INT_PLN_ENABLE;
  795. rp->power_limit_irq |= PACKAGE_PLN_INT_SAVED;
  796. }
  797. l &= ~PACKAGE_THERM_INT_PLN_ENABLE;
  798. wrmsr_on_cpu(cpu, MSR_IA32_PACKAGE_THERM_INTERRUPT, l, h);
  799. }
  800. /* restore per package power limit interrupt enable state */
  801. static void package_power_limit_irq_restore(int package_id)
  802. {
  803. u32 l, h;
  804. int cpu;
  805. struct rapl_package *rp;
  806. rp = find_package_by_id(package_id);
  807. if (!rp)
  808. return;
  809. if (!boot_cpu_has(X86_FEATURE_PTS) || !boot_cpu_has(X86_FEATURE_PLN))
  810. return;
  811. cpu = find_active_cpu_on_package(package_id);
  812. if (cpu < 0)
  813. return;
  814. /* irq enable state not saved, nothing to restore */
  815. if (!(rp->power_limit_irq & PACKAGE_PLN_INT_SAVED))
  816. return;
  817. rdmsr_safe_on_cpu(cpu, MSR_IA32_PACKAGE_THERM_INTERRUPT, &l, &h);
  818. if (rp->power_limit_irq & PACKAGE_THERM_INT_PLN_ENABLE)
  819. l |= PACKAGE_THERM_INT_PLN_ENABLE;
  820. else
  821. l &= ~PACKAGE_THERM_INT_PLN_ENABLE;
  822. wrmsr_on_cpu(cpu, MSR_IA32_PACKAGE_THERM_INTERRUPT, l, h);
  823. }
  824. static const struct x86_cpu_id rapl_ids[] = {
  825. { X86_VENDOR_INTEL, 6, 0x2a},/* Sandy Bridge */
  826. { X86_VENDOR_INTEL, 6, 0x2d},/* Sandy Bridge EP */
  827. { X86_VENDOR_INTEL, 6, 0x37},/* Valleyview */
  828. { X86_VENDOR_INTEL, 6, 0x3a},/* Ivy Bridge */
  829. { X86_VENDOR_INTEL, 6, 0x3c},/* Haswell */
  830. { X86_VENDOR_INTEL, 6, 0x3d},/* Broadwell */
  831. { X86_VENDOR_INTEL, 6, 0x3f},/* Haswell */
  832. { X86_VENDOR_INTEL, 6, 0x45},/* Haswell ULT */
  833. /* TODO: Add more CPU IDs after testing */
  834. {}
  835. };
  836. MODULE_DEVICE_TABLE(x86cpu, rapl_ids);
  837. /* read once for all raw primitive data for all packages, domains */
  838. static void rapl_update_domain_data(void)
  839. {
  840. int dmn, prim;
  841. u64 val;
  842. struct rapl_package *rp;
  843. list_for_each_entry(rp, &rapl_packages, plist) {
  844. for (dmn = 0; dmn < rp->nr_domains; dmn++) {
  845. pr_debug("update package %d domain %s data\n", rp->id,
  846. rp->domains[dmn].name);
  847. /* exclude non-raw primitives */
  848. for (prim = 0; prim < NR_RAW_PRIMITIVES; prim++)
  849. if (!rapl_read_data_raw(&rp->domains[dmn], prim,
  850. rpi[prim].unit,
  851. &val))
  852. rp->domains[dmn].rdd.primitives[prim] =
  853. val;
  854. }
  855. }
  856. }
  857. static int rapl_unregister_powercap(void)
  858. {
  859. struct rapl_package *rp;
  860. struct rapl_domain *rd, *rd_package = NULL;
  861. /* unregister all active rapl packages from the powercap layer,
  862. * hotplug lock held
  863. */
  864. list_for_each_entry(rp, &rapl_packages, plist) {
  865. package_power_limit_irq_restore(rp->id);
  866. for (rd = rp->domains; rd < rp->domains + rp->nr_domains;
  867. rd++) {
  868. pr_debug("remove package, undo power limit on %d: %s\n",
  869. rp->id, rd->name);
  870. rapl_write_data_raw(rd, PL1_ENABLE, 0);
  871. rapl_write_data_raw(rd, PL2_ENABLE, 0);
  872. rapl_write_data_raw(rd, PL1_CLAMP, 0);
  873. rapl_write_data_raw(rd, PL2_CLAMP, 0);
  874. if (rd->id == RAPL_DOMAIN_PACKAGE) {
  875. rd_package = rd;
  876. continue;
  877. }
  878. powercap_unregister_zone(control_type, &rd->power_zone);
  879. }
  880. /* do the package zone last */
  881. if (rd_package)
  882. powercap_unregister_zone(control_type,
  883. &rd_package->power_zone);
  884. }
  885. powercap_unregister_control_type(control_type);
  886. return 0;
  887. }
  888. static int rapl_package_register_powercap(struct rapl_package *rp)
  889. {
  890. struct rapl_domain *rd;
  891. int ret = 0;
  892. char dev_name[17]; /* max domain name = 7 + 1 + 8 for int + 1 for null*/
  893. struct powercap_zone *power_zone = NULL;
  894. int nr_pl;
  895. /* first we register package domain as the parent zone*/
  896. for (rd = rp->domains; rd < rp->domains + rp->nr_domains; rd++) {
  897. if (rd->id == RAPL_DOMAIN_PACKAGE) {
  898. nr_pl = find_nr_power_limit(rd);
  899. pr_debug("register socket %d package domain %s\n",
  900. rp->id, rd->name);
  901. memset(dev_name, 0, sizeof(dev_name));
  902. snprintf(dev_name, sizeof(dev_name), "%s-%d",
  903. rd->name, rp->id);
  904. power_zone = powercap_register_zone(&rd->power_zone,
  905. control_type,
  906. dev_name, NULL,
  907. &zone_ops[rd->id],
  908. nr_pl,
  909. &constraint_ops);
  910. if (IS_ERR(power_zone)) {
  911. pr_debug("failed to register package, %d\n",
  912. rp->id);
  913. ret = PTR_ERR(power_zone);
  914. goto exit_package;
  915. }
  916. /* track parent zone in per package/socket data */
  917. rp->power_zone = power_zone;
  918. /* done, only one package domain per socket */
  919. break;
  920. }
  921. }
  922. if (!power_zone) {
  923. pr_err("no package domain found, unknown topology!\n");
  924. ret = -ENODEV;
  925. goto exit_package;
  926. }
  927. /* now register domains as children of the socket/package*/
  928. for (rd = rp->domains; rd < rp->domains + rp->nr_domains; rd++) {
  929. if (rd->id == RAPL_DOMAIN_PACKAGE)
  930. continue;
  931. /* number of power limits per domain varies */
  932. nr_pl = find_nr_power_limit(rd);
  933. power_zone = powercap_register_zone(&rd->power_zone,
  934. control_type, rd->name,
  935. rp->power_zone,
  936. &zone_ops[rd->id], nr_pl,
  937. &constraint_ops);
  938. if (IS_ERR(power_zone)) {
  939. pr_debug("failed to register power_zone, %d:%s:%s\n",
  940. rp->id, rd->name, dev_name);
  941. ret = PTR_ERR(power_zone);
  942. goto err_cleanup;
  943. }
  944. }
  945. exit_package:
  946. return ret;
  947. err_cleanup:
  948. /* clean up previously initialized domains within the package if we
  949. * failed after the first domain setup.
  950. */
  951. while (--rd >= rp->domains) {
  952. pr_debug("unregister package %d domain %s\n", rp->id, rd->name);
  953. powercap_unregister_zone(control_type, &rd->power_zone);
  954. }
  955. return ret;
  956. }
  957. static int rapl_register_powercap(void)
  958. {
  959. struct rapl_domain *rd;
  960. struct rapl_package *rp;
  961. int ret = 0;
  962. control_type = powercap_register_control_type(NULL, "intel-rapl", NULL);
  963. if (IS_ERR(control_type)) {
  964. pr_debug("failed to register powercap control_type.\n");
  965. return PTR_ERR(control_type);
  966. }
  967. /* read the initial data */
  968. rapl_update_domain_data();
  969. list_for_each_entry(rp, &rapl_packages, plist)
  970. if (rapl_package_register_powercap(rp))
  971. goto err_cleanup_package;
  972. return ret;
  973. err_cleanup_package:
  974. /* clean up previously initialized packages */
  975. list_for_each_entry_continue_reverse(rp, &rapl_packages, plist) {
  976. for (rd = rp->domains; rd < rp->domains + rp->nr_domains;
  977. rd++) {
  978. pr_debug("unregister zone/package %d, %s domain\n",
  979. rp->id, rd->name);
  980. powercap_unregister_zone(control_type, &rd->power_zone);
  981. }
  982. }
  983. return ret;
  984. }
  985. static int rapl_check_domain(int cpu, int domain)
  986. {
  987. unsigned msr;
  988. u64 val = 0;
  989. switch (domain) {
  990. case RAPL_DOMAIN_PACKAGE:
  991. msr = MSR_PKG_ENERGY_STATUS;
  992. break;
  993. case RAPL_DOMAIN_PP0:
  994. msr = MSR_PP0_ENERGY_STATUS;
  995. break;
  996. case RAPL_DOMAIN_PP1:
  997. msr = MSR_PP1_ENERGY_STATUS;
  998. break;
  999. case RAPL_DOMAIN_DRAM:
  1000. msr = MSR_DRAM_ENERGY_STATUS;
  1001. break;
  1002. default:
  1003. pr_err("invalid domain id %d\n", domain);
  1004. return -EINVAL;
  1005. }
  1006. /* make sure domain counters are available and contains non-zero
  1007. * values, otherwise skip it.
  1008. */
  1009. if (rdmsrl_safe_on_cpu(cpu, msr, &val) || !val)
  1010. return -ENODEV;
  1011. return 0;
  1012. }
  1013. /* Detect active and valid domains for the given CPU, caller must
  1014. * ensure the CPU belongs to the targeted package and CPU hotlug is disabled.
  1015. */
  1016. static int rapl_detect_domains(struct rapl_package *rp, int cpu)
  1017. {
  1018. int i;
  1019. int ret = 0;
  1020. struct rapl_domain *rd;
  1021. u64 locked;
  1022. for (i = 0; i < RAPL_DOMAIN_MAX; i++) {
  1023. /* use physical package id to read counters */
  1024. if (!rapl_check_domain(cpu, i)) {
  1025. rp->domain_map |= 1 << i;
  1026. pr_info("Found RAPL domain %s\n", rapl_domain_names[i]);
  1027. }
  1028. }
  1029. rp->nr_domains = bitmap_weight(&rp->domain_map, RAPL_DOMAIN_MAX);
  1030. if (!rp->nr_domains) {
  1031. pr_err("no valid rapl domains found in package %d\n", rp->id);
  1032. ret = -ENODEV;
  1033. goto done;
  1034. }
  1035. pr_debug("found %d domains on package %d\n", rp->nr_domains, rp->id);
  1036. rp->domains = kcalloc(rp->nr_domains + 1, sizeof(struct rapl_domain),
  1037. GFP_KERNEL);
  1038. if (!rp->domains) {
  1039. ret = -ENOMEM;
  1040. goto done;
  1041. }
  1042. rapl_init_domains(rp);
  1043. for (rd = rp->domains; rd < rp->domains + rp->nr_domains; rd++) {
  1044. /* check if the domain is locked by BIOS */
  1045. if (rapl_read_data_raw(rd, FW_LOCK, false, &locked)) {
  1046. pr_info("RAPL package %d domain %s locked by BIOS\n",
  1047. rp->id, rd->name);
  1048. rd->state |= DOMAIN_STATE_BIOS_LOCKED;
  1049. }
  1050. }
  1051. done:
  1052. return ret;
  1053. }
  1054. static bool is_package_new(int package)
  1055. {
  1056. struct rapl_package *rp;
  1057. /* caller prevents cpu hotplug, there will be no new packages added
  1058. * or deleted while traversing the package list, no need for locking.
  1059. */
  1060. list_for_each_entry(rp, &rapl_packages, plist)
  1061. if (package == rp->id)
  1062. return false;
  1063. return true;
  1064. }
  1065. /* RAPL interface can be made of a two-level hierarchy: package level and domain
  1066. * level. We first detect the number of packages then domains of each package.
  1067. * We have to consider the possiblity of CPU online/offline due to hotplug and
  1068. * other scenarios.
  1069. */
  1070. static int rapl_detect_topology(void)
  1071. {
  1072. int i;
  1073. int phy_package_id;
  1074. struct rapl_package *new_package, *rp;
  1075. for_each_online_cpu(i) {
  1076. phy_package_id = topology_physical_package_id(i);
  1077. if (is_package_new(phy_package_id)) {
  1078. new_package = kzalloc(sizeof(*rp), GFP_KERNEL);
  1079. if (!new_package) {
  1080. rapl_cleanup_data();
  1081. return -ENOMEM;
  1082. }
  1083. /* add the new package to the list */
  1084. new_package->id = phy_package_id;
  1085. new_package->nr_cpus = 1;
  1086. /* check if the package contains valid domains */
  1087. if (rapl_detect_domains(new_package, i) ||
  1088. rapl_check_unit(new_package, i)) {
  1089. kfree(new_package->domains);
  1090. kfree(new_package);
  1091. /* free up the packages already initialized */
  1092. rapl_cleanup_data();
  1093. return -ENODEV;
  1094. }
  1095. INIT_LIST_HEAD(&new_package->plist);
  1096. list_add(&new_package->plist, &rapl_packages);
  1097. } else {
  1098. rp = find_package_by_id(phy_package_id);
  1099. if (rp)
  1100. ++rp->nr_cpus;
  1101. }
  1102. }
  1103. return 0;
  1104. }
  1105. /* called from CPU hotplug notifier, hotplug lock held */
  1106. static void rapl_remove_package(struct rapl_package *rp)
  1107. {
  1108. struct rapl_domain *rd, *rd_package = NULL;
  1109. for (rd = rp->domains; rd < rp->domains + rp->nr_domains; rd++) {
  1110. if (rd->id == RAPL_DOMAIN_PACKAGE) {
  1111. rd_package = rd;
  1112. continue;
  1113. }
  1114. pr_debug("remove package %d, %s domain\n", rp->id, rd->name);
  1115. powercap_unregister_zone(control_type, &rd->power_zone);
  1116. }
  1117. /* do parent zone last */
  1118. powercap_unregister_zone(control_type, &rd_package->power_zone);
  1119. list_del(&rp->plist);
  1120. kfree(rp);
  1121. }
  1122. /* called from CPU hotplug notifier, hotplug lock held */
  1123. static int rapl_add_package(int cpu)
  1124. {
  1125. int ret = 0;
  1126. int phy_package_id;
  1127. struct rapl_package *rp;
  1128. phy_package_id = topology_physical_package_id(cpu);
  1129. rp = kzalloc(sizeof(struct rapl_package), GFP_KERNEL);
  1130. if (!rp)
  1131. return -ENOMEM;
  1132. /* add the new package to the list */
  1133. rp->id = phy_package_id;
  1134. rp->nr_cpus = 1;
  1135. /* check if the package contains valid domains */
  1136. if (rapl_detect_domains(rp, cpu) ||
  1137. rapl_check_unit(rp, cpu)) {
  1138. ret = -ENODEV;
  1139. goto err_free_package;
  1140. }
  1141. if (!rapl_package_register_powercap(rp)) {
  1142. INIT_LIST_HEAD(&rp->plist);
  1143. list_add(&rp->plist, &rapl_packages);
  1144. return ret;
  1145. }
  1146. err_free_package:
  1147. kfree(rp->domains);
  1148. kfree(rp);
  1149. return ret;
  1150. }
  1151. /* Handles CPU hotplug on multi-socket systems.
  1152. * If a CPU goes online as the first CPU of the physical package
  1153. * we add the RAPL package to the system. Similarly, when the last
  1154. * CPU of the package is removed, we remove the RAPL package and its
  1155. * associated domains. Cooling devices are handled accordingly at
  1156. * per-domain level.
  1157. */
  1158. static int rapl_cpu_callback(struct notifier_block *nfb,
  1159. unsigned long action, void *hcpu)
  1160. {
  1161. unsigned long cpu = (unsigned long)hcpu;
  1162. int phy_package_id;
  1163. struct rapl_package *rp;
  1164. phy_package_id = topology_physical_package_id(cpu);
  1165. switch (action) {
  1166. case CPU_ONLINE:
  1167. case CPU_ONLINE_FROZEN:
  1168. case CPU_DOWN_FAILED:
  1169. case CPU_DOWN_FAILED_FROZEN:
  1170. rp = find_package_by_id(phy_package_id);
  1171. if (rp)
  1172. ++rp->nr_cpus;
  1173. else
  1174. rapl_add_package(cpu);
  1175. break;
  1176. case CPU_DOWN_PREPARE:
  1177. case CPU_DOWN_PREPARE_FROZEN:
  1178. rp = find_package_by_id(phy_package_id);
  1179. if (!rp)
  1180. break;
  1181. if (--rp->nr_cpus == 0)
  1182. rapl_remove_package(rp);
  1183. }
  1184. return NOTIFY_OK;
  1185. }
  1186. static struct notifier_block rapl_cpu_notifier = {
  1187. .notifier_call = rapl_cpu_callback,
  1188. };
  1189. static int __init rapl_init(void)
  1190. {
  1191. int ret = 0;
  1192. if (!x86_match_cpu(rapl_ids)) {
  1193. pr_err("driver does not support CPU family %d model %d\n",
  1194. boot_cpu_data.x86, boot_cpu_data.x86_model);
  1195. return -ENODEV;
  1196. }
  1197. cpu_notifier_register_begin();
  1198. /* prevent CPU hotplug during detection */
  1199. get_online_cpus();
  1200. ret = rapl_detect_topology();
  1201. if (ret)
  1202. goto done;
  1203. if (rapl_register_powercap()) {
  1204. rapl_cleanup_data();
  1205. ret = -ENODEV;
  1206. goto done;
  1207. }
  1208. __register_hotcpu_notifier(&rapl_cpu_notifier);
  1209. done:
  1210. put_online_cpus();
  1211. cpu_notifier_register_done();
  1212. return ret;
  1213. }
  1214. static void __exit rapl_exit(void)
  1215. {
  1216. cpu_notifier_register_begin();
  1217. get_online_cpus();
  1218. __unregister_hotcpu_notifier(&rapl_cpu_notifier);
  1219. rapl_unregister_powercap();
  1220. rapl_cleanup_data();
  1221. put_online_cpus();
  1222. cpu_notifier_register_done();
  1223. }
  1224. module_init(rapl_init);
  1225. module_exit(rapl_exit);
  1226. MODULE_DESCRIPTION("Driver for Intel RAPL (Running Average Power Limit)");
  1227. MODULE_AUTHOR("Jacob Pan <jacob.jun.pan@intel.com>");
  1228. MODULE_LICENSE("GPL v2");