pci-sysfs.c 39 KB

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  1. /*
  2. * drivers/pci/pci-sysfs.c
  3. *
  4. * (C) Copyright 2002-2004 Greg Kroah-Hartman <greg@kroah.com>
  5. * (C) Copyright 2002-2004 IBM Corp.
  6. * (C) Copyright 2003 Matthew Wilcox
  7. * (C) Copyright 2003 Hewlett-Packard
  8. * (C) Copyright 2004 Jon Smirl <jonsmirl@yahoo.com>
  9. * (C) Copyright 2004 Silicon Graphics, Inc. Jesse Barnes <jbarnes@sgi.com>
  10. *
  11. * File attributes for PCI devices
  12. *
  13. * Modeled after usb's driverfs.c
  14. *
  15. */
  16. #include <linux/kernel.h>
  17. #include <linux/sched.h>
  18. #include <linux/pci.h>
  19. #include <linux/stat.h>
  20. #include <linux/export.h>
  21. #include <linux/topology.h>
  22. #include <linux/mm.h>
  23. #include <linux/fs.h>
  24. #include <linux/capability.h>
  25. #include <linux/security.h>
  26. #include <linux/pci-aspm.h>
  27. #include <linux/slab.h>
  28. #include <linux/vgaarb.h>
  29. #include <linux/pm_runtime.h>
  30. #include <linux/of.h>
  31. #include "pci.h"
  32. static int sysfs_initialized; /* = 0 */
  33. /* show configuration fields */
  34. #define pci_config_attr(field, format_string) \
  35. static ssize_t \
  36. field##_show(struct device *dev, struct device_attribute *attr, char *buf) \
  37. { \
  38. struct pci_dev *pdev; \
  39. \
  40. pdev = to_pci_dev(dev); \
  41. return sprintf(buf, format_string, pdev->field); \
  42. } \
  43. static DEVICE_ATTR_RO(field)
  44. pci_config_attr(vendor, "0x%04x\n");
  45. pci_config_attr(device, "0x%04x\n");
  46. pci_config_attr(subsystem_vendor, "0x%04x\n");
  47. pci_config_attr(subsystem_device, "0x%04x\n");
  48. pci_config_attr(class, "0x%06x\n");
  49. pci_config_attr(irq, "%u\n");
  50. static ssize_t broken_parity_status_show(struct device *dev,
  51. struct device_attribute *attr,
  52. char *buf)
  53. {
  54. struct pci_dev *pdev = to_pci_dev(dev);
  55. return sprintf(buf, "%u\n", pdev->broken_parity_status);
  56. }
  57. static ssize_t broken_parity_status_store(struct device *dev,
  58. struct device_attribute *attr,
  59. const char *buf, size_t count)
  60. {
  61. struct pci_dev *pdev = to_pci_dev(dev);
  62. unsigned long val;
  63. if (kstrtoul(buf, 0, &val) < 0)
  64. return -EINVAL;
  65. pdev->broken_parity_status = !!val;
  66. return count;
  67. }
  68. static DEVICE_ATTR_RW(broken_parity_status);
  69. static ssize_t pci_dev_show_local_cpu(struct device *dev, int type,
  70. struct device_attribute *attr, char *buf)
  71. {
  72. const struct cpumask *mask;
  73. int len;
  74. #ifdef CONFIG_NUMA
  75. mask = (dev_to_node(dev) == -1) ? cpu_online_mask :
  76. cpumask_of_node(dev_to_node(dev));
  77. #else
  78. mask = cpumask_of_pcibus(to_pci_dev(dev)->bus);
  79. #endif
  80. len = type ?
  81. cpumask_scnprintf(buf, PAGE_SIZE-2, mask) :
  82. cpulist_scnprintf(buf, PAGE_SIZE-2, mask);
  83. buf[len++] = '\n';
  84. buf[len] = '\0';
  85. return len;
  86. }
  87. static ssize_t local_cpus_show(struct device *dev,
  88. struct device_attribute *attr, char *buf)
  89. {
  90. return pci_dev_show_local_cpu(dev, 1, attr, buf);
  91. }
  92. static DEVICE_ATTR_RO(local_cpus);
  93. static ssize_t local_cpulist_show(struct device *dev,
  94. struct device_attribute *attr, char *buf)
  95. {
  96. return pci_dev_show_local_cpu(dev, 0, attr, buf);
  97. }
  98. static DEVICE_ATTR_RO(local_cpulist);
  99. /*
  100. * PCI Bus Class Devices
  101. */
  102. static ssize_t pci_bus_show_cpuaffinity(struct device *dev, int type,
  103. struct device_attribute *attr,
  104. char *buf)
  105. {
  106. int ret;
  107. const struct cpumask *cpumask;
  108. cpumask = cpumask_of_pcibus(to_pci_bus(dev));
  109. ret = type ?
  110. cpulist_scnprintf(buf, PAGE_SIZE-2, cpumask) :
  111. cpumask_scnprintf(buf, PAGE_SIZE-2, cpumask);
  112. buf[ret++] = '\n';
  113. buf[ret] = '\0';
  114. return ret;
  115. }
  116. static ssize_t cpuaffinity_show(struct device *dev,
  117. struct device_attribute *attr, char *buf)
  118. {
  119. return pci_bus_show_cpuaffinity(dev, 0, attr, buf);
  120. }
  121. static DEVICE_ATTR_RO(cpuaffinity);
  122. static ssize_t cpulistaffinity_show(struct device *dev,
  123. struct device_attribute *attr, char *buf)
  124. {
  125. return pci_bus_show_cpuaffinity(dev, 1, attr, buf);
  126. }
  127. static DEVICE_ATTR_RO(cpulistaffinity);
  128. /* show resources */
  129. static ssize_t resource_show(struct device *dev, struct device_attribute *attr,
  130. char *buf)
  131. {
  132. struct pci_dev *pci_dev = to_pci_dev(dev);
  133. char *str = buf;
  134. int i;
  135. int max;
  136. resource_size_t start, end;
  137. if (pci_dev->subordinate)
  138. max = DEVICE_COUNT_RESOURCE;
  139. else
  140. max = PCI_BRIDGE_RESOURCES;
  141. for (i = 0; i < max; i++) {
  142. struct resource *res = &pci_dev->resource[i];
  143. pci_resource_to_user(pci_dev, i, res, &start, &end);
  144. str += sprintf(str, "0x%016llx 0x%016llx 0x%016llx\n",
  145. (unsigned long long)start,
  146. (unsigned long long)end,
  147. (unsigned long long)res->flags);
  148. }
  149. return (str - buf);
  150. }
  151. static DEVICE_ATTR_RO(resource);
  152. static ssize_t modalias_show(struct device *dev, struct device_attribute *attr,
  153. char *buf)
  154. {
  155. struct pci_dev *pci_dev = to_pci_dev(dev);
  156. return sprintf(buf, "pci:v%08Xd%08Xsv%08Xsd%08Xbc%02Xsc%02Xi%02X\n",
  157. pci_dev->vendor, pci_dev->device,
  158. pci_dev->subsystem_vendor, pci_dev->subsystem_device,
  159. (u8)(pci_dev->class >> 16), (u8)(pci_dev->class >> 8),
  160. (u8)(pci_dev->class));
  161. }
  162. static DEVICE_ATTR_RO(modalias);
  163. static ssize_t enable_store(struct device *dev, struct device_attribute *attr,
  164. const char *buf, size_t count)
  165. {
  166. struct pci_dev *pdev = to_pci_dev(dev);
  167. unsigned long val;
  168. ssize_t result = kstrtoul(buf, 0, &val);
  169. if (result < 0)
  170. return result;
  171. /* this can crash the machine when done on the "wrong" device */
  172. if (!capable(CAP_SYS_ADMIN))
  173. return -EPERM;
  174. if (!val) {
  175. if (pci_is_enabled(pdev))
  176. pci_disable_device(pdev);
  177. else
  178. result = -EIO;
  179. } else
  180. result = pci_enable_device(pdev);
  181. return result < 0 ? result : count;
  182. }
  183. static ssize_t enable_show(struct device *dev, struct device_attribute *attr,
  184. char *buf)
  185. {
  186. struct pci_dev *pdev;
  187. pdev = to_pci_dev(dev);
  188. return sprintf(buf, "%u\n", atomic_read(&pdev->enable_cnt));
  189. }
  190. static DEVICE_ATTR_RW(enable);
  191. #ifdef CONFIG_NUMA
  192. static ssize_t numa_node_show(struct device *dev, struct device_attribute *attr,
  193. char *buf)
  194. {
  195. return sprintf(buf, "%d\n", dev->numa_node);
  196. }
  197. static DEVICE_ATTR_RO(numa_node);
  198. #endif
  199. static ssize_t dma_mask_bits_show(struct device *dev,
  200. struct device_attribute *attr, char *buf)
  201. {
  202. struct pci_dev *pdev = to_pci_dev(dev);
  203. return sprintf(buf, "%d\n", fls64(pdev->dma_mask));
  204. }
  205. static DEVICE_ATTR_RO(dma_mask_bits);
  206. static ssize_t consistent_dma_mask_bits_show(struct device *dev,
  207. struct device_attribute *attr,
  208. char *buf)
  209. {
  210. return sprintf(buf, "%d\n", fls64(dev->coherent_dma_mask));
  211. }
  212. static DEVICE_ATTR_RO(consistent_dma_mask_bits);
  213. static ssize_t msi_bus_show(struct device *dev, struct device_attribute *attr,
  214. char *buf)
  215. {
  216. struct pci_dev *pdev = to_pci_dev(dev);
  217. struct pci_bus *subordinate = pdev->subordinate;
  218. return sprintf(buf, "%u\n", subordinate ?
  219. !(subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI)
  220. : !pdev->no_msi);
  221. }
  222. static ssize_t msi_bus_store(struct device *dev, struct device_attribute *attr,
  223. const char *buf, size_t count)
  224. {
  225. struct pci_dev *pdev = to_pci_dev(dev);
  226. struct pci_bus *subordinate = pdev->subordinate;
  227. unsigned long val;
  228. if (kstrtoul(buf, 0, &val) < 0)
  229. return -EINVAL;
  230. if (!capable(CAP_SYS_ADMIN))
  231. return -EPERM;
  232. /*
  233. * "no_msi" and "bus_flags" only affect what happens when a driver
  234. * requests MSI or MSI-X. They don't affect any drivers that have
  235. * already requested MSI or MSI-X.
  236. */
  237. if (!subordinate) {
  238. pdev->no_msi = !val;
  239. dev_info(&pdev->dev, "MSI/MSI-X %s for future drivers\n",
  240. val ? "allowed" : "disallowed");
  241. return count;
  242. }
  243. if (val)
  244. subordinate->bus_flags &= ~PCI_BUS_FLAGS_NO_MSI;
  245. else
  246. subordinate->bus_flags |= PCI_BUS_FLAGS_NO_MSI;
  247. dev_info(&subordinate->dev, "MSI/MSI-X %s for future drivers of devices on this bus\n",
  248. val ? "allowed" : "disallowed");
  249. return count;
  250. }
  251. static DEVICE_ATTR_RW(msi_bus);
  252. static ssize_t bus_rescan_store(struct bus_type *bus, const char *buf,
  253. size_t count)
  254. {
  255. unsigned long val;
  256. struct pci_bus *b = NULL;
  257. if (kstrtoul(buf, 0, &val) < 0)
  258. return -EINVAL;
  259. if (val) {
  260. pci_lock_rescan_remove();
  261. while ((b = pci_find_next_bus(b)) != NULL)
  262. pci_rescan_bus(b);
  263. pci_unlock_rescan_remove();
  264. }
  265. return count;
  266. }
  267. static BUS_ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, bus_rescan_store);
  268. static struct attribute *pci_bus_attrs[] = {
  269. &bus_attr_rescan.attr,
  270. NULL,
  271. };
  272. static const struct attribute_group pci_bus_group = {
  273. .attrs = pci_bus_attrs,
  274. };
  275. const struct attribute_group *pci_bus_groups[] = {
  276. &pci_bus_group,
  277. NULL,
  278. };
  279. static ssize_t dev_rescan_store(struct device *dev,
  280. struct device_attribute *attr, const char *buf,
  281. size_t count)
  282. {
  283. unsigned long val;
  284. struct pci_dev *pdev = to_pci_dev(dev);
  285. if (kstrtoul(buf, 0, &val) < 0)
  286. return -EINVAL;
  287. if (val) {
  288. pci_lock_rescan_remove();
  289. pci_rescan_bus(pdev->bus);
  290. pci_unlock_rescan_remove();
  291. }
  292. return count;
  293. }
  294. static struct device_attribute dev_rescan_attr = __ATTR(rescan,
  295. (S_IWUSR|S_IWGRP),
  296. NULL, dev_rescan_store);
  297. static ssize_t remove_store(struct device *dev, struct device_attribute *attr,
  298. const char *buf, size_t count)
  299. {
  300. unsigned long val;
  301. if (kstrtoul(buf, 0, &val) < 0)
  302. return -EINVAL;
  303. if (val && device_remove_file_self(dev, attr))
  304. pci_stop_and_remove_bus_device_locked(to_pci_dev(dev));
  305. return count;
  306. }
  307. static struct device_attribute dev_remove_attr = __ATTR(remove,
  308. (S_IWUSR|S_IWGRP),
  309. NULL, remove_store);
  310. static ssize_t dev_bus_rescan_store(struct device *dev,
  311. struct device_attribute *attr,
  312. const char *buf, size_t count)
  313. {
  314. unsigned long val;
  315. struct pci_bus *bus = to_pci_bus(dev);
  316. if (kstrtoul(buf, 0, &val) < 0)
  317. return -EINVAL;
  318. if (val) {
  319. pci_lock_rescan_remove();
  320. if (!pci_is_root_bus(bus) && list_empty(&bus->devices))
  321. pci_rescan_bus_bridge_resize(bus->self);
  322. else
  323. pci_rescan_bus(bus);
  324. pci_unlock_rescan_remove();
  325. }
  326. return count;
  327. }
  328. static DEVICE_ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, dev_bus_rescan_store);
  329. #if defined(CONFIG_PM_RUNTIME) && defined(CONFIG_ACPI)
  330. static ssize_t d3cold_allowed_store(struct device *dev,
  331. struct device_attribute *attr,
  332. const char *buf, size_t count)
  333. {
  334. struct pci_dev *pdev = to_pci_dev(dev);
  335. unsigned long val;
  336. if (kstrtoul(buf, 0, &val) < 0)
  337. return -EINVAL;
  338. pdev->d3cold_allowed = !!val;
  339. pm_runtime_resume(dev);
  340. return count;
  341. }
  342. static ssize_t d3cold_allowed_show(struct device *dev,
  343. struct device_attribute *attr, char *buf)
  344. {
  345. struct pci_dev *pdev = to_pci_dev(dev);
  346. return sprintf(buf, "%u\n", pdev->d3cold_allowed);
  347. }
  348. static DEVICE_ATTR_RW(d3cold_allowed);
  349. #endif
  350. #ifdef CONFIG_OF
  351. static ssize_t devspec_show(struct device *dev,
  352. struct device_attribute *attr, char *buf)
  353. {
  354. struct pci_dev *pdev = to_pci_dev(dev);
  355. struct device_node *np = pci_device_to_OF_node(pdev);
  356. if (np == NULL || np->full_name == NULL)
  357. return 0;
  358. return sprintf(buf, "%s", np->full_name);
  359. }
  360. static DEVICE_ATTR_RO(devspec);
  361. #endif
  362. #ifdef CONFIG_PCI_IOV
  363. static ssize_t sriov_totalvfs_show(struct device *dev,
  364. struct device_attribute *attr,
  365. char *buf)
  366. {
  367. struct pci_dev *pdev = to_pci_dev(dev);
  368. return sprintf(buf, "%u\n", pci_sriov_get_totalvfs(pdev));
  369. }
  370. static ssize_t sriov_numvfs_show(struct device *dev,
  371. struct device_attribute *attr,
  372. char *buf)
  373. {
  374. struct pci_dev *pdev = to_pci_dev(dev);
  375. return sprintf(buf, "%u\n", pdev->sriov->num_VFs);
  376. }
  377. /*
  378. * num_vfs > 0; number of VFs to enable
  379. * num_vfs = 0; disable all VFs
  380. *
  381. * Note: SRIOV spec doesn't allow partial VF
  382. * disable, so it's all or none.
  383. */
  384. static ssize_t sriov_numvfs_store(struct device *dev,
  385. struct device_attribute *attr,
  386. const char *buf, size_t count)
  387. {
  388. struct pci_dev *pdev = to_pci_dev(dev);
  389. int ret;
  390. u16 num_vfs;
  391. ret = kstrtou16(buf, 0, &num_vfs);
  392. if (ret < 0)
  393. return ret;
  394. if (num_vfs > pci_sriov_get_totalvfs(pdev))
  395. return -ERANGE;
  396. if (num_vfs == pdev->sriov->num_VFs)
  397. return count; /* no change */
  398. /* is PF driver loaded w/callback */
  399. if (!pdev->driver || !pdev->driver->sriov_configure) {
  400. dev_info(&pdev->dev, "Driver doesn't support SRIOV configuration via sysfs\n");
  401. return -ENOSYS;
  402. }
  403. if (num_vfs == 0) {
  404. /* disable VFs */
  405. ret = pdev->driver->sriov_configure(pdev, 0);
  406. if (ret < 0)
  407. return ret;
  408. return count;
  409. }
  410. /* enable VFs */
  411. if (pdev->sriov->num_VFs) {
  412. dev_warn(&pdev->dev, "%d VFs already enabled. Disable before enabling %d VFs\n",
  413. pdev->sriov->num_VFs, num_vfs);
  414. return -EBUSY;
  415. }
  416. ret = pdev->driver->sriov_configure(pdev, num_vfs);
  417. if (ret < 0)
  418. return ret;
  419. if (ret != num_vfs)
  420. dev_warn(&pdev->dev, "%d VFs requested; only %d enabled\n",
  421. num_vfs, ret);
  422. return count;
  423. }
  424. static struct device_attribute sriov_totalvfs_attr = __ATTR_RO(sriov_totalvfs);
  425. static struct device_attribute sriov_numvfs_attr =
  426. __ATTR(sriov_numvfs, (S_IRUGO|S_IWUSR|S_IWGRP),
  427. sriov_numvfs_show, sriov_numvfs_store);
  428. #endif /* CONFIG_PCI_IOV */
  429. static ssize_t driver_override_store(struct device *dev,
  430. struct device_attribute *attr,
  431. const char *buf, size_t count)
  432. {
  433. struct pci_dev *pdev = to_pci_dev(dev);
  434. char *driver_override, *old = pdev->driver_override, *cp;
  435. if (count > PATH_MAX)
  436. return -EINVAL;
  437. driver_override = kstrndup(buf, count, GFP_KERNEL);
  438. if (!driver_override)
  439. return -ENOMEM;
  440. cp = strchr(driver_override, '\n');
  441. if (cp)
  442. *cp = '\0';
  443. if (strlen(driver_override)) {
  444. pdev->driver_override = driver_override;
  445. } else {
  446. kfree(driver_override);
  447. pdev->driver_override = NULL;
  448. }
  449. kfree(old);
  450. return count;
  451. }
  452. static ssize_t driver_override_show(struct device *dev,
  453. struct device_attribute *attr, char *buf)
  454. {
  455. struct pci_dev *pdev = to_pci_dev(dev);
  456. return sprintf(buf, "%s\n", pdev->driver_override);
  457. }
  458. static DEVICE_ATTR_RW(driver_override);
  459. static struct attribute *pci_dev_attrs[] = {
  460. &dev_attr_resource.attr,
  461. &dev_attr_vendor.attr,
  462. &dev_attr_device.attr,
  463. &dev_attr_subsystem_vendor.attr,
  464. &dev_attr_subsystem_device.attr,
  465. &dev_attr_class.attr,
  466. &dev_attr_irq.attr,
  467. &dev_attr_local_cpus.attr,
  468. &dev_attr_local_cpulist.attr,
  469. &dev_attr_modalias.attr,
  470. #ifdef CONFIG_NUMA
  471. &dev_attr_numa_node.attr,
  472. #endif
  473. &dev_attr_dma_mask_bits.attr,
  474. &dev_attr_consistent_dma_mask_bits.attr,
  475. &dev_attr_enable.attr,
  476. &dev_attr_broken_parity_status.attr,
  477. &dev_attr_msi_bus.attr,
  478. #if defined(CONFIG_PM_RUNTIME) && defined(CONFIG_ACPI)
  479. &dev_attr_d3cold_allowed.attr,
  480. #endif
  481. #ifdef CONFIG_OF
  482. &dev_attr_devspec.attr,
  483. #endif
  484. &dev_attr_driver_override.attr,
  485. NULL,
  486. };
  487. static const struct attribute_group pci_dev_group = {
  488. .attrs = pci_dev_attrs,
  489. };
  490. const struct attribute_group *pci_dev_groups[] = {
  491. &pci_dev_group,
  492. NULL,
  493. };
  494. static struct attribute *pcibus_attrs[] = {
  495. &dev_attr_rescan.attr,
  496. &dev_attr_cpuaffinity.attr,
  497. &dev_attr_cpulistaffinity.attr,
  498. NULL,
  499. };
  500. static const struct attribute_group pcibus_group = {
  501. .attrs = pcibus_attrs,
  502. };
  503. const struct attribute_group *pcibus_groups[] = {
  504. &pcibus_group,
  505. NULL,
  506. };
  507. static ssize_t boot_vga_show(struct device *dev, struct device_attribute *attr,
  508. char *buf)
  509. {
  510. struct pci_dev *pdev = to_pci_dev(dev);
  511. struct pci_dev *vga_dev = vga_default_device();
  512. if (vga_dev)
  513. return sprintf(buf, "%u\n", (pdev == vga_dev));
  514. return sprintf(buf, "%u\n",
  515. !!(pdev->resource[PCI_ROM_RESOURCE].flags &
  516. IORESOURCE_ROM_SHADOW));
  517. }
  518. static struct device_attribute vga_attr = __ATTR_RO(boot_vga);
  519. static ssize_t pci_read_config(struct file *filp, struct kobject *kobj,
  520. struct bin_attribute *bin_attr, char *buf,
  521. loff_t off, size_t count)
  522. {
  523. struct pci_dev *dev = to_pci_dev(container_of(kobj, struct device,
  524. kobj));
  525. unsigned int size = 64;
  526. loff_t init_off = off;
  527. u8 *data = (u8 *) buf;
  528. /* Several chips lock up trying to read undefined config space */
  529. if (security_capable(filp->f_cred, &init_user_ns, CAP_SYS_ADMIN) == 0)
  530. size = dev->cfg_size;
  531. else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS)
  532. size = 128;
  533. if (off > size)
  534. return 0;
  535. if (off + count > size) {
  536. size -= off;
  537. count = size;
  538. } else {
  539. size = count;
  540. }
  541. pci_config_pm_runtime_get(dev);
  542. if ((off & 1) && size) {
  543. u8 val;
  544. pci_user_read_config_byte(dev, off, &val);
  545. data[off - init_off] = val;
  546. off++;
  547. size--;
  548. }
  549. if ((off & 3) && size > 2) {
  550. u16 val;
  551. pci_user_read_config_word(dev, off, &val);
  552. data[off - init_off] = val & 0xff;
  553. data[off - init_off + 1] = (val >> 8) & 0xff;
  554. off += 2;
  555. size -= 2;
  556. }
  557. while (size > 3) {
  558. u32 val;
  559. pci_user_read_config_dword(dev, off, &val);
  560. data[off - init_off] = val & 0xff;
  561. data[off - init_off + 1] = (val >> 8) & 0xff;
  562. data[off - init_off + 2] = (val >> 16) & 0xff;
  563. data[off - init_off + 3] = (val >> 24) & 0xff;
  564. off += 4;
  565. size -= 4;
  566. }
  567. if (size >= 2) {
  568. u16 val;
  569. pci_user_read_config_word(dev, off, &val);
  570. data[off - init_off] = val & 0xff;
  571. data[off - init_off + 1] = (val >> 8) & 0xff;
  572. off += 2;
  573. size -= 2;
  574. }
  575. if (size > 0) {
  576. u8 val;
  577. pci_user_read_config_byte(dev, off, &val);
  578. data[off - init_off] = val;
  579. off++;
  580. --size;
  581. }
  582. pci_config_pm_runtime_put(dev);
  583. return count;
  584. }
  585. static ssize_t pci_write_config(struct file *filp, struct kobject *kobj,
  586. struct bin_attribute *bin_attr, char *buf,
  587. loff_t off, size_t count)
  588. {
  589. struct pci_dev *dev = to_pci_dev(container_of(kobj, struct device,
  590. kobj));
  591. unsigned int size = count;
  592. loff_t init_off = off;
  593. u8 *data = (u8 *) buf;
  594. if (off > dev->cfg_size)
  595. return 0;
  596. if (off + count > dev->cfg_size) {
  597. size = dev->cfg_size - off;
  598. count = size;
  599. }
  600. pci_config_pm_runtime_get(dev);
  601. if ((off & 1) && size) {
  602. pci_user_write_config_byte(dev, off, data[off - init_off]);
  603. off++;
  604. size--;
  605. }
  606. if ((off & 3) && size > 2) {
  607. u16 val = data[off - init_off];
  608. val |= (u16) data[off - init_off + 1] << 8;
  609. pci_user_write_config_word(dev, off, val);
  610. off += 2;
  611. size -= 2;
  612. }
  613. while (size > 3) {
  614. u32 val = data[off - init_off];
  615. val |= (u32) data[off - init_off + 1] << 8;
  616. val |= (u32) data[off - init_off + 2] << 16;
  617. val |= (u32) data[off - init_off + 3] << 24;
  618. pci_user_write_config_dword(dev, off, val);
  619. off += 4;
  620. size -= 4;
  621. }
  622. if (size >= 2) {
  623. u16 val = data[off - init_off];
  624. val |= (u16) data[off - init_off + 1] << 8;
  625. pci_user_write_config_word(dev, off, val);
  626. off += 2;
  627. size -= 2;
  628. }
  629. if (size) {
  630. pci_user_write_config_byte(dev, off, data[off - init_off]);
  631. off++;
  632. --size;
  633. }
  634. pci_config_pm_runtime_put(dev);
  635. return count;
  636. }
  637. static ssize_t read_vpd_attr(struct file *filp, struct kobject *kobj,
  638. struct bin_attribute *bin_attr, char *buf,
  639. loff_t off, size_t count)
  640. {
  641. struct pci_dev *dev =
  642. to_pci_dev(container_of(kobj, struct device, kobj));
  643. if (off > bin_attr->size)
  644. count = 0;
  645. else if (count > bin_attr->size - off)
  646. count = bin_attr->size - off;
  647. return pci_read_vpd(dev, off, count, buf);
  648. }
  649. static ssize_t write_vpd_attr(struct file *filp, struct kobject *kobj,
  650. struct bin_attribute *bin_attr, char *buf,
  651. loff_t off, size_t count)
  652. {
  653. struct pci_dev *dev =
  654. to_pci_dev(container_of(kobj, struct device, kobj));
  655. if (off > bin_attr->size)
  656. count = 0;
  657. else if (count > bin_attr->size - off)
  658. count = bin_attr->size - off;
  659. return pci_write_vpd(dev, off, count, buf);
  660. }
  661. #ifdef HAVE_PCI_LEGACY
  662. /**
  663. * pci_read_legacy_io - read byte(s) from legacy I/O port space
  664. * @filp: open sysfs file
  665. * @kobj: kobject corresponding to file to read from
  666. * @bin_attr: struct bin_attribute for this file
  667. * @buf: buffer to store results
  668. * @off: offset into legacy I/O port space
  669. * @count: number of bytes to read
  670. *
  671. * Reads 1, 2, or 4 bytes from legacy I/O port space using an arch specific
  672. * callback routine (pci_legacy_read).
  673. */
  674. static ssize_t pci_read_legacy_io(struct file *filp, struct kobject *kobj,
  675. struct bin_attribute *bin_attr, char *buf,
  676. loff_t off, size_t count)
  677. {
  678. struct pci_bus *bus = to_pci_bus(container_of(kobj, struct device,
  679. kobj));
  680. /* Only support 1, 2 or 4 byte accesses */
  681. if (count != 1 && count != 2 && count != 4)
  682. return -EINVAL;
  683. return pci_legacy_read(bus, off, (u32 *)buf, count);
  684. }
  685. /**
  686. * pci_write_legacy_io - write byte(s) to legacy I/O port space
  687. * @filp: open sysfs file
  688. * @kobj: kobject corresponding to file to read from
  689. * @bin_attr: struct bin_attribute for this file
  690. * @buf: buffer containing value to be written
  691. * @off: offset into legacy I/O port space
  692. * @count: number of bytes to write
  693. *
  694. * Writes 1, 2, or 4 bytes from legacy I/O port space using an arch specific
  695. * callback routine (pci_legacy_write).
  696. */
  697. static ssize_t pci_write_legacy_io(struct file *filp, struct kobject *kobj,
  698. struct bin_attribute *bin_attr, char *buf,
  699. loff_t off, size_t count)
  700. {
  701. struct pci_bus *bus = to_pci_bus(container_of(kobj, struct device,
  702. kobj));
  703. /* Only support 1, 2 or 4 byte accesses */
  704. if (count != 1 && count != 2 && count != 4)
  705. return -EINVAL;
  706. return pci_legacy_write(bus, off, *(u32 *)buf, count);
  707. }
  708. /**
  709. * pci_mmap_legacy_mem - map legacy PCI memory into user memory space
  710. * @filp: open sysfs file
  711. * @kobj: kobject corresponding to device to be mapped
  712. * @attr: struct bin_attribute for this file
  713. * @vma: struct vm_area_struct passed to mmap
  714. *
  715. * Uses an arch specific callback, pci_mmap_legacy_mem_page_range, to mmap
  716. * legacy memory space (first meg of bus space) into application virtual
  717. * memory space.
  718. */
  719. static int pci_mmap_legacy_mem(struct file *filp, struct kobject *kobj,
  720. struct bin_attribute *attr,
  721. struct vm_area_struct *vma)
  722. {
  723. struct pci_bus *bus = to_pci_bus(container_of(kobj, struct device,
  724. kobj));
  725. return pci_mmap_legacy_page_range(bus, vma, pci_mmap_mem);
  726. }
  727. /**
  728. * pci_mmap_legacy_io - map legacy PCI IO into user memory space
  729. * @filp: open sysfs file
  730. * @kobj: kobject corresponding to device to be mapped
  731. * @attr: struct bin_attribute for this file
  732. * @vma: struct vm_area_struct passed to mmap
  733. *
  734. * Uses an arch specific callback, pci_mmap_legacy_io_page_range, to mmap
  735. * legacy IO space (first meg of bus space) into application virtual
  736. * memory space. Returns -ENOSYS if the operation isn't supported
  737. */
  738. static int pci_mmap_legacy_io(struct file *filp, struct kobject *kobj,
  739. struct bin_attribute *attr,
  740. struct vm_area_struct *vma)
  741. {
  742. struct pci_bus *bus = to_pci_bus(container_of(kobj, struct device,
  743. kobj));
  744. return pci_mmap_legacy_page_range(bus, vma, pci_mmap_io);
  745. }
  746. /**
  747. * pci_adjust_legacy_attr - adjustment of legacy file attributes
  748. * @b: bus to create files under
  749. * @mmap_type: I/O port or memory
  750. *
  751. * Stub implementation. Can be overridden by arch if necessary.
  752. */
  753. void __weak pci_adjust_legacy_attr(struct pci_bus *b,
  754. enum pci_mmap_state mmap_type)
  755. {
  756. }
  757. /**
  758. * pci_create_legacy_files - create legacy I/O port and memory files
  759. * @b: bus to create files under
  760. *
  761. * Some platforms allow access to legacy I/O port and ISA memory space on
  762. * a per-bus basis. This routine creates the files and ties them into
  763. * their associated read, write and mmap files from pci-sysfs.c
  764. *
  765. * On error unwind, but don't propagate the error to the caller
  766. * as it is ok to set up the PCI bus without these files.
  767. */
  768. void pci_create_legacy_files(struct pci_bus *b)
  769. {
  770. int error;
  771. b->legacy_io = kzalloc(sizeof(struct bin_attribute) * 2,
  772. GFP_ATOMIC);
  773. if (!b->legacy_io)
  774. goto kzalloc_err;
  775. sysfs_bin_attr_init(b->legacy_io);
  776. b->legacy_io->attr.name = "legacy_io";
  777. b->legacy_io->size = 0xffff;
  778. b->legacy_io->attr.mode = S_IRUSR | S_IWUSR;
  779. b->legacy_io->read = pci_read_legacy_io;
  780. b->legacy_io->write = pci_write_legacy_io;
  781. b->legacy_io->mmap = pci_mmap_legacy_io;
  782. pci_adjust_legacy_attr(b, pci_mmap_io);
  783. error = device_create_bin_file(&b->dev, b->legacy_io);
  784. if (error)
  785. goto legacy_io_err;
  786. /* Allocated above after the legacy_io struct */
  787. b->legacy_mem = b->legacy_io + 1;
  788. sysfs_bin_attr_init(b->legacy_mem);
  789. b->legacy_mem->attr.name = "legacy_mem";
  790. b->legacy_mem->size = 1024*1024;
  791. b->legacy_mem->attr.mode = S_IRUSR | S_IWUSR;
  792. b->legacy_mem->mmap = pci_mmap_legacy_mem;
  793. pci_adjust_legacy_attr(b, pci_mmap_mem);
  794. error = device_create_bin_file(&b->dev, b->legacy_mem);
  795. if (error)
  796. goto legacy_mem_err;
  797. return;
  798. legacy_mem_err:
  799. device_remove_bin_file(&b->dev, b->legacy_io);
  800. legacy_io_err:
  801. kfree(b->legacy_io);
  802. b->legacy_io = NULL;
  803. kzalloc_err:
  804. printk(KERN_WARNING "pci: warning: could not create legacy I/O port and ISA memory resources to sysfs\n");
  805. return;
  806. }
  807. void pci_remove_legacy_files(struct pci_bus *b)
  808. {
  809. if (b->legacy_io) {
  810. device_remove_bin_file(&b->dev, b->legacy_io);
  811. device_remove_bin_file(&b->dev, b->legacy_mem);
  812. kfree(b->legacy_io); /* both are allocated here */
  813. }
  814. }
  815. #endif /* HAVE_PCI_LEGACY */
  816. #ifdef HAVE_PCI_MMAP
  817. int pci_mmap_fits(struct pci_dev *pdev, int resno, struct vm_area_struct *vma,
  818. enum pci_mmap_api mmap_api)
  819. {
  820. unsigned long nr, start, size, pci_start;
  821. if (pci_resource_len(pdev, resno) == 0)
  822. return 0;
  823. nr = vma_pages(vma);
  824. start = vma->vm_pgoff;
  825. size = ((pci_resource_len(pdev, resno) - 1) >> PAGE_SHIFT) + 1;
  826. pci_start = (mmap_api == PCI_MMAP_PROCFS) ?
  827. pci_resource_start(pdev, resno) >> PAGE_SHIFT : 0;
  828. if (start >= pci_start && start < pci_start + size &&
  829. start + nr <= pci_start + size)
  830. return 1;
  831. return 0;
  832. }
  833. /**
  834. * pci_mmap_resource - map a PCI resource into user memory space
  835. * @kobj: kobject for mapping
  836. * @attr: struct bin_attribute for the file being mapped
  837. * @vma: struct vm_area_struct passed into the mmap
  838. * @write_combine: 1 for write_combine mapping
  839. *
  840. * Use the regular PCI mapping routines to map a PCI resource into userspace.
  841. */
  842. static int pci_mmap_resource(struct kobject *kobj, struct bin_attribute *attr,
  843. struct vm_area_struct *vma, int write_combine)
  844. {
  845. struct pci_dev *pdev = to_pci_dev(container_of(kobj,
  846. struct device, kobj));
  847. struct resource *res = attr->private;
  848. enum pci_mmap_state mmap_type;
  849. resource_size_t start, end;
  850. int i;
  851. for (i = 0; i < PCI_ROM_RESOURCE; i++)
  852. if (res == &pdev->resource[i])
  853. break;
  854. if (i >= PCI_ROM_RESOURCE)
  855. return -ENODEV;
  856. if (!pci_mmap_fits(pdev, i, vma, PCI_MMAP_SYSFS)) {
  857. WARN(1, "process \"%s\" tried to map 0x%08lx bytes at page 0x%08lx on %s BAR %d (start 0x%16Lx, size 0x%16Lx)\n",
  858. current->comm, vma->vm_end-vma->vm_start, vma->vm_pgoff,
  859. pci_name(pdev), i,
  860. (u64)pci_resource_start(pdev, i),
  861. (u64)pci_resource_len(pdev, i));
  862. return -EINVAL;
  863. }
  864. /* pci_mmap_page_range() expects the same kind of entry as coming
  865. * from /proc/bus/pci/ which is a "user visible" value. If this is
  866. * different from the resource itself, arch will do necessary fixup.
  867. */
  868. pci_resource_to_user(pdev, i, res, &start, &end);
  869. vma->vm_pgoff += start >> PAGE_SHIFT;
  870. mmap_type = res->flags & IORESOURCE_MEM ? pci_mmap_mem : pci_mmap_io;
  871. if (res->flags & IORESOURCE_MEM && iomem_is_exclusive(start))
  872. return -EINVAL;
  873. return pci_mmap_page_range(pdev, vma, mmap_type, write_combine);
  874. }
  875. static int pci_mmap_resource_uc(struct file *filp, struct kobject *kobj,
  876. struct bin_attribute *attr,
  877. struct vm_area_struct *vma)
  878. {
  879. return pci_mmap_resource(kobj, attr, vma, 0);
  880. }
  881. static int pci_mmap_resource_wc(struct file *filp, struct kobject *kobj,
  882. struct bin_attribute *attr,
  883. struct vm_area_struct *vma)
  884. {
  885. return pci_mmap_resource(kobj, attr, vma, 1);
  886. }
  887. static ssize_t pci_resource_io(struct file *filp, struct kobject *kobj,
  888. struct bin_attribute *attr, char *buf,
  889. loff_t off, size_t count, bool write)
  890. {
  891. struct pci_dev *pdev = to_pci_dev(container_of(kobj,
  892. struct device, kobj));
  893. struct resource *res = attr->private;
  894. unsigned long port = off;
  895. int i;
  896. for (i = 0; i < PCI_ROM_RESOURCE; i++)
  897. if (res == &pdev->resource[i])
  898. break;
  899. if (i >= PCI_ROM_RESOURCE)
  900. return -ENODEV;
  901. port += pci_resource_start(pdev, i);
  902. if (port > pci_resource_end(pdev, i))
  903. return 0;
  904. if (port + count - 1 > pci_resource_end(pdev, i))
  905. return -EINVAL;
  906. switch (count) {
  907. case 1:
  908. if (write)
  909. outb(*(u8 *)buf, port);
  910. else
  911. *(u8 *)buf = inb(port);
  912. return 1;
  913. case 2:
  914. if (write)
  915. outw(*(u16 *)buf, port);
  916. else
  917. *(u16 *)buf = inw(port);
  918. return 2;
  919. case 4:
  920. if (write)
  921. outl(*(u32 *)buf, port);
  922. else
  923. *(u32 *)buf = inl(port);
  924. return 4;
  925. }
  926. return -EINVAL;
  927. }
  928. static ssize_t pci_read_resource_io(struct file *filp, struct kobject *kobj,
  929. struct bin_attribute *attr, char *buf,
  930. loff_t off, size_t count)
  931. {
  932. return pci_resource_io(filp, kobj, attr, buf, off, count, false);
  933. }
  934. static ssize_t pci_write_resource_io(struct file *filp, struct kobject *kobj,
  935. struct bin_attribute *attr, char *buf,
  936. loff_t off, size_t count)
  937. {
  938. return pci_resource_io(filp, kobj, attr, buf, off, count, true);
  939. }
  940. /**
  941. * pci_remove_resource_files - cleanup resource files
  942. * @pdev: dev to cleanup
  943. *
  944. * If we created resource files for @pdev, remove them from sysfs and
  945. * free their resources.
  946. */
  947. static void pci_remove_resource_files(struct pci_dev *pdev)
  948. {
  949. int i;
  950. for (i = 0; i < PCI_ROM_RESOURCE; i++) {
  951. struct bin_attribute *res_attr;
  952. res_attr = pdev->res_attr[i];
  953. if (res_attr) {
  954. sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
  955. kfree(res_attr);
  956. }
  957. res_attr = pdev->res_attr_wc[i];
  958. if (res_attr) {
  959. sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
  960. kfree(res_attr);
  961. }
  962. }
  963. }
  964. static int pci_create_attr(struct pci_dev *pdev, int num, int write_combine)
  965. {
  966. /* allocate attribute structure, piggyback attribute name */
  967. int name_len = write_combine ? 13 : 10;
  968. struct bin_attribute *res_attr;
  969. int retval;
  970. res_attr = kzalloc(sizeof(*res_attr) + name_len, GFP_ATOMIC);
  971. if (res_attr) {
  972. char *res_attr_name = (char *)(res_attr + 1);
  973. sysfs_bin_attr_init(res_attr);
  974. if (write_combine) {
  975. pdev->res_attr_wc[num] = res_attr;
  976. sprintf(res_attr_name, "resource%d_wc", num);
  977. res_attr->mmap = pci_mmap_resource_wc;
  978. } else {
  979. pdev->res_attr[num] = res_attr;
  980. sprintf(res_attr_name, "resource%d", num);
  981. res_attr->mmap = pci_mmap_resource_uc;
  982. }
  983. if (pci_resource_flags(pdev, num) & IORESOURCE_IO) {
  984. res_attr->read = pci_read_resource_io;
  985. res_attr->write = pci_write_resource_io;
  986. }
  987. res_attr->attr.name = res_attr_name;
  988. res_attr->attr.mode = S_IRUSR | S_IWUSR;
  989. res_attr->size = pci_resource_len(pdev, num);
  990. res_attr->private = &pdev->resource[num];
  991. retval = sysfs_create_bin_file(&pdev->dev.kobj, res_attr);
  992. } else
  993. retval = -ENOMEM;
  994. return retval;
  995. }
  996. /**
  997. * pci_create_resource_files - create resource files in sysfs for @dev
  998. * @pdev: dev in question
  999. *
  1000. * Walk the resources in @pdev creating files for each resource available.
  1001. */
  1002. static int pci_create_resource_files(struct pci_dev *pdev)
  1003. {
  1004. int i;
  1005. int retval;
  1006. /* Expose the PCI resources from this device as files */
  1007. for (i = 0; i < PCI_ROM_RESOURCE; i++) {
  1008. /* skip empty resources */
  1009. if (!pci_resource_len(pdev, i))
  1010. continue;
  1011. retval = pci_create_attr(pdev, i, 0);
  1012. /* for prefetchable resources, create a WC mappable file */
  1013. if (!retval && pdev->resource[i].flags & IORESOURCE_PREFETCH)
  1014. retval = pci_create_attr(pdev, i, 1);
  1015. if (retval) {
  1016. pci_remove_resource_files(pdev);
  1017. return retval;
  1018. }
  1019. }
  1020. return 0;
  1021. }
  1022. #else /* !HAVE_PCI_MMAP */
  1023. int __weak pci_create_resource_files(struct pci_dev *dev) { return 0; }
  1024. void __weak pci_remove_resource_files(struct pci_dev *dev) { return; }
  1025. #endif /* HAVE_PCI_MMAP */
  1026. /**
  1027. * pci_write_rom - used to enable access to the PCI ROM display
  1028. * @filp: sysfs file
  1029. * @kobj: kernel object handle
  1030. * @bin_attr: struct bin_attribute for this file
  1031. * @buf: user input
  1032. * @off: file offset
  1033. * @count: number of byte in input
  1034. *
  1035. * writing anything except 0 enables it
  1036. */
  1037. static ssize_t pci_write_rom(struct file *filp, struct kobject *kobj,
  1038. struct bin_attribute *bin_attr, char *buf,
  1039. loff_t off, size_t count)
  1040. {
  1041. struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj));
  1042. if ((off == 0) && (*buf == '0') && (count == 2))
  1043. pdev->rom_attr_enabled = 0;
  1044. else
  1045. pdev->rom_attr_enabled = 1;
  1046. return count;
  1047. }
  1048. /**
  1049. * pci_read_rom - read a PCI ROM
  1050. * @filp: sysfs file
  1051. * @kobj: kernel object handle
  1052. * @bin_attr: struct bin_attribute for this file
  1053. * @buf: where to put the data we read from the ROM
  1054. * @off: file offset
  1055. * @count: number of bytes to read
  1056. *
  1057. * Put @count bytes starting at @off into @buf from the ROM in the PCI
  1058. * device corresponding to @kobj.
  1059. */
  1060. static ssize_t pci_read_rom(struct file *filp, struct kobject *kobj,
  1061. struct bin_attribute *bin_attr, char *buf,
  1062. loff_t off, size_t count)
  1063. {
  1064. struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj));
  1065. void __iomem *rom;
  1066. size_t size;
  1067. if (!pdev->rom_attr_enabled)
  1068. return -EINVAL;
  1069. rom = pci_map_rom(pdev, &size); /* size starts out as PCI window size */
  1070. if (!rom || !size)
  1071. return -EIO;
  1072. if (off >= size)
  1073. count = 0;
  1074. else {
  1075. if (off + count > size)
  1076. count = size - off;
  1077. memcpy_fromio(buf, rom + off, count);
  1078. }
  1079. pci_unmap_rom(pdev, rom);
  1080. return count;
  1081. }
  1082. static struct bin_attribute pci_config_attr = {
  1083. .attr = {
  1084. .name = "config",
  1085. .mode = S_IRUGO | S_IWUSR,
  1086. },
  1087. .size = PCI_CFG_SPACE_SIZE,
  1088. .read = pci_read_config,
  1089. .write = pci_write_config,
  1090. };
  1091. static struct bin_attribute pcie_config_attr = {
  1092. .attr = {
  1093. .name = "config",
  1094. .mode = S_IRUGO | S_IWUSR,
  1095. },
  1096. .size = PCI_CFG_SPACE_EXP_SIZE,
  1097. .read = pci_read_config,
  1098. .write = pci_write_config,
  1099. };
  1100. static ssize_t reset_store(struct device *dev, struct device_attribute *attr,
  1101. const char *buf, size_t count)
  1102. {
  1103. struct pci_dev *pdev = to_pci_dev(dev);
  1104. unsigned long val;
  1105. ssize_t result = kstrtoul(buf, 0, &val);
  1106. if (result < 0)
  1107. return result;
  1108. if (val != 1)
  1109. return -EINVAL;
  1110. result = pci_reset_function(pdev);
  1111. if (result < 0)
  1112. return result;
  1113. return count;
  1114. }
  1115. static struct device_attribute reset_attr = __ATTR(reset, 0200, NULL, reset_store);
  1116. static int pci_create_capabilities_sysfs(struct pci_dev *dev)
  1117. {
  1118. int retval;
  1119. struct bin_attribute *attr;
  1120. /* If the device has VPD, try to expose it in sysfs. */
  1121. if (dev->vpd) {
  1122. attr = kzalloc(sizeof(*attr), GFP_ATOMIC);
  1123. if (!attr)
  1124. return -ENOMEM;
  1125. sysfs_bin_attr_init(attr);
  1126. attr->size = dev->vpd->len;
  1127. attr->attr.name = "vpd";
  1128. attr->attr.mode = S_IRUSR | S_IWUSR;
  1129. attr->read = read_vpd_attr;
  1130. attr->write = write_vpd_attr;
  1131. retval = sysfs_create_bin_file(&dev->dev.kobj, attr);
  1132. if (retval) {
  1133. kfree(attr);
  1134. return retval;
  1135. }
  1136. dev->vpd->attr = attr;
  1137. }
  1138. /* Active State Power Management */
  1139. pcie_aspm_create_sysfs_dev_files(dev);
  1140. if (!pci_probe_reset_function(dev)) {
  1141. retval = device_create_file(&dev->dev, &reset_attr);
  1142. if (retval)
  1143. goto error;
  1144. dev->reset_fn = 1;
  1145. }
  1146. return 0;
  1147. error:
  1148. pcie_aspm_remove_sysfs_dev_files(dev);
  1149. if (dev->vpd && dev->vpd->attr) {
  1150. sysfs_remove_bin_file(&dev->dev.kobj, dev->vpd->attr);
  1151. kfree(dev->vpd->attr);
  1152. }
  1153. return retval;
  1154. }
  1155. int __must_check pci_create_sysfs_dev_files(struct pci_dev *pdev)
  1156. {
  1157. int retval;
  1158. int rom_size = 0;
  1159. struct bin_attribute *attr;
  1160. if (!sysfs_initialized)
  1161. return -EACCES;
  1162. if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE)
  1163. retval = sysfs_create_bin_file(&pdev->dev.kobj, &pci_config_attr);
  1164. else
  1165. retval = sysfs_create_bin_file(&pdev->dev.kobj, &pcie_config_attr);
  1166. if (retval)
  1167. goto err;
  1168. retval = pci_create_resource_files(pdev);
  1169. if (retval)
  1170. goto err_config_file;
  1171. if (pci_resource_len(pdev, PCI_ROM_RESOURCE))
  1172. rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
  1173. else if (pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW)
  1174. rom_size = 0x20000;
  1175. /* If the device has a ROM, try to expose it in sysfs. */
  1176. if (rom_size) {
  1177. attr = kzalloc(sizeof(*attr), GFP_ATOMIC);
  1178. if (!attr) {
  1179. retval = -ENOMEM;
  1180. goto err_resource_files;
  1181. }
  1182. sysfs_bin_attr_init(attr);
  1183. attr->size = rom_size;
  1184. attr->attr.name = "rom";
  1185. attr->attr.mode = S_IRUSR | S_IWUSR;
  1186. attr->read = pci_read_rom;
  1187. attr->write = pci_write_rom;
  1188. retval = sysfs_create_bin_file(&pdev->dev.kobj, attr);
  1189. if (retval) {
  1190. kfree(attr);
  1191. goto err_resource_files;
  1192. }
  1193. pdev->rom_attr = attr;
  1194. }
  1195. /* add sysfs entries for various capabilities */
  1196. retval = pci_create_capabilities_sysfs(pdev);
  1197. if (retval)
  1198. goto err_rom_file;
  1199. pci_create_firmware_label_files(pdev);
  1200. return 0;
  1201. err_rom_file:
  1202. if (rom_size) {
  1203. sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
  1204. kfree(pdev->rom_attr);
  1205. pdev->rom_attr = NULL;
  1206. }
  1207. err_resource_files:
  1208. pci_remove_resource_files(pdev);
  1209. err_config_file:
  1210. if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE)
  1211. sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
  1212. else
  1213. sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
  1214. err:
  1215. return retval;
  1216. }
  1217. static void pci_remove_capabilities_sysfs(struct pci_dev *dev)
  1218. {
  1219. if (dev->vpd && dev->vpd->attr) {
  1220. sysfs_remove_bin_file(&dev->dev.kobj, dev->vpd->attr);
  1221. kfree(dev->vpd->attr);
  1222. }
  1223. pcie_aspm_remove_sysfs_dev_files(dev);
  1224. if (dev->reset_fn) {
  1225. device_remove_file(&dev->dev, &reset_attr);
  1226. dev->reset_fn = 0;
  1227. }
  1228. }
  1229. /**
  1230. * pci_remove_sysfs_dev_files - cleanup PCI specific sysfs files
  1231. * @pdev: device whose entries we should free
  1232. *
  1233. * Cleanup when @pdev is removed from sysfs.
  1234. */
  1235. void pci_remove_sysfs_dev_files(struct pci_dev *pdev)
  1236. {
  1237. int rom_size = 0;
  1238. if (!sysfs_initialized)
  1239. return;
  1240. pci_remove_capabilities_sysfs(pdev);
  1241. if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE)
  1242. sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
  1243. else
  1244. sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
  1245. pci_remove_resource_files(pdev);
  1246. if (pci_resource_len(pdev, PCI_ROM_RESOURCE))
  1247. rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
  1248. else if (pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW)
  1249. rom_size = 0x20000;
  1250. if (rom_size && pdev->rom_attr) {
  1251. sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
  1252. kfree(pdev->rom_attr);
  1253. }
  1254. pci_remove_firmware_label_files(pdev);
  1255. }
  1256. static int __init pci_sysfs_init(void)
  1257. {
  1258. struct pci_dev *pdev = NULL;
  1259. int retval;
  1260. sysfs_initialized = 1;
  1261. for_each_pci_dev(pdev) {
  1262. retval = pci_create_sysfs_dev_files(pdev);
  1263. if (retval) {
  1264. pci_dev_put(pdev);
  1265. return retval;
  1266. }
  1267. }
  1268. return 0;
  1269. }
  1270. late_initcall(pci_sysfs_init);
  1271. static struct attribute *pci_dev_dev_attrs[] = {
  1272. &vga_attr.attr,
  1273. NULL,
  1274. };
  1275. static umode_t pci_dev_attrs_are_visible(struct kobject *kobj,
  1276. struct attribute *a, int n)
  1277. {
  1278. struct device *dev = container_of(kobj, struct device, kobj);
  1279. struct pci_dev *pdev = to_pci_dev(dev);
  1280. if (a == &vga_attr.attr)
  1281. if ((pdev->class >> 8) != PCI_CLASS_DISPLAY_VGA)
  1282. return 0;
  1283. return a->mode;
  1284. }
  1285. static struct attribute *pci_dev_hp_attrs[] = {
  1286. &dev_remove_attr.attr,
  1287. &dev_rescan_attr.attr,
  1288. NULL,
  1289. };
  1290. static umode_t pci_dev_hp_attrs_are_visible(struct kobject *kobj,
  1291. struct attribute *a, int n)
  1292. {
  1293. struct device *dev = container_of(kobj, struct device, kobj);
  1294. struct pci_dev *pdev = to_pci_dev(dev);
  1295. if (pdev->is_virtfn)
  1296. return 0;
  1297. return a->mode;
  1298. }
  1299. static struct attribute_group pci_dev_hp_attr_group = {
  1300. .attrs = pci_dev_hp_attrs,
  1301. .is_visible = pci_dev_hp_attrs_are_visible,
  1302. };
  1303. #ifdef CONFIG_PCI_IOV
  1304. static struct attribute *sriov_dev_attrs[] = {
  1305. &sriov_totalvfs_attr.attr,
  1306. &sriov_numvfs_attr.attr,
  1307. NULL,
  1308. };
  1309. static umode_t sriov_attrs_are_visible(struct kobject *kobj,
  1310. struct attribute *a, int n)
  1311. {
  1312. struct device *dev = container_of(kobj, struct device, kobj);
  1313. if (!dev_is_pf(dev))
  1314. return 0;
  1315. return a->mode;
  1316. }
  1317. static struct attribute_group sriov_dev_attr_group = {
  1318. .attrs = sriov_dev_attrs,
  1319. .is_visible = sriov_attrs_are_visible,
  1320. };
  1321. #endif /* CONFIG_PCI_IOV */
  1322. static struct attribute_group pci_dev_attr_group = {
  1323. .attrs = pci_dev_dev_attrs,
  1324. .is_visible = pci_dev_attrs_are_visible,
  1325. };
  1326. static const struct attribute_group *pci_dev_attr_groups[] = {
  1327. &pci_dev_attr_group,
  1328. &pci_dev_hp_attr_group,
  1329. #ifdef CONFIG_PCI_IOV
  1330. &sriov_dev_attr_group,
  1331. #endif
  1332. NULL,
  1333. };
  1334. struct device_type pci_dev_type = {
  1335. .groups = pci_dev_attr_groups,
  1336. };