rt2x00queue.c 34 KB

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  1. /*
  2. Copyright (C) 2010 Willow Garage <http://www.willowgarage.com>
  3. Copyright (C) 2004 - 2010 Ivo van Doorn <IvDoorn@gmail.com>
  4. Copyright (C) 2004 - 2009 Gertjan van Wingerde <gwingerde@gmail.com>
  5. <http://rt2x00.serialmonkey.com>
  6. This program is free software; you can redistribute it and/or modify
  7. it under the terms of the GNU General Public License as published by
  8. the Free Software Foundation; either version 2 of the License, or
  9. (at your option) any later version.
  10. This program is distributed in the hope that it will be useful,
  11. but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. GNU General Public License for more details.
  14. You should have received a copy of the GNU General Public License
  15. along with this program; if not, see <http://www.gnu.org/licenses/>.
  16. */
  17. /*
  18. Module: rt2x00lib
  19. Abstract: rt2x00 queue specific routines.
  20. */
  21. #include <linux/slab.h>
  22. #include <linux/kernel.h>
  23. #include <linux/module.h>
  24. #include <linux/dma-mapping.h>
  25. #include "rt2x00.h"
  26. #include "rt2x00lib.h"
  27. struct sk_buff *rt2x00queue_alloc_rxskb(struct queue_entry *entry, gfp_t gfp)
  28. {
  29. struct data_queue *queue = entry->queue;
  30. struct rt2x00_dev *rt2x00dev = queue->rt2x00dev;
  31. struct sk_buff *skb;
  32. struct skb_frame_desc *skbdesc;
  33. unsigned int frame_size;
  34. unsigned int head_size = 0;
  35. unsigned int tail_size = 0;
  36. /*
  37. * The frame size includes descriptor size, because the
  38. * hardware directly receive the frame into the skbuffer.
  39. */
  40. frame_size = queue->data_size + queue->desc_size + queue->winfo_size;
  41. /*
  42. * The payload should be aligned to a 4-byte boundary,
  43. * this means we need at least 3 bytes for moving the frame
  44. * into the correct offset.
  45. */
  46. head_size = 4;
  47. /*
  48. * For IV/EIV/ICV assembly we must make sure there is
  49. * at least 8 bytes bytes available in headroom for IV/EIV
  50. * and 8 bytes for ICV data as tailroon.
  51. */
  52. if (rt2x00_has_cap_hw_crypto(rt2x00dev)) {
  53. head_size += 8;
  54. tail_size += 8;
  55. }
  56. /*
  57. * Allocate skbuffer.
  58. */
  59. skb = __dev_alloc_skb(frame_size + head_size + tail_size, gfp);
  60. if (!skb)
  61. return NULL;
  62. /*
  63. * Make sure we not have a frame with the requested bytes
  64. * available in the head and tail.
  65. */
  66. skb_reserve(skb, head_size);
  67. skb_put(skb, frame_size);
  68. /*
  69. * Populate skbdesc.
  70. */
  71. skbdesc = get_skb_frame_desc(skb);
  72. memset(skbdesc, 0, sizeof(*skbdesc));
  73. skbdesc->entry = entry;
  74. if (test_bit(REQUIRE_DMA, &rt2x00dev->cap_flags)) {
  75. dma_addr_t skb_dma;
  76. skb_dma = dma_map_single(rt2x00dev->dev, skb->data, skb->len,
  77. DMA_FROM_DEVICE);
  78. if (unlikely(dma_mapping_error(rt2x00dev->dev, skb_dma))) {
  79. dev_kfree_skb_any(skb);
  80. return NULL;
  81. }
  82. skbdesc->skb_dma = skb_dma;
  83. skbdesc->flags |= SKBDESC_DMA_MAPPED_RX;
  84. }
  85. return skb;
  86. }
  87. int rt2x00queue_map_txskb(struct queue_entry *entry)
  88. {
  89. struct device *dev = entry->queue->rt2x00dev->dev;
  90. struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb);
  91. skbdesc->skb_dma =
  92. dma_map_single(dev, entry->skb->data, entry->skb->len, DMA_TO_DEVICE);
  93. if (unlikely(dma_mapping_error(dev, skbdesc->skb_dma)))
  94. return -ENOMEM;
  95. skbdesc->flags |= SKBDESC_DMA_MAPPED_TX;
  96. return 0;
  97. }
  98. EXPORT_SYMBOL_GPL(rt2x00queue_map_txskb);
  99. void rt2x00queue_unmap_skb(struct queue_entry *entry)
  100. {
  101. struct device *dev = entry->queue->rt2x00dev->dev;
  102. struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb);
  103. if (skbdesc->flags & SKBDESC_DMA_MAPPED_RX) {
  104. dma_unmap_single(dev, skbdesc->skb_dma, entry->skb->len,
  105. DMA_FROM_DEVICE);
  106. skbdesc->flags &= ~SKBDESC_DMA_MAPPED_RX;
  107. } else if (skbdesc->flags & SKBDESC_DMA_MAPPED_TX) {
  108. dma_unmap_single(dev, skbdesc->skb_dma, entry->skb->len,
  109. DMA_TO_DEVICE);
  110. skbdesc->flags &= ~SKBDESC_DMA_MAPPED_TX;
  111. }
  112. }
  113. EXPORT_SYMBOL_GPL(rt2x00queue_unmap_skb);
  114. void rt2x00queue_free_skb(struct queue_entry *entry)
  115. {
  116. if (!entry->skb)
  117. return;
  118. rt2x00queue_unmap_skb(entry);
  119. dev_kfree_skb_any(entry->skb);
  120. entry->skb = NULL;
  121. }
  122. void rt2x00queue_align_frame(struct sk_buff *skb)
  123. {
  124. unsigned int frame_length = skb->len;
  125. unsigned int align = ALIGN_SIZE(skb, 0);
  126. if (!align)
  127. return;
  128. skb_push(skb, align);
  129. memmove(skb->data, skb->data + align, frame_length);
  130. skb_trim(skb, frame_length);
  131. }
  132. void rt2x00queue_insert_l2pad(struct sk_buff *skb, unsigned int header_length)
  133. {
  134. unsigned int payload_length = skb->len - header_length;
  135. unsigned int header_align = ALIGN_SIZE(skb, 0);
  136. unsigned int payload_align = ALIGN_SIZE(skb, header_length);
  137. unsigned int l2pad = payload_length ? L2PAD_SIZE(header_length) : 0;
  138. /*
  139. * Adjust the header alignment if the payload needs to be moved more
  140. * than the header.
  141. */
  142. if (payload_align > header_align)
  143. header_align += 4;
  144. /* There is nothing to do if no alignment is needed */
  145. if (!header_align)
  146. return;
  147. /* Reserve the amount of space needed in front of the frame */
  148. skb_push(skb, header_align);
  149. /*
  150. * Move the header.
  151. */
  152. memmove(skb->data, skb->data + header_align, header_length);
  153. /* Move the payload, if present and if required */
  154. if (payload_length && payload_align)
  155. memmove(skb->data + header_length + l2pad,
  156. skb->data + header_length + l2pad + payload_align,
  157. payload_length);
  158. /* Trim the skb to the correct size */
  159. skb_trim(skb, header_length + l2pad + payload_length);
  160. }
  161. void rt2x00queue_remove_l2pad(struct sk_buff *skb, unsigned int header_length)
  162. {
  163. /*
  164. * L2 padding is only present if the skb contains more than just the
  165. * IEEE 802.11 header.
  166. */
  167. unsigned int l2pad = (skb->len > header_length) ?
  168. L2PAD_SIZE(header_length) : 0;
  169. if (!l2pad)
  170. return;
  171. memmove(skb->data + l2pad, skb->data, header_length);
  172. skb_pull(skb, l2pad);
  173. }
  174. static void rt2x00queue_create_tx_descriptor_seq(struct rt2x00_dev *rt2x00dev,
  175. struct sk_buff *skb,
  176. struct txentry_desc *txdesc)
  177. {
  178. struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
  179. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  180. struct rt2x00_intf *intf = vif_to_intf(tx_info->control.vif);
  181. u16 seqno;
  182. if (!(tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ))
  183. return;
  184. __set_bit(ENTRY_TXD_GENERATE_SEQ, &txdesc->flags);
  185. if (!test_bit(REQUIRE_SW_SEQNO, &rt2x00dev->cap_flags)) {
  186. /*
  187. * rt2800 has a H/W (or F/W) bug, device incorrectly increase
  188. * seqno on retransmited data (non-QOS) frames. To workaround
  189. * the problem let's generate seqno in software if QOS is
  190. * disabled.
  191. */
  192. if (test_bit(CONFIG_QOS_DISABLED, &rt2x00dev->flags))
  193. __clear_bit(ENTRY_TXD_GENERATE_SEQ, &txdesc->flags);
  194. else
  195. /* H/W will generate sequence number */
  196. return;
  197. }
  198. /*
  199. * The hardware is not able to insert a sequence number. Assign a
  200. * software generated one here.
  201. *
  202. * This is wrong because beacons are not getting sequence
  203. * numbers assigned properly.
  204. *
  205. * A secondary problem exists for drivers that cannot toggle
  206. * sequence counting per-frame, since those will override the
  207. * sequence counter given by mac80211.
  208. */
  209. if (test_bit(ENTRY_TXD_FIRST_FRAGMENT, &txdesc->flags))
  210. seqno = atomic_add_return(0x10, &intf->seqno);
  211. else
  212. seqno = atomic_read(&intf->seqno);
  213. hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
  214. hdr->seq_ctrl |= cpu_to_le16(seqno);
  215. }
  216. static void rt2x00queue_create_tx_descriptor_plcp(struct rt2x00_dev *rt2x00dev,
  217. struct sk_buff *skb,
  218. struct txentry_desc *txdesc,
  219. const struct rt2x00_rate *hwrate)
  220. {
  221. struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
  222. struct ieee80211_tx_rate *txrate = &tx_info->control.rates[0];
  223. unsigned int data_length;
  224. unsigned int duration;
  225. unsigned int residual;
  226. /*
  227. * Determine with what IFS priority this frame should be send.
  228. * Set ifs to IFS_SIFS when the this is not the first fragment,
  229. * or this fragment came after RTS/CTS.
  230. */
  231. if (test_bit(ENTRY_TXD_FIRST_FRAGMENT, &txdesc->flags))
  232. txdesc->u.plcp.ifs = IFS_BACKOFF;
  233. else
  234. txdesc->u.plcp.ifs = IFS_SIFS;
  235. /* Data length + CRC + Crypto overhead (IV/EIV/ICV/MIC) */
  236. data_length = skb->len + 4;
  237. data_length += rt2x00crypto_tx_overhead(rt2x00dev, skb);
  238. /*
  239. * PLCP setup
  240. * Length calculation depends on OFDM/CCK rate.
  241. */
  242. txdesc->u.plcp.signal = hwrate->plcp;
  243. txdesc->u.plcp.service = 0x04;
  244. if (hwrate->flags & DEV_RATE_OFDM) {
  245. txdesc->u.plcp.length_high = (data_length >> 6) & 0x3f;
  246. txdesc->u.plcp.length_low = data_length & 0x3f;
  247. } else {
  248. /*
  249. * Convert length to microseconds.
  250. */
  251. residual = GET_DURATION_RES(data_length, hwrate->bitrate);
  252. duration = GET_DURATION(data_length, hwrate->bitrate);
  253. if (residual != 0) {
  254. duration++;
  255. /*
  256. * Check if we need to set the Length Extension
  257. */
  258. if (hwrate->bitrate == 110 && residual <= 30)
  259. txdesc->u.plcp.service |= 0x80;
  260. }
  261. txdesc->u.plcp.length_high = (duration >> 8) & 0xff;
  262. txdesc->u.plcp.length_low = duration & 0xff;
  263. /*
  264. * When preamble is enabled we should set the
  265. * preamble bit for the signal.
  266. */
  267. if (txrate->flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE)
  268. txdesc->u.plcp.signal |= 0x08;
  269. }
  270. }
  271. static void rt2x00queue_create_tx_descriptor_ht(struct rt2x00_dev *rt2x00dev,
  272. struct sk_buff *skb,
  273. struct txentry_desc *txdesc,
  274. struct ieee80211_sta *sta,
  275. const struct rt2x00_rate *hwrate)
  276. {
  277. struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
  278. struct ieee80211_tx_rate *txrate = &tx_info->control.rates[0];
  279. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  280. struct rt2x00_sta *sta_priv = NULL;
  281. if (sta) {
  282. txdesc->u.ht.mpdu_density =
  283. sta->ht_cap.ampdu_density;
  284. sta_priv = sta_to_rt2x00_sta(sta);
  285. txdesc->u.ht.wcid = sta_priv->wcid;
  286. }
  287. /*
  288. * If IEEE80211_TX_RC_MCS is set txrate->idx just contains the
  289. * mcs rate to be used
  290. */
  291. if (txrate->flags & IEEE80211_TX_RC_MCS) {
  292. txdesc->u.ht.mcs = txrate->idx;
  293. /*
  294. * MIMO PS should be set to 1 for STA's using dynamic SM PS
  295. * when using more then one tx stream (>MCS7).
  296. */
  297. if (sta && txdesc->u.ht.mcs > 7 &&
  298. sta->smps_mode == IEEE80211_SMPS_DYNAMIC)
  299. __set_bit(ENTRY_TXD_HT_MIMO_PS, &txdesc->flags);
  300. } else {
  301. txdesc->u.ht.mcs = rt2x00_get_rate_mcs(hwrate->mcs);
  302. if (txrate->flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE)
  303. txdesc->u.ht.mcs |= 0x08;
  304. }
  305. if (test_bit(CONFIG_HT_DISABLED, &rt2x00dev->flags)) {
  306. if (!(tx_info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT))
  307. txdesc->u.ht.txop = TXOP_SIFS;
  308. else
  309. txdesc->u.ht.txop = TXOP_BACKOFF;
  310. /* Left zero on all other settings. */
  311. return;
  312. }
  313. txdesc->u.ht.ba_size = 7; /* FIXME: What value is needed? */
  314. /*
  315. * Only one STBC stream is supported for now.
  316. */
  317. if (tx_info->flags & IEEE80211_TX_CTL_STBC)
  318. txdesc->u.ht.stbc = 1;
  319. /*
  320. * This frame is eligible for an AMPDU, however, don't aggregate
  321. * frames that are intended to probe a specific tx rate.
  322. */
  323. if (tx_info->flags & IEEE80211_TX_CTL_AMPDU &&
  324. !(tx_info->flags & IEEE80211_TX_CTL_RATE_CTRL_PROBE))
  325. __set_bit(ENTRY_TXD_HT_AMPDU, &txdesc->flags);
  326. /*
  327. * Set 40Mhz mode if necessary (for legacy rates this will
  328. * duplicate the frame to both channels).
  329. */
  330. if (txrate->flags & IEEE80211_TX_RC_40_MHZ_WIDTH ||
  331. txrate->flags & IEEE80211_TX_RC_DUP_DATA)
  332. __set_bit(ENTRY_TXD_HT_BW_40, &txdesc->flags);
  333. if (txrate->flags & IEEE80211_TX_RC_SHORT_GI)
  334. __set_bit(ENTRY_TXD_HT_SHORT_GI, &txdesc->flags);
  335. /*
  336. * Determine IFS values
  337. * - Use TXOP_BACKOFF for management frames except beacons
  338. * - Use TXOP_SIFS for fragment bursts
  339. * - Use TXOP_HTTXOP for everything else
  340. *
  341. * Note: rt2800 devices won't use CTS protection (if used)
  342. * for frames not transmitted with TXOP_HTTXOP
  343. */
  344. if (ieee80211_is_mgmt(hdr->frame_control) &&
  345. !ieee80211_is_beacon(hdr->frame_control))
  346. txdesc->u.ht.txop = TXOP_BACKOFF;
  347. else if (!(tx_info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT))
  348. txdesc->u.ht.txop = TXOP_SIFS;
  349. else
  350. txdesc->u.ht.txop = TXOP_HTTXOP;
  351. }
  352. static void rt2x00queue_create_tx_descriptor(struct rt2x00_dev *rt2x00dev,
  353. struct sk_buff *skb,
  354. struct txentry_desc *txdesc,
  355. struct ieee80211_sta *sta)
  356. {
  357. struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
  358. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  359. struct ieee80211_tx_rate *txrate = &tx_info->control.rates[0];
  360. struct ieee80211_rate *rate;
  361. const struct rt2x00_rate *hwrate = NULL;
  362. memset(txdesc, 0, sizeof(*txdesc));
  363. /*
  364. * Header and frame information.
  365. */
  366. txdesc->length = skb->len;
  367. txdesc->header_length = ieee80211_get_hdrlen_from_skb(skb);
  368. /*
  369. * Check whether this frame is to be acked.
  370. */
  371. if (!(tx_info->flags & IEEE80211_TX_CTL_NO_ACK))
  372. __set_bit(ENTRY_TXD_ACK, &txdesc->flags);
  373. /*
  374. * Check if this is a RTS/CTS frame
  375. */
  376. if (ieee80211_is_rts(hdr->frame_control) ||
  377. ieee80211_is_cts(hdr->frame_control)) {
  378. __set_bit(ENTRY_TXD_BURST, &txdesc->flags);
  379. if (ieee80211_is_rts(hdr->frame_control))
  380. __set_bit(ENTRY_TXD_RTS_FRAME, &txdesc->flags);
  381. else
  382. __set_bit(ENTRY_TXD_CTS_FRAME, &txdesc->flags);
  383. if (tx_info->control.rts_cts_rate_idx >= 0)
  384. rate =
  385. ieee80211_get_rts_cts_rate(rt2x00dev->hw, tx_info);
  386. }
  387. /*
  388. * Determine retry information.
  389. */
  390. txdesc->retry_limit = tx_info->control.rates[0].count - 1;
  391. if (txdesc->retry_limit >= rt2x00dev->long_retry)
  392. __set_bit(ENTRY_TXD_RETRY_MODE, &txdesc->flags);
  393. /*
  394. * Check if more fragments are pending
  395. */
  396. if (ieee80211_has_morefrags(hdr->frame_control)) {
  397. __set_bit(ENTRY_TXD_BURST, &txdesc->flags);
  398. __set_bit(ENTRY_TXD_MORE_FRAG, &txdesc->flags);
  399. }
  400. /*
  401. * Check if more frames (!= fragments) are pending
  402. */
  403. if (tx_info->flags & IEEE80211_TX_CTL_MORE_FRAMES)
  404. __set_bit(ENTRY_TXD_BURST, &txdesc->flags);
  405. /*
  406. * Beacons and probe responses require the tsf timestamp
  407. * to be inserted into the frame.
  408. */
  409. if (ieee80211_is_beacon(hdr->frame_control) ||
  410. ieee80211_is_probe_resp(hdr->frame_control))
  411. __set_bit(ENTRY_TXD_REQ_TIMESTAMP, &txdesc->flags);
  412. if ((tx_info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT) &&
  413. !test_bit(ENTRY_TXD_RTS_FRAME, &txdesc->flags))
  414. __set_bit(ENTRY_TXD_FIRST_FRAGMENT, &txdesc->flags);
  415. /*
  416. * Determine rate modulation.
  417. */
  418. if (txrate->flags & IEEE80211_TX_RC_GREEN_FIELD)
  419. txdesc->rate_mode = RATE_MODE_HT_GREENFIELD;
  420. else if (txrate->flags & IEEE80211_TX_RC_MCS)
  421. txdesc->rate_mode = RATE_MODE_HT_MIX;
  422. else {
  423. rate = ieee80211_get_tx_rate(rt2x00dev->hw, tx_info);
  424. hwrate = rt2x00_get_rate(rate->hw_value);
  425. if (hwrate->flags & DEV_RATE_OFDM)
  426. txdesc->rate_mode = RATE_MODE_OFDM;
  427. else
  428. txdesc->rate_mode = RATE_MODE_CCK;
  429. }
  430. /*
  431. * Apply TX descriptor handling by components
  432. */
  433. rt2x00crypto_create_tx_descriptor(rt2x00dev, skb, txdesc);
  434. rt2x00queue_create_tx_descriptor_seq(rt2x00dev, skb, txdesc);
  435. if (test_bit(REQUIRE_HT_TX_DESC, &rt2x00dev->cap_flags))
  436. rt2x00queue_create_tx_descriptor_ht(rt2x00dev, skb, txdesc,
  437. sta, hwrate);
  438. else
  439. rt2x00queue_create_tx_descriptor_plcp(rt2x00dev, skb, txdesc,
  440. hwrate);
  441. }
  442. static int rt2x00queue_write_tx_data(struct queue_entry *entry,
  443. struct txentry_desc *txdesc)
  444. {
  445. struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
  446. /*
  447. * This should not happen, we already checked the entry
  448. * was ours. When the hardware disagrees there has been
  449. * a queue corruption!
  450. */
  451. if (unlikely(rt2x00dev->ops->lib->get_entry_state &&
  452. rt2x00dev->ops->lib->get_entry_state(entry))) {
  453. rt2x00_err(rt2x00dev,
  454. "Corrupt queue %d, accessing entry which is not ours\n"
  455. "Please file bug report to %s\n",
  456. entry->queue->qid, DRV_PROJECT);
  457. return -EINVAL;
  458. }
  459. /*
  460. * Add the requested extra tx headroom in front of the skb.
  461. */
  462. skb_push(entry->skb, rt2x00dev->extra_tx_headroom);
  463. memset(entry->skb->data, 0, rt2x00dev->extra_tx_headroom);
  464. /*
  465. * Call the driver's write_tx_data function, if it exists.
  466. */
  467. if (rt2x00dev->ops->lib->write_tx_data)
  468. rt2x00dev->ops->lib->write_tx_data(entry, txdesc);
  469. /*
  470. * Map the skb to DMA.
  471. */
  472. if (test_bit(REQUIRE_DMA, &rt2x00dev->cap_flags) &&
  473. rt2x00queue_map_txskb(entry))
  474. return -ENOMEM;
  475. return 0;
  476. }
  477. static void rt2x00queue_write_tx_descriptor(struct queue_entry *entry,
  478. struct txentry_desc *txdesc)
  479. {
  480. struct data_queue *queue = entry->queue;
  481. queue->rt2x00dev->ops->lib->write_tx_desc(entry, txdesc);
  482. /*
  483. * All processing on the frame has been completed, this means
  484. * it is now ready to be dumped to userspace through debugfs.
  485. */
  486. rt2x00debug_dump_frame(queue->rt2x00dev, DUMP_FRAME_TX, entry->skb);
  487. }
  488. static void rt2x00queue_kick_tx_queue(struct data_queue *queue,
  489. struct txentry_desc *txdesc)
  490. {
  491. /*
  492. * Check if we need to kick the queue, there are however a few rules
  493. * 1) Don't kick unless this is the last in frame in a burst.
  494. * When the burst flag is set, this frame is always followed
  495. * by another frame which in some way are related to eachother.
  496. * This is true for fragments, RTS or CTS-to-self frames.
  497. * 2) Rule 1 can be broken when the available entries
  498. * in the queue are less then a certain threshold.
  499. */
  500. if (rt2x00queue_threshold(queue) ||
  501. !test_bit(ENTRY_TXD_BURST, &txdesc->flags))
  502. queue->rt2x00dev->ops->lib->kick_queue(queue);
  503. }
  504. static void rt2x00queue_bar_check(struct queue_entry *entry)
  505. {
  506. struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
  507. struct ieee80211_bar *bar = (void *) (entry->skb->data +
  508. rt2x00dev->extra_tx_headroom);
  509. struct rt2x00_bar_list_entry *bar_entry;
  510. if (likely(!ieee80211_is_back_req(bar->frame_control)))
  511. return;
  512. bar_entry = kmalloc(sizeof(*bar_entry), GFP_ATOMIC);
  513. /*
  514. * If the alloc fails we still send the BAR out but just don't track
  515. * it in our bar list. And as a result we will report it to mac80211
  516. * back as failed.
  517. */
  518. if (!bar_entry)
  519. return;
  520. bar_entry->entry = entry;
  521. bar_entry->block_acked = 0;
  522. /*
  523. * Copy the relevant parts of the 802.11 BAR into out check list
  524. * such that we can use RCU for less-overhead in the RX path since
  525. * sending BARs and processing the according BlockAck should be
  526. * the exception.
  527. */
  528. memcpy(bar_entry->ra, bar->ra, sizeof(bar->ra));
  529. memcpy(bar_entry->ta, bar->ta, sizeof(bar->ta));
  530. bar_entry->control = bar->control;
  531. bar_entry->start_seq_num = bar->start_seq_num;
  532. /*
  533. * Insert BAR into our BAR check list.
  534. */
  535. spin_lock_bh(&rt2x00dev->bar_list_lock);
  536. list_add_tail_rcu(&bar_entry->list, &rt2x00dev->bar_list);
  537. spin_unlock_bh(&rt2x00dev->bar_list_lock);
  538. }
  539. int rt2x00queue_write_tx_frame(struct data_queue *queue, struct sk_buff *skb,
  540. struct ieee80211_sta *sta, bool local)
  541. {
  542. struct ieee80211_tx_info *tx_info;
  543. struct queue_entry *entry;
  544. struct txentry_desc txdesc;
  545. struct skb_frame_desc *skbdesc;
  546. u8 rate_idx, rate_flags;
  547. int ret = 0;
  548. /*
  549. * Copy all TX descriptor information into txdesc,
  550. * after that we are free to use the skb->cb array
  551. * for our information.
  552. */
  553. rt2x00queue_create_tx_descriptor(queue->rt2x00dev, skb, &txdesc, sta);
  554. /*
  555. * All information is retrieved from the skb->cb array,
  556. * now we should claim ownership of the driver part of that
  557. * array, preserving the bitrate index and flags.
  558. */
  559. tx_info = IEEE80211_SKB_CB(skb);
  560. rate_idx = tx_info->control.rates[0].idx;
  561. rate_flags = tx_info->control.rates[0].flags;
  562. skbdesc = get_skb_frame_desc(skb);
  563. memset(skbdesc, 0, sizeof(*skbdesc));
  564. skbdesc->tx_rate_idx = rate_idx;
  565. skbdesc->tx_rate_flags = rate_flags;
  566. if (local)
  567. skbdesc->flags |= SKBDESC_NOT_MAC80211;
  568. /*
  569. * When hardware encryption is supported, and this frame
  570. * is to be encrypted, we should strip the IV/EIV data from
  571. * the frame so we can provide it to the driver separately.
  572. */
  573. if (test_bit(ENTRY_TXD_ENCRYPT, &txdesc.flags) &&
  574. !test_bit(ENTRY_TXD_ENCRYPT_IV, &txdesc.flags)) {
  575. if (test_bit(REQUIRE_COPY_IV, &queue->rt2x00dev->cap_flags))
  576. rt2x00crypto_tx_copy_iv(skb, &txdesc);
  577. else
  578. rt2x00crypto_tx_remove_iv(skb, &txdesc);
  579. }
  580. /*
  581. * When DMA allocation is required we should guarantee to the
  582. * driver that the DMA is aligned to a 4-byte boundary.
  583. * However some drivers require L2 padding to pad the payload
  584. * rather then the header. This could be a requirement for
  585. * PCI and USB devices, while header alignment only is valid
  586. * for PCI devices.
  587. */
  588. if (test_bit(REQUIRE_L2PAD, &queue->rt2x00dev->cap_flags))
  589. rt2x00queue_insert_l2pad(skb, txdesc.header_length);
  590. else if (test_bit(REQUIRE_DMA, &queue->rt2x00dev->cap_flags))
  591. rt2x00queue_align_frame(skb);
  592. /*
  593. * That function must be called with bh disabled.
  594. */
  595. spin_lock(&queue->tx_lock);
  596. if (unlikely(rt2x00queue_full(queue))) {
  597. rt2x00_err(queue->rt2x00dev, "Dropping frame due to full tx queue %d\n",
  598. queue->qid);
  599. ret = -ENOBUFS;
  600. goto out;
  601. }
  602. entry = rt2x00queue_get_entry(queue, Q_INDEX);
  603. if (unlikely(test_and_set_bit(ENTRY_OWNER_DEVICE_DATA,
  604. &entry->flags))) {
  605. rt2x00_err(queue->rt2x00dev,
  606. "Arrived at non-free entry in the non-full queue %d\n"
  607. "Please file bug report to %s\n",
  608. queue->qid, DRV_PROJECT);
  609. ret = -EINVAL;
  610. goto out;
  611. }
  612. skbdesc->entry = entry;
  613. entry->skb = skb;
  614. /*
  615. * It could be possible that the queue was corrupted and this
  616. * call failed. Since we always return NETDEV_TX_OK to mac80211,
  617. * this frame will simply be dropped.
  618. */
  619. if (unlikely(rt2x00queue_write_tx_data(entry, &txdesc))) {
  620. clear_bit(ENTRY_OWNER_DEVICE_DATA, &entry->flags);
  621. entry->skb = NULL;
  622. ret = -EIO;
  623. goto out;
  624. }
  625. /*
  626. * Put BlockAckReqs into our check list for driver BA processing.
  627. */
  628. rt2x00queue_bar_check(entry);
  629. set_bit(ENTRY_DATA_PENDING, &entry->flags);
  630. rt2x00queue_index_inc(entry, Q_INDEX);
  631. rt2x00queue_write_tx_descriptor(entry, &txdesc);
  632. rt2x00queue_kick_tx_queue(queue, &txdesc);
  633. out:
  634. spin_unlock(&queue->tx_lock);
  635. return ret;
  636. }
  637. int rt2x00queue_clear_beacon(struct rt2x00_dev *rt2x00dev,
  638. struct ieee80211_vif *vif)
  639. {
  640. struct rt2x00_intf *intf = vif_to_intf(vif);
  641. if (unlikely(!intf->beacon))
  642. return -ENOBUFS;
  643. /*
  644. * Clean up the beacon skb.
  645. */
  646. rt2x00queue_free_skb(intf->beacon);
  647. /*
  648. * Clear beacon (single bssid devices don't need to clear the beacon
  649. * since the beacon queue will get stopped anyway).
  650. */
  651. if (rt2x00dev->ops->lib->clear_beacon)
  652. rt2x00dev->ops->lib->clear_beacon(intf->beacon);
  653. return 0;
  654. }
  655. int rt2x00queue_update_beacon(struct rt2x00_dev *rt2x00dev,
  656. struct ieee80211_vif *vif)
  657. {
  658. struct rt2x00_intf *intf = vif_to_intf(vif);
  659. struct skb_frame_desc *skbdesc;
  660. struct txentry_desc txdesc;
  661. if (unlikely(!intf->beacon))
  662. return -ENOBUFS;
  663. /*
  664. * Clean up the beacon skb.
  665. */
  666. rt2x00queue_free_skb(intf->beacon);
  667. intf->beacon->skb = ieee80211_beacon_get(rt2x00dev->hw, vif);
  668. if (!intf->beacon->skb)
  669. return -ENOMEM;
  670. /*
  671. * Copy all TX descriptor information into txdesc,
  672. * after that we are free to use the skb->cb array
  673. * for our information.
  674. */
  675. rt2x00queue_create_tx_descriptor(rt2x00dev, intf->beacon->skb, &txdesc, NULL);
  676. /*
  677. * Fill in skb descriptor
  678. */
  679. skbdesc = get_skb_frame_desc(intf->beacon->skb);
  680. memset(skbdesc, 0, sizeof(*skbdesc));
  681. skbdesc->entry = intf->beacon;
  682. /*
  683. * Send beacon to hardware.
  684. */
  685. rt2x00dev->ops->lib->write_beacon(intf->beacon, &txdesc);
  686. return 0;
  687. }
  688. bool rt2x00queue_for_each_entry(struct data_queue *queue,
  689. enum queue_index start,
  690. enum queue_index end,
  691. void *data,
  692. bool (*fn)(struct queue_entry *entry,
  693. void *data))
  694. {
  695. unsigned long irqflags;
  696. unsigned int index_start;
  697. unsigned int index_end;
  698. unsigned int i;
  699. if (unlikely(start >= Q_INDEX_MAX || end >= Q_INDEX_MAX)) {
  700. rt2x00_err(queue->rt2x00dev,
  701. "Entry requested from invalid index range (%d - %d)\n",
  702. start, end);
  703. return true;
  704. }
  705. /*
  706. * Only protect the range we are going to loop over,
  707. * if during our loop a extra entry is set to pending
  708. * it should not be kicked during this run, since it
  709. * is part of another TX operation.
  710. */
  711. spin_lock_irqsave(&queue->index_lock, irqflags);
  712. index_start = queue->index[start];
  713. index_end = queue->index[end];
  714. spin_unlock_irqrestore(&queue->index_lock, irqflags);
  715. /*
  716. * Start from the TX done pointer, this guarantees that we will
  717. * send out all frames in the correct order.
  718. */
  719. if (index_start < index_end) {
  720. for (i = index_start; i < index_end; i++) {
  721. if (fn(&queue->entries[i], data))
  722. return true;
  723. }
  724. } else {
  725. for (i = index_start; i < queue->limit; i++) {
  726. if (fn(&queue->entries[i], data))
  727. return true;
  728. }
  729. for (i = 0; i < index_end; i++) {
  730. if (fn(&queue->entries[i], data))
  731. return true;
  732. }
  733. }
  734. return false;
  735. }
  736. EXPORT_SYMBOL_GPL(rt2x00queue_for_each_entry);
  737. struct queue_entry *rt2x00queue_get_entry(struct data_queue *queue,
  738. enum queue_index index)
  739. {
  740. struct queue_entry *entry;
  741. unsigned long irqflags;
  742. if (unlikely(index >= Q_INDEX_MAX)) {
  743. rt2x00_err(queue->rt2x00dev, "Entry requested from invalid index type (%d)\n",
  744. index);
  745. return NULL;
  746. }
  747. spin_lock_irqsave(&queue->index_lock, irqflags);
  748. entry = &queue->entries[queue->index[index]];
  749. spin_unlock_irqrestore(&queue->index_lock, irqflags);
  750. return entry;
  751. }
  752. EXPORT_SYMBOL_GPL(rt2x00queue_get_entry);
  753. void rt2x00queue_index_inc(struct queue_entry *entry, enum queue_index index)
  754. {
  755. struct data_queue *queue = entry->queue;
  756. unsigned long irqflags;
  757. if (unlikely(index >= Q_INDEX_MAX)) {
  758. rt2x00_err(queue->rt2x00dev,
  759. "Index change on invalid index type (%d)\n", index);
  760. return;
  761. }
  762. spin_lock_irqsave(&queue->index_lock, irqflags);
  763. queue->index[index]++;
  764. if (queue->index[index] >= queue->limit)
  765. queue->index[index] = 0;
  766. entry->last_action = jiffies;
  767. if (index == Q_INDEX) {
  768. queue->length++;
  769. } else if (index == Q_INDEX_DONE) {
  770. queue->length--;
  771. queue->count++;
  772. }
  773. spin_unlock_irqrestore(&queue->index_lock, irqflags);
  774. }
  775. static void rt2x00queue_pause_queue_nocheck(struct data_queue *queue)
  776. {
  777. switch (queue->qid) {
  778. case QID_AC_VO:
  779. case QID_AC_VI:
  780. case QID_AC_BE:
  781. case QID_AC_BK:
  782. /*
  783. * For TX queues, we have to disable the queue
  784. * inside mac80211.
  785. */
  786. ieee80211_stop_queue(queue->rt2x00dev->hw, queue->qid);
  787. break;
  788. default:
  789. break;
  790. }
  791. }
  792. void rt2x00queue_pause_queue(struct data_queue *queue)
  793. {
  794. if (!test_bit(DEVICE_STATE_PRESENT, &queue->rt2x00dev->flags) ||
  795. !test_bit(QUEUE_STARTED, &queue->flags) ||
  796. test_and_set_bit(QUEUE_PAUSED, &queue->flags))
  797. return;
  798. rt2x00queue_pause_queue_nocheck(queue);
  799. }
  800. EXPORT_SYMBOL_GPL(rt2x00queue_pause_queue);
  801. void rt2x00queue_unpause_queue(struct data_queue *queue)
  802. {
  803. if (!test_bit(DEVICE_STATE_PRESENT, &queue->rt2x00dev->flags) ||
  804. !test_bit(QUEUE_STARTED, &queue->flags) ||
  805. !test_and_clear_bit(QUEUE_PAUSED, &queue->flags))
  806. return;
  807. switch (queue->qid) {
  808. case QID_AC_VO:
  809. case QID_AC_VI:
  810. case QID_AC_BE:
  811. case QID_AC_BK:
  812. /*
  813. * For TX queues, we have to enable the queue
  814. * inside mac80211.
  815. */
  816. ieee80211_wake_queue(queue->rt2x00dev->hw, queue->qid);
  817. break;
  818. case QID_RX:
  819. /*
  820. * For RX we need to kick the queue now in order to
  821. * receive frames.
  822. */
  823. queue->rt2x00dev->ops->lib->kick_queue(queue);
  824. default:
  825. break;
  826. }
  827. }
  828. EXPORT_SYMBOL_GPL(rt2x00queue_unpause_queue);
  829. void rt2x00queue_start_queue(struct data_queue *queue)
  830. {
  831. mutex_lock(&queue->status_lock);
  832. if (!test_bit(DEVICE_STATE_PRESENT, &queue->rt2x00dev->flags) ||
  833. test_and_set_bit(QUEUE_STARTED, &queue->flags)) {
  834. mutex_unlock(&queue->status_lock);
  835. return;
  836. }
  837. set_bit(QUEUE_PAUSED, &queue->flags);
  838. queue->rt2x00dev->ops->lib->start_queue(queue);
  839. rt2x00queue_unpause_queue(queue);
  840. mutex_unlock(&queue->status_lock);
  841. }
  842. EXPORT_SYMBOL_GPL(rt2x00queue_start_queue);
  843. void rt2x00queue_stop_queue(struct data_queue *queue)
  844. {
  845. mutex_lock(&queue->status_lock);
  846. if (!test_and_clear_bit(QUEUE_STARTED, &queue->flags)) {
  847. mutex_unlock(&queue->status_lock);
  848. return;
  849. }
  850. rt2x00queue_pause_queue_nocheck(queue);
  851. queue->rt2x00dev->ops->lib->stop_queue(queue);
  852. mutex_unlock(&queue->status_lock);
  853. }
  854. EXPORT_SYMBOL_GPL(rt2x00queue_stop_queue);
  855. void rt2x00queue_flush_queue(struct data_queue *queue, bool drop)
  856. {
  857. bool tx_queue =
  858. (queue->qid == QID_AC_VO) ||
  859. (queue->qid == QID_AC_VI) ||
  860. (queue->qid == QID_AC_BE) ||
  861. (queue->qid == QID_AC_BK);
  862. /*
  863. * If we are not supposed to drop any pending
  864. * frames, this means we must force a start (=kick)
  865. * to the queue to make sure the hardware will
  866. * start transmitting.
  867. */
  868. if (!drop && tx_queue)
  869. queue->rt2x00dev->ops->lib->kick_queue(queue);
  870. /*
  871. * Check if driver supports flushing, if that is the case we can
  872. * defer the flushing to the driver. Otherwise we must use the
  873. * alternative which just waits for the queue to become empty.
  874. */
  875. if (likely(queue->rt2x00dev->ops->lib->flush_queue))
  876. queue->rt2x00dev->ops->lib->flush_queue(queue, drop);
  877. /*
  878. * The queue flush has failed...
  879. */
  880. if (unlikely(!rt2x00queue_empty(queue)))
  881. rt2x00_warn(queue->rt2x00dev, "Queue %d failed to flush\n",
  882. queue->qid);
  883. }
  884. EXPORT_SYMBOL_GPL(rt2x00queue_flush_queue);
  885. void rt2x00queue_start_queues(struct rt2x00_dev *rt2x00dev)
  886. {
  887. struct data_queue *queue;
  888. /*
  889. * rt2x00queue_start_queue will call ieee80211_wake_queue
  890. * for each queue after is has been properly initialized.
  891. */
  892. tx_queue_for_each(rt2x00dev, queue)
  893. rt2x00queue_start_queue(queue);
  894. rt2x00queue_start_queue(rt2x00dev->rx);
  895. }
  896. EXPORT_SYMBOL_GPL(rt2x00queue_start_queues);
  897. void rt2x00queue_stop_queues(struct rt2x00_dev *rt2x00dev)
  898. {
  899. struct data_queue *queue;
  900. /*
  901. * rt2x00queue_stop_queue will call ieee80211_stop_queue
  902. * as well, but we are completely shutting doing everything
  903. * now, so it is much safer to stop all TX queues at once,
  904. * and use rt2x00queue_stop_queue for cleaning up.
  905. */
  906. ieee80211_stop_queues(rt2x00dev->hw);
  907. tx_queue_for_each(rt2x00dev, queue)
  908. rt2x00queue_stop_queue(queue);
  909. rt2x00queue_stop_queue(rt2x00dev->rx);
  910. }
  911. EXPORT_SYMBOL_GPL(rt2x00queue_stop_queues);
  912. void rt2x00queue_flush_queues(struct rt2x00_dev *rt2x00dev, bool drop)
  913. {
  914. struct data_queue *queue;
  915. tx_queue_for_each(rt2x00dev, queue)
  916. rt2x00queue_flush_queue(queue, drop);
  917. rt2x00queue_flush_queue(rt2x00dev->rx, drop);
  918. }
  919. EXPORT_SYMBOL_GPL(rt2x00queue_flush_queues);
  920. static void rt2x00queue_reset(struct data_queue *queue)
  921. {
  922. unsigned long irqflags;
  923. unsigned int i;
  924. spin_lock_irqsave(&queue->index_lock, irqflags);
  925. queue->count = 0;
  926. queue->length = 0;
  927. for (i = 0; i < Q_INDEX_MAX; i++)
  928. queue->index[i] = 0;
  929. spin_unlock_irqrestore(&queue->index_lock, irqflags);
  930. }
  931. void rt2x00queue_init_queues(struct rt2x00_dev *rt2x00dev)
  932. {
  933. struct data_queue *queue;
  934. unsigned int i;
  935. queue_for_each(rt2x00dev, queue) {
  936. rt2x00queue_reset(queue);
  937. for (i = 0; i < queue->limit; i++)
  938. rt2x00dev->ops->lib->clear_entry(&queue->entries[i]);
  939. }
  940. }
  941. static int rt2x00queue_alloc_entries(struct data_queue *queue)
  942. {
  943. struct queue_entry *entries;
  944. unsigned int entry_size;
  945. unsigned int i;
  946. rt2x00queue_reset(queue);
  947. /*
  948. * Allocate all queue entries.
  949. */
  950. entry_size = sizeof(*entries) + queue->priv_size;
  951. entries = kcalloc(queue->limit, entry_size, GFP_KERNEL);
  952. if (!entries)
  953. return -ENOMEM;
  954. #define QUEUE_ENTRY_PRIV_OFFSET(__base, __index, __limit, __esize, __psize) \
  955. (((char *)(__base)) + ((__limit) * (__esize)) + \
  956. ((__index) * (__psize)))
  957. for (i = 0; i < queue->limit; i++) {
  958. entries[i].flags = 0;
  959. entries[i].queue = queue;
  960. entries[i].skb = NULL;
  961. entries[i].entry_idx = i;
  962. entries[i].priv_data =
  963. QUEUE_ENTRY_PRIV_OFFSET(entries, i, queue->limit,
  964. sizeof(*entries), queue->priv_size);
  965. }
  966. #undef QUEUE_ENTRY_PRIV_OFFSET
  967. queue->entries = entries;
  968. return 0;
  969. }
  970. static void rt2x00queue_free_skbs(struct data_queue *queue)
  971. {
  972. unsigned int i;
  973. if (!queue->entries)
  974. return;
  975. for (i = 0; i < queue->limit; i++) {
  976. rt2x00queue_free_skb(&queue->entries[i]);
  977. }
  978. }
  979. static int rt2x00queue_alloc_rxskbs(struct data_queue *queue)
  980. {
  981. unsigned int i;
  982. struct sk_buff *skb;
  983. for (i = 0; i < queue->limit; i++) {
  984. skb = rt2x00queue_alloc_rxskb(&queue->entries[i], GFP_KERNEL);
  985. if (!skb)
  986. return -ENOMEM;
  987. queue->entries[i].skb = skb;
  988. }
  989. return 0;
  990. }
  991. int rt2x00queue_initialize(struct rt2x00_dev *rt2x00dev)
  992. {
  993. struct data_queue *queue;
  994. int status;
  995. status = rt2x00queue_alloc_entries(rt2x00dev->rx);
  996. if (status)
  997. goto exit;
  998. tx_queue_for_each(rt2x00dev, queue) {
  999. status = rt2x00queue_alloc_entries(queue);
  1000. if (status)
  1001. goto exit;
  1002. }
  1003. status = rt2x00queue_alloc_entries(rt2x00dev->bcn);
  1004. if (status)
  1005. goto exit;
  1006. if (test_bit(REQUIRE_ATIM_QUEUE, &rt2x00dev->cap_flags)) {
  1007. status = rt2x00queue_alloc_entries(rt2x00dev->atim);
  1008. if (status)
  1009. goto exit;
  1010. }
  1011. status = rt2x00queue_alloc_rxskbs(rt2x00dev->rx);
  1012. if (status)
  1013. goto exit;
  1014. return 0;
  1015. exit:
  1016. rt2x00_err(rt2x00dev, "Queue entries allocation failed\n");
  1017. rt2x00queue_uninitialize(rt2x00dev);
  1018. return status;
  1019. }
  1020. void rt2x00queue_uninitialize(struct rt2x00_dev *rt2x00dev)
  1021. {
  1022. struct data_queue *queue;
  1023. rt2x00queue_free_skbs(rt2x00dev->rx);
  1024. queue_for_each(rt2x00dev, queue) {
  1025. kfree(queue->entries);
  1026. queue->entries = NULL;
  1027. }
  1028. }
  1029. static void rt2x00queue_init(struct rt2x00_dev *rt2x00dev,
  1030. struct data_queue *queue, enum data_queue_qid qid)
  1031. {
  1032. mutex_init(&queue->status_lock);
  1033. spin_lock_init(&queue->tx_lock);
  1034. spin_lock_init(&queue->index_lock);
  1035. queue->rt2x00dev = rt2x00dev;
  1036. queue->qid = qid;
  1037. queue->txop = 0;
  1038. queue->aifs = 2;
  1039. queue->cw_min = 5;
  1040. queue->cw_max = 10;
  1041. rt2x00dev->ops->queue_init(queue);
  1042. queue->threshold = DIV_ROUND_UP(queue->limit, 10);
  1043. }
  1044. int rt2x00queue_allocate(struct rt2x00_dev *rt2x00dev)
  1045. {
  1046. struct data_queue *queue;
  1047. enum data_queue_qid qid;
  1048. unsigned int req_atim =
  1049. !!test_bit(REQUIRE_ATIM_QUEUE, &rt2x00dev->cap_flags);
  1050. /*
  1051. * We need the following queues:
  1052. * RX: 1
  1053. * TX: ops->tx_queues
  1054. * Beacon: 1
  1055. * Atim: 1 (if required)
  1056. */
  1057. rt2x00dev->data_queues = 2 + rt2x00dev->ops->tx_queues + req_atim;
  1058. queue = kcalloc(rt2x00dev->data_queues, sizeof(*queue), GFP_KERNEL);
  1059. if (!queue) {
  1060. rt2x00_err(rt2x00dev, "Queue allocation failed\n");
  1061. return -ENOMEM;
  1062. }
  1063. /*
  1064. * Initialize pointers
  1065. */
  1066. rt2x00dev->rx = queue;
  1067. rt2x00dev->tx = &queue[1];
  1068. rt2x00dev->bcn = &queue[1 + rt2x00dev->ops->tx_queues];
  1069. rt2x00dev->atim = req_atim ? &queue[2 + rt2x00dev->ops->tx_queues] : NULL;
  1070. /*
  1071. * Initialize queue parameters.
  1072. * RX: qid = QID_RX
  1073. * TX: qid = QID_AC_VO + index
  1074. * TX: cw_min: 2^5 = 32.
  1075. * TX: cw_max: 2^10 = 1024.
  1076. * BCN: qid = QID_BEACON
  1077. * ATIM: qid = QID_ATIM
  1078. */
  1079. rt2x00queue_init(rt2x00dev, rt2x00dev->rx, QID_RX);
  1080. qid = QID_AC_VO;
  1081. tx_queue_for_each(rt2x00dev, queue)
  1082. rt2x00queue_init(rt2x00dev, queue, qid++);
  1083. rt2x00queue_init(rt2x00dev, rt2x00dev->bcn, QID_BEACON);
  1084. if (req_atim)
  1085. rt2x00queue_init(rt2x00dev, rt2x00dev->atim, QID_ATIM);
  1086. return 0;
  1087. }
  1088. void rt2x00queue_free(struct rt2x00_dev *rt2x00dev)
  1089. {
  1090. kfree(rt2x00dev->rx);
  1091. rt2x00dev->rx = NULL;
  1092. rt2x00dev->tx = NULL;
  1093. rt2x00dev->bcn = NULL;
  1094. }