core.c 27 KB

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  1. /*
  2. * Copyright (c) 2005-2011 Atheros Communications Inc.
  3. * Copyright (c) 2011-2013 Qualcomm Atheros, Inc.
  4. *
  5. * Permission to use, copy, modify, and/or distribute this software for any
  6. * purpose with or without fee is hereby granted, provided that the above
  7. * copyright notice and this permission notice appear in all copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  10. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  11. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  12. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  13. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  14. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  15. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  16. */
  17. #include <linux/module.h>
  18. #include <linux/firmware.h>
  19. #include "core.h"
  20. #include "mac.h"
  21. #include "htc.h"
  22. #include "hif.h"
  23. #include "wmi.h"
  24. #include "bmi.h"
  25. #include "debug.h"
  26. #include "htt.h"
  27. #include "testmode.h"
  28. unsigned int ath10k_debug_mask;
  29. static bool uart_print;
  30. static unsigned int ath10k_p2p;
  31. module_param_named(debug_mask, ath10k_debug_mask, uint, 0644);
  32. module_param(uart_print, bool, 0644);
  33. module_param_named(p2p, ath10k_p2p, uint, 0644);
  34. MODULE_PARM_DESC(debug_mask, "Debugging mask");
  35. MODULE_PARM_DESC(uart_print, "Uart target debugging");
  36. MODULE_PARM_DESC(p2p, "Enable ath10k P2P support");
  37. static const struct ath10k_hw_params ath10k_hw_params_list[] = {
  38. {
  39. .id = QCA988X_HW_2_0_VERSION,
  40. .name = "qca988x hw2.0",
  41. .patch_load_addr = QCA988X_HW_2_0_PATCH_LOAD_ADDR,
  42. .fw = {
  43. .dir = QCA988X_HW_2_0_FW_DIR,
  44. .fw = QCA988X_HW_2_0_FW_FILE,
  45. .otp = QCA988X_HW_2_0_OTP_FILE,
  46. .board = QCA988X_HW_2_0_BOARD_DATA_FILE,
  47. },
  48. },
  49. };
  50. static void ath10k_send_suspend_complete(struct ath10k *ar)
  51. {
  52. ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot suspend complete\n");
  53. complete(&ar->target_suspend);
  54. }
  55. static int ath10k_init_configure_target(struct ath10k *ar)
  56. {
  57. u32 param_host;
  58. int ret;
  59. /* tell target which HTC version it is used*/
  60. ret = ath10k_bmi_write32(ar, hi_app_host_interest,
  61. HTC_PROTOCOL_VERSION);
  62. if (ret) {
  63. ath10k_err(ar, "settings HTC version failed\n");
  64. return ret;
  65. }
  66. /* set the firmware mode to STA/IBSS/AP */
  67. ret = ath10k_bmi_read32(ar, hi_option_flag, &param_host);
  68. if (ret) {
  69. ath10k_err(ar, "setting firmware mode (1/2) failed\n");
  70. return ret;
  71. }
  72. /* TODO following parameters need to be re-visited. */
  73. /* num_device */
  74. param_host |= (1 << HI_OPTION_NUM_DEV_SHIFT);
  75. /* Firmware mode */
  76. /* FIXME: Why FW_MODE_AP ??.*/
  77. param_host |= (HI_OPTION_FW_MODE_AP << HI_OPTION_FW_MODE_SHIFT);
  78. /* mac_addr_method */
  79. param_host |= (1 << HI_OPTION_MAC_ADDR_METHOD_SHIFT);
  80. /* firmware_bridge */
  81. param_host |= (0 << HI_OPTION_FW_BRIDGE_SHIFT);
  82. /* fwsubmode */
  83. param_host |= (0 << HI_OPTION_FW_SUBMODE_SHIFT);
  84. ret = ath10k_bmi_write32(ar, hi_option_flag, param_host);
  85. if (ret) {
  86. ath10k_err(ar, "setting firmware mode (2/2) failed\n");
  87. return ret;
  88. }
  89. /* We do all byte-swapping on the host */
  90. ret = ath10k_bmi_write32(ar, hi_be, 0);
  91. if (ret) {
  92. ath10k_err(ar, "setting host CPU BE mode failed\n");
  93. return ret;
  94. }
  95. /* FW descriptor/Data swap flags */
  96. ret = ath10k_bmi_write32(ar, hi_fw_swap, 0);
  97. if (ret) {
  98. ath10k_err(ar, "setting FW data/desc swap flags failed\n");
  99. return ret;
  100. }
  101. return 0;
  102. }
  103. static const struct firmware *ath10k_fetch_fw_file(struct ath10k *ar,
  104. const char *dir,
  105. const char *file)
  106. {
  107. char filename[100];
  108. const struct firmware *fw;
  109. int ret;
  110. if (file == NULL)
  111. return ERR_PTR(-ENOENT);
  112. if (dir == NULL)
  113. dir = ".";
  114. snprintf(filename, sizeof(filename), "%s/%s", dir, file);
  115. ret = request_firmware(&fw, filename, ar->dev);
  116. if (ret)
  117. return ERR_PTR(ret);
  118. return fw;
  119. }
  120. static int ath10k_push_board_ext_data(struct ath10k *ar)
  121. {
  122. u32 board_data_size = QCA988X_BOARD_DATA_SZ;
  123. u32 board_ext_data_size = QCA988X_BOARD_EXT_DATA_SZ;
  124. u32 board_ext_data_addr;
  125. int ret;
  126. ret = ath10k_bmi_read32(ar, hi_board_ext_data, &board_ext_data_addr);
  127. if (ret) {
  128. ath10k_err(ar, "could not read board ext data addr (%d)\n",
  129. ret);
  130. return ret;
  131. }
  132. ath10k_dbg(ar, ATH10K_DBG_BOOT,
  133. "boot push board extended data addr 0x%x\n",
  134. board_ext_data_addr);
  135. if (board_ext_data_addr == 0)
  136. return 0;
  137. if (ar->board_len != (board_data_size + board_ext_data_size)) {
  138. ath10k_err(ar, "invalid board (ext) data sizes %zu != %d+%d\n",
  139. ar->board_len, board_data_size, board_ext_data_size);
  140. return -EINVAL;
  141. }
  142. ret = ath10k_bmi_write_memory(ar, board_ext_data_addr,
  143. ar->board_data + board_data_size,
  144. board_ext_data_size);
  145. if (ret) {
  146. ath10k_err(ar, "could not write board ext data (%d)\n", ret);
  147. return ret;
  148. }
  149. ret = ath10k_bmi_write32(ar, hi_board_ext_data_config,
  150. (board_ext_data_size << 16) | 1);
  151. if (ret) {
  152. ath10k_err(ar, "could not write board ext data bit (%d)\n",
  153. ret);
  154. return ret;
  155. }
  156. return 0;
  157. }
  158. static int ath10k_download_board_data(struct ath10k *ar)
  159. {
  160. u32 board_data_size = QCA988X_BOARD_DATA_SZ;
  161. u32 address;
  162. int ret;
  163. ret = ath10k_push_board_ext_data(ar);
  164. if (ret) {
  165. ath10k_err(ar, "could not push board ext data (%d)\n", ret);
  166. goto exit;
  167. }
  168. ret = ath10k_bmi_read32(ar, hi_board_data, &address);
  169. if (ret) {
  170. ath10k_err(ar, "could not read board data addr (%d)\n", ret);
  171. goto exit;
  172. }
  173. ret = ath10k_bmi_write_memory(ar, address, ar->board_data,
  174. min_t(u32, board_data_size,
  175. ar->board_len));
  176. if (ret) {
  177. ath10k_err(ar, "could not write board data (%d)\n", ret);
  178. goto exit;
  179. }
  180. ret = ath10k_bmi_write32(ar, hi_board_data_initialized, 1);
  181. if (ret) {
  182. ath10k_err(ar, "could not write board data bit (%d)\n", ret);
  183. goto exit;
  184. }
  185. exit:
  186. return ret;
  187. }
  188. static int ath10k_download_and_run_otp(struct ath10k *ar)
  189. {
  190. u32 result, address = ar->hw_params.patch_load_addr;
  191. int ret;
  192. /* OTP is optional */
  193. if (!ar->otp_data || !ar->otp_len) {
  194. ath10k_warn(ar, "Not running otp, calibration will be incorrect (otp-data %p otp_len %zd)!\n",
  195. ar->otp_data, ar->otp_len);
  196. return 0;
  197. }
  198. ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot upload otp to 0x%x len %zd\n",
  199. address, ar->otp_len);
  200. ret = ath10k_bmi_fast_download(ar, address, ar->otp_data, ar->otp_len);
  201. if (ret) {
  202. ath10k_err(ar, "could not write otp (%d)\n", ret);
  203. return ret;
  204. }
  205. ret = ath10k_bmi_execute(ar, address, 0, &result);
  206. if (ret) {
  207. ath10k_err(ar, "could not execute otp (%d)\n", ret);
  208. return ret;
  209. }
  210. ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot otp execute result %d\n", result);
  211. if (result != 0) {
  212. ath10k_err(ar, "otp calibration failed: %d", result);
  213. return -EINVAL;
  214. }
  215. return 0;
  216. }
  217. static int ath10k_download_fw(struct ath10k *ar, enum ath10k_firmware_mode mode)
  218. {
  219. u32 address, data_len;
  220. const char *mode_name;
  221. const void *data;
  222. int ret;
  223. address = ar->hw_params.patch_load_addr;
  224. switch (mode) {
  225. case ATH10K_FIRMWARE_MODE_NORMAL:
  226. data = ar->firmware_data;
  227. data_len = ar->firmware_len;
  228. mode_name = "normal";
  229. break;
  230. case ATH10K_FIRMWARE_MODE_UTF:
  231. data = ar->testmode.utf->data;
  232. data_len = ar->testmode.utf->size;
  233. mode_name = "utf";
  234. break;
  235. default:
  236. ath10k_err(ar, "unknown firmware mode: %d\n", mode);
  237. return -EINVAL;
  238. }
  239. ath10k_dbg(ar, ATH10K_DBG_BOOT,
  240. "boot uploading firmware image %p len %d mode %s\n",
  241. data, data_len, mode_name);
  242. ret = ath10k_bmi_fast_download(ar, address, data, data_len);
  243. if (ret) {
  244. ath10k_err(ar, "failed to download %s firmware: %d\n",
  245. mode_name, ret);
  246. return ret;
  247. }
  248. return ret;
  249. }
  250. static void ath10k_core_free_firmware_files(struct ath10k *ar)
  251. {
  252. if (ar->board && !IS_ERR(ar->board))
  253. release_firmware(ar->board);
  254. if (ar->otp && !IS_ERR(ar->otp))
  255. release_firmware(ar->otp);
  256. if (ar->firmware && !IS_ERR(ar->firmware))
  257. release_firmware(ar->firmware);
  258. ar->board = NULL;
  259. ar->board_data = NULL;
  260. ar->board_len = 0;
  261. ar->otp = NULL;
  262. ar->otp_data = NULL;
  263. ar->otp_len = 0;
  264. ar->firmware = NULL;
  265. ar->firmware_data = NULL;
  266. ar->firmware_len = 0;
  267. }
  268. static int ath10k_core_fetch_firmware_api_1(struct ath10k *ar)
  269. {
  270. int ret = 0;
  271. if (ar->hw_params.fw.fw == NULL) {
  272. ath10k_err(ar, "firmware file not defined\n");
  273. return -EINVAL;
  274. }
  275. if (ar->hw_params.fw.board == NULL) {
  276. ath10k_err(ar, "board data file not defined");
  277. return -EINVAL;
  278. }
  279. ar->board = ath10k_fetch_fw_file(ar,
  280. ar->hw_params.fw.dir,
  281. ar->hw_params.fw.board);
  282. if (IS_ERR(ar->board)) {
  283. ret = PTR_ERR(ar->board);
  284. ath10k_err(ar, "could not fetch board data (%d)\n", ret);
  285. goto err;
  286. }
  287. ar->board_data = ar->board->data;
  288. ar->board_len = ar->board->size;
  289. ar->firmware = ath10k_fetch_fw_file(ar,
  290. ar->hw_params.fw.dir,
  291. ar->hw_params.fw.fw);
  292. if (IS_ERR(ar->firmware)) {
  293. ret = PTR_ERR(ar->firmware);
  294. ath10k_err(ar, "could not fetch firmware (%d)\n", ret);
  295. goto err;
  296. }
  297. ar->firmware_data = ar->firmware->data;
  298. ar->firmware_len = ar->firmware->size;
  299. /* OTP may be undefined. If so, don't fetch it at all */
  300. if (ar->hw_params.fw.otp == NULL)
  301. return 0;
  302. ar->otp = ath10k_fetch_fw_file(ar,
  303. ar->hw_params.fw.dir,
  304. ar->hw_params.fw.otp);
  305. if (IS_ERR(ar->otp)) {
  306. ret = PTR_ERR(ar->otp);
  307. ath10k_err(ar, "could not fetch otp (%d)\n", ret);
  308. goto err;
  309. }
  310. ar->otp_data = ar->otp->data;
  311. ar->otp_len = ar->otp->size;
  312. return 0;
  313. err:
  314. ath10k_core_free_firmware_files(ar);
  315. return ret;
  316. }
  317. static int ath10k_core_fetch_firmware_api_n(struct ath10k *ar, const char *name)
  318. {
  319. size_t magic_len, len, ie_len;
  320. int ie_id, i, index, bit, ret;
  321. struct ath10k_fw_ie *hdr;
  322. const u8 *data;
  323. __le32 *timestamp;
  324. /* first fetch the firmware file (firmware-*.bin) */
  325. ar->firmware = ath10k_fetch_fw_file(ar, ar->hw_params.fw.dir, name);
  326. if (IS_ERR(ar->firmware)) {
  327. ath10k_err(ar, "could not fetch firmware file '%s/%s': %ld\n",
  328. ar->hw_params.fw.dir, name, PTR_ERR(ar->firmware));
  329. return PTR_ERR(ar->firmware);
  330. }
  331. data = ar->firmware->data;
  332. len = ar->firmware->size;
  333. /* magic also includes the null byte, check that as well */
  334. magic_len = strlen(ATH10K_FIRMWARE_MAGIC) + 1;
  335. if (len < magic_len) {
  336. ath10k_err(ar, "firmware file '%s/%s' too small to contain magic: %zu\n",
  337. ar->hw_params.fw.dir, name, len);
  338. ret = -EINVAL;
  339. goto err;
  340. }
  341. if (memcmp(data, ATH10K_FIRMWARE_MAGIC, magic_len) != 0) {
  342. ath10k_err(ar, "invalid firmware magic\n");
  343. ret = -EINVAL;
  344. goto err;
  345. }
  346. /* jump over the padding */
  347. magic_len = ALIGN(magic_len, 4);
  348. len -= magic_len;
  349. data += magic_len;
  350. /* loop elements */
  351. while (len > sizeof(struct ath10k_fw_ie)) {
  352. hdr = (struct ath10k_fw_ie *)data;
  353. ie_id = le32_to_cpu(hdr->id);
  354. ie_len = le32_to_cpu(hdr->len);
  355. len -= sizeof(*hdr);
  356. data += sizeof(*hdr);
  357. if (len < ie_len) {
  358. ath10k_err(ar, "invalid length for FW IE %d (%zu < %zu)\n",
  359. ie_id, len, ie_len);
  360. ret = -EINVAL;
  361. goto err;
  362. }
  363. switch (ie_id) {
  364. case ATH10K_FW_IE_FW_VERSION:
  365. if (ie_len > sizeof(ar->hw->wiphy->fw_version) - 1)
  366. break;
  367. memcpy(ar->hw->wiphy->fw_version, data, ie_len);
  368. ar->hw->wiphy->fw_version[ie_len] = '\0';
  369. ath10k_dbg(ar, ATH10K_DBG_BOOT,
  370. "found fw version %s\n",
  371. ar->hw->wiphy->fw_version);
  372. break;
  373. case ATH10K_FW_IE_TIMESTAMP:
  374. if (ie_len != sizeof(u32))
  375. break;
  376. timestamp = (__le32 *)data;
  377. ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw timestamp %d\n",
  378. le32_to_cpup(timestamp));
  379. break;
  380. case ATH10K_FW_IE_FEATURES:
  381. ath10k_dbg(ar, ATH10K_DBG_BOOT,
  382. "found firmware features ie (%zd B)\n",
  383. ie_len);
  384. for (i = 0; i < ATH10K_FW_FEATURE_COUNT; i++) {
  385. index = i / 8;
  386. bit = i % 8;
  387. if (index == ie_len)
  388. break;
  389. if (data[index] & (1 << bit)) {
  390. ath10k_dbg(ar, ATH10K_DBG_BOOT,
  391. "Enabling feature bit: %i\n",
  392. i);
  393. __set_bit(i, ar->fw_features);
  394. }
  395. }
  396. ath10k_dbg_dump(ar, ATH10K_DBG_BOOT, "features", "",
  397. ar->fw_features,
  398. sizeof(ar->fw_features));
  399. break;
  400. case ATH10K_FW_IE_FW_IMAGE:
  401. ath10k_dbg(ar, ATH10K_DBG_BOOT,
  402. "found fw image ie (%zd B)\n",
  403. ie_len);
  404. ar->firmware_data = data;
  405. ar->firmware_len = ie_len;
  406. break;
  407. case ATH10K_FW_IE_OTP_IMAGE:
  408. ath10k_dbg(ar, ATH10K_DBG_BOOT,
  409. "found otp image ie (%zd B)\n",
  410. ie_len);
  411. ar->otp_data = data;
  412. ar->otp_len = ie_len;
  413. break;
  414. default:
  415. ath10k_warn(ar, "Unknown FW IE: %u\n",
  416. le32_to_cpu(hdr->id));
  417. break;
  418. }
  419. /* jump over the padding */
  420. ie_len = ALIGN(ie_len, 4);
  421. len -= ie_len;
  422. data += ie_len;
  423. }
  424. if (!ar->firmware_data || !ar->firmware_len) {
  425. ath10k_warn(ar, "No ATH10K_FW_IE_FW_IMAGE found from '%s/%s', skipping\n",
  426. ar->hw_params.fw.dir, name);
  427. ret = -ENOMEDIUM;
  428. goto err;
  429. }
  430. if (test_bit(ATH10K_FW_FEATURE_WMI_10_2, ar->fw_features) &&
  431. !test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features)) {
  432. ath10k_err(ar, "feature bits corrupted: 10.2 feature requires 10.x feature to be set as well");
  433. ret = -EINVAL;
  434. goto err;
  435. }
  436. /* now fetch the board file */
  437. if (ar->hw_params.fw.board == NULL) {
  438. ath10k_err(ar, "board data file not defined");
  439. ret = -EINVAL;
  440. goto err;
  441. }
  442. ar->board = ath10k_fetch_fw_file(ar,
  443. ar->hw_params.fw.dir,
  444. ar->hw_params.fw.board);
  445. if (IS_ERR(ar->board)) {
  446. ret = PTR_ERR(ar->board);
  447. ath10k_err(ar, "could not fetch board data '%s/%s' (%d)\n",
  448. ar->hw_params.fw.dir, ar->hw_params.fw.board,
  449. ret);
  450. goto err;
  451. }
  452. ar->board_data = ar->board->data;
  453. ar->board_len = ar->board->size;
  454. return 0;
  455. err:
  456. ath10k_core_free_firmware_files(ar);
  457. return ret;
  458. }
  459. static int ath10k_core_fetch_firmware_files(struct ath10k *ar)
  460. {
  461. int ret;
  462. ar->fw_api = 3;
  463. ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api);
  464. ret = ath10k_core_fetch_firmware_api_n(ar, ATH10K_FW_API3_FILE);
  465. if (ret == 0)
  466. goto success;
  467. ar->fw_api = 2;
  468. ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api);
  469. ret = ath10k_core_fetch_firmware_api_n(ar, ATH10K_FW_API2_FILE);
  470. if (ret == 0)
  471. goto success;
  472. ar->fw_api = 1;
  473. ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api);
  474. ret = ath10k_core_fetch_firmware_api_1(ar);
  475. if (ret)
  476. return ret;
  477. success:
  478. ath10k_dbg(ar, ATH10K_DBG_BOOT, "using fw api %d\n", ar->fw_api);
  479. return 0;
  480. }
  481. static int ath10k_init_download_firmware(struct ath10k *ar,
  482. enum ath10k_firmware_mode mode)
  483. {
  484. int ret;
  485. ret = ath10k_download_board_data(ar);
  486. if (ret) {
  487. ath10k_err(ar, "failed to download board data: %d\n", ret);
  488. return ret;
  489. }
  490. ret = ath10k_download_and_run_otp(ar);
  491. if (ret) {
  492. ath10k_err(ar, "failed to run otp: %d\n", ret);
  493. return ret;
  494. }
  495. ret = ath10k_download_fw(ar, mode);
  496. if (ret) {
  497. ath10k_err(ar, "failed to download firmware: %d\n", ret);
  498. return ret;
  499. }
  500. return ret;
  501. }
  502. static int ath10k_init_uart(struct ath10k *ar)
  503. {
  504. int ret;
  505. /*
  506. * Explicitly setting UART prints to zero as target turns it on
  507. * based on scratch registers.
  508. */
  509. ret = ath10k_bmi_write32(ar, hi_serial_enable, 0);
  510. if (ret) {
  511. ath10k_warn(ar, "could not disable UART prints (%d)\n", ret);
  512. return ret;
  513. }
  514. if (!uart_print)
  515. return 0;
  516. ret = ath10k_bmi_write32(ar, hi_dbg_uart_txpin, 7);
  517. if (ret) {
  518. ath10k_warn(ar, "could not enable UART prints (%d)\n", ret);
  519. return ret;
  520. }
  521. ret = ath10k_bmi_write32(ar, hi_serial_enable, 1);
  522. if (ret) {
  523. ath10k_warn(ar, "could not enable UART prints (%d)\n", ret);
  524. return ret;
  525. }
  526. /* Set the UART baud rate to 19200. */
  527. ret = ath10k_bmi_write32(ar, hi_desired_baud_rate, 19200);
  528. if (ret) {
  529. ath10k_warn(ar, "could not set the baud rate (%d)\n", ret);
  530. return ret;
  531. }
  532. ath10k_info(ar, "UART prints enabled\n");
  533. return 0;
  534. }
  535. static int ath10k_init_hw_params(struct ath10k *ar)
  536. {
  537. const struct ath10k_hw_params *uninitialized_var(hw_params);
  538. int i;
  539. for (i = 0; i < ARRAY_SIZE(ath10k_hw_params_list); i++) {
  540. hw_params = &ath10k_hw_params_list[i];
  541. if (hw_params->id == ar->target_version)
  542. break;
  543. }
  544. if (i == ARRAY_SIZE(ath10k_hw_params_list)) {
  545. ath10k_err(ar, "Unsupported hardware version: 0x%x\n",
  546. ar->target_version);
  547. return -EINVAL;
  548. }
  549. ar->hw_params = *hw_params;
  550. ath10k_dbg(ar, ATH10K_DBG_BOOT, "Hardware name %s version 0x%x\n",
  551. ar->hw_params.name, ar->target_version);
  552. return 0;
  553. }
  554. static void ath10k_core_restart(struct work_struct *work)
  555. {
  556. struct ath10k *ar = container_of(work, struct ath10k, restart_work);
  557. mutex_lock(&ar->conf_mutex);
  558. switch (ar->state) {
  559. case ATH10K_STATE_ON:
  560. ar->state = ATH10K_STATE_RESTARTING;
  561. ath10k_hif_stop(ar);
  562. ath10k_scan_finish(ar);
  563. ieee80211_restart_hw(ar->hw);
  564. break;
  565. case ATH10K_STATE_OFF:
  566. /* this can happen if driver is being unloaded
  567. * or if the crash happens during FW probing */
  568. ath10k_warn(ar, "cannot restart a device that hasn't been started\n");
  569. break;
  570. case ATH10K_STATE_RESTARTING:
  571. /* hw restart might be requested from multiple places */
  572. break;
  573. case ATH10K_STATE_RESTARTED:
  574. ar->state = ATH10K_STATE_WEDGED;
  575. /* fall through */
  576. case ATH10K_STATE_WEDGED:
  577. ath10k_warn(ar, "device is wedged, will not restart\n");
  578. break;
  579. case ATH10K_STATE_UTF:
  580. ath10k_warn(ar, "firmware restart in UTF mode not supported\n");
  581. break;
  582. }
  583. mutex_unlock(&ar->conf_mutex);
  584. }
  585. int ath10k_core_start(struct ath10k *ar, enum ath10k_firmware_mode mode)
  586. {
  587. int status;
  588. lockdep_assert_held(&ar->conf_mutex);
  589. ath10k_bmi_start(ar);
  590. if (ath10k_init_configure_target(ar)) {
  591. status = -EINVAL;
  592. goto err;
  593. }
  594. status = ath10k_init_download_firmware(ar, mode);
  595. if (status)
  596. goto err;
  597. status = ath10k_init_uart(ar);
  598. if (status)
  599. goto err;
  600. ar->htc.htc_ops.target_send_suspend_complete =
  601. ath10k_send_suspend_complete;
  602. status = ath10k_htc_init(ar);
  603. if (status) {
  604. ath10k_err(ar, "could not init HTC (%d)\n", status);
  605. goto err;
  606. }
  607. status = ath10k_bmi_done(ar);
  608. if (status)
  609. goto err;
  610. status = ath10k_wmi_attach(ar);
  611. if (status) {
  612. ath10k_err(ar, "WMI attach failed: %d\n", status);
  613. goto err;
  614. }
  615. status = ath10k_htt_init(ar);
  616. if (status) {
  617. ath10k_err(ar, "failed to init htt: %d\n", status);
  618. goto err_wmi_detach;
  619. }
  620. status = ath10k_htt_tx_alloc(&ar->htt);
  621. if (status) {
  622. ath10k_err(ar, "failed to alloc htt tx: %d\n", status);
  623. goto err_wmi_detach;
  624. }
  625. status = ath10k_htt_rx_alloc(&ar->htt);
  626. if (status) {
  627. ath10k_err(ar, "failed to alloc htt rx: %d\n", status);
  628. goto err_htt_tx_detach;
  629. }
  630. status = ath10k_hif_start(ar);
  631. if (status) {
  632. ath10k_err(ar, "could not start HIF: %d\n", status);
  633. goto err_htt_rx_detach;
  634. }
  635. status = ath10k_htc_wait_target(&ar->htc);
  636. if (status) {
  637. ath10k_err(ar, "failed to connect to HTC: %d\n", status);
  638. goto err_hif_stop;
  639. }
  640. if (mode == ATH10K_FIRMWARE_MODE_NORMAL) {
  641. status = ath10k_htt_connect(&ar->htt);
  642. if (status) {
  643. ath10k_err(ar, "failed to connect htt (%d)\n", status);
  644. goto err_hif_stop;
  645. }
  646. }
  647. status = ath10k_wmi_connect(ar);
  648. if (status) {
  649. ath10k_err(ar, "could not connect wmi: %d\n", status);
  650. goto err_hif_stop;
  651. }
  652. status = ath10k_htc_start(&ar->htc);
  653. if (status) {
  654. ath10k_err(ar, "failed to start htc: %d\n", status);
  655. goto err_hif_stop;
  656. }
  657. if (mode == ATH10K_FIRMWARE_MODE_NORMAL) {
  658. status = ath10k_wmi_wait_for_service_ready(ar);
  659. if (status <= 0) {
  660. ath10k_warn(ar, "wmi service ready event not received");
  661. status = -ETIMEDOUT;
  662. goto err_hif_stop;
  663. }
  664. }
  665. ath10k_dbg(ar, ATH10K_DBG_BOOT, "firmware %s booted\n",
  666. ar->hw->wiphy->fw_version);
  667. status = ath10k_wmi_cmd_init(ar);
  668. if (status) {
  669. ath10k_err(ar, "could not send WMI init command (%d)\n",
  670. status);
  671. goto err_hif_stop;
  672. }
  673. status = ath10k_wmi_wait_for_unified_ready(ar);
  674. if (status <= 0) {
  675. ath10k_err(ar, "wmi unified ready event not received\n");
  676. status = -ETIMEDOUT;
  677. goto err_hif_stop;
  678. }
  679. /* we don't care about HTT in UTF mode */
  680. if (mode == ATH10K_FIRMWARE_MODE_NORMAL) {
  681. status = ath10k_htt_setup(&ar->htt);
  682. if (status) {
  683. ath10k_err(ar, "failed to setup htt: %d\n", status);
  684. goto err_hif_stop;
  685. }
  686. }
  687. status = ath10k_debug_start(ar);
  688. if (status)
  689. goto err_hif_stop;
  690. if (test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features))
  691. ar->free_vdev_map = (1 << TARGET_10X_NUM_VDEVS) - 1;
  692. else
  693. ar->free_vdev_map = (1 << TARGET_NUM_VDEVS) - 1;
  694. INIT_LIST_HEAD(&ar->arvifs);
  695. return 0;
  696. err_hif_stop:
  697. ath10k_hif_stop(ar);
  698. err_htt_rx_detach:
  699. ath10k_htt_rx_free(&ar->htt);
  700. err_htt_tx_detach:
  701. ath10k_htt_tx_free(&ar->htt);
  702. err_wmi_detach:
  703. ath10k_wmi_detach(ar);
  704. err:
  705. return status;
  706. }
  707. EXPORT_SYMBOL(ath10k_core_start);
  708. int ath10k_wait_for_suspend(struct ath10k *ar, u32 suspend_opt)
  709. {
  710. int ret;
  711. reinit_completion(&ar->target_suspend);
  712. ret = ath10k_wmi_pdev_suspend_target(ar, suspend_opt);
  713. if (ret) {
  714. ath10k_warn(ar, "could not suspend target (%d)\n", ret);
  715. return ret;
  716. }
  717. ret = wait_for_completion_timeout(&ar->target_suspend, 1 * HZ);
  718. if (ret == 0) {
  719. ath10k_warn(ar, "suspend timed out - target pause event never came\n");
  720. return -ETIMEDOUT;
  721. }
  722. return 0;
  723. }
  724. void ath10k_core_stop(struct ath10k *ar)
  725. {
  726. lockdep_assert_held(&ar->conf_mutex);
  727. /* try to suspend target */
  728. if (ar->state != ATH10K_STATE_RESTARTING &&
  729. ar->state != ATH10K_STATE_UTF)
  730. ath10k_wait_for_suspend(ar, WMI_PDEV_SUSPEND_AND_DISABLE_INTR);
  731. ath10k_debug_stop(ar);
  732. ath10k_hif_stop(ar);
  733. ath10k_htt_tx_free(&ar->htt);
  734. ath10k_htt_rx_free(&ar->htt);
  735. ath10k_wmi_detach(ar);
  736. }
  737. EXPORT_SYMBOL(ath10k_core_stop);
  738. /* mac80211 manages fw/hw initialization through start/stop hooks. However in
  739. * order to know what hw capabilities should be advertised to mac80211 it is
  740. * necessary to load the firmware (and tear it down immediately since start
  741. * hook will try to init it again) before registering */
  742. static int ath10k_core_probe_fw(struct ath10k *ar)
  743. {
  744. struct bmi_target_info target_info;
  745. int ret = 0;
  746. ret = ath10k_hif_power_up(ar);
  747. if (ret) {
  748. ath10k_err(ar, "could not start pci hif (%d)\n", ret);
  749. return ret;
  750. }
  751. memset(&target_info, 0, sizeof(target_info));
  752. ret = ath10k_bmi_get_target_info(ar, &target_info);
  753. if (ret) {
  754. ath10k_err(ar, "could not get target info (%d)\n", ret);
  755. ath10k_hif_power_down(ar);
  756. return ret;
  757. }
  758. ar->target_version = target_info.version;
  759. ar->hw->wiphy->hw_version = target_info.version;
  760. ret = ath10k_init_hw_params(ar);
  761. if (ret) {
  762. ath10k_err(ar, "could not get hw params (%d)\n", ret);
  763. ath10k_hif_power_down(ar);
  764. return ret;
  765. }
  766. ret = ath10k_core_fetch_firmware_files(ar);
  767. if (ret) {
  768. ath10k_err(ar, "could not fetch firmware files (%d)\n", ret);
  769. ath10k_hif_power_down(ar);
  770. return ret;
  771. }
  772. mutex_lock(&ar->conf_mutex);
  773. ret = ath10k_core_start(ar, ATH10K_FIRMWARE_MODE_NORMAL);
  774. if (ret) {
  775. ath10k_err(ar, "could not init core (%d)\n", ret);
  776. ath10k_core_free_firmware_files(ar);
  777. ath10k_hif_power_down(ar);
  778. mutex_unlock(&ar->conf_mutex);
  779. return ret;
  780. }
  781. ath10k_print_driver_info(ar);
  782. ath10k_core_stop(ar);
  783. mutex_unlock(&ar->conf_mutex);
  784. ath10k_hif_power_down(ar);
  785. return 0;
  786. }
  787. static int ath10k_core_check_chip_id(struct ath10k *ar)
  788. {
  789. u32 hw_revision = MS(ar->chip_id, SOC_CHIP_ID_REV);
  790. ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot chip_id 0x%08x hw_revision 0x%x\n",
  791. ar->chip_id, hw_revision);
  792. /* Check that we are not using hw1.0 (some of them have same pci id
  793. * as hw2.0) before doing anything else as ath10k crashes horribly
  794. * due to missing hw1.0 workarounds. */
  795. switch (hw_revision) {
  796. case QCA988X_HW_1_0_CHIP_ID_REV:
  797. ath10k_err(ar, "ERROR: qca988x hw1.0 is not supported\n");
  798. return -EOPNOTSUPP;
  799. case QCA988X_HW_2_0_CHIP_ID_REV:
  800. /* known hardware revision, continue normally */
  801. return 0;
  802. default:
  803. ath10k_warn(ar, "Warning: hardware revision unknown (0x%x), expect problems\n",
  804. ar->chip_id);
  805. return 0;
  806. }
  807. return 0;
  808. }
  809. static void ath10k_core_register_work(struct work_struct *work)
  810. {
  811. struct ath10k *ar = container_of(work, struct ath10k, register_work);
  812. int status;
  813. status = ath10k_core_probe_fw(ar);
  814. if (status) {
  815. ath10k_err(ar, "could not probe fw (%d)\n", status);
  816. goto err;
  817. }
  818. status = ath10k_mac_register(ar);
  819. if (status) {
  820. ath10k_err(ar, "could not register to mac80211 (%d)\n", status);
  821. goto err_release_fw;
  822. }
  823. status = ath10k_debug_register(ar);
  824. if (status) {
  825. ath10k_err(ar, "unable to initialize debugfs\n");
  826. goto err_unregister_mac;
  827. }
  828. status = ath10k_spectral_create(ar);
  829. if (status) {
  830. ath10k_err(ar, "failed to initialize spectral\n");
  831. goto err_debug_destroy;
  832. }
  833. set_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags);
  834. return;
  835. err_debug_destroy:
  836. ath10k_debug_destroy(ar);
  837. err_unregister_mac:
  838. ath10k_mac_unregister(ar);
  839. err_release_fw:
  840. ath10k_core_free_firmware_files(ar);
  841. err:
  842. /* TODO: It's probably a good idea to release device from the driver
  843. * but calling device_release_driver() here will cause a deadlock.
  844. */
  845. return;
  846. }
  847. int ath10k_core_register(struct ath10k *ar, u32 chip_id)
  848. {
  849. int status;
  850. ar->chip_id = chip_id;
  851. status = ath10k_core_check_chip_id(ar);
  852. if (status) {
  853. ath10k_err(ar, "Unsupported chip id 0x%08x\n", ar->chip_id);
  854. return status;
  855. }
  856. queue_work(ar->workqueue, &ar->register_work);
  857. return 0;
  858. }
  859. EXPORT_SYMBOL(ath10k_core_register);
  860. void ath10k_core_unregister(struct ath10k *ar)
  861. {
  862. cancel_work_sync(&ar->register_work);
  863. if (!test_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags))
  864. return;
  865. /* Stop spectral before unregistering from mac80211 to remove the
  866. * relayfs debugfs file cleanly. Otherwise the parent debugfs tree
  867. * would be already be free'd recursively, leading to a double free.
  868. */
  869. ath10k_spectral_destroy(ar);
  870. /* We must unregister from mac80211 before we stop HTC and HIF.
  871. * Otherwise we will fail to submit commands to FW and mac80211 will be
  872. * unhappy about callback failures. */
  873. ath10k_mac_unregister(ar);
  874. ath10k_testmode_destroy(ar);
  875. ath10k_core_free_firmware_files(ar);
  876. ath10k_debug_unregister(ar);
  877. }
  878. EXPORT_SYMBOL(ath10k_core_unregister);
  879. struct ath10k *ath10k_core_create(size_t priv_size, struct device *dev,
  880. const struct ath10k_hif_ops *hif_ops)
  881. {
  882. struct ath10k *ar;
  883. int ret;
  884. ar = ath10k_mac_create(priv_size);
  885. if (!ar)
  886. return NULL;
  887. ar->ath_common.priv = ar;
  888. ar->ath_common.hw = ar->hw;
  889. ar->p2p = !!ath10k_p2p;
  890. ar->dev = dev;
  891. ar->hif.ops = hif_ops;
  892. init_completion(&ar->scan.started);
  893. init_completion(&ar->scan.completed);
  894. init_completion(&ar->scan.on_channel);
  895. init_completion(&ar->target_suspend);
  896. init_completion(&ar->install_key_done);
  897. init_completion(&ar->vdev_setup_done);
  898. INIT_DELAYED_WORK(&ar->scan.timeout, ath10k_scan_timeout_work);
  899. ar->workqueue = create_singlethread_workqueue("ath10k_wq");
  900. if (!ar->workqueue)
  901. goto err_free_mac;
  902. mutex_init(&ar->conf_mutex);
  903. spin_lock_init(&ar->data_lock);
  904. INIT_LIST_HEAD(&ar->peers);
  905. init_waitqueue_head(&ar->peer_mapping_wq);
  906. init_completion(&ar->offchan_tx_completed);
  907. INIT_WORK(&ar->offchan_tx_work, ath10k_offchan_tx_work);
  908. skb_queue_head_init(&ar->offchan_tx_queue);
  909. INIT_WORK(&ar->wmi_mgmt_tx_work, ath10k_mgmt_over_wmi_tx_work);
  910. skb_queue_head_init(&ar->wmi_mgmt_tx_queue);
  911. INIT_WORK(&ar->register_work, ath10k_core_register_work);
  912. INIT_WORK(&ar->restart_work, ath10k_core_restart);
  913. ret = ath10k_debug_create(ar);
  914. if (ret)
  915. goto err_free_wq;
  916. return ar;
  917. err_free_wq:
  918. destroy_workqueue(ar->workqueue);
  919. err_free_mac:
  920. ath10k_mac_destroy(ar);
  921. return NULL;
  922. }
  923. EXPORT_SYMBOL(ath10k_core_create);
  924. void ath10k_core_destroy(struct ath10k *ar)
  925. {
  926. flush_workqueue(ar->workqueue);
  927. destroy_workqueue(ar->workqueue);
  928. ath10k_debug_destroy(ar);
  929. ath10k_mac_destroy(ar);
  930. }
  931. EXPORT_SYMBOL(ath10k_core_destroy);
  932. MODULE_AUTHOR("Qualcomm Atheros");
  933. MODULE_DESCRIPTION("Core module for QCA988X PCIe devices.");
  934. MODULE_LICENSE("Dual BSD/GPL");