omap_hwspinlock.c 5.1 KB

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  1. /*
  2. * OMAP hardware spinlock driver
  3. *
  4. * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com
  5. *
  6. * Contact: Simon Que <sque@ti.com>
  7. * Hari Kanigeri <h-kanigeri2@ti.com>
  8. * Ohad Ben-Cohen <ohad@wizery.com>
  9. *
  10. * This program is free software; you can redistribute it and/or
  11. * modify it under the terms of the GNU General Public License
  12. * version 2 as published by the Free Software Foundation.
  13. *
  14. * This program is distributed in the hope that it will be useful, but
  15. * WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  17. * General Public License for more details.
  18. */
  19. #include <linux/kernel.h>
  20. #include <linux/module.h>
  21. #include <linux/device.h>
  22. #include <linux/delay.h>
  23. #include <linux/io.h>
  24. #include <linux/bitops.h>
  25. #include <linux/pm_runtime.h>
  26. #include <linux/slab.h>
  27. #include <linux/spinlock.h>
  28. #include <linux/hwspinlock.h>
  29. #include <linux/platform_device.h>
  30. #include "hwspinlock_internal.h"
  31. /* Spinlock register offsets */
  32. #define SYSSTATUS_OFFSET 0x0014
  33. #define LOCK_BASE_OFFSET 0x0800
  34. #define SPINLOCK_NUMLOCKS_BIT_OFFSET (24)
  35. /* Possible values of SPINLOCK_LOCK_REG */
  36. #define SPINLOCK_NOTTAKEN (0) /* free */
  37. #define SPINLOCK_TAKEN (1) /* locked */
  38. static int omap_hwspinlock_trylock(struct hwspinlock *lock)
  39. {
  40. void __iomem *lock_addr = lock->priv;
  41. /* attempt to acquire the lock by reading its value */
  42. return (SPINLOCK_NOTTAKEN == readl(lock_addr));
  43. }
  44. static void omap_hwspinlock_unlock(struct hwspinlock *lock)
  45. {
  46. void __iomem *lock_addr = lock->priv;
  47. /* release the lock by writing 0 to it */
  48. writel(SPINLOCK_NOTTAKEN, lock_addr);
  49. }
  50. /*
  51. * relax the OMAP interconnect while spinning on it.
  52. *
  53. * The specs recommended that the retry delay time will be
  54. * just over half of the time that a requester would be
  55. * expected to hold the lock.
  56. *
  57. * The number below is taken from an hardware specs example,
  58. * obviously it is somewhat arbitrary.
  59. */
  60. static void omap_hwspinlock_relax(struct hwspinlock *lock)
  61. {
  62. ndelay(50);
  63. }
  64. static const struct hwspinlock_ops omap_hwspinlock_ops = {
  65. .trylock = omap_hwspinlock_trylock,
  66. .unlock = omap_hwspinlock_unlock,
  67. .relax = omap_hwspinlock_relax,
  68. };
  69. static int omap_hwspinlock_probe(struct platform_device *pdev)
  70. {
  71. struct hwspinlock_pdata *pdata = pdev->dev.platform_data;
  72. struct hwspinlock_device *bank;
  73. struct hwspinlock *hwlock;
  74. struct resource *res;
  75. void __iomem *io_base;
  76. int num_locks, i, ret;
  77. if (!pdata)
  78. return -ENODEV;
  79. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  80. if (!res)
  81. return -ENODEV;
  82. io_base = ioremap(res->start, resource_size(res));
  83. if (!io_base)
  84. return -ENOMEM;
  85. /*
  86. * make sure the module is enabled and clocked before reading
  87. * the module SYSSTATUS register
  88. */
  89. pm_runtime_enable(&pdev->dev);
  90. ret = pm_runtime_get_sync(&pdev->dev);
  91. if (ret < 0) {
  92. pm_runtime_put_noidle(&pdev->dev);
  93. goto iounmap_base;
  94. }
  95. /* Determine number of locks */
  96. i = readl(io_base + SYSSTATUS_OFFSET);
  97. i >>= SPINLOCK_NUMLOCKS_BIT_OFFSET;
  98. /*
  99. * runtime PM will make sure the clock of this module is
  100. * enabled again iff at least one lock is requested
  101. */
  102. ret = pm_runtime_put(&pdev->dev);
  103. if (ret < 0)
  104. goto iounmap_base;
  105. /* one of the four lsb's must be set, and nothing else */
  106. if (hweight_long(i & 0xf) != 1 || i > 8) {
  107. ret = -EINVAL;
  108. goto iounmap_base;
  109. }
  110. num_locks = i * 32; /* actual number of locks in this device */
  111. bank = kzalloc(sizeof(*bank) + num_locks * sizeof(*hwlock), GFP_KERNEL);
  112. if (!bank) {
  113. ret = -ENOMEM;
  114. goto iounmap_base;
  115. }
  116. platform_set_drvdata(pdev, bank);
  117. for (i = 0, hwlock = &bank->lock[0]; i < num_locks; i++, hwlock++)
  118. hwlock->priv = io_base + LOCK_BASE_OFFSET + sizeof(u32) * i;
  119. ret = hwspin_lock_register(bank, &pdev->dev, &omap_hwspinlock_ops,
  120. pdata->base_id, num_locks);
  121. if (ret)
  122. goto reg_fail;
  123. return 0;
  124. reg_fail:
  125. kfree(bank);
  126. iounmap_base:
  127. pm_runtime_disable(&pdev->dev);
  128. iounmap(io_base);
  129. return ret;
  130. }
  131. static int omap_hwspinlock_remove(struct platform_device *pdev)
  132. {
  133. struct hwspinlock_device *bank = platform_get_drvdata(pdev);
  134. void __iomem *io_base = bank->lock[0].priv - LOCK_BASE_OFFSET;
  135. int ret;
  136. ret = hwspin_lock_unregister(bank);
  137. if (ret) {
  138. dev_err(&pdev->dev, "%s failed: %d\n", __func__, ret);
  139. return ret;
  140. }
  141. pm_runtime_disable(&pdev->dev);
  142. iounmap(io_base);
  143. kfree(bank);
  144. return 0;
  145. }
  146. static struct platform_driver omap_hwspinlock_driver = {
  147. .probe = omap_hwspinlock_probe,
  148. .remove = omap_hwspinlock_remove,
  149. .driver = {
  150. .name = "omap_hwspinlock",
  151. .owner = THIS_MODULE,
  152. },
  153. };
  154. static int __init omap_hwspinlock_init(void)
  155. {
  156. return platform_driver_register(&omap_hwspinlock_driver);
  157. }
  158. /* board init code might need to reserve hwspinlocks for predefined purposes */
  159. postcore_initcall(omap_hwspinlock_init);
  160. static void __exit omap_hwspinlock_exit(void)
  161. {
  162. platform_driver_unregister(&omap_hwspinlock_driver);
  163. }
  164. module_exit(omap_hwspinlock_exit);
  165. MODULE_LICENSE("GPL v2");
  166. MODULE_DESCRIPTION("Hardware spinlock driver for OMAP");
  167. MODULE_AUTHOR("Simon Que <sque@ti.com>");
  168. MODULE_AUTHOR("Hari Kanigeri <h-kanigeri2@ti.com>");
  169. MODULE_AUTHOR("Ohad Ben-Cohen <ohad@wizery.com>");