intel_lrc.h 4.5 KB

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  1. /*
  2. * Copyright © 2014 Intel Corporation
  3. *
  4. * Permission is hereby granted, free of charge, to any person obtaining a
  5. * copy of this software and associated documentation files (the "Software"),
  6. * to deal in the Software without restriction, including without limitation
  7. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8. * and/or sell copies of the Software, and to permit persons to whom the
  9. * Software is furnished to do so, subject to the following conditions:
  10. *
  11. * The above copyright notice and this permission notice (including the next
  12. * paragraph) shall be included in all copies or substantial portions of the
  13. * Software.
  14. *
  15. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  18. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  21. * DEALINGS IN THE SOFTWARE.
  22. */
  23. #ifndef _INTEL_LRC_H_
  24. #define _INTEL_LRC_H_
  25. /* Execlists regs */
  26. #define RING_ELSP(ring) ((ring)->mmio_base+0x230)
  27. #define RING_EXECLIST_STATUS(ring) ((ring)->mmio_base+0x234)
  28. #define RING_CONTEXT_CONTROL(ring) ((ring)->mmio_base+0x244)
  29. #define RING_CONTEXT_STATUS_BUF(ring) ((ring)->mmio_base+0x370)
  30. #define RING_CONTEXT_STATUS_PTR(ring) ((ring)->mmio_base+0x3a0)
  31. /* Logical Rings */
  32. void intel_logical_ring_stop(struct intel_engine_cs *ring);
  33. void intel_logical_ring_cleanup(struct intel_engine_cs *ring);
  34. int intel_logical_rings_init(struct drm_device *dev);
  35. int logical_ring_flush_all_caches(struct intel_ringbuffer *ringbuf);
  36. void intel_logical_ring_advance_and_submit(struct intel_ringbuffer *ringbuf);
  37. /**
  38. * intel_logical_ring_advance() - advance the ringbuffer tail
  39. * @ringbuf: Ringbuffer to advance.
  40. *
  41. * The tail is only updated in our logical ringbuffer struct.
  42. */
  43. static inline void intel_logical_ring_advance(struct intel_ringbuffer *ringbuf)
  44. {
  45. ringbuf->tail &= ringbuf->size - 1;
  46. }
  47. /**
  48. * intel_logical_ring_emit() - write a DWORD to the ringbuffer.
  49. * @ringbuf: Ringbuffer to write to.
  50. * @data: DWORD to write.
  51. */
  52. static inline void intel_logical_ring_emit(struct intel_ringbuffer *ringbuf,
  53. u32 data)
  54. {
  55. iowrite32(data, ringbuf->virtual_start + ringbuf->tail);
  56. ringbuf->tail += 4;
  57. }
  58. int intel_logical_ring_begin(struct intel_ringbuffer *ringbuf, int num_dwords);
  59. /* Logical Ring Contexts */
  60. int intel_lr_context_render_state_init(struct intel_engine_cs *ring,
  61. struct intel_context *ctx);
  62. void intel_lr_context_free(struct intel_context *ctx);
  63. int intel_lr_context_deferred_create(struct intel_context *ctx,
  64. struct intel_engine_cs *ring);
  65. /* Execlists */
  66. int intel_sanitize_enable_execlists(struct drm_device *dev, int enable_execlists);
  67. int intel_execlists_submission(struct drm_device *dev, struct drm_file *file,
  68. struct intel_engine_cs *ring,
  69. struct intel_context *ctx,
  70. struct drm_i915_gem_execbuffer2 *args,
  71. struct list_head *vmas,
  72. struct drm_i915_gem_object *batch_obj,
  73. u64 exec_start, u32 flags);
  74. u32 intel_execlists_ctx_id(struct drm_i915_gem_object *ctx_obj);
  75. /**
  76. * struct intel_ctx_submit_request - queued context submission request
  77. * @ctx: Context to submit to the ELSP.
  78. * @ring: Engine to submit it to.
  79. * @tail: how far in the context's ringbuffer this request goes to.
  80. * @execlist_link: link in the submission queue.
  81. * @work: workqueue for processing this request in a bottom half.
  82. * @elsp_submitted: no. of times this request has been sent to the ELSP.
  83. *
  84. * The ELSP only accepts two elements at a time, so we queue context/tail
  85. * pairs on a given queue (ring->execlist_queue) until the hardware is
  86. * available. The queue serves a double purpose: we also use it to keep track
  87. * of the up to 2 contexts currently in the hardware (usually one in execution
  88. * and the other queued up by the GPU): We only remove elements from the head
  89. * of the queue when the hardware informs us that an element has been
  90. * completed.
  91. *
  92. * All accesses to the queue are mediated by a spinlock (ring->execlist_lock).
  93. */
  94. struct intel_ctx_submit_request {
  95. struct intel_context *ctx;
  96. struct intel_engine_cs *ring;
  97. u32 tail;
  98. struct list_head execlist_link;
  99. struct work_struct work;
  100. int elsp_submitted;
  101. };
  102. void intel_execlists_handle_ctx_events(struct intel_engine_cs *ring);
  103. #endif /* _INTEL_LRC_H_ */