gpio-mcp23s08.c 24 KB

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  1. /*
  2. * MCP23S08 SPI/I2C GPIO gpio expander driver
  3. *
  4. * The inputs and outputs of the mcp23s08, mcp23s17, mcp23008 and mcp23017 are
  5. * supported.
  6. * For the I2C versions of the chips (mcp23008 and mcp23017) generation of
  7. * interrupts is also supported.
  8. * The hardware of the SPI versions of the chips (mcp23s08 and mcp23s17) is
  9. * also capable of generating interrupts, but the linux driver does not
  10. * support that yet.
  11. */
  12. #include <linux/kernel.h>
  13. #include <linux/device.h>
  14. #include <linux/mutex.h>
  15. #include <linux/module.h>
  16. #include <linux/gpio.h>
  17. #include <linux/i2c.h>
  18. #include <linux/spi/spi.h>
  19. #include <linux/spi/mcp23s08.h>
  20. #include <linux/slab.h>
  21. #include <asm/byteorder.h>
  22. #include <linux/interrupt.h>
  23. #include <linux/of_irq.h>
  24. #include <linux/of_device.h>
  25. /**
  26. * MCP types supported by driver
  27. */
  28. #define MCP_TYPE_S08 0
  29. #define MCP_TYPE_S17 1
  30. #define MCP_TYPE_008 2
  31. #define MCP_TYPE_017 3
  32. /* Registers are all 8 bits wide.
  33. *
  34. * The mcp23s17 has twice as many bits, and can be configured to work
  35. * with either 16 bit registers or with two adjacent 8 bit banks.
  36. */
  37. #define MCP_IODIR 0x00 /* init/reset: all ones */
  38. #define MCP_IPOL 0x01
  39. #define MCP_GPINTEN 0x02
  40. #define MCP_DEFVAL 0x03
  41. #define MCP_INTCON 0x04
  42. #define MCP_IOCON 0x05
  43. # define IOCON_MIRROR (1 << 6)
  44. # define IOCON_SEQOP (1 << 5)
  45. # define IOCON_HAEN (1 << 3)
  46. # define IOCON_ODR (1 << 2)
  47. # define IOCON_INTPOL (1 << 1)
  48. #define MCP_GPPU 0x06
  49. #define MCP_INTF 0x07
  50. #define MCP_INTCAP 0x08
  51. #define MCP_GPIO 0x09
  52. #define MCP_OLAT 0x0a
  53. struct mcp23s08;
  54. struct mcp23s08_ops {
  55. int (*read)(struct mcp23s08 *mcp, unsigned reg);
  56. int (*write)(struct mcp23s08 *mcp, unsigned reg, unsigned val);
  57. int (*read_regs)(struct mcp23s08 *mcp, unsigned reg,
  58. u16 *vals, unsigned n);
  59. };
  60. struct mcp23s08 {
  61. u8 addr;
  62. u16 cache[11];
  63. u16 irq_rise;
  64. u16 irq_fall;
  65. int irq;
  66. bool irq_controller;
  67. /* lock protects the cached values */
  68. struct mutex lock;
  69. struct mutex irq_lock;
  70. struct irq_domain *irq_domain;
  71. struct gpio_chip chip;
  72. const struct mcp23s08_ops *ops;
  73. void *data; /* ops specific data */
  74. };
  75. /* A given spi_device can represent up to eight mcp23sxx chips
  76. * sharing the same chipselect but using different addresses
  77. * (e.g. chips #0 and #3 might be populated, but not #1 or $2).
  78. * Driver data holds all the per-chip data.
  79. */
  80. struct mcp23s08_driver_data {
  81. unsigned ngpio;
  82. struct mcp23s08 *mcp[8];
  83. struct mcp23s08 chip[];
  84. };
  85. /* This lock class tells lockdep that GPIO irqs are in a different
  86. * category than their parents, so it won't report false recursion.
  87. */
  88. static struct lock_class_key gpio_lock_class;
  89. /*----------------------------------------------------------------------*/
  90. #if IS_ENABLED(CONFIG_I2C)
  91. static int mcp23008_read(struct mcp23s08 *mcp, unsigned reg)
  92. {
  93. return i2c_smbus_read_byte_data(mcp->data, reg);
  94. }
  95. static int mcp23008_write(struct mcp23s08 *mcp, unsigned reg, unsigned val)
  96. {
  97. return i2c_smbus_write_byte_data(mcp->data, reg, val);
  98. }
  99. static int
  100. mcp23008_read_regs(struct mcp23s08 *mcp, unsigned reg, u16 *vals, unsigned n)
  101. {
  102. while (n--) {
  103. int ret = mcp23008_read(mcp, reg++);
  104. if (ret < 0)
  105. return ret;
  106. *vals++ = ret;
  107. }
  108. return 0;
  109. }
  110. static int mcp23017_read(struct mcp23s08 *mcp, unsigned reg)
  111. {
  112. return i2c_smbus_read_word_data(mcp->data, reg << 1);
  113. }
  114. static int mcp23017_write(struct mcp23s08 *mcp, unsigned reg, unsigned val)
  115. {
  116. return i2c_smbus_write_word_data(mcp->data, reg << 1, val);
  117. }
  118. static int
  119. mcp23017_read_regs(struct mcp23s08 *mcp, unsigned reg, u16 *vals, unsigned n)
  120. {
  121. while (n--) {
  122. int ret = mcp23017_read(mcp, reg++);
  123. if (ret < 0)
  124. return ret;
  125. *vals++ = ret;
  126. }
  127. return 0;
  128. }
  129. static const struct mcp23s08_ops mcp23008_ops = {
  130. .read = mcp23008_read,
  131. .write = mcp23008_write,
  132. .read_regs = mcp23008_read_regs,
  133. };
  134. static const struct mcp23s08_ops mcp23017_ops = {
  135. .read = mcp23017_read,
  136. .write = mcp23017_write,
  137. .read_regs = mcp23017_read_regs,
  138. };
  139. #endif /* CONFIG_I2C */
  140. /*----------------------------------------------------------------------*/
  141. #ifdef CONFIG_SPI_MASTER
  142. static int mcp23s08_read(struct mcp23s08 *mcp, unsigned reg)
  143. {
  144. u8 tx[2], rx[1];
  145. int status;
  146. tx[0] = mcp->addr | 0x01;
  147. tx[1] = reg;
  148. status = spi_write_then_read(mcp->data, tx, sizeof(tx), rx, sizeof(rx));
  149. return (status < 0) ? status : rx[0];
  150. }
  151. static int mcp23s08_write(struct mcp23s08 *mcp, unsigned reg, unsigned val)
  152. {
  153. u8 tx[3];
  154. tx[0] = mcp->addr;
  155. tx[1] = reg;
  156. tx[2] = val;
  157. return spi_write_then_read(mcp->data, tx, sizeof(tx), NULL, 0);
  158. }
  159. static int
  160. mcp23s08_read_regs(struct mcp23s08 *mcp, unsigned reg, u16 *vals, unsigned n)
  161. {
  162. u8 tx[2], *tmp;
  163. int status;
  164. if ((n + reg) > sizeof(mcp->cache))
  165. return -EINVAL;
  166. tx[0] = mcp->addr | 0x01;
  167. tx[1] = reg;
  168. tmp = (u8 *)vals;
  169. status = spi_write_then_read(mcp->data, tx, sizeof(tx), tmp, n);
  170. if (status >= 0) {
  171. while (n--)
  172. vals[n] = tmp[n]; /* expand to 16bit */
  173. }
  174. return status;
  175. }
  176. static int mcp23s17_read(struct mcp23s08 *mcp, unsigned reg)
  177. {
  178. u8 tx[2], rx[2];
  179. int status;
  180. tx[0] = mcp->addr | 0x01;
  181. tx[1] = reg << 1;
  182. status = spi_write_then_read(mcp->data, tx, sizeof(tx), rx, sizeof(rx));
  183. return (status < 0) ? status : (rx[0] | (rx[1] << 8));
  184. }
  185. static int mcp23s17_write(struct mcp23s08 *mcp, unsigned reg, unsigned val)
  186. {
  187. u8 tx[4];
  188. tx[0] = mcp->addr;
  189. tx[1] = reg << 1;
  190. tx[2] = val;
  191. tx[3] = val >> 8;
  192. return spi_write_then_read(mcp->data, tx, sizeof(tx), NULL, 0);
  193. }
  194. static int
  195. mcp23s17_read_regs(struct mcp23s08 *mcp, unsigned reg, u16 *vals, unsigned n)
  196. {
  197. u8 tx[2];
  198. int status;
  199. if ((n + reg) > sizeof(mcp->cache))
  200. return -EINVAL;
  201. tx[0] = mcp->addr | 0x01;
  202. tx[1] = reg << 1;
  203. status = spi_write_then_read(mcp->data, tx, sizeof(tx),
  204. (u8 *)vals, n * 2);
  205. if (status >= 0) {
  206. while (n--)
  207. vals[n] = __le16_to_cpu((__le16)vals[n]);
  208. }
  209. return status;
  210. }
  211. static const struct mcp23s08_ops mcp23s08_ops = {
  212. .read = mcp23s08_read,
  213. .write = mcp23s08_write,
  214. .read_regs = mcp23s08_read_regs,
  215. };
  216. static const struct mcp23s08_ops mcp23s17_ops = {
  217. .read = mcp23s17_read,
  218. .write = mcp23s17_write,
  219. .read_regs = mcp23s17_read_regs,
  220. };
  221. #endif /* CONFIG_SPI_MASTER */
  222. /*----------------------------------------------------------------------*/
  223. static int mcp23s08_direction_input(struct gpio_chip *chip, unsigned offset)
  224. {
  225. struct mcp23s08 *mcp = container_of(chip, struct mcp23s08, chip);
  226. int status;
  227. mutex_lock(&mcp->lock);
  228. mcp->cache[MCP_IODIR] |= (1 << offset);
  229. status = mcp->ops->write(mcp, MCP_IODIR, mcp->cache[MCP_IODIR]);
  230. mutex_unlock(&mcp->lock);
  231. return status;
  232. }
  233. static int mcp23s08_get(struct gpio_chip *chip, unsigned offset)
  234. {
  235. struct mcp23s08 *mcp = container_of(chip, struct mcp23s08, chip);
  236. int status;
  237. mutex_lock(&mcp->lock);
  238. /* REVISIT reading this clears any IRQ ... */
  239. status = mcp->ops->read(mcp, MCP_GPIO);
  240. if (status < 0)
  241. status = 0;
  242. else {
  243. mcp->cache[MCP_GPIO] = status;
  244. status = !!(status & (1 << offset));
  245. }
  246. mutex_unlock(&mcp->lock);
  247. return status;
  248. }
  249. static int __mcp23s08_set(struct mcp23s08 *mcp, unsigned mask, int value)
  250. {
  251. unsigned olat = mcp->cache[MCP_OLAT];
  252. if (value)
  253. olat |= mask;
  254. else
  255. olat &= ~mask;
  256. mcp->cache[MCP_OLAT] = olat;
  257. return mcp->ops->write(mcp, MCP_OLAT, olat);
  258. }
  259. static void mcp23s08_set(struct gpio_chip *chip, unsigned offset, int value)
  260. {
  261. struct mcp23s08 *mcp = container_of(chip, struct mcp23s08, chip);
  262. unsigned mask = 1 << offset;
  263. mutex_lock(&mcp->lock);
  264. __mcp23s08_set(mcp, mask, value);
  265. mutex_unlock(&mcp->lock);
  266. }
  267. static int
  268. mcp23s08_direction_output(struct gpio_chip *chip, unsigned offset, int value)
  269. {
  270. struct mcp23s08 *mcp = container_of(chip, struct mcp23s08, chip);
  271. unsigned mask = 1 << offset;
  272. int status;
  273. mutex_lock(&mcp->lock);
  274. status = __mcp23s08_set(mcp, mask, value);
  275. if (status == 0) {
  276. mcp->cache[MCP_IODIR] &= ~mask;
  277. status = mcp->ops->write(mcp, MCP_IODIR, mcp->cache[MCP_IODIR]);
  278. }
  279. mutex_unlock(&mcp->lock);
  280. return status;
  281. }
  282. /*----------------------------------------------------------------------*/
  283. static irqreturn_t mcp23s08_irq(int irq, void *data)
  284. {
  285. struct mcp23s08 *mcp = data;
  286. int intcap, intf, i;
  287. unsigned int child_irq;
  288. mutex_lock(&mcp->lock);
  289. intf = mcp->ops->read(mcp, MCP_INTF);
  290. if (intf < 0) {
  291. mutex_unlock(&mcp->lock);
  292. return IRQ_HANDLED;
  293. }
  294. mcp->cache[MCP_INTF] = intf;
  295. intcap = mcp->ops->read(mcp, MCP_INTCAP);
  296. if (intcap < 0) {
  297. mutex_unlock(&mcp->lock);
  298. return IRQ_HANDLED;
  299. }
  300. mcp->cache[MCP_INTCAP] = intcap;
  301. mutex_unlock(&mcp->lock);
  302. for (i = 0; i < mcp->chip.ngpio; i++) {
  303. if ((BIT(i) & mcp->cache[MCP_INTF]) &&
  304. ((BIT(i) & intcap & mcp->irq_rise) ||
  305. (mcp->irq_fall & ~intcap & BIT(i)))) {
  306. child_irq = irq_find_mapping(mcp->irq_domain, i);
  307. handle_nested_irq(child_irq);
  308. }
  309. }
  310. return IRQ_HANDLED;
  311. }
  312. static int mcp23s08_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
  313. {
  314. struct mcp23s08 *mcp = container_of(chip, struct mcp23s08, chip);
  315. return irq_find_mapping(mcp->irq_domain, offset);
  316. }
  317. static void mcp23s08_irq_mask(struct irq_data *data)
  318. {
  319. struct mcp23s08 *mcp = irq_data_get_irq_chip_data(data);
  320. unsigned int pos = data->hwirq;
  321. mcp->cache[MCP_GPINTEN] &= ~BIT(pos);
  322. }
  323. static void mcp23s08_irq_unmask(struct irq_data *data)
  324. {
  325. struct mcp23s08 *mcp = irq_data_get_irq_chip_data(data);
  326. unsigned int pos = data->hwirq;
  327. mcp->cache[MCP_GPINTEN] |= BIT(pos);
  328. }
  329. static int mcp23s08_irq_set_type(struct irq_data *data, unsigned int type)
  330. {
  331. struct mcp23s08 *mcp = irq_data_get_irq_chip_data(data);
  332. unsigned int pos = data->hwirq;
  333. int status = 0;
  334. if ((type & IRQ_TYPE_EDGE_BOTH) == IRQ_TYPE_EDGE_BOTH) {
  335. mcp->cache[MCP_INTCON] &= ~BIT(pos);
  336. mcp->irq_rise |= BIT(pos);
  337. mcp->irq_fall |= BIT(pos);
  338. } else if (type & IRQ_TYPE_EDGE_RISING) {
  339. mcp->cache[MCP_INTCON] &= ~BIT(pos);
  340. mcp->irq_rise |= BIT(pos);
  341. mcp->irq_fall &= ~BIT(pos);
  342. } else if (type & IRQ_TYPE_EDGE_FALLING) {
  343. mcp->cache[MCP_INTCON] &= ~BIT(pos);
  344. mcp->irq_rise &= ~BIT(pos);
  345. mcp->irq_fall |= BIT(pos);
  346. } else
  347. return -EINVAL;
  348. return status;
  349. }
  350. static void mcp23s08_irq_bus_lock(struct irq_data *data)
  351. {
  352. struct mcp23s08 *mcp = irq_data_get_irq_chip_data(data);
  353. mutex_lock(&mcp->irq_lock);
  354. }
  355. static void mcp23s08_irq_bus_unlock(struct irq_data *data)
  356. {
  357. struct mcp23s08 *mcp = irq_data_get_irq_chip_data(data);
  358. mutex_lock(&mcp->lock);
  359. mcp->ops->write(mcp, MCP_GPINTEN, mcp->cache[MCP_GPINTEN]);
  360. mcp->ops->write(mcp, MCP_DEFVAL, mcp->cache[MCP_DEFVAL]);
  361. mcp->ops->write(mcp, MCP_INTCON, mcp->cache[MCP_INTCON]);
  362. mutex_unlock(&mcp->lock);
  363. mutex_unlock(&mcp->irq_lock);
  364. }
  365. static int mcp23s08_irq_reqres(struct irq_data *data)
  366. {
  367. struct mcp23s08 *mcp = irq_data_get_irq_chip_data(data);
  368. if (gpio_lock_as_irq(&mcp->chip, data->hwirq)) {
  369. dev_err(mcp->chip.dev,
  370. "unable to lock HW IRQ %lu for IRQ usage\n",
  371. data->hwirq);
  372. return -EINVAL;
  373. }
  374. return 0;
  375. }
  376. static void mcp23s08_irq_relres(struct irq_data *data)
  377. {
  378. struct mcp23s08 *mcp = irq_data_get_irq_chip_data(data);
  379. gpio_unlock_as_irq(&mcp->chip, data->hwirq);
  380. }
  381. static struct irq_chip mcp23s08_irq_chip = {
  382. .name = "gpio-mcp23xxx",
  383. .irq_mask = mcp23s08_irq_mask,
  384. .irq_unmask = mcp23s08_irq_unmask,
  385. .irq_set_type = mcp23s08_irq_set_type,
  386. .irq_bus_lock = mcp23s08_irq_bus_lock,
  387. .irq_bus_sync_unlock = mcp23s08_irq_bus_unlock,
  388. .irq_request_resources = mcp23s08_irq_reqres,
  389. .irq_release_resources = mcp23s08_irq_relres,
  390. };
  391. static int mcp23s08_irq_setup(struct mcp23s08 *mcp)
  392. {
  393. struct gpio_chip *chip = &mcp->chip;
  394. int err, irq, j;
  395. mutex_init(&mcp->irq_lock);
  396. mcp->irq_domain = irq_domain_add_linear(chip->dev->of_node, chip->ngpio,
  397. &irq_domain_simple_ops, mcp);
  398. if (!mcp->irq_domain)
  399. return -ENODEV;
  400. err = devm_request_threaded_irq(chip->dev, mcp->irq, NULL, mcp23s08_irq,
  401. IRQF_TRIGGER_LOW | IRQF_ONESHOT,
  402. dev_name(chip->dev), mcp);
  403. if (err != 0) {
  404. dev_err(chip->dev, "unable to request IRQ#%d: %d\n",
  405. mcp->irq, err);
  406. return err;
  407. }
  408. chip->to_irq = mcp23s08_gpio_to_irq;
  409. for (j = 0; j < mcp->chip.ngpio; j++) {
  410. irq = irq_create_mapping(mcp->irq_domain, j);
  411. irq_set_lockdep_class(irq, &gpio_lock_class);
  412. irq_set_chip_data(irq, mcp);
  413. irq_set_chip(irq, &mcp23s08_irq_chip);
  414. irq_set_nested_thread(irq, true);
  415. #ifdef CONFIG_ARM
  416. set_irq_flags(irq, IRQF_VALID);
  417. #else
  418. irq_set_noprobe(irq);
  419. #endif
  420. }
  421. return 0;
  422. }
  423. static void mcp23s08_irq_teardown(struct mcp23s08 *mcp)
  424. {
  425. unsigned int irq, i;
  426. free_irq(mcp->irq, mcp);
  427. for (i = 0; i < mcp->chip.ngpio; i++) {
  428. irq = irq_find_mapping(mcp->irq_domain, i);
  429. if (irq > 0)
  430. irq_dispose_mapping(irq);
  431. }
  432. irq_domain_remove(mcp->irq_domain);
  433. }
  434. /*----------------------------------------------------------------------*/
  435. #ifdef CONFIG_DEBUG_FS
  436. #include <linux/seq_file.h>
  437. /*
  438. * This shows more info than the generic gpio dump code:
  439. * pullups, deglitching, open drain drive.
  440. */
  441. static void mcp23s08_dbg_show(struct seq_file *s, struct gpio_chip *chip)
  442. {
  443. struct mcp23s08 *mcp;
  444. char bank;
  445. int t;
  446. unsigned mask;
  447. mcp = container_of(chip, struct mcp23s08, chip);
  448. /* NOTE: we only handle one bank for now ... */
  449. bank = '0' + ((mcp->addr >> 1) & 0x7);
  450. mutex_lock(&mcp->lock);
  451. t = mcp->ops->read_regs(mcp, 0, mcp->cache, ARRAY_SIZE(mcp->cache));
  452. if (t < 0) {
  453. seq_printf(s, " I/O ERROR %d\n", t);
  454. goto done;
  455. }
  456. for (t = 0, mask = 1; t < chip->ngpio; t++, mask <<= 1) {
  457. const char *label;
  458. label = gpiochip_is_requested(chip, t);
  459. if (!label)
  460. continue;
  461. seq_printf(s, " gpio-%-3d P%c.%d (%-12s) %s %s %s",
  462. chip->base + t, bank, t, label,
  463. (mcp->cache[MCP_IODIR] & mask) ? "in " : "out",
  464. (mcp->cache[MCP_GPIO] & mask) ? "hi" : "lo",
  465. (mcp->cache[MCP_GPPU] & mask) ? "up" : " ");
  466. /* NOTE: ignoring the irq-related registers */
  467. seq_puts(s, "\n");
  468. }
  469. done:
  470. mutex_unlock(&mcp->lock);
  471. }
  472. #else
  473. #define mcp23s08_dbg_show NULL
  474. #endif
  475. /*----------------------------------------------------------------------*/
  476. static int mcp23s08_probe_one(struct mcp23s08 *mcp, struct device *dev,
  477. void *data, unsigned addr, unsigned type,
  478. struct mcp23s08_platform_data *pdata, int cs)
  479. {
  480. int status;
  481. bool mirror = false;
  482. mutex_init(&mcp->lock);
  483. mcp->data = data;
  484. mcp->addr = addr;
  485. mcp->chip.direction_input = mcp23s08_direction_input;
  486. mcp->chip.get = mcp23s08_get;
  487. mcp->chip.direction_output = mcp23s08_direction_output;
  488. mcp->chip.set = mcp23s08_set;
  489. mcp->chip.dbg_show = mcp23s08_dbg_show;
  490. #ifdef CONFIG_OF
  491. mcp->chip.of_gpio_n_cells = 2;
  492. mcp->chip.of_node = dev->of_node;
  493. #endif
  494. switch (type) {
  495. #ifdef CONFIG_SPI_MASTER
  496. case MCP_TYPE_S08:
  497. mcp->ops = &mcp23s08_ops;
  498. mcp->chip.ngpio = 8;
  499. mcp->chip.label = "mcp23s08";
  500. break;
  501. case MCP_TYPE_S17:
  502. mcp->ops = &mcp23s17_ops;
  503. mcp->chip.ngpio = 16;
  504. mcp->chip.label = "mcp23s17";
  505. break;
  506. #endif /* CONFIG_SPI_MASTER */
  507. #if IS_ENABLED(CONFIG_I2C)
  508. case MCP_TYPE_008:
  509. mcp->ops = &mcp23008_ops;
  510. mcp->chip.ngpio = 8;
  511. mcp->chip.label = "mcp23008";
  512. break;
  513. case MCP_TYPE_017:
  514. mcp->ops = &mcp23017_ops;
  515. mcp->chip.ngpio = 16;
  516. mcp->chip.label = "mcp23017";
  517. break;
  518. #endif /* CONFIG_I2C */
  519. default:
  520. dev_err(dev, "invalid device type (%d)\n", type);
  521. return -EINVAL;
  522. }
  523. mcp->chip.base = pdata->base;
  524. mcp->chip.can_sleep = true;
  525. mcp->chip.dev = dev;
  526. mcp->chip.owner = THIS_MODULE;
  527. /* verify MCP_IOCON.SEQOP = 0, so sequential reads work,
  528. * and MCP_IOCON.HAEN = 1, so we work with all chips.
  529. */
  530. status = mcp->ops->read(mcp, MCP_IOCON);
  531. if (status < 0)
  532. goto fail;
  533. mcp->irq_controller = pdata->irq_controller;
  534. if (mcp->irq && mcp->irq_controller && (type == MCP_TYPE_017))
  535. mirror = pdata->mirror;
  536. if ((status & IOCON_SEQOP) || !(status & IOCON_HAEN) || mirror) {
  537. /* mcp23s17 has IOCON twice, make sure they are in sync */
  538. status &= ~(IOCON_SEQOP | (IOCON_SEQOP << 8));
  539. status |= IOCON_HAEN | (IOCON_HAEN << 8);
  540. status &= ~(IOCON_INTPOL | (IOCON_INTPOL << 8));
  541. if (mirror)
  542. status |= IOCON_MIRROR | (IOCON_MIRROR << 8);
  543. status = mcp->ops->write(mcp, MCP_IOCON, status);
  544. if (status < 0)
  545. goto fail;
  546. }
  547. /* configure ~100K pullups */
  548. status = mcp->ops->write(mcp, MCP_GPPU, pdata->chip[cs].pullups);
  549. if (status < 0)
  550. goto fail;
  551. status = mcp->ops->read_regs(mcp, 0, mcp->cache, ARRAY_SIZE(mcp->cache));
  552. if (status < 0)
  553. goto fail;
  554. /* disable inverter on input */
  555. if (mcp->cache[MCP_IPOL] != 0) {
  556. mcp->cache[MCP_IPOL] = 0;
  557. status = mcp->ops->write(mcp, MCP_IPOL, 0);
  558. if (status < 0)
  559. goto fail;
  560. }
  561. /* disable irqs */
  562. if (mcp->cache[MCP_GPINTEN] != 0) {
  563. mcp->cache[MCP_GPINTEN] = 0;
  564. status = mcp->ops->write(mcp, MCP_GPINTEN, 0);
  565. if (status < 0)
  566. goto fail;
  567. }
  568. status = gpiochip_add(&mcp->chip);
  569. if (status < 0)
  570. goto fail;
  571. if (mcp->irq && mcp->irq_controller) {
  572. status = mcp23s08_irq_setup(mcp);
  573. if (status) {
  574. mcp23s08_irq_teardown(mcp);
  575. goto fail;
  576. }
  577. }
  578. fail:
  579. if (status < 0)
  580. dev_dbg(dev, "can't setup chip %d, --> %d\n",
  581. addr, status);
  582. return status;
  583. }
  584. /*----------------------------------------------------------------------*/
  585. #ifdef CONFIG_OF
  586. #ifdef CONFIG_SPI_MASTER
  587. static const struct of_device_id mcp23s08_spi_of_match[] = {
  588. {
  589. .compatible = "microchip,mcp23s08",
  590. .data = (void *) MCP_TYPE_S08,
  591. },
  592. {
  593. .compatible = "microchip,mcp23s17",
  594. .data = (void *) MCP_TYPE_S17,
  595. },
  596. /* NOTE: The use of the mcp prefix is deprecated and will be removed. */
  597. {
  598. .compatible = "mcp,mcp23s08",
  599. .data = (void *) MCP_TYPE_S08,
  600. },
  601. {
  602. .compatible = "mcp,mcp23s17",
  603. .data = (void *) MCP_TYPE_S17,
  604. },
  605. { },
  606. };
  607. MODULE_DEVICE_TABLE(of, mcp23s08_spi_of_match);
  608. #endif
  609. #if IS_ENABLED(CONFIG_I2C)
  610. static const struct of_device_id mcp23s08_i2c_of_match[] = {
  611. {
  612. .compatible = "microchip,mcp23008",
  613. .data = (void *) MCP_TYPE_008,
  614. },
  615. {
  616. .compatible = "microchip,mcp23017",
  617. .data = (void *) MCP_TYPE_017,
  618. },
  619. /* NOTE: The use of the mcp prefix is deprecated and will be removed. */
  620. {
  621. .compatible = "mcp,mcp23008",
  622. .data = (void *) MCP_TYPE_008,
  623. },
  624. {
  625. .compatible = "mcp,mcp23017",
  626. .data = (void *) MCP_TYPE_017,
  627. },
  628. { },
  629. };
  630. MODULE_DEVICE_TABLE(of, mcp23s08_i2c_of_match);
  631. #endif
  632. #endif /* CONFIG_OF */
  633. #if IS_ENABLED(CONFIG_I2C)
  634. static int mcp230xx_probe(struct i2c_client *client,
  635. const struct i2c_device_id *id)
  636. {
  637. struct mcp23s08_platform_data *pdata, local_pdata;
  638. struct mcp23s08 *mcp;
  639. int status;
  640. const struct of_device_id *match;
  641. match = of_match_device(of_match_ptr(mcp23s08_i2c_of_match),
  642. &client->dev);
  643. if (match) {
  644. pdata = &local_pdata;
  645. pdata->base = -1;
  646. pdata->chip[0].pullups = 0;
  647. pdata->irq_controller = of_property_read_bool(
  648. client->dev.of_node,
  649. "interrupt-controller");
  650. pdata->mirror = of_property_read_bool(client->dev.of_node,
  651. "microchip,irq-mirror");
  652. client->irq = irq_of_parse_and_map(client->dev.of_node, 0);
  653. } else {
  654. pdata = dev_get_platdata(&client->dev);
  655. if (!pdata || !gpio_is_valid(pdata->base)) {
  656. dev_dbg(&client->dev, "invalid platform data\n");
  657. return -EINVAL;
  658. }
  659. }
  660. mcp = kzalloc(sizeof(*mcp), GFP_KERNEL);
  661. if (!mcp)
  662. return -ENOMEM;
  663. mcp->irq = client->irq;
  664. status = mcp23s08_probe_one(mcp, &client->dev, client, client->addr,
  665. id->driver_data, pdata, 0);
  666. if (status)
  667. goto fail;
  668. i2c_set_clientdata(client, mcp);
  669. return 0;
  670. fail:
  671. kfree(mcp);
  672. return status;
  673. }
  674. static int mcp230xx_remove(struct i2c_client *client)
  675. {
  676. struct mcp23s08 *mcp = i2c_get_clientdata(client);
  677. if (client->irq && mcp->irq_controller)
  678. mcp23s08_irq_teardown(mcp);
  679. gpiochip_remove(&mcp->chip);
  680. kfree(mcp);
  681. return 0;
  682. }
  683. static const struct i2c_device_id mcp230xx_id[] = {
  684. { "mcp23008", MCP_TYPE_008 },
  685. { "mcp23017", MCP_TYPE_017 },
  686. { },
  687. };
  688. MODULE_DEVICE_TABLE(i2c, mcp230xx_id);
  689. static struct i2c_driver mcp230xx_driver = {
  690. .driver = {
  691. .name = "mcp230xx",
  692. .owner = THIS_MODULE,
  693. .of_match_table = of_match_ptr(mcp23s08_i2c_of_match),
  694. },
  695. .probe = mcp230xx_probe,
  696. .remove = mcp230xx_remove,
  697. .id_table = mcp230xx_id,
  698. };
  699. static int __init mcp23s08_i2c_init(void)
  700. {
  701. return i2c_add_driver(&mcp230xx_driver);
  702. }
  703. static void mcp23s08_i2c_exit(void)
  704. {
  705. i2c_del_driver(&mcp230xx_driver);
  706. }
  707. #else
  708. static int __init mcp23s08_i2c_init(void) { return 0; }
  709. static void mcp23s08_i2c_exit(void) { }
  710. #endif /* CONFIG_I2C */
  711. /*----------------------------------------------------------------------*/
  712. #ifdef CONFIG_SPI_MASTER
  713. static int mcp23s08_probe(struct spi_device *spi)
  714. {
  715. struct mcp23s08_platform_data *pdata, local_pdata;
  716. unsigned addr;
  717. int chips = 0;
  718. struct mcp23s08_driver_data *data;
  719. int status, type;
  720. unsigned ngpio = 0;
  721. const struct of_device_id *match;
  722. u32 spi_present_mask = 0;
  723. match = of_match_device(of_match_ptr(mcp23s08_spi_of_match), &spi->dev);
  724. if (match) {
  725. type = (int)(uintptr_t)match->data;
  726. status = of_property_read_u32(spi->dev.of_node,
  727. "microchip,spi-present-mask", &spi_present_mask);
  728. if (status) {
  729. status = of_property_read_u32(spi->dev.of_node,
  730. "mcp,spi-present-mask", &spi_present_mask);
  731. if (status) {
  732. dev_err(&spi->dev,
  733. "DT has no spi-present-mask\n");
  734. return -ENODEV;
  735. }
  736. }
  737. if ((spi_present_mask <= 0) || (spi_present_mask >= 256)) {
  738. dev_err(&spi->dev, "invalid spi-present-mask\n");
  739. return -ENODEV;
  740. }
  741. pdata = &local_pdata;
  742. pdata->base = -1;
  743. for (addr = 0; addr < ARRAY_SIZE(pdata->chip); addr++) {
  744. pdata->chip[addr].pullups = 0;
  745. if (spi_present_mask & (1 << addr))
  746. chips++;
  747. }
  748. pdata->irq_controller = of_property_read_bool(
  749. spi->dev.of_node,
  750. "interrupt-controller");
  751. pdata->mirror = of_property_read_bool(spi->dev.of_node,
  752. "microchip,irq-mirror");
  753. } else {
  754. type = spi_get_device_id(spi)->driver_data;
  755. pdata = dev_get_platdata(&spi->dev);
  756. if (!pdata || !gpio_is_valid(pdata->base)) {
  757. dev_dbg(&spi->dev,
  758. "invalid or missing platform data\n");
  759. return -EINVAL;
  760. }
  761. for (addr = 0; addr < ARRAY_SIZE(pdata->chip); addr++) {
  762. if (!pdata->chip[addr].is_present)
  763. continue;
  764. chips++;
  765. if ((type == MCP_TYPE_S08) && (addr > 3)) {
  766. dev_err(&spi->dev,
  767. "mcp23s08 only supports address 0..3\n");
  768. return -EINVAL;
  769. }
  770. spi_present_mask |= 1 << addr;
  771. }
  772. }
  773. if (!chips)
  774. return -ENODEV;
  775. data = kzalloc(sizeof(*data) + chips * sizeof(struct mcp23s08),
  776. GFP_KERNEL);
  777. if (!data)
  778. return -ENOMEM;
  779. spi_set_drvdata(spi, data);
  780. for (addr = 0; addr < ARRAY_SIZE(pdata->chip); addr++) {
  781. if (!(spi_present_mask & (1 << addr)))
  782. continue;
  783. chips--;
  784. data->mcp[addr] = &data->chip[chips];
  785. status = mcp23s08_probe_one(data->mcp[addr], &spi->dev, spi,
  786. 0x40 | (addr << 1), type, pdata,
  787. addr);
  788. if (status < 0)
  789. goto fail;
  790. if (pdata->base != -1)
  791. pdata->base += (type == MCP_TYPE_S17) ? 16 : 8;
  792. ngpio += (type == MCP_TYPE_S17) ? 16 : 8;
  793. }
  794. data->ngpio = ngpio;
  795. /* NOTE: these chips have a relatively sane IRQ framework, with
  796. * per-signal masking and level/edge triggering. It's not yet
  797. * handled here...
  798. */
  799. return 0;
  800. fail:
  801. for (addr = 0; addr < ARRAY_SIZE(data->mcp); addr++) {
  802. if (!data->mcp[addr])
  803. continue;
  804. gpiochip_remove(&data->mcp[addr]->chip);
  805. }
  806. kfree(data);
  807. return status;
  808. }
  809. static int mcp23s08_remove(struct spi_device *spi)
  810. {
  811. struct mcp23s08_driver_data *data = spi_get_drvdata(spi);
  812. unsigned addr;
  813. for (addr = 0; addr < ARRAY_SIZE(data->mcp); addr++) {
  814. if (!data->mcp[addr])
  815. continue;
  816. gpiochip_remove(&data->mcp[addr]->chip);
  817. }
  818. kfree(data);
  819. return 0;
  820. }
  821. static const struct spi_device_id mcp23s08_ids[] = {
  822. { "mcp23s08", MCP_TYPE_S08 },
  823. { "mcp23s17", MCP_TYPE_S17 },
  824. { },
  825. };
  826. MODULE_DEVICE_TABLE(spi, mcp23s08_ids);
  827. static struct spi_driver mcp23s08_driver = {
  828. .probe = mcp23s08_probe,
  829. .remove = mcp23s08_remove,
  830. .id_table = mcp23s08_ids,
  831. .driver = {
  832. .name = "mcp23s08",
  833. .owner = THIS_MODULE,
  834. .of_match_table = of_match_ptr(mcp23s08_spi_of_match),
  835. },
  836. };
  837. static int __init mcp23s08_spi_init(void)
  838. {
  839. return spi_register_driver(&mcp23s08_driver);
  840. }
  841. static void mcp23s08_spi_exit(void)
  842. {
  843. spi_unregister_driver(&mcp23s08_driver);
  844. }
  845. #else
  846. static int __init mcp23s08_spi_init(void) { return 0; }
  847. static void mcp23s08_spi_exit(void) { }
  848. #endif /* CONFIG_SPI_MASTER */
  849. /*----------------------------------------------------------------------*/
  850. static int __init mcp23s08_init(void)
  851. {
  852. int ret;
  853. ret = mcp23s08_spi_init();
  854. if (ret)
  855. goto spi_fail;
  856. ret = mcp23s08_i2c_init();
  857. if (ret)
  858. goto i2c_fail;
  859. return 0;
  860. i2c_fail:
  861. mcp23s08_spi_exit();
  862. spi_fail:
  863. return ret;
  864. }
  865. /* register after spi/i2c postcore initcall and before
  866. * subsys initcalls that may rely on these GPIOs
  867. */
  868. subsys_initcall(mcp23s08_init);
  869. static void __exit mcp23s08_exit(void)
  870. {
  871. mcp23s08_spi_exit();
  872. mcp23s08_i2c_exit();
  873. }
  874. module_exit(mcp23s08_exit);
  875. MODULE_LICENSE("GPL");