clk-conf.c 3.8 KB

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  1. /*
  2. * Copyright (C) 2014 Samsung Electronics Co., Ltd.
  3. * Sylwester Nawrocki <s.nawrocki@samsung.com>
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License version 2 as
  7. * published by the Free Software Foundation.
  8. */
  9. #include <linux/clk.h>
  10. #include <linux/clk-provider.h>
  11. #include <linux/clk/clk-conf.h>
  12. #include <linux/device.h>
  13. #include <linux/of.h>
  14. #include <linux/printk.h>
  15. #include "clk.h"
  16. static int __set_clk_parents(struct device_node *node, bool clk_supplier)
  17. {
  18. struct of_phandle_args clkspec;
  19. int index, rc, num_parents;
  20. struct clk *clk, *pclk;
  21. num_parents = of_count_phandle_with_args(node, "assigned-clock-parents",
  22. "#clock-cells");
  23. if (num_parents == -EINVAL)
  24. pr_err("clk: invalid value of clock-parents property at %s\n",
  25. node->full_name);
  26. for (index = 0; index < num_parents; index++) {
  27. rc = of_parse_phandle_with_args(node, "assigned-clock-parents",
  28. "#clock-cells", index, &clkspec);
  29. if (rc < 0) {
  30. /* skip empty (null) phandles */
  31. if (rc == -ENOENT)
  32. continue;
  33. else
  34. return rc;
  35. }
  36. if (clkspec.np == node && !clk_supplier)
  37. return 0;
  38. pclk = of_clk_get_by_clkspec(&clkspec);
  39. if (IS_ERR(pclk)) {
  40. pr_warn("clk: couldn't get parent clock %d for %s\n",
  41. index, node->full_name);
  42. return PTR_ERR(pclk);
  43. }
  44. rc = of_parse_phandle_with_args(node, "assigned-clocks",
  45. "#clock-cells", index, &clkspec);
  46. if (rc < 0)
  47. goto err;
  48. if (clkspec.np == node && !clk_supplier) {
  49. rc = 0;
  50. goto err;
  51. }
  52. clk = of_clk_get_by_clkspec(&clkspec);
  53. if (IS_ERR(clk)) {
  54. pr_warn("clk: couldn't get parent clock %d for %s\n",
  55. index, node->full_name);
  56. rc = PTR_ERR(clk);
  57. goto err;
  58. }
  59. rc = clk_set_parent(clk, pclk);
  60. if (rc < 0)
  61. pr_err("clk: failed to reparent %s to %s: %d\n",
  62. __clk_get_name(clk), __clk_get_name(pclk), rc);
  63. clk_put(clk);
  64. clk_put(pclk);
  65. }
  66. return 0;
  67. err:
  68. clk_put(pclk);
  69. return rc;
  70. }
  71. static int __set_clk_rates(struct device_node *node, bool clk_supplier)
  72. {
  73. struct of_phandle_args clkspec;
  74. struct property *prop;
  75. const __be32 *cur;
  76. int rc, index = 0;
  77. struct clk *clk;
  78. u32 rate;
  79. of_property_for_each_u32(node, "assigned-clock-rates", prop, cur, rate) {
  80. if (rate) {
  81. rc = of_parse_phandle_with_args(node, "assigned-clocks",
  82. "#clock-cells", index, &clkspec);
  83. if (rc < 0) {
  84. /* skip empty (null) phandles */
  85. if (rc == -ENOENT)
  86. continue;
  87. else
  88. return rc;
  89. }
  90. if (clkspec.np == node && !clk_supplier)
  91. return 0;
  92. clk = of_clk_get_by_clkspec(&clkspec);
  93. if (IS_ERR(clk)) {
  94. pr_warn("clk: couldn't get clock %d for %s\n",
  95. index, node->full_name);
  96. return PTR_ERR(clk);
  97. }
  98. rc = clk_set_rate(clk, rate);
  99. if (rc < 0)
  100. pr_err("clk: couldn't set %s clock rate: %d\n",
  101. __clk_get_name(clk), rc);
  102. clk_put(clk);
  103. }
  104. index++;
  105. }
  106. return 0;
  107. }
  108. /**
  109. * of_clk_set_defaults() - parse and set assigned clocks configuration
  110. * @node: device node to apply clock settings for
  111. * @clk_supplier: true if clocks supplied by @node should also be considered
  112. *
  113. * This function parses 'assigned-{clocks/clock-parents/clock-rates}' properties
  114. * and sets any specified clock parents and rates. The @clk_supplier argument
  115. * should be set to true if @node may be also a clock supplier of any clock
  116. * listed in its 'assigned-clocks' or 'assigned-clock-parents' properties.
  117. * If @clk_supplier is false the function exits returnning 0 as soon as it
  118. * determines the @node is also a supplier of any of the clocks.
  119. */
  120. int of_clk_set_defaults(struct device_node *node, bool clk_supplier)
  121. {
  122. int rc;
  123. if (!node)
  124. return 0;
  125. rc = __set_clk_parents(node, clk_supplier);
  126. if (rc < 0)
  127. return rc;
  128. return __set_clk_rates(node, clk_supplier);
  129. }
  130. EXPORT_SYMBOL_GPL(of_clk_set_defaults);