libahci_platform.c 15 KB

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  1. /*
  2. * AHCI SATA platform library
  3. *
  4. * Copyright 2004-2005 Red Hat, Inc.
  5. * Jeff Garzik <jgarzik@pobox.com>
  6. * Copyright 2010 MontaVista Software, LLC.
  7. * Anton Vorontsov <avorontsov@ru.mvista.com>
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation; either version 2, or (at your option)
  12. * any later version.
  13. */
  14. #include <linux/clk.h>
  15. #include <linux/kernel.h>
  16. #include <linux/gfp.h>
  17. #include <linux/module.h>
  18. #include <linux/pm.h>
  19. #include <linux/interrupt.h>
  20. #include <linux/device.h>
  21. #include <linux/platform_device.h>
  22. #include <linux/libata.h>
  23. #include <linux/ahci_platform.h>
  24. #include <linux/phy/phy.h>
  25. #include <linux/pm_runtime.h>
  26. #include "ahci.h"
  27. static void ahci_host_stop(struct ata_host *host);
  28. struct ata_port_operations ahci_platform_ops = {
  29. .inherits = &ahci_ops,
  30. .host_stop = ahci_host_stop,
  31. };
  32. EXPORT_SYMBOL_GPL(ahci_platform_ops);
  33. static struct scsi_host_template ahci_platform_sht = {
  34. AHCI_SHT("ahci_platform"),
  35. };
  36. /**
  37. * ahci_platform_enable_phys - Enable PHYs
  38. * @hpriv: host private area to store config values
  39. *
  40. * This function enables all the PHYs found in hpriv->phys, if any.
  41. * If a PHY fails to be enabled, it disables all the PHYs already
  42. * enabled in reverse order and returns an error.
  43. *
  44. * RETURNS:
  45. * 0 on success otherwise a negative error code
  46. */
  47. static int ahci_platform_enable_phys(struct ahci_host_priv *hpriv)
  48. {
  49. int rc, i;
  50. for (i = 0; i < hpriv->nports; i++) {
  51. if (!hpriv->phys[i])
  52. continue;
  53. rc = phy_init(hpriv->phys[i]);
  54. if (rc)
  55. goto disable_phys;
  56. rc = phy_power_on(hpriv->phys[i]);
  57. if (rc) {
  58. phy_exit(hpriv->phys[i]);
  59. goto disable_phys;
  60. }
  61. }
  62. return 0;
  63. disable_phys:
  64. while (--i >= 0) {
  65. phy_power_off(hpriv->phys[i]);
  66. phy_exit(hpriv->phys[i]);
  67. }
  68. return rc;
  69. }
  70. /**
  71. * ahci_platform_disable_phys - Disable PHYs
  72. * @hpriv: host private area to store config values
  73. *
  74. * This function disables all PHYs found in hpriv->phys.
  75. */
  76. static void ahci_platform_disable_phys(struct ahci_host_priv *hpriv)
  77. {
  78. int i;
  79. for (i = 0; i < hpriv->nports; i++) {
  80. if (!hpriv->phys[i])
  81. continue;
  82. phy_power_off(hpriv->phys[i]);
  83. phy_exit(hpriv->phys[i]);
  84. }
  85. }
  86. /**
  87. * ahci_platform_enable_clks - Enable platform clocks
  88. * @hpriv: host private area to store config values
  89. *
  90. * This function enables all the clks found in hpriv->clks, starting at
  91. * index 0. If any clk fails to enable it disables all the clks already
  92. * enabled in reverse order, and then returns an error.
  93. *
  94. * RETURNS:
  95. * 0 on success otherwise a negative error code
  96. */
  97. int ahci_platform_enable_clks(struct ahci_host_priv *hpriv)
  98. {
  99. int c, rc;
  100. for (c = 0; c < AHCI_MAX_CLKS && hpriv->clks[c]; c++) {
  101. rc = clk_prepare_enable(hpriv->clks[c]);
  102. if (rc)
  103. goto disable_unprepare_clk;
  104. }
  105. return 0;
  106. disable_unprepare_clk:
  107. while (--c >= 0)
  108. clk_disable_unprepare(hpriv->clks[c]);
  109. return rc;
  110. }
  111. EXPORT_SYMBOL_GPL(ahci_platform_enable_clks);
  112. /**
  113. * ahci_platform_disable_clks - Disable platform clocks
  114. * @hpriv: host private area to store config values
  115. *
  116. * This function disables all the clks found in hpriv->clks, in reverse
  117. * order of ahci_platform_enable_clks (starting at the end of the array).
  118. */
  119. void ahci_platform_disable_clks(struct ahci_host_priv *hpriv)
  120. {
  121. int c;
  122. for (c = AHCI_MAX_CLKS - 1; c >= 0; c--)
  123. if (hpriv->clks[c])
  124. clk_disable_unprepare(hpriv->clks[c]);
  125. }
  126. EXPORT_SYMBOL_GPL(ahci_platform_disable_clks);
  127. /**
  128. * ahci_platform_enable_resources - Enable platform resources
  129. * @hpriv: host private area to store config values
  130. *
  131. * This function enables all ahci_platform managed resources in the
  132. * following order:
  133. * 1) Regulator
  134. * 2) Clocks (through ahci_platform_enable_clks)
  135. * 3) Phys
  136. *
  137. * If resource enabling fails at any point the previous enabled resources
  138. * are disabled in reverse order.
  139. *
  140. * RETURNS:
  141. * 0 on success otherwise a negative error code
  142. */
  143. int ahci_platform_enable_resources(struct ahci_host_priv *hpriv)
  144. {
  145. int rc;
  146. if (hpriv->target_pwr) {
  147. rc = regulator_enable(hpriv->target_pwr);
  148. if (rc)
  149. return rc;
  150. }
  151. rc = ahci_platform_enable_clks(hpriv);
  152. if (rc)
  153. goto disable_regulator;
  154. rc = ahci_platform_enable_phys(hpriv);
  155. if (rc)
  156. goto disable_clks;
  157. return 0;
  158. disable_clks:
  159. ahci_platform_disable_clks(hpriv);
  160. disable_regulator:
  161. if (hpriv->target_pwr)
  162. regulator_disable(hpriv->target_pwr);
  163. return rc;
  164. }
  165. EXPORT_SYMBOL_GPL(ahci_platform_enable_resources);
  166. /**
  167. * ahci_platform_disable_resources - Disable platform resources
  168. * @hpriv: host private area to store config values
  169. *
  170. * This function disables all ahci_platform managed resources in the
  171. * following order:
  172. * 1) Phys
  173. * 2) Clocks (through ahci_platform_disable_clks)
  174. * 3) Regulator
  175. */
  176. void ahci_platform_disable_resources(struct ahci_host_priv *hpriv)
  177. {
  178. ahci_platform_disable_phys(hpriv);
  179. ahci_platform_disable_clks(hpriv);
  180. if (hpriv->target_pwr)
  181. regulator_disable(hpriv->target_pwr);
  182. }
  183. EXPORT_SYMBOL_GPL(ahci_platform_disable_resources);
  184. static void ahci_platform_put_resources(struct device *dev, void *res)
  185. {
  186. struct ahci_host_priv *hpriv = res;
  187. int c;
  188. if (hpriv->got_runtime_pm) {
  189. pm_runtime_put_sync(dev);
  190. pm_runtime_disable(dev);
  191. }
  192. for (c = 0; c < AHCI_MAX_CLKS && hpriv->clks[c]; c++)
  193. clk_put(hpriv->clks[c]);
  194. }
  195. /**
  196. * ahci_platform_get_resources - Get platform resources
  197. * @pdev: platform device to get resources for
  198. *
  199. * This function allocates an ahci_host_priv struct, and gets the following
  200. * resources, storing a reference to them inside the returned struct:
  201. *
  202. * 1) mmio registers (IORESOURCE_MEM 0, mandatory)
  203. * 2) regulator for controlling the targets power (optional)
  204. * 3) 0 - AHCI_MAX_CLKS clocks, as specified in the devs devicetree node,
  205. * or for non devicetree enabled platforms a single clock
  206. * 4) phys (optional)
  207. *
  208. * RETURNS:
  209. * The allocated ahci_host_priv on success, otherwise an ERR_PTR value
  210. */
  211. struct ahci_host_priv *ahci_platform_get_resources(struct platform_device *pdev)
  212. {
  213. struct device *dev = &pdev->dev;
  214. struct ahci_host_priv *hpriv;
  215. struct clk *clk;
  216. struct device_node *child;
  217. int i, enabled_ports = 0, rc = -ENOMEM;
  218. u32 mask_port_map = 0;
  219. if (!devres_open_group(dev, NULL, GFP_KERNEL))
  220. return ERR_PTR(-ENOMEM);
  221. hpriv = devres_alloc(ahci_platform_put_resources, sizeof(*hpriv),
  222. GFP_KERNEL);
  223. if (!hpriv)
  224. goto err_out;
  225. devres_add(dev, hpriv);
  226. hpriv->mmio = devm_ioremap_resource(dev,
  227. platform_get_resource(pdev, IORESOURCE_MEM, 0));
  228. if (IS_ERR(hpriv->mmio)) {
  229. dev_err(dev, "no mmio space\n");
  230. rc = PTR_ERR(hpriv->mmio);
  231. goto err_out;
  232. }
  233. hpriv->target_pwr = devm_regulator_get_optional(dev, "target");
  234. if (IS_ERR(hpriv->target_pwr)) {
  235. rc = PTR_ERR(hpriv->target_pwr);
  236. if (rc == -EPROBE_DEFER)
  237. goto err_out;
  238. hpriv->target_pwr = NULL;
  239. }
  240. for (i = 0; i < AHCI_MAX_CLKS; i++) {
  241. /*
  242. * For now we must use clk_get(dev, NULL) for the first clock,
  243. * because some platforms (da850, spear13xx) are not yet
  244. * converted to use devicetree for clocks. For new platforms
  245. * this is equivalent to of_clk_get(dev->of_node, 0).
  246. */
  247. if (i == 0)
  248. clk = clk_get(dev, NULL);
  249. else
  250. clk = of_clk_get(dev->of_node, i);
  251. if (IS_ERR(clk)) {
  252. rc = PTR_ERR(clk);
  253. if (rc == -EPROBE_DEFER)
  254. goto err_out;
  255. break;
  256. }
  257. hpriv->clks[i] = clk;
  258. }
  259. hpriv->nports = of_get_child_count(dev->of_node);
  260. if (hpriv->nports) {
  261. hpriv->phys = devm_kzalloc(dev,
  262. hpriv->nports * sizeof(*hpriv->phys),
  263. GFP_KERNEL);
  264. if (!hpriv->phys) {
  265. rc = -ENOMEM;
  266. goto err_out;
  267. }
  268. for_each_child_of_node(dev->of_node, child) {
  269. u32 port;
  270. if (!of_device_is_available(child))
  271. continue;
  272. if (of_property_read_u32(child, "reg", &port)) {
  273. rc = -EINVAL;
  274. goto err_out;
  275. }
  276. if (port >= hpriv->nports) {
  277. dev_warn(dev, "invalid port number %d\n", port);
  278. continue;
  279. }
  280. mask_port_map |= BIT(port);
  281. hpriv->phys[port] = devm_of_phy_get(dev, child, NULL);
  282. if (IS_ERR(hpriv->phys[port])) {
  283. rc = PTR_ERR(hpriv->phys[port]);
  284. dev_err(dev,
  285. "couldn't get PHY in node %s: %d\n",
  286. child->name, rc);
  287. goto err_out;
  288. }
  289. enabled_ports++;
  290. }
  291. if (!enabled_ports) {
  292. dev_warn(dev, "No port enabled\n");
  293. rc = -ENODEV;
  294. goto err_out;
  295. }
  296. if (!hpriv->mask_port_map)
  297. hpriv->mask_port_map = mask_port_map;
  298. } else {
  299. /*
  300. * If no sub-node was found, keep this for device tree
  301. * compatibility
  302. */
  303. struct phy *phy = devm_phy_get(dev, "sata-phy");
  304. if (!IS_ERR(phy)) {
  305. hpriv->phys = devm_kzalloc(dev, sizeof(*hpriv->phys),
  306. GFP_KERNEL);
  307. if (!hpriv->phys) {
  308. rc = -ENOMEM;
  309. goto err_out;
  310. }
  311. hpriv->phys[0] = phy;
  312. hpriv->nports = 1;
  313. } else {
  314. rc = PTR_ERR(phy);
  315. switch (rc) {
  316. case -ENOSYS:
  317. /* No PHY support. Check if PHY is required. */
  318. if (of_find_property(dev->of_node, "phys", NULL)) {
  319. dev_err(dev, "couldn't get sata-phy: ENOSYS\n");
  320. goto err_out;
  321. }
  322. case -ENODEV:
  323. /* continue normally */
  324. hpriv->phys = NULL;
  325. break;
  326. default:
  327. goto err_out;
  328. }
  329. }
  330. }
  331. pm_runtime_enable(dev);
  332. pm_runtime_get_sync(dev);
  333. hpriv->got_runtime_pm = true;
  334. devres_remove_group(dev, NULL);
  335. return hpriv;
  336. err_out:
  337. devres_release_group(dev, NULL);
  338. return ERR_PTR(rc);
  339. }
  340. EXPORT_SYMBOL_GPL(ahci_platform_get_resources);
  341. /**
  342. * ahci_platform_init_host - Bring up an ahci-platform host
  343. * @pdev: platform device pointer for the host
  344. * @hpriv: ahci-host private data for the host
  345. * @pi_template: template for the ata_port_info to use
  346. *
  347. * This function does all the usual steps needed to bring up an
  348. * ahci-platform host, note any necessary resources (ie clks, phys, etc.)
  349. * must be initialized / enabled before calling this.
  350. *
  351. * RETURNS:
  352. * 0 on success otherwise a negative error code
  353. */
  354. int ahci_platform_init_host(struct platform_device *pdev,
  355. struct ahci_host_priv *hpriv,
  356. const struct ata_port_info *pi_template)
  357. {
  358. struct device *dev = &pdev->dev;
  359. struct ata_port_info pi = *pi_template;
  360. const struct ata_port_info *ppi[] = { &pi, NULL };
  361. struct ata_host *host;
  362. int i, irq, n_ports, rc;
  363. irq = platform_get_irq(pdev, 0);
  364. if (irq <= 0) {
  365. dev_err(dev, "no irq\n");
  366. return -EINVAL;
  367. }
  368. /* prepare host */
  369. pi.private_data = (void *)(unsigned long)hpriv->flags;
  370. ahci_save_initial_config(dev, hpriv);
  371. if (hpriv->cap & HOST_CAP_NCQ)
  372. pi.flags |= ATA_FLAG_NCQ;
  373. if (hpriv->cap & HOST_CAP_PMP)
  374. pi.flags |= ATA_FLAG_PMP;
  375. ahci_set_em_messages(hpriv, &pi);
  376. /* CAP.NP sometimes indicate the index of the last enabled
  377. * port, at other times, that of the last possible port, so
  378. * determining the maximum port number requires looking at
  379. * both CAP.NP and port_map.
  380. */
  381. n_ports = max(ahci_nr_ports(hpriv->cap), fls(hpriv->port_map));
  382. host = ata_host_alloc_pinfo(dev, ppi, n_ports);
  383. if (!host)
  384. return -ENOMEM;
  385. host->private_data = hpriv;
  386. if (!(hpriv->cap & HOST_CAP_SSS) || ahci_ignore_sss)
  387. host->flags |= ATA_HOST_PARALLEL_SCAN;
  388. else
  389. dev_info(dev, "SSS flag set, parallel bus scan disabled\n");
  390. if (pi.flags & ATA_FLAG_EM)
  391. ahci_reset_em(host);
  392. for (i = 0; i < host->n_ports; i++) {
  393. struct ata_port *ap = host->ports[i];
  394. ata_port_desc(ap, "mmio %pR",
  395. platform_get_resource(pdev, IORESOURCE_MEM, 0));
  396. ata_port_desc(ap, "port 0x%x", 0x100 + ap->port_no * 0x80);
  397. /* set enclosure management message type */
  398. if (ap->flags & ATA_FLAG_EM)
  399. ap->em_message_type = hpriv->em_msg_type;
  400. /* disabled/not-implemented port */
  401. if (!(hpriv->port_map & (1 << i)))
  402. ap->ops = &ata_dummy_port_ops;
  403. }
  404. if (hpriv->cap & HOST_CAP_64) {
  405. rc = dma_coerce_mask_and_coherent(dev, DMA_BIT_MASK(64));
  406. if (rc) {
  407. rc = dma_coerce_mask_and_coherent(dev,
  408. DMA_BIT_MASK(32));
  409. if (rc) {
  410. dev_err(dev, "Failed to enable 64-bit DMA.\n");
  411. return rc;
  412. }
  413. dev_warn(dev, "Enable 32-bit DMA instead of 64-bit.\n");
  414. }
  415. }
  416. rc = ahci_reset_controller(host);
  417. if (rc)
  418. return rc;
  419. ahci_init_controller(host);
  420. ahci_print_info(host, "platform");
  421. return ahci_host_activate(host, irq, &ahci_platform_sht);
  422. }
  423. EXPORT_SYMBOL_GPL(ahci_platform_init_host);
  424. static void ahci_host_stop(struct ata_host *host)
  425. {
  426. struct ahci_host_priv *hpriv = host->private_data;
  427. ahci_platform_disable_resources(hpriv);
  428. }
  429. #ifdef CONFIG_PM_SLEEP
  430. /**
  431. * ahci_platform_suspend_host - Suspend an ahci-platform host
  432. * @dev: device pointer for the host
  433. *
  434. * This function does all the usual steps needed to suspend an
  435. * ahci-platform host, note any necessary resources (ie clks, phys, etc.)
  436. * must be disabled after calling this.
  437. *
  438. * RETURNS:
  439. * 0 on success otherwise a negative error code
  440. */
  441. int ahci_platform_suspend_host(struct device *dev)
  442. {
  443. struct ata_host *host = dev_get_drvdata(dev);
  444. struct ahci_host_priv *hpriv = host->private_data;
  445. void __iomem *mmio = hpriv->mmio;
  446. u32 ctl;
  447. if (hpriv->flags & AHCI_HFLAG_NO_SUSPEND) {
  448. dev_err(dev, "firmware update required for suspend/resume\n");
  449. return -EIO;
  450. }
  451. /*
  452. * AHCI spec rev1.1 section 8.3.3:
  453. * Software must disable interrupts prior to requesting a
  454. * transition of the HBA to D3 state.
  455. */
  456. ctl = readl(mmio + HOST_CTL);
  457. ctl &= ~HOST_IRQ_EN;
  458. writel(ctl, mmio + HOST_CTL);
  459. readl(mmio + HOST_CTL); /* flush */
  460. return ata_host_suspend(host, PMSG_SUSPEND);
  461. }
  462. EXPORT_SYMBOL_GPL(ahci_platform_suspend_host);
  463. /**
  464. * ahci_platform_resume_host - Resume an ahci-platform host
  465. * @dev: device pointer for the host
  466. *
  467. * This function does all the usual steps needed to resume an ahci-platform
  468. * host, note any necessary resources (ie clks, phys, etc.) must be
  469. * initialized / enabled before calling this.
  470. *
  471. * RETURNS:
  472. * 0 on success otherwise a negative error code
  473. */
  474. int ahci_platform_resume_host(struct device *dev)
  475. {
  476. struct ata_host *host = dev_get_drvdata(dev);
  477. int rc;
  478. if (dev->power.power_state.event == PM_EVENT_SUSPEND) {
  479. rc = ahci_reset_controller(host);
  480. if (rc)
  481. return rc;
  482. ahci_init_controller(host);
  483. }
  484. ata_host_resume(host);
  485. return 0;
  486. }
  487. EXPORT_SYMBOL_GPL(ahci_platform_resume_host);
  488. /**
  489. * ahci_platform_suspend - Suspend an ahci-platform device
  490. * @dev: the platform device to suspend
  491. *
  492. * This function suspends the host associated with the device, followed by
  493. * disabling all the resources of the device.
  494. *
  495. * RETURNS:
  496. * 0 on success otherwise a negative error code
  497. */
  498. int ahci_platform_suspend(struct device *dev)
  499. {
  500. struct ata_host *host = dev_get_drvdata(dev);
  501. struct ahci_host_priv *hpriv = host->private_data;
  502. int rc;
  503. rc = ahci_platform_suspend_host(dev);
  504. if (rc)
  505. return rc;
  506. ahci_platform_disable_resources(hpriv);
  507. return 0;
  508. }
  509. EXPORT_SYMBOL_GPL(ahci_platform_suspend);
  510. /**
  511. * ahci_platform_resume - Resume an ahci-platform device
  512. * @dev: the platform device to resume
  513. *
  514. * This function enables all the resources of the device followed by
  515. * resuming the host associated with the device.
  516. *
  517. * RETURNS:
  518. * 0 on success otherwise a negative error code
  519. */
  520. int ahci_platform_resume(struct device *dev)
  521. {
  522. struct ata_host *host = dev_get_drvdata(dev);
  523. struct ahci_host_priv *hpriv = host->private_data;
  524. int rc;
  525. rc = ahci_platform_enable_resources(hpriv);
  526. if (rc)
  527. return rc;
  528. rc = ahci_platform_resume_host(dev);
  529. if (rc)
  530. goto disable_resources;
  531. /* We resumed so update PM runtime state */
  532. pm_runtime_disable(dev);
  533. pm_runtime_set_active(dev);
  534. pm_runtime_enable(dev);
  535. return 0;
  536. disable_resources:
  537. ahci_platform_disable_resources(hpriv);
  538. return rc;
  539. }
  540. EXPORT_SYMBOL_GPL(ahci_platform_resume);
  541. #endif
  542. MODULE_DESCRIPTION("AHCI SATA platform library");
  543. MODULE_AUTHOR("Anton Vorontsov <avorontsov@ru.mvista.com>");
  544. MODULE_LICENSE("GPL");