qcom_glink_smem.c 7.0 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310
  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Copyright (c) 2016, Linaro Ltd
  4. */
  5. #include <linux/io.h>
  6. #include <linux/module.h>
  7. #include <linux/of.h>
  8. #include <linux/of_address.h>
  9. #include <linux/interrupt.h>
  10. #include <linux/platform_device.h>
  11. #include <linux/mfd/syscon.h>
  12. #include <linux/slab.h>
  13. #include <linux/rpmsg.h>
  14. #include <linux/idr.h>
  15. #include <linux/circ_buf.h>
  16. #include <linux/soc/qcom/smem.h>
  17. #include <linux/sizes.h>
  18. #include <linux/delay.h>
  19. #include <linux/regmap.h>
  20. #include <linux/workqueue.h>
  21. #include <linux/list.h>
  22. #include <linux/rpmsg/qcom_glink.h>
  23. #include "qcom_glink_native.h"
  24. #define FIFO_FULL_RESERVE 8
  25. #define FIFO_ALIGNMENT 8
  26. #define TX_BLOCKED_CMD_RESERVE 8 /* size of struct read_notif_request */
  27. #define SMEM_GLINK_NATIVE_XPRT_DESCRIPTOR 478
  28. #define SMEM_GLINK_NATIVE_XPRT_FIFO_0 479
  29. #define SMEM_GLINK_NATIVE_XPRT_FIFO_1 480
  30. struct glink_smem_pipe {
  31. struct qcom_glink_pipe native;
  32. __le32 *tail;
  33. __le32 *head;
  34. void *fifo;
  35. int remote_pid;
  36. };
  37. #define to_smem_pipe(p) container_of(p, struct glink_smem_pipe, native)
  38. static size_t glink_smem_rx_avail(struct qcom_glink_pipe *np)
  39. {
  40. struct glink_smem_pipe *pipe = to_smem_pipe(np);
  41. size_t len;
  42. void *fifo;
  43. u32 head;
  44. u32 tail;
  45. if (!pipe->fifo) {
  46. fifo = qcom_smem_get(pipe->remote_pid,
  47. SMEM_GLINK_NATIVE_XPRT_FIFO_1, &len);
  48. if (IS_ERR(fifo)) {
  49. pr_err("failed to acquire RX fifo handle: %ld\n",
  50. PTR_ERR(fifo));
  51. return 0;
  52. }
  53. pipe->fifo = fifo;
  54. pipe->native.length = len;
  55. }
  56. head = le32_to_cpu(*pipe->head);
  57. tail = le32_to_cpu(*pipe->tail);
  58. if (head < tail)
  59. return pipe->native.length - tail + head;
  60. else
  61. return head - tail;
  62. }
  63. static void glink_smem_rx_peak(struct qcom_glink_pipe *np,
  64. void *data, unsigned int offset, size_t count)
  65. {
  66. struct glink_smem_pipe *pipe = to_smem_pipe(np);
  67. size_t len;
  68. u32 tail;
  69. tail = le32_to_cpu(*pipe->tail);
  70. tail += offset;
  71. if (tail >= pipe->native.length)
  72. tail -= pipe->native.length;
  73. len = min_t(size_t, count, pipe->native.length - tail);
  74. if (len) {
  75. __ioread32_copy(data, pipe->fifo + tail,
  76. len / sizeof(u32));
  77. }
  78. if (len != count) {
  79. __ioread32_copy(data + len, pipe->fifo,
  80. (count - len) / sizeof(u32));
  81. }
  82. }
  83. static void glink_smem_rx_advance(struct qcom_glink_pipe *np,
  84. size_t count)
  85. {
  86. struct glink_smem_pipe *pipe = to_smem_pipe(np);
  87. u32 tail;
  88. tail = le32_to_cpu(*pipe->tail);
  89. tail += count;
  90. if (tail > pipe->native.length)
  91. tail -= pipe->native.length;
  92. *pipe->tail = cpu_to_le32(tail);
  93. }
  94. static size_t glink_smem_tx_avail(struct qcom_glink_pipe *np)
  95. {
  96. struct glink_smem_pipe *pipe = to_smem_pipe(np);
  97. u32 head;
  98. u32 tail;
  99. u32 avail;
  100. head = le32_to_cpu(*pipe->head);
  101. tail = le32_to_cpu(*pipe->tail);
  102. if (tail <= head)
  103. avail = pipe->native.length - head + tail;
  104. else
  105. avail = tail - head;
  106. if (avail < (FIFO_FULL_RESERVE + TX_BLOCKED_CMD_RESERVE))
  107. avail = 0;
  108. else
  109. avail -= FIFO_FULL_RESERVE + TX_BLOCKED_CMD_RESERVE;
  110. return avail;
  111. }
  112. static unsigned int glink_smem_tx_write_one(struct glink_smem_pipe *pipe,
  113. unsigned int head,
  114. const void *data, size_t count)
  115. {
  116. size_t len;
  117. len = min_t(size_t, count, pipe->native.length - head);
  118. if (len)
  119. memcpy(pipe->fifo + head, data, len);
  120. if (len != count)
  121. memcpy(pipe->fifo, data + len, count - len);
  122. head += count;
  123. if (head >= pipe->native.length)
  124. head -= pipe->native.length;
  125. return head;
  126. }
  127. static void glink_smem_tx_write(struct qcom_glink_pipe *glink_pipe,
  128. const void *hdr, size_t hlen,
  129. const void *data, size_t dlen)
  130. {
  131. struct glink_smem_pipe *pipe = to_smem_pipe(glink_pipe);
  132. unsigned int head;
  133. head = le32_to_cpu(*pipe->head);
  134. head = glink_smem_tx_write_one(pipe, head, hdr, hlen);
  135. head = glink_smem_tx_write_one(pipe, head, data, dlen);
  136. /* Ensure head is always aligned to 8 bytes */
  137. head = ALIGN(head, 8);
  138. if (head >= pipe->native.length)
  139. head -= pipe->native.length;
  140. /* Ensure ordering of fifo and head update */
  141. wmb();
  142. *pipe->head = cpu_to_le32(head);
  143. }
  144. static void qcom_glink_smem_release(struct device *dev)
  145. {
  146. kfree(dev);
  147. }
  148. struct qcom_glink *qcom_glink_smem_register(struct device *parent,
  149. struct device_node *node)
  150. {
  151. struct glink_smem_pipe *rx_pipe;
  152. struct glink_smem_pipe *tx_pipe;
  153. struct qcom_glink *glink;
  154. struct device *dev;
  155. u32 remote_pid;
  156. __le32 *descs;
  157. size_t size;
  158. int ret;
  159. dev = kzalloc(sizeof(*dev), GFP_KERNEL);
  160. if (!dev)
  161. return ERR_PTR(-ENOMEM);
  162. dev->parent = parent;
  163. dev->of_node = node;
  164. dev->release = qcom_glink_smem_release;
  165. dev_set_name(dev, "%pOFn:%pOFn", node->parent, node);
  166. ret = device_register(dev);
  167. if (ret) {
  168. pr_err("failed to register glink edge\n");
  169. put_device(dev);
  170. return ERR_PTR(ret);
  171. }
  172. ret = of_property_read_u32(dev->of_node, "qcom,remote-pid",
  173. &remote_pid);
  174. if (ret) {
  175. dev_err(dev, "failed to parse qcom,remote-pid\n");
  176. goto err_put_dev;
  177. }
  178. rx_pipe = devm_kzalloc(dev, sizeof(*rx_pipe), GFP_KERNEL);
  179. tx_pipe = devm_kzalloc(dev, sizeof(*tx_pipe), GFP_KERNEL);
  180. if (!rx_pipe || !tx_pipe) {
  181. ret = -ENOMEM;
  182. goto err_put_dev;
  183. }
  184. ret = qcom_smem_alloc(remote_pid,
  185. SMEM_GLINK_NATIVE_XPRT_DESCRIPTOR, 32);
  186. if (ret && ret != -EEXIST) {
  187. dev_err(dev, "failed to allocate glink descriptors\n");
  188. goto err_put_dev;
  189. }
  190. descs = qcom_smem_get(remote_pid,
  191. SMEM_GLINK_NATIVE_XPRT_DESCRIPTOR, &size);
  192. if (IS_ERR(descs)) {
  193. dev_err(dev, "failed to acquire xprt descriptor\n");
  194. ret = PTR_ERR(descs);
  195. goto err_put_dev;
  196. }
  197. if (size != 32) {
  198. dev_err(dev, "glink descriptor of invalid size\n");
  199. ret = -EINVAL;
  200. goto err_put_dev;
  201. }
  202. tx_pipe->tail = &descs[0];
  203. tx_pipe->head = &descs[1];
  204. rx_pipe->tail = &descs[2];
  205. rx_pipe->head = &descs[3];
  206. ret = qcom_smem_alloc(remote_pid, SMEM_GLINK_NATIVE_XPRT_FIFO_0,
  207. SZ_16K);
  208. if (ret && ret != -EEXIST) {
  209. dev_err(dev, "failed to allocate TX fifo\n");
  210. goto err_put_dev;
  211. }
  212. tx_pipe->fifo = qcom_smem_get(remote_pid, SMEM_GLINK_NATIVE_XPRT_FIFO_0,
  213. &tx_pipe->native.length);
  214. if (IS_ERR(tx_pipe->fifo)) {
  215. dev_err(dev, "failed to acquire TX fifo\n");
  216. ret = PTR_ERR(tx_pipe->fifo);
  217. goto err_put_dev;
  218. }
  219. rx_pipe->native.avail = glink_smem_rx_avail;
  220. rx_pipe->native.peak = glink_smem_rx_peak;
  221. rx_pipe->native.advance = glink_smem_rx_advance;
  222. rx_pipe->remote_pid = remote_pid;
  223. tx_pipe->native.avail = glink_smem_tx_avail;
  224. tx_pipe->native.write = glink_smem_tx_write;
  225. tx_pipe->remote_pid = remote_pid;
  226. *rx_pipe->tail = 0;
  227. *tx_pipe->head = 0;
  228. glink = qcom_glink_native_probe(dev,
  229. GLINK_FEATURE_INTENT_REUSE,
  230. &rx_pipe->native, &tx_pipe->native,
  231. false);
  232. if (IS_ERR(glink)) {
  233. ret = PTR_ERR(glink);
  234. goto err_put_dev;
  235. }
  236. return glink;
  237. err_put_dev:
  238. device_unregister(dev);
  239. return ERR_PTR(ret);
  240. }
  241. EXPORT_SYMBOL_GPL(qcom_glink_smem_register);
  242. void qcom_glink_smem_unregister(struct qcom_glink *glink)
  243. {
  244. qcom_glink_native_remove(glink);
  245. qcom_glink_native_unregister(glink);
  246. }
  247. EXPORT_SYMBOL_GPL(qcom_glink_smem_unregister);
  248. MODULE_AUTHOR("Bjorn Andersson <bjorn.andersson@linaro.org>");
  249. MODULE_DESCRIPTION("Qualcomm GLINK SMEM driver");
  250. MODULE_LICENSE("GPL v2");