e1000_main.c 146 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*******************************************************************************
  3. Intel PRO/1000 Linux driver
  4. Copyright(c) 1999 - 2006 Intel Corporation.
  5. This program is free software; you can redistribute it and/or modify it
  6. under the terms and conditions of the GNU General Public License,
  7. version 2, as published by the Free Software Foundation.
  8. This program is distributed in the hope it will be useful, but WITHOUT
  9. ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  10. FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  11. more details.
  12. You should have received a copy of the GNU General Public License along with
  13. this program; if not, write to the Free Software Foundation, Inc.,
  14. 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  15. The full GNU General Public License is included in this distribution in
  16. the file called "COPYING".
  17. Contact Information:
  18. Linux NICS <linux.nics@intel.com>
  19. e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  20. Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  21. *******************************************************************************/
  22. #include "e1000.h"
  23. #include <net/ip6_checksum.h>
  24. #include <linux/io.h>
  25. #include <linux/prefetch.h>
  26. #include <linux/bitops.h>
  27. #include <linux/if_vlan.h>
  28. char e1000_driver_name[] = "e1000";
  29. static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver";
  30. #define DRV_VERSION "7.3.21-k8-NAPI"
  31. const char e1000_driver_version[] = DRV_VERSION;
  32. static const char e1000_copyright[] = "Copyright (c) 1999-2006 Intel Corporation.";
  33. /* e1000_pci_tbl - PCI Device ID Table
  34. *
  35. * Last entry must be all 0s
  36. *
  37. * Macro expands to...
  38. * {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)}
  39. */
  40. static const struct pci_device_id e1000_pci_tbl[] = {
  41. INTEL_E1000_ETHERNET_DEVICE(0x1000),
  42. INTEL_E1000_ETHERNET_DEVICE(0x1001),
  43. INTEL_E1000_ETHERNET_DEVICE(0x1004),
  44. INTEL_E1000_ETHERNET_DEVICE(0x1008),
  45. INTEL_E1000_ETHERNET_DEVICE(0x1009),
  46. INTEL_E1000_ETHERNET_DEVICE(0x100C),
  47. INTEL_E1000_ETHERNET_DEVICE(0x100D),
  48. INTEL_E1000_ETHERNET_DEVICE(0x100E),
  49. INTEL_E1000_ETHERNET_DEVICE(0x100F),
  50. INTEL_E1000_ETHERNET_DEVICE(0x1010),
  51. INTEL_E1000_ETHERNET_DEVICE(0x1011),
  52. INTEL_E1000_ETHERNET_DEVICE(0x1012),
  53. INTEL_E1000_ETHERNET_DEVICE(0x1013),
  54. INTEL_E1000_ETHERNET_DEVICE(0x1014),
  55. INTEL_E1000_ETHERNET_DEVICE(0x1015),
  56. INTEL_E1000_ETHERNET_DEVICE(0x1016),
  57. INTEL_E1000_ETHERNET_DEVICE(0x1017),
  58. INTEL_E1000_ETHERNET_DEVICE(0x1018),
  59. INTEL_E1000_ETHERNET_DEVICE(0x1019),
  60. INTEL_E1000_ETHERNET_DEVICE(0x101A),
  61. INTEL_E1000_ETHERNET_DEVICE(0x101D),
  62. INTEL_E1000_ETHERNET_DEVICE(0x101E),
  63. INTEL_E1000_ETHERNET_DEVICE(0x1026),
  64. INTEL_E1000_ETHERNET_DEVICE(0x1027),
  65. INTEL_E1000_ETHERNET_DEVICE(0x1028),
  66. INTEL_E1000_ETHERNET_DEVICE(0x1075),
  67. INTEL_E1000_ETHERNET_DEVICE(0x1076),
  68. INTEL_E1000_ETHERNET_DEVICE(0x1077),
  69. INTEL_E1000_ETHERNET_DEVICE(0x1078),
  70. INTEL_E1000_ETHERNET_DEVICE(0x1079),
  71. INTEL_E1000_ETHERNET_DEVICE(0x107A),
  72. INTEL_E1000_ETHERNET_DEVICE(0x107B),
  73. INTEL_E1000_ETHERNET_DEVICE(0x107C),
  74. INTEL_E1000_ETHERNET_DEVICE(0x108A),
  75. INTEL_E1000_ETHERNET_DEVICE(0x1099),
  76. INTEL_E1000_ETHERNET_DEVICE(0x10B5),
  77. INTEL_E1000_ETHERNET_DEVICE(0x2E6E),
  78. /* required last entry */
  79. {0,}
  80. };
  81. MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
  82. int e1000_up(struct e1000_adapter *adapter);
  83. void e1000_down(struct e1000_adapter *adapter);
  84. void e1000_reinit_locked(struct e1000_adapter *adapter);
  85. void e1000_reset(struct e1000_adapter *adapter);
  86. int e1000_setup_all_tx_resources(struct e1000_adapter *adapter);
  87. int e1000_setup_all_rx_resources(struct e1000_adapter *adapter);
  88. void e1000_free_all_tx_resources(struct e1000_adapter *adapter);
  89. void e1000_free_all_rx_resources(struct e1000_adapter *adapter);
  90. static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
  91. struct e1000_tx_ring *txdr);
  92. static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
  93. struct e1000_rx_ring *rxdr);
  94. static void e1000_free_tx_resources(struct e1000_adapter *adapter,
  95. struct e1000_tx_ring *tx_ring);
  96. static void e1000_free_rx_resources(struct e1000_adapter *adapter,
  97. struct e1000_rx_ring *rx_ring);
  98. void e1000_update_stats(struct e1000_adapter *adapter);
  99. static int e1000_init_module(void);
  100. static void e1000_exit_module(void);
  101. static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
  102. static void e1000_remove(struct pci_dev *pdev);
  103. static int e1000_alloc_queues(struct e1000_adapter *adapter);
  104. static int e1000_sw_init(struct e1000_adapter *adapter);
  105. int e1000_open(struct net_device *netdev);
  106. int e1000_close(struct net_device *netdev);
  107. static void e1000_configure_tx(struct e1000_adapter *adapter);
  108. static void e1000_configure_rx(struct e1000_adapter *adapter);
  109. static void e1000_setup_rctl(struct e1000_adapter *adapter);
  110. static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter);
  111. static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter);
  112. static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
  113. struct e1000_tx_ring *tx_ring);
  114. static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
  115. struct e1000_rx_ring *rx_ring);
  116. static void e1000_set_rx_mode(struct net_device *netdev);
  117. static void e1000_update_phy_info_task(struct work_struct *work);
  118. static void e1000_watchdog(struct work_struct *work);
  119. static void e1000_82547_tx_fifo_stall_task(struct work_struct *work);
  120. static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb,
  121. struct net_device *netdev);
  122. static int e1000_change_mtu(struct net_device *netdev, int new_mtu);
  123. static int e1000_set_mac(struct net_device *netdev, void *p);
  124. static irqreturn_t e1000_intr(int irq, void *data);
  125. static bool e1000_clean_tx_irq(struct e1000_adapter *adapter,
  126. struct e1000_tx_ring *tx_ring);
  127. static int e1000_clean(struct napi_struct *napi, int budget);
  128. static bool e1000_clean_rx_irq(struct e1000_adapter *adapter,
  129. struct e1000_rx_ring *rx_ring,
  130. int *work_done, int work_to_do);
  131. static bool e1000_clean_jumbo_rx_irq(struct e1000_adapter *adapter,
  132. struct e1000_rx_ring *rx_ring,
  133. int *work_done, int work_to_do);
  134. static void e1000_alloc_dummy_rx_buffers(struct e1000_adapter *adapter,
  135. struct e1000_rx_ring *rx_ring,
  136. int cleaned_count)
  137. {
  138. }
  139. static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
  140. struct e1000_rx_ring *rx_ring,
  141. int cleaned_count);
  142. static void e1000_alloc_jumbo_rx_buffers(struct e1000_adapter *adapter,
  143. struct e1000_rx_ring *rx_ring,
  144. int cleaned_count);
  145. static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
  146. static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
  147. int cmd);
  148. static void e1000_enter_82542_rst(struct e1000_adapter *adapter);
  149. static void e1000_leave_82542_rst(struct e1000_adapter *adapter);
  150. static void e1000_tx_timeout(struct net_device *dev);
  151. static void e1000_reset_task(struct work_struct *work);
  152. static void e1000_smartspeed(struct e1000_adapter *adapter);
  153. static int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
  154. struct sk_buff *skb);
  155. static bool e1000_vlan_used(struct e1000_adapter *adapter);
  156. static void e1000_vlan_mode(struct net_device *netdev,
  157. netdev_features_t features);
  158. static void e1000_vlan_filter_on_off(struct e1000_adapter *adapter,
  159. bool filter_on);
  160. static int e1000_vlan_rx_add_vid(struct net_device *netdev,
  161. __be16 proto, u16 vid);
  162. static int e1000_vlan_rx_kill_vid(struct net_device *netdev,
  163. __be16 proto, u16 vid);
  164. static void e1000_restore_vlan(struct e1000_adapter *adapter);
  165. #ifdef CONFIG_PM
  166. static int e1000_suspend(struct pci_dev *pdev, pm_message_t state);
  167. static int e1000_resume(struct pci_dev *pdev);
  168. #endif
  169. static void e1000_shutdown(struct pci_dev *pdev);
  170. #ifdef CONFIG_NET_POLL_CONTROLLER
  171. /* for netdump / net console */
  172. static void e1000_netpoll (struct net_device *netdev);
  173. #endif
  174. #define COPYBREAK_DEFAULT 256
  175. static unsigned int copybreak __read_mostly = COPYBREAK_DEFAULT;
  176. module_param(copybreak, uint, 0644);
  177. MODULE_PARM_DESC(copybreak,
  178. "Maximum size of packet that is copied to a new buffer on receive");
  179. static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
  180. pci_channel_state_t state);
  181. static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev);
  182. static void e1000_io_resume(struct pci_dev *pdev);
  183. static const struct pci_error_handlers e1000_err_handler = {
  184. .error_detected = e1000_io_error_detected,
  185. .slot_reset = e1000_io_slot_reset,
  186. .resume = e1000_io_resume,
  187. };
  188. static struct pci_driver e1000_driver = {
  189. .name = e1000_driver_name,
  190. .id_table = e1000_pci_tbl,
  191. .probe = e1000_probe,
  192. .remove = e1000_remove,
  193. #ifdef CONFIG_PM
  194. /* Power Management Hooks */
  195. .suspend = e1000_suspend,
  196. .resume = e1000_resume,
  197. #endif
  198. .shutdown = e1000_shutdown,
  199. .err_handler = &e1000_err_handler
  200. };
  201. MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
  202. MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
  203. MODULE_LICENSE("GPL");
  204. MODULE_VERSION(DRV_VERSION);
  205. #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
  206. static int debug = -1;
  207. module_param(debug, int, 0);
  208. MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
  209. /**
  210. * e1000_get_hw_dev - return device
  211. * used by hardware layer to print debugging information
  212. *
  213. **/
  214. struct net_device *e1000_get_hw_dev(struct e1000_hw *hw)
  215. {
  216. struct e1000_adapter *adapter = hw->back;
  217. return adapter->netdev;
  218. }
  219. /**
  220. * e1000_init_module - Driver Registration Routine
  221. *
  222. * e1000_init_module is the first routine called when the driver is
  223. * loaded. All it does is register with the PCI subsystem.
  224. **/
  225. static int __init e1000_init_module(void)
  226. {
  227. int ret;
  228. pr_info("%s - version %s\n", e1000_driver_string, e1000_driver_version);
  229. pr_info("%s\n", e1000_copyright);
  230. ret = pci_register_driver(&e1000_driver);
  231. if (copybreak != COPYBREAK_DEFAULT) {
  232. if (copybreak == 0)
  233. pr_info("copybreak disabled\n");
  234. else
  235. pr_info("copybreak enabled for "
  236. "packets <= %u bytes\n", copybreak);
  237. }
  238. return ret;
  239. }
  240. module_init(e1000_init_module);
  241. /**
  242. * e1000_exit_module - Driver Exit Cleanup Routine
  243. *
  244. * e1000_exit_module is called just before the driver is removed
  245. * from memory.
  246. **/
  247. static void __exit e1000_exit_module(void)
  248. {
  249. pci_unregister_driver(&e1000_driver);
  250. }
  251. module_exit(e1000_exit_module);
  252. static int e1000_request_irq(struct e1000_adapter *adapter)
  253. {
  254. struct net_device *netdev = adapter->netdev;
  255. irq_handler_t handler = e1000_intr;
  256. int irq_flags = IRQF_SHARED;
  257. int err;
  258. err = request_irq(adapter->pdev->irq, handler, irq_flags, netdev->name,
  259. netdev);
  260. if (err) {
  261. e_err(probe, "Unable to allocate interrupt Error: %d\n", err);
  262. }
  263. return err;
  264. }
  265. static void e1000_free_irq(struct e1000_adapter *adapter)
  266. {
  267. struct net_device *netdev = adapter->netdev;
  268. free_irq(adapter->pdev->irq, netdev);
  269. }
  270. /**
  271. * e1000_irq_disable - Mask off interrupt generation on the NIC
  272. * @adapter: board private structure
  273. **/
  274. static void e1000_irq_disable(struct e1000_adapter *adapter)
  275. {
  276. struct e1000_hw *hw = &adapter->hw;
  277. ew32(IMC, ~0);
  278. E1000_WRITE_FLUSH();
  279. synchronize_irq(adapter->pdev->irq);
  280. }
  281. /**
  282. * e1000_irq_enable - Enable default interrupt generation settings
  283. * @adapter: board private structure
  284. **/
  285. static void e1000_irq_enable(struct e1000_adapter *adapter)
  286. {
  287. struct e1000_hw *hw = &adapter->hw;
  288. ew32(IMS, IMS_ENABLE_MASK);
  289. E1000_WRITE_FLUSH();
  290. }
  291. static void e1000_update_mng_vlan(struct e1000_adapter *adapter)
  292. {
  293. struct e1000_hw *hw = &adapter->hw;
  294. struct net_device *netdev = adapter->netdev;
  295. u16 vid = hw->mng_cookie.vlan_id;
  296. u16 old_vid = adapter->mng_vlan_id;
  297. if (!e1000_vlan_used(adapter))
  298. return;
  299. if (!test_bit(vid, adapter->active_vlans)) {
  300. if (hw->mng_cookie.status &
  301. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) {
  302. e1000_vlan_rx_add_vid(netdev, htons(ETH_P_8021Q), vid);
  303. adapter->mng_vlan_id = vid;
  304. } else {
  305. adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
  306. }
  307. if ((old_vid != (u16)E1000_MNG_VLAN_NONE) &&
  308. (vid != old_vid) &&
  309. !test_bit(old_vid, adapter->active_vlans))
  310. e1000_vlan_rx_kill_vid(netdev, htons(ETH_P_8021Q),
  311. old_vid);
  312. } else {
  313. adapter->mng_vlan_id = vid;
  314. }
  315. }
  316. static void e1000_init_manageability(struct e1000_adapter *adapter)
  317. {
  318. struct e1000_hw *hw = &adapter->hw;
  319. if (adapter->en_mng_pt) {
  320. u32 manc = er32(MANC);
  321. /* disable hardware interception of ARP */
  322. manc &= ~(E1000_MANC_ARP_EN);
  323. ew32(MANC, manc);
  324. }
  325. }
  326. static void e1000_release_manageability(struct e1000_adapter *adapter)
  327. {
  328. struct e1000_hw *hw = &adapter->hw;
  329. if (adapter->en_mng_pt) {
  330. u32 manc = er32(MANC);
  331. /* re-enable hardware interception of ARP */
  332. manc |= E1000_MANC_ARP_EN;
  333. ew32(MANC, manc);
  334. }
  335. }
  336. /**
  337. * e1000_configure - configure the hardware for RX and TX
  338. * @adapter = private board structure
  339. **/
  340. static void e1000_configure(struct e1000_adapter *adapter)
  341. {
  342. struct net_device *netdev = adapter->netdev;
  343. int i;
  344. e1000_set_rx_mode(netdev);
  345. e1000_restore_vlan(adapter);
  346. e1000_init_manageability(adapter);
  347. e1000_configure_tx(adapter);
  348. e1000_setup_rctl(adapter);
  349. e1000_configure_rx(adapter);
  350. /* call E1000_DESC_UNUSED which always leaves
  351. * at least 1 descriptor unused to make sure
  352. * next_to_use != next_to_clean
  353. */
  354. for (i = 0; i < adapter->num_rx_queues; i++) {
  355. struct e1000_rx_ring *ring = &adapter->rx_ring[i];
  356. adapter->alloc_rx_buf(adapter, ring,
  357. E1000_DESC_UNUSED(ring));
  358. }
  359. }
  360. int e1000_up(struct e1000_adapter *adapter)
  361. {
  362. struct e1000_hw *hw = &adapter->hw;
  363. /* hardware has been reset, we need to reload some things */
  364. e1000_configure(adapter);
  365. clear_bit(__E1000_DOWN, &adapter->flags);
  366. napi_enable(&adapter->napi);
  367. e1000_irq_enable(adapter);
  368. netif_wake_queue(adapter->netdev);
  369. /* fire a link change interrupt to start the watchdog */
  370. ew32(ICS, E1000_ICS_LSC);
  371. return 0;
  372. }
  373. /**
  374. * e1000_power_up_phy - restore link in case the phy was powered down
  375. * @adapter: address of board private structure
  376. *
  377. * The phy may be powered down to save power and turn off link when the
  378. * driver is unloaded and wake on lan is not enabled (among others)
  379. * *** this routine MUST be followed by a call to e1000_reset ***
  380. **/
  381. void e1000_power_up_phy(struct e1000_adapter *adapter)
  382. {
  383. struct e1000_hw *hw = &adapter->hw;
  384. u16 mii_reg = 0;
  385. /* Just clear the power down bit to wake the phy back up */
  386. if (hw->media_type == e1000_media_type_copper) {
  387. /* according to the manual, the phy will retain its
  388. * settings across a power-down/up cycle
  389. */
  390. e1000_read_phy_reg(hw, PHY_CTRL, &mii_reg);
  391. mii_reg &= ~MII_CR_POWER_DOWN;
  392. e1000_write_phy_reg(hw, PHY_CTRL, mii_reg);
  393. }
  394. }
  395. static void e1000_power_down_phy(struct e1000_adapter *adapter)
  396. {
  397. struct e1000_hw *hw = &adapter->hw;
  398. /* Power down the PHY so no link is implied when interface is down *
  399. * The PHY cannot be powered down if any of the following is true *
  400. * (a) WoL is enabled
  401. * (b) AMT is active
  402. * (c) SoL/IDER session is active
  403. */
  404. if (!adapter->wol && hw->mac_type >= e1000_82540 &&
  405. hw->media_type == e1000_media_type_copper) {
  406. u16 mii_reg = 0;
  407. switch (hw->mac_type) {
  408. case e1000_82540:
  409. case e1000_82545:
  410. case e1000_82545_rev_3:
  411. case e1000_82546:
  412. case e1000_ce4100:
  413. case e1000_82546_rev_3:
  414. case e1000_82541:
  415. case e1000_82541_rev_2:
  416. case e1000_82547:
  417. case e1000_82547_rev_2:
  418. if (er32(MANC) & E1000_MANC_SMBUS_EN)
  419. goto out;
  420. break;
  421. default:
  422. goto out;
  423. }
  424. e1000_read_phy_reg(hw, PHY_CTRL, &mii_reg);
  425. mii_reg |= MII_CR_POWER_DOWN;
  426. e1000_write_phy_reg(hw, PHY_CTRL, mii_reg);
  427. msleep(1);
  428. }
  429. out:
  430. return;
  431. }
  432. static void e1000_down_and_stop(struct e1000_adapter *adapter)
  433. {
  434. set_bit(__E1000_DOWN, &adapter->flags);
  435. cancel_delayed_work_sync(&adapter->watchdog_task);
  436. /*
  437. * Since the watchdog task can reschedule other tasks, we should cancel
  438. * it first, otherwise we can run into the situation when a work is
  439. * still running after the adapter has been turned down.
  440. */
  441. cancel_delayed_work_sync(&adapter->phy_info_task);
  442. cancel_delayed_work_sync(&adapter->fifo_stall_task);
  443. /* Only kill reset task if adapter is not resetting */
  444. if (!test_bit(__E1000_RESETTING, &adapter->flags))
  445. cancel_work_sync(&adapter->reset_task);
  446. }
  447. void e1000_down(struct e1000_adapter *adapter)
  448. {
  449. struct e1000_hw *hw = &adapter->hw;
  450. struct net_device *netdev = adapter->netdev;
  451. u32 rctl, tctl;
  452. /* disable receives in the hardware */
  453. rctl = er32(RCTL);
  454. ew32(RCTL, rctl & ~E1000_RCTL_EN);
  455. /* flush and sleep below */
  456. netif_tx_disable(netdev);
  457. /* disable transmits in the hardware */
  458. tctl = er32(TCTL);
  459. tctl &= ~E1000_TCTL_EN;
  460. ew32(TCTL, tctl);
  461. /* flush both disables and wait for them to finish */
  462. E1000_WRITE_FLUSH();
  463. msleep(10);
  464. /* Set the carrier off after transmits have been disabled in the
  465. * hardware, to avoid race conditions with e1000_watchdog() (which
  466. * may be running concurrently to us, checking for the carrier
  467. * bit to decide whether it should enable transmits again). Such
  468. * a race condition would result into transmission being disabled
  469. * in the hardware until the next IFF_DOWN+IFF_UP cycle.
  470. */
  471. netif_carrier_off(netdev);
  472. napi_disable(&adapter->napi);
  473. e1000_irq_disable(adapter);
  474. /* Setting DOWN must be after irq_disable to prevent
  475. * a screaming interrupt. Setting DOWN also prevents
  476. * tasks from rescheduling.
  477. */
  478. e1000_down_and_stop(adapter);
  479. adapter->link_speed = 0;
  480. adapter->link_duplex = 0;
  481. e1000_reset(adapter);
  482. e1000_clean_all_tx_rings(adapter);
  483. e1000_clean_all_rx_rings(adapter);
  484. }
  485. void e1000_reinit_locked(struct e1000_adapter *adapter)
  486. {
  487. WARN_ON(in_interrupt());
  488. while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
  489. msleep(1);
  490. e1000_down(adapter);
  491. e1000_up(adapter);
  492. clear_bit(__E1000_RESETTING, &adapter->flags);
  493. }
  494. void e1000_reset(struct e1000_adapter *adapter)
  495. {
  496. struct e1000_hw *hw = &adapter->hw;
  497. u32 pba = 0, tx_space, min_tx_space, min_rx_space;
  498. bool legacy_pba_adjust = false;
  499. u16 hwm;
  500. /* Repartition Pba for greater than 9k mtu
  501. * To take effect CTRL.RST is required.
  502. */
  503. switch (hw->mac_type) {
  504. case e1000_82542_rev2_0:
  505. case e1000_82542_rev2_1:
  506. case e1000_82543:
  507. case e1000_82544:
  508. case e1000_82540:
  509. case e1000_82541:
  510. case e1000_82541_rev_2:
  511. legacy_pba_adjust = true;
  512. pba = E1000_PBA_48K;
  513. break;
  514. case e1000_82545:
  515. case e1000_82545_rev_3:
  516. case e1000_82546:
  517. case e1000_ce4100:
  518. case e1000_82546_rev_3:
  519. pba = E1000_PBA_48K;
  520. break;
  521. case e1000_82547:
  522. case e1000_82547_rev_2:
  523. legacy_pba_adjust = true;
  524. pba = E1000_PBA_30K;
  525. break;
  526. case e1000_undefined:
  527. case e1000_num_macs:
  528. break;
  529. }
  530. if (legacy_pba_adjust) {
  531. if (hw->max_frame_size > E1000_RXBUFFER_8192)
  532. pba -= 8; /* allocate more FIFO for Tx */
  533. if (hw->mac_type == e1000_82547) {
  534. adapter->tx_fifo_head = 0;
  535. adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT;
  536. adapter->tx_fifo_size =
  537. (E1000_PBA_40K - pba) << E1000_PBA_BYTES_SHIFT;
  538. atomic_set(&adapter->tx_fifo_stall, 0);
  539. }
  540. } else if (hw->max_frame_size > ETH_FRAME_LEN + ETH_FCS_LEN) {
  541. /* adjust PBA for jumbo frames */
  542. ew32(PBA, pba);
  543. /* To maintain wire speed transmits, the Tx FIFO should be
  544. * large enough to accommodate two full transmit packets,
  545. * rounded up to the next 1KB and expressed in KB. Likewise,
  546. * the Rx FIFO should be large enough to accommodate at least
  547. * one full receive packet and is similarly rounded up and
  548. * expressed in KB.
  549. */
  550. pba = er32(PBA);
  551. /* upper 16 bits has Tx packet buffer allocation size in KB */
  552. tx_space = pba >> 16;
  553. /* lower 16 bits has Rx packet buffer allocation size in KB */
  554. pba &= 0xffff;
  555. /* the Tx fifo also stores 16 bytes of information about the Tx
  556. * but don't include ethernet FCS because hardware appends it
  557. */
  558. min_tx_space = (hw->max_frame_size +
  559. sizeof(struct e1000_tx_desc) -
  560. ETH_FCS_LEN) * 2;
  561. min_tx_space = ALIGN(min_tx_space, 1024);
  562. min_tx_space >>= 10;
  563. /* software strips receive CRC, so leave room for it */
  564. min_rx_space = hw->max_frame_size;
  565. min_rx_space = ALIGN(min_rx_space, 1024);
  566. min_rx_space >>= 10;
  567. /* If current Tx allocation is less than the min Tx FIFO size,
  568. * and the min Tx FIFO size is less than the current Rx FIFO
  569. * allocation, take space away from current Rx allocation
  570. */
  571. if (tx_space < min_tx_space &&
  572. ((min_tx_space - tx_space) < pba)) {
  573. pba = pba - (min_tx_space - tx_space);
  574. /* PCI/PCIx hardware has PBA alignment constraints */
  575. switch (hw->mac_type) {
  576. case e1000_82545 ... e1000_82546_rev_3:
  577. pba &= ~(E1000_PBA_8K - 1);
  578. break;
  579. default:
  580. break;
  581. }
  582. /* if short on Rx space, Rx wins and must trump Tx
  583. * adjustment or use Early Receive if available
  584. */
  585. if (pba < min_rx_space)
  586. pba = min_rx_space;
  587. }
  588. }
  589. ew32(PBA, pba);
  590. /* flow control settings:
  591. * The high water mark must be low enough to fit one full frame
  592. * (or the size used for early receive) above it in the Rx FIFO.
  593. * Set it to the lower of:
  594. * - 90% of the Rx FIFO size, and
  595. * - the full Rx FIFO size minus the early receive size (for parts
  596. * with ERT support assuming ERT set to E1000_ERT_2048), or
  597. * - the full Rx FIFO size minus one full frame
  598. */
  599. hwm = min(((pba << 10) * 9 / 10),
  600. ((pba << 10) - hw->max_frame_size));
  601. hw->fc_high_water = hwm & 0xFFF8; /* 8-byte granularity */
  602. hw->fc_low_water = hw->fc_high_water - 8;
  603. hw->fc_pause_time = E1000_FC_PAUSE_TIME;
  604. hw->fc_send_xon = 1;
  605. hw->fc = hw->original_fc;
  606. /* Allow time for pending master requests to run */
  607. e1000_reset_hw(hw);
  608. if (hw->mac_type >= e1000_82544)
  609. ew32(WUC, 0);
  610. if (e1000_init_hw(hw))
  611. e_dev_err("Hardware Error\n");
  612. e1000_update_mng_vlan(adapter);
  613. /* if (adapter->hwflags & HWFLAGS_PHY_PWR_BIT) { */
  614. if (hw->mac_type >= e1000_82544 &&
  615. hw->autoneg == 1 &&
  616. hw->autoneg_advertised == ADVERTISE_1000_FULL) {
  617. u32 ctrl = er32(CTRL);
  618. /* clear phy power management bit if we are in gig only mode,
  619. * which if enabled will attempt negotiation to 100Mb, which
  620. * can cause a loss of link at power off or driver unload
  621. */
  622. ctrl &= ~E1000_CTRL_SWDPIN3;
  623. ew32(CTRL, ctrl);
  624. }
  625. /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
  626. ew32(VET, ETHERNET_IEEE_VLAN_TYPE);
  627. e1000_reset_adaptive(hw);
  628. e1000_phy_get_info(hw, &adapter->phy_info);
  629. e1000_release_manageability(adapter);
  630. }
  631. /* Dump the eeprom for users having checksum issues */
  632. static void e1000_dump_eeprom(struct e1000_adapter *adapter)
  633. {
  634. struct net_device *netdev = adapter->netdev;
  635. struct ethtool_eeprom eeprom;
  636. const struct ethtool_ops *ops = netdev->ethtool_ops;
  637. u8 *data;
  638. int i;
  639. u16 csum_old, csum_new = 0;
  640. eeprom.len = ops->get_eeprom_len(netdev);
  641. eeprom.offset = 0;
  642. data = kmalloc(eeprom.len, GFP_KERNEL);
  643. if (!data)
  644. return;
  645. ops->get_eeprom(netdev, &eeprom, data);
  646. csum_old = (data[EEPROM_CHECKSUM_REG * 2]) +
  647. (data[EEPROM_CHECKSUM_REG * 2 + 1] << 8);
  648. for (i = 0; i < EEPROM_CHECKSUM_REG * 2; i += 2)
  649. csum_new += data[i] + (data[i + 1] << 8);
  650. csum_new = EEPROM_SUM - csum_new;
  651. pr_err("/*********************/\n");
  652. pr_err("Current EEPROM Checksum : 0x%04x\n", csum_old);
  653. pr_err("Calculated : 0x%04x\n", csum_new);
  654. pr_err("Offset Values\n");
  655. pr_err("======== ======\n");
  656. print_hex_dump(KERN_ERR, "", DUMP_PREFIX_OFFSET, 16, 1, data, 128, 0);
  657. pr_err("Include this output when contacting your support provider.\n");
  658. pr_err("This is not a software error! Something bad happened to\n");
  659. pr_err("your hardware or EEPROM image. Ignoring this problem could\n");
  660. pr_err("result in further problems, possibly loss of data,\n");
  661. pr_err("corruption or system hangs!\n");
  662. pr_err("The MAC Address will be reset to 00:00:00:00:00:00,\n");
  663. pr_err("which is invalid and requires you to set the proper MAC\n");
  664. pr_err("address manually before continuing to enable this network\n");
  665. pr_err("device. Please inspect the EEPROM dump and report the\n");
  666. pr_err("issue to your hardware vendor or Intel Customer Support.\n");
  667. pr_err("/*********************/\n");
  668. kfree(data);
  669. }
  670. /**
  671. * e1000_is_need_ioport - determine if an adapter needs ioport resources or not
  672. * @pdev: PCI device information struct
  673. *
  674. * Return true if an adapter needs ioport resources
  675. **/
  676. static int e1000_is_need_ioport(struct pci_dev *pdev)
  677. {
  678. switch (pdev->device) {
  679. case E1000_DEV_ID_82540EM:
  680. case E1000_DEV_ID_82540EM_LOM:
  681. case E1000_DEV_ID_82540EP:
  682. case E1000_DEV_ID_82540EP_LOM:
  683. case E1000_DEV_ID_82540EP_LP:
  684. case E1000_DEV_ID_82541EI:
  685. case E1000_DEV_ID_82541EI_MOBILE:
  686. case E1000_DEV_ID_82541ER:
  687. case E1000_DEV_ID_82541ER_LOM:
  688. case E1000_DEV_ID_82541GI:
  689. case E1000_DEV_ID_82541GI_LF:
  690. case E1000_DEV_ID_82541GI_MOBILE:
  691. case E1000_DEV_ID_82544EI_COPPER:
  692. case E1000_DEV_ID_82544EI_FIBER:
  693. case E1000_DEV_ID_82544GC_COPPER:
  694. case E1000_DEV_ID_82544GC_LOM:
  695. case E1000_DEV_ID_82545EM_COPPER:
  696. case E1000_DEV_ID_82545EM_FIBER:
  697. case E1000_DEV_ID_82546EB_COPPER:
  698. case E1000_DEV_ID_82546EB_FIBER:
  699. case E1000_DEV_ID_82546EB_QUAD_COPPER:
  700. return true;
  701. default:
  702. return false;
  703. }
  704. }
  705. static netdev_features_t e1000_fix_features(struct net_device *netdev,
  706. netdev_features_t features)
  707. {
  708. /* Since there is no support for separate Rx/Tx vlan accel
  709. * enable/disable make sure Tx flag is always in same state as Rx.
  710. */
  711. if (features & NETIF_F_HW_VLAN_CTAG_RX)
  712. features |= NETIF_F_HW_VLAN_CTAG_TX;
  713. else
  714. features &= ~NETIF_F_HW_VLAN_CTAG_TX;
  715. return features;
  716. }
  717. static int e1000_set_features(struct net_device *netdev,
  718. netdev_features_t features)
  719. {
  720. struct e1000_adapter *adapter = netdev_priv(netdev);
  721. netdev_features_t changed = features ^ netdev->features;
  722. if (changed & NETIF_F_HW_VLAN_CTAG_RX)
  723. e1000_vlan_mode(netdev, features);
  724. if (!(changed & (NETIF_F_RXCSUM | NETIF_F_RXALL)))
  725. return 0;
  726. netdev->features = features;
  727. adapter->rx_csum = !!(features & NETIF_F_RXCSUM);
  728. if (netif_running(netdev))
  729. e1000_reinit_locked(adapter);
  730. else
  731. e1000_reset(adapter);
  732. return 0;
  733. }
  734. static const struct net_device_ops e1000_netdev_ops = {
  735. .ndo_open = e1000_open,
  736. .ndo_stop = e1000_close,
  737. .ndo_start_xmit = e1000_xmit_frame,
  738. .ndo_set_rx_mode = e1000_set_rx_mode,
  739. .ndo_set_mac_address = e1000_set_mac,
  740. .ndo_tx_timeout = e1000_tx_timeout,
  741. .ndo_change_mtu = e1000_change_mtu,
  742. .ndo_do_ioctl = e1000_ioctl,
  743. .ndo_validate_addr = eth_validate_addr,
  744. .ndo_vlan_rx_add_vid = e1000_vlan_rx_add_vid,
  745. .ndo_vlan_rx_kill_vid = e1000_vlan_rx_kill_vid,
  746. #ifdef CONFIG_NET_POLL_CONTROLLER
  747. .ndo_poll_controller = e1000_netpoll,
  748. #endif
  749. .ndo_fix_features = e1000_fix_features,
  750. .ndo_set_features = e1000_set_features,
  751. };
  752. /**
  753. * e1000_init_hw_struct - initialize members of hw struct
  754. * @adapter: board private struct
  755. * @hw: structure used by e1000_hw.c
  756. *
  757. * Factors out initialization of the e1000_hw struct to its own function
  758. * that can be called very early at init (just after struct allocation).
  759. * Fields are initialized based on PCI device information and
  760. * OS network device settings (MTU size).
  761. * Returns negative error codes if MAC type setup fails.
  762. */
  763. static int e1000_init_hw_struct(struct e1000_adapter *adapter,
  764. struct e1000_hw *hw)
  765. {
  766. struct pci_dev *pdev = adapter->pdev;
  767. /* PCI config space info */
  768. hw->vendor_id = pdev->vendor;
  769. hw->device_id = pdev->device;
  770. hw->subsystem_vendor_id = pdev->subsystem_vendor;
  771. hw->subsystem_id = pdev->subsystem_device;
  772. hw->revision_id = pdev->revision;
  773. pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
  774. hw->max_frame_size = adapter->netdev->mtu +
  775. ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
  776. hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE;
  777. /* identify the MAC */
  778. if (e1000_set_mac_type(hw)) {
  779. e_err(probe, "Unknown MAC Type\n");
  780. return -EIO;
  781. }
  782. switch (hw->mac_type) {
  783. default:
  784. break;
  785. case e1000_82541:
  786. case e1000_82547:
  787. case e1000_82541_rev_2:
  788. case e1000_82547_rev_2:
  789. hw->phy_init_script = 1;
  790. break;
  791. }
  792. e1000_set_media_type(hw);
  793. e1000_get_bus_info(hw);
  794. hw->wait_autoneg_complete = false;
  795. hw->tbi_compatibility_en = true;
  796. hw->adaptive_ifs = true;
  797. /* Copper options */
  798. if (hw->media_type == e1000_media_type_copper) {
  799. hw->mdix = AUTO_ALL_MODES;
  800. hw->disable_polarity_correction = false;
  801. hw->master_slave = E1000_MASTER_SLAVE;
  802. }
  803. return 0;
  804. }
  805. /**
  806. * e1000_probe - Device Initialization Routine
  807. * @pdev: PCI device information struct
  808. * @ent: entry in e1000_pci_tbl
  809. *
  810. * Returns 0 on success, negative on failure
  811. *
  812. * e1000_probe initializes an adapter identified by a pci_dev structure.
  813. * The OS initialization, configuring of the adapter private structure,
  814. * and a hardware reset occur.
  815. **/
  816. static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  817. {
  818. struct net_device *netdev;
  819. struct e1000_adapter *adapter = NULL;
  820. struct e1000_hw *hw;
  821. static int cards_found;
  822. static int global_quad_port_a; /* global ksp3 port a indication */
  823. int i, err, pci_using_dac;
  824. u16 eeprom_data = 0;
  825. u16 tmp = 0;
  826. u16 eeprom_apme_mask = E1000_EEPROM_APME;
  827. int bars, need_ioport;
  828. bool disable_dev = false;
  829. /* do not allocate ioport bars when not needed */
  830. need_ioport = e1000_is_need_ioport(pdev);
  831. if (need_ioport) {
  832. bars = pci_select_bars(pdev, IORESOURCE_MEM | IORESOURCE_IO);
  833. err = pci_enable_device(pdev);
  834. } else {
  835. bars = pci_select_bars(pdev, IORESOURCE_MEM);
  836. err = pci_enable_device_mem(pdev);
  837. }
  838. if (err)
  839. return err;
  840. err = pci_request_selected_regions(pdev, bars, e1000_driver_name);
  841. if (err)
  842. goto err_pci_reg;
  843. pci_set_master(pdev);
  844. err = pci_save_state(pdev);
  845. if (err)
  846. goto err_alloc_etherdev;
  847. err = -ENOMEM;
  848. netdev = alloc_etherdev(sizeof(struct e1000_adapter));
  849. if (!netdev)
  850. goto err_alloc_etherdev;
  851. SET_NETDEV_DEV(netdev, &pdev->dev);
  852. pci_set_drvdata(pdev, netdev);
  853. adapter = netdev_priv(netdev);
  854. adapter->netdev = netdev;
  855. adapter->pdev = pdev;
  856. adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
  857. adapter->bars = bars;
  858. adapter->need_ioport = need_ioport;
  859. hw = &adapter->hw;
  860. hw->back = adapter;
  861. err = -EIO;
  862. hw->hw_addr = pci_ioremap_bar(pdev, BAR_0);
  863. if (!hw->hw_addr)
  864. goto err_ioremap;
  865. if (adapter->need_ioport) {
  866. for (i = BAR_1; i <= BAR_5; i++) {
  867. if (pci_resource_len(pdev, i) == 0)
  868. continue;
  869. if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
  870. hw->io_base = pci_resource_start(pdev, i);
  871. break;
  872. }
  873. }
  874. }
  875. /* make ready for any if (hw->...) below */
  876. err = e1000_init_hw_struct(adapter, hw);
  877. if (err)
  878. goto err_sw_init;
  879. /* there is a workaround being applied below that limits
  880. * 64-bit DMA addresses to 64-bit hardware. There are some
  881. * 32-bit adapters that Tx hang when given 64-bit DMA addresses
  882. */
  883. pci_using_dac = 0;
  884. if ((hw->bus_type == e1000_bus_type_pcix) &&
  885. !dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64))) {
  886. pci_using_dac = 1;
  887. } else {
  888. err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
  889. if (err) {
  890. pr_err("No usable DMA config, aborting\n");
  891. goto err_dma;
  892. }
  893. }
  894. netdev->netdev_ops = &e1000_netdev_ops;
  895. e1000_set_ethtool_ops(netdev);
  896. netdev->watchdog_timeo = 5 * HZ;
  897. netif_napi_add(netdev, &adapter->napi, e1000_clean, 64);
  898. strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
  899. adapter->bd_number = cards_found;
  900. /* setup the private structure */
  901. err = e1000_sw_init(adapter);
  902. if (err)
  903. goto err_sw_init;
  904. err = -EIO;
  905. if (hw->mac_type == e1000_ce4100) {
  906. hw->ce4100_gbe_mdio_base_virt =
  907. ioremap(pci_resource_start(pdev, BAR_1),
  908. pci_resource_len(pdev, BAR_1));
  909. if (!hw->ce4100_gbe_mdio_base_virt)
  910. goto err_mdio_ioremap;
  911. }
  912. if (hw->mac_type >= e1000_82543) {
  913. netdev->hw_features = NETIF_F_SG |
  914. NETIF_F_HW_CSUM |
  915. NETIF_F_HW_VLAN_CTAG_RX;
  916. netdev->features = NETIF_F_HW_VLAN_CTAG_TX |
  917. NETIF_F_HW_VLAN_CTAG_FILTER;
  918. }
  919. if ((hw->mac_type >= e1000_82544) &&
  920. (hw->mac_type != e1000_82547))
  921. netdev->hw_features |= NETIF_F_TSO;
  922. netdev->priv_flags |= IFF_SUPP_NOFCS;
  923. netdev->features |= netdev->hw_features;
  924. netdev->hw_features |= (NETIF_F_RXCSUM |
  925. NETIF_F_RXALL |
  926. NETIF_F_RXFCS);
  927. if (pci_using_dac) {
  928. netdev->features |= NETIF_F_HIGHDMA;
  929. netdev->vlan_features |= NETIF_F_HIGHDMA;
  930. }
  931. netdev->vlan_features |= (NETIF_F_TSO |
  932. NETIF_F_HW_CSUM |
  933. NETIF_F_SG);
  934. /* Do not set IFF_UNICAST_FLT for VMWare's 82545EM */
  935. if (hw->device_id != E1000_DEV_ID_82545EM_COPPER ||
  936. hw->subsystem_vendor_id != PCI_VENDOR_ID_VMWARE)
  937. netdev->priv_flags |= IFF_UNICAST_FLT;
  938. /* MTU range: 46 - 16110 */
  939. netdev->min_mtu = ETH_ZLEN - ETH_HLEN;
  940. netdev->max_mtu = MAX_JUMBO_FRAME_SIZE - (ETH_HLEN + ETH_FCS_LEN);
  941. adapter->en_mng_pt = e1000_enable_mng_pass_thru(hw);
  942. /* initialize eeprom parameters */
  943. if (e1000_init_eeprom_params(hw)) {
  944. e_err(probe, "EEPROM initialization failed\n");
  945. goto err_eeprom;
  946. }
  947. /* before reading the EEPROM, reset the controller to
  948. * put the device in a known good starting state
  949. */
  950. e1000_reset_hw(hw);
  951. /* make sure the EEPROM is good */
  952. if (e1000_validate_eeprom_checksum(hw) < 0) {
  953. e_err(probe, "The EEPROM Checksum Is Not Valid\n");
  954. e1000_dump_eeprom(adapter);
  955. /* set MAC address to all zeroes to invalidate and temporary
  956. * disable this device for the user. This blocks regular
  957. * traffic while still permitting ethtool ioctls from reaching
  958. * the hardware as well as allowing the user to run the
  959. * interface after manually setting a hw addr using
  960. * `ip set address`
  961. */
  962. memset(hw->mac_addr, 0, netdev->addr_len);
  963. } else {
  964. /* copy the MAC address out of the EEPROM */
  965. if (e1000_read_mac_addr(hw))
  966. e_err(probe, "EEPROM Read Error\n");
  967. }
  968. /* don't block initialization here due to bad MAC address */
  969. memcpy(netdev->dev_addr, hw->mac_addr, netdev->addr_len);
  970. if (!is_valid_ether_addr(netdev->dev_addr))
  971. e_err(probe, "Invalid MAC Address\n");
  972. INIT_DELAYED_WORK(&adapter->watchdog_task, e1000_watchdog);
  973. INIT_DELAYED_WORK(&adapter->fifo_stall_task,
  974. e1000_82547_tx_fifo_stall_task);
  975. INIT_DELAYED_WORK(&adapter->phy_info_task, e1000_update_phy_info_task);
  976. INIT_WORK(&adapter->reset_task, e1000_reset_task);
  977. e1000_check_options(adapter);
  978. /* Initial Wake on LAN setting
  979. * If APM wake is enabled in the EEPROM,
  980. * enable the ACPI Magic Packet filter
  981. */
  982. switch (hw->mac_type) {
  983. case e1000_82542_rev2_0:
  984. case e1000_82542_rev2_1:
  985. case e1000_82543:
  986. break;
  987. case e1000_82544:
  988. e1000_read_eeprom(hw,
  989. EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data);
  990. eeprom_apme_mask = E1000_EEPROM_82544_APM;
  991. break;
  992. case e1000_82546:
  993. case e1000_82546_rev_3:
  994. if (er32(STATUS) & E1000_STATUS_FUNC_1) {
  995. e1000_read_eeprom(hw,
  996. EEPROM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
  997. break;
  998. }
  999. /* Fall Through */
  1000. default:
  1001. e1000_read_eeprom(hw,
  1002. EEPROM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
  1003. break;
  1004. }
  1005. if (eeprom_data & eeprom_apme_mask)
  1006. adapter->eeprom_wol |= E1000_WUFC_MAG;
  1007. /* now that we have the eeprom settings, apply the special cases
  1008. * where the eeprom may be wrong or the board simply won't support
  1009. * wake on lan on a particular port
  1010. */
  1011. switch (pdev->device) {
  1012. case E1000_DEV_ID_82546GB_PCIE:
  1013. adapter->eeprom_wol = 0;
  1014. break;
  1015. case E1000_DEV_ID_82546EB_FIBER:
  1016. case E1000_DEV_ID_82546GB_FIBER:
  1017. /* Wake events only supported on port A for dual fiber
  1018. * regardless of eeprom setting
  1019. */
  1020. if (er32(STATUS) & E1000_STATUS_FUNC_1)
  1021. adapter->eeprom_wol = 0;
  1022. break;
  1023. case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
  1024. /* if quad port adapter, disable WoL on all but port A */
  1025. if (global_quad_port_a != 0)
  1026. adapter->eeprom_wol = 0;
  1027. else
  1028. adapter->quad_port_a = true;
  1029. /* Reset for multiple quad port adapters */
  1030. if (++global_quad_port_a == 4)
  1031. global_quad_port_a = 0;
  1032. break;
  1033. }
  1034. /* initialize the wol settings based on the eeprom settings */
  1035. adapter->wol = adapter->eeprom_wol;
  1036. device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
  1037. /* Auto detect PHY address */
  1038. if (hw->mac_type == e1000_ce4100) {
  1039. for (i = 0; i < 32; i++) {
  1040. hw->phy_addr = i;
  1041. e1000_read_phy_reg(hw, PHY_ID2, &tmp);
  1042. if (tmp != 0 && tmp != 0xFF)
  1043. break;
  1044. }
  1045. if (i >= 32)
  1046. goto err_eeprom;
  1047. }
  1048. /* reset the hardware with the new settings */
  1049. e1000_reset(adapter);
  1050. strcpy(netdev->name, "eth%d");
  1051. err = register_netdev(netdev);
  1052. if (err)
  1053. goto err_register;
  1054. e1000_vlan_filter_on_off(adapter, false);
  1055. /* print bus type/speed/width info */
  1056. e_info(probe, "(PCI%s:%dMHz:%d-bit) %pM\n",
  1057. ((hw->bus_type == e1000_bus_type_pcix) ? "-X" : ""),
  1058. ((hw->bus_speed == e1000_bus_speed_133) ? 133 :
  1059. (hw->bus_speed == e1000_bus_speed_120) ? 120 :
  1060. (hw->bus_speed == e1000_bus_speed_100) ? 100 :
  1061. (hw->bus_speed == e1000_bus_speed_66) ? 66 : 33),
  1062. ((hw->bus_width == e1000_bus_width_64) ? 64 : 32),
  1063. netdev->dev_addr);
  1064. /* carrier off reporting is important to ethtool even BEFORE open */
  1065. netif_carrier_off(netdev);
  1066. e_info(probe, "Intel(R) PRO/1000 Network Connection\n");
  1067. cards_found++;
  1068. return 0;
  1069. err_register:
  1070. err_eeprom:
  1071. e1000_phy_hw_reset(hw);
  1072. if (hw->flash_address)
  1073. iounmap(hw->flash_address);
  1074. kfree(adapter->tx_ring);
  1075. kfree(adapter->rx_ring);
  1076. err_dma:
  1077. err_sw_init:
  1078. err_mdio_ioremap:
  1079. iounmap(hw->ce4100_gbe_mdio_base_virt);
  1080. iounmap(hw->hw_addr);
  1081. err_ioremap:
  1082. disable_dev = !test_and_set_bit(__E1000_DISABLED, &adapter->flags);
  1083. free_netdev(netdev);
  1084. err_alloc_etherdev:
  1085. pci_release_selected_regions(pdev, bars);
  1086. err_pci_reg:
  1087. if (!adapter || disable_dev)
  1088. pci_disable_device(pdev);
  1089. return err;
  1090. }
  1091. /**
  1092. * e1000_remove - Device Removal Routine
  1093. * @pdev: PCI device information struct
  1094. *
  1095. * e1000_remove is called by the PCI subsystem to alert the driver
  1096. * that it should release a PCI device. That could be caused by a
  1097. * Hot-Plug event, or because the driver is going to be removed from
  1098. * memory.
  1099. **/
  1100. static void e1000_remove(struct pci_dev *pdev)
  1101. {
  1102. struct net_device *netdev = pci_get_drvdata(pdev);
  1103. struct e1000_adapter *adapter = netdev_priv(netdev);
  1104. struct e1000_hw *hw = &adapter->hw;
  1105. bool disable_dev;
  1106. e1000_down_and_stop(adapter);
  1107. e1000_release_manageability(adapter);
  1108. unregister_netdev(netdev);
  1109. e1000_phy_hw_reset(hw);
  1110. kfree(adapter->tx_ring);
  1111. kfree(adapter->rx_ring);
  1112. if (hw->mac_type == e1000_ce4100)
  1113. iounmap(hw->ce4100_gbe_mdio_base_virt);
  1114. iounmap(hw->hw_addr);
  1115. if (hw->flash_address)
  1116. iounmap(hw->flash_address);
  1117. pci_release_selected_regions(pdev, adapter->bars);
  1118. disable_dev = !test_and_set_bit(__E1000_DISABLED, &adapter->flags);
  1119. free_netdev(netdev);
  1120. if (disable_dev)
  1121. pci_disable_device(pdev);
  1122. }
  1123. /**
  1124. * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
  1125. * @adapter: board private structure to initialize
  1126. *
  1127. * e1000_sw_init initializes the Adapter private data structure.
  1128. * e1000_init_hw_struct MUST be called before this function
  1129. **/
  1130. static int e1000_sw_init(struct e1000_adapter *adapter)
  1131. {
  1132. adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
  1133. adapter->num_tx_queues = 1;
  1134. adapter->num_rx_queues = 1;
  1135. if (e1000_alloc_queues(adapter)) {
  1136. e_err(probe, "Unable to allocate memory for queues\n");
  1137. return -ENOMEM;
  1138. }
  1139. /* Explicitly disable IRQ since the NIC can be in any state. */
  1140. e1000_irq_disable(adapter);
  1141. spin_lock_init(&adapter->stats_lock);
  1142. set_bit(__E1000_DOWN, &adapter->flags);
  1143. return 0;
  1144. }
  1145. /**
  1146. * e1000_alloc_queues - Allocate memory for all rings
  1147. * @adapter: board private structure to initialize
  1148. *
  1149. * We allocate one ring per queue at run-time since we don't know the
  1150. * number of queues at compile-time.
  1151. **/
  1152. static int e1000_alloc_queues(struct e1000_adapter *adapter)
  1153. {
  1154. adapter->tx_ring = kcalloc(adapter->num_tx_queues,
  1155. sizeof(struct e1000_tx_ring), GFP_KERNEL);
  1156. if (!adapter->tx_ring)
  1157. return -ENOMEM;
  1158. adapter->rx_ring = kcalloc(adapter->num_rx_queues,
  1159. sizeof(struct e1000_rx_ring), GFP_KERNEL);
  1160. if (!adapter->rx_ring) {
  1161. kfree(adapter->tx_ring);
  1162. return -ENOMEM;
  1163. }
  1164. return E1000_SUCCESS;
  1165. }
  1166. /**
  1167. * e1000_open - Called when a network interface is made active
  1168. * @netdev: network interface device structure
  1169. *
  1170. * Returns 0 on success, negative value on failure
  1171. *
  1172. * The open entry point is called when a network interface is made
  1173. * active by the system (IFF_UP). At this point all resources needed
  1174. * for transmit and receive operations are allocated, the interrupt
  1175. * handler is registered with the OS, the watchdog task is started,
  1176. * and the stack is notified that the interface is ready.
  1177. **/
  1178. int e1000_open(struct net_device *netdev)
  1179. {
  1180. struct e1000_adapter *adapter = netdev_priv(netdev);
  1181. struct e1000_hw *hw = &adapter->hw;
  1182. int err;
  1183. /* disallow open during test */
  1184. if (test_bit(__E1000_TESTING, &adapter->flags))
  1185. return -EBUSY;
  1186. netif_carrier_off(netdev);
  1187. /* allocate transmit descriptors */
  1188. err = e1000_setup_all_tx_resources(adapter);
  1189. if (err)
  1190. goto err_setup_tx;
  1191. /* allocate receive descriptors */
  1192. err = e1000_setup_all_rx_resources(adapter);
  1193. if (err)
  1194. goto err_setup_rx;
  1195. e1000_power_up_phy(adapter);
  1196. adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
  1197. if ((hw->mng_cookie.status &
  1198. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
  1199. e1000_update_mng_vlan(adapter);
  1200. }
  1201. /* before we allocate an interrupt, we must be ready to handle it.
  1202. * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
  1203. * as soon as we call pci_request_irq, so we have to setup our
  1204. * clean_rx handler before we do so.
  1205. */
  1206. e1000_configure(adapter);
  1207. err = e1000_request_irq(adapter);
  1208. if (err)
  1209. goto err_req_irq;
  1210. /* From here on the code is the same as e1000_up() */
  1211. clear_bit(__E1000_DOWN, &adapter->flags);
  1212. napi_enable(&adapter->napi);
  1213. e1000_irq_enable(adapter);
  1214. netif_start_queue(netdev);
  1215. /* fire a link status change interrupt to start the watchdog */
  1216. ew32(ICS, E1000_ICS_LSC);
  1217. return E1000_SUCCESS;
  1218. err_req_irq:
  1219. e1000_power_down_phy(adapter);
  1220. e1000_free_all_rx_resources(adapter);
  1221. err_setup_rx:
  1222. e1000_free_all_tx_resources(adapter);
  1223. err_setup_tx:
  1224. e1000_reset(adapter);
  1225. return err;
  1226. }
  1227. /**
  1228. * e1000_close - Disables a network interface
  1229. * @netdev: network interface device structure
  1230. *
  1231. * Returns 0, this is not allowed to fail
  1232. *
  1233. * The close entry point is called when an interface is de-activated
  1234. * by the OS. The hardware is still under the drivers control, but
  1235. * needs to be disabled. A global MAC reset is issued to stop the
  1236. * hardware, and all transmit and receive resources are freed.
  1237. **/
  1238. int e1000_close(struct net_device *netdev)
  1239. {
  1240. struct e1000_adapter *adapter = netdev_priv(netdev);
  1241. struct e1000_hw *hw = &adapter->hw;
  1242. int count = E1000_CHECK_RESET_COUNT;
  1243. while (test_bit(__E1000_RESETTING, &adapter->flags) && count--)
  1244. usleep_range(10000, 20000);
  1245. WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
  1246. e1000_down(adapter);
  1247. e1000_power_down_phy(adapter);
  1248. e1000_free_irq(adapter);
  1249. e1000_free_all_tx_resources(adapter);
  1250. e1000_free_all_rx_resources(adapter);
  1251. /* kill manageability vlan ID if supported, but not if a vlan with
  1252. * the same ID is registered on the host OS (let 8021q kill it)
  1253. */
  1254. if ((hw->mng_cookie.status &
  1255. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
  1256. !test_bit(adapter->mng_vlan_id, adapter->active_vlans)) {
  1257. e1000_vlan_rx_kill_vid(netdev, htons(ETH_P_8021Q),
  1258. adapter->mng_vlan_id);
  1259. }
  1260. return 0;
  1261. }
  1262. /**
  1263. * e1000_check_64k_bound - check that memory doesn't cross 64kB boundary
  1264. * @adapter: address of board private structure
  1265. * @start: address of beginning of memory
  1266. * @len: length of memory
  1267. **/
  1268. static bool e1000_check_64k_bound(struct e1000_adapter *adapter, void *start,
  1269. unsigned long len)
  1270. {
  1271. struct e1000_hw *hw = &adapter->hw;
  1272. unsigned long begin = (unsigned long)start;
  1273. unsigned long end = begin + len;
  1274. /* First rev 82545 and 82546 need to not allow any memory
  1275. * write location to cross 64k boundary due to errata 23
  1276. */
  1277. if (hw->mac_type == e1000_82545 ||
  1278. hw->mac_type == e1000_ce4100 ||
  1279. hw->mac_type == e1000_82546) {
  1280. return ((begin ^ (end - 1)) >> 16) != 0 ? false : true;
  1281. }
  1282. return true;
  1283. }
  1284. /**
  1285. * e1000_setup_tx_resources - allocate Tx resources (Descriptors)
  1286. * @adapter: board private structure
  1287. * @txdr: tx descriptor ring (for a specific queue) to setup
  1288. *
  1289. * Return 0 on success, negative on failure
  1290. **/
  1291. static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
  1292. struct e1000_tx_ring *txdr)
  1293. {
  1294. struct pci_dev *pdev = adapter->pdev;
  1295. int size;
  1296. size = sizeof(struct e1000_tx_buffer) * txdr->count;
  1297. txdr->buffer_info = vzalloc(size);
  1298. if (!txdr->buffer_info)
  1299. return -ENOMEM;
  1300. /* round up to nearest 4K */
  1301. txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
  1302. txdr->size = ALIGN(txdr->size, 4096);
  1303. txdr->desc = dma_alloc_coherent(&pdev->dev, txdr->size, &txdr->dma,
  1304. GFP_KERNEL);
  1305. if (!txdr->desc) {
  1306. setup_tx_desc_die:
  1307. vfree(txdr->buffer_info);
  1308. return -ENOMEM;
  1309. }
  1310. /* Fix for errata 23, can't cross 64kB boundary */
  1311. if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
  1312. void *olddesc = txdr->desc;
  1313. dma_addr_t olddma = txdr->dma;
  1314. e_err(tx_err, "txdr align check failed: %u bytes at %p\n",
  1315. txdr->size, txdr->desc);
  1316. /* Try again, without freeing the previous */
  1317. txdr->desc = dma_alloc_coherent(&pdev->dev, txdr->size,
  1318. &txdr->dma, GFP_KERNEL);
  1319. /* Failed allocation, critical failure */
  1320. if (!txdr->desc) {
  1321. dma_free_coherent(&pdev->dev, txdr->size, olddesc,
  1322. olddma);
  1323. goto setup_tx_desc_die;
  1324. }
  1325. if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
  1326. /* give up */
  1327. dma_free_coherent(&pdev->dev, txdr->size, txdr->desc,
  1328. txdr->dma);
  1329. dma_free_coherent(&pdev->dev, txdr->size, olddesc,
  1330. olddma);
  1331. e_err(probe, "Unable to allocate aligned memory "
  1332. "for the transmit descriptor ring\n");
  1333. vfree(txdr->buffer_info);
  1334. return -ENOMEM;
  1335. } else {
  1336. /* Free old allocation, new allocation was successful */
  1337. dma_free_coherent(&pdev->dev, txdr->size, olddesc,
  1338. olddma);
  1339. }
  1340. }
  1341. memset(txdr->desc, 0, txdr->size);
  1342. txdr->next_to_use = 0;
  1343. txdr->next_to_clean = 0;
  1344. return 0;
  1345. }
  1346. /**
  1347. * e1000_setup_all_tx_resources - wrapper to allocate Tx resources
  1348. * (Descriptors) for all queues
  1349. * @adapter: board private structure
  1350. *
  1351. * Return 0 on success, negative on failure
  1352. **/
  1353. int e1000_setup_all_tx_resources(struct e1000_adapter *adapter)
  1354. {
  1355. int i, err = 0;
  1356. for (i = 0; i < adapter->num_tx_queues; i++) {
  1357. err = e1000_setup_tx_resources(adapter, &adapter->tx_ring[i]);
  1358. if (err) {
  1359. e_err(probe, "Allocation for Tx Queue %u failed\n", i);
  1360. for (i-- ; i >= 0; i--)
  1361. e1000_free_tx_resources(adapter,
  1362. &adapter->tx_ring[i]);
  1363. break;
  1364. }
  1365. }
  1366. return err;
  1367. }
  1368. /**
  1369. * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
  1370. * @adapter: board private structure
  1371. *
  1372. * Configure the Tx unit of the MAC after a reset.
  1373. **/
  1374. static void e1000_configure_tx(struct e1000_adapter *adapter)
  1375. {
  1376. u64 tdba;
  1377. struct e1000_hw *hw = &adapter->hw;
  1378. u32 tdlen, tctl, tipg;
  1379. u32 ipgr1, ipgr2;
  1380. /* Setup the HW Tx Head and Tail descriptor pointers */
  1381. switch (adapter->num_tx_queues) {
  1382. case 1:
  1383. default:
  1384. tdba = adapter->tx_ring[0].dma;
  1385. tdlen = adapter->tx_ring[0].count *
  1386. sizeof(struct e1000_tx_desc);
  1387. ew32(TDLEN, tdlen);
  1388. ew32(TDBAH, (tdba >> 32));
  1389. ew32(TDBAL, (tdba & 0x00000000ffffffffULL));
  1390. ew32(TDT, 0);
  1391. ew32(TDH, 0);
  1392. adapter->tx_ring[0].tdh = ((hw->mac_type >= e1000_82543) ?
  1393. E1000_TDH : E1000_82542_TDH);
  1394. adapter->tx_ring[0].tdt = ((hw->mac_type >= e1000_82543) ?
  1395. E1000_TDT : E1000_82542_TDT);
  1396. break;
  1397. }
  1398. /* Set the default values for the Tx Inter Packet Gap timer */
  1399. if ((hw->media_type == e1000_media_type_fiber ||
  1400. hw->media_type == e1000_media_type_internal_serdes))
  1401. tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
  1402. else
  1403. tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
  1404. switch (hw->mac_type) {
  1405. case e1000_82542_rev2_0:
  1406. case e1000_82542_rev2_1:
  1407. tipg = DEFAULT_82542_TIPG_IPGT;
  1408. ipgr1 = DEFAULT_82542_TIPG_IPGR1;
  1409. ipgr2 = DEFAULT_82542_TIPG_IPGR2;
  1410. break;
  1411. default:
  1412. ipgr1 = DEFAULT_82543_TIPG_IPGR1;
  1413. ipgr2 = DEFAULT_82543_TIPG_IPGR2;
  1414. break;
  1415. }
  1416. tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
  1417. tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
  1418. ew32(TIPG, tipg);
  1419. /* Set the Tx Interrupt Delay register */
  1420. ew32(TIDV, adapter->tx_int_delay);
  1421. if (hw->mac_type >= e1000_82540)
  1422. ew32(TADV, adapter->tx_abs_int_delay);
  1423. /* Program the Transmit Control Register */
  1424. tctl = er32(TCTL);
  1425. tctl &= ~E1000_TCTL_CT;
  1426. tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
  1427. (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
  1428. e1000_config_collision_dist(hw);
  1429. /* Setup Transmit Descriptor Settings for eop descriptor */
  1430. adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS;
  1431. /* only set IDE if we are delaying interrupts using the timers */
  1432. if (adapter->tx_int_delay)
  1433. adapter->txd_cmd |= E1000_TXD_CMD_IDE;
  1434. if (hw->mac_type < e1000_82543)
  1435. adapter->txd_cmd |= E1000_TXD_CMD_RPS;
  1436. else
  1437. adapter->txd_cmd |= E1000_TXD_CMD_RS;
  1438. /* Cache if we're 82544 running in PCI-X because we'll
  1439. * need this to apply a workaround later in the send path.
  1440. */
  1441. if (hw->mac_type == e1000_82544 &&
  1442. hw->bus_type == e1000_bus_type_pcix)
  1443. adapter->pcix_82544 = true;
  1444. ew32(TCTL, tctl);
  1445. }
  1446. /**
  1447. * e1000_setup_rx_resources - allocate Rx resources (Descriptors)
  1448. * @adapter: board private structure
  1449. * @rxdr: rx descriptor ring (for a specific queue) to setup
  1450. *
  1451. * Returns 0 on success, negative on failure
  1452. **/
  1453. static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
  1454. struct e1000_rx_ring *rxdr)
  1455. {
  1456. struct pci_dev *pdev = adapter->pdev;
  1457. int size, desc_len;
  1458. size = sizeof(struct e1000_rx_buffer) * rxdr->count;
  1459. rxdr->buffer_info = vzalloc(size);
  1460. if (!rxdr->buffer_info)
  1461. return -ENOMEM;
  1462. desc_len = sizeof(struct e1000_rx_desc);
  1463. /* Round up to nearest 4K */
  1464. rxdr->size = rxdr->count * desc_len;
  1465. rxdr->size = ALIGN(rxdr->size, 4096);
  1466. rxdr->desc = dma_alloc_coherent(&pdev->dev, rxdr->size, &rxdr->dma,
  1467. GFP_KERNEL);
  1468. if (!rxdr->desc) {
  1469. setup_rx_desc_die:
  1470. vfree(rxdr->buffer_info);
  1471. return -ENOMEM;
  1472. }
  1473. /* Fix for errata 23, can't cross 64kB boundary */
  1474. if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
  1475. void *olddesc = rxdr->desc;
  1476. dma_addr_t olddma = rxdr->dma;
  1477. e_err(rx_err, "rxdr align check failed: %u bytes at %p\n",
  1478. rxdr->size, rxdr->desc);
  1479. /* Try again, without freeing the previous */
  1480. rxdr->desc = dma_alloc_coherent(&pdev->dev, rxdr->size,
  1481. &rxdr->dma, GFP_KERNEL);
  1482. /* Failed allocation, critical failure */
  1483. if (!rxdr->desc) {
  1484. dma_free_coherent(&pdev->dev, rxdr->size, olddesc,
  1485. olddma);
  1486. goto setup_rx_desc_die;
  1487. }
  1488. if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
  1489. /* give up */
  1490. dma_free_coherent(&pdev->dev, rxdr->size, rxdr->desc,
  1491. rxdr->dma);
  1492. dma_free_coherent(&pdev->dev, rxdr->size, olddesc,
  1493. olddma);
  1494. e_err(probe, "Unable to allocate aligned memory for "
  1495. "the Rx descriptor ring\n");
  1496. goto setup_rx_desc_die;
  1497. } else {
  1498. /* Free old allocation, new allocation was successful */
  1499. dma_free_coherent(&pdev->dev, rxdr->size, olddesc,
  1500. olddma);
  1501. }
  1502. }
  1503. memset(rxdr->desc, 0, rxdr->size);
  1504. rxdr->next_to_clean = 0;
  1505. rxdr->next_to_use = 0;
  1506. rxdr->rx_skb_top = NULL;
  1507. return 0;
  1508. }
  1509. /**
  1510. * e1000_setup_all_rx_resources - wrapper to allocate Rx resources
  1511. * (Descriptors) for all queues
  1512. * @adapter: board private structure
  1513. *
  1514. * Return 0 on success, negative on failure
  1515. **/
  1516. int e1000_setup_all_rx_resources(struct e1000_adapter *adapter)
  1517. {
  1518. int i, err = 0;
  1519. for (i = 0; i < adapter->num_rx_queues; i++) {
  1520. err = e1000_setup_rx_resources(adapter, &adapter->rx_ring[i]);
  1521. if (err) {
  1522. e_err(probe, "Allocation for Rx Queue %u failed\n", i);
  1523. for (i-- ; i >= 0; i--)
  1524. e1000_free_rx_resources(adapter,
  1525. &adapter->rx_ring[i]);
  1526. break;
  1527. }
  1528. }
  1529. return err;
  1530. }
  1531. /**
  1532. * e1000_setup_rctl - configure the receive control registers
  1533. * @adapter: Board private structure
  1534. **/
  1535. static void e1000_setup_rctl(struct e1000_adapter *adapter)
  1536. {
  1537. struct e1000_hw *hw = &adapter->hw;
  1538. u32 rctl;
  1539. rctl = er32(RCTL);
  1540. rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
  1541. rctl |= E1000_RCTL_BAM | E1000_RCTL_LBM_NO |
  1542. E1000_RCTL_RDMTS_HALF |
  1543. (hw->mc_filter_type << E1000_RCTL_MO_SHIFT);
  1544. if (hw->tbi_compatibility_on == 1)
  1545. rctl |= E1000_RCTL_SBP;
  1546. else
  1547. rctl &= ~E1000_RCTL_SBP;
  1548. if (adapter->netdev->mtu <= ETH_DATA_LEN)
  1549. rctl &= ~E1000_RCTL_LPE;
  1550. else
  1551. rctl |= E1000_RCTL_LPE;
  1552. /* Setup buffer sizes */
  1553. rctl &= ~E1000_RCTL_SZ_4096;
  1554. rctl |= E1000_RCTL_BSEX;
  1555. switch (adapter->rx_buffer_len) {
  1556. case E1000_RXBUFFER_2048:
  1557. default:
  1558. rctl |= E1000_RCTL_SZ_2048;
  1559. rctl &= ~E1000_RCTL_BSEX;
  1560. break;
  1561. case E1000_RXBUFFER_4096:
  1562. rctl |= E1000_RCTL_SZ_4096;
  1563. break;
  1564. case E1000_RXBUFFER_8192:
  1565. rctl |= E1000_RCTL_SZ_8192;
  1566. break;
  1567. case E1000_RXBUFFER_16384:
  1568. rctl |= E1000_RCTL_SZ_16384;
  1569. break;
  1570. }
  1571. /* This is useful for sniffing bad packets. */
  1572. if (adapter->netdev->features & NETIF_F_RXALL) {
  1573. /* UPE and MPE will be handled by normal PROMISC logic
  1574. * in e1000e_set_rx_mode
  1575. */
  1576. rctl |= (E1000_RCTL_SBP | /* Receive bad packets */
  1577. E1000_RCTL_BAM | /* RX All Bcast Pkts */
  1578. E1000_RCTL_PMCF); /* RX All MAC Ctrl Pkts */
  1579. rctl &= ~(E1000_RCTL_VFE | /* Disable VLAN filter */
  1580. E1000_RCTL_DPF | /* Allow filtered pause */
  1581. E1000_RCTL_CFIEN); /* Dis VLAN CFIEN Filter */
  1582. /* Do not mess with E1000_CTRL_VME, it affects transmit as well,
  1583. * and that breaks VLANs.
  1584. */
  1585. }
  1586. ew32(RCTL, rctl);
  1587. }
  1588. /**
  1589. * e1000_configure_rx - Configure 8254x Receive Unit after Reset
  1590. * @adapter: board private structure
  1591. *
  1592. * Configure the Rx unit of the MAC after a reset.
  1593. **/
  1594. static void e1000_configure_rx(struct e1000_adapter *adapter)
  1595. {
  1596. u64 rdba;
  1597. struct e1000_hw *hw = &adapter->hw;
  1598. u32 rdlen, rctl, rxcsum;
  1599. if (adapter->netdev->mtu > ETH_DATA_LEN) {
  1600. rdlen = adapter->rx_ring[0].count *
  1601. sizeof(struct e1000_rx_desc);
  1602. adapter->clean_rx = e1000_clean_jumbo_rx_irq;
  1603. adapter->alloc_rx_buf = e1000_alloc_jumbo_rx_buffers;
  1604. } else {
  1605. rdlen = adapter->rx_ring[0].count *
  1606. sizeof(struct e1000_rx_desc);
  1607. adapter->clean_rx = e1000_clean_rx_irq;
  1608. adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
  1609. }
  1610. /* disable receives while setting up the descriptors */
  1611. rctl = er32(RCTL);
  1612. ew32(RCTL, rctl & ~E1000_RCTL_EN);
  1613. /* set the Receive Delay Timer Register */
  1614. ew32(RDTR, adapter->rx_int_delay);
  1615. if (hw->mac_type >= e1000_82540) {
  1616. ew32(RADV, adapter->rx_abs_int_delay);
  1617. if (adapter->itr_setting != 0)
  1618. ew32(ITR, 1000000000 / (adapter->itr * 256));
  1619. }
  1620. /* Setup the HW Rx Head and Tail Descriptor Pointers and
  1621. * the Base and Length of the Rx Descriptor Ring
  1622. */
  1623. switch (adapter->num_rx_queues) {
  1624. case 1:
  1625. default:
  1626. rdba = adapter->rx_ring[0].dma;
  1627. ew32(RDLEN, rdlen);
  1628. ew32(RDBAH, (rdba >> 32));
  1629. ew32(RDBAL, (rdba & 0x00000000ffffffffULL));
  1630. ew32(RDT, 0);
  1631. ew32(RDH, 0);
  1632. adapter->rx_ring[0].rdh = ((hw->mac_type >= e1000_82543) ?
  1633. E1000_RDH : E1000_82542_RDH);
  1634. adapter->rx_ring[0].rdt = ((hw->mac_type >= e1000_82543) ?
  1635. E1000_RDT : E1000_82542_RDT);
  1636. break;
  1637. }
  1638. /* Enable 82543 Receive Checksum Offload for TCP and UDP */
  1639. if (hw->mac_type >= e1000_82543) {
  1640. rxcsum = er32(RXCSUM);
  1641. if (adapter->rx_csum)
  1642. rxcsum |= E1000_RXCSUM_TUOFL;
  1643. else
  1644. /* don't need to clear IPPCSE as it defaults to 0 */
  1645. rxcsum &= ~E1000_RXCSUM_TUOFL;
  1646. ew32(RXCSUM, rxcsum);
  1647. }
  1648. /* Enable Receives */
  1649. ew32(RCTL, rctl | E1000_RCTL_EN);
  1650. }
  1651. /**
  1652. * e1000_free_tx_resources - Free Tx Resources per Queue
  1653. * @adapter: board private structure
  1654. * @tx_ring: Tx descriptor ring for a specific queue
  1655. *
  1656. * Free all transmit software resources
  1657. **/
  1658. static void e1000_free_tx_resources(struct e1000_adapter *adapter,
  1659. struct e1000_tx_ring *tx_ring)
  1660. {
  1661. struct pci_dev *pdev = adapter->pdev;
  1662. e1000_clean_tx_ring(adapter, tx_ring);
  1663. vfree(tx_ring->buffer_info);
  1664. tx_ring->buffer_info = NULL;
  1665. dma_free_coherent(&pdev->dev, tx_ring->size, tx_ring->desc,
  1666. tx_ring->dma);
  1667. tx_ring->desc = NULL;
  1668. }
  1669. /**
  1670. * e1000_free_all_tx_resources - Free Tx Resources for All Queues
  1671. * @adapter: board private structure
  1672. *
  1673. * Free all transmit software resources
  1674. **/
  1675. void e1000_free_all_tx_resources(struct e1000_adapter *adapter)
  1676. {
  1677. int i;
  1678. for (i = 0; i < adapter->num_tx_queues; i++)
  1679. e1000_free_tx_resources(adapter, &adapter->tx_ring[i]);
  1680. }
  1681. static void
  1682. e1000_unmap_and_free_tx_resource(struct e1000_adapter *adapter,
  1683. struct e1000_tx_buffer *buffer_info)
  1684. {
  1685. if (buffer_info->dma) {
  1686. if (buffer_info->mapped_as_page)
  1687. dma_unmap_page(&adapter->pdev->dev, buffer_info->dma,
  1688. buffer_info->length, DMA_TO_DEVICE);
  1689. else
  1690. dma_unmap_single(&adapter->pdev->dev, buffer_info->dma,
  1691. buffer_info->length,
  1692. DMA_TO_DEVICE);
  1693. buffer_info->dma = 0;
  1694. }
  1695. if (buffer_info->skb) {
  1696. dev_kfree_skb_any(buffer_info->skb);
  1697. buffer_info->skb = NULL;
  1698. }
  1699. buffer_info->time_stamp = 0;
  1700. /* buffer_info must be completely set up in the transmit path */
  1701. }
  1702. /**
  1703. * e1000_clean_tx_ring - Free Tx Buffers
  1704. * @adapter: board private structure
  1705. * @tx_ring: ring to be cleaned
  1706. **/
  1707. static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
  1708. struct e1000_tx_ring *tx_ring)
  1709. {
  1710. struct e1000_hw *hw = &adapter->hw;
  1711. struct e1000_tx_buffer *buffer_info;
  1712. unsigned long size;
  1713. unsigned int i;
  1714. /* Free all the Tx ring sk_buffs */
  1715. for (i = 0; i < tx_ring->count; i++) {
  1716. buffer_info = &tx_ring->buffer_info[i];
  1717. e1000_unmap_and_free_tx_resource(adapter, buffer_info);
  1718. }
  1719. netdev_reset_queue(adapter->netdev);
  1720. size = sizeof(struct e1000_tx_buffer) * tx_ring->count;
  1721. memset(tx_ring->buffer_info, 0, size);
  1722. /* Zero out the descriptor ring */
  1723. memset(tx_ring->desc, 0, tx_ring->size);
  1724. tx_ring->next_to_use = 0;
  1725. tx_ring->next_to_clean = 0;
  1726. tx_ring->last_tx_tso = false;
  1727. writel(0, hw->hw_addr + tx_ring->tdh);
  1728. writel(0, hw->hw_addr + tx_ring->tdt);
  1729. }
  1730. /**
  1731. * e1000_clean_all_tx_rings - Free Tx Buffers for all queues
  1732. * @adapter: board private structure
  1733. **/
  1734. static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter)
  1735. {
  1736. int i;
  1737. for (i = 0; i < adapter->num_tx_queues; i++)
  1738. e1000_clean_tx_ring(adapter, &adapter->tx_ring[i]);
  1739. }
  1740. /**
  1741. * e1000_free_rx_resources - Free Rx Resources
  1742. * @adapter: board private structure
  1743. * @rx_ring: ring to clean the resources from
  1744. *
  1745. * Free all receive software resources
  1746. **/
  1747. static void e1000_free_rx_resources(struct e1000_adapter *adapter,
  1748. struct e1000_rx_ring *rx_ring)
  1749. {
  1750. struct pci_dev *pdev = adapter->pdev;
  1751. e1000_clean_rx_ring(adapter, rx_ring);
  1752. vfree(rx_ring->buffer_info);
  1753. rx_ring->buffer_info = NULL;
  1754. dma_free_coherent(&pdev->dev, rx_ring->size, rx_ring->desc,
  1755. rx_ring->dma);
  1756. rx_ring->desc = NULL;
  1757. }
  1758. /**
  1759. * e1000_free_all_rx_resources - Free Rx Resources for All Queues
  1760. * @adapter: board private structure
  1761. *
  1762. * Free all receive software resources
  1763. **/
  1764. void e1000_free_all_rx_resources(struct e1000_adapter *adapter)
  1765. {
  1766. int i;
  1767. for (i = 0; i < adapter->num_rx_queues; i++)
  1768. e1000_free_rx_resources(adapter, &adapter->rx_ring[i]);
  1769. }
  1770. #define E1000_HEADROOM (NET_SKB_PAD + NET_IP_ALIGN)
  1771. static unsigned int e1000_frag_len(const struct e1000_adapter *a)
  1772. {
  1773. return SKB_DATA_ALIGN(a->rx_buffer_len + E1000_HEADROOM) +
  1774. SKB_DATA_ALIGN(sizeof(struct skb_shared_info));
  1775. }
  1776. static void *e1000_alloc_frag(const struct e1000_adapter *a)
  1777. {
  1778. unsigned int len = e1000_frag_len(a);
  1779. u8 *data = netdev_alloc_frag(len);
  1780. if (likely(data))
  1781. data += E1000_HEADROOM;
  1782. return data;
  1783. }
  1784. /**
  1785. * e1000_clean_rx_ring - Free Rx Buffers per Queue
  1786. * @adapter: board private structure
  1787. * @rx_ring: ring to free buffers from
  1788. **/
  1789. static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
  1790. struct e1000_rx_ring *rx_ring)
  1791. {
  1792. struct e1000_hw *hw = &adapter->hw;
  1793. struct e1000_rx_buffer *buffer_info;
  1794. struct pci_dev *pdev = adapter->pdev;
  1795. unsigned long size;
  1796. unsigned int i;
  1797. /* Free all the Rx netfrags */
  1798. for (i = 0; i < rx_ring->count; i++) {
  1799. buffer_info = &rx_ring->buffer_info[i];
  1800. if (adapter->clean_rx == e1000_clean_rx_irq) {
  1801. if (buffer_info->dma)
  1802. dma_unmap_single(&pdev->dev, buffer_info->dma,
  1803. adapter->rx_buffer_len,
  1804. DMA_FROM_DEVICE);
  1805. if (buffer_info->rxbuf.data) {
  1806. skb_free_frag(buffer_info->rxbuf.data);
  1807. buffer_info->rxbuf.data = NULL;
  1808. }
  1809. } else if (adapter->clean_rx == e1000_clean_jumbo_rx_irq) {
  1810. if (buffer_info->dma)
  1811. dma_unmap_page(&pdev->dev, buffer_info->dma,
  1812. adapter->rx_buffer_len,
  1813. DMA_FROM_DEVICE);
  1814. if (buffer_info->rxbuf.page) {
  1815. put_page(buffer_info->rxbuf.page);
  1816. buffer_info->rxbuf.page = NULL;
  1817. }
  1818. }
  1819. buffer_info->dma = 0;
  1820. }
  1821. /* there also may be some cached data from a chained receive */
  1822. napi_free_frags(&adapter->napi);
  1823. rx_ring->rx_skb_top = NULL;
  1824. size = sizeof(struct e1000_rx_buffer) * rx_ring->count;
  1825. memset(rx_ring->buffer_info, 0, size);
  1826. /* Zero out the descriptor ring */
  1827. memset(rx_ring->desc, 0, rx_ring->size);
  1828. rx_ring->next_to_clean = 0;
  1829. rx_ring->next_to_use = 0;
  1830. writel(0, hw->hw_addr + rx_ring->rdh);
  1831. writel(0, hw->hw_addr + rx_ring->rdt);
  1832. }
  1833. /**
  1834. * e1000_clean_all_rx_rings - Free Rx Buffers for all queues
  1835. * @adapter: board private structure
  1836. **/
  1837. static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter)
  1838. {
  1839. int i;
  1840. for (i = 0; i < adapter->num_rx_queues; i++)
  1841. e1000_clean_rx_ring(adapter, &adapter->rx_ring[i]);
  1842. }
  1843. /* The 82542 2.0 (revision 2) needs to have the receive unit in reset
  1844. * and memory write and invalidate disabled for certain operations
  1845. */
  1846. static void e1000_enter_82542_rst(struct e1000_adapter *adapter)
  1847. {
  1848. struct e1000_hw *hw = &adapter->hw;
  1849. struct net_device *netdev = adapter->netdev;
  1850. u32 rctl;
  1851. e1000_pci_clear_mwi(hw);
  1852. rctl = er32(RCTL);
  1853. rctl |= E1000_RCTL_RST;
  1854. ew32(RCTL, rctl);
  1855. E1000_WRITE_FLUSH();
  1856. mdelay(5);
  1857. if (netif_running(netdev))
  1858. e1000_clean_all_rx_rings(adapter);
  1859. }
  1860. static void e1000_leave_82542_rst(struct e1000_adapter *adapter)
  1861. {
  1862. struct e1000_hw *hw = &adapter->hw;
  1863. struct net_device *netdev = adapter->netdev;
  1864. u32 rctl;
  1865. rctl = er32(RCTL);
  1866. rctl &= ~E1000_RCTL_RST;
  1867. ew32(RCTL, rctl);
  1868. E1000_WRITE_FLUSH();
  1869. mdelay(5);
  1870. if (hw->pci_cmd_word & PCI_COMMAND_INVALIDATE)
  1871. e1000_pci_set_mwi(hw);
  1872. if (netif_running(netdev)) {
  1873. /* No need to loop, because 82542 supports only 1 queue */
  1874. struct e1000_rx_ring *ring = &adapter->rx_ring[0];
  1875. e1000_configure_rx(adapter);
  1876. adapter->alloc_rx_buf(adapter, ring, E1000_DESC_UNUSED(ring));
  1877. }
  1878. }
  1879. /**
  1880. * e1000_set_mac - Change the Ethernet Address of the NIC
  1881. * @netdev: network interface device structure
  1882. * @p: pointer to an address structure
  1883. *
  1884. * Returns 0 on success, negative on failure
  1885. **/
  1886. static int e1000_set_mac(struct net_device *netdev, void *p)
  1887. {
  1888. struct e1000_adapter *adapter = netdev_priv(netdev);
  1889. struct e1000_hw *hw = &adapter->hw;
  1890. struct sockaddr *addr = p;
  1891. if (!is_valid_ether_addr(addr->sa_data))
  1892. return -EADDRNOTAVAIL;
  1893. /* 82542 2.0 needs to be in reset to write receive address registers */
  1894. if (hw->mac_type == e1000_82542_rev2_0)
  1895. e1000_enter_82542_rst(adapter);
  1896. memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
  1897. memcpy(hw->mac_addr, addr->sa_data, netdev->addr_len);
  1898. e1000_rar_set(hw, hw->mac_addr, 0);
  1899. if (hw->mac_type == e1000_82542_rev2_0)
  1900. e1000_leave_82542_rst(adapter);
  1901. return 0;
  1902. }
  1903. /**
  1904. * e1000_set_rx_mode - Secondary Unicast, Multicast and Promiscuous mode set
  1905. * @netdev: network interface device structure
  1906. *
  1907. * The set_rx_mode entry point is called whenever the unicast or multicast
  1908. * address lists or the network interface flags are updated. This routine is
  1909. * responsible for configuring the hardware for proper unicast, multicast,
  1910. * promiscuous mode, and all-multi behavior.
  1911. **/
  1912. static void e1000_set_rx_mode(struct net_device *netdev)
  1913. {
  1914. struct e1000_adapter *adapter = netdev_priv(netdev);
  1915. struct e1000_hw *hw = &adapter->hw;
  1916. struct netdev_hw_addr *ha;
  1917. bool use_uc = false;
  1918. u32 rctl;
  1919. u32 hash_value;
  1920. int i, rar_entries = E1000_RAR_ENTRIES;
  1921. int mta_reg_count = E1000_NUM_MTA_REGISTERS;
  1922. u32 *mcarray = kcalloc(mta_reg_count, sizeof(u32), GFP_ATOMIC);
  1923. if (!mcarray)
  1924. return;
  1925. /* Check for Promiscuous and All Multicast modes */
  1926. rctl = er32(RCTL);
  1927. if (netdev->flags & IFF_PROMISC) {
  1928. rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
  1929. rctl &= ~E1000_RCTL_VFE;
  1930. } else {
  1931. if (netdev->flags & IFF_ALLMULTI)
  1932. rctl |= E1000_RCTL_MPE;
  1933. else
  1934. rctl &= ~E1000_RCTL_MPE;
  1935. /* Enable VLAN filter if there is a VLAN */
  1936. if (e1000_vlan_used(adapter))
  1937. rctl |= E1000_RCTL_VFE;
  1938. }
  1939. if (netdev_uc_count(netdev) > rar_entries - 1) {
  1940. rctl |= E1000_RCTL_UPE;
  1941. } else if (!(netdev->flags & IFF_PROMISC)) {
  1942. rctl &= ~E1000_RCTL_UPE;
  1943. use_uc = true;
  1944. }
  1945. ew32(RCTL, rctl);
  1946. /* 82542 2.0 needs to be in reset to write receive address registers */
  1947. if (hw->mac_type == e1000_82542_rev2_0)
  1948. e1000_enter_82542_rst(adapter);
  1949. /* load the first 14 addresses into the exact filters 1-14. Unicast
  1950. * addresses take precedence to avoid disabling unicast filtering
  1951. * when possible.
  1952. *
  1953. * RAR 0 is used for the station MAC address
  1954. * if there are not 14 addresses, go ahead and clear the filters
  1955. */
  1956. i = 1;
  1957. if (use_uc)
  1958. netdev_for_each_uc_addr(ha, netdev) {
  1959. if (i == rar_entries)
  1960. break;
  1961. e1000_rar_set(hw, ha->addr, i++);
  1962. }
  1963. netdev_for_each_mc_addr(ha, netdev) {
  1964. if (i == rar_entries) {
  1965. /* load any remaining addresses into the hash table */
  1966. u32 hash_reg, hash_bit, mta;
  1967. hash_value = e1000_hash_mc_addr(hw, ha->addr);
  1968. hash_reg = (hash_value >> 5) & 0x7F;
  1969. hash_bit = hash_value & 0x1F;
  1970. mta = (1 << hash_bit);
  1971. mcarray[hash_reg] |= mta;
  1972. } else {
  1973. e1000_rar_set(hw, ha->addr, i++);
  1974. }
  1975. }
  1976. for (; i < rar_entries; i++) {
  1977. E1000_WRITE_REG_ARRAY(hw, RA, i << 1, 0);
  1978. E1000_WRITE_FLUSH();
  1979. E1000_WRITE_REG_ARRAY(hw, RA, (i << 1) + 1, 0);
  1980. E1000_WRITE_FLUSH();
  1981. }
  1982. /* write the hash table completely, write from bottom to avoid
  1983. * both stupid write combining chipsets, and flushing each write
  1984. */
  1985. for (i = mta_reg_count - 1; i >= 0 ; i--) {
  1986. /* If we are on an 82544 has an errata where writing odd
  1987. * offsets overwrites the previous even offset, but writing
  1988. * backwards over the range solves the issue by always
  1989. * writing the odd offset first
  1990. */
  1991. E1000_WRITE_REG_ARRAY(hw, MTA, i, mcarray[i]);
  1992. }
  1993. E1000_WRITE_FLUSH();
  1994. if (hw->mac_type == e1000_82542_rev2_0)
  1995. e1000_leave_82542_rst(adapter);
  1996. kfree(mcarray);
  1997. }
  1998. /**
  1999. * e1000_update_phy_info_task - get phy info
  2000. * @work: work struct contained inside adapter struct
  2001. *
  2002. * Need to wait a few seconds after link up to get diagnostic information from
  2003. * the phy
  2004. */
  2005. static void e1000_update_phy_info_task(struct work_struct *work)
  2006. {
  2007. struct e1000_adapter *adapter = container_of(work,
  2008. struct e1000_adapter,
  2009. phy_info_task.work);
  2010. e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
  2011. }
  2012. /**
  2013. * e1000_82547_tx_fifo_stall_task - task to complete work
  2014. * @work: work struct contained inside adapter struct
  2015. **/
  2016. static void e1000_82547_tx_fifo_stall_task(struct work_struct *work)
  2017. {
  2018. struct e1000_adapter *adapter = container_of(work,
  2019. struct e1000_adapter,
  2020. fifo_stall_task.work);
  2021. struct e1000_hw *hw = &adapter->hw;
  2022. struct net_device *netdev = adapter->netdev;
  2023. u32 tctl;
  2024. if (atomic_read(&adapter->tx_fifo_stall)) {
  2025. if ((er32(TDT) == er32(TDH)) &&
  2026. (er32(TDFT) == er32(TDFH)) &&
  2027. (er32(TDFTS) == er32(TDFHS))) {
  2028. tctl = er32(TCTL);
  2029. ew32(TCTL, tctl & ~E1000_TCTL_EN);
  2030. ew32(TDFT, adapter->tx_head_addr);
  2031. ew32(TDFH, adapter->tx_head_addr);
  2032. ew32(TDFTS, adapter->tx_head_addr);
  2033. ew32(TDFHS, adapter->tx_head_addr);
  2034. ew32(TCTL, tctl);
  2035. E1000_WRITE_FLUSH();
  2036. adapter->tx_fifo_head = 0;
  2037. atomic_set(&adapter->tx_fifo_stall, 0);
  2038. netif_wake_queue(netdev);
  2039. } else if (!test_bit(__E1000_DOWN, &adapter->flags)) {
  2040. schedule_delayed_work(&adapter->fifo_stall_task, 1);
  2041. }
  2042. }
  2043. }
  2044. bool e1000_has_link(struct e1000_adapter *adapter)
  2045. {
  2046. struct e1000_hw *hw = &adapter->hw;
  2047. bool link_active = false;
  2048. /* get_link_status is set on LSC (link status) interrupt or rx
  2049. * sequence error interrupt (except on intel ce4100).
  2050. * get_link_status will stay false until the
  2051. * e1000_check_for_link establishes link for copper adapters
  2052. * ONLY
  2053. */
  2054. switch (hw->media_type) {
  2055. case e1000_media_type_copper:
  2056. if (hw->mac_type == e1000_ce4100)
  2057. hw->get_link_status = 1;
  2058. if (hw->get_link_status) {
  2059. e1000_check_for_link(hw);
  2060. link_active = !hw->get_link_status;
  2061. } else {
  2062. link_active = true;
  2063. }
  2064. break;
  2065. case e1000_media_type_fiber:
  2066. e1000_check_for_link(hw);
  2067. link_active = !!(er32(STATUS) & E1000_STATUS_LU);
  2068. break;
  2069. case e1000_media_type_internal_serdes:
  2070. e1000_check_for_link(hw);
  2071. link_active = hw->serdes_has_link;
  2072. break;
  2073. default:
  2074. break;
  2075. }
  2076. return link_active;
  2077. }
  2078. /**
  2079. * e1000_watchdog - work function
  2080. * @work: work struct contained inside adapter struct
  2081. **/
  2082. static void e1000_watchdog(struct work_struct *work)
  2083. {
  2084. struct e1000_adapter *adapter = container_of(work,
  2085. struct e1000_adapter,
  2086. watchdog_task.work);
  2087. struct e1000_hw *hw = &adapter->hw;
  2088. struct net_device *netdev = adapter->netdev;
  2089. struct e1000_tx_ring *txdr = adapter->tx_ring;
  2090. u32 link, tctl;
  2091. link = e1000_has_link(adapter);
  2092. if ((netif_carrier_ok(netdev)) && link)
  2093. goto link_up;
  2094. if (link) {
  2095. if (!netif_carrier_ok(netdev)) {
  2096. u32 ctrl;
  2097. bool txb2b = true;
  2098. /* update snapshot of PHY registers on LSC */
  2099. e1000_get_speed_and_duplex(hw,
  2100. &adapter->link_speed,
  2101. &adapter->link_duplex);
  2102. ctrl = er32(CTRL);
  2103. pr_info("%s NIC Link is Up %d Mbps %s, "
  2104. "Flow Control: %s\n",
  2105. netdev->name,
  2106. adapter->link_speed,
  2107. adapter->link_duplex == FULL_DUPLEX ?
  2108. "Full Duplex" : "Half Duplex",
  2109. ((ctrl & E1000_CTRL_TFCE) && (ctrl &
  2110. E1000_CTRL_RFCE)) ? "RX/TX" : ((ctrl &
  2111. E1000_CTRL_RFCE) ? "RX" : ((ctrl &
  2112. E1000_CTRL_TFCE) ? "TX" : "None")));
  2113. /* adjust timeout factor according to speed/duplex */
  2114. adapter->tx_timeout_factor = 1;
  2115. switch (adapter->link_speed) {
  2116. case SPEED_10:
  2117. txb2b = false;
  2118. adapter->tx_timeout_factor = 16;
  2119. break;
  2120. case SPEED_100:
  2121. txb2b = false;
  2122. /* maybe add some timeout factor ? */
  2123. break;
  2124. }
  2125. /* enable transmits in the hardware */
  2126. tctl = er32(TCTL);
  2127. tctl |= E1000_TCTL_EN;
  2128. ew32(TCTL, tctl);
  2129. netif_carrier_on(netdev);
  2130. if (!test_bit(__E1000_DOWN, &adapter->flags))
  2131. schedule_delayed_work(&adapter->phy_info_task,
  2132. 2 * HZ);
  2133. adapter->smartspeed = 0;
  2134. }
  2135. } else {
  2136. if (netif_carrier_ok(netdev)) {
  2137. adapter->link_speed = 0;
  2138. adapter->link_duplex = 0;
  2139. pr_info("%s NIC Link is Down\n",
  2140. netdev->name);
  2141. netif_carrier_off(netdev);
  2142. if (!test_bit(__E1000_DOWN, &adapter->flags))
  2143. schedule_delayed_work(&adapter->phy_info_task,
  2144. 2 * HZ);
  2145. }
  2146. e1000_smartspeed(adapter);
  2147. }
  2148. link_up:
  2149. e1000_update_stats(adapter);
  2150. hw->tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
  2151. adapter->tpt_old = adapter->stats.tpt;
  2152. hw->collision_delta = adapter->stats.colc - adapter->colc_old;
  2153. adapter->colc_old = adapter->stats.colc;
  2154. adapter->gorcl = adapter->stats.gorcl - adapter->gorcl_old;
  2155. adapter->gorcl_old = adapter->stats.gorcl;
  2156. adapter->gotcl = adapter->stats.gotcl - adapter->gotcl_old;
  2157. adapter->gotcl_old = adapter->stats.gotcl;
  2158. e1000_update_adaptive(hw);
  2159. if (!netif_carrier_ok(netdev)) {
  2160. if (E1000_DESC_UNUSED(txdr) + 1 < txdr->count) {
  2161. /* We've lost link, so the controller stops DMA,
  2162. * but we've got queued Tx work that's never going
  2163. * to get done, so reset controller to flush Tx.
  2164. * (Do the reset outside of interrupt context).
  2165. */
  2166. adapter->tx_timeout_count++;
  2167. schedule_work(&adapter->reset_task);
  2168. /* exit immediately since reset is imminent */
  2169. return;
  2170. }
  2171. }
  2172. /* Simple mode for Interrupt Throttle Rate (ITR) */
  2173. if (hw->mac_type >= e1000_82540 && adapter->itr_setting == 4) {
  2174. /* Symmetric Tx/Rx gets a reduced ITR=2000;
  2175. * Total asymmetrical Tx or Rx gets ITR=8000;
  2176. * everyone else is between 2000-8000.
  2177. */
  2178. u32 goc = (adapter->gotcl + adapter->gorcl) / 10000;
  2179. u32 dif = (adapter->gotcl > adapter->gorcl ?
  2180. adapter->gotcl - adapter->gorcl :
  2181. adapter->gorcl - adapter->gotcl) / 10000;
  2182. u32 itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000;
  2183. ew32(ITR, 1000000000 / (itr * 256));
  2184. }
  2185. /* Cause software interrupt to ensure rx ring is cleaned */
  2186. ew32(ICS, E1000_ICS_RXDMT0);
  2187. /* Force detection of hung controller every watchdog period */
  2188. adapter->detect_tx_hung = true;
  2189. /* Reschedule the task */
  2190. if (!test_bit(__E1000_DOWN, &adapter->flags))
  2191. schedule_delayed_work(&adapter->watchdog_task, 2 * HZ);
  2192. }
  2193. enum latency_range {
  2194. lowest_latency = 0,
  2195. low_latency = 1,
  2196. bulk_latency = 2,
  2197. latency_invalid = 255
  2198. };
  2199. /**
  2200. * e1000_update_itr - update the dynamic ITR value based on statistics
  2201. * @adapter: pointer to adapter
  2202. * @itr_setting: current adapter->itr
  2203. * @packets: the number of packets during this measurement interval
  2204. * @bytes: the number of bytes during this measurement interval
  2205. *
  2206. * Stores a new ITR value based on packets and byte
  2207. * counts during the last interrupt. The advantage of per interrupt
  2208. * computation is faster updates and more accurate ITR for the current
  2209. * traffic pattern. Constants in this function were computed
  2210. * based on theoretical maximum wire speed and thresholds were set based
  2211. * on testing data as well as attempting to minimize response time
  2212. * while increasing bulk throughput.
  2213. * this functionality is controlled by the InterruptThrottleRate module
  2214. * parameter (see e1000_param.c)
  2215. **/
  2216. static unsigned int e1000_update_itr(struct e1000_adapter *adapter,
  2217. u16 itr_setting, int packets, int bytes)
  2218. {
  2219. unsigned int retval = itr_setting;
  2220. struct e1000_hw *hw = &adapter->hw;
  2221. if (unlikely(hw->mac_type < e1000_82540))
  2222. goto update_itr_done;
  2223. if (packets == 0)
  2224. goto update_itr_done;
  2225. switch (itr_setting) {
  2226. case lowest_latency:
  2227. /* jumbo frames get bulk treatment*/
  2228. if (bytes/packets > 8000)
  2229. retval = bulk_latency;
  2230. else if ((packets < 5) && (bytes > 512))
  2231. retval = low_latency;
  2232. break;
  2233. case low_latency: /* 50 usec aka 20000 ints/s */
  2234. if (bytes > 10000) {
  2235. /* jumbo frames need bulk latency setting */
  2236. if (bytes/packets > 8000)
  2237. retval = bulk_latency;
  2238. else if ((packets < 10) || ((bytes/packets) > 1200))
  2239. retval = bulk_latency;
  2240. else if ((packets > 35))
  2241. retval = lowest_latency;
  2242. } else if (bytes/packets > 2000)
  2243. retval = bulk_latency;
  2244. else if (packets <= 2 && bytes < 512)
  2245. retval = lowest_latency;
  2246. break;
  2247. case bulk_latency: /* 250 usec aka 4000 ints/s */
  2248. if (bytes > 25000) {
  2249. if (packets > 35)
  2250. retval = low_latency;
  2251. } else if (bytes < 6000) {
  2252. retval = low_latency;
  2253. }
  2254. break;
  2255. }
  2256. update_itr_done:
  2257. return retval;
  2258. }
  2259. static void e1000_set_itr(struct e1000_adapter *adapter)
  2260. {
  2261. struct e1000_hw *hw = &adapter->hw;
  2262. u16 current_itr;
  2263. u32 new_itr = adapter->itr;
  2264. if (unlikely(hw->mac_type < e1000_82540))
  2265. return;
  2266. /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
  2267. if (unlikely(adapter->link_speed != SPEED_1000)) {
  2268. current_itr = 0;
  2269. new_itr = 4000;
  2270. goto set_itr_now;
  2271. }
  2272. adapter->tx_itr = e1000_update_itr(adapter, adapter->tx_itr,
  2273. adapter->total_tx_packets,
  2274. adapter->total_tx_bytes);
  2275. /* conservative mode (itr 3) eliminates the lowest_latency setting */
  2276. if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency)
  2277. adapter->tx_itr = low_latency;
  2278. adapter->rx_itr = e1000_update_itr(adapter, adapter->rx_itr,
  2279. adapter->total_rx_packets,
  2280. adapter->total_rx_bytes);
  2281. /* conservative mode (itr 3) eliminates the lowest_latency setting */
  2282. if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency)
  2283. adapter->rx_itr = low_latency;
  2284. current_itr = max(adapter->rx_itr, adapter->tx_itr);
  2285. switch (current_itr) {
  2286. /* counts and packets in update_itr are dependent on these numbers */
  2287. case lowest_latency:
  2288. new_itr = 70000;
  2289. break;
  2290. case low_latency:
  2291. new_itr = 20000; /* aka hwitr = ~200 */
  2292. break;
  2293. case bulk_latency:
  2294. new_itr = 4000;
  2295. break;
  2296. default:
  2297. break;
  2298. }
  2299. set_itr_now:
  2300. if (new_itr != adapter->itr) {
  2301. /* this attempts to bias the interrupt rate towards Bulk
  2302. * by adding intermediate steps when interrupt rate is
  2303. * increasing
  2304. */
  2305. new_itr = new_itr > adapter->itr ?
  2306. min(adapter->itr + (new_itr >> 2), new_itr) :
  2307. new_itr;
  2308. adapter->itr = new_itr;
  2309. ew32(ITR, 1000000000 / (new_itr * 256));
  2310. }
  2311. }
  2312. #define E1000_TX_FLAGS_CSUM 0x00000001
  2313. #define E1000_TX_FLAGS_VLAN 0x00000002
  2314. #define E1000_TX_FLAGS_TSO 0x00000004
  2315. #define E1000_TX_FLAGS_IPV4 0x00000008
  2316. #define E1000_TX_FLAGS_NO_FCS 0x00000010
  2317. #define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
  2318. #define E1000_TX_FLAGS_VLAN_SHIFT 16
  2319. static int e1000_tso(struct e1000_adapter *adapter,
  2320. struct e1000_tx_ring *tx_ring, struct sk_buff *skb,
  2321. __be16 protocol)
  2322. {
  2323. struct e1000_context_desc *context_desc;
  2324. struct e1000_tx_buffer *buffer_info;
  2325. unsigned int i;
  2326. u32 cmd_length = 0;
  2327. u16 ipcse = 0, tucse, mss;
  2328. u8 ipcss, ipcso, tucss, tucso, hdr_len;
  2329. if (skb_is_gso(skb)) {
  2330. int err;
  2331. err = skb_cow_head(skb, 0);
  2332. if (err < 0)
  2333. return err;
  2334. hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
  2335. mss = skb_shinfo(skb)->gso_size;
  2336. if (protocol == htons(ETH_P_IP)) {
  2337. struct iphdr *iph = ip_hdr(skb);
  2338. iph->tot_len = 0;
  2339. iph->check = 0;
  2340. tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
  2341. iph->daddr, 0,
  2342. IPPROTO_TCP,
  2343. 0);
  2344. cmd_length = E1000_TXD_CMD_IP;
  2345. ipcse = skb_transport_offset(skb) - 1;
  2346. } else if (skb_is_gso_v6(skb)) {
  2347. ipv6_hdr(skb)->payload_len = 0;
  2348. tcp_hdr(skb)->check =
  2349. ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
  2350. &ipv6_hdr(skb)->daddr,
  2351. 0, IPPROTO_TCP, 0);
  2352. ipcse = 0;
  2353. }
  2354. ipcss = skb_network_offset(skb);
  2355. ipcso = (void *)&(ip_hdr(skb)->check) - (void *)skb->data;
  2356. tucss = skb_transport_offset(skb);
  2357. tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data;
  2358. tucse = 0;
  2359. cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
  2360. E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
  2361. i = tx_ring->next_to_use;
  2362. context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
  2363. buffer_info = &tx_ring->buffer_info[i];
  2364. context_desc->lower_setup.ip_fields.ipcss = ipcss;
  2365. context_desc->lower_setup.ip_fields.ipcso = ipcso;
  2366. context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
  2367. context_desc->upper_setup.tcp_fields.tucss = tucss;
  2368. context_desc->upper_setup.tcp_fields.tucso = tucso;
  2369. context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
  2370. context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
  2371. context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
  2372. context_desc->cmd_and_length = cpu_to_le32(cmd_length);
  2373. buffer_info->time_stamp = jiffies;
  2374. buffer_info->next_to_watch = i;
  2375. if (++i == tx_ring->count)
  2376. i = 0;
  2377. tx_ring->next_to_use = i;
  2378. return true;
  2379. }
  2380. return false;
  2381. }
  2382. static bool e1000_tx_csum(struct e1000_adapter *adapter,
  2383. struct e1000_tx_ring *tx_ring, struct sk_buff *skb,
  2384. __be16 protocol)
  2385. {
  2386. struct e1000_context_desc *context_desc;
  2387. struct e1000_tx_buffer *buffer_info;
  2388. unsigned int i;
  2389. u8 css;
  2390. u32 cmd_len = E1000_TXD_CMD_DEXT;
  2391. if (skb->ip_summed != CHECKSUM_PARTIAL)
  2392. return false;
  2393. switch (protocol) {
  2394. case cpu_to_be16(ETH_P_IP):
  2395. if (ip_hdr(skb)->protocol == IPPROTO_TCP)
  2396. cmd_len |= E1000_TXD_CMD_TCP;
  2397. break;
  2398. case cpu_to_be16(ETH_P_IPV6):
  2399. /* XXX not handling all IPV6 headers */
  2400. if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
  2401. cmd_len |= E1000_TXD_CMD_TCP;
  2402. break;
  2403. default:
  2404. if (unlikely(net_ratelimit()))
  2405. e_warn(drv, "checksum_partial proto=%x!\n",
  2406. skb->protocol);
  2407. break;
  2408. }
  2409. css = skb_checksum_start_offset(skb);
  2410. i = tx_ring->next_to_use;
  2411. buffer_info = &tx_ring->buffer_info[i];
  2412. context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
  2413. context_desc->lower_setup.ip_config = 0;
  2414. context_desc->upper_setup.tcp_fields.tucss = css;
  2415. context_desc->upper_setup.tcp_fields.tucso =
  2416. css + skb->csum_offset;
  2417. context_desc->upper_setup.tcp_fields.tucse = 0;
  2418. context_desc->tcp_seg_setup.data = 0;
  2419. context_desc->cmd_and_length = cpu_to_le32(cmd_len);
  2420. buffer_info->time_stamp = jiffies;
  2421. buffer_info->next_to_watch = i;
  2422. if (unlikely(++i == tx_ring->count))
  2423. i = 0;
  2424. tx_ring->next_to_use = i;
  2425. return true;
  2426. }
  2427. #define E1000_MAX_TXD_PWR 12
  2428. #define E1000_MAX_DATA_PER_TXD (1<<E1000_MAX_TXD_PWR)
  2429. static int e1000_tx_map(struct e1000_adapter *adapter,
  2430. struct e1000_tx_ring *tx_ring,
  2431. struct sk_buff *skb, unsigned int first,
  2432. unsigned int max_per_txd, unsigned int nr_frags,
  2433. unsigned int mss)
  2434. {
  2435. struct e1000_hw *hw = &adapter->hw;
  2436. struct pci_dev *pdev = adapter->pdev;
  2437. struct e1000_tx_buffer *buffer_info;
  2438. unsigned int len = skb_headlen(skb);
  2439. unsigned int offset = 0, size, count = 0, i;
  2440. unsigned int f, bytecount, segs;
  2441. i = tx_ring->next_to_use;
  2442. while (len) {
  2443. buffer_info = &tx_ring->buffer_info[i];
  2444. size = min(len, max_per_txd);
  2445. /* Workaround for Controller erratum --
  2446. * descriptor for non-tso packet in a linear SKB that follows a
  2447. * tso gets written back prematurely before the data is fully
  2448. * DMA'd to the controller
  2449. */
  2450. if (!skb->data_len && tx_ring->last_tx_tso &&
  2451. !skb_is_gso(skb)) {
  2452. tx_ring->last_tx_tso = false;
  2453. size -= 4;
  2454. }
  2455. /* Workaround for premature desc write-backs
  2456. * in TSO mode. Append 4-byte sentinel desc
  2457. */
  2458. if (unlikely(mss && !nr_frags && size == len && size > 8))
  2459. size -= 4;
  2460. /* work-around for errata 10 and it applies
  2461. * to all controllers in PCI-X mode
  2462. * The fix is to make sure that the first descriptor of a
  2463. * packet is smaller than 2048 - 16 - 16 (or 2016) bytes
  2464. */
  2465. if (unlikely((hw->bus_type == e1000_bus_type_pcix) &&
  2466. (size > 2015) && count == 0))
  2467. size = 2015;
  2468. /* Workaround for potential 82544 hang in PCI-X. Avoid
  2469. * terminating buffers within evenly-aligned dwords.
  2470. */
  2471. if (unlikely(adapter->pcix_82544 &&
  2472. !((unsigned long)(skb->data + offset + size - 1) & 4) &&
  2473. size > 4))
  2474. size -= 4;
  2475. buffer_info->length = size;
  2476. /* set time_stamp *before* dma to help avoid a possible race */
  2477. buffer_info->time_stamp = jiffies;
  2478. buffer_info->mapped_as_page = false;
  2479. buffer_info->dma = dma_map_single(&pdev->dev,
  2480. skb->data + offset,
  2481. size, DMA_TO_DEVICE);
  2482. if (dma_mapping_error(&pdev->dev, buffer_info->dma))
  2483. goto dma_error;
  2484. buffer_info->next_to_watch = i;
  2485. len -= size;
  2486. offset += size;
  2487. count++;
  2488. if (len) {
  2489. i++;
  2490. if (unlikely(i == tx_ring->count))
  2491. i = 0;
  2492. }
  2493. }
  2494. for (f = 0; f < nr_frags; f++) {
  2495. const struct skb_frag_struct *frag;
  2496. frag = &skb_shinfo(skb)->frags[f];
  2497. len = skb_frag_size(frag);
  2498. offset = 0;
  2499. while (len) {
  2500. unsigned long bufend;
  2501. i++;
  2502. if (unlikely(i == tx_ring->count))
  2503. i = 0;
  2504. buffer_info = &tx_ring->buffer_info[i];
  2505. size = min(len, max_per_txd);
  2506. /* Workaround for premature desc write-backs
  2507. * in TSO mode. Append 4-byte sentinel desc
  2508. */
  2509. if (unlikely(mss && f == (nr_frags-1) &&
  2510. size == len && size > 8))
  2511. size -= 4;
  2512. /* Workaround for potential 82544 hang in PCI-X.
  2513. * Avoid terminating buffers within evenly-aligned
  2514. * dwords.
  2515. */
  2516. bufend = (unsigned long)
  2517. page_to_phys(skb_frag_page(frag));
  2518. bufend += offset + size - 1;
  2519. if (unlikely(adapter->pcix_82544 &&
  2520. !(bufend & 4) &&
  2521. size > 4))
  2522. size -= 4;
  2523. buffer_info->length = size;
  2524. buffer_info->time_stamp = jiffies;
  2525. buffer_info->mapped_as_page = true;
  2526. buffer_info->dma = skb_frag_dma_map(&pdev->dev, frag,
  2527. offset, size, DMA_TO_DEVICE);
  2528. if (dma_mapping_error(&pdev->dev, buffer_info->dma))
  2529. goto dma_error;
  2530. buffer_info->next_to_watch = i;
  2531. len -= size;
  2532. offset += size;
  2533. count++;
  2534. }
  2535. }
  2536. segs = skb_shinfo(skb)->gso_segs ?: 1;
  2537. /* multiply data chunks by size of headers */
  2538. bytecount = ((segs - 1) * skb_headlen(skb)) + skb->len;
  2539. tx_ring->buffer_info[i].skb = skb;
  2540. tx_ring->buffer_info[i].segs = segs;
  2541. tx_ring->buffer_info[i].bytecount = bytecount;
  2542. tx_ring->buffer_info[first].next_to_watch = i;
  2543. return count;
  2544. dma_error:
  2545. dev_err(&pdev->dev, "TX DMA map failed\n");
  2546. buffer_info->dma = 0;
  2547. if (count)
  2548. count--;
  2549. while (count--) {
  2550. if (i == 0)
  2551. i += tx_ring->count;
  2552. i--;
  2553. buffer_info = &tx_ring->buffer_info[i];
  2554. e1000_unmap_and_free_tx_resource(adapter, buffer_info);
  2555. }
  2556. return 0;
  2557. }
  2558. static void e1000_tx_queue(struct e1000_adapter *adapter,
  2559. struct e1000_tx_ring *tx_ring, int tx_flags,
  2560. int count)
  2561. {
  2562. struct e1000_tx_desc *tx_desc = NULL;
  2563. struct e1000_tx_buffer *buffer_info;
  2564. u32 txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
  2565. unsigned int i;
  2566. if (likely(tx_flags & E1000_TX_FLAGS_TSO)) {
  2567. txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
  2568. E1000_TXD_CMD_TSE;
  2569. txd_upper |= E1000_TXD_POPTS_TXSM << 8;
  2570. if (likely(tx_flags & E1000_TX_FLAGS_IPV4))
  2571. txd_upper |= E1000_TXD_POPTS_IXSM << 8;
  2572. }
  2573. if (likely(tx_flags & E1000_TX_FLAGS_CSUM)) {
  2574. txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
  2575. txd_upper |= E1000_TXD_POPTS_TXSM << 8;
  2576. }
  2577. if (unlikely(tx_flags & E1000_TX_FLAGS_VLAN)) {
  2578. txd_lower |= E1000_TXD_CMD_VLE;
  2579. txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
  2580. }
  2581. if (unlikely(tx_flags & E1000_TX_FLAGS_NO_FCS))
  2582. txd_lower &= ~(E1000_TXD_CMD_IFCS);
  2583. i = tx_ring->next_to_use;
  2584. while (count--) {
  2585. buffer_info = &tx_ring->buffer_info[i];
  2586. tx_desc = E1000_TX_DESC(*tx_ring, i);
  2587. tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
  2588. tx_desc->lower.data =
  2589. cpu_to_le32(txd_lower | buffer_info->length);
  2590. tx_desc->upper.data = cpu_to_le32(txd_upper);
  2591. if (unlikely(++i == tx_ring->count))
  2592. i = 0;
  2593. }
  2594. tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
  2595. /* txd_cmd re-enables FCS, so we'll re-disable it here as desired. */
  2596. if (unlikely(tx_flags & E1000_TX_FLAGS_NO_FCS))
  2597. tx_desc->lower.data &= ~(cpu_to_le32(E1000_TXD_CMD_IFCS));
  2598. /* Force memory writes to complete before letting h/w
  2599. * know there are new descriptors to fetch. (Only
  2600. * applicable for weak-ordered memory model archs,
  2601. * such as IA-64).
  2602. */
  2603. wmb();
  2604. tx_ring->next_to_use = i;
  2605. }
  2606. /* 82547 workaround to avoid controller hang in half-duplex environment.
  2607. * The workaround is to avoid queuing a large packet that would span
  2608. * the internal Tx FIFO ring boundary by notifying the stack to resend
  2609. * the packet at a later time. This gives the Tx FIFO an opportunity to
  2610. * flush all packets. When that occurs, we reset the Tx FIFO pointers
  2611. * to the beginning of the Tx FIFO.
  2612. */
  2613. #define E1000_FIFO_HDR 0x10
  2614. #define E1000_82547_PAD_LEN 0x3E0
  2615. static int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
  2616. struct sk_buff *skb)
  2617. {
  2618. u32 fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
  2619. u32 skb_fifo_len = skb->len + E1000_FIFO_HDR;
  2620. skb_fifo_len = ALIGN(skb_fifo_len, E1000_FIFO_HDR);
  2621. if (adapter->link_duplex != HALF_DUPLEX)
  2622. goto no_fifo_stall_required;
  2623. if (atomic_read(&adapter->tx_fifo_stall))
  2624. return 1;
  2625. if (skb_fifo_len >= (E1000_82547_PAD_LEN + fifo_space)) {
  2626. atomic_set(&adapter->tx_fifo_stall, 1);
  2627. return 1;
  2628. }
  2629. no_fifo_stall_required:
  2630. adapter->tx_fifo_head += skb_fifo_len;
  2631. if (adapter->tx_fifo_head >= adapter->tx_fifo_size)
  2632. adapter->tx_fifo_head -= adapter->tx_fifo_size;
  2633. return 0;
  2634. }
  2635. static int __e1000_maybe_stop_tx(struct net_device *netdev, int size)
  2636. {
  2637. struct e1000_adapter *adapter = netdev_priv(netdev);
  2638. struct e1000_tx_ring *tx_ring = adapter->tx_ring;
  2639. netif_stop_queue(netdev);
  2640. /* Herbert's original patch had:
  2641. * smp_mb__after_netif_stop_queue();
  2642. * but since that doesn't exist yet, just open code it.
  2643. */
  2644. smp_mb();
  2645. /* We need to check again in a case another CPU has just
  2646. * made room available.
  2647. */
  2648. if (likely(E1000_DESC_UNUSED(tx_ring) < size))
  2649. return -EBUSY;
  2650. /* A reprieve! */
  2651. netif_start_queue(netdev);
  2652. ++adapter->restart_queue;
  2653. return 0;
  2654. }
  2655. static int e1000_maybe_stop_tx(struct net_device *netdev,
  2656. struct e1000_tx_ring *tx_ring, int size)
  2657. {
  2658. if (likely(E1000_DESC_UNUSED(tx_ring) >= size))
  2659. return 0;
  2660. return __e1000_maybe_stop_tx(netdev, size);
  2661. }
  2662. #define TXD_USE_COUNT(S, X) (((S) + ((1 << (X)) - 1)) >> (X))
  2663. static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb,
  2664. struct net_device *netdev)
  2665. {
  2666. struct e1000_adapter *adapter = netdev_priv(netdev);
  2667. struct e1000_hw *hw = &adapter->hw;
  2668. struct e1000_tx_ring *tx_ring;
  2669. unsigned int first, max_per_txd = E1000_MAX_DATA_PER_TXD;
  2670. unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
  2671. unsigned int tx_flags = 0;
  2672. unsigned int len = skb_headlen(skb);
  2673. unsigned int nr_frags;
  2674. unsigned int mss;
  2675. int count = 0;
  2676. int tso;
  2677. unsigned int f;
  2678. __be16 protocol = vlan_get_protocol(skb);
  2679. /* This goes back to the question of how to logically map a Tx queue
  2680. * to a flow. Right now, performance is impacted slightly negatively
  2681. * if using multiple Tx queues. If the stack breaks away from a
  2682. * single qdisc implementation, we can look at this again.
  2683. */
  2684. tx_ring = adapter->tx_ring;
  2685. /* On PCI/PCI-X HW, if packet size is less than ETH_ZLEN,
  2686. * packets may get corrupted during padding by HW.
  2687. * To WA this issue, pad all small packets manually.
  2688. */
  2689. if (eth_skb_pad(skb))
  2690. return NETDEV_TX_OK;
  2691. mss = skb_shinfo(skb)->gso_size;
  2692. /* The controller does a simple calculation to
  2693. * make sure there is enough room in the FIFO before
  2694. * initiating the DMA for each buffer. The calc is:
  2695. * 4 = ceil(buffer len/mss). To make sure we don't
  2696. * overrun the FIFO, adjust the max buffer len if mss
  2697. * drops.
  2698. */
  2699. if (mss) {
  2700. u8 hdr_len;
  2701. max_per_txd = min(mss << 2, max_per_txd);
  2702. max_txd_pwr = fls(max_per_txd) - 1;
  2703. hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
  2704. if (skb->data_len && hdr_len == len) {
  2705. switch (hw->mac_type) {
  2706. unsigned int pull_size;
  2707. case e1000_82544:
  2708. /* Make sure we have room to chop off 4 bytes,
  2709. * and that the end alignment will work out to
  2710. * this hardware's requirements
  2711. * NOTE: this is a TSO only workaround
  2712. * if end byte alignment not correct move us
  2713. * into the next dword
  2714. */
  2715. if ((unsigned long)(skb_tail_pointer(skb) - 1)
  2716. & 4)
  2717. break;
  2718. /* fall through */
  2719. pull_size = min((unsigned int)4, skb->data_len);
  2720. if (!__pskb_pull_tail(skb, pull_size)) {
  2721. e_err(drv, "__pskb_pull_tail "
  2722. "failed.\n");
  2723. dev_kfree_skb_any(skb);
  2724. return NETDEV_TX_OK;
  2725. }
  2726. len = skb_headlen(skb);
  2727. break;
  2728. default:
  2729. /* do nothing */
  2730. break;
  2731. }
  2732. }
  2733. }
  2734. /* reserve a descriptor for the offload context */
  2735. if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL))
  2736. count++;
  2737. count++;
  2738. /* Controller Erratum workaround */
  2739. if (!skb->data_len && tx_ring->last_tx_tso && !skb_is_gso(skb))
  2740. count++;
  2741. count += TXD_USE_COUNT(len, max_txd_pwr);
  2742. if (adapter->pcix_82544)
  2743. count++;
  2744. /* work-around for errata 10 and it applies to all controllers
  2745. * in PCI-X mode, so add one more descriptor to the count
  2746. */
  2747. if (unlikely((hw->bus_type == e1000_bus_type_pcix) &&
  2748. (len > 2015)))
  2749. count++;
  2750. nr_frags = skb_shinfo(skb)->nr_frags;
  2751. for (f = 0; f < nr_frags; f++)
  2752. count += TXD_USE_COUNT(skb_frag_size(&skb_shinfo(skb)->frags[f]),
  2753. max_txd_pwr);
  2754. if (adapter->pcix_82544)
  2755. count += nr_frags;
  2756. /* need: count + 2 desc gap to keep tail from touching
  2757. * head, otherwise try next time
  2758. */
  2759. if (unlikely(e1000_maybe_stop_tx(netdev, tx_ring, count + 2)))
  2760. return NETDEV_TX_BUSY;
  2761. if (unlikely((hw->mac_type == e1000_82547) &&
  2762. (e1000_82547_fifo_workaround(adapter, skb)))) {
  2763. netif_stop_queue(netdev);
  2764. if (!test_bit(__E1000_DOWN, &adapter->flags))
  2765. schedule_delayed_work(&adapter->fifo_stall_task, 1);
  2766. return NETDEV_TX_BUSY;
  2767. }
  2768. if (skb_vlan_tag_present(skb)) {
  2769. tx_flags |= E1000_TX_FLAGS_VLAN;
  2770. tx_flags |= (skb_vlan_tag_get(skb) <<
  2771. E1000_TX_FLAGS_VLAN_SHIFT);
  2772. }
  2773. first = tx_ring->next_to_use;
  2774. tso = e1000_tso(adapter, tx_ring, skb, protocol);
  2775. if (tso < 0) {
  2776. dev_kfree_skb_any(skb);
  2777. return NETDEV_TX_OK;
  2778. }
  2779. if (likely(tso)) {
  2780. if (likely(hw->mac_type != e1000_82544))
  2781. tx_ring->last_tx_tso = true;
  2782. tx_flags |= E1000_TX_FLAGS_TSO;
  2783. } else if (likely(e1000_tx_csum(adapter, tx_ring, skb, protocol)))
  2784. tx_flags |= E1000_TX_FLAGS_CSUM;
  2785. if (protocol == htons(ETH_P_IP))
  2786. tx_flags |= E1000_TX_FLAGS_IPV4;
  2787. if (unlikely(skb->no_fcs))
  2788. tx_flags |= E1000_TX_FLAGS_NO_FCS;
  2789. count = e1000_tx_map(adapter, tx_ring, skb, first, max_per_txd,
  2790. nr_frags, mss);
  2791. if (count) {
  2792. /* The descriptors needed is higher than other Intel drivers
  2793. * due to a number of workarounds. The breakdown is below:
  2794. * Data descriptors: MAX_SKB_FRAGS + 1
  2795. * Context Descriptor: 1
  2796. * Keep head from touching tail: 2
  2797. * Workarounds: 3
  2798. */
  2799. int desc_needed = MAX_SKB_FRAGS + 7;
  2800. netdev_sent_queue(netdev, skb->len);
  2801. skb_tx_timestamp(skb);
  2802. e1000_tx_queue(adapter, tx_ring, tx_flags, count);
  2803. /* 82544 potentially requires twice as many data descriptors
  2804. * in order to guarantee buffers don't end on evenly-aligned
  2805. * dwords
  2806. */
  2807. if (adapter->pcix_82544)
  2808. desc_needed += MAX_SKB_FRAGS + 1;
  2809. /* Make sure there is space in the ring for the next send. */
  2810. e1000_maybe_stop_tx(netdev, tx_ring, desc_needed);
  2811. if (!skb->xmit_more ||
  2812. netif_xmit_stopped(netdev_get_tx_queue(netdev, 0))) {
  2813. writel(tx_ring->next_to_use, hw->hw_addr + tx_ring->tdt);
  2814. /* we need this if more than one processor can write to
  2815. * our tail at a time, it synchronizes IO on IA64/Altix
  2816. * systems
  2817. */
  2818. mmiowb();
  2819. }
  2820. } else {
  2821. dev_kfree_skb_any(skb);
  2822. tx_ring->buffer_info[first].time_stamp = 0;
  2823. tx_ring->next_to_use = first;
  2824. }
  2825. return NETDEV_TX_OK;
  2826. }
  2827. #define NUM_REGS 38 /* 1 based count */
  2828. static void e1000_regdump(struct e1000_adapter *adapter)
  2829. {
  2830. struct e1000_hw *hw = &adapter->hw;
  2831. u32 regs[NUM_REGS];
  2832. u32 *regs_buff = regs;
  2833. int i = 0;
  2834. static const char * const reg_name[] = {
  2835. "CTRL", "STATUS",
  2836. "RCTL", "RDLEN", "RDH", "RDT", "RDTR",
  2837. "TCTL", "TDBAL", "TDBAH", "TDLEN", "TDH", "TDT",
  2838. "TIDV", "TXDCTL", "TADV", "TARC0",
  2839. "TDBAL1", "TDBAH1", "TDLEN1", "TDH1", "TDT1",
  2840. "TXDCTL1", "TARC1",
  2841. "CTRL_EXT", "ERT", "RDBAL", "RDBAH",
  2842. "TDFH", "TDFT", "TDFHS", "TDFTS", "TDFPC",
  2843. "RDFH", "RDFT", "RDFHS", "RDFTS", "RDFPC"
  2844. };
  2845. regs_buff[0] = er32(CTRL);
  2846. regs_buff[1] = er32(STATUS);
  2847. regs_buff[2] = er32(RCTL);
  2848. regs_buff[3] = er32(RDLEN);
  2849. regs_buff[4] = er32(RDH);
  2850. regs_buff[5] = er32(RDT);
  2851. regs_buff[6] = er32(RDTR);
  2852. regs_buff[7] = er32(TCTL);
  2853. regs_buff[8] = er32(TDBAL);
  2854. regs_buff[9] = er32(TDBAH);
  2855. regs_buff[10] = er32(TDLEN);
  2856. regs_buff[11] = er32(TDH);
  2857. regs_buff[12] = er32(TDT);
  2858. regs_buff[13] = er32(TIDV);
  2859. regs_buff[14] = er32(TXDCTL);
  2860. regs_buff[15] = er32(TADV);
  2861. regs_buff[16] = er32(TARC0);
  2862. regs_buff[17] = er32(TDBAL1);
  2863. regs_buff[18] = er32(TDBAH1);
  2864. regs_buff[19] = er32(TDLEN1);
  2865. regs_buff[20] = er32(TDH1);
  2866. regs_buff[21] = er32(TDT1);
  2867. regs_buff[22] = er32(TXDCTL1);
  2868. regs_buff[23] = er32(TARC1);
  2869. regs_buff[24] = er32(CTRL_EXT);
  2870. regs_buff[25] = er32(ERT);
  2871. regs_buff[26] = er32(RDBAL0);
  2872. regs_buff[27] = er32(RDBAH0);
  2873. regs_buff[28] = er32(TDFH);
  2874. regs_buff[29] = er32(TDFT);
  2875. regs_buff[30] = er32(TDFHS);
  2876. regs_buff[31] = er32(TDFTS);
  2877. regs_buff[32] = er32(TDFPC);
  2878. regs_buff[33] = er32(RDFH);
  2879. regs_buff[34] = er32(RDFT);
  2880. regs_buff[35] = er32(RDFHS);
  2881. regs_buff[36] = er32(RDFTS);
  2882. regs_buff[37] = er32(RDFPC);
  2883. pr_info("Register dump\n");
  2884. for (i = 0; i < NUM_REGS; i++)
  2885. pr_info("%-15s %08x\n", reg_name[i], regs_buff[i]);
  2886. }
  2887. /*
  2888. * e1000_dump: Print registers, tx ring and rx ring
  2889. */
  2890. static void e1000_dump(struct e1000_adapter *adapter)
  2891. {
  2892. /* this code doesn't handle multiple rings */
  2893. struct e1000_tx_ring *tx_ring = adapter->tx_ring;
  2894. struct e1000_rx_ring *rx_ring = adapter->rx_ring;
  2895. int i;
  2896. if (!netif_msg_hw(adapter))
  2897. return;
  2898. /* Print Registers */
  2899. e1000_regdump(adapter);
  2900. /* transmit dump */
  2901. pr_info("TX Desc ring0 dump\n");
  2902. /* Transmit Descriptor Formats - DEXT[29] is 0 (Legacy) or 1 (Extended)
  2903. *
  2904. * Legacy Transmit Descriptor
  2905. * +--------------------------------------------------------------+
  2906. * 0 | Buffer Address [63:0] (Reserved on Write Back) |
  2907. * +--------------------------------------------------------------+
  2908. * 8 | Special | CSS | Status | CMD | CSO | Length |
  2909. * +--------------------------------------------------------------+
  2910. * 63 48 47 36 35 32 31 24 23 16 15 0
  2911. *
  2912. * Extended Context Descriptor (DTYP=0x0) for TSO or checksum offload
  2913. * 63 48 47 40 39 32 31 16 15 8 7 0
  2914. * +----------------------------------------------------------------+
  2915. * 0 | TUCSE | TUCS0 | TUCSS | IPCSE | IPCS0 | IPCSS |
  2916. * +----------------------------------------------------------------+
  2917. * 8 | MSS | HDRLEN | RSV | STA | TUCMD | DTYP | PAYLEN |
  2918. * +----------------------------------------------------------------+
  2919. * 63 48 47 40 39 36 35 32 31 24 23 20 19 0
  2920. *
  2921. * Extended Data Descriptor (DTYP=0x1)
  2922. * +----------------------------------------------------------------+
  2923. * 0 | Buffer Address [63:0] |
  2924. * +----------------------------------------------------------------+
  2925. * 8 | VLAN tag | POPTS | Rsvd | Status | Command | DTYP | DTALEN |
  2926. * +----------------------------------------------------------------+
  2927. * 63 48 47 40 39 36 35 32 31 24 23 20 19 0
  2928. */
  2929. pr_info("Tc[desc] [Ce CoCsIpceCoS] [MssHlRSCm0Plen] [bi->dma ] leng ntw timestmp bi->skb\n");
  2930. pr_info("Td[desc] [address 63:0 ] [VlaPoRSCm1Dlen] [bi->dma ] leng ntw timestmp bi->skb\n");
  2931. if (!netif_msg_tx_done(adapter))
  2932. goto rx_ring_summary;
  2933. for (i = 0; tx_ring->desc && (i < tx_ring->count); i++) {
  2934. struct e1000_tx_desc *tx_desc = E1000_TX_DESC(*tx_ring, i);
  2935. struct e1000_tx_buffer *buffer_info = &tx_ring->buffer_info[i];
  2936. struct my_u { __le64 a; __le64 b; };
  2937. struct my_u *u = (struct my_u *)tx_desc;
  2938. const char *type;
  2939. if (i == tx_ring->next_to_use && i == tx_ring->next_to_clean)
  2940. type = "NTC/U";
  2941. else if (i == tx_ring->next_to_use)
  2942. type = "NTU";
  2943. else if (i == tx_ring->next_to_clean)
  2944. type = "NTC";
  2945. else
  2946. type = "";
  2947. pr_info("T%c[0x%03X] %016llX %016llX %016llX %04X %3X %016llX %p %s\n",
  2948. ((le64_to_cpu(u->b) & (1<<20)) ? 'd' : 'c'), i,
  2949. le64_to_cpu(u->a), le64_to_cpu(u->b),
  2950. (u64)buffer_info->dma, buffer_info->length,
  2951. buffer_info->next_to_watch,
  2952. (u64)buffer_info->time_stamp, buffer_info->skb, type);
  2953. }
  2954. rx_ring_summary:
  2955. /* receive dump */
  2956. pr_info("\nRX Desc ring dump\n");
  2957. /* Legacy Receive Descriptor Format
  2958. *
  2959. * +-----------------------------------------------------+
  2960. * | Buffer Address [63:0] |
  2961. * +-----------------------------------------------------+
  2962. * | VLAN Tag | Errors | Status 0 | Packet csum | Length |
  2963. * +-----------------------------------------------------+
  2964. * 63 48 47 40 39 32 31 16 15 0
  2965. */
  2966. pr_info("R[desc] [address 63:0 ] [vl er S cks ln] [bi->dma ] [bi->skb]\n");
  2967. if (!netif_msg_rx_status(adapter))
  2968. goto exit;
  2969. for (i = 0; rx_ring->desc && (i < rx_ring->count); i++) {
  2970. struct e1000_rx_desc *rx_desc = E1000_RX_DESC(*rx_ring, i);
  2971. struct e1000_rx_buffer *buffer_info = &rx_ring->buffer_info[i];
  2972. struct my_u { __le64 a; __le64 b; };
  2973. struct my_u *u = (struct my_u *)rx_desc;
  2974. const char *type;
  2975. if (i == rx_ring->next_to_use)
  2976. type = "NTU";
  2977. else if (i == rx_ring->next_to_clean)
  2978. type = "NTC";
  2979. else
  2980. type = "";
  2981. pr_info("R[0x%03X] %016llX %016llX %016llX %p %s\n",
  2982. i, le64_to_cpu(u->a), le64_to_cpu(u->b),
  2983. (u64)buffer_info->dma, buffer_info->rxbuf.data, type);
  2984. } /* for */
  2985. /* dump the descriptor caches */
  2986. /* rx */
  2987. pr_info("Rx descriptor cache in 64bit format\n");
  2988. for (i = 0x6000; i <= 0x63FF ; i += 0x10) {
  2989. pr_info("R%04X: %08X|%08X %08X|%08X\n",
  2990. i,
  2991. readl(adapter->hw.hw_addr + i+4),
  2992. readl(adapter->hw.hw_addr + i),
  2993. readl(adapter->hw.hw_addr + i+12),
  2994. readl(adapter->hw.hw_addr + i+8));
  2995. }
  2996. /* tx */
  2997. pr_info("Tx descriptor cache in 64bit format\n");
  2998. for (i = 0x7000; i <= 0x73FF ; i += 0x10) {
  2999. pr_info("T%04X: %08X|%08X %08X|%08X\n",
  3000. i,
  3001. readl(adapter->hw.hw_addr + i+4),
  3002. readl(adapter->hw.hw_addr + i),
  3003. readl(adapter->hw.hw_addr + i+12),
  3004. readl(adapter->hw.hw_addr + i+8));
  3005. }
  3006. exit:
  3007. return;
  3008. }
  3009. /**
  3010. * e1000_tx_timeout - Respond to a Tx Hang
  3011. * @netdev: network interface device structure
  3012. **/
  3013. static void e1000_tx_timeout(struct net_device *netdev)
  3014. {
  3015. struct e1000_adapter *adapter = netdev_priv(netdev);
  3016. /* Do the reset outside of interrupt context */
  3017. adapter->tx_timeout_count++;
  3018. schedule_work(&adapter->reset_task);
  3019. }
  3020. static void e1000_reset_task(struct work_struct *work)
  3021. {
  3022. struct e1000_adapter *adapter =
  3023. container_of(work, struct e1000_adapter, reset_task);
  3024. e_err(drv, "Reset adapter\n");
  3025. e1000_reinit_locked(adapter);
  3026. }
  3027. /**
  3028. * e1000_change_mtu - Change the Maximum Transfer Unit
  3029. * @netdev: network interface device structure
  3030. * @new_mtu: new value for maximum frame size
  3031. *
  3032. * Returns 0 on success, negative on failure
  3033. **/
  3034. static int e1000_change_mtu(struct net_device *netdev, int new_mtu)
  3035. {
  3036. struct e1000_adapter *adapter = netdev_priv(netdev);
  3037. struct e1000_hw *hw = &adapter->hw;
  3038. int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
  3039. /* Adapter-specific max frame size limits. */
  3040. switch (hw->mac_type) {
  3041. case e1000_undefined ... e1000_82542_rev2_1:
  3042. if (max_frame > (ETH_FRAME_LEN + ETH_FCS_LEN)) {
  3043. e_err(probe, "Jumbo Frames not supported.\n");
  3044. return -EINVAL;
  3045. }
  3046. break;
  3047. default:
  3048. /* Capable of supporting up to MAX_JUMBO_FRAME_SIZE limit. */
  3049. break;
  3050. }
  3051. while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
  3052. msleep(1);
  3053. /* e1000_down has a dependency on max_frame_size */
  3054. hw->max_frame_size = max_frame;
  3055. if (netif_running(netdev)) {
  3056. /* prevent buffers from being reallocated */
  3057. adapter->alloc_rx_buf = e1000_alloc_dummy_rx_buffers;
  3058. e1000_down(adapter);
  3059. }
  3060. /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
  3061. * means we reserve 2 more, this pushes us to allocate from the next
  3062. * larger slab size.
  3063. * i.e. RXBUFFER_2048 --> size-4096 slab
  3064. * however with the new *_jumbo_rx* routines, jumbo receives will use
  3065. * fragmented skbs
  3066. */
  3067. if (max_frame <= E1000_RXBUFFER_2048)
  3068. adapter->rx_buffer_len = E1000_RXBUFFER_2048;
  3069. else
  3070. #if (PAGE_SIZE >= E1000_RXBUFFER_16384)
  3071. adapter->rx_buffer_len = E1000_RXBUFFER_16384;
  3072. #elif (PAGE_SIZE >= E1000_RXBUFFER_4096)
  3073. adapter->rx_buffer_len = PAGE_SIZE;
  3074. #endif
  3075. /* adjust allocation if LPE protects us, and we aren't using SBP */
  3076. if (!hw->tbi_compatibility_on &&
  3077. ((max_frame == (ETH_FRAME_LEN + ETH_FCS_LEN)) ||
  3078. (max_frame == MAXIMUM_ETHERNET_VLAN_SIZE)))
  3079. adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
  3080. pr_info("%s changing MTU from %d to %d\n",
  3081. netdev->name, netdev->mtu, new_mtu);
  3082. netdev->mtu = new_mtu;
  3083. if (netif_running(netdev))
  3084. e1000_up(adapter);
  3085. else
  3086. e1000_reset(adapter);
  3087. clear_bit(__E1000_RESETTING, &adapter->flags);
  3088. return 0;
  3089. }
  3090. /**
  3091. * e1000_update_stats - Update the board statistics counters
  3092. * @adapter: board private structure
  3093. **/
  3094. void e1000_update_stats(struct e1000_adapter *adapter)
  3095. {
  3096. struct net_device *netdev = adapter->netdev;
  3097. struct e1000_hw *hw = &adapter->hw;
  3098. struct pci_dev *pdev = adapter->pdev;
  3099. unsigned long flags;
  3100. u16 phy_tmp;
  3101. #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
  3102. /* Prevent stats update while adapter is being reset, or if the pci
  3103. * connection is down.
  3104. */
  3105. if (adapter->link_speed == 0)
  3106. return;
  3107. if (pci_channel_offline(pdev))
  3108. return;
  3109. spin_lock_irqsave(&adapter->stats_lock, flags);
  3110. /* these counters are modified from e1000_tbi_adjust_stats,
  3111. * called from the interrupt context, so they must only
  3112. * be written while holding adapter->stats_lock
  3113. */
  3114. adapter->stats.crcerrs += er32(CRCERRS);
  3115. adapter->stats.gprc += er32(GPRC);
  3116. adapter->stats.gorcl += er32(GORCL);
  3117. adapter->stats.gorch += er32(GORCH);
  3118. adapter->stats.bprc += er32(BPRC);
  3119. adapter->stats.mprc += er32(MPRC);
  3120. adapter->stats.roc += er32(ROC);
  3121. adapter->stats.prc64 += er32(PRC64);
  3122. adapter->stats.prc127 += er32(PRC127);
  3123. adapter->stats.prc255 += er32(PRC255);
  3124. adapter->stats.prc511 += er32(PRC511);
  3125. adapter->stats.prc1023 += er32(PRC1023);
  3126. adapter->stats.prc1522 += er32(PRC1522);
  3127. adapter->stats.symerrs += er32(SYMERRS);
  3128. adapter->stats.mpc += er32(MPC);
  3129. adapter->stats.scc += er32(SCC);
  3130. adapter->stats.ecol += er32(ECOL);
  3131. adapter->stats.mcc += er32(MCC);
  3132. adapter->stats.latecol += er32(LATECOL);
  3133. adapter->stats.dc += er32(DC);
  3134. adapter->stats.sec += er32(SEC);
  3135. adapter->stats.rlec += er32(RLEC);
  3136. adapter->stats.xonrxc += er32(XONRXC);
  3137. adapter->stats.xontxc += er32(XONTXC);
  3138. adapter->stats.xoffrxc += er32(XOFFRXC);
  3139. adapter->stats.xofftxc += er32(XOFFTXC);
  3140. adapter->stats.fcruc += er32(FCRUC);
  3141. adapter->stats.gptc += er32(GPTC);
  3142. adapter->stats.gotcl += er32(GOTCL);
  3143. adapter->stats.gotch += er32(GOTCH);
  3144. adapter->stats.rnbc += er32(RNBC);
  3145. adapter->stats.ruc += er32(RUC);
  3146. adapter->stats.rfc += er32(RFC);
  3147. adapter->stats.rjc += er32(RJC);
  3148. adapter->stats.torl += er32(TORL);
  3149. adapter->stats.torh += er32(TORH);
  3150. adapter->stats.totl += er32(TOTL);
  3151. adapter->stats.toth += er32(TOTH);
  3152. adapter->stats.tpr += er32(TPR);
  3153. adapter->stats.ptc64 += er32(PTC64);
  3154. adapter->stats.ptc127 += er32(PTC127);
  3155. adapter->stats.ptc255 += er32(PTC255);
  3156. adapter->stats.ptc511 += er32(PTC511);
  3157. adapter->stats.ptc1023 += er32(PTC1023);
  3158. adapter->stats.ptc1522 += er32(PTC1522);
  3159. adapter->stats.mptc += er32(MPTC);
  3160. adapter->stats.bptc += er32(BPTC);
  3161. /* used for adaptive IFS */
  3162. hw->tx_packet_delta = er32(TPT);
  3163. adapter->stats.tpt += hw->tx_packet_delta;
  3164. hw->collision_delta = er32(COLC);
  3165. adapter->stats.colc += hw->collision_delta;
  3166. if (hw->mac_type >= e1000_82543) {
  3167. adapter->stats.algnerrc += er32(ALGNERRC);
  3168. adapter->stats.rxerrc += er32(RXERRC);
  3169. adapter->stats.tncrs += er32(TNCRS);
  3170. adapter->stats.cexterr += er32(CEXTERR);
  3171. adapter->stats.tsctc += er32(TSCTC);
  3172. adapter->stats.tsctfc += er32(TSCTFC);
  3173. }
  3174. /* Fill out the OS statistics structure */
  3175. netdev->stats.multicast = adapter->stats.mprc;
  3176. netdev->stats.collisions = adapter->stats.colc;
  3177. /* Rx Errors */
  3178. /* RLEC on some newer hardware can be incorrect so build
  3179. * our own version based on RUC and ROC
  3180. */
  3181. netdev->stats.rx_errors = adapter->stats.rxerrc +
  3182. adapter->stats.crcerrs + adapter->stats.algnerrc +
  3183. adapter->stats.ruc + adapter->stats.roc +
  3184. adapter->stats.cexterr;
  3185. adapter->stats.rlerrc = adapter->stats.ruc + adapter->stats.roc;
  3186. netdev->stats.rx_length_errors = adapter->stats.rlerrc;
  3187. netdev->stats.rx_crc_errors = adapter->stats.crcerrs;
  3188. netdev->stats.rx_frame_errors = adapter->stats.algnerrc;
  3189. netdev->stats.rx_missed_errors = adapter->stats.mpc;
  3190. /* Tx Errors */
  3191. adapter->stats.txerrc = adapter->stats.ecol + adapter->stats.latecol;
  3192. netdev->stats.tx_errors = adapter->stats.txerrc;
  3193. netdev->stats.tx_aborted_errors = adapter->stats.ecol;
  3194. netdev->stats.tx_window_errors = adapter->stats.latecol;
  3195. netdev->stats.tx_carrier_errors = adapter->stats.tncrs;
  3196. if (hw->bad_tx_carr_stats_fd &&
  3197. adapter->link_duplex == FULL_DUPLEX) {
  3198. netdev->stats.tx_carrier_errors = 0;
  3199. adapter->stats.tncrs = 0;
  3200. }
  3201. /* Tx Dropped needs to be maintained elsewhere */
  3202. /* Phy Stats */
  3203. if (hw->media_type == e1000_media_type_copper) {
  3204. if ((adapter->link_speed == SPEED_1000) &&
  3205. (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
  3206. phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
  3207. adapter->phy_stats.idle_errors += phy_tmp;
  3208. }
  3209. if ((hw->mac_type <= e1000_82546) &&
  3210. (hw->phy_type == e1000_phy_m88) &&
  3211. !e1000_read_phy_reg(hw, M88E1000_RX_ERR_CNTR, &phy_tmp))
  3212. adapter->phy_stats.receive_errors += phy_tmp;
  3213. }
  3214. /* Management Stats */
  3215. if (hw->has_smbus) {
  3216. adapter->stats.mgptc += er32(MGTPTC);
  3217. adapter->stats.mgprc += er32(MGTPRC);
  3218. adapter->stats.mgpdc += er32(MGTPDC);
  3219. }
  3220. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  3221. }
  3222. /**
  3223. * e1000_intr - Interrupt Handler
  3224. * @irq: interrupt number
  3225. * @data: pointer to a network interface device structure
  3226. **/
  3227. static irqreturn_t e1000_intr(int irq, void *data)
  3228. {
  3229. struct net_device *netdev = data;
  3230. struct e1000_adapter *adapter = netdev_priv(netdev);
  3231. struct e1000_hw *hw = &adapter->hw;
  3232. u32 icr = er32(ICR);
  3233. if (unlikely((!icr)))
  3234. return IRQ_NONE; /* Not our interrupt */
  3235. /* we might have caused the interrupt, but the above
  3236. * read cleared it, and just in case the driver is
  3237. * down there is nothing to do so return handled
  3238. */
  3239. if (unlikely(test_bit(__E1000_DOWN, &adapter->flags)))
  3240. return IRQ_HANDLED;
  3241. if (unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) {
  3242. hw->get_link_status = 1;
  3243. /* guard against interrupt when we're going down */
  3244. if (!test_bit(__E1000_DOWN, &adapter->flags))
  3245. schedule_delayed_work(&adapter->watchdog_task, 1);
  3246. }
  3247. /* disable interrupts, without the synchronize_irq bit */
  3248. ew32(IMC, ~0);
  3249. E1000_WRITE_FLUSH();
  3250. if (likely(napi_schedule_prep(&adapter->napi))) {
  3251. adapter->total_tx_bytes = 0;
  3252. adapter->total_tx_packets = 0;
  3253. adapter->total_rx_bytes = 0;
  3254. adapter->total_rx_packets = 0;
  3255. __napi_schedule(&adapter->napi);
  3256. } else {
  3257. /* this really should not happen! if it does it is basically a
  3258. * bug, but not a hard error, so enable ints and continue
  3259. */
  3260. if (!test_bit(__E1000_DOWN, &adapter->flags))
  3261. e1000_irq_enable(adapter);
  3262. }
  3263. return IRQ_HANDLED;
  3264. }
  3265. /**
  3266. * e1000_clean - NAPI Rx polling callback
  3267. * @adapter: board private structure
  3268. **/
  3269. static int e1000_clean(struct napi_struct *napi, int budget)
  3270. {
  3271. struct e1000_adapter *adapter = container_of(napi, struct e1000_adapter,
  3272. napi);
  3273. int tx_clean_complete = 0, work_done = 0;
  3274. tx_clean_complete = e1000_clean_tx_irq(adapter, &adapter->tx_ring[0]);
  3275. adapter->clean_rx(adapter, &adapter->rx_ring[0], &work_done, budget);
  3276. if (!tx_clean_complete)
  3277. work_done = budget;
  3278. /* If budget not fully consumed, exit the polling mode */
  3279. if (work_done < budget) {
  3280. if (likely(adapter->itr_setting & 3))
  3281. e1000_set_itr(adapter);
  3282. napi_complete_done(napi, work_done);
  3283. if (!test_bit(__E1000_DOWN, &adapter->flags))
  3284. e1000_irq_enable(adapter);
  3285. }
  3286. return work_done;
  3287. }
  3288. /**
  3289. * e1000_clean_tx_irq - Reclaim resources after transmit completes
  3290. * @adapter: board private structure
  3291. **/
  3292. static bool e1000_clean_tx_irq(struct e1000_adapter *adapter,
  3293. struct e1000_tx_ring *tx_ring)
  3294. {
  3295. struct e1000_hw *hw = &adapter->hw;
  3296. struct net_device *netdev = adapter->netdev;
  3297. struct e1000_tx_desc *tx_desc, *eop_desc;
  3298. struct e1000_tx_buffer *buffer_info;
  3299. unsigned int i, eop;
  3300. unsigned int count = 0;
  3301. unsigned int total_tx_bytes = 0, total_tx_packets = 0;
  3302. unsigned int bytes_compl = 0, pkts_compl = 0;
  3303. i = tx_ring->next_to_clean;
  3304. eop = tx_ring->buffer_info[i].next_to_watch;
  3305. eop_desc = E1000_TX_DESC(*tx_ring, eop);
  3306. while ((eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) &&
  3307. (count < tx_ring->count)) {
  3308. bool cleaned = false;
  3309. dma_rmb(); /* read buffer_info after eop_desc */
  3310. for ( ; !cleaned; count++) {
  3311. tx_desc = E1000_TX_DESC(*tx_ring, i);
  3312. buffer_info = &tx_ring->buffer_info[i];
  3313. cleaned = (i == eop);
  3314. if (cleaned) {
  3315. total_tx_packets += buffer_info->segs;
  3316. total_tx_bytes += buffer_info->bytecount;
  3317. if (buffer_info->skb) {
  3318. bytes_compl += buffer_info->skb->len;
  3319. pkts_compl++;
  3320. }
  3321. }
  3322. e1000_unmap_and_free_tx_resource(adapter, buffer_info);
  3323. tx_desc->upper.data = 0;
  3324. if (unlikely(++i == tx_ring->count))
  3325. i = 0;
  3326. }
  3327. eop = tx_ring->buffer_info[i].next_to_watch;
  3328. eop_desc = E1000_TX_DESC(*tx_ring, eop);
  3329. }
  3330. /* Synchronize with E1000_DESC_UNUSED called from e1000_xmit_frame,
  3331. * which will reuse the cleaned buffers.
  3332. */
  3333. smp_store_release(&tx_ring->next_to_clean, i);
  3334. netdev_completed_queue(netdev, pkts_compl, bytes_compl);
  3335. #define TX_WAKE_THRESHOLD 32
  3336. if (unlikely(count && netif_carrier_ok(netdev) &&
  3337. E1000_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD)) {
  3338. /* Make sure that anybody stopping the queue after this
  3339. * sees the new next_to_clean.
  3340. */
  3341. smp_mb();
  3342. if (netif_queue_stopped(netdev) &&
  3343. !(test_bit(__E1000_DOWN, &adapter->flags))) {
  3344. netif_wake_queue(netdev);
  3345. ++adapter->restart_queue;
  3346. }
  3347. }
  3348. if (adapter->detect_tx_hung) {
  3349. /* Detect a transmit hang in hardware, this serializes the
  3350. * check with the clearing of time_stamp and movement of i
  3351. */
  3352. adapter->detect_tx_hung = false;
  3353. if (tx_ring->buffer_info[eop].time_stamp &&
  3354. time_after(jiffies, tx_ring->buffer_info[eop].time_stamp +
  3355. (adapter->tx_timeout_factor * HZ)) &&
  3356. !(er32(STATUS) & E1000_STATUS_TXOFF)) {
  3357. /* detected Tx unit hang */
  3358. e_err(drv, "Detected Tx Unit Hang\n"
  3359. " Tx Queue <%lu>\n"
  3360. " TDH <%x>\n"
  3361. " TDT <%x>\n"
  3362. " next_to_use <%x>\n"
  3363. " next_to_clean <%x>\n"
  3364. "buffer_info[next_to_clean]\n"
  3365. " time_stamp <%lx>\n"
  3366. " next_to_watch <%x>\n"
  3367. " jiffies <%lx>\n"
  3368. " next_to_watch.status <%x>\n",
  3369. (unsigned long)(tx_ring - adapter->tx_ring),
  3370. readl(hw->hw_addr + tx_ring->tdh),
  3371. readl(hw->hw_addr + tx_ring->tdt),
  3372. tx_ring->next_to_use,
  3373. tx_ring->next_to_clean,
  3374. tx_ring->buffer_info[eop].time_stamp,
  3375. eop,
  3376. jiffies,
  3377. eop_desc->upper.fields.status);
  3378. e1000_dump(adapter);
  3379. netif_stop_queue(netdev);
  3380. }
  3381. }
  3382. adapter->total_tx_bytes += total_tx_bytes;
  3383. adapter->total_tx_packets += total_tx_packets;
  3384. netdev->stats.tx_bytes += total_tx_bytes;
  3385. netdev->stats.tx_packets += total_tx_packets;
  3386. return count < tx_ring->count;
  3387. }
  3388. /**
  3389. * e1000_rx_checksum - Receive Checksum Offload for 82543
  3390. * @adapter: board private structure
  3391. * @status_err: receive descriptor status and error fields
  3392. * @csum: receive descriptor csum field
  3393. * @sk_buff: socket buffer with received data
  3394. **/
  3395. static void e1000_rx_checksum(struct e1000_adapter *adapter, u32 status_err,
  3396. u32 csum, struct sk_buff *skb)
  3397. {
  3398. struct e1000_hw *hw = &adapter->hw;
  3399. u16 status = (u16)status_err;
  3400. u8 errors = (u8)(status_err >> 24);
  3401. skb_checksum_none_assert(skb);
  3402. /* 82543 or newer only */
  3403. if (unlikely(hw->mac_type < e1000_82543))
  3404. return;
  3405. /* Ignore Checksum bit is set */
  3406. if (unlikely(status & E1000_RXD_STAT_IXSM))
  3407. return;
  3408. /* TCP/UDP checksum error bit is set */
  3409. if (unlikely(errors & E1000_RXD_ERR_TCPE)) {
  3410. /* let the stack verify checksum errors */
  3411. adapter->hw_csum_err++;
  3412. return;
  3413. }
  3414. /* TCP/UDP Checksum has not been calculated */
  3415. if (!(status & E1000_RXD_STAT_TCPCS))
  3416. return;
  3417. /* It must be a TCP or UDP packet with a valid checksum */
  3418. if (likely(status & E1000_RXD_STAT_TCPCS)) {
  3419. /* TCP checksum is good */
  3420. skb->ip_summed = CHECKSUM_UNNECESSARY;
  3421. }
  3422. adapter->hw_csum_good++;
  3423. }
  3424. /**
  3425. * e1000_consume_page - helper function for jumbo Rx path
  3426. **/
  3427. static void e1000_consume_page(struct e1000_rx_buffer *bi, struct sk_buff *skb,
  3428. u16 length)
  3429. {
  3430. bi->rxbuf.page = NULL;
  3431. skb->len += length;
  3432. skb->data_len += length;
  3433. skb->truesize += PAGE_SIZE;
  3434. }
  3435. /**
  3436. * e1000_receive_skb - helper function to handle rx indications
  3437. * @adapter: board private structure
  3438. * @status: descriptor status field as written by hardware
  3439. * @vlan: descriptor vlan field as written by hardware (no le/be conversion)
  3440. * @skb: pointer to sk_buff to be indicated to stack
  3441. */
  3442. static void e1000_receive_skb(struct e1000_adapter *adapter, u8 status,
  3443. __le16 vlan, struct sk_buff *skb)
  3444. {
  3445. skb->protocol = eth_type_trans(skb, adapter->netdev);
  3446. if (status & E1000_RXD_STAT_VP) {
  3447. u16 vid = le16_to_cpu(vlan) & E1000_RXD_SPC_VLAN_MASK;
  3448. __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
  3449. }
  3450. napi_gro_receive(&adapter->napi, skb);
  3451. }
  3452. /**
  3453. * e1000_tbi_adjust_stats
  3454. * @hw: Struct containing variables accessed by shared code
  3455. * @frame_len: The length of the frame in question
  3456. * @mac_addr: The Ethernet destination address of the frame in question
  3457. *
  3458. * Adjusts the statistic counters when a frame is accepted by TBI_ACCEPT
  3459. */
  3460. static void e1000_tbi_adjust_stats(struct e1000_hw *hw,
  3461. struct e1000_hw_stats *stats,
  3462. u32 frame_len, const u8 *mac_addr)
  3463. {
  3464. u64 carry_bit;
  3465. /* First adjust the frame length. */
  3466. frame_len--;
  3467. /* We need to adjust the statistics counters, since the hardware
  3468. * counters overcount this packet as a CRC error and undercount
  3469. * the packet as a good packet
  3470. */
  3471. /* This packet should not be counted as a CRC error. */
  3472. stats->crcerrs--;
  3473. /* This packet does count as a Good Packet Received. */
  3474. stats->gprc++;
  3475. /* Adjust the Good Octets received counters */
  3476. carry_bit = 0x80000000 & stats->gorcl;
  3477. stats->gorcl += frame_len;
  3478. /* If the high bit of Gorcl (the low 32 bits of the Good Octets
  3479. * Received Count) was one before the addition,
  3480. * AND it is zero after, then we lost the carry out,
  3481. * need to add one to Gorch (Good Octets Received Count High).
  3482. * This could be simplified if all environments supported
  3483. * 64-bit integers.
  3484. */
  3485. if (carry_bit && ((stats->gorcl & 0x80000000) == 0))
  3486. stats->gorch++;
  3487. /* Is this a broadcast or multicast? Check broadcast first,
  3488. * since the test for a multicast frame will test positive on
  3489. * a broadcast frame.
  3490. */
  3491. if (is_broadcast_ether_addr(mac_addr))
  3492. stats->bprc++;
  3493. else if (is_multicast_ether_addr(mac_addr))
  3494. stats->mprc++;
  3495. if (frame_len == hw->max_frame_size) {
  3496. /* In this case, the hardware has overcounted the number of
  3497. * oversize frames.
  3498. */
  3499. if (stats->roc > 0)
  3500. stats->roc--;
  3501. }
  3502. /* Adjust the bin counters when the extra byte put the frame in the
  3503. * wrong bin. Remember that the frame_len was adjusted above.
  3504. */
  3505. if (frame_len == 64) {
  3506. stats->prc64++;
  3507. stats->prc127--;
  3508. } else if (frame_len == 127) {
  3509. stats->prc127++;
  3510. stats->prc255--;
  3511. } else if (frame_len == 255) {
  3512. stats->prc255++;
  3513. stats->prc511--;
  3514. } else if (frame_len == 511) {
  3515. stats->prc511++;
  3516. stats->prc1023--;
  3517. } else if (frame_len == 1023) {
  3518. stats->prc1023++;
  3519. stats->prc1522--;
  3520. } else if (frame_len == 1522) {
  3521. stats->prc1522++;
  3522. }
  3523. }
  3524. static bool e1000_tbi_should_accept(struct e1000_adapter *adapter,
  3525. u8 status, u8 errors,
  3526. u32 length, const u8 *data)
  3527. {
  3528. struct e1000_hw *hw = &adapter->hw;
  3529. u8 last_byte = *(data + length - 1);
  3530. if (TBI_ACCEPT(hw, status, errors, length, last_byte)) {
  3531. unsigned long irq_flags;
  3532. spin_lock_irqsave(&adapter->stats_lock, irq_flags);
  3533. e1000_tbi_adjust_stats(hw, &adapter->stats, length, data);
  3534. spin_unlock_irqrestore(&adapter->stats_lock, irq_flags);
  3535. return true;
  3536. }
  3537. return false;
  3538. }
  3539. static struct sk_buff *e1000_alloc_rx_skb(struct e1000_adapter *adapter,
  3540. unsigned int bufsz)
  3541. {
  3542. struct sk_buff *skb = napi_alloc_skb(&adapter->napi, bufsz);
  3543. if (unlikely(!skb))
  3544. adapter->alloc_rx_buff_failed++;
  3545. return skb;
  3546. }
  3547. /**
  3548. * e1000_clean_jumbo_rx_irq - Send received data up the network stack; legacy
  3549. * @adapter: board private structure
  3550. * @rx_ring: ring to clean
  3551. * @work_done: amount of napi work completed this call
  3552. * @work_to_do: max amount of work allowed for this call to do
  3553. *
  3554. * the return value indicates whether actual cleaning was done, there
  3555. * is no guarantee that everything was cleaned
  3556. */
  3557. static bool e1000_clean_jumbo_rx_irq(struct e1000_adapter *adapter,
  3558. struct e1000_rx_ring *rx_ring,
  3559. int *work_done, int work_to_do)
  3560. {
  3561. struct net_device *netdev = adapter->netdev;
  3562. struct pci_dev *pdev = adapter->pdev;
  3563. struct e1000_rx_desc *rx_desc, *next_rxd;
  3564. struct e1000_rx_buffer *buffer_info, *next_buffer;
  3565. u32 length;
  3566. unsigned int i;
  3567. int cleaned_count = 0;
  3568. bool cleaned = false;
  3569. unsigned int total_rx_bytes = 0, total_rx_packets = 0;
  3570. i = rx_ring->next_to_clean;
  3571. rx_desc = E1000_RX_DESC(*rx_ring, i);
  3572. buffer_info = &rx_ring->buffer_info[i];
  3573. while (rx_desc->status & E1000_RXD_STAT_DD) {
  3574. struct sk_buff *skb;
  3575. u8 status;
  3576. if (*work_done >= work_to_do)
  3577. break;
  3578. (*work_done)++;
  3579. dma_rmb(); /* read descriptor and rx_buffer_info after status DD */
  3580. status = rx_desc->status;
  3581. if (++i == rx_ring->count)
  3582. i = 0;
  3583. next_rxd = E1000_RX_DESC(*rx_ring, i);
  3584. prefetch(next_rxd);
  3585. next_buffer = &rx_ring->buffer_info[i];
  3586. cleaned = true;
  3587. cleaned_count++;
  3588. dma_unmap_page(&pdev->dev, buffer_info->dma,
  3589. adapter->rx_buffer_len, DMA_FROM_DEVICE);
  3590. buffer_info->dma = 0;
  3591. length = le16_to_cpu(rx_desc->length);
  3592. /* errors is only valid for DD + EOP descriptors */
  3593. if (unlikely((status & E1000_RXD_STAT_EOP) &&
  3594. (rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK))) {
  3595. u8 *mapped = page_address(buffer_info->rxbuf.page);
  3596. if (e1000_tbi_should_accept(adapter, status,
  3597. rx_desc->errors,
  3598. length, mapped)) {
  3599. length--;
  3600. } else if (netdev->features & NETIF_F_RXALL) {
  3601. goto process_skb;
  3602. } else {
  3603. /* an error means any chain goes out the window
  3604. * too
  3605. */
  3606. if (rx_ring->rx_skb_top)
  3607. dev_kfree_skb(rx_ring->rx_skb_top);
  3608. rx_ring->rx_skb_top = NULL;
  3609. goto next_desc;
  3610. }
  3611. }
  3612. #define rxtop rx_ring->rx_skb_top
  3613. process_skb:
  3614. if (!(status & E1000_RXD_STAT_EOP)) {
  3615. /* this descriptor is only the beginning (or middle) */
  3616. if (!rxtop) {
  3617. /* this is the beginning of a chain */
  3618. rxtop = napi_get_frags(&adapter->napi);
  3619. if (!rxtop)
  3620. break;
  3621. skb_fill_page_desc(rxtop, 0,
  3622. buffer_info->rxbuf.page,
  3623. 0, length);
  3624. } else {
  3625. /* this is the middle of a chain */
  3626. skb_fill_page_desc(rxtop,
  3627. skb_shinfo(rxtop)->nr_frags,
  3628. buffer_info->rxbuf.page, 0, length);
  3629. }
  3630. e1000_consume_page(buffer_info, rxtop, length);
  3631. goto next_desc;
  3632. } else {
  3633. if (rxtop) {
  3634. /* end of the chain */
  3635. skb_fill_page_desc(rxtop,
  3636. skb_shinfo(rxtop)->nr_frags,
  3637. buffer_info->rxbuf.page, 0, length);
  3638. skb = rxtop;
  3639. rxtop = NULL;
  3640. e1000_consume_page(buffer_info, skb, length);
  3641. } else {
  3642. struct page *p;
  3643. /* no chain, got EOP, this buf is the packet
  3644. * copybreak to save the put_page/alloc_page
  3645. */
  3646. p = buffer_info->rxbuf.page;
  3647. if (length <= copybreak) {
  3648. u8 *vaddr;
  3649. if (likely(!(netdev->features & NETIF_F_RXFCS)))
  3650. length -= 4;
  3651. skb = e1000_alloc_rx_skb(adapter,
  3652. length);
  3653. if (!skb)
  3654. break;
  3655. vaddr = kmap_atomic(p);
  3656. memcpy(skb_tail_pointer(skb), vaddr,
  3657. length);
  3658. kunmap_atomic(vaddr);
  3659. /* re-use the page, so don't erase
  3660. * buffer_info->rxbuf.page
  3661. */
  3662. skb_put(skb, length);
  3663. e1000_rx_checksum(adapter,
  3664. status | rx_desc->errors << 24,
  3665. le16_to_cpu(rx_desc->csum), skb);
  3666. total_rx_bytes += skb->len;
  3667. total_rx_packets++;
  3668. e1000_receive_skb(adapter, status,
  3669. rx_desc->special, skb);
  3670. goto next_desc;
  3671. } else {
  3672. skb = napi_get_frags(&adapter->napi);
  3673. if (!skb) {
  3674. adapter->alloc_rx_buff_failed++;
  3675. break;
  3676. }
  3677. skb_fill_page_desc(skb, 0, p, 0,
  3678. length);
  3679. e1000_consume_page(buffer_info, skb,
  3680. length);
  3681. }
  3682. }
  3683. }
  3684. /* Receive Checksum Offload XXX recompute due to CRC strip? */
  3685. e1000_rx_checksum(adapter,
  3686. (u32)(status) |
  3687. ((u32)(rx_desc->errors) << 24),
  3688. le16_to_cpu(rx_desc->csum), skb);
  3689. total_rx_bytes += (skb->len - 4); /* don't count FCS */
  3690. if (likely(!(netdev->features & NETIF_F_RXFCS)))
  3691. pskb_trim(skb, skb->len - 4);
  3692. total_rx_packets++;
  3693. if (status & E1000_RXD_STAT_VP) {
  3694. __le16 vlan = rx_desc->special;
  3695. u16 vid = le16_to_cpu(vlan) & E1000_RXD_SPC_VLAN_MASK;
  3696. __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
  3697. }
  3698. napi_gro_frags(&adapter->napi);
  3699. next_desc:
  3700. rx_desc->status = 0;
  3701. /* return some buffers to hardware, one at a time is too slow */
  3702. if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
  3703. adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
  3704. cleaned_count = 0;
  3705. }
  3706. /* use prefetched values */
  3707. rx_desc = next_rxd;
  3708. buffer_info = next_buffer;
  3709. }
  3710. rx_ring->next_to_clean = i;
  3711. cleaned_count = E1000_DESC_UNUSED(rx_ring);
  3712. if (cleaned_count)
  3713. adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
  3714. adapter->total_rx_packets += total_rx_packets;
  3715. adapter->total_rx_bytes += total_rx_bytes;
  3716. netdev->stats.rx_bytes += total_rx_bytes;
  3717. netdev->stats.rx_packets += total_rx_packets;
  3718. return cleaned;
  3719. }
  3720. /* this should improve performance for small packets with large amounts
  3721. * of reassembly being done in the stack
  3722. */
  3723. static struct sk_buff *e1000_copybreak(struct e1000_adapter *adapter,
  3724. struct e1000_rx_buffer *buffer_info,
  3725. u32 length, const void *data)
  3726. {
  3727. struct sk_buff *skb;
  3728. if (length > copybreak)
  3729. return NULL;
  3730. skb = e1000_alloc_rx_skb(adapter, length);
  3731. if (!skb)
  3732. return NULL;
  3733. dma_sync_single_for_cpu(&adapter->pdev->dev, buffer_info->dma,
  3734. length, DMA_FROM_DEVICE);
  3735. skb_put_data(skb, data, length);
  3736. return skb;
  3737. }
  3738. /**
  3739. * e1000_clean_rx_irq - Send received data up the network stack; legacy
  3740. * @adapter: board private structure
  3741. * @rx_ring: ring to clean
  3742. * @work_done: amount of napi work completed this call
  3743. * @work_to_do: max amount of work allowed for this call to do
  3744. */
  3745. static bool e1000_clean_rx_irq(struct e1000_adapter *adapter,
  3746. struct e1000_rx_ring *rx_ring,
  3747. int *work_done, int work_to_do)
  3748. {
  3749. struct net_device *netdev = adapter->netdev;
  3750. struct pci_dev *pdev = adapter->pdev;
  3751. struct e1000_rx_desc *rx_desc, *next_rxd;
  3752. struct e1000_rx_buffer *buffer_info, *next_buffer;
  3753. u32 length;
  3754. unsigned int i;
  3755. int cleaned_count = 0;
  3756. bool cleaned = false;
  3757. unsigned int total_rx_bytes = 0, total_rx_packets = 0;
  3758. i = rx_ring->next_to_clean;
  3759. rx_desc = E1000_RX_DESC(*rx_ring, i);
  3760. buffer_info = &rx_ring->buffer_info[i];
  3761. while (rx_desc->status & E1000_RXD_STAT_DD) {
  3762. struct sk_buff *skb;
  3763. u8 *data;
  3764. u8 status;
  3765. if (*work_done >= work_to_do)
  3766. break;
  3767. (*work_done)++;
  3768. dma_rmb(); /* read descriptor and rx_buffer_info after status DD */
  3769. status = rx_desc->status;
  3770. length = le16_to_cpu(rx_desc->length);
  3771. data = buffer_info->rxbuf.data;
  3772. prefetch(data);
  3773. skb = e1000_copybreak(adapter, buffer_info, length, data);
  3774. if (!skb) {
  3775. unsigned int frag_len = e1000_frag_len(adapter);
  3776. skb = build_skb(data - E1000_HEADROOM, frag_len);
  3777. if (!skb) {
  3778. adapter->alloc_rx_buff_failed++;
  3779. break;
  3780. }
  3781. skb_reserve(skb, E1000_HEADROOM);
  3782. dma_unmap_single(&pdev->dev, buffer_info->dma,
  3783. adapter->rx_buffer_len,
  3784. DMA_FROM_DEVICE);
  3785. buffer_info->dma = 0;
  3786. buffer_info->rxbuf.data = NULL;
  3787. }
  3788. if (++i == rx_ring->count)
  3789. i = 0;
  3790. next_rxd = E1000_RX_DESC(*rx_ring, i);
  3791. prefetch(next_rxd);
  3792. next_buffer = &rx_ring->buffer_info[i];
  3793. cleaned = true;
  3794. cleaned_count++;
  3795. /* !EOP means multiple descriptors were used to store a single
  3796. * packet, if thats the case we need to toss it. In fact, we
  3797. * to toss every packet with the EOP bit clear and the next
  3798. * frame that _does_ have the EOP bit set, as it is by
  3799. * definition only a frame fragment
  3800. */
  3801. if (unlikely(!(status & E1000_RXD_STAT_EOP)))
  3802. adapter->discarding = true;
  3803. if (adapter->discarding) {
  3804. /* All receives must fit into a single buffer */
  3805. netdev_dbg(netdev, "Receive packet consumed multiple buffers\n");
  3806. dev_kfree_skb(skb);
  3807. if (status & E1000_RXD_STAT_EOP)
  3808. adapter->discarding = false;
  3809. goto next_desc;
  3810. }
  3811. if (unlikely(rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK)) {
  3812. if (e1000_tbi_should_accept(adapter, status,
  3813. rx_desc->errors,
  3814. length, data)) {
  3815. length--;
  3816. } else if (netdev->features & NETIF_F_RXALL) {
  3817. goto process_skb;
  3818. } else {
  3819. dev_kfree_skb(skb);
  3820. goto next_desc;
  3821. }
  3822. }
  3823. process_skb:
  3824. total_rx_bytes += (length - 4); /* don't count FCS */
  3825. total_rx_packets++;
  3826. if (likely(!(netdev->features & NETIF_F_RXFCS)))
  3827. /* adjust length to remove Ethernet CRC, this must be
  3828. * done after the TBI_ACCEPT workaround above
  3829. */
  3830. length -= 4;
  3831. if (buffer_info->rxbuf.data == NULL)
  3832. skb_put(skb, length);
  3833. else /* copybreak skb */
  3834. skb_trim(skb, length);
  3835. /* Receive Checksum Offload */
  3836. e1000_rx_checksum(adapter,
  3837. (u32)(status) |
  3838. ((u32)(rx_desc->errors) << 24),
  3839. le16_to_cpu(rx_desc->csum), skb);
  3840. e1000_receive_skb(adapter, status, rx_desc->special, skb);
  3841. next_desc:
  3842. rx_desc->status = 0;
  3843. /* return some buffers to hardware, one at a time is too slow */
  3844. if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
  3845. adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
  3846. cleaned_count = 0;
  3847. }
  3848. /* use prefetched values */
  3849. rx_desc = next_rxd;
  3850. buffer_info = next_buffer;
  3851. }
  3852. rx_ring->next_to_clean = i;
  3853. cleaned_count = E1000_DESC_UNUSED(rx_ring);
  3854. if (cleaned_count)
  3855. adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
  3856. adapter->total_rx_packets += total_rx_packets;
  3857. adapter->total_rx_bytes += total_rx_bytes;
  3858. netdev->stats.rx_bytes += total_rx_bytes;
  3859. netdev->stats.rx_packets += total_rx_packets;
  3860. return cleaned;
  3861. }
  3862. /**
  3863. * e1000_alloc_jumbo_rx_buffers - Replace used jumbo receive buffers
  3864. * @adapter: address of board private structure
  3865. * @rx_ring: pointer to receive ring structure
  3866. * @cleaned_count: number of buffers to allocate this pass
  3867. **/
  3868. static void
  3869. e1000_alloc_jumbo_rx_buffers(struct e1000_adapter *adapter,
  3870. struct e1000_rx_ring *rx_ring, int cleaned_count)
  3871. {
  3872. struct pci_dev *pdev = adapter->pdev;
  3873. struct e1000_rx_desc *rx_desc;
  3874. struct e1000_rx_buffer *buffer_info;
  3875. unsigned int i;
  3876. i = rx_ring->next_to_use;
  3877. buffer_info = &rx_ring->buffer_info[i];
  3878. while (cleaned_count--) {
  3879. /* allocate a new page if necessary */
  3880. if (!buffer_info->rxbuf.page) {
  3881. buffer_info->rxbuf.page = alloc_page(GFP_ATOMIC);
  3882. if (unlikely(!buffer_info->rxbuf.page)) {
  3883. adapter->alloc_rx_buff_failed++;
  3884. break;
  3885. }
  3886. }
  3887. if (!buffer_info->dma) {
  3888. buffer_info->dma = dma_map_page(&pdev->dev,
  3889. buffer_info->rxbuf.page, 0,
  3890. adapter->rx_buffer_len,
  3891. DMA_FROM_DEVICE);
  3892. if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
  3893. put_page(buffer_info->rxbuf.page);
  3894. buffer_info->rxbuf.page = NULL;
  3895. buffer_info->dma = 0;
  3896. adapter->alloc_rx_buff_failed++;
  3897. break;
  3898. }
  3899. }
  3900. rx_desc = E1000_RX_DESC(*rx_ring, i);
  3901. rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
  3902. if (unlikely(++i == rx_ring->count))
  3903. i = 0;
  3904. buffer_info = &rx_ring->buffer_info[i];
  3905. }
  3906. if (likely(rx_ring->next_to_use != i)) {
  3907. rx_ring->next_to_use = i;
  3908. if (unlikely(i-- == 0))
  3909. i = (rx_ring->count - 1);
  3910. /* Force memory writes to complete before letting h/w
  3911. * know there are new descriptors to fetch. (Only
  3912. * applicable for weak-ordered memory model archs,
  3913. * such as IA-64).
  3914. */
  3915. wmb();
  3916. writel(i, adapter->hw.hw_addr + rx_ring->rdt);
  3917. }
  3918. }
  3919. /**
  3920. * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
  3921. * @adapter: address of board private structure
  3922. **/
  3923. static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
  3924. struct e1000_rx_ring *rx_ring,
  3925. int cleaned_count)
  3926. {
  3927. struct e1000_hw *hw = &adapter->hw;
  3928. struct pci_dev *pdev = adapter->pdev;
  3929. struct e1000_rx_desc *rx_desc;
  3930. struct e1000_rx_buffer *buffer_info;
  3931. unsigned int i;
  3932. unsigned int bufsz = adapter->rx_buffer_len;
  3933. i = rx_ring->next_to_use;
  3934. buffer_info = &rx_ring->buffer_info[i];
  3935. while (cleaned_count--) {
  3936. void *data;
  3937. if (buffer_info->rxbuf.data)
  3938. goto skip;
  3939. data = e1000_alloc_frag(adapter);
  3940. if (!data) {
  3941. /* Better luck next round */
  3942. adapter->alloc_rx_buff_failed++;
  3943. break;
  3944. }
  3945. /* Fix for errata 23, can't cross 64kB boundary */
  3946. if (!e1000_check_64k_bound(adapter, data, bufsz)) {
  3947. void *olddata = data;
  3948. e_err(rx_err, "skb align check failed: %u bytes at "
  3949. "%p\n", bufsz, data);
  3950. /* Try again, without freeing the previous */
  3951. data = e1000_alloc_frag(adapter);
  3952. /* Failed allocation, critical failure */
  3953. if (!data) {
  3954. skb_free_frag(olddata);
  3955. adapter->alloc_rx_buff_failed++;
  3956. break;
  3957. }
  3958. if (!e1000_check_64k_bound(adapter, data, bufsz)) {
  3959. /* give up */
  3960. skb_free_frag(data);
  3961. skb_free_frag(olddata);
  3962. adapter->alloc_rx_buff_failed++;
  3963. break;
  3964. }
  3965. /* Use new allocation */
  3966. skb_free_frag(olddata);
  3967. }
  3968. buffer_info->dma = dma_map_single(&pdev->dev,
  3969. data,
  3970. adapter->rx_buffer_len,
  3971. DMA_FROM_DEVICE);
  3972. if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
  3973. skb_free_frag(data);
  3974. buffer_info->dma = 0;
  3975. adapter->alloc_rx_buff_failed++;
  3976. break;
  3977. }
  3978. /* XXX if it was allocated cleanly it will never map to a
  3979. * boundary crossing
  3980. */
  3981. /* Fix for errata 23, can't cross 64kB boundary */
  3982. if (!e1000_check_64k_bound(adapter,
  3983. (void *)(unsigned long)buffer_info->dma,
  3984. adapter->rx_buffer_len)) {
  3985. e_err(rx_err, "dma align check failed: %u bytes at "
  3986. "%p\n", adapter->rx_buffer_len,
  3987. (void *)(unsigned long)buffer_info->dma);
  3988. dma_unmap_single(&pdev->dev, buffer_info->dma,
  3989. adapter->rx_buffer_len,
  3990. DMA_FROM_DEVICE);
  3991. skb_free_frag(data);
  3992. buffer_info->rxbuf.data = NULL;
  3993. buffer_info->dma = 0;
  3994. adapter->alloc_rx_buff_failed++;
  3995. break;
  3996. }
  3997. buffer_info->rxbuf.data = data;
  3998. skip:
  3999. rx_desc = E1000_RX_DESC(*rx_ring, i);
  4000. rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
  4001. if (unlikely(++i == rx_ring->count))
  4002. i = 0;
  4003. buffer_info = &rx_ring->buffer_info[i];
  4004. }
  4005. if (likely(rx_ring->next_to_use != i)) {
  4006. rx_ring->next_to_use = i;
  4007. if (unlikely(i-- == 0))
  4008. i = (rx_ring->count - 1);
  4009. /* Force memory writes to complete before letting h/w
  4010. * know there are new descriptors to fetch. (Only
  4011. * applicable for weak-ordered memory model archs,
  4012. * such as IA-64).
  4013. */
  4014. wmb();
  4015. writel(i, hw->hw_addr + rx_ring->rdt);
  4016. }
  4017. }
  4018. /**
  4019. * e1000_smartspeed - Workaround for SmartSpeed on 82541 and 82547 controllers.
  4020. * @adapter:
  4021. **/
  4022. static void e1000_smartspeed(struct e1000_adapter *adapter)
  4023. {
  4024. struct e1000_hw *hw = &adapter->hw;
  4025. u16 phy_status;
  4026. u16 phy_ctrl;
  4027. if ((hw->phy_type != e1000_phy_igp) || !hw->autoneg ||
  4028. !(hw->autoneg_advertised & ADVERTISE_1000_FULL))
  4029. return;
  4030. if (adapter->smartspeed == 0) {
  4031. /* If Master/Slave config fault is asserted twice,
  4032. * we assume back-to-back
  4033. */
  4034. e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_status);
  4035. if (!(phy_status & SR_1000T_MS_CONFIG_FAULT))
  4036. return;
  4037. e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_status);
  4038. if (!(phy_status & SR_1000T_MS_CONFIG_FAULT))
  4039. return;
  4040. e1000_read_phy_reg(hw, PHY_1000T_CTRL, &phy_ctrl);
  4041. if (phy_ctrl & CR_1000T_MS_ENABLE) {
  4042. phy_ctrl &= ~CR_1000T_MS_ENABLE;
  4043. e1000_write_phy_reg(hw, PHY_1000T_CTRL,
  4044. phy_ctrl);
  4045. adapter->smartspeed++;
  4046. if (!e1000_phy_setup_autoneg(hw) &&
  4047. !e1000_read_phy_reg(hw, PHY_CTRL,
  4048. &phy_ctrl)) {
  4049. phy_ctrl |= (MII_CR_AUTO_NEG_EN |
  4050. MII_CR_RESTART_AUTO_NEG);
  4051. e1000_write_phy_reg(hw, PHY_CTRL,
  4052. phy_ctrl);
  4053. }
  4054. }
  4055. return;
  4056. } else if (adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) {
  4057. /* If still no link, perhaps using 2/3 pair cable */
  4058. e1000_read_phy_reg(hw, PHY_1000T_CTRL, &phy_ctrl);
  4059. phy_ctrl |= CR_1000T_MS_ENABLE;
  4060. e1000_write_phy_reg(hw, PHY_1000T_CTRL, phy_ctrl);
  4061. if (!e1000_phy_setup_autoneg(hw) &&
  4062. !e1000_read_phy_reg(hw, PHY_CTRL, &phy_ctrl)) {
  4063. phy_ctrl |= (MII_CR_AUTO_NEG_EN |
  4064. MII_CR_RESTART_AUTO_NEG);
  4065. e1000_write_phy_reg(hw, PHY_CTRL, phy_ctrl);
  4066. }
  4067. }
  4068. /* Restart process after E1000_SMARTSPEED_MAX iterations */
  4069. if (adapter->smartspeed++ == E1000_SMARTSPEED_MAX)
  4070. adapter->smartspeed = 0;
  4071. }
  4072. /**
  4073. * e1000_ioctl -
  4074. * @netdev:
  4075. * @ifreq:
  4076. * @cmd:
  4077. **/
  4078. static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
  4079. {
  4080. switch (cmd) {
  4081. case SIOCGMIIPHY:
  4082. case SIOCGMIIREG:
  4083. case SIOCSMIIREG:
  4084. return e1000_mii_ioctl(netdev, ifr, cmd);
  4085. default:
  4086. return -EOPNOTSUPP;
  4087. }
  4088. }
  4089. /**
  4090. * e1000_mii_ioctl -
  4091. * @netdev:
  4092. * @ifreq:
  4093. * @cmd:
  4094. **/
  4095. static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
  4096. int cmd)
  4097. {
  4098. struct e1000_adapter *adapter = netdev_priv(netdev);
  4099. struct e1000_hw *hw = &adapter->hw;
  4100. struct mii_ioctl_data *data = if_mii(ifr);
  4101. int retval;
  4102. u16 mii_reg;
  4103. unsigned long flags;
  4104. if (hw->media_type != e1000_media_type_copper)
  4105. return -EOPNOTSUPP;
  4106. switch (cmd) {
  4107. case SIOCGMIIPHY:
  4108. data->phy_id = hw->phy_addr;
  4109. break;
  4110. case SIOCGMIIREG:
  4111. spin_lock_irqsave(&adapter->stats_lock, flags);
  4112. if (e1000_read_phy_reg(hw, data->reg_num & 0x1F,
  4113. &data->val_out)) {
  4114. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  4115. return -EIO;
  4116. }
  4117. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  4118. break;
  4119. case SIOCSMIIREG:
  4120. if (data->reg_num & ~(0x1F))
  4121. return -EFAULT;
  4122. mii_reg = data->val_in;
  4123. spin_lock_irqsave(&adapter->stats_lock, flags);
  4124. if (e1000_write_phy_reg(hw, data->reg_num,
  4125. mii_reg)) {
  4126. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  4127. return -EIO;
  4128. }
  4129. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  4130. if (hw->media_type == e1000_media_type_copper) {
  4131. switch (data->reg_num) {
  4132. case PHY_CTRL:
  4133. if (mii_reg & MII_CR_POWER_DOWN)
  4134. break;
  4135. if (mii_reg & MII_CR_AUTO_NEG_EN) {
  4136. hw->autoneg = 1;
  4137. hw->autoneg_advertised = 0x2F;
  4138. } else {
  4139. u32 speed;
  4140. if (mii_reg & 0x40)
  4141. speed = SPEED_1000;
  4142. else if (mii_reg & 0x2000)
  4143. speed = SPEED_100;
  4144. else
  4145. speed = SPEED_10;
  4146. retval = e1000_set_spd_dplx(
  4147. adapter, speed,
  4148. ((mii_reg & 0x100)
  4149. ? DUPLEX_FULL :
  4150. DUPLEX_HALF));
  4151. if (retval)
  4152. return retval;
  4153. }
  4154. if (netif_running(adapter->netdev))
  4155. e1000_reinit_locked(adapter);
  4156. else
  4157. e1000_reset(adapter);
  4158. break;
  4159. case M88E1000_PHY_SPEC_CTRL:
  4160. case M88E1000_EXT_PHY_SPEC_CTRL:
  4161. if (e1000_phy_reset(hw))
  4162. return -EIO;
  4163. break;
  4164. }
  4165. } else {
  4166. switch (data->reg_num) {
  4167. case PHY_CTRL:
  4168. if (mii_reg & MII_CR_POWER_DOWN)
  4169. break;
  4170. if (netif_running(adapter->netdev))
  4171. e1000_reinit_locked(adapter);
  4172. else
  4173. e1000_reset(adapter);
  4174. break;
  4175. }
  4176. }
  4177. break;
  4178. default:
  4179. return -EOPNOTSUPP;
  4180. }
  4181. return E1000_SUCCESS;
  4182. }
  4183. void e1000_pci_set_mwi(struct e1000_hw *hw)
  4184. {
  4185. struct e1000_adapter *adapter = hw->back;
  4186. int ret_val = pci_set_mwi(adapter->pdev);
  4187. if (ret_val)
  4188. e_err(probe, "Error in setting MWI\n");
  4189. }
  4190. void e1000_pci_clear_mwi(struct e1000_hw *hw)
  4191. {
  4192. struct e1000_adapter *adapter = hw->back;
  4193. pci_clear_mwi(adapter->pdev);
  4194. }
  4195. int e1000_pcix_get_mmrbc(struct e1000_hw *hw)
  4196. {
  4197. struct e1000_adapter *adapter = hw->back;
  4198. return pcix_get_mmrbc(adapter->pdev);
  4199. }
  4200. void e1000_pcix_set_mmrbc(struct e1000_hw *hw, int mmrbc)
  4201. {
  4202. struct e1000_adapter *adapter = hw->back;
  4203. pcix_set_mmrbc(adapter->pdev, mmrbc);
  4204. }
  4205. void e1000_io_write(struct e1000_hw *hw, unsigned long port, u32 value)
  4206. {
  4207. outl(value, port);
  4208. }
  4209. static bool e1000_vlan_used(struct e1000_adapter *adapter)
  4210. {
  4211. u16 vid;
  4212. for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
  4213. return true;
  4214. return false;
  4215. }
  4216. static void __e1000_vlan_mode(struct e1000_adapter *adapter,
  4217. netdev_features_t features)
  4218. {
  4219. struct e1000_hw *hw = &adapter->hw;
  4220. u32 ctrl;
  4221. ctrl = er32(CTRL);
  4222. if (features & NETIF_F_HW_VLAN_CTAG_RX) {
  4223. /* enable VLAN tag insert/strip */
  4224. ctrl |= E1000_CTRL_VME;
  4225. } else {
  4226. /* disable VLAN tag insert/strip */
  4227. ctrl &= ~E1000_CTRL_VME;
  4228. }
  4229. ew32(CTRL, ctrl);
  4230. }
  4231. static void e1000_vlan_filter_on_off(struct e1000_adapter *adapter,
  4232. bool filter_on)
  4233. {
  4234. struct e1000_hw *hw = &adapter->hw;
  4235. u32 rctl;
  4236. if (!test_bit(__E1000_DOWN, &adapter->flags))
  4237. e1000_irq_disable(adapter);
  4238. __e1000_vlan_mode(adapter, adapter->netdev->features);
  4239. if (filter_on) {
  4240. /* enable VLAN receive filtering */
  4241. rctl = er32(RCTL);
  4242. rctl &= ~E1000_RCTL_CFIEN;
  4243. if (!(adapter->netdev->flags & IFF_PROMISC))
  4244. rctl |= E1000_RCTL_VFE;
  4245. ew32(RCTL, rctl);
  4246. e1000_update_mng_vlan(adapter);
  4247. } else {
  4248. /* disable VLAN receive filtering */
  4249. rctl = er32(RCTL);
  4250. rctl &= ~E1000_RCTL_VFE;
  4251. ew32(RCTL, rctl);
  4252. }
  4253. if (!test_bit(__E1000_DOWN, &adapter->flags))
  4254. e1000_irq_enable(adapter);
  4255. }
  4256. static void e1000_vlan_mode(struct net_device *netdev,
  4257. netdev_features_t features)
  4258. {
  4259. struct e1000_adapter *adapter = netdev_priv(netdev);
  4260. if (!test_bit(__E1000_DOWN, &adapter->flags))
  4261. e1000_irq_disable(adapter);
  4262. __e1000_vlan_mode(adapter, features);
  4263. if (!test_bit(__E1000_DOWN, &adapter->flags))
  4264. e1000_irq_enable(adapter);
  4265. }
  4266. static int e1000_vlan_rx_add_vid(struct net_device *netdev,
  4267. __be16 proto, u16 vid)
  4268. {
  4269. struct e1000_adapter *adapter = netdev_priv(netdev);
  4270. struct e1000_hw *hw = &adapter->hw;
  4271. u32 vfta, index;
  4272. if ((hw->mng_cookie.status &
  4273. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
  4274. (vid == adapter->mng_vlan_id))
  4275. return 0;
  4276. if (!e1000_vlan_used(adapter))
  4277. e1000_vlan_filter_on_off(adapter, true);
  4278. /* add VID to filter table */
  4279. index = (vid >> 5) & 0x7F;
  4280. vfta = E1000_READ_REG_ARRAY(hw, VFTA, index);
  4281. vfta |= (1 << (vid & 0x1F));
  4282. e1000_write_vfta(hw, index, vfta);
  4283. set_bit(vid, adapter->active_vlans);
  4284. return 0;
  4285. }
  4286. static int e1000_vlan_rx_kill_vid(struct net_device *netdev,
  4287. __be16 proto, u16 vid)
  4288. {
  4289. struct e1000_adapter *adapter = netdev_priv(netdev);
  4290. struct e1000_hw *hw = &adapter->hw;
  4291. u32 vfta, index;
  4292. if (!test_bit(__E1000_DOWN, &adapter->flags))
  4293. e1000_irq_disable(adapter);
  4294. if (!test_bit(__E1000_DOWN, &adapter->flags))
  4295. e1000_irq_enable(adapter);
  4296. /* remove VID from filter table */
  4297. index = (vid >> 5) & 0x7F;
  4298. vfta = E1000_READ_REG_ARRAY(hw, VFTA, index);
  4299. vfta &= ~(1 << (vid & 0x1F));
  4300. e1000_write_vfta(hw, index, vfta);
  4301. clear_bit(vid, adapter->active_vlans);
  4302. if (!e1000_vlan_used(adapter))
  4303. e1000_vlan_filter_on_off(adapter, false);
  4304. return 0;
  4305. }
  4306. static void e1000_restore_vlan(struct e1000_adapter *adapter)
  4307. {
  4308. u16 vid;
  4309. if (!e1000_vlan_used(adapter))
  4310. return;
  4311. e1000_vlan_filter_on_off(adapter, true);
  4312. for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
  4313. e1000_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), vid);
  4314. }
  4315. int e1000_set_spd_dplx(struct e1000_adapter *adapter, u32 spd, u8 dplx)
  4316. {
  4317. struct e1000_hw *hw = &adapter->hw;
  4318. hw->autoneg = 0;
  4319. /* Make sure dplx is at most 1 bit and lsb of speed is not set
  4320. * for the switch() below to work
  4321. */
  4322. if ((spd & 1) || (dplx & ~1))
  4323. goto err_inval;
  4324. /* Fiber NICs only allow 1000 gbps Full duplex */
  4325. if ((hw->media_type == e1000_media_type_fiber) &&
  4326. spd != SPEED_1000 &&
  4327. dplx != DUPLEX_FULL)
  4328. goto err_inval;
  4329. switch (spd + dplx) {
  4330. case SPEED_10 + DUPLEX_HALF:
  4331. hw->forced_speed_duplex = e1000_10_half;
  4332. break;
  4333. case SPEED_10 + DUPLEX_FULL:
  4334. hw->forced_speed_duplex = e1000_10_full;
  4335. break;
  4336. case SPEED_100 + DUPLEX_HALF:
  4337. hw->forced_speed_duplex = e1000_100_half;
  4338. break;
  4339. case SPEED_100 + DUPLEX_FULL:
  4340. hw->forced_speed_duplex = e1000_100_full;
  4341. break;
  4342. case SPEED_1000 + DUPLEX_FULL:
  4343. hw->autoneg = 1;
  4344. hw->autoneg_advertised = ADVERTISE_1000_FULL;
  4345. break;
  4346. case SPEED_1000 + DUPLEX_HALF: /* not supported */
  4347. default:
  4348. goto err_inval;
  4349. }
  4350. /* clear MDI, MDI(-X) override is only allowed when autoneg enabled */
  4351. hw->mdix = AUTO_ALL_MODES;
  4352. return 0;
  4353. err_inval:
  4354. e_err(probe, "Unsupported Speed/Duplex configuration\n");
  4355. return -EINVAL;
  4356. }
  4357. static int __e1000_shutdown(struct pci_dev *pdev, bool *enable_wake)
  4358. {
  4359. struct net_device *netdev = pci_get_drvdata(pdev);
  4360. struct e1000_adapter *adapter = netdev_priv(netdev);
  4361. struct e1000_hw *hw = &adapter->hw;
  4362. u32 ctrl, ctrl_ext, rctl, status;
  4363. u32 wufc = adapter->wol;
  4364. #ifdef CONFIG_PM
  4365. int retval = 0;
  4366. #endif
  4367. netif_device_detach(netdev);
  4368. if (netif_running(netdev)) {
  4369. int count = E1000_CHECK_RESET_COUNT;
  4370. while (test_bit(__E1000_RESETTING, &adapter->flags) && count--)
  4371. usleep_range(10000, 20000);
  4372. WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
  4373. e1000_down(adapter);
  4374. }
  4375. #ifdef CONFIG_PM
  4376. retval = pci_save_state(pdev);
  4377. if (retval)
  4378. return retval;
  4379. #endif
  4380. status = er32(STATUS);
  4381. if (status & E1000_STATUS_LU)
  4382. wufc &= ~E1000_WUFC_LNKC;
  4383. if (wufc) {
  4384. e1000_setup_rctl(adapter);
  4385. e1000_set_rx_mode(netdev);
  4386. rctl = er32(RCTL);
  4387. /* turn on all-multi mode if wake on multicast is enabled */
  4388. if (wufc & E1000_WUFC_MC)
  4389. rctl |= E1000_RCTL_MPE;
  4390. /* enable receives in the hardware */
  4391. ew32(RCTL, rctl | E1000_RCTL_EN);
  4392. if (hw->mac_type >= e1000_82540) {
  4393. ctrl = er32(CTRL);
  4394. /* advertise wake from D3Cold */
  4395. #define E1000_CTRL_ADVD3WUC 0x00100000
  4396. /* phy power management enable */
  4397. #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
  4398. ctrl |= E1000_CTRL_ADVD3WUC |
  4399. E1000_CTRL_EN_PHY_PWR_MGMT;
  4400. ew32(CTRL, ctrl);
  4401. }
  4402. if (hw->media_type == e1000_media_type_fiber ||
  4403. hw->media_type == e1000_media_type_internal_serdes) {
  4404. /* keep the laser running in D3 */
  4405. ctrl_ext = er32(CTRL_EXT);
  4406. ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
  4407. ew32(CTRL_EXT, ctrl_ext);
  4408. }
  4409. ew32(WUC, E1000_WUC_PME_EN);
  4410. ew32(WUFC, wufc);
  4411. } else {
  4412. ew32(WUC, 0);
  4413. ew32(WUFC, 0);
  4414. }
  4415. e1000_release_manageability(adapter);
  4416. *enable_wake = !!wufc;
  4417. /* make sure adapter isn't asleep if manageability is enabled */
  4418. if (adapter->en_mng_pt)
  4419. *enable_wake = true;
  4420. if (netif_running(netdev))
  4421. e1000_free_irq(adapter);
  4422. if (!test_and_set_bit(__E1000_DISABLED, &adapter->flags))
  4423. pci_disable_device(pdev);
  4424. return 0;
  4425. }
  4426. #ifdef CONFIG_PM
  4427. static int e1000_suspend(struct pci_dev *pdev, pm_message_t state)
  4428. {
  4429. int retval;
  4430. bool wake;
  4431. retval = __e1000_shutdown(pdev, &wake);
  4432. if (retval)
  4433. return retval;
  4434. if (wake) {
  4435. pci_prepare_to_sleep(pdev);
  4436. } else {
  4437. pci_wake_from_d3(pdev, false);
  4438. pci_set_power_state(pdev, PCI_D3hot);
  4439. }
  4440. return 0;
  4441. }
  4442. static int e1000_resume(struct pci_dev *pdev)
  4443. {
  4444. struct net_device *netdev = pci_get_drvdata(pdev);
  4445. struct e1000_adapter *adapter = netdev_priv(netdev);
  4446. struct e1000_hw *hw = &adapter->hw;
  4447. u32 err;
  4448. pci_set_power_state(pdev, PCI_D0);
  4449. pci_restore_state(pdev);
  4450. pci_save_state(pdev);
  4451. if (adapter->need_ioport)
  4452. err = pci_enable_device(pdev);
  4453. else
  4454. err = pci_enable_device_mem(pdev);
  4455. if (err) {
  4456. pr_err("Cannot enable PCI device from suspend\n");
  4457. return err;
  4458. }
  4459. /* flush memory to make sure state is correct */
  4460. smp_mb__before_atomic();
  4461. clear_bit(__E1000_DISABLED, &adapter->flags);
  4462. pci_set_master(pdev);
  4463. pci_enable_wake(pdev, PCI_D3hot, 0);
  4464. pci_enable_wake(pdev, PCI_D3cold, 0);
  4465. if (netif_running(netdev)) {
  4466. err = e1000_request_irq(adapter);
  4467. if (err)
  4468. return err;
  4469. }
  4470. e1000_power_up_phy(adapter);
  4471. e1000_reset(adapter);
  4472. ew32(WUS, ~0);
  4473. e1000_init_manageability(adapter);
  4474. if (netif_running(netdev))
  4475. e1000_up(adapter);
  4476. netif_device_attach(netdev);
  4477. return 0;
  4478. }
  4479. #endif
  4480. static void e1000_shutdown(struct pci_dev *pdev)
  4481. {
  4482. bool wake;
  4483. __e1000_shutdown(pdev, &wake);
  4484. if (system_state == SYSTEM_POWER_OFF) {
  4485. pci_wake_from_d3(pdev, wake);
  4486. pci_set_power_state(pdev, PCI_D3hot);
  4487. }
  4488. }
  4489. #ifdef CONFIG_NET_POLL_CONTROLLER
  4490. /* Polling 'interrupt' - used by things like netconsole to send skbs
  4491. * without having to re-enable interrupts. It's not called while
  4492. * the interrupt routine is executing.
  4493. */
  4494. static void e1000_netpoll(struct net_device *netdev)
  4495. {
  4496. struct e1000_adapter *adapter = netdev_priv(netdev);
  4497. if (disable_hardirq(adapter->pdev->irq))
  4498. e1000_intr(adapter->pdev->irq, netdev);
  4499. enable_irq(adapter->pdev->irq);
  4500. }
  4501. #endif
  4502. /**
  4503. * e1000_io_error_detected - called when PCI error is detected
  4504. * @pdev: Pointer to PCI device
  4505. * @state: The current pci connection state
  4506. *
  4507. * This function is called after a PCI bus error affecting
  4508. * this device has been detected.
  4509. */
  4510. static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
  4511. pci_channel_state_t state)
  4512. {
  4513. struct net_device *netdev = pci_get_drvdata(pdev);
  4514. struct e1000_adapter *adapter = netdev_priv(netdev);
  4515. netif_device_detach(netdev);
  4516. if (state == pci_channel_io_perm_failure)
  4517. return PCI_ERS_RESULT_DISCONNECT;
  4518. if (netif_running(netdev))
  4519. e1000_down(adapter);
  4520. if (!test_and_set_bit(__E1000_DISABLED, &adapter->flags))
  4521. pci_disable_device(pdev);
  4522. /* Request a slot slot reset. */
  4523. return PCI_ERS_RESULT_NEED_RESET;
  4524. }
  4525. /**
  4526. * e1000_io_slot_reset - called after the pci bus has been reset.
  4527. * @pdev: Pointer to PCI device
  4528. *
  4529. * Restart the card from scratch, as if from a cold-boot. Implementation
  4530. * resembles the first-half of the e1000_resume routine.
  4531. */
  4532. static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
  4533. {
  4534. struct net_device *netdev = pci_get_drvdata(pdev);
  4535. struct e1000_adapter *adapter = netdev_priv(netdev);
  4536. struct e1000_hw *hw = &adapter->hw;
  4537. int err;
  4538. if (adapter->need_ioport)
  4539. err = pci_enable_device(pdev);
  4540. else
  4541. err = pci_enable_device_mem(pdev);
  4542. if (err) {
  4543. pr_err("Cannot re-enable PCI device after reset.\n");
  4544. return PCI_ERS_RESULT_DISCONNECT;
  4545. }
  4546. /* flush memory to make sure state is correct */
  4547. smp_mb__before_atomic();
  4548. clear_bit(__E1000_DISABLED, &adapter->flags);
  4549. pci_set_master(pdev);
  4550. pci_enable_wake(pdev, PCI_D3hot, 0);
  4551. pci_enable_wake(pdev, PCI_D3cold, 0);
  4552. e1000_reset(adapter);
  4553. ew32(WUS, ~0);
  4554. return PCI_ERS_RESULT_RECOVERED;
  4555. }
  4556. /**
  4557. * e1000_io_resume - called when traffic can start flowing again.
  4558. * @pdev: Pointer to PCI device
  4559. *
  4560. * This callback is called when the error recovery driver tells us that
  4561. * its OK to resume normal operation. Implementation resembles the
  4562. * second-half of the e1000_resume routine.
  4563. */
  4564. static void e1000_io_resume(struct pci_dev *pdev)
  4565. {
  4566. struct net_device *netdev = pci_get_drvdata(pdev);
  4567. struct e1000_adapter *adapter = netdev_priv(netdev);
  4568. e1000_init_manageability(adapter);
  4569. if (netif_running(netdev)) {
  4570. if (e1000_up(adapter)) {
  4571. pr_info("can't bring device back up after reset\n");
  4572. return;
  4573. }
  4574. }
  4575. netif_device_attach(netdev);
  4576. }
  4577. /* e1000_main.c */