gxbb-clkc.h 760 B

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  1. /*
  2. * GXBB clock tree IDs
  3. */
  4. #ifndef __GXBB_CLKC_H
  5. #define __GXBB_CLKC_H
  6. #define CLKID_CPUCLK 1
  7. #define CLKID_HDMI_PLL 2
  8. #define CLKID_FCLK_DIV2 4
  9. #define CLKID_FCLK_DIV3 5
  10. #define CLKID_FCLK_DIV4 6
  11. #define CLKID_CLK81 12
  12. #define CLKID_MPLL2 15
  13. #define CLKID_SPI 34
  14. #define CLKID_I2C 22
  15. #define CLKID_SAR_ADC 23
  16. #define CLKID_ETH 36
  17. #define CLKID_USB0 50
  18. #define CLKID_USB1 51
  19. #define CLKID_USB 55
  20. #define CLKID_HDMI_PCLK 63
  21. #define CLKID_USB1_DDR_BRIDGE 64
  22. #define CLKID_USB0_DDR_BRIDGE 65
  23. #define CLKID_SANA 69
  24. #define CLKID_GCLK_VENCI_INT0 77
  25. #define CLKID_AO_I2C 93
  26. #define CLKID_SD_EMMC_A 94
  27. #define CLKID_SD_EMMC_B 95
  28. #define CLKID_SD_EMMC_C 96
  29. #define CLKID_SAR_ADC_CLK 97
  30. #define CLKID_SAR_ADC_SEL 98
  31. #endif /* __GXBB_CLKC_H */