ibmphp_pci.c 55 KB

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  1. /*
  2. * IBM Hot Plug Controller Driver
  3. *
  4. * Written By: Irene Zubarev, IBM Corporation
  5. *
  6. * Copyright (C) 2001 Greg Kroah-Hartman (greg@kroah.com)
  7. * Copyright (C) 2001,2002 IBM Corp.
  8. *
  9. * All rights reserved.
  10. *
  11. * This program is free software; you can redistribute it and/or modify
  12. * it under the terms of the GNU General Public License as published by
  13. * the Free Software Foundation; either version 2 of the License, or (at
  14. * your option) any later version.
  15. *
  16. * This program is distributed in the hope that it will be useful, but
  17. * WITHOUT ANY WARRANTY; without even the implied warranty of
  18. * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
  19. * NON INFRINGEMENT. See the GNU General Public License for more
  20. * details.
  21. *
  22. * You should have received a copy of the GNU General Public License
  23. * along with this program; if not, write to the Free Software
  24. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  25. *
  26. * Send feedback to <gregkh@us.ibm.com>
  27. *
  28. */
  29. #include <linux/module.h>
  30. #include <linux/slab.h>
  31. #include <linux/pci.h>
  32. #include <linux/list.h>
  33. #include "ibmphp.h"
  34. static int configure_device(struct pci_func *);
  35. static int configure_bridge(struct pci_func **, u8);
  36. static struct res_needed *scan_behind_bridge(struct pci_func *, u8);
  37. static int add_new_bus(struct bus_node *, struct resource_node *, struct resource_node *, struct resource_node *, u8);
  38. static u8 find_sec_number(u8 primary_busno, u8 slotno);
  39. /*
  40. * NOTE..... If BIOS doesn't provide default routing, we assign:
  41. * 9 for SCSI, 10 for LAN adapters, and 11 for everything else.
  42. * If adapter is bridged, then we assign 11 to it and devices behind it.
  43. * We also assign the same irq numbers for multi function devices.
  44. * These are PIC mode, so shouldn't matter n.e.ways (hopefully)
  45. */
  46. static void assign_alt_irq(struct pci_func *cur_func, u8 class_code)
  47. {
  48. int j;
  49. for (j = 0; j < 4; j++) {
  50. if (cur_func->irq[j] == 0xff) {
  51. switch (class_code) {
  52. case PCI_BASE_CLASS_STORAGE:
  53. cur_func->irq[j] = SCSI_IRQ;
  54. break;
  55. case PCI_BASE_CLASS_NETWORK:
  56. cur_func->irq[j] = LAN_IRQ;
  57. break;
  58. default:
  59. cur_func->irq[j] = OTHER_IRQ;
  60. break;
  61. }
  62. }
  63. }
  64. }
  65. /*
  66. * Configures the device to be added (will allocate needed resources if it
  67. * can), the device can be a bridge or a regular pci device, can also be
  68. * multi-functional
  69. *
  70. * Input: function to be added
  71. *
  72. * TO DO: The error case with Multifunction device or multi function bridge,
  73. * if there is an error, will need to go through all previous functions and
  74. * unconfigure....or can add some code into unconfigure_card....
  75. */
  76. int ibmphp_configure_card(struct pci_func *func, u8 slotno)
  77. {
  78. u16 vendor_id;
  79. u32 class;
  80. u8 class_code;
  81. u8 hdr_type, device, sec_number;
  82. u8 function;
  83. struct pci_func *newfunc; /* for multi devices */
  84. struct pci_func *cur_func, *prev_func;
  85. int rc, i, j;
  86. int cleanup_count;
  87. u8 flag;
  88. u8 valid_device = 0x00; /* to see if we are able to read from card any device info at all */
  89. debug("inside configure_card, func->busno = %x\n", func->busno);
  90. device = func->device;
  91. cur_func = func;
  92. /* We only get bus and device from IRQ routing table. So at this point,
  93. * func->busno is correct, and func->device contains only device (at the 5
  94. * highest bits)
  95. */
  96. /* For every function on the card */
  97. for (function = 0x00; function < 0x08; function++) {
  98. unsigned int devfn = PCI_DEVFN(device, function);
  99. ibmphp_pci_bus->number = cur_func->busno;
  100. cur_func->function = function;
  101. debug("inside the loop, cur_func->busno = %x, cur_func->device = %x, cur_func->function = %x\n",
  102. cur_func->busno, cur_func->device, cur_func->function);
  103. pci_bus_read_config_word(ibmphp_pci_bus, devfn, PCI_VENDOR_ID, &vendor_id);
  104. debug("vendor_id is %x\n", vendor_id);
  105. if (vendor_id != PCI_VENDOR_ID_NOTVALID) {
  106. /* found correct device!!! */
  107. debug("found valid device, vendor_id = %x\n", vendor_id);
  108. ++valid_device;
  109. /* header: x x x x x x x x
  110. * | |___________|=> 1=PPB bridge, 0=normal device, 2=CardBus Bridge
  111. * |_=> 0 = single function device, 1 = multi-function device
  112. */
  113. pci_bus_read_config_byte(ibmphp_pci_bus, devfn, PCI_HEADER_TYPE, &hdr_type);
  114. pci_bus_read_config_dword(ibmphp_pci_bus, devfn, PCI_CLASS_REVISION, &class);
  115. class_code = class >> 24;
  116. debug("hrd_type = %x, class = %x, class_code %x\n", hdr_type, class, class_code);
  117. class >>= 8; /* to take revision out, class = class.subclass.prog i/f */
  118. if (class == PCI_CLASS_NOT_DEFINED_VGA) {
  119. err("The device %x is VGA compatible and as is not supported for hot plugging. "
  120. "Please choose another device.\n", cur_func->device);
  121. return -ENODEV;
  122. } else if (class == PCI_CLASS_DISPLAY_VGA) {
  123. err("The device %x is not supported for hot plugging. Please choose another device.\n",
  124. cur_func->device);
  125. return -ENODEV;
  126. }
  127. switch (hdr_type) {
  128. case PCI_HEADER_TYPE_NORMAL:
  129. debug("single device case.... vendor id = %x, hdr_type = %x, class = %x\n", vendor_id, hdr_type, class);
  130. assign_alt_irq(cur_func, class_code);
  131. rc = configure_device(cur_func);
  132. if (rc < 0) {
  133. /* We need to do this in case some other BARs were properly inserted */
  134. err("was not able to configure devfunc %x on bus %x.\n",
  135. cur_func->device, cur_func->busno);
  136. cleanup_count = 6;
  137. goto error;
  138. }
  139. cur_func->next = NULL;
  140. function = 0x8;
  141. break;
  142. case PCI_HEADER_TYPE_MULTIDEVICE:
  143. assign_alt_irq(cur_func, class_code);
  144. rc = configure_device(cur_func);
  145. if (rc < 0) {
  146. /* We need to do this in case some other BARs were properly inserted */
  147. err("was not able to configure devfunc %x on bus %x...bailing out\n",
  148. cur_func->device, cur_func->busno);
  149. cleanup_count = 6;
  150. goto error;
  151. }
  152. newfunc = kzalloc(sizeof(*newfunc), GFP_KERNEL);
  153. if (!newfunc)
  154. return -ENOMEM;
  155. newfunc->busno = cur_func->busno;
  156. newfunc->device = device;
  157. cur_func->next = newfunc;
  158. cur_func = newfunc;
  159. for (j = 0; j < 4; j++)
  160. newfunc->irq[j] = cur_func->irq[j];
  161. break;
  162. case PCI_HEADER_TYPE_MULTIBRIDGE:
  163. class >>= 8;
  164. if (class != PCI_CLASS_BRIDGE_PCI) {
  165. err("This %x is not PCI-to-PCI bridge, and as is not supported for hot-plugging. Please insert another card.\n",
  166. cur_func->device);
  167. return -ENODEV;
  168. }
  169. assign_alt_irq(cur_func, class_code);
  170. rc = configure_bridge(&cur_func, slotno);
  171. if (rc == -ENODEV) {
  172. err("You chose to insert Single Bridge, or nested bridges, this is not supported...\n");
  173. err("Bus %x, devfunc %x\n", cur_func->busno, cur_func->device);
  174. return rc;
  175. }
  176. if (rc) {
  177. /* We need to do this in case some other BARs were properly inserted */
  178. err("was not able to hot-add PPB properly.\n");
  179. func->bus = 1; /* To indicate to the unconfigure function that this is a PPB */
  180. cleanup_count = 2;
  181. goto error;
  182. }
  183. pci_bus_read_config_byte(ibmphp_pci_bus, devfn, PCI_SECONDARY_BUS, &sec_number);
  184. flag = 0;
  185. for (i = 0; i < 32; i++) {
  186. if (func->devices[i]) {
  187. newfunc = kzalloc(sizeof(*newfunc), GFP_KERNEL);
  188. if (!newfunc)
  189. return -ENOMEM;
  190. newfunc->busno = sec_number;
  191. newfunc->device = (u8) i;
  192. for (j = 0; j < 4; j++)
  193. newfunc->irq[j] = cur_func->irq[j];
  194. if (flag) {
  195. for (prev_func = cur_func; prev_func->next; prev_func = prev_func->next) ;
  196. prev_func->next = newfunc;
  197. } else
  198. cur_func->next = newfunc;
  199. rc = ibmphp_configure_card(newfunc, slotno);
  200. /* This could only happen if kmalloc failed */
  201. if (rc) {
  202. /* We need to do this in case bridge itself got configured properly, but devices behind it failed */
  203. func->bus = 1; /* To indicate to the unconfigure function that this is a PPB */
  204. cleanup_count = 2;
  205. goto error;
  206. }
  207. flag = 1;
  208. }
  209. }
  210. newfunc = kzalloc(sizeof(*newfunc), GFP_KERNEL);
  211. if (!newfunc)
  212. return -ENOMEM;
  213. newfunc->busno = cur_func->busno;
  214. newfunc->device = device;
  215. for (j = 0; j < 4; j++)
  216. newfunc->irq[j] = cur_func->irq[j];
  217. for (prev_func = cur_func; prev_func->next; prev_func = prev_func->next);
  218. prev_func->next = newfunc;
  219. cur_func = newfunc;
  220. break;
  221. case PCI_HEADER_TYPE_BRIDGE:
  222. class >>= 8;
  223. debug("class now is %x\n", class);
  224. if (class != PCI_CLASS_BRIDGE_PCI) {
  225. err("This %x is not PCI-to-PCI bridge, and as is not supported for hot-plugging. Please insert another card.\n",
  226. cur_func->device);
  227. return -ENODEV;
  228. }
  229. assign_alt_irq(cur_func, class_code);
  230. debug("cur_func->busno b4 configure_bridge is %x\n", cur_func->busno);
  231. rc = configure_bridge(&cur_func, slotno);
  232. if (rc == -ENODEV) {
  233. err("You chose to insert Single Bridge, or nested bridges, this is not supported...\n");
  234. err("Bus %x, devfunc %x\n", cur_func->busno, cur_func->device);
  235. return rc;
  236. }
  237. if (rc) {
  238. /* We need to do this in case some other BARs were properly inserted */
  239. func->bus = 1; /* To indicate to the unconfigure function that this is a PPB */
  240. err("was not able to hot-add PPB properly.\n");
  241. cleanup_count = 2;
  242. goto error;
  243. }
  244. debug("cur_func->busno = %x, device = %x, function = %x\n",
  245. cur_func->busno, device, function);
  246. pci_bus_read_config_byte(ibmphp_pci_bus, devfn, PCI_SECONDARY_BUS, &sec_number);
  247. debug("after configuring bridge..., sec_number = %x\n", sec_number);
  248. flag = 0;
  249. for (i = 0; i < 32; i++) {
  250. if (func->devices[i]) {
  251. debug("inside for loop, device is %x\n", i);
  252. newfunc = kzalloc(sizeof(*newfunc), GFP_KERNEL);
  253. if (!newfunc)
  254. return -ENOMEM;
  255. newfunc->busno = sec_number;
  256. newfunc->device = (u8) i;
  257. for (j = 0; j < 4; j++)
  258. newfunc->irq[j] = cur_func->irq[j];
  259. if (flag) {
  260. for (prev_func = cur_func; prev_func->next; prev_func = prev_func->next);
  261. prev_func->next = newfunc;
  262. } else
  263. cur_func->next = newfunc;
  264. rc = ibmphp_configure_card(newfunc, slotno);
  265. /* Again, this case should not happen... For complete paranoia, will need to call remove_bus */
  266. if (rc) {
  267. /* We need to do this in case some other BARs were properly inserted */
  268. func->bus = 1; /* To indicate to the unconfigure function that this is a PPB */
  269. cleanup_count = 2;
  270. goto error;
  271. }
  272. flag = 1;
  273. }
  274. }
  275. function = 0x8;
  276. break;
  277. default:
  278. err("MAJOR PROBLEM!!!!, header type not supported? %x\n", hdr_type);
  279. return -ENXIO;
  280. break;
  281. } /* end of switch */
  282. } /* end of valid device */
  283. } /* end of for */
  284. if (!valid_device) {
  285. err("Cannot find any valid devices on the card. Or unable to read from card.\n");
  286. return -ENODEV;
  287. }
  288. return 0;
  289. error:
  290. for (i = 0; i < cleanup_count; i++) {
  291. if (cur_func->io[i]) {
  292. ibmphp_remove_resource(cur_func->io[i]);
  293. cur_func->io[i] = NULL;
  294. } else if (cur_func->pfmem[i]) {
  295. ibmphp_remove_resource(cur_func->pfmem[i]);
  296. cur_func->pfmem[i] = NULL;
  297. } else if (cur_func->mem[i]) {
  298. ibmphp_remove_resource(cur_func->mem[i]);
  299. cur_func->mem[i] = NULL;
  300. }
  301. }
  302. return rc;
  303. }
  304. /*
  305. * This function configures the pci BARs of a single device.
  306. * Input: pointer to the pci_func
  307. * Output: configured PCI, 0, or error
  308. */
  309. static int configure_device(struct pci_func *func)
  310. {
  311. u32 bar[6];
  312. u32 address[] = {
  313. PCI_BASE_ADDRESS_0,
  314. PCI_BASE_ADDRESS_1,
  315. PCI_BASE_ADDRESS_2,
  316. PCI_BASE_ADDRESS_3,
  317. PCI_BASE_ADDRESS_4,
  318. PCI_BASE_ADDRESS_5,
  319. 0
  320. };
  321. u8 irq;
  322. int count;
  323. int len[6];
  324. struct resource_node *io[6];
  325. struct resource_node *mem[6];
  326. struct resource_node *mem_tmp;
  327. struct resource_node *pfmem[6];
  328. unsigned int devfn;
  329. debug("%s - inside\n", __func__);
  330. devfn = PCI_DEVFN(func->device, func->function);
  331. ibmphp_pci_bus->number = func->busno;
  332. for (count = 0; address[count]; count++) { /* for 6 BARs */
  333. /* not sure if i need this. per scott, said maybe need * something like this
  334. if devices don't adhere 100% to the spec, so don't want to write
  335. to the reserved bits
  336. pcibios_read_config_byte(cur_func->busno, cur_func->device,
  337. PCI_BASE_ADDRESS_0 + 4 * count, &tmp);
  338. if (tmp & 0x01) // IO
  339. pcibios_write_config_dword(cur_func->busno, cur_func->device,
  340. PCI_BASE_ADDRESS_0 + 4 * count, 0xFFFFFFFD);
  341. else // Memory
  342. pcibios_write_config_dword(cur_func->busno, cur_func->device,
  343. PCI_BASE_ADDRESS_0 + 4 * count, 0xFFFFFFFF);
  344. */
  345. pci_bus_write_config_dword(ibmphp_pci_bus, devfn, address[count], 0xFFFFFFFF);
  346. pci_bus_read_config_dword(ibmphp_pci_bus, devfn, address[count], &bar[count]);
  347. if (!bar[count]) /* This BAR is not implemented */
  348. continue;
  349. debug("Device %x BAR %d wants %x\n", func->device, count, bar[count]);
  350. if (bar[count] & PCI_BASE_ADDRESS_SPACE_IO) {
  351. /* This is IO */
  352. debug("inside IO SPACE\n");
  353. len[count] = bar[count] & 0xFFFFFFFC;
  354. len[count] = ~len[count] + 1;
  355. debug("len[count] in IO %x, count %d\n", len[count], count);
  356. io[count] = kzalloc(sizeof(struct resource_node), GFP_KERNEL);
  357. if (!io[count])
  358. return -ENOMEM;
  359. io[count]->type = IO;
  360. io[count]->busno = func->busno;
  361. io[count]->devfunc = PCI_DEVFN(func->device, func->function);
  362. io[count]->len = len[count];
  363. if (ibmphp_check_resource(io[count], 0) == 0) {
  364. ibmphp_add_resource(io[count]);
  365. func->io[count] = io[count];
  366. } else {
  367. err("cannot allocate requested io for bus %x device %x function %x len %x\n",
  368. func->busno, func->device, func->function, len[count]);
  369. kfree(io[count]);
  370. return -EIO;
  371. }
  372. pci_bus_write_config_dword(ibmphp_pci_bus, devfn, address[count], func->io[count]->start);
  373. /* _______________This is for debugging purposes only_____________________ */
  374. debug("b4 writing, the IO address is %x\n", func->io[count]->start);
  375. pci_bus_read_config_dword(ibmphp_pci_bus, devfn, address[count], &bar[count]);
  376. debug("after writing.... the start address is %x\n", bar[count]);
  377. /* _________________________________________________________________________*/
  378. } else {
  379. /* This is Memory */
  380. if (bar[count] & PCI_BASE_ADDRESS_MEM_PREFETCH) {
  381. /* pfmem */
  382. debug("PFMEM SPACE\n");
  383. len[count] = bar[count] & 0xFFFFFFF0;
  384. len[count] = ~len[count] + 1;
  385. debug("len[count] in PFMEM %x, count %d\n", len[count], count);
  386. pfmem[count] = kzalloc(sizeof(struct resource_node), GFP_KERNEL);
  387. if (!pfmem[count])
  388. return -ENOMEM;
  389. pfmem[count]->type = PFMEM;
  390. pfmem[count]->busno = func->busno;
  391. pfmem[count]->devfunc = PCI_DEVFN(func->device,
  392. func->function);
  393. pfmem[count]->len = len[count];
  394. pfmem[count]->fromMem = 0;
  395. if (ibmphp_check_resource(pfmem[count], 0) == 0) {
  396. ibmphp_add_resource(pfmem[count]);
  397. func->pfmem[count] = pfmem[count];
  398. } else {
  399. mem_tmp = kzalloc(sizeof(*mem_tmp), GFP_KERNEL);
  400. if (!mem_tmp) {
  401. kfree(pfmem[count]);
  402. return -ENOMEM;
  403. }
  404. mem_tmp->type = MEM;
  405. mem_tmp->busno = pfmem[count]->busno;
  406. mem_tmp->devfunc = pfmem[count]->devfunc;
  407. mem_tmp->len = pfmem[count]->len;
  408. debug("there's no pfmem... going into mem.\n");
  409. if (ibmphp_check_resource(mem_tmp, 0) == 0) {
  410. ibmphp_add_resource(mem_tmp);
  411. pfmem[count]->fromMem = 1;
  412. pfmem[count]->rangeno = mem_tmp->rangeno;
  413. pfmem[count]->start = mem_tmp->start;
  414. pfmem[count]->end = mem_tmp->end;
  415. ibmphp_add_pfmem_from_mem(pfmem[count]);
  416. func->pfmem[count] = pfmem[count];
  417. } else {
  418. err("cannot allocate requested pfmem for bus %x, device %x, len %x\n",
  419. func->busno, func->device, len[count]);
  420. kfree(mem_tmp);
  421. kfree(pfmem[count]);
  422. return -EIO;
  423. }
  424. }
  425. pci_bus_write_config_dword(ibmphp_pci_bus, devfn, address[count], func->pfmem[count]->start);
  426. /*_______________This is for debugging purposes only______________________________*/
  427. debug("b4 writing, start address is %x\n", func->pfmem[count]->start);
  428. pci_bus_read_config_dword(ibmphp_pci_bus, devfn, address[count], &bar[count]);
  429. debug("after writing, start address is %x\n", bar[count]);
  430. /*_________________________________________________________________________________*/
  431. if (bar[count] & PCI_BASE_ADDRESS_MEM_TYPE_64) { /* takes up another dword */
  432. debug("inside the mem 64 case, count %d\n", count);
  433. count += 1;
  434. /* on the 2nd dword, write all 0s, since we can't handle them n.e.ways */
  435. pci_bus_write_config_dword(ibmphp_pci_bus, devfn, address[count], 0x00000000);
  436. }
  437. } else {
  438. /* regular memory */
  439. debug("REGULAR MEM SPACE\n");
  440. len[count] = bar[count] & 0xFFFFFFF0;
  441. len[count] = ~len[count] + 1;
  442. debug("len[count] in Mem %x, count %d\n", len[count], count);
  443. mem[count] = kzalloc(sizeof(struct resource_node), GFP_KERNEL);
  444. if (!mem[count])
  445. return -ENOMEM;
  446. mem[count]->type = MEM;
  447. mem[count]->busno = func->busno;
  448. mem[count]->devfunc = PCI_DEVFN(func->device,
  449. func->function);
  450. mem[count]->len = len[count];
  451. if (ibmphp_check_resource(mem[count], 0) == 0) {
  452. ibmphp_add_resource(mem[count]);
  453. func->mem[count] = mem[count];
  454. } else {
  455. err("cannot allocate requested mem for bus %x, device %x, len %x\n",
  456. func->busno, func->device, len[count]);
  457. kfree(mem[count]);
  458. return -EIO;
  459. }
  460. pci_bus_write_config_dword(ibmphp_pci_bus, devfn, address[count], func->mem[count]->start);
  461. /* _______________________This is for debugging purposes only _______________________*/
  462. debug("b4 writing, start address is %x\n", func->mem[count]->start);
  463. pci_bus_read_config_dword(ibmphp_pci_bus, devfn, address[count], &bar[count]);
  464. debug("after writing, the address is %x\n", bar[count]);
  465. /* __________________________________________________________________________________*/
  466. if (bar[count] & PCI_BASE_ADDRESS_MEM_TYPE_64) {
  467. /* takes up another dword */
  468. debug("inside mem 64 case, reg. mem, count %d\n", count);
  469. count += 1;
  470. /* on the 2nd dword, write all 0s, since we can't handle them n.e.ways */
  471. pci_bus_write_config_dword(ibmphp_pci_bus, devfn, address[count], 0x00000000);
  472. }
  473. }
  474. } /* end of mem */
  475. } /* end of for */
  476. func->bus = 0; /* To indicate that this is not a PPB */
  477. pci_bus_read_config_byte(ibmphp_pci_bus, devfn, PCI_INTERRUPT_PIN, &irq);
  478. if ((irq > 0x00) && (irq < 0x05))
  479. pci_bus_write_config_byte(ibmphp_pci_bus, devfn, PCI_INTERRUPT_LINE, func->irq[irq - 1]);
  480. pci_bus_write_config_byte(ibmphp_pci_bus, devfn, PCI_CACHE_LINE_SIZE, CACHE);
  481. pci_bus_write_config_byte(ibmphp_pci_bus, devfn, PCI_LATENCY_TIMER, LATENCY);
  482. pci_bus_write_config_dword(ibmphp_pci_bus, devfn, PCI_ROM_ADDRESS, 0x00L);
  483. pci_bus_write_config_word(ibmphp_pci_bus, devfn, PCI_COMMAND, DEVICEENABLE);
  484. return 0;
  485. }
  486. /******************************************************************************
  487. * This routine configures a PCI-2-PCI bridge and the functions behind it
  488. * Parameters: pci_func
  489. * Returns:
  490. ******************************************************************************/
  491. static int configure_bridge(struct pci_func **func_passed, u8 slotno)
  492. {
  493. int count;
  494. int i;
  495. int rc;
  496. u8 sec_number;
  497. u8 io_base;
  498. u16 pfmem_base;
  499. u32 bar[2];
  500. u32 len[2];
  501. u8 flag_io = 0;
  502. u8 flag_mem = 0;
  503. u8 flag_pfmem = 0;
  504. u8 need_io_upper = 0;
  505. u8 need_pfmem_upper = 0;
  506. struct res_needed *amount_needed = NULL;
  507. struct resource_node *io = NULL;
  508. struct resource_node *bus_io[2] = {NULL, NULL};
  509. struct resource_node *mem = NULL;
  510. struct resource_node *bus_mem[2] = {NULL, NULL};
  511. struct resource_node *mem_tmp = NULL;
  512. struct resource_node *pfmem = NULL;
  513. struct resource_node *bus_pfmem[2] = {NULL, NULL};
  514. struct bus_node *bus;
  515. u32 address[] = {
  516. PCI_BASE_ADDRESS_0,
  517. PCI_BASE_ADDRESS_1,
  518. 0
  519. };
  520. struct pci_func *func = *func_passed;
  521. unsigned int devfn;
  522. u8 irq;
  523. int retval;
  524. debug("%s - enter\n", __func__);
  525. devfn = PCI_DEVFN(func->function, func->device);
  526. ibmphp_pci_bus->number = func->busno;
  527. /* Configuring necessary info for the bridge so that we could see the devices
  528. * behind it
  529. */
  530. pci_bus_write_config_byte(ibmphp_pci_bus, devfn, PCI_PRIMARY_BUS, func->busno);
  531. /* _____________________For debugging purposes only __________________________
  532. pci_bus_config_byte(ibmphp_pci_bus, devfn, PCI_PRIMARY_BUS, &pri_number);
  533. debug("primary # written into the bridge is %x\n", pri_number);
  534. ___________________________________________________________________________*/
  535. /* in EBDA, only get allocated 1 additional bus # per slot */
  536. sec_number = find_sec_number(func->busno, slotno);
  537. if (sec_number == 0xff) {
  538. err("cannot allocate secondary bus number for the bridged device\n");
  539. return -EINVAL;
  540. }
  541. debug("after find_sec_number, the number we got is %x\n", sec_number);
  542. debug("AFTER FIND_SEC_NUMBER, func->busno IS %x\n", func->busno);
  543. pci_bus_write_config_byte(ibmphp_pci_bus, devfn, PCI_SECONDARY_BUS, sec_number);
  544. /* __________________For debugging purposes only __________________________________
  545. pci_bus_read_config_byte(ibmphp_pci_bus, devfn, PCI_SECONDARY_BUS, &sec_number);
  546. debug("sec_number after write/read is %x\n", sec_number);
  547. ________________________________________________________________________________*/
  548. pci_bus_write_config_byte(ibmphp_pci_bus, devfn, PCI_SUBORDINATE_BUS, sec_number);
  549. /* __________________For debugging purposes only ____________________________________
  550. pci_bus_read_config_byte(ibmphp_pci_bus, devfn, PCI_SUBORDINATE_BUS, &sec_number);
  551. debug("subordinate number after write/read is %x\n", sec_number);
  552. __________________________________________________________________________________*/
  553. pci_bus_write_config_byte(ibmphp_pci_bus, devfn, PCI_CACHE_LINE_SIZE, CACHE);
  554. pci_bus_write_config_byte(ibmphp_pci_bus, devfn, PCI_LATENCY_TIMER, LATENCY);
  555. pci_bus_write_config_byte(ibmphp_pci_bus, devfn, PCI_SEC_LATENCY_TIMER, LATENCY);
  556. debug("func->busno is %x\n", func->busno);
  557. debug("sec_number after writing is %x\n", sec_number);
  558. /* !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
  559. !!!!!!!!!!!!!!!NEED TO ADD!!! FAST BACK-TO-BACK ENABLE!!!!!!!!!!!!!!!!!!!!
  560. !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!*/
  561. /* First we need to allocate mem/io for the bridge itself in case it needs it */
  562. for (count = 0; address[count]; count++) { /* for 2 BARs */
  563. pci_bus_write_config_dword(ibmphp_pci_bus, devfn, address[count], 0xFFFFFFFF);
  564. pci_bus_read_config_dword(ibmphp_pci_bus, devfn, address[count], &bar[count]);
  565. if (!bar[count]) {
  566. /* This BAR is not implemented */
  567. debug("so we come here then, eh?, count = %d\n", count);
  568. continue;
  569. }
  570. // tmp_bar = bar[count];
  571. debug("Bar %d wants %x\n", count, bar[count]);
  572. if (bar[count] & PCI_BASE_ADDRESS_SPACE_IO) {
  573. /* This is IO */
  574. len[count] = bar[count] & 0xFFFFFFFC;
  575. len[count] = ~len[count] + 1;
  576. debug("len[count] in IO = %x\n", len[count]);
  577. bus_io[count] = kzalloc(sizeof(struct resource_node), GFP_KERNEL);
  578. if (!bus_io[count]) {
  579. retval = -ENOMEM;
  580. goto error;
  581. }
  582. bus_io[count]->type = IO;
  583. bus_io[count]->busno = func->busno;
  584. bus_io[count]->devfunc = PCI_DEVFN(func->device,
  585. func->function);
  586. bus_io[count]->len = len[count];
  587. if (ibmphp_check_resource(bus_io[count], 0) == 0) {
  588. ibmphp_add_resource(bus_io[count]);
  589. func->io[count] = bus_io[count];
  590. } else {
  591. err("cannot allocate requested io for bus %x, device %x, len %x\n",
  592. func->busno, func->device, len[count]);
  593. kfree(bus_io[count]);
  594. return -EIO;
  595. }
  596. pci_bus_write_config_dword(ibmphp_pci_bus, devfn, address[count], func->io[count]->start);
  597. } else {
  598. /* This is Memory */
  599. if (bar[count] & PCI_BASE_ADDRESS_MEM_PREFETCH) {
  600. /* pfmem */
  601. len[count] = bar[count] & 0xFFFFFFF0;
  602. len[count] = ~len[count] + 1;
  603. debug("len[count] in PFMEM = %x\n", len[count]);
  604. bus_pfmem[count] = kzalloc(sizeof(struct resource_node), GFP_KERNEL);
  605. if (!bus_pfmem[count]) {
  606. retval = -ENOMEM;
  607. goto error;
  608. }
  609. bus_pfmem[count]->type = PFMEM;
  610. bus_pfmem[count]->busno = func->busno;
  611. bus_pfmem[count]->devfunc = PCI_DEVFN(func->device,
  612. func->function);
  613. bus_pfmem[count]->len = len[count];
  614. bus_pfmem[count]->fromMem = 0;
  615. if (ibmphp_check_resource(bus_pfmem[count], 0) == 0) {
  616. ibmphp_add_resource(bus_pfmem[count]);
  617. func->pfmem[count] = bus_pfmem[count];
  618. } else {
  619. mem_tmp = kzalloc(sizeof(*mem_tmp), GFP_KERNEL);
  620. if (!mem_tmp) {
  621. retval = -ENOMEM;
  622. goto error;
  623. }
  624. mem_tmp->type = MEM;
  625. mem_tmp->busno = bus_pfmem[count]->busno;
  626. mem_tmp->devfunc = bus_pfmem[count]->devfunc;
  627. mem_tmp->len = bus_pfmem[count]->len;
  628. if (ibmphp_check_resource(mem_tmp, 0) == 0) {
  629. ibmphp_add_resource(mem_tmp);
  630. bus_pfmem[count]->fromMem = 1;
  631. bus_pfmem[count]->rangeno = mem_tmp->rangeno;
  632. ibmphp_add_pfmem_from_mem(bus_pfmem[count]);
  633. func->pfmem[count] = bus_pfmem[count];
  634. } else {
  635. err("cannot allocate requested pfmem for bus %x, device %x, len %x\n",
  636. func->busno, func->device, len[count]);
  637. kfree(mem_tmp);
  638. kfree(bus_pfmem[count]);
  639. return -EIO;
  640. }
  641. }
  642. pci_bus_write_config_dword(ibmphp_pci_bus, devfn, address[count], func->pfmem[count]->start);
  643. if (bar[count] & PCI_BASE_ADDRESS_MEM_TYPE_64) {
  644. /* takes up another dword */
  645. count += 1;
  646. /* on the 2nd dword, write all 0s, since we can't handle them n.e.ways */
  647. pci_bus_write_config_dword(ibmphp_pci_bus, devfn, address[count], 0x00000000);
  648. }
  649. } else {
  650. /* regular memory */
  651. len[count] = bar[count] & 0xFFFFFFF0;
  652. len[count] = ~len[count] + 1;
  653. debug("len[count] in Memory is %x\n", len[count]);
  654. bus_mem[count] = kzalloc(sizeof(struct resource_node), GFP_KERNEL);
  655. if (!bus_mem[count]) {
  656. retval = -ENOMEM;
  657. goto error;
  658. }
  659. bus_mem[count]->type = MEM;
  660. bus_mem[count]->busno = func->busno;
  661. bus_mem[count]->devfunc = PCI_DEVFN(func->device,
  662. func->function);
  663. bus_mem[count]->len = len[count];
  664. if (ibmphp_check_resource(bus_mem[count], 0) == 0) {
  665. ibmphp_add_resource(bus_mem[count]);
  666. func->mem[count] = bus_mem[count];
  667. } else {
  668. err("cannot allocate requested mem for bus %x, device %x, len %x\n",
  669. func->busno, func->device, len[count]);
  670. kfree(bus_mem[count]);
  671. return -EIO;
  672. }
  673. pci_bus_write_config_dword(ibmphp_pci_bus, devfn, address[count], func->mem[count]->start);
  674. if (bar[count] & PCI_BASE_ADDRESS_MEM_TYPE_64) {
  675. /* takes up another dword */
  676. count += 1;
  677. /* on the 2nd dword, write all 0s, since we can't handle them n.e.ways */
  678. pci_bus_write_config_dword(ibmphp_pci_bus, devfn, address[count], 0x00000000);
  679. }
  680. }
  681. } /* end of mem */
  682. } /* end of for */
  683. /* Now need to see how much space the devices behind the bridge needed */
  684. amount_needed = scan_behind_bridge(func, sec_number);
  685. if (amount_needed == NULL)
  686. return -ENOMEM;
  687. ibmphp_pci_bus->number = func->busno;
  688. debug("after coming back from scan_behind_bridge\n");
  689. debug("amount_needed->not_correct = %x\n", amount_needed->not_correct);
  690. debug("amount_needed->io = %x\n", amount_needed->io);
  691. debug("amount_needed->mem = %x\n", amount_needed->mem);
  692. debug("amount_needed->pfmem = %x\n", amount_needed->pfmem);
  693. if (amount_needed->not_correct) {
  694. debug("amount_needed is not correct\n");
  695. for (count = 0; address[count]; count++) {
  696. /* for 2 BARs */
  697. if (bus_io[count]) {
  698. ibmphp_remove_resource(bus_io[count]);
  699. func->io[count] = NULL;
  700. } else if (bus_pfmem[count]) {
  701. ibmphp_remove_resource(bus_pfmem[count]);
  702. func->pfmem[count] = NULL;
  703. } else if (bus_mem[count]) {
  704. ibmphp_remove_resource(bus_mem[count]);
  705. func->mem[count] = NULL;
  706. }
  707. }
  708. kfree(amount_needed);
  709. return -ENODEV;
  710. }
  711. if (!amount_needed->io) {
  712. debug("it doesn't want IO?\n");
  713. flag_io = 1;
  714. } else {
  715. debug("it wants %x IO behind the bridge\n", amount_needed->io);
  716. io = kzalloc(sizeof(*io), GFP_KERNEL);
  717. if (!io) {
  718. retval = -ENOMEM;
  719. goto error;
  720. }
  721. io->type = IO;
  722. io->busno = func->busno;
  723. io->devfunc = PCI_DEVFN(func->device, func->function);
  724. io->len = amount_needed->io;
  725. if (ibmphp_check_resource(io, 1) == 0) {
  726. debug("were we able to add io\n");
  727. ibmphp_add_resource(io);
  728. flag_io = 1;
  729. }
  730. }
  731. if (!amount_needed->mem) {
  732. debug("it doesn't want n.e.memory?\n");
  733. flag_mem = 1;
  734. } else {
  735. debug("it wants %x memory behind the bridge\n", amount_needed->mem);
  736. mem = kzalloc(sizeof(*mem), GFP_KERNEL);
  737. if (!mem) {
  738. retval = -ENOMEM;
  739. goto error;
  740. }
  741. mem->type = MEM;
  742. mem->busno = func->busno;
  743. mem->devfunc = PCI_DEVFN(func->device, func->function);
  744. mem->len = amount_needed->mem;
  745. if (ibmphp_check_resource(mem, 1) == 0) {
  746. ibmphp_add_resource(mem);
  747. flag_mem = 1;
  748. debug("were we able to add mem\n");
  749. }
  750. }
  751. if (!amount_needed->pfmem) {
  752. debug("it doesn't want n.e.pfmem mem?\n");
  753. flag_pfmem = 1;
  754. } else {
  755. debug("it wants %x pfmemory behind the bridge\n", amount_needed->pfmem);
  756. pfmem = kzalloc(sizeof(*pfmem), GFP_KERNEL);
  757. if (!pfmem) {
  758. retval = -ENOMEM;
  759. goto error;
  760. }
  761. pfmem->type = PFMEM;
  762. pfmem->busno = func->busno;
  763. pfmem->devfunc = PCI_DEVFN(func->device, func->function);
  764. pfmem->len = amount_needed->pfmem;
  765. pfmem->fromMem = 0;
  766. if (ibmphp_check_resource(pfmem, 1) == 0) {
  767. ibmphp_add_resource(pfmem);
  768. flag_pfmem = 1;
  769. } else {
  770. mem_tmp = kzalloc(sizeof(*mem_tmp), GFP_KERNEL);
  771. if (!mem_tmp) {
  772. retval = -ENOMEM;
  773. goto error;
  774. }
  775. mem_tmp->type = MEM;
  776. mem_tmp->busno = pfmem->busno;
  777. mem_tmp->devfunc = pfmem->devfunc;
  778. mem_tmp->len = pfmem->len;
  779. if (ibmphp_check_resource(mem_tmp, 1) == 0) {
  780. ibmphp_add_resource(mem_tmp);
  781. pfmem->fromMem = 1;
  782. pfmem->rangeno = mem_tmp->rangeno;
  783. ibmphp_add_pfmem_from_mem(pfmem);
  784. flag_pfmem = 1;
  785. }
  786. }
  787. }
  788. debug("b4 if (flag_io && flag_mem && flag_pfmem)\n");
  789. debug("flag_io = %x, flag_mem = %x, flag_pfmem = %x\n", flag_io, flag_mem, flag_pfmem);
  790. if (flag_io && flag_mem && flag_pfmem) {
  791. /* If on bootup, there was a bridged card in this slot,
  792. * then card was removed and ibmphp got unloaded and loaded
  793. * back again, there's no way for us to remove the bus
  794. * struct, so no need to kmalloc, can use existing node
  795. */
  796. bus = ibmphp_find_res_bus(sec_number);
  797. if (!bus) {
  798. bus = kzalloc(sizeof(*bus), GFP_KERNEL);
  799. if (!bus) {
  800. retval = -ENOMEM;
  801. goto error;
  802. }
  803. bus->busno = sec_number;
  804. debug("b4 adding new bus\n");
  805. rc = add_new_bus(bus, io, mem, pfmem, func->busno);
  806. } else if (!(bus->rangeIO) && !(bus->rangeMem) && !(bus->rangePFMem))
  807. rc = add_new_bus(bus, io, mem, pfmem, 0xFF);
  808. else {
  809. err("expected bus structure not empty?\n");
  810. retval = -EIO;
  811. goto error;
  812. }
  813. if (rc) {
  814. if (rc == -ENOMEM) {
  815. ibmphp_remove_bus(bus, func->busno);
  816. kfree(amount_needed);
  817. return rc;
  818. }
  819. retval = rc;
  820. goto error;
  821. }
  822. pci_bus_read_config_byte(ibmphp_pci_bus, devfn, PCI_IO_BASE, &io_base);
  823. pci_bus_read_config_word(ibmphp_pci_bus, devfn, PCI_PREF_MEMORY_BASE, &pfmem_base);
  824. if ((io_base & PCI_IO_RANGE_TYPE_MASK) == PCI_IO_RANGE_TYPE_32) {
  825. debug("io 32\n");
  826. need_io_upper = 1;
  827. }
  828. if ((pfmem_base & PCI_PREF_RANGE_TYPE_MASK) == PCI_PREF_RANGE_TYPE_64) {
  829. debug("pfmem 64\n");
  830. need_pfmem_upper = 1;
  831. }
  832. if (bus->noIORanges) {
  833. pci_bus_write_config_byte(ibmphp_pci_bus, devfn, PCI_IO_BASE, 0x00 | bus->rangeIO->start >> 8);
  834. pci_bus_write_config_byte(ibmphp_pci_bus, devfn, PCI_IO_LIMIT, 0x00 | bus->rangeIO->end >> 8);
  835. /* _______________This is for debugging purposes only ____________________
  836. pci_bus_read_config_byte(ibmphp_pci_bus, devfn, PCI_IO_BASE, &temp);
  837. debug("io_base = %x\n", (temp & PCI_IO_RANGE_TYPE_MASK) << 8);
  838. pci_bus_read_config_byte(ibmphp_pci_bus, devfn, PCI_IO_LIMIT, &temp);
  839. debug("io_limit = %x\n", (temp & PCI_IO_RANGE_TYPE_MASK) << 8);
  840. ________________________________________________________________________*/
  841. if (need_io_upper) { /* since can't support n.e.ways */
  842. pci_bus_write_config_word(ibmphp_pci_bus, devfn, PCI_IO_BASE_UPPER16, 0x0000);
  843. pci_bus_write_config_word(ibmphp_pci_bus, devfn, PCI_IO_LIMIT_UPPER16, 0x0000);
  844. }
  845. } else {
  846. pci_bus_write_config_byte(ibmphp_pci_bus, devfn, PCI_IO_BASE, 0x00);
  847. pci_bus_write_config_byte(ibmphp_pci_bus, devfn, PCI_IO_LIMIT, 0x00);
  848. }
  849. if (bus->noMemRanges) {
  850. pci_bus_write_config_word(ibmphp_pci_bus, devfn, PCI_MEMORY_BASE, 0x0000 | bus->rangeMem->start >> 16);
  851. pci_bus_write_config_word(ibmphp_pci_bus, devfn, PCI_MEMORY_LIMIT, 0x0000 | bus->rangeMem->end >> 16);
  852. /* ____________________This is for debugging purposes only ________________________
  853. pci_bus_read_config_word(ibmphp_pci_bus, devfn, PCI_MEMORY_BASE, &temp);
  854. debug("mem_base = %x\n", (temp & PCI_MEMORY_RANGE_TYPE_MASK) << 16);
  855. pci_bus_read_config_word(ibmphp_pci_bus, devfn, PCI_MEMORY_LIMIT, &temp);
  856. debug("mem_limit = %x\n", (temp & PCI_MEMORY_RANGE_TYPE_MASK) << 16);
  857. __________________________________________________________________________________*/
  858. } else {
  859. pci_bus_write_config_word(ibmphp_pci_bus, devfn, PCI_MEMORY_BASE, 0xffff);
  860. pci_bus_write_config_word(ibmphp_pci_bus, devfn, PCI_MEMORY_LIMIT, 0x0000);
  861. }
  862. if (bus->noPFMemRanges) {
  863. pci_bus_write_config_word(ibmphp_pci_bus, devfn, PCI_PREF_MEMORY_BASE, 0x0000 | bus->rangePFMem->start >> 16);
  864. pci_bus_write_config_word(ibmphp_pci_bus, devfn, PCI_PREF_MEMORY_LIMIT, 0x0000 | bus->rangePFMem->end >> 16);
  865. /* __________________________This is for debugging purposes only _______________________
  866. pci_bus_read_config_word(ibmphp_pci_bus, devfn, PCI_PREF_MEMORY_BASE, &temp);
  867. debug("pfmem_base = %x", (temp & PCI_MEMORY_RANGE_TYPE_MASK) << 16);
  868. pci_bus_read_config_word(ibmphp_pci_bus, devfn, PCI_PREF_MEMORY_LIMIT, &temp);
  869. debug("pfmem_limit = %x\n", (temp & PCI_MEMORY_RANGE_TYPE_MASK) << 16);
  870. ______________________________________________________________________________________*/
  871. if (need_pfmem_upper) { /* since can't support n.e.ways */
  872. pci_bus_write_config_dword(ibmphp_pci_bus, devfn, PCI_PREF_BASE_UPPER32, 0x00000000);
  873. pci_bus_write_config_dword(ibmphp_pci_bus, devfn, PCI_PREF_LIMIT_UPPER32, 0x00000000);
  874. }
  875. } else {
  876. pci_bus_write_config_word(ibmphp_pci_bus, devfn, PCI_PREF_MEMORY_BASE, 0xffff);
  877. pci_bus_write_config_word(ibmphp_pci_bus, devfn, PCI_PREF_MEMORY_LIMIT, 0x0000);
  878. }
  879. debug("b4 writing control information\n");
  880. pci_bus_read_config_byte(ibmphp_pci_bus, devfn, PCI_INTERRUPT_PIN, &irq);
  881. if ((irq > 0x00) && (irq < 0x05))
  882. pci_bus_write_config_byte(ibmphp_pci_bus, devfn, PCI_INTERRUPT_LINE, func->irq[irq - 1]);
  883. /*
  884. pci_bus_write_config_byte(ibmphp_pci_bus, devfn, PCI_BRIDGE_CONTROL, ctrl);
  885. pci_bus_write_config_byte(ibmphp_pci_bus, devfn, PCI_BRIDGE_CONTROL, PCI_BRIDGE_CTL_PARITY);
  886. pci_bus_write_config_byte(ibmphp_pci_bus, devfn, PCI_BRIDGE_CONTROL, PCI_BRIDGE_CTL_SERR);
  887. */
  888. pci_bus_write_config_word(ibmphp_pci_bus, devfn, PCI_COMMAND, DEVICEENABLE);
  889. pci_bus_write_config_word(ibmphp_pci_bus, devfn, PCI_BRIDGE_CONTROL, 0x07);
  890. for (i = 0; i < 32; i++) {
  891. if (amount_needed->devices[i]) {
  892. debug("device where devices[i] is 1 = %x\n", i);
  893. func->devices[i] = 1;
  894. }
  895. }
  896. func->bus = 1; /* For unconfiguring, to indicate it's PPB */
  897. func_passed = &func;
  898. debug("func->busno b4 returning is %x\n", func->busno);
  899. debug("func->busno b4 returning in the other structure is %x\n", (*func_passed)->busno);
  900. kfree(amount_needed);
  901. return 0;
  902. } else {
  903. err("Configuring bridge was unsuccessful...\n");
  904. mem_tmp = NULL;
  905. retval = -EIO;
  906. goto error;
  907. }
  908. error:
  909. kfree(amount_needed);
  910. if (pfmem)
  911. ibmphp_remove_resource(pfmem);
  912. if (io)
  913. ibmphp_remove_resource(io);
  914. if (mem)
  915. ibmphp_remove_resource(mem);
  916. for (i = 0; i < 2; i++) { /* for 2 BARs */
  917. if (bus_io[i]) {
  918. ibmphp_remove_resource(bus_io[i]);
  919. func->io[i] = NULL;
  920. } else if (bus_pfmem[i]) {
  921. ibmphp_remove_resource(bus_pfmem[i]);
  922. func->pfmem[i] = NULL;
  923. } else if (bus_mem[i]) {
  924. ibmphp_remove_resource(bus_mem[i]);
  925. func->mem[i] = NULL;
  926. }
  927. }
  928. return retval;
  929. }
  930. /*****************************************************************************
  931. * This function adds up the amount of resources needed behind the PPB bridge
  932. * and passes it to the configure_bridge function
  933. * Input: bridge function
  934. * Output: amount of resources needed
  935. *****************************************************************************/
  936. static struct res_needed *scan_behind_bridge(struct pci_func *func, u8 busno)
  937. {
  938. int count, len[6];
  939. u16 vendor_id;
  940. u8 hdr_type;
  941. u8 device, function;
  942. unsigned int devfn;
  943. int howmany = 0; /*this is to see if there are any devices behind the bridge */
  944. u32 bar[6], class;
  945. u32 address[] = {
  946. PCI_BASE_ADDRESS_0,
  947. PCI_BASE_ADDRESS_1,
  948. PCI_BASE_ADDRESS_2,
  949. PCI_BASE_ADDRESS_3,
  950. PCI_BASE_ADDRESS_4,
  951. PCI_BASE_ADDRESS_5,
  952. 0
  953. };
  954. struct res_needed *amount;
  955. amount = kzalloc(sizeof(*amount), GFP_KERNEL);
  956. if (amount == NULL)
  957. return NULL;
  958. ibmphp_pci_bus->number = busno;
  959. debug("the bus_no behind the bridge is %x\n", busno);
  960. debug("scanning devices behind the bridge...\n");
  961. for (device = 0; device < 32; device++) {
  962. amount->devices[device] = 0;
  963. for (function = 0; function < 8; function++) {
  964. devfn = PCI_DEVFN(device, function);
  965. pci_bus_read_config_word(ibmphp_pci_bus, devfn, PCI_VENDOR_ID, &vendor_id);
  966. if (vendor_id != PCI_VENDOR_ID_NOTVALID) {
  967. /* found correct device!!! */
  968. howmany++;
  969. pci_bus_read_config_byte(ibmphp_pci_bus, devfn, PCI_HEADER_TYPE, &hdr_type);
  970. pci_bus_read_config_dword(ibmphp_pci_bus, devfn, PCI_CLASS_REVISION, &class);
  971. debug("hdr_type behind the bridge is %x\n", hdr_type);
  972. if ((hdr_type & 0x7f) == PCI_HEADER_TYPE_BRIDGE) {
  973. err("embedded bridges not supported for hot-plugging.\n");
  974. amount->not_correct = 1;
  975. return amount;
  976. }
  977. class >>= 8; /* to take revision out, class = class.subclass.prog i/f */
  978. if (class == PCI_CLASS_NOT_DEFINED_VGA) {
  979. err("The device %x is VGA compatible and as is not supported for hot plugging. Please choose another device.\n", device);
  980. amount->not_correct = 1;
  981. return amount;
  982. } else if (class == PCI_CLASS_DISPLAY_VGA) {
  983. err("The device %x is not supported for hot plugging. Please choose another device.\n", device);
  984. amount->not_correct = 1;
  985. return amount;
  986. }
  987. amount->devices[device] = 1;
  988. for (count = 0; address[count]; count++) {
  989. /* for 6 BARs */
  990. /*
  991. pci_bus_read_config_byte(ibmphp_pci_bus, devfn, address[count], &tmp);
  992. if (tmp & 0x01) // IO
  993. pci_bus_write_config_dword(ibmphp_pci_bus, devfn, address[count], 0xFFFFFFFD);
  994. else // MEMORY
  995. pci_bus_write_config_dword(ibmphp_pci_bus, devfn, address[count], 0xFFFFFFFF);
  996. */
  997. pci_bus_write_config_dword(ibmphp_pci_bus, devfn, address[count], 0xFFFFFFFF);
  998. pci_bus_read_config_dword(ibmphp_pci_bus, devfn, address[count], &bar[count]);
  999. debug("what is bar[count]? %x, count = %d\n", bar[count], count);
  1000. if (!bar[count]) /* This BAR is not implemented */
  1001. continue;
  1002. //tmp_bar = bar[count];
  1003. debug("count %d device %x function %x wants %x resources\n", count, device, function, bar[count]);
  1004. if (bar[count] & PCI_BASE_ADDRESS_SPACE_IO) {
  1005. /* This is IO */
  1006. len[count] = bar[count] & 0xFFFFFFFC;
  1007. len[count] = ~len[count] + 1;
  1008. amount->io += len[count];
  1009. } else {
  1010. /* This is Memory */
  1011. if (bar[count] & PCI_BASE_ADDRESS_MEM_PREFETCH) {
  1012. /* pfmem */
  1013. len[count] = bar[count] & 0xFFFFFFF0;
  1014. len[count] = ~len[count] + 1;
  1015. amount->pfmem += len[count];
  1016. if (bar[count] & PCI_BASE_ADDRESS_MEM_TYPE_64)
  1017. /* takes up another dword */
  1018. count += 1;
  1019. } else {
  1020. /* regular memory */
  1021. len[count] = bar[count] & 0xFFFFFFF0;
  1022. len[count] = ~len[count] + 1;
  1023. amount->mem += len[count];
  1024. if (bar[count] & PCI_BASE_ADDRESS_MEM_TYPE_64) {
  1025. /* takes up another dword */
  1026. count += 1;
  1027. }
  1028. }
  1029. }
  1030. } /* end for */
  1031. } /* end if (valid) */
  1032. } /* end for */
  1033. } /* end for */
  1034. if (!howmany)
  1035. amount->not_correct = 1;
  1036. else
  1037. amount->not_correct = 0;
  1038. if ((amount->io) && (amount->io < IOBRIDGE))
  1039. amount->io = IOBRIDGE;
  1040. if ((amount->mem) && (amount->mem < MEMBRIDGE))
  1041. amount->mem = MEMBRIDGE;
  1042. if ((amount->pfmem) && (amount->pfmem < MEMBRIDGE))
  1043. amount->pfmem = MEMBRIDGE;
  1044. return amount;
  1045. }
  1046. /* The following 3 unconfigure_boot_ routines deal with the case when we had the card
  1047. * upon bootup in the system, since we don't allocate func to such case, we need to read
  1048. * the start addresses from pci config space and then find the corresponding entries in
  1049. * our resource lists. The functions return either 0, -ENODEV, or -1 (general failure)
  1050. * Change: we also call these functions even if we configured the card ourselves (i.e., not
  1051. * the bootup case), since it should work same way
  1052. */
  1053. static int unconfigure_boot_device(u8 busno, u8 device, u8 function)
  1054. {
  1055. u32 start_address;
  1056. u32 address[] = {
  1057. PCI_BASE_ADDRESS_0,
  1058. PCI_BASE_ADDRESS_1,
  1059. PCI_BASE_ADDRESS_2,
  1060. PCI_BASE_ADDRESS_3,
  1061. PCI_BASE_ADDRESS_4,
  1062. PCI_BASE_ADDRESS_5,
  1063. 0
  1064. };
  1065. int count;
  1066. struct resource_node *io;
  1067. struct resource_node *mem;
  1068. struct resource_node *pfmem;
  1069. struct bus_node *bus;
  1070. u32 end_address;
  1071. u32 temp_end;
  1072. u32 size;
  1073. u32 tmp_address;
  1074. unsigned int devfn;
  1075. debug("%s - enter\n", __func__);
  1076. bus = ibmphp_find_res_bus(busno);
  1077. if (!bus) {
  1078. debug("cannot find corresponding bus.\n");
  1079. return -EINVAL;
  1080. }
  1081. devfn = PCI_DEVFN(device, function);
  1082. ibmphp_pci_bus->number = busno;
  1083. for (count = 0; address[count]; count++) { /* for 6 BARs */
  1084. pci_bus_read_config_dword(ibmphp_pci_bus, devfn, address[count], &start_address);
  1085. /* We can do this here, b/c by that time the device driver of the card has been stopped */
  1086. pci_bus_write_config_dword(ibmphp_pci_bus, devfn, address[count], 0xFFFFFFFF);
  1087. pci_bus_read_config_dword(ibmphp_pci_bus, devfn, address[count], &size);
  1088. pci_bus_write_config_dword(ibmphp_pci_bus, devfn, address[count], start_address);
  1089. debug("start_address is %x\n", start_address);
  1090. debug("busno, device, function %x %x %x\n", busno, device, function);
  1091. if (!size) {
  1092. /* This BAR is not implemented */
  1093. debug("is this bar no implemented?, count = %d\n", count);
  1094. continue;
  1095. }
  1096. tmp_address = start_address;
  1097. if (start_address & PCI_BASE_ADDRESS_SPACE_IO) {
  1098. /* This is IO */
  1099. start_address &= PCI_BASE_ADDRESS_IO_MASK;
  1100. size = size & 0xFFFFFFFC;
  1101. size = ~size + 1;
  1102. end_address = start_address + size - 1;
  1103. if (ibmphp_find_resource(bus, start_address, &io, IO))
  1104. goto report_search_failure;
  1105. debug("io->start = %x\n", io->start);
  1106. temp_end = io->end;
  1107. start_address = io->end + 1;
  1108. ibmphp_remove_resource(io);
  1109. /* This is needed b/c of the old I/O restrictions in the BIOS */
  1110. while (temp_end < end_address) {
  1111. if (ibmphp_find_resource(bus, start_address,
  1112. &io, IO))
  1113. goto report_search_failure;
  1114. debug("io->start = %x\n", io->start);
  1115. temp_end = io->end;
  1116. start_address = io->end + 1;
  1117. ibmphp_remove_resource(io);
  1118. }
  1119. /* ????????? DO WE NEED TO WRITE ANYTHING INTO THE PCI CONFIG SPACE BACK ?????????? */
  1120. } else {
  1121. /* This is Memory */
  1122. if (start_address & PCI_BASE_ADDRESS_MEM_PREFETCH) {
  1123. /* pfmem */
  1124. debug("start address of pfmem is %x\n", start_address);
  1125. start_address &= PCI_BASE_ADDRESS_MEM_MASK;
  1126. if (ibmphp_find_resource(bus, start_address, &pfmem, PFMEM) < 0) {
  1127. err("cannot find corresponding PFMEM resource to remove\n");
  1128. return -EIO;
  1129. }
  1130. if (pfmem) {
  1131. debug("pfmem->start = %x\n", pfmem->start);
  1132. ibmphp_remove_resource(pfmem);
  1133. }
  1134. } else {
  1135. /* regular memory */
  1136. debug("start address of mem is %x\n", start_address);
  1137. start_address &= PCI_BASE_ADDRESS_MEM_MASK;
  1138. if (ibmphp_find_resource(bus, start_address, &mem, MEM) < 0) {
  1139. err("cannot find corresponding MEM resource to remove\n");
  1140. return -EIO;
  1141. }
  1142. if (mem) {
  1143. debug("mem->start = %x\n", mem->start);
  1144. ibmphp_remove_resource(mem);
  1145. }
  1146. }
  1147. if (tmp_address & PCI_BASE_ADDRESS_MEM_TYPE_64) {
  1148. /* takes up another dword */
  1149. count += 1;
  1150. }
  1151. } /* end of mem */
  1152. } /* end of for */
  1153. return 0;
  1154. report_search_failure:
  1155. err("cannot find corresponding IO resource to remove\n");
  1156. return -EIO;
  1157. }
  1158. static int unconfigure_boot_bridge(u8 busno, u8 device, u8 function)
  1159. {
  1160. int count;
  1161. int bus_no, pri_no, sub_no, sec_no = 0;
  1162. u32 start_address, tmp_address;
  1163. u8 sec_number, sub_number, pri_number;
  1164. struct resource_node *io = NULL;
  1165. struct resource_node *mem = NULL;
  1166. struct resource_node *pfmem = NULL;
  1167. struct bus_node *bus;
  1168. u32 address[] = {
  1169. PCI_BASE_ADDRESS_0,
  1170. PCI_BASE_ADDRESS_1,
  1171. 0
  1172. };
  1173. unsigned int devfn;
  1174. devfn = PCI_DEVFN(device, function);
  1175. ibmphp_pci_bus->number = busno;
  1176. bus_no = (int) busno;
  1177. debug("busno is %x\n", busno);
  1178. pci_bus_read_config_byte(ibmphp_pci_bus, devfn, PCI_PRIMARY_BUS, &pri_number);
  1179. debug("%s - busno = %x, primary_number = %x\n", __func__, busno, pri_number);
  1180. pci_bus_read_config_byte(ibmphp_pci_bus, devfn, PCI_SECONDARY_BUS, &sec_number);
  1181. debug("sec_number is %x\n", sec_number);
  1182. sec_no = (int) sec_number;
  1183. pri_no = (int) pri_number;
  1184. if (pri_no != bus_no) {
  1185. err("primary numbers in our structures and pci config space don't match.\n");
  1186. return -EINVAL;
  1187. }
  1188. pci_bus_read_config_byte(ibmphp_pci_bus, devfn, PCI_SUBORDINATE_BUS, &sub_number);
  1189. sub_no = (int) sub_number;
  1190. debug("sub_no is %d, sec_no is %d\n", sub_no, sec_no);
  1191. if (sec_no != sub_number) {
  1192. err("there're more buses behind this bridge. Hot removal is not supported. Please choose another card\n");
  1193. return -ENODEV;
  1194. }
  1195. bus = ibmphp_find_res_bus(sec_number);
  1196. if (!bus) {
  1197. err("cannot find Bus structure for the bridged device\n");
  1198. return -EINVAL;
  1199. }
  1200. debug("bus->busno is %x\n", bus->busno);
  1201. debug("sec_number is %x\n", sec_number);
  1202. ibmphp_remove_bus(bus, busno);
  1203. for (count = 0; address[count]; count++) {
  1204. /* for 2 BARs */
  1205. pci_bus_read_config_dword(ibmphp_pci_bus, devfn, address[count], &start_address);
  1206. if (!start_address) {
  1207. /* This BAR is not implemented */
  1208. continue;
  1209. }
  1210. tmp_address = start_address;
  1211. if (start_address & PCI_BASE_ADDRESS_SPACE_IO) {
  1212. /* This is IO */
  1213. start_address &= PCI_BASE_ADDRESS_IO_MASK;
  1214. if (ibmphp_find_resource(bus, start_address, &io, IO) < 0) {
  1215. err("cannot find corresponding IO resource to remove\n");
  1216. return -EIO;
  1217. }
  1218. if (io)
  1219. debug("io->start = %x\n", io->start);
  1220. ibmphp_remove_resource(io);
  1221. /* ????????? DO WE NEED TO WRITE ANYTHING INTO THE PCI CONFIG SPACE BACK ?????????? */
  1222. } else {
  1223. /* This is Memory */
  1224. if (start_address & PCI_BASE_ADDRESS_MEM_PREFETCH) {
  1225. /* pfmem */
  1226. start_address &= PCI_BASE_ADDRESS_MEM_MASK;
  1227. if (ibmphp_find_resource(bus, start_address, &pfmem, PFMEM) < 0) {
  1228. err("cannot find corresponding PFMEM resource to remove\n");
  1229. return -EINVAL;
  1230. }
  1231. if (pfmem) {
  1232. debug("pfmem->start = %x\n", pfmem->start);
  1233. ibmphp_remove_resource(pfmem);
  1234. }
  1235. } else {
  1236. /* regular memory */
  1237. start_address &= PCI_BASE_ADDRESS_MEM_MASK;
  1238. if (ibmphp_find_resource(bus, start_address, &mem, MEM) < 0) {
  1239. err("cannot find corresponding MEM resource to remove\n");
  1240. return -EINVAL;
  1241. }
  1242. if (mem) {
  1243. debug("mem->start = %x\n", mem->start);
  1244. ibmphp_remove_resource(mem);
  1245. }
  1246. }
  1247. if (tmp_address & PCI_BASE_ADDRESS_MEM_TYPE_64) {
  1248. /* takes up another dword */
  1249. count += 1;
  1250. }
  1251. } /* end of mem */
  1252. } /* end of for */
  1253. debug("%s - exiting, returning success\n", __func__);
  1254. return 0;
  1255. }
  1256. static int unconfigure_boot_card(struct slot *slot_cur)
  1257. {
  1258. u16 vendor_id;
  1259. u32 class;
  1260. u8 hdr_type;
  1261. u8 device;
  1262. u8 busno;
  1263. u8 function;
  1264. int rc;
  1265. unsigned int devfn;
  1266. u8 valid_device = 0x00; /* To see if we are ever able to find valid device and read it */
  1267. debug("%s - enter\n", __func__);
  1268. device = slot_cur->device;
  1269. busno = slot_cur->bus;
  1270. debug("b4 for loop, device is %x\n", device);
  1271. /* For every function on the card */
  1272. for (function = 0x0; function < 0x08; function++) {
  1273. devfn = PCI_DEVFN(device, function);
  1274. ibmphp_pci_bus->number = busno;
  1275. pci_bus_read_config_word(ibmphp_pci_bus, devfn, PCI_VENDOR_ID, &vendor_id);
  1276. if (vendor_id != PCI_VENDOR_ID_NOTVALID) {
  1277. /* found correct device!!! */
  1278. ++valid_device;
  1279. debug("%s - found correct device\n", __func__);
  1280. /* header: x x x x x x x x
  1281. * | |___________|=> 1=PPB bridge, 0=normal device, 2=CardBus Bridge
  1282. * |_=> 0 = single function device, 1 = multi-function device
  1283. */
  1284. pci_bus_read_config_byte(ibmphp_pci_bus, devfn, PCI_HEADER_TYPE, &hdr_type);
  1285. pci_bus_read_config_dword(ibmphp_pci_bus, devfn, PCI_CLASS_REVISION, &class);
  1286. debug("hdr_type %x, class %x\n", hdr_type, class);
  1287. class >>= 8; /* to take revision out, class = class.subclass.prog i/f */
  1288. if (class == PCI_CLASS_NOT_DEFINED_VGA) {
  1289. err("The device %x function %x is VGA compatible and is not supported for hot removing. Please choose another device.\n", device, function);
  1290. return -ENODEV;
  1291. } else if (class == PCI_CLASS_DISPLAY_VGA) {
  1292. err("The device %x function %x is not supported for hot removing. Please choose another device.\n", device, function);
  1293. return -ENODEV;
  1294. }
  1295. switch (hdr_type) {
  1296. case PCI_HEADER_TYPE_NORMAL:
  1297. rc = unconfigure_boot_device(busno, device, function);
  1298. if (rc) {
  1299. err("was not able to unconfigure device %x func %x on bus %x. bailing out...\n",
  1300. device, function, busno);
  1301. return rc;
  1302. }
  1303. function = 0x8;
  1304. break;
  1305. case PCI_HEADER_TYPE_MULTIDEVICE:
  1306. rc = unconfigure_boot_device(busno, device, function);
  1307. if (rc) {
  1308. err("was not able to unconfigure device %x func %x on bus %x. bailing out...\n",
  1309. device, function, busno);
  1310. return rc;
  1311. }
  1312. break;
  1313. case PCI_HEADER_TYPE_BRIDGE:
  1314. class >>= 8;
  1315. if (class != PCI_CLASS_BRIDGE_PCI) {
  1316. err("This device %x function %x is not PCI-to-PCI bridge, and is not supported for hot-removing. Please try another card.\n", device, function);
  1317. return -ENODEV;
  1318. }
  1319. rc = unconfigure_boot_bridge(busno, device, function);
  1320. if (rc != 0) {
  1321. err("was not able to hot-remove PPB properly.\n");
  1322. return rc;
  1323. }
  1324. function = 0x8;
  1325. break;
  1326. case PCI_HEADER_TYPE_MULTIBRIDGE:
  1327. class >>= 8;
  1328. if (class != PCI_CLASS_BRIDGE_PCI) {
  1329. err("This device %x function %x is not PCI-to-PCI bridge, and is not supported for hot-removing. Please try another card.\n", device, function);
  1330. return -ENODEV;
  1331. }
  1332. rc = unconfigure_boot_bridge(busno, device, function);
  1333. if (rc != 0) {
  1334. err("was not able to hot-remove PPB properly.\n");
  1335. return rc;
  1336. }
  1337. break;
  1338. default:
  1339. err("MAJOR PROBLEM!!!! Cannot read device's header\n");
  1340. return -1;
  1341. break;
  1342. } /* end of switch */
  1343. } /* end of valid device */
  1344. } /* end of for */
  1345. if (!valid_device) {
  1346. err("Could not find device to unconfigure. Or could not read the card.\n");
  1347. return -1;
  1348. }
  1349. return 0;
  1350. }
  1351. /*
  1352. * free the resources of the card (multi, single, or bridged)
  1353. * Parameters: slot, flag to say if this is for removing entire module or just
  1354. * unconfiguring the device
  1355. * TO DO: will probably need to add some code in case there was some resource,
  1356. * to remove it... this is from when we have errors in the configure_card...
  1357. * !!!!!!!!!!!!!!!!!!!!!!!!!FOR BUSES!!!!!!!!!!!!
  1358. * Returns: 0, -1, -ENODEV
  1359. */
  1360. int ibmphp_unconfigure_card(struct slot **slot_cur, int the_end)
  1361. {
  1362. int i;
  1363. int count;
  1364. int rc;
  1365. struct slot *sl = *slot_cur;
  1366. struct pci_func *cur_func = NULL;
  1367. struct pci_func *temp_func;
  1368. debug("%s - enter\n", __func__);
  1369. if (!the_end) {
  1370. /* Need to unconfigure the card */
  1371. rc = unconfigure_boot_card(sl);
  1372. if ((rc == -ENODEV) || (rc == -EIO) || (rc == -EINVAL)) {
  1373. /* In all other cases, will still need to get rid of func structure if it exists */
  1374. return rc;
  1375. }
  1376. }
  1377. if (sl->func) {
  1378. cur_func = sl->func;
  1379. while (cur_func) {
  1380. /* TO DO: WILL MOST LIKELY NEED TO GET RID OF THE BUS STRUCTURE FROM RESOURCES AS WELL */
  1381. if (cur_func->bus) {
  1382. /* in other words, it's a PPB */
  1383. count = 2;
  1384. } else {
  1385. count = 6;
  1386. }
  1387. for (i = 0; i < count; i++) {
  1388. if (cur_func->io[i]) {
  1389. debug("io[%d] exists\n", i);
  1390. if (the_end > 0)
  1391. ibmphp_remove_resource(cur_func->io[i]);
  1392. cur_func->io[i] = NULL;
  1393. }
  1394. if (cur_func->mem[i]) {
  1395. debug("mem[%d] exists\n", i);
  1396. if (the_end > 0)
  1397. ibmphp_remove_resource(cur_func->mem[i]);
  1398. cur_func->mem[i] = NULL;
  1399. }
  1400. if (cur_func->pfmem[i]) {
  1401. debug("pfmem[%d] exists\n", i);
  1402. if (the_end > 0)
  1403. ibmphp_remove_resource(cur_func->pfmem[i]);
  1404. cur_func->pfmem[i] = NULL;
  1405. }
  1406. }
  1407. temp_func = cur_func->next;
  1408. kfree(cur_func);
  1409. cur_func = temp_func;
  1410. }
  1411. }
  1412. sl->func = NULL;
  1413. *slot_cur = sl;
  1414. debug("%s - exit\n", __func__);
  1415. return 0;
  1416. }
  1417. /*
  1418. * add a new bus resulting from hot-plugging a PPB bridge with devices
  1419. *
  1420. * Input: bus and the amount of resources needed (we know we can assign those,
  1421. * since they've been checked already
  1422. * Output: bus added to the correct spot
  1423. * 0, -1, error
  1424. */
  1425. static int add_new_bus(struct bus_node *bus, struct resource_node *io, struct resource_node *mem, struct resource_node *pfmem, u8 parent_busno)
  1426. {
  1427. struct range_node *io_range = NULL;
  1428. struct range_node *mem_range = NULL;
  1429. struct range_node *pfmem_range = NULL;
  1430. struct bus_node *cur_bus = NULL;
  1431. /* Trying to find the parent bus number */
  1432. if (parent_busno != 0xFF) {
  1433. cur_bus = ibmphp_find_res_bus(parent_busno);
  1434. if (!cur_bus) {
  1435. err("strange, cannot find bus which is supposed to be at the system... something is terribly wrong...\n");
  1436. return -ENODEV;
  1437. }
  1438. list_add(&bus->bus_list, &cur_bus->bus_list);
  1439. }
  1440. if (io) {
  1441. io_range = kzalloc(sizeof(*io_range), GFP_KERNEL);
  1442. if (!io_range)
  1443. return -ENOMEM;
  1444. io_range->start = io->start;
  1445. io_range->end = io->end;
  1446. io_range->rangeno = 1;
  1447. bus->noIORanges = 1;
  1448. bus->rangeIO = io_range;
  1449. }
  1450. if (mem) {
  1451. mem_range = kzalloc(sizeof(*mem_range), GFP_KERNEL);
  1452. if (!mem_range)
  1453. return -ENOMEM;
  1454. mem_range->start = mem->start;
  1455. mem_range->end = mem->end;
  1456. mem_range->rangeno = 1;
  1457. bus->noMemRanges = 1;
  1458. bus->rangeMem = mem_range;
  1459. }
  1460. if (pfmem) {
  1461. pfmem_range = kzalloc(sizeof(*pfmem_range), GFP_KERNEL);
  1462. if (!pfmem_range)
  1463. return -ENOMEM;
  1464. pfmem_range->start = pfmem->start;
  1465. pfmem_range->end = pfmem->end;
  1466. pfmem_range->rangeno = 1;
  1467. bus->noPFMemRanges = 1;
  1468. bus->rangePFMem = pfmem_range;
  1469. }
  1470. return 0;
  1471. }
  1472. /*
  1473. * find the 1st available bus number for PPB to set as its secondary bus
  1474. * Parameters: bus_number of the primary bus
  1475. * Returns: bus_number of the secondary bus or 0xff in case of failure
  1476. */
  1477. static u8 find_sec_number(u8 primary_busno, u8 slotno)
  1478. {
  1479. int min, max;
  1480. u8 busno;
  1481. struct bus_info *bus;
  1482. struct bus_node *bus_cur;
  1483. bus = ibmphp_find_same_bus_num(primary_busno);
  1484. if (!bus) {
  1485. err("cannot get slot range of the bus from the BIOS\n");
  1486. return 0xff;
  1487. }
  1488. max = bus->slot_max;
  1489. min = bus->slot_min;
  1490. if ((slotno > max) || (slotno < min)) {
  1491. err("got the wrong range\n");
  1492. return 0xff;
  1493. }
  1494. busno = (u8) (slotno - (u8) min);
  1495. busno += primary_busno + 0x01;
  1496. bus_cur = ibmphp_find_res_bus(busno);
  1497. /* either there is no such bus number, or there are no ranges, which
  1498. * can only happen if we removed the bridged device in previous load
  1499. * of the driver, and now only have the skeleton bus struct
  1500. */
  1501. if ((!bus_cur) || (!(bus_cur->rangeIO) && !(bus_cur->rangeMem) && !(bus_cur->rangePFMem)))
  1502. return busno;
  1503. return 0xff;
  1504. }