qeth_core_main.c 179 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Copyright IBM Corp. 2007, 2009
  4. * Author(s): Utz Bacher <utz.bacher@de.ibm.com>,
  5. * Frank Pavlic <fpavlic@de.ibm.com>,
  6. * Thomas Spatzier <tspat@de.ibm.com>,
  7. * Frank Blaschka <frank.blaschka@de.ibm.com>
  8. */
  9. #define KMSG_COMPONENT "qeth"
  10. #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
  11. #include <linux/module.h>
  12. #include <linux/moduleparam.h>
  13. #include <linux/string.h>
  14. #include <linux/errno.h>
  15. #include <linux/kernel.h>
  16. #include <linux/ip.h>
  17. #include <linux/tcp.h>
  18. #include <linux/mii.h>
  19. #include <linux/kthread.h>
  20. #include <linux/slab.h>
  21. #include <linux/if_vlan.h>
  22. #include <linux/netdevice.h>
  23. #include <linux/netdev_features.h>
  24. #include <linux/skbuff.h>
  25. #include <net/iucv/af_iucv.h>
  26. #include <net/dsfield.h>
  27. #include <asm/ebcdic.h>
  28. #include <asm/chpid.h>
  29. #include <asm/io.h>
  30. #include <asm/sysinfo.h>
  31. #include <asm/compat.h>
  32. #include <asm/diag.h>
  33. #include <asm/cio.h>
  34. #include <asm/ccwdev.h>
  35. #include <asm/cpcmd.h>
  36. #include "qeth_core.h"
  37. struct qeth_dbf_info qeth_dbf[QETH_DBF_INFOS] = {
  38. /* define dbf - Name, Pages, Areas, Maxlen, Level, View, Handle */
  39. /* N P A M L V H */
  40. [QETH_DBF_SETUP] = {"qeth_setup",
  41. 8, 1, 8, 5, &debug_hex_ascii_view, NULL},
  42. [QETH_DBF_MSG] = {"qeth_msg", 8, 1, 11 * sizeof(long), 3,
  43. &debug_sprintf_view, NULL},
  44. [QETH_DBF_CTRL] = {"qeth_control",
  45. 8, 1, QETH_DBF_CTRL_LEN, 5, &debug_hex_ascii_view, NULL},
  46. };
  47. EXPORT_SYMBOL_GPL(qeth_dbf);
  48. struct qeth_card_list_struct qeth_core_card_list;
  49. EXPORT_SYMBOL_GPL(qeth_core_card_list);
  50. struct kmem_cache *qeth_core_header_cache;
  51. EXPORT_SYMBOL_GPL(qeth_core_header_cache);
  52. static struct kmem_cache *qeth_qdio_outbuf_cache;
  53. static struct device *qeth_core_root_dev;
  54. static struct lock_class_key qdio_out_skb_queue_key;
  55. static struct mutex qeth_mod_mutex;
  56. static void qeth_send_control_data_cb(struct qeth_channel *,
  57. struct qeth_cmd_buffer *);
  58. static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *);
  59. static void qeth_setup_ccw(struct qeth_channel *, unsigned char *, __u32);
  60. static void qeth_free_buffer_pool(struct qeth_card *);
  61. static int qeth_qdio_establish(struct qeth_card *);
  62. static void qeth_free_qdio_buffers(struct qeth_card *);
  63. static void qeth_notify_skbs(struct qeth_qdio_out_q *queue,
  64. struct qeth_qdio_out_buffer *buf,
  65. enum iucv_tx_notify notification);
  66. static void qeth_release_skbs(struct qeth_qdio_out_buffer *buf);
  67. static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue,
  68. struct qeth_qdio_out_buffer *buf,
  69. enum qeth_qdio_buffer_states newbufstate);
  70. static int qeth_init_qdio_out_buf(struct qeth_qdio_out_q *, int);
  71. struct workqueue_struct *qeth_wq;
  72. EXPORT_SYMBOL_GPL(qeth_wq);
  73. int qeth_card_hw_is_reachable(struct qeth_card *card)
  74. {
  75. return (card->state == CARD_STATE_SOFTSETUP) ||
  76. (card->state == CARD_STATE_UP);
  77. }
  78. EXPORT_SYMBOL_GPL(qeth_card_hw_is_reachable);
  79. static void qeth_close_dev_handler(struct work_struct *work)
  80. {
  81. struct qeth_card *card;
  82. card = container_of(work, struct qeth_card, close_dev_work);
  83. QETH_CARD_TEXT(card, 2, "cldevhdl");
  84. rtnl_lock();
  85. dev_close(card->dev);
  86. rtnl_unlock();
  87. ccwgroup_set_offline(card->gdev);
  88. }
  89. void qeth_close_dev(struct qeth_card *card)
  90. {
  91. QETH_CARD_TEXT(card, 2, "cldevsubm");
  92. queue_work(qeth_wq, &card->close_dev_work);
  93. }
  94. EXPORT_SYMBOL_GPL(qeth_close_dev);
  95. static const char *qeth_get_cardname(struct qeth_card *card)
  96. {
  97. if (card->info.guestlan) {
  98. switch (card->info.type) {
  99. case QETH_CARD_TYPE_OSD:
  100. return " Virtual NIC QDIO";
  101. case QETH_CARD_TYPE_IQD:
  102. return " Virtual NIC Hiper";
  103. case QETH_CARD_TYPE_OSM:
  104. return " Virtual NIC QDIO - OSM";
  105. case QETH_CARD_TYPE_OSX:
  106. return " Virtual NIC QDIO - OSX";
  107. default:
  108. return " unknown";
  109. }
  110. } else {
  111. switch (card->info.type) {
  112. case QETH_CARD_TYPE_OSD:
  113. return " OSD Express";
  114. case QETH_CARD_TYPE_IQD:
  115. return " HiperSockets";
  116. case QETH_CARD_TYPE_OSN:
  117. return " OSN QDIO";
  118. case QETH_CARD_TYPE_OSM:
  119. return " OSM QDIO";
  120. case QETH_CARD_TYPE_OSX:
  121. return " OSX QDIO";
  122. default:
  123. return " unknown";
  124. }
  125. }
  126. return " n/a";
  127. }
  128. /* max length to be returned: 14 */
  129. const char *qeth_get_cardname_short(struct qeth_card *card)
  130. {
  131. if (card->info.guestlan) {
  132. switch (card->info.type) {
  133. case QETH_CARD_TYPE_OSD:
  134. return "Virt.NIC QDIO";
  135. case QETH_CARD_TYPE_IQD:
  136. return "Virt.NIC Hiper";
  137. case QETH_CARD_TYPE_OSM:
  138. return "Virt.NIC OSM";
  139. case QETH_CARD_TYPE_OSX:
  140. return "Virt.NIC OSX";
  141. default:
  142. return "unknown";
  143. }
  144. } else {
  145. switch (card->info.type) {
  146. case QETH_CARD_TYPE_OSD:
  147. switch (card->info.link_type) {
  148. case QETH_LINK_TYPE_FAST_ETH:
  149. return "OSD_100";
  150. case QETH_LINK_TYPE_HSTR:
  151. return "HSTR";
  152. case QETH_LINK_TYPE_GBIT_ETH:
  153. return "OSD_1000";
  154. case QETH_LINK_TYPE_10GBIT_ETH:
  155. return "OSD_10GIG";
  156. case QETH_LINK_TYPE_LANE_ETH100:
  157. return "OSD_FE_LANE";
  158. case QETH_LINK_TYPE_LANE_TR:
  159. return "OSD_TR_LANE";
  160. case QETH_LINK_TYPE_LANE_ETH1000:
  161. return "OSD_GbE_LANE";
  162. case QETH_LINK_TYPE_LANE:
  163. return "OSD_ATM_LANE";
  164. default:
  165. return "OSD_Express";
  166. }
  167. case QETH_CARD_TYPE_IQD:
  168. return "HiperSockets";
  169. case QETH_CARD_TYPE_OSN:
  170. return "OSN";
  171. case QETH_CARD_TYPE_OSM:
  172. return "OSM_1000";
  173. case QETH_CARD_TYPE_OSX:
  174. return "OSX_10GIG";
  175. default:
  176. return "unknown";
  177. }
  178. }
  179. return "n/a";
  180. }
  181. void qeth_set_recovery_task(struct qeth_card *card)
  182. {
  183. card->recovery_task = current;
  184. }
  185. EXPORT_SYMBOL_GPL(qeth_set_recovery_task);
  186. void qeth_clear_recovery_task(struct qeth_card *card)
  187. {
  188. card->recovery_task = NULL;
  189. }
  190. EXPORT_SYMBOL_GPL(qeth_clear_recovery_task);
  191. static bool qeth_is_recovery_task(const struct qeth_card *card)
  192. {
  193. return card->recovery_task == current;
  194. }
  195. void qeth_set_allowed_threads(struct qeth_card *card, unsigned long threads,
  196. int clear_start_mask)
  197. {
  198. unsigned long flags;
  199. spin_lock_irqsave(&card->thread_mask_lock, flags);
  200. card->thread_allowed_mask = threads;
  201. if (clear_start_mask)
  202. card->thread_start_mask &= threads;
  203. spin_unlock_irqrestore(&card->thread_mask_lock, flags);
  204. wake_up(&card->wait_q);
  205. }
  206. EXPORT_SYMBOL_GPL(qeth_set_allowed_threads);
  207. int qeth_threads_running(struct qeth_card *card, unsigned long threads)
  208. {
  209. unsigned long flags;
  210. int rc = 0;
  211. spin_lock_irqsave(&card->thread_mask_lock, flags);
  212. rc = (card->thread_running_mask & threads);
  213. spin_unlock_irqrestore(&card->thread_mask_lock, flags);
  214. return rc;
  215. }
  216. EXPORT_SYMBOL_GPL(qeth_threads_running);
  217. int qeth_wait_for_threads(struct qeth_card *card, unsigned long threads)
  218. {
  219. if (qeth_is_recovery_task(card))
  220. return 0;
  221. return wait_event_interruptible(card->wait_q,
  222. qeth_threads_running(card, threads) == 0);
  223. }
  224. EXPORT_SYMBOL_GPL(qeth_wait_for_threads);
  225. void qeth_clear_working_pool_list(struct qeth_card *card)
  226. {
  227. struct qeth_buffer_pool_entry *pool_entry, *tmp;
  228. QETH_CARD_TEXT(card, 5, "clwrklst");
  229. list_for_each_entry_safe(pool_entry, tmp,
  230. &card->qdio.in_buf_pool.entry_list, list){
  231. list_del(&pool_entry->list);
  232. }
  233. }
  234. EXPORT_SYMBOL_GPL(qeth_clear_working_pool_list);
  235. static int qeth_alloc_buffer_pool(struct qeth_card *card)
  236. {
  237. struct qeth_buffer_pool_entry *pool_entry;
  238. void *ptr;
  239. int i, j;
  240. QETH_CARD_TEXT(card, 5, "alocpool");
  241. for (i = 0; i < card->qdio.init_pool.buf_count; ++i) {
  242. pool_entry = kzalloc(sizeof(*pool_entry), GFP_KERNEL);
  243. if (!pool_entry) {
  244. qeth_free_buffer_pool(card);
  245. return -ENOMEM;
  246. }
  247. for (j = 0; j < QETH_MAX_BUFFER_ELEMENTS(card); ++j) {
  248. ptr = (void *) __get_free_page(GFP_KERNEL);
  249. if (!ptr) {
  250. while (j > 0)
  251. free_page((unsigned long)
  252. pool_entry->elements[--j]);
  253. kfree(pool_entry);
  254. qeth_free_buffer_pool(card);
  255. return -ENOMEM;
  256. }
  257. pool_entry->elements[j] = ptr;
  258. }
  259. list_add(&pool_entry->init_list,
  260. &card->qdio.init_pool.entry_list);
  261. }
  262. return 0;
  263. }
  264. int qeth_realloc_buffer_pool(struct qeth_card *card, int bufcnt)
  265. {
  266. QETH_CARD_TEXT(card, 2, "realcbp");
  267. if ((card->state != CARD_STATE_DOWN) &&
  268. (card->state != CARD_STATE_RECOVER))
  269. return -EPERM;
  270. /* TODO: steel/add buffers from/to a running card's buffer pool (?) */
  271. qeth_clear_working_pool_list(card);
  272. qeth_free_buffer_pool(card);
  273. card->qdio.in_buf_pool.buf_count = bufcnt;
  274. card->qdio.init_pool.buf_count = bufcnt;
  275. return qeth_alloc_buffer_pool(card);
  276. }
  277. EXPORT_SYMBOL_GPL(qeth_realloc_buffer_pool);
  278. static void qeth_free_qdio_queue(struct qeth_qdio_q *q)
  279. {
  280. if (!q)
  281. return;
  282. qdio_free_buffers(q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q);
  283. kfree(q);
  284. }
  285. static struct qeth_qdio_q *qeth_alloc_qdio_queue(void)
  286. {
  287. struct qeth_qdio_q *q = kzalloc(sizeof(*q), GFP_KERNEL);
  288. int i;
  289. if (!q)
  290. return NULL;
  291. if (qdio_alloc_buffers(q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q)) {
  292. kfree(q);
  293. return NULL;
  294. }
  295. for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i)
  296. q->bufs[i].buffer = q->qdio_bufs[i];
  297. QETH_DBF_HEX(SETUP, 2, &q, sizeof(void *));
  298. return q;
  299. }
  300. static int qeth_cq_init(struct qeth_card *card)
  301. {
  302. int rc;
  303. if (card->options.cq == QETH_CQ_ENABLED) {
  304. QETH_DBF_TEXT(SETUP, 2, "cqinit");
  305. qdio_reset_buffers(card->qdio.c_q->qdio_bufs,
  306. QDIO_MAX_BUFFERS_PER_Q);
  307. card->qdio.c_q->next_buf_to_init = 127;
  308. rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT,
  309. card->qdio.no_in_queues - 1, 0,
  310. 127);
  311. if (rc) {
  312. QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
  313. goto out;
  314. }
  315. }
  316. rc = 0;
  317. out:
  318. return rc;
  319. }
  320. static int qeth_alloc_cq(struct qeth_card *card)
  321. {
  322. int rc;
  323. if (card->options.cq == QETH_CQ_ENABLED) {
  324. int i;
  325. struct qdio_outbuf_state *outbuf_states;
  326. QETH_DBF_TEXT(SETUP, 2, "cqon");
  327. card->qdio.c_q = qeth_alloc_qdio_queue();
  328. if (!card->qdio.c_q) {
  329. rc = -1;
  330. goto kmsg_out;
  331. }
  332. card->qdio.no_in_queues = 2;
  333. card->qdio.out_bufstates =
  334. kzalloc(card->qdio.no_out_queues *
  335. QDIO_MAX_BUFFERS_PER_Q *
  336. sizeof(struct qdio_outbuf_state), GFP_KERNEL);
  337. outbuf_states = card->qdio.out_bufstates;
  338. if (outbuf_states == NULL) {
  339. rc = -1;
  340. goto free_cq_out;
  341. }
  342. for (i = 0; i < card->qdio.no_out_queues; ++i) {
  343. card->qdio.out_qs[i]->bufstates = outbuf_states;
  344. outbuf_states += QDIO_MAX_BUFFERS_PER_Q;
  345. }
  346. } else {
  347. QETH_DBF_TEXT(SETUP, 2, "nocq");
  348. card->qdio.c_q = NULL;
  349. card->qdio.no_in_queues = 1;
  350. }
  351. QETH_DBF_TEXT_(SETUP, 2, "iqc%d", card->qdio.no_in_queues);
  352. rc = 0;
  353. out:
  354. return rc;
  355. free_cq_out:
  356. qeth_free_qdio_queue(card->qdio.c_q);
  357. card->qdio.c_q = NULL;
  358. kmsg_out:
  359. dev_err(&card->gdev->dev, "Failed to create completion queue\n");
  360. goto out;
  361. }
  362. static void qeth_free_cq(struct qeth_card *card)
  363. {
  364. if (card->qdio.c_q) {
  365. --card->qdio.no_in_queues;
  366. qeth_free_qdio_queue(card->qdio.c_q);
  367. card->qdio.c_q = NULL;
  368. }
  369. kfree(card->qdio.out_bufstates);
  370. card->qdio.out_bufstates = NULL;
  371. }
  372. static enum iucv_tx_notify qeth_compute_cq_notification(int sbalf15,
  373. int delayed)
  374. {
  375. enum iucv_tx_notify n;
  376. switch (sbalf15) {
  377. case 0:
  378. n = delayed ? TX_NOTIFY_DELAYED_OK : TX_NOTIFY_OK;
  379. break;
  380. case 4:
  381. case 16:
  382. case 17:
  383. case 18:
  384. n = delayed ? TX_NOTIFY_DELAYED_UNREACHABLE :
  385. TX_NOTIFY_UNREACHABLE;
  386. break;
  387. default:
  388. n = delayed ? TX_NOTIFY_DELAYED_GENERALERROR :
  389. TX_NOTIFY_GENERALERROR;
  390. break;
  391. }
  392. return n;
  393. }
  394. static void qeth_cleanup_handled_pending(struct qeth_qdio_out_q *q, int bidx,
  395. int forced_cleanup)
  396. {
  397. if (q->card->options.cq != QETH_CQ_ENABLED)
  398. return;
  399. if (q->bufs[bidx]->next_pending != NULL) {
  400. struct qeth_qdio_out_buffer *head = q->bufs[bidx];
  401. struct qeth_qdio_out_buffer *c = q->bufs[bidx]->next_pending;
  402. while (c) {
  403. if (forced_cleanup ||
  404. atomic_read(&c->state) ==
  405. QETH_QDIO_BUF_HANDLED_DELAYED) {
  406. struct qeth_qdio_out_buffer *f = c;
  407. QETH_CARD_TEXT(f->q->card, 5, "fp");
  408. QETH_CARD_TEXT_(f->q->card, 5, "%lx", (long) f);
  409. /* release here to avoid interleaving between
  410. outbound tasklet and inbound tasklet
  411. regarding notifications and lifecycle */
  412. qeth_release_skbs(c);
  413. c = f->next_pending;
  414. WARN_ON_ONCE(head->next_pending != f);
  415. head->next_pending = c;
  416. kmem_cache_free(qeth_qdio_outbuf_cache, f);
  417. } else {
  418. head = c;
  419. c = c->next_pending;
  420. }
  421. }
  422. }
  423. if (forced_cleanup && (atomic_read(&(q->bufs[bidx]->state)) ==
  424. QETH_QDIO_BUF_HANDLED_DELAYED)) {
  425. /* for recovery situations */
  426. q->bufs[bidx]->aob = q->bufstates[bidx].aob;
  427. qeth_init_qdio_out_buf(q, bidx);
  428. QETH_CARD_TEXT(q->card, 2, "clprecov");
  429. }
  430. }
  431. static void qeth_qdio_handle_aob(struct qeth_card *card,
  432. unsigned long phys_aob_addr)
  433. {
  434. struct qaob *aob;
  435. struct qeth_qdio_out_buffer *buffer;
  436. enum iucv_tx_notify notification;
  437. aob = (struct qaob *) phys_to_virt(phys_aob_addr);
  438. QETH_CARD_TEXT(card, 5, "haob");
  439. QETH_CARD_TEXT_(card, 5, "%lx", phys_aob_addr);
  440. buffer = (struct qeth_qdio_out_buffer *) aob->user1;
  441. QETH_CARD_TEXT_(card, 5, "%lx", aob->user1);
  442. if (atomic_cmpxchg(&buffer->state, QETH_QDIO_BUF_PRIMED,
  443. QETH_QDIO_BUF_IN_CQ) == QETH_QDIO_BUF_PRIMED) {
  444. notification = TX_NOTIFY_OK;
  445. } else {
  446. WARN_ON_ONCE(atomic_read(&buffer->state) !=
  447. QETH_QDIO_BUF_PENDING);
  448. atomic_set(&buffer->state, QETH_QDIO_BUF_IN_CQ);
  449. notification = TX_NOTIFY_DELAYED_OK;
  450. }
  451. if (aob->aorc != 0) {
  452. QETH_CARD_TEXT_(card, 2, "aorc%02X", aob->aorc);
  453. notification = qeth_compute_cq_notification(aob->aorc, 1);
  454. }
  455. qeth_notify_skbs(buffer->q, buffer, notification);
  456. buffer->aob = NULL;
  457. qeth_clear_output_buffer(buffer->q, buffer,
  458. QETH_QDIO_BUF_HANDLED_DELAYED);
  459. /* from here on: do not touch buffer anymore */
  460. qdio_release_aob(aob);
  461. }
  462. static inline int qeth_is_cq(struct qeth_card *card, unsigned int queue)
  463. {
  464. return card->options.cq == QETH_CQ_ENABLED &&
  465. card->qdio.c_q != NULL &&
  466. queue != 0 &&
  467. queue == card->qdio.no_in_queues - 1;
  468. }
  469. static int __qeth_issue_next_read(struct qeth_card *card)
  470. {
  471. int rc;
  472. struct qeth_cmd_buffer *iob;
  473. QETH_CARD_TEXT(card, 5, "issnxrd");
  474. if (card->read.state != CH_STATE_UP)
  475. return -EIO;
  476. iob = qeth_get_buffer(&card->read);
  477. if (!iob) {
  478. dev_warn(&card->gdev->dev, "The qeth device driver "
  479. "failed to recover an error on the device\n");
  480. QETH_DBF_MESSAGE(2, "%s issue_next_read failed: no iob "
  481. "available\n", dev_name(&card->gdev->dev));
  482. return -ENOMEM;
  483. }
  484. qeth_setup_ccw(&card->read, iob->data, QETH_BUFSIZE);
  485. QETH_CARD_TEXT(card, 6, "noirqpnd");
  486. rc = ccw_device_start(card->read.ccwdev, &card->read.ccw,
  487. (addr_t) iob, 0, 0);
  488. if (rc) {
  489. QETH_DBF_MESSAGE(2, "%s error in starting next read ccw! "
  490. "rc=%i\n", dev_name(&card->gdev->dev), rc);
  491. atomic_set(&card->read.irq_pending, 0);
  492. card->read_or_write_problem = 1;
  493. qeth_schedule_recovery(card);
  494. wake_up(&card->wait_q);
  495. }
  496. return rc;
  497. }
  498. static int qeth_issue_next_read(struct qeth_card *card)
  499. {
  500. int ret;
  501. spin_lock_irq(get_ccwdev_lock(CARD_RDEV(card)));
  502. ret = __qeth_issue_next_read(card);
  503. spin_unlock_irq(get_ccwdev_lock(CARD_RDEV(card)));
  504. return ret;
  505. }
  506. static struct qeth_reply *qeth_alloc_reply(struct qeth_card *card)
  507. {
  508. struct qeth_reply *reply;
  509. reply = kzalloc(sizeof(struct qeth_reply), GFP_ATOMIC);
  510. if (reply) {
  511. refcount_set(&reply->refcnt, 1);
  512. atomic_set(&reply->received, 0);
  513. reply->card = card;
  514. }
  515. return reply;
  516. }
  517. static void qeth_get_reply(struct qeth_reply *reply)
  518. {
  519. refcount_inc(&reply->refcnt);
  520. }
  521. static void qeth_put_reply(struct qeth_reply *reply)
  522. {
  523. if (refcount_dec_and_test(&reply->refcnt))
  524. kfree(reply);
  525. }
  526. static void qeth_issue_ipa_msg(struct qeth_ipa_cmd *cmd, int rc,
  527. struct qeth_card *card)
  528. {
  529. char *ipa_name;
  530. int com = cmd->hdr.command;
  531. ipa_name = qeth_get_ipa_cmd_name(com);
  532. if (rc)
  533. QETH_DBF_MESSAGE(2, "IPA: %s(x%X) for %s/%s returned "
  534. "x%X \"%s\"\n",
  535. ipa_name, com, dev_name(&card->gdev->dev),
  536. QETH_CARD_IFNAME(card), rc,
  537. qeth_get_ipa_msg(rc));
  538. else
  539. QETH_DBF_MESSAGE(5, "IPA: %s(x%X) for %s/%s succeeded\n",
  540. ipa_name, com, dev_name(&card->gdev->dev),
  541. QETH_CARD_IFNAME(card));
  542. }
  543. static struct qeth_ipa_cmd *qeth_check_ipa_data(struct qeth_card *card,
  544. struct qeth_cmd_buffer *iob)
  545. {
  546. struct qeth_ipa_cmd *cmd = NULL;
  547. QETH_CARD_TEXT(card, 5, "chkipad");
  548. if (IS_IPA(iob->data)) {
  549. cmd = (struct qeth_ipa_cmd *) PDU_ENCAPSULATION(iob->data);
  550. if (IS_IPA_REPLY(cmd)) {
  551. if (cmd->hdr.command != IPA_CMD_SETCCID &&
  552. cmd->hdr.command != IPA_CMD_DELCCID &&
  553. cmd->hdr.command != IPA_CMD_MODCCID &&
  554. cmd->hdr.command != IPA_CMD_SET_DIAG_ASS)
  555. qeth_issue_ipa_msg(cmd,
  556. cmd->hdr.return_code, card);
  557. return cmd;
  558. } else {
  559. switch (cmd->hdr.command) {
  560. case IPA_CMD_STOPLAN:
  561. if (cmd->hdr.return_code ==
  562. IPA_RC_VEPA_TO_VEB_TRANSITION) {
  563. dev_err(&card->gdev->dev,
  564. "Interface %s is down because the "
  565. "adjacent port is no longer in "
  566. "reflective relay mode\n",
  567. QETH_CARD_IFNAME(card));
  568. qeth_close_dev(card);
  569. } else {
  570. dev_warn(&card->gdev->dev,
  571. "The link for interface %s on CHPID"
  572. " 0x%X failed\n",
  573. QETH_CARD_IFNAME(card),
  574. card->info.chpid);
  575. qeth_issue_ipa_msg(cmd,
  576. cmd->hdr.return_code, card);
  577. }
  578. card->lan_online = 0;
  579. if (card->dev && netif_carrier_ok(card->dev))
  580. netif_carrier_off(card->dev);
  581. return NULL;
  582. case IPA_CMD_STARTLAN:
  583. dev_info(&card->gdev->dev,
  584. "The link for %s on CHPID 0x%X has"
  585. " been restored\n",
  586. QETH_CARD_IFNAME(card),
  587. card->info.chpid);
  588. netif_carrier_on(card->dev);
  589. card->lan_online = 1;
  590. if (card->info.hwtrap)
  591. card->info.hwtrap = 2;
  592. qeth_schedule_recovery(card);
  593. return NULL;
  594. case IPA_CMD_SETBRIDGEPORT_IQD:
  595. case IPA_CMD_SETBRIDGEPORT_OSA:
  596. case IPA_CMD_ADDRESS_CHANGE_NOTIF:
  597. if (card->discipline->control_event_handler
  598. (card, cmd))
  599. return cmd;
  600. else
  601. return NULL;
  602. case IPA_CMD_MODCCID:
  603. return cmd;
  604. case IPA_CMD_REGISTER_LOCAL_ADDR:
  605. QETH_CARD_TEXT(card, 3, "irla");
  606. break;
  607. case IPA_CMD_UNREGISTER_LOCAL_ADDR:
  608. QETH_CARD_TEXT(card, 3, "urla");
  609. break;
  610. default:
  611. QETH_DBF_MESSAGE(2, "Received data is IPA "
  612. "but not a reply!\n");
  613. break;
  614. }
  615. }
  616. }
  617. return cmd;
  618. }
  619. void qeth_clear_ipacmd_list(struct qeth_card *card)
  620. {
  621. struct qeth_reply *reply, *r;
  622. unsigned long flags;
  623. QETH_CARD_TEXT(card, 4, "clipalst");
  624. spin_lock_irqsave(&card->lock, flags);
  625. list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
  626. qeth_get_reply(reply);
  627. reply->rc = -EIO;
  628. atomic_inc(&reply->received);
  629. list_del_init(&reply->list);
  630. wake_up(&reply->wait_q);
  631. qeth_put_reply(reply);
  632. }
  633. spin_unlock_irqrestore(&card->lock, flags);
  634. }
  635. EXPORT_SYMBOL_GPL(qeth_clear_ipacmd_list);
  636. static int qeth_check_idx_response(struct qeth_card *card,
  637. unsigned char *buffer)
  638. {
  639. if (!buffer)
  640. return 0;
  641. QETH_DBF_HEX(CTRL, 2, buffer, QETH_DBF_CTRL_LEN);
  642. if ((buffer[2] & 0xc0) == 0xc0) {
  643. QETH_DBF_MESSAGE(2, "received an IDX TERMINATE with cause code %#02x\n",
  644. buffer[4]);
  645. QETH_CARD_TEXT(card, 2, "ckidxres");
  646. QETH_CARD_TEXT(card, 2, " idxterm");
  647. QETH_CARD_TEXT_(card, 2, " rc%d", -EIO);
  648. if (buffer[4] == 0xf6) {
  649. dev_err(&card->gdev->dev,
  650. "The qeth device is not configured "
  651. "for the OSI layer required by z/VM\n");
  652. return -EPERM;
  653. }
  654. return -EIO;
  655. }
  656. return 0;
  657. }
  658. static struct qeth_card *CARD_FROM_CDEV(struct ccw_device *cdev)
  659. {
  660. struct qeth_card *card = dev_get_drvdata(&((struct ccwgroup_device *)
  661. dev_get_drvdata(&cdev->dev))->dev);
  662. return card;
  663. }
  664. static void qeth_setup_ccw(struct qeth_channel *channel, unsigned char *iob,
  665. __u32 len)
  666. {
  667. struct qeth_card *card;
  668. card = CARD_FROM_CDEV(channel->ccwdev);
  669. QETH_CARD_TEXT(card, 4, "setupccw");
  670. if (channel == &card->read)
  671. memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1));
  672. else
  673. memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1));
  674. channel->ccw.count = len;
  675. channel->ccw.cda = (__u32) __pa(iob);
  676. }
  677. static struct qeth_cmd_buffer *__qeth_get_buffer(struct qeth_channel *channel)
  678. {
  679. __u8 index;
  680. QETH_CARD_TEXT(CARD_FROM_CDEV(channel->ccwdev), 6, "getbuff");
  681. index = channel->io_buf_no;
  682. do {
  683. if (channel->iob[index].state == BUF_STATE_FREE) {
  684. channel->iob[index].state = BUF_STATE_LOCKED;
  685. channel->io_buf_no = (channel->io_buf_no + 1) %
  686. QETH_CMD_BUFFER_NO;
  687. memset(channel->iob[index].data, 0, QETH_BUFSIZE);
  688. return channel->iob + index;
  689. }
  690. index = (index + 1) % QETH_CMD_BUFFER_NO;
  691. } while (index != channel->io_buf_no);
  692. return NULL;
  693. }
  694. void qeth_release_buffer(struct qeth_channel *channel,
  695. struct qeth_cmd_buffer *iob)
  696. {
  697. unsigned long flags;
  698. QETH_CARD_TEXT(CARD_FROM_CDEV(channel->ccwdev), 6, "relbuff");
  699. spin_lock_irqsave(&channel->iob_lock, flags);
  700. memset(iob->data, 0, QETH_BUFSIZE);
  701. iob->state = BUF_STATE_FREE;
  702. iob->callback = qeth_send_control_data_cb;
  703. iob->rc = 0;
  704. spin_unlock_irqrestore(&channel->iob_lock, flags);
  705. wake_up(&channel->wait_q);
  706. }
  707. EXPORT_SYMBOL_GPL(qeth_release_buffer);
  708. static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *channel)
  709. {
  710. struct qeth_cmd_buffer *buffer = NULL;
  711. unsigned long flags;
  712. spin_lock_irqsave(&channel->iob_lock, flags);
  713. buffer = __qeth_get_buffer(channel);
  714. spin_unlock_irqrestore(&channel->iob_lock, flags);
  715. return buffer;
  716. }
  717. struct qeth_cmd_buffer *qeth_wait_for_buffer(struct qeth_channel *channel)
  718. {
  719. struct qeth_cmd_buffer *buffer;
  720. wait_event(channel->wait_q,
  721. ((buffer = qeth_get_buffer(channel)) != NULL));
  722. return buffer;
  723. }
  724. EXPORT_SYMBOL_GPL(qeth_wait_for_buffer);
  725. void qeth_clear_cmd_buffers(struct qeth_channel *channel)
  726. {
  727. int cnt;
  728. for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
  729. qeth_release_buffer(channel, &channel->iob[cnt]);
  730. channel->io_buf_no = 0;
  731. }
  732. EXPORT_SYMBOL_GPL(qeth_clear_cmd_buffers);
  733. static void qeth_send_control_data_cb(struct qeth_channel *channel,
  734. struct qeth_cmd_buffer *iob)
  735. {
  736. struct qeth_card *card;
  737. struct qeth_reply *reply, *r;
  738. struct qeth_ipa_cmd *cmd;
  739. unsigned long flags;
  740. int keep_reply;
  741. int rc = 0;
  742. card = CARD_FROM_CDEV(channel->ccwdev);
  743. QETH_CARD_TEXT(card, 4, "sndctlcb");
  744. rc = qeth_check_idx_response(card, iob->data);
  745. switch (rc) {
  746. case 0:
  747. break;
  748. case -EIO:
  749. qeth_clear_ipacmd_list(card);
  750. qeth_schedule_recovery(card);
  751. /* fall through */
  752. default:
  753. goto out;
  754. }
  755. cmd = qeth_check_ipa_data(card, iob);
  756. if ((cmd == NULL) && (card->state != CARD_STATE_DOWN))
  757. goto out;
  758. /*in case of OSN : check if cmd is set */
  759. if (card->info.type == QETH_CARD_TYPE_OSN &&
  760. cmd &&
  761. cmd->hdr.command != IPA_CMD_STARTLAN &&
  762. card->osn_info.assist_cb != NULL) {
  763. card->osn_info.assist_cb(card->dev, cmd);
  764. goto out;
  765. }
  766. spin_lock_irqsave(&card->lock, flags);
  767. list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
  768. if ((reply->seqno == QETH_IDX_COMMAND_SEQNO) ||
  769. ((cmd) && (reply->seqno == cmd->hdr.seqno))) {
  770. qeth_get_reply(reply);
  771. list_del_init(&reply->list);
  772. spin_unlock_irqrestore(&card->lock, flags);
  773. keep_reply = 0;
  774. if (reply->callback != NULL) {
  775. if (cmd) {
  776. reply->offset = (__u16)((char *)cmd -
  777. (char *)iob->data);
  778. keep_reply = reply->callback(card,
  779. reply,
  780. (unsigned long)cmd);
  781. } else
  782. keep_reply = reply->callback(card,
  783. reply,
  784. (unsigned long)iob);
  785. }
  786. if (cmd)
  787. reply->rc = (u16) cmd->hdr.return_code;
  788. else if (iob->rc)
  789. reply->rc = iob->rc;
  790. if (keep_reply) {
  791. spin_lock_irqsave(&card->lock, flags);
  792. list_add_tail(&reply->list,
  793. &card->cmd_waiter_list);
  794. spin_unlock_irqrestore(&card->lock, flags);
  795. } else {
  796. atomic_inc(&reply->received);
  797. wake_up(&reply->wait_q);
  798. }
  799. qeth_put_reply(reply);
  800. goto out;
  801. }
  802. }
  803. spin_unlock_irqrestore(&card->lock, flags);
  804. out:
  805. memcpy(&card->seqno.pdu_hdr_ack,
  806. QETH_PDU_HEADER_SEQ_NO(iob->data),
  807. QETH_SEQ_NO_LENGTH);
  808. qeth_release_buffer(channel, iob);
  809. }
  810. static int qeth_setup_channel(struct qeth_channel *channel)
  811. {
  812. int cnt;
  813. QETH_DBF_TEXT(SETUP, 2, "setupch");
  814. for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++) {
  815. channel->iob[cnt].data =
  816. kzalloc(QETH_BUFSIZE, GFP_DMA|GFP_KERNEL);
  817. if (channel->iob[cnt].data == NULL)
  818. break;
  819. channel->iob[cnt].state = BUF_STATE_FREE;
  820. channel->iob[cnt].channel = channel;
  821. channel->iob[cnt].callback = qeth_send_control_data_cb;
  822. channel->iob[cnt].rc = 0;
  823. }
  824. if (cnt < QETH_CMD_BUFFER_NO) {
  825. while (cnt-- > 0)
  826. kfree(channel->iob[cnt].data);
  827. return -ENOMEM;
  828. }
  829. channel->io_buf_no = 0;
  830. atomic_set(&channel->irq_pending, 0);
  831. spin_lock_init(&channel->iob_lock);
  832. init_waitqueue_head(&channel->wait_q);
  833. return 0;
  834. }
  835. static int qeth_set_thread_start_bit(struct qeth_card *card,
  836. unsigned long thread)
  837. {
  838. unsigned long flags;
  839. spin_lock_irqsave(&card->thread_mask_lock, flags);
  840. if (!(card->thread_allowed_mask & thread) ||
  841. (card->thread_start_mask & thread)) {
  842. spin_unlock_irqrestore(&card->thread_mask_lock, flags);
  843. return -EPERM;
  844. }
  845. card->thread_start_mask |= thread;
  846. spin_unlock_irqrestore(&card->thread_mask_lock, flags);
  847. return 0;
  848. }
  849. void qeth_clear_thread_start_bit(struct qeth_card *card, unsigned long thread)
  850. {
  851. unsigned long flags;
  852. spin_lock_irqsave(&card->thread_mask_lock, flags);
  853. card->thread_start_mask &= ~thread;
  854. spin_unlock_irqrestore(&card->thread_mask_lock, flags);
  855. wake_up(&card->wait_q);
  856. }
  857. EXPORT_SYMBOL_GPL(qeth_clear_thread_start_bit);
  858. void qeth_clear_thread_running_bit(struct qeth_card *card, unsigned long thread)
  859. {
  860. unsigned long flags;
  861. spin_lock_irqsave(&card->thread_mask_lock, flags);
  862. card->thread_running_mask &= ~thread;
  863. spin_unlock_irqrestore(&card->thread_mask_lock, flags);
  864. wake_up_all(&card->wait_q);
  865. }
  866. EXPORT_SYMBOL_GPL(qeth_clear_thread_running_bit);
  867. static int __qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
  868. {
  869. unsigned long flags;
  870. int rc = 0;
  871. spin_lock_irqsave(&card->thread_mask_lock, flags);
  872. if (card->thread_start_mask & thread) {
  873. if ((card->thread_allowed_mask & thread) &&
  874. !(card->thread_running_mask & thread)) {
  875. rc = 1;
  876. card->thread_start_mask &= ~thread;
  877. card->thread_running_mask |= thread;
  878. } else
  879. rc = -EPERM;
  880. }
  881. spin_unlock_irqrestore(&card->thread_mask_lock, flags);
  882. return rc;
  883. }
  884. int qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
  885. {
  886. int rc = 0;
  887. wait_event(card->wait_q,
  888. (rc = __qeth_do_run_thread(card, thread)) >= 0);
  889. return rc;
  890. }
  891. EXPORT_SYMBOL_GPL(qeth_do_run_thread);
  892. void qeth_schedule_recovery(struct qeth_card *card)
  893. {
  894. QETH_CARD_TEXT(card, 2, "startrec");
  895. if (qeth_set_thread_start_bit(card, QETH_RECOVER_THREAD) == 0)
  896. schedule_work(&card->kernel_thread_starter);
  897. }
  898. EXPORT_SYMBOL_GPL(qeth_schedule_recovery);
  899. static int qeth_get_problem(struct ccw_device *cdev, struct irb *irb)
  900. {
  901. int dstat, cstat;
  902. char *sense;
  903. struct qeth_card *card;
  904. sense = (char *) irb->ecw;
  905. cstat = irb->scsw.cmd.cstat;
  906. dstat = irb->scsw.cmd.dstat;
  907. card = CARD_FROM_CDEV(cdev);
  908. if (cstat & (SCHN_STAT_CHN_CTRL_CHK | SCHN_STAT_INTF_CTRL_CHK |
  909. SCHN_STAT_CHN_DATA_CHK | SCHN_STAT_CHAIN_CHECK |
  910. SCHN_STAT_PROT_CHECK | SCHN_STAT_PROG_CHECK)) {
  911. QETH_CARD_TEXT(card, 2, "CGENCHK");
  912. dev_warn(&cdev->dev, "The qeth device driver "
  913. "failed to recover an error on the device\n");
  914. QETH_DBF_MESSAGE(2, "%s check on device dstat=x%x, cstat=x%x\n",
  915. dev_name(&cdev->dev), dstat, cstat);
  916. print_hex_dump(KERN_WARNING, "qeth: irb ", DUMP_PREFIX_OFFSET,
  917. 16, 1, irb, 64, 1);
  918. return 1;
  919. }
  920. if (dstat & DEV_STAT_UNIT_CHECK) {
  921. if (sense[SENSE_RESETTING_EVENT_BYTE] &
  922. SENSE_RESETTING_EVENT_FLAG) {
  923. QETH_CARD_TEXT(card, 2, "REVIND");
  924. return 1;
  925. }
  926. if (sense[SENSE_COMMAND_REJECT_BYTE] &
  927. SENSE_COMMAND_REJECT_FLAG) {
  928. QETH_CARD_TEXT(card, 2, "CMDREJi");
  929. return 1;
  930. }
  931. if ((sense[2] == 0xaf) && (sense[3] == 0xfe)) {
  932. QETH_CARD_TEXT(card, 2, "AFFE");
  933. return 1;
  934. }
  935. if ((!sense[0]) && (!sense[1]) && (!sense[2]) && (!sense[3])) {
  936. QETH_CARD_TEXT(card, 2, "ZEROSEN");
  937. return 0;
  938. }
  939. QETH_CARD_TEXT(card, 2, "DGENCHK");
  940. return 1;
  941. }
  942. return 0;
  943. }
  944. static long __qeth_check_irb_error(struct ccw_device *cdev,
  945. unsigned long intparm, struct irb *irb)
  946. {
  947. struct qeth_card *card;
  948. card = CARD_FROM_CDEV(cdev);
  949. if (!card || !IS_ERR(irb))
  950. return 0;
  951. switch (PTR_ERR(irb)) {
  952. case -EIO:
  953. QETH_DBF_MESSAGE(2, "%s i/o-error on device\n",
  954. dev_name(&cdev->dev));
  955. QETH_CARD_TEXT(card, 2, "ckirberr");
  956. QETH_CARD_TEXT_(card, 2, " rc%d", -EIO);
  957. break;
  958. case -ETIMEDOUT:
  959. dev_warn(&cdev->dev, "A hardware operation timed out"
  960. " on the device\n");
  961. QETH_CARD_TEXT(card, 2, "ckirberr");
  962. QETH_CARD_TEXT_(card, 2, " rc%d", -ETIMEDOUT);
  963. if (intparm == QETH_RCD_PARM) {
  964. if (card->data.ccwdev == cdev) {
  965. card->data.state = CH_STATE_DOWN;
  966. wake_up(&card->wait_q);
  967. }
  968. }
  969. break;
  970. default:
  971. QETH_DBF_MESSAGE(2, "%s unknown error %ld on device\n",
  972. dev_name(&cdev->dev), PTR_ERR(irb));
  973. QETH_CARD_TEXT(card, 2, "ckirberr");
  974. QETH_CARD_TEXT(card, 2, " rc???");
  975. }
  976. return PTR_ERR(irb);
  977. }
  978. static void qeth_irq(struct ccw_device *cdev, unsigned long intparm,
  979. struct irb *irb)
  980. {
  981. int rc;
  982. int cstat, dstat;
  983. struct qeth_cmd_buffer *iob = NULL;
  984. struct qeth_channel *channel;
  985. struct qeth_card *card;
  986. card = CARD_FROM_CDEV(cdev);
  987. if (!card)
  988. return;
  989. QETH_CARD_TEXT(card, 5, "irq");
  990. if (card->read.ccwdev == cdev) {
  991. channel = &card->read;
  992. QETH_CARD_TEXT(card, 5, "read");
  993. } else if (card->write.ccwdev == cdev) {
  994. channel = &card->write;
  995. QETH_CARD_TEXT(card, 5, "write");
  996. } else {
  997. channel = &card->data;
  998. QETH_CARD_TEXT(card, 5, "data");
  999. }
  1000. if (qeth_intparm_is_iob(intparm))
  1001. iob = (struct qeth_cmd_buffer *) __va((addr_t)intparm);
  1002. if (__qeth_check_irb_error(cdev, intparm, irb)) {
  1003. /* IO was terminated, free its resources. */
  1004. if (iob)
  1005. qeth_release_buffer(iob->channel, iob);
  1006. atomic_set(&channel->irq_pending, 0);
  1007. wake_up(&card->wait_q);
  1008. return;
  1009. }
  1010. atomic_set(&channel->irq_pending, 0);
  1011. if (irb->scsw.cmd.fctl & (SCSW_FCTL_CLEAR_FUNC))
  1012. channel->state = CH_STATE_STOPPED;
  1013. if (irb->scsw.cmd.fctl & (SCSW_FCTL_HALT_FUNC))
  1014. channel->state = CH_STATE_HALTED;
  1015. /*let's wake up immediately on data channel*/
  1016. if ((channel == &card->data) && (intparm != 0) &&
  1017. (intparm != QETH_RCD_PARM))
  1018. goto out;
  1019. if (intparm == QETH_CLEAR_CHANNEL_PARM) {
  1020. QETH_CARD_TEXT(card, 6, "clrchpar");
  1021. /* we don't have to handle this further */
  1022. intparm = 0;
  1023. }
  1024. if (intparm == QETH_HALT_CHANNEL_PARM) {
  1025. QETH_CARD_TEXT(card, 6, "hltchpar");
  1026. /* we don't have to handle this further */
  1027. intparm = 0;
  1028. }
  1029. cstat = irb->scsw.cmd.cstat;
  1030. dstat = irb->scsw.cmd.dstat;
  1031. if ((dstat & DEV_STAT_UNIT_EXCEP) ||
  1032. (dstat & DEV_STAT_UNIT_CHECK) ||
  1033. (cstat)) {
  1034. if (irb->esw.esw0.erw.cons) {
  1035. dev_warn(&channel->ccwdev->dev,
  1036. "The qeth device driver failed to recover "
  1037. "an error on the device\n");
  1038. QETH_DBF_MESSAGE(2, "%s sense data available. cstat "
  1039. "0x%X dstat 0x%X\n",
  1040. dev_name(&channel->ccwdev->dev), cstat, dstat);
  1041. print_hex_dump(KERN_WARNING, "qeth: irb ",
  1042. DUMP_PREFIX_OFFSET, 16, 1, irb, 32, 1);
  1043. print_hex_dump(KERN_WARNING, "qeth: sense data ",
  1044. DUMP_PREFIX_OFFSET, 16, 1, irb->ecw, 32, 1);
  1045. }
  1046. if (intparm == QETH_RCD_PARM) {
  1047. channel->state = CH_STATE_DOWN;
  1048. goto out;
  1049. }
  1050. rc = qeth_get_problem(cdev, irb);
  1051. if (rc) {
  1052. card->read_or_write_problem = 1;
  1053. qeth_clear_ipacmd_list(card);
  1054. qeth_schedule_recovery(card);
  1055. goto out;
  1056. }
  1057. }
  1058. if (intparm == QETH_RCD_PARM) {
  1059. channel->state = CH_STATE_RCD_DONE;
  1060. goto out;
  1061. }
  1062. if (channel == &card->data)
  1063. return;
  1064. if (channel == &card->read &&
  1065. channel->state == CH_STATE_UP)
  1066. __qeth_issue_next_read(card);
  1067. if (iob && iob->callback)
  1068. iob->callback(iob->channel, iob);
  1069. out:
  1070. wake_up(&card->wait_q);
  1071. return;
  1072. }
  1073. static void qeth_notify_skbs(struct qeth_qdio_out_q *q,
  1074. struct qeth_qdio_out_buffer *buf,
  1075. enum iucv_tx_notify notification)
  1076. {
  1077. struct sk_buff *skb;
  1078. if (skb_queue_empty(&buf->skb_list))
  1079. goto out;
  1080. skb = skb_peek(&buf->skb_list);
  1081. while (skb) {
  1082. QETH_CARD_TEXT_(q->card, 5, "skbn%d", notification);
  1083. QETH_CARD_TEXT_(q->card, 5, "%lx", (long) skb);
  1084. if (be16_to_cpu(skb->protocol) == ETH_P_AF_IUCV) {
  1085. if (skb->sk) {
  1086. struct iucv_sock *iucv = iucv_sk(skb->sk);
  1087. iucv->sk_txnotify(skb, notification);
  1088. }
  1089. }
  1090. if (skb_queue_is_last(&buf->skb_list, skb))
  1091. skb = NULL;
  1092. else
  1093. skb = skb_queue_next(&buf->skb_list, skb);
  1094. }
  1095. out:
  1096. return;
  1097. }
  1098. static void qeth_release_skbs(struct qeth_qdio_out_buffer *buf)
  1099. {
  1100. struct sk_buff *skb;
  1101. struct iucv_sock *iucv;
  1102. int notify_general_error = 0;
  1103. if (atomic_read(&buf->state) == QETH_QDIO_BUF_PENDING)
  1104. notify_general_error = 1;
  1105. /* release may never happen from within CQ tasklet scope */
  1106. WARN_ON_ONCE(atomic_read(&buf->state) == QETH_QDIO_BUF_IN_CQ);
  1107. skb = skb_dequeue(&buf->skb_list);
  1108. while (skb) {
  1109. QETH_CARD_TEXT(buf->q->card, 5, "skbr");
  1110. QETH_CARD_TEXT_(buf->q->card, 5, "%lx", (long) skb);
  1111. if (notify_general_error &&
  1112. be16_to_cpu(skb->protocol) == ETH_P_AF_IUCV) {
  1113. if (skb->sk) {
  1114. iucv = iucv_sk(skb->sk);
  1115. iucv->sk_txnotify(skb, TX_NOTIFY_GENERALERROR);
  1116. }
  1117. }
  1118. refcount_dec(&skb->users);
  1119. dev_kfree_skb_any(skb);
  1120. skb = skb_dequeue(&buf->skb_list);
  1121. }
  1122. }
  1123. static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue,
  1124. struct qeth_qdio_out_buffer *buf,
  1125. enum qeth_qdio_buffer_states newbufstate)
  1126. {
  1127. int i;
  1128. /* is PCI flag set on buffer? */
  1129. if (buf->buffer->element[0].sflags & SBAL_SFLAGS0_PCI_REQ)
  1130. atomic_dec(&queue->set_pci_flags_count);
  1131. if (newbufstate == QETH_QDIO_BUF_EMPTY) {
  1132. qeth_release_skbs(buf);
  1133. }
  1134. for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(queue->card); ++i) {
  1135. if (buf->buffer->element[i].addr && buf->is_header[i])
  1136. kmem_cache_free(qeth_core_header_cache,
  1137. buf->buffer->element[i].addr);
  1138. buf->is_header[i] = 0;
  1139. buf->buffer->element[i].length = 0;
  1140. buf->buffer->element[i].addr = NULL;
  1141. buf->buffer->element[i].eflags = 0;
  1142. buf->buffer->element[i].sflags = 0;
  1143. }
  1144. buf->buffer->element[15].eflags = 0;
  1145. buf->buffer->element[15].sflags = 0;
  1146. buf->next_element_to_fill = 0;
  1147. atomic_set(&buf->state, newbufstate);
  1148. }
  1149. static void qeth_clear_outq_buffers(struct qeth_qdio_out_q *q, int free)
  1150. {
  1151. int j;
  1152. for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
  1153. if (!q->bufs[j])
  1154. continue;
  1155. qeth_cleanup_handled_pending(q, j, 1);
  1156. qeth_clear_output_buffer(q, q->bufs[j], QETH_QDIO_BUF_EMPTY);
  1157. if (free) {
  1158. kmem_cache_free(qeth_qdio_outbuf_cache, q->bufs[j]);
  1159. q->bufs[j] = NULL;
  1160. }
  1161. }
  1162. }
  1163. void qeth_clear_qdio_buffers(struct qeth_card *card)
  1164. {
  1165. int i;
  1166. QETH_CARD_TEXT(card, 2, "clearqdbf");
  1167. /* clear outbound buffers to free skbs */
  1168. for (i = 0; i < card->qdio.no_out_queues; ++i) {
  1169. if (card->qdio.out_qs[i]) {
  1170. qeth_clear_outq_buffers(card->qdio.out_qs[i], 0);
  1171. }
  1172. }
  1173. }
  1174. EXPORT_SYMBOL_GPL(qeth_clear_qdio_buffers);
  1175. static void qeth_free_buffer_pool(struct qeth_card *card)
  1176. {
  1177. struct qeth_buffer_pool_entry *pool_entry, *tmp;
  1178. int i = 0;
  1179. list_for_each_entry_safe(pool_entry, tmp,
  1180. &card->qdio.init_pool.entry_list, init_list){
  1181. for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i)
  1182. free_page((unsigned long)pool_entry->elements[i]);
  1183. list_del(&pool_entry->init_list);
  1184. kfree(pool_entry);
  1185. }
  1186. }
  1187. static void qeth_clean_channel(struct qeth_channel *channel)
  1188. {
  1189. int cnt;
  1190. QETH_DBF_TEXT(SETUP, 2, "freech");
  1191. for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
  1192. kfree(channel->iob[cnt].data);
  1193. }
  1194. static void qeth_set_single_write_queues(struct qeth_card *card)
  1195. {
  1196. if ((atomic_read(&card->qdio.state) != QETH_QDIO_UNINITIALIZED) &&
  1197. (card->qdio.no_out_queues == 4))
  1198. qeth_free_qdio_buffers(card);
  1199. card->qdio.no_out_queues = 1;
  1200. if (card->qdio.default_out_queue != 0)
  1201. dev_info(&card->gdev->dev, "Priority Queueing not supported\n");
  1202. card->qdio.default_out_queue = 0;
  1203. }
  1204. static void qeth_set_multiple_write_queues(struct qeth_card *card)
  1205. {
  1206. if ((atomic_read(&card->qdio.state) != QETH_QDIO_UNINITIALIZED) &&
  1207. (card->qdio.no_out_queues == 1)) {
  1208. qeth_free_qdio_buffers(card);
  1209. card->qdio.default_out_queue = 2;
  1210. }
  1211. card->qdio.no_out_queues = 4;
  1212. }
  1213. static void qeth_update_from_chp_desc(struct qeth_card *card)
  1214. {
  1215. struct ccw_device *ccwdev;
  1216. struct channel_path_desc_fmt0 *chp_dsc;
  1217. QETH_DBF_TEXT(SETUP, 2, "chp_desc");
  1218. ccwdev = card->data.ccwdev;
  1219. chp_dsc = ccw_device_get_chp_desc(ccwdev, 0);
  1220. if (!chp_dsc)
  1221. goto out;
  1222. card->info.func_level = 0x4100 + chp_dsc->desc;
  1223. if (card->info.type == QETH_CARD_TYPE_IQD)
  1224. goto out;
  1225. /* CHPP field bit 6 == 1 -> single queue */
  1226. if ((chp_dsc->chpp & 0x02) == 0x02)
  1227. qeth_set_single_write_queues(card);
  1228. else
  1229. qeth_set_multiple_write_queues(card);
  1230. out:
  1231. kfree(chp_dsc);
  1232. QETH_DBF_TEXT_(SETUP, 2, "nr:%x", card->qdio.no_out_queues);
  1233. QETH_DBF_TEXT_(SETUP, 2, "lvl:%02x", card->info.func_level);
  1234. }
  1235. static void qeth_init_qdio_info(struct qeth_card *card)
  1236. {
  1237. QETH_DBF_TEXT(SETUP, 4, "intqdinf");
  1238. atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
  1239. /* inbound */
  1240. card->qdio.no_in_queues = 1;
  1241. card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
  1242. if (card->info.type == QETH_CARD_TYPE_IQD)
  1243. card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_HSDEFAULT;
  1244. else
  1245. card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_DEFAULT;
  1246. card->qdio.in_buf_pool.buf_count = card->qdio.init_pool.buf_count;
  1247. INIT_LIST_HEAD(&card->qdio.in_buf_pool.entry_list);
  1248. INIT_LIST_HEAD(&card->qdio.init_pool.entry_list);
  1249. }
  1250. static void qeth_set_intial_options(struct qeth_card *card)
  1251. {
  1252. card->options.route4.type = NO_ROUTER;
  1253. card->options.route6.type = NO_ROUTER;
  1254. card->options.fake_broadcast = 0;
  1255. card->options.performance_stats = 0;
  1256. card->options.rx_sg_cb = QETH_RX_SG_CB;
  1257. card->options.isolation = ISOLATION_MODE_NONE;
  1258. card->options.cq = QETH_CQ_DISABLED;
  1259. }
  1260. static int qeth_do_start_thread(struct qeth_card *card, unsigned long thread)
  1261. {
  1262. unsigned long flags;
  1263. int rc = 0;
  1264. spin_lock_irqsave(&card->thread_mask_lock, flags);
  1265. QETH_CARD_TEXT_(card, 4, " %02x%02x%02x",
  1266. (u8) card->thread_start_mask,
  1267. (u8) card->thread_allowed_mask,
  1268. (u8) card->thread_running_mask);
  1269. rc = (card->thread_start_mask & thread);
  1270. spin_unlock_irqrestore(&card->thread_mask_lock, flags);
  1271. return rc;
  1272. }
  1273. static void qeth_start_kernel_thread(struct work_struct *work)
  1274. {
  1275. struct task_struct *ts;
  1276. struct qeth_card *card = container_of(work, struct qeth_card,
  1277. kernel_thread_starter);
  1278. QETH_CARD_TEXT(card , 2, "strthrd");
  1279. if (card->read.state != CH_STATE_UP &&
  1280. card->write.state != CH_STATE_UP)
  1281. return;
  1282. if (qeth_do_start_thread(card, QETH_RECOVER_THREAD)) {
  1283. ts = kthread_run(card->discipline->recover, (void *)card,
  1284. "qeth_recover");
  1285. if (IS_ERR(ts)) {
  1286. qeth_clear_thread_start_bit(card, QETH_RECOVER_THREAD);
  1287. qeth_clear_thread_running_bit(card,
  1288. QETH_RECOVER_THREAD);
  1289. }
  1290. }
  1291. }
  1292. static void qeth_buffer_reclaim_work(struct work_struct *);
  1293. static int qeth_setup_card(struct qeth_card *card)
  1294. {
  1295. QETH_DBF_TEXT(SETUP, 2, "setupcrd");
  1296. QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
  1297. card->read.state = CH_STATE_DOWN;
  1298. card->write.state = CH_STATE_DOWN;
  1299. card->data.state = CH_STATE_DOWN;
  1300. card->state = CARD_STATE_DOWN;
  1301. card->lan_online = 0;
  1302. card->read_or_write_problem = 0;
  1303. card->dev = NULL;
  1304. spin_lock_init(&card->vlanlock);
  1305. spin_lock_init(&card->mclock);
  1306. spin_lock_init(&card->lock);
  1307. spin_lock_init(&card->ip_lock);
  1308. spin_lock_init(&card->thread_mask_lock);
  1309. mutex_init(&card->conf_mutex);
  1310. mutex_init(&card->discipline_mutex);
  1311. card->thread_start_mask = 0;
  1312. card->thread_allowed_mask = 0;
  1313. card->thread_running_mask = 0;
  1314. INIT_WORK(&card->kernel_thread_starter, qeth_start_kernel_thread);
  1315. INIT_LIST_HEAD(&card->cmd_waiter_list);
  1316. init_waitqueue_head(&card->wait_q);
  1317. /* initial options */
  1318. qeth_set_intial_options(card);
  1319. /* IP address takeover */
  1320. INIT_LIST_HEAD(&card->ipato.entries);
  1321. card->ipato.enabled = false;
  1322. card->ipato.invert4 = false;
  1323. card->ipato.invert6 = false;
  1324. /* init QDIO stuff */
  1325. qeth_init_qdio_info(card);
  1326. INIT_DELAYED_WORK(&card->buffer_reclaim_work, qeth_buffer_reclaim_work);
  1327. INIT_WORK(&card->close_dev_work, qeth_close_dev_handler);
  1328. return 0;
  1329. }
  1330. static void qeth_core_sl_print(struct seq_file *m, struct service_level *slr)
  1331. {
  1332. struct qeth_card *card = container_of(slr, struct qeth_card,
  1333. qeth_service_level);
  1334. if (card->info.mcl_level[0])
  1335. seq_printf(m, "qeth: %s firmware level %s\n",
  1336. CARD_BUS_ID(card), card->info.mcl_level);
  1337. }
  1338. static struct qeth_card *qeth_alloc_card(void)
  1339. {
  1340. struct qeth_card *card;
  1341. QETH_DBF_TEXT(SETUP, 2, "alloccrd");
  1342. card = kzalloc(sizeof(struct qeth_card), GFP_DMA|GFP_KERNEL);
  1343. if (!card)
  1344. goto out;
  1345. QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
  1346. if (qeth_setup_channel(&card->read))
  1347. goto out_ip;
  1348. if (qeth_setup_channel(&card->write))
  1349. goto out_channel;
  1350. card->options.layer2 = -1;
  1351. card->qeth_service_level.seq_print = qeth_core_sl_print;
  1352. register_service_level(&card->qeth_service_level);
  1353. return card;
  1354. out_channel:
  1355. qeth_clean_channel(&card->read);
  1356. out_ip:
  1357. kfree(card);
  1358. out:
  1359. return NULL;
  1360. }
  1361. static void qeth_determine_card_type(struct qeth_card *card)
  1362. {
  1363. QETH_DBF_TEXT(SETUP, 2, "detcdtyp");
  1364. card->qdio.do_prio_queueing = QETH_PRIOQ_DEFAULT;
  1365. card->qdio.default_out_queue = QETH_DEFAULT_QUEUE;
  1366. card->info.type = CARD_RDEV(card)->id.driver_info;
  1367. card->qdio.no_out_queues = QETH_MAX_QUEUES;
  1368. if (card->info.type == QETH_CARD_TYPE_IQD)
  1369. card->info.is_multicast_different = 0x0103;
  1370. qeth_update_from_chp_desc(card);
  1371. }
  1372. static int qeth_clear_channel(struct qeth_channel *channel)
  1373. {
  1374. unsigned long flags;
  1375. struct qeth_card *card;
  1376. int rc;
  1377. card = CARD_FROM_CDEV(channel->ccwdev);
  1378. QETH_CARD_TEXT(card, 3, "clearch");
  1379. spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
  1380. rc = ccw_device_clear(channel->ccwdev, QETH_CLEAR_CHANNEL_PARM);
  1381. spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
  1382. if (rc)
  1383. return rc;
  1384. rc = wait_event_interruptible_timeout(card->wait_q,
  1385. channel->state == CH_STATE_STOPPED, QETH_TIMEOUT);
  1386. if (rc == -ERESTARTSYS)
  1387. return rc;
  1388. if (channel->state != CH_STATE_STOPPED)
  1389. return -ETIME;
  1390. channel->state = CH_STATE_DOWN;
  1391. return 0;
  1392. }
  1393. static int qeth_halt_channel(struct qeth_channel *channel)
  1394. {
  1395. unsigned long flags;
  1396. struct qeth_card *card;
  1397. int rc;
  1398. card = CARD_FROM_CDEV(channel->ccwdev);
  1399. QETH_CARD_TEXT(card, 3, "haltch");
  1400. spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
  1401. rc = ccw_device_halt(channel->ccwdev, QETH_HALT_CHANNEL_PARM);
  1402. spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
  1403. if (rc)
  1404. return rc;
  1405. rc = wait_event_interruptible_timeout(card->wait_q,
  1406. channel->state == CH_STATE_HALTED, QETH_TIMEOUT);
  1407. if (rc == -ERESTARTSYS)
  1408. return rc;
  1409. if (channel->state != CH_STATE_HALTED)
  1410. return -ETIME;
  1411. return 0;
  1412. }
  1413. static int qeth_halt_channels(struct qeth_card *card)
  1414. {
  1415. int rc1 = 0, rc2 = 0, rc3 = 0;
  1416. QETH_CARD_TEXT(card, 3, "haltchs");
  1417. rc1 = qeth_halt_channel(&card->read);
  1418. rc2 = qeth_halt_channel(&card->write);
  1419. rc3 = qeth_halt_channel(&card->data);
  1420. if (rc1)
  1421. return rc1;
  1422. if (rc2)
  1423. return rc2;
  1424. return rc3;
  1425. }
  1426. static int qeth_clear_channels(struct qeth_card *card)
  1427. {
  1428. int rc1 = 0, rc2 = 0, rc3 = 0;
  1429. QETH_CARD_TEXT(card, 3, "clearchs");
  1430. rc1 = qeth_clear_channel(&card->read);
  1431. rc2 = qeth_clear_channel(&card->write);
  1432. rc3 = qeth_clear_channel(&card->data);
  1433. if (rc1)
  1434. return rc1;
  1435. if (rc2)
  1436. return rc2;
  1437. return rc3;
  1438. }
  1439. static int qeth_clear_halt_card(struct qeth_card *card, int halt)
  1440. {
  1441. int rc = 0;
  1442. QETH_CARD_TEXT(card, 3, "clhacrd");
  1443. if (halt)
  1444. rc = qeth_halt_channels(card);
  1445. if (rc)
  1446. return rc;
  1447. return qeth_clear_channels(card);
  1448. }
  1449. int qeth_qdio_clear_card(struct qeth_card *card, int use_halt)
  1450. {
  1451. int rc = 0;
  1452. QETH_CARD_TEXT(card, 3, "qdioclr");
  1453. switch (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ESTABLISHED,
  1454. QETH_QDIO_CLEANING)) {
  1455. case QETH_QDIO_ESTABLISHED:
  1456. if (card->info.type == QETH_CARD_TYPE_IQD)
  1457. rc = qdio_shutdown(CARD_DDEV(card),
  1458. QDIO_FLAG_CLEANUP_USING_HALT);
  1459. else
  1460. rc = qdio_shutdown(CARD_DDEV(card),
  1461. QDIO_FLAG_CLEANUP_USING_CLEAR);
  1462. if (rc)
  1463. QETH_CARD_TEXT_(card, 3, "1err%d", rc);
  1464. atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
  1465. break;
  1466. case QETH_QDIO_CLEANING:
  1467. return rc;
  1468. default:
  1469. break;
  1470. }
  1471. rc = qeth_clear_halt_card(card, use_halt);
  1472. if (rc)
  1473. QETH_CARD_TEXT_(card, 3, "2err%d", rc);
  1474. card->state = CARD_STATE_DOWN;
  1475. return rc;
  1476. }
  1477. EXPORT_SYMBOL_GPL(qeth_qdio_clear_card);
  1478. static int qeth_read_conf_data(struct qeth_card *card, void **buffer,
  1479. int *length)
  1480. {
  1481. struct ciw *ciw;
  1482. char *rcd_buf;
  1483. int ret;
  1484. struct qeth_channel *channel = &card->data;
  1485. unsigned long flags;
  1486. /*
  1487. * scan for RCD command in extended SenseID data
  1488. */
  1489. ciw = ccw_device_get_ciw(channel->ccwdev, CIW_TYPE_RCD);
  1490. if (!ciw || ciw->cmd == 0)
  1491. return -EOPNOTSUPP;
  1492. rcd_buf = kzalloc(ciw->count, GFP_KERNEL | GFP_DMA);
  1493. if (!rcd_buf)
  1494. return -ENOMEM;
  1495. channel->ccw.cmd_code = ciw->cmd;
  1496. channel->ccw.cda = (__u32) __pa(rcd_buf);
  1497. channel->ccw.count = ciw->count;
  1498. channel->ccw.flags = CCW_FLAG_SLI;
  1499. channel->state = CH_STATE_RCD;
  1500. spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
  1501. ret = ccw_device_start_timeout(channel->ccwdev, &channel->ccw,
  1502. QETH_RCD_PARM, LPM_ANYPATH, 0,
  1503. QETH_RCD_TIMEOUT);
  1504. spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
  1505. if (!ret)
  1506. wait_event(card->wait_q,
  1507. (channel->state == CH_STATE_RCD_DONE ||
  1508. channel->state == CH_STATE_DOWN));
  1509. if (channel->state == CH_STATE_DOWN)
  1510. ret = -EIO;
  1511. else
  1512. channel->state = CH_STATE_DOWN;
  1513. if (ret) {
  1514. kfree(rcd_buf);
  1515. *buffer = NULL;
  1516. *length = 0;
  1517. } else {
  1518. *length = ciw->count;
  1519. *buffer = rcd_buf;
  1520. }
  1521. return ret;
  1522. }
  1523. static void qeth_configure_unitaddr(struct qeth_card *card, char *prcd)
  1524. {
  1525. QETH_DBF_TEXT(SETUP, 2, "cfgunit");
  1526. card->info.chpid = prcd[30];
  1527. card->info.unit_addr2 = prcd[31];
  1528. card->info.cula = prcd[63];
  1529. card->info.guestlan = ((prcd[0x10] == _ascebc['V']) &&
  1530. (prcd[0x11] == _ascebc['M']));
  1531. }
  1532. static enum qeth_discipline_id qeth_vm_detect_layer(struct qeth_card *card)
  1533. {
  1534. enum qeth_discipline_id disc = QETH_DISCIPLINE_UNDETERMINED;
  1535. struct diag26c_vnic_resp *response = NULL;
  1536. struct diag26c_vnic_req *request = NULL;
  1537. struct ccw_dev_id id;
  1538. char userid[80];
  1539. int rc = 0;
  1540. QETH_DBF_TEXT(SETUP, 2, "vmlayer");
  1541. cpcmd("QUERY USERID", userid, sizeof(userid), &rc);
  1542. if (rc)
  1543. goto out;
  1544. request = kzalloc(sizeof(*request), GFP_KERNEL | GFP_DMA);
  1545. response = kzalloc(sizeof(*response), GFP_KERNEL | GFP_DMA);
  1546. if (!request || !response) {
  1547. rc = -ENOMEM;
  1548. goto out;
  1549. }
  1550. ccw_device_get_id(CARD_RDEV(card), &id);
  1551. request->resp_buf_len = sizeof(*response);
  1552. request->resp_version = DIAG26C_VERSION6_VM65918;
  1553. request->req_format = DIAG26C_VNIC_INFO;
  1554. ASCEBC(userid, 8);
  1555. memcpy(&request->sys_name, userid, 8);
  1556. request->devno = id.devno;
  1557. QETH_DBF_HEX(CTRL, 2, request, sizeof(*request));
  1558. rc = diag26c(request, response, DIAG26C_PORT_VNIC);
  1559. QETH_DBF_HEX(CTRL, 2, request, sizeof(*request));
  1560. if (rc)
  1561. goto out;
  1562. QETH_DBF_HEX(CTRL, 2, response, sizeof(*response));
  1563. if (request->resp_buf_len < sizeof(*response) ||
  1564. response->version != request->resp_version) {
  1565. rc = -EIO;
  1566. goto out;
  1567. }
  1568. if (response->protocol == VNIC_INFO_PROT_L2)
  1569. disc = QETH_DISCIPLINE_LAYER2;
  1570. else if (response->protocol == VNIC_INFO_PROT_L3)
  1571. disc = QETH_DISCIPLINE_LAYER3;
  1572. out:
  1573. kfree(response);
  1574. kfree(request);
  1575. if (rc)
  1576. QETH_DBF_TEXT_(SETUP, 2, "err%x", rc);
  1577. return disc;
  1578. }
  1579. /* Determine whether the device requires a specific layer discipline */
  1580. static enum qeth_discipline_id qeth_enforce_discipline(struct qeth_card *card)
  1581. {
  1582. enum qeth_discipline_id disc = QETH_DISCIPLINE_UNDETERMINED;
  1583. if (card->info.type == QETH_CARD_TYPE_OSM ||
  1584. card->info.type == QETH_CARD_TYPE_OSN)
  1585. disc = QETH_DISCIPLINE_LAYER2;
  1586. else if (card->info.guestlan)
  1587. disc = (card->info.type == QETH_CARD_TYPE_IQD) ?
  1588. QETH_DISCIPLINE_LAYER3 :
  1589. qeth_vm_detect_layer(card);
  1590. switch (disc) {
  1591. case QETH_DISCIPLINE_LAYER2:
  1592. QETH_DBF_TEXT(SETUP, 3, "force l2");
  1593. break;
  1594. case QETH_DISCIPLINE_LAYER3:
  1595. QETH_DBF_TEXT(SETUP, 3, "force l3");
  1596. break;
  1597. default:
  1598. QETH_DBF_TEXT(SETUP, 3, "force no");
  1599. }
  1600. return disc;
  1601. }
  1602. static void qeth_configure_blkt_default(struct qeth_card *card, char *prcd)
  1603. {
  1604. QETH_DBF_TEXT(SETUP, 2, "cfgblkt");
  1605. if (prcd[74] == 0xF0 && prcd[75] == 0xF0 &&
  1606. prcd[76] >= 0xF1 && prcd[76] <= 0xF4) {
  1607. card->info.blkt.time_total = 0;
  1608. card->info.blkt.inter_packet = 0;
  1609. card->info.blkt.inter_packet_jumbo = 0;
  1610. } else {
  1611. card->info.blkt.time_total = 250;
  1612. card->info.blkt.inter_packet = 5;
  1613. card->info.blkt.inter_packet_jumbo = 15;
  1614. }
  1615. }
  1616. static void qeth_init_tokens(struct qeth_card *card)
  1617. {
  1618. card->token.issuer_rm_w = 0x00010103UL;
  1619. card->token.cm_filter_w = 0x00010108UL;
  1620. card->token.cm_connection_w = 0x0001010aUL;
  1621. card->token.ulp_filter_w = 0x0001010bUL;
  1622. card->token.ulp_connection_w = 0x0001010dUL;
  1623. }
  1624. static void qeth_init_func_level(struct qeth_card *card)
  1625. {
  1626. switch (card->info.type) {
  1627. case QETH_CARD_TYPE_IQD:
  1628. card->info.func_level = QETH_IDX_FUNC_LEVEL_IQD;
  1629. break;
  1630. case QETH_CARD_TYPE_OSD:
  1631. case QETH_CARD_TYPE_OSN:
  1632. card->info.func_level = QETH_IDX_FUNC_LEVEL_OSD;
  1633. break;
  1634. default:
  1635. break;
  1636. }
  1637. }
  1638. static int qeth_idx_activate_get_answer(struct qeth_channel *channel,
  1639. void (*idx_reply_cb)(struct qeth_channel *,
  1640. struct qeth_cmd_buffer *))
  1641. {
  1642. struct qeth_cmd_buffer *iob;
  1643. unsigned long flags;
  1644. int rc;
  1645. struct qeth_card *card;
  1646. QETH_DBF_TEXT(SETUP, 2, "idxanswr");
  1647. card = CARD_FROM_CDEV(channel->ccwdev);
  1648. iob = qeth_get_buffer(channel);
  1649. if (!iob)
  1650. return -ENOMEM;
  1651. iob->callback = idx_reply_cb;
  1652. memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1));
  1653. channel->ccw.count = QETH_BUFSIZE;
  1654. channel->ccw.cda = (__u32) __pa(iob->data);
  1655. wait_event(card->wait_q,
  1656. atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
  1657. QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
  1658. spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
  1659. rc = ccw_device_start_timeout(channel->ccwdev, &channel->ccw,
  1660. (addr_t) iob, 0, 0, QETH_TIMEOUT);
  1661. spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
  1662. if (rc) {
  1663. QETH_DBF_MESSAGE(2, "Error2 in activating channel rc=%d\n", rc);
  1664. QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
  1665. atomic_set(&channel->irq_pending, 0);
  1666. wake_up(&card->wait_q);
  1667. return rc;
  1668. }
  1669. rc = wait_event_interruptible_timeout(card->wait_q,
  1670. channel->state == CH_STATE_UP, QETH_TIMEOUT);
  1671. if (rc == -ERESTARTSYS)
  1672. return rc;
  1673. if (channel->state != CH_STATE_UP) {
  1674. rc = -ETIME;
  1675. QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
  1676. } else
  1677. rc = 0;
  1678. return rc;
  1679. }
  1680. static int qeth_idx_activate_channel(struct qeth_channel *channel,
  1681. void (*idx_reply_cb)(struct qeth_channel *,
  1682. struct qeth_cmd_buffer *))
  1683. {
  1684. struct qeth_card *card;
  1685. struct qeth_cmd_buffer *iob;
  1686. unsigned long flags;
  1687. __u16 temp;
  1688. __u8 tmp;
  1689. int rc;
  1690. struct ccw_dev_id temp_devid;
  1691. card = CARD_FROM_CDEV(channel->ccwdev);
  1692. QETH_DBF_TEXT(SETUP, 2, "idxactch");
  1693. iob = qeth_get_buffer(channel);
  1694. if (!iob)
  1695. return -ENOMEM;
  1696. iob->callback = idx_reply_cb;
  1697. memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1));
  1698. channel->ccw.count = IDX_ACTIVATE_SIZE;
  1699. channel->ccw.cda = (__u32) __pa(iob->data);
  1700. if (channel == &card->write) {
  1701. memcpy(iob->data, IDX_ACTIVATE_WRITE, IDX_ACTIVATE_SIZE);
  1702. memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
  1703. &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
  1704. card->seqno.trans_hdr++;
  1705. } else {
  1706. memcpy(iob->data, IDX_ACTIVATE_READ, IDX_ACTIVATE_SIZE);
  1707. memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
  1708. &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
  1709. }
  1710. tmp = ((__u8)card->info.portno) | 0x80;
  1711. memcpy(QETH_IDX_ACT_PNO(iob->data), &tmp, 1);
  1712. memcpy(QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
  1713. &card->token.issuer_rm_w, QETH_MPC_TOKEN_LENGTH);
  1714. memcpy(QETH_IDX_ACT_FUNC_LEVEL(iob->data),
  1715. &card->info.func_level, sizeof(__u16));
  1716. ccw_device_get_id(CARD_DDEV(card), &temp_devid);
  1717. memcpy(QETH_IDX_ACT_QDIO_DEV_CUA(iob->data), &temp_devid.devno, 2);
  1718. temp = (card->info.cula << 8) + card->info.unit_addr2;
  1719. memcpy(QETH_IDX_ACT_QDIO_DEV_REALADDR(iob->data), &temp, 2);
  1720. wait_event(card->wait_q,
  1721. atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
  1722. QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
  1723. spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
  1724. rc = ccw_device_start_timeout(channel->ccwdev, &channel->ccw,
  1725. (addr_t) iob, 0, 0, QETH_TIMEOUT);
  1726. spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
  1727. if (rc) {
  1728. QETH_DBF_MESSAGE(2, "Error1 in activating channel. rc=%d\n",
  1729. rc);
  1730. QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
  1731. atomic_set(&channel->irq_pending, 0);
  1732. wake_up(&card->wait_q);
  1733. return rc;
  1734. }
  1735. rc = wait_event_interruptible_timeout(card->wait_q,
  1736. channel->state == CH_STATE_ACTIVATING, QETH_TIMEOUT);
  1737. if (rc == -ERESTARTSYS)
  1738. return rc;
  1739. if (channel->state != CH_STATE_ACTIVATING) {
  1740. dev_warn(&channel->ccwdev->dev, "The qeth device driver"
  1741. " failed to recover an error on the device\n");
  1742. QETH_DBF_MESSAGE(2, "%s IDX activate timed out\n",
  1743. dev_name(&channel->ccwdev->dev));
  1744. QETH_DBF_TEXT_(SETUP, 2, "2err%d", -ETIME);
  1745. return -ETIME;
  1746. }
  1747. return qeth_idx_activate_get_answer(channel, idx_reply_cb);
  1748. }
  1749. static int qeth_peer_func_level(int level)
  1750. {
  1751. if ((level & 0xff) == 8)
  1752. return (level & 0xff) + 0x400;
  1753. if (((level >> 8) & 3) == 1)
  1754. return (level & 0xff) + 0x200;
  1755. return level;
  1756. }
  1757. static void qeth_idx_write_cb(struct qeth_channel *channel,
  1758. struct qeth_cmd_buffer *iob)
  1759. {
  1760. struct qeth_card *card;
  1761. __u16 temp;
  1762. QETH_DBF_TEXT(SETUP , 2, "idxwrcb");
  1763. if (channel->state == CH_STATE_DOWN) {
  1764. channel->state = CH_STATE_ACTIVATING;
  1765. goto out;
  1766. }
  1767. card = CARD_FROM_CDEV(channel->ccwdev);
  1768. if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
  1769. if (QETH_IDX_ACT_CAUSE_CODE(iob->data) == QETH_IDX_ACT_ERR_EXCL)
  1770. dev_err(&card->write.ccwdev->dev,
  1771. "The adapter is used exclusively by another "
  1772. "host\n");
  1773. else
  1774. QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel:"
  1775. " negative reply\n",
  1776. dev_name(&card->write.ccwdev->dev));
  1777. goto out;
  1778. }
  1779. memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
  1780. if ((temp & ~0x0100) != qeth_peer_func_level(card->info.func_level)) {
  1781. QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel: "
  1782. "function level mismatch (sent: 0x%x, received: "
  1783. "0x%x)\n", dev_name(&card->write.ccwdev->dev),
  1784. card->info.func_level, temp);
  1785. goto out;
  1786. }
  1787. channel->state = CH_STATE_UP;
  1788. out:
  1789. qeth_release_buffer(channel, iob);
  1790. }
  1791. static void qeth_idx_read_cb(struct qeth_channel *channel,
  1792. struct qeth_cmd_buffer *iob)
  1793. {
  1794. struct qeth_card *card;
  1795. __u16 temp;
  1796. QETH_DBF_TEXT(SETUP , 2, "idxrdcb");
  1797. if (channel->state == CH_STATE_DOWN) {
  1798. channel->state = CH_STATE_ACTIVATING;
  1799. goto out;
  1800. }
  1801. card = CARD_FROM_CDEV(channel->ccwdev);
  1802. if (qeth_check_idx_response(card, iob->data))
  1803. goto out;
  1804. if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
  1805. switch (QETH_IDX_ACT_CAUSE_CODE(iob->data)) {
  1806. case QETH_IDX_ACT_ERR_EXCL:
  1807. dev_err(&card->write.ccwdev->dev,
  1808. "The adapter is used exclusively by another "
  1809. "host\n");
  1810. break;
  1811. case QETH_IDX_ACT_ERR_AUTH:
  1812. case QETH_IDX_ACT_ERR_AUTH_USER:
  1813. dev_err(&card->read.ccwdev->dev,
  1814. "Setting the device online failed because of "
  1815. "insufficient authorization\n");
  1816. break;
  1817. default:
  1818. QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel:"
  1819. " negative reply\n",
  1820. dev_name(&card->read.ccwdev->dev));
  1821. }
  1822. QETH_CARD_TEXT_(card, 2, "idxread%c",
  1823. QETH_IDX_ACT_CAUSE_CODE(iob->data));
  1824. goto out;
  1825. }
  1826. memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
  1827. if (temp != qeth_peer_func_level(card->info.func_level)) {
  1828. QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel: function "
  1829. "level mismatch (sent: 0x%x, received: 0x%x)\n",
  1830. dev_name(&card->read.ccwdev->dev),
  1831. card->info.func_level, temp);
  1832. goto out;
  1833. }
  1834. memcpy(&card->token.issuer_rm_r,
  1835. QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
  1836. QETH_MPC_TOKEN_LENGTH);
  1837. memcpy(&card->info.mcl_level[0],
  1838. QETH_IDX_REPLY_LEVEL(iob->data), QETH_MCL_LENGTH);
  1839. channel->state = CH_STATE_UP;
  1840. out:
  1841. qeth_release_buffer(channel, iob);
  1842. }
  1843. void qeth_prepare_control_data(struct qeth_card *card, int len,
  1844. struct qeth_cmd_buffer *iob)
  1845. {
  1846. qeth_setup_ccw(&card->write, iob->data, len);
  1847. iob->callback = qeth_release_buffer;
  1848. memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
  1849. &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
  1850. card->seqno.trans_hdr++;
  1851. memcpy(QETH_PDU_HEADER_SEQ_NO(iob->data),
  1852. &card->seqno.pdu_hdr, QETH_SEQ_NO_LENGTH);
  1853. card->seqno.pdu_hdr++;
  1854. memcpy(QETH_PDU_HEADER_ACK_SEQ_NO(iob->data),
  1855. &card->seqno.pdu_hdr_ack, QETH_SEQ_NO_LENGTH);
  1856. QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN);
  1857. }
  1858. EXPORT_SYMBOL_GPL(qeth_prepare_control_data);
  1859. /**
  1860. * qeth_send_control_data() - send control command to the card
  1861. * @card: qeth_card structure pointer
  1862. * @len: size of the command buffer
  1863. * @iob: qeth_cmd_buffer pointer
  1864. * @reply_cb: callback function pointer
  1865. * @cb_card: pointer to the qeth_card structure
  1866. * @cb_reply: pointer to the qeth_reply structure
  1867. * @cb_cmd: pointer to the original iob for non-IPA
  1868. * commands, or to the qeth_ipa_cmd structure
  1869. * for the IPA commands.
  1870. * @reply_param: private pointer passed to the callback
  1871. *
  1872. * Returns the value of the `return_code' field of the response
  1873. * block returned from the hardware, or other error indication.
  1874. * Value of zero indicates successful execution of the command.
  1875. *
  1876. * Callback function gets called one or more times, with cb_cmd
  1877. * pointing to the response returned by the hardware. Callback
  1878. * function must return non-zero if more reply blocks are expected,
  1879. * and zero if the last or only reply block is received. Callback
  1880. * function can get the value of the reply_param pointer from the
  1881. * field 'param' of the structure qeth_reply.
  1882. */
  1883. int qeth_send_control_data(struct qeth_card *card, int len,
  1884. struct qeth_cmd_buffer *iob,
  1885. int (*reply_cb)(struct qeth_card *cb_card,
  1886. struct qeth_reply *cb_reply,
  1887. unsigned long cb_cmd),
  1888. void *reply_param)
  1889. {
  1890. int rc;
  1891. unsigned long flags;
  1892. struct qeth_reply *reply = NULL;
  1893. unsigned long timeout, event_timeout;
  1894. struct qeth_ipa_cmd *cmd = NULL;
  1895. QETH_CARD_TEXT(card, 2, "sendctl");
  1896. if (card->read_or_write_problem) {
  1897. qeth_release_buffer(iob->channel, iob);
  1898. return -EIO;
  1899. }
  1900. reply = qeth_alloc_reply(card);
  1901. if (!reply) {
  1902. return -ENOMEM;
  1903. }
  1904. reply->callback = reply_cb;
  1905. reply->param = reply_param;
  1906. init_waitqueue_head(&reply->wait_q);
  1907. while (atomic_cmpxchg(&card->write.irq_pending, 0, 1)) ;
  1908. if (IS_IPA(iob->data)) {
  1909. cmd = __ipa_cmd(iob);
  1910. cmd->hdr.seqno = card->seqno.ipa++;
  1911. reply->seqno = cmd->hdr.seqno;
  1912. event_timeout = QETH_IPA_TIMEOUT;
  1913. } else {
  1914. reply->seqno = QETH_IDX_COMMAND_SEQNO;
  1915. event_timeout = QETH_TIMEOUT;
  1916. }
  1917. qeth_prepare_control_data(card, len, iob);
  1918. spin_lock_irqsave(&card->lock, flags);
  1919. list_add_tail(&reply->list, &card->cmd_waiter_list);
  1920. spin_unlock_irqrestore(&card->lock, flags);
  1921. timeout = jiffies + event_timeout;
  1922. QETH_CARD_TEXT(card, 6, "noirqpnd");
  1923. spin_lock_irqsave(get_ccwdev_lock(card->write.ccwdev), flags);
  1924. rc = ccw_device_start_timeout(CARD_WDEV(card), &card->write.ccw,
  1925. (addr_t) iob, 0, 0, event_timeout);
  1926. spin_unlock_irqrestore(get_ccwdev_lock(card->write.ccwdev), flags);
  1927. if (rc) {
  1928. QETH_DBF_MESSAGE(2, "%s qeth_send_control_data: "
  1929. "ccw_device_start rc = %i\n",
  1930. dev_name(&card->write.ccwdev->dev), rc);
  1931. QETH_CARD_TEXT_(card, 2, " err%d", rc);
  1932. spin_lock_irqsave(&card->lock, flags);
  1933. list_del_init(&reply->list);
  1934. qeth_put_reply(reply);
  1935. spin_unlock_irqrestore(&card->lock, flags);
  1936. qeth_release_buffer(iob->channel, iob);
  1937. atomic_set(&card->write.irq_pending, 0);
  1938. wake_up(&card->wait_q);
  1939. return rc;
  1940. }
  1941. /* we have only one long running ipassist, since we can ensure
  1942. process context of this command we can sleep */
  1943. if (cmd && cmd->hdr.command == IPA_CMD_SETIP &&
  1944. cmd->hdr.prot_version == QETH_PROT_IPV4) {
  1945. if (!wait_event_timeout(reply->wait_q,
  1946. atomic_read(&reply->received), event_timeout))
  1947. goto time_err;
  1948. } else {
  1949. while (!atomic_read(&reply->received)) {
  1950. if (time_after(jiffies, timeout))
  1951. goto time_err;
  1952. cpu_relax();
  1953. }
  1954. }
  1955. rc = reply->rc;
  1956. qeth_put_reply(reply);
  1957. return rc;
  1958. time_err:
  1959. reply->rc = -ETIME;
  1960. spin_lock_irqsave(&reply->card->lock, flags);
  1961. list_del_init(&reply->list);
  1962. spin_unlock_irqrestore(&reply->card->lock, flags);
  1963. atomic_inc(&reply->received);
  1964. rc = reply->rc;
  1965. qeth_put_reply(reply);
  1966. return rc;
  1967. }
  1968. EXPORT_SYMBOL_GPL(qeth_send_control_data);
  1969. static int qeth_cm_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
  1970. unsigned long data)
  1971. {
  1972. struct qeth_cmd_buffer *iob;
  1973. QETH_DBF_TEXT(SETUP, 2, "cmenblcb");
  1974. iob = (struct qeth_cmd_buffer *) data;
  1975. memcpy(&card->token.cm_filter_r,
  1976. QETH_CM_ENABLE_RESP_FILTER_TOKEN(iob->data),
  1977. QETH_MPC_TOKEN_LENGTH);
  1978. QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
  1979. return 0;
  1980. }
  1981. static int qeth_cm_enable(struct qeth_card *card)
  1982. {
  1983. int rc;
  1984. struct qeth_cmd_buffer *iob;
  1985. QETH_DBF_TEXT(SETUP, 2, "cmenable");
  1986. iob = qeth_wait_for_buffer(&card->write);
  1987. memcpy(iob->data, CM_ENABLE, CM_ENABLE_SIZE);
  1988. memcpy(QETH_CM_ENABLE_ISSUER_RM_TOKEN(iob->data),
  1989. &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
  1990. memcpy(QETH_CM_ENABLE_FILTER_TOKEN(iob->data),
  1991. &card->token.cm_filter_w, QETH_MPC_TOKEN_LENGTH);
  1992. rc = qeth_send_control_data(card, CM_ENABLE_SIZE, iob,
  1993. qeth_cm_enable_cb, NULL);
  1994. return rc;
  1995. }
  1996. static int qeth_cm_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
  1997. unsigned long data)
  1998. {
  1999. struct qeth_cmd_buffer *iob;
  2000. QETH_DBF_TEXT(SETUP, 2, "cmsetpcb");
  2001. iob = (struct qeth_cmd_buffer *) data;
  2002. memcpy(&card->token.cm_connection_r,
  2003. QETH_CM_SETUP_RESP_DEST_ADDR(iob->data),
  2004. QETH_MPC_TOKEN_LENGTH);
  2005. QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
  2006. return 0;
  2007. }
  2008. static int qeth_cm_setup(struct qeth_card *card)
  2009. {
  2010. int rc;
  2011. struct qeth_cmd_buffer *iob;
  2012. QETH_DBF_TEXT(SETUP, 2, "cmsetup");
  2013. iob = qeth_wait_for_buffer(&card->write);
  2014. memcpy(iob->data, CM_SETUP, CM_SETUP_SIZE);
  2015. memcpy(QETH_CM_SETUP_DEST_ADDR(iob->data),
  2016. &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
  2017. memcpy(QETH_CM_SETUP_CONNECTION_TOKEN(iob->data),
  2018. &card->token.cm_connection_w, QETH_MPC_TOKEN_LENGTH);
  2019. memcpy(QETH_CM_SETUP_FILTER_TOKEN(iob->data),
  2020. &card->token.cm_filter_r, QETH_MPC_TOKEN_LENGTH);
  2021. rc = qeth_send_control_data(card, CM_SETUP_SIZE, iob,
  2022. qeth_cm_setup_cb, NULL);
  2023. return rc;
  2024. }
  2025. static int qeth_get_initial_mtu_for_card(struct qeth_card *card)
  2026. {
  2027. switch (card->info.type) {
  2028. case QETH_CARD_TYPE_IQD:
  2029. return card->info.max_mtu;
  2030. case QETH_CARD_TYPE_OSD:
  2031. case QETH_CARD_TYPE_OSX:
  2032. if (!card->options.layer2)
  2033. return ETH_DATA_LEN - 8; /* L3: allow for LLC + SNAP */
  2034. /* fall through */
  2035. default:
  2036. return ETH_DATA_LEN;
  2037. }
  2038. }
  2039. static int qeth_get_mtu_outof_framesize(int framesize)
  2040. {
  2041. switch (framesize) {
  2042. case 0x4000:
  2043. return 8192;
  2044. case 0x6000:
  2045. return 16384;
  2046. case 0xa000:
  2047. return 32768;
  2048. case 0xffff:
  2049. return 57344;
  2050. default:
  2051. return 0;
  2052. }
  2053. }
  2054. static int qeth_mtu_is_valid(struct qeth_card *card, int mtu)
  2055. {
  2056. switch (card->info.type) {
  2057. case QETH_CARD_TYPE_OSD:
  2058. case QETH_CARD_TYPE_OSM:
  2059. case QETH_CARD_TYPE_OSX:
  2060. case QETH_CARD_TYPE_IQD:
  2061. return ((mtu >= 576) &&
  2062. (mtu <= card->info.max_mtu));
  2063. case QETH_CARD_TYPE_OSN:
  2064. default:
  2065. return 1;
  2066. }
  2067. }
  2068. static int qeth_ulp_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
  2069. unsigned long data)
  2070. {
  2071. __u16 mtu, framesize;
  2072. __u16 len;
  2073. __u8 link_type;
  2074. struct qeth_cmd_buffer *iob;
  2075. QETH_DBF_TEXT(SETUP, 2, "ulpenacb");
  2076. iob = (struct qeth_cmd_buffer *) data;
  2077. memcpy(&card->token.ulp_filter_r,
  2078. QETH_ULP_ENABLE_RESP_FILTER_TOKEN(iob->data),
  2079. QETH_MPC_TOKEN_LENGTH);
  2080. if (card->info.type == QETH_CARD_TYPE_IQD) {
  2081. memcpy(&framesize, QETH_ULP_ENABLE_RESP_MAX_MTU(iob->data), 2);
  2082. mtu = qeth_get_mtu_outof_framesize(framesize);
  2083. if (!mtu) {
  2084. iob->rc = -EINVAL;
  2085. QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
  2086. return 0;
  2087. }
  2088. if (card->info.initial_mtu && (card->info.initial_mtu != mtu)) {
  2089. /* frame size has changed */
  2090. if (card->dev &&
  2091. ((card->dev->mtu == card->info.initial_mtu) ||
  2092. (card->dev->mtu > mtu)))
  2093. card->dev->mtu = mtu;
  2094. qeth_free_qdio_buffers(card);
  2095. }
  2096. card->info.initial_mtu = mtu;
  2097. card->info.max_mtu = mtu;
  2098. card->qdio.in_buf_size = mtu + 2 * PAGE_SIZE;
  2099. } else {
  2100. card->info.max_mtu = *(__u16 *)QETH_ULP_ENABLE_RESP_MAX_MTU(
  2101. iob->data);
  2102. card->info.initial_mtu = min(card->info.max_mtu,
  2103. qeth_get_initial_mtu_for_card(card));
  2104. card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
  2105. }
  2106. memcpy(&len, QETH_ULP_ENABLE_RESP_DIFINFO_LEN(iob->data), 2);
  2107. if (len >= QETH_MPC_DIFINFO_LEN_INDICATES_LINK_TYPE) {
  2108. memcpy(&link_type,
  2109. QETH_ULP_ENABLE_RESP_LINK_TYPE(iob->data), 1);
  2110. card->info.link_type = link_type;
  2111. } else
  2112. card->info.link_type = 0;
  2113. QETH_DBF_TEXT_(SETUP, 2, "link%d", card->info.link_type);
  2114. QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
  2115. return 0;
  2116. }
  2117. static int qeth_ulp_enable(struct qeth_card *card)
  2118. {
  2119. int rc;
  2120. char prot_type;
  2121. struct qeth_cmd_buffer *iob;
  2122. /*FIXME: trace view callbacks*/
  2123. QETH_DBF_TEXT(SETUP, 2, "ulpenabl");
  2124. iob = qeth_wait_for_buffer(&card->write);
  2125. memcpy(iob->data, ULP_ENABLE, ULP_ENABLE_SIZE);
  2126. *(QETH_ULP_ENABLE_LINKNUM(iob->data)) =
  2127. (__u8) card->info.portno;
  2128. if (card->options.layer2)
  2129. if (card->info.type == QETH_CARD_TYPE_OSN)
  2130. prot_type = QETH_PROT_OSN2;
  2131. else
  2132. prot_type = QETH_PROT_LAYER2;
  2133. else
  2134. prot_type = QETH_PROT_TCPIP;
  2135. memcpy(QETH_ULP_ENABLE_PROT_TYPE(iob->data), &prot_type, 1);
  2136. memcpy(QETH_ULP_ENABLE_DEST_ADDR(iob->data),
  2137. &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
  2138. memcpy(QETH_ULP_ENABLE_FILTER_TOKEN(iob->data),
  2139. &card->token.ulp_filter_w, QETH_MPC_TOKEN_LENGTH);
  2140. rc = qeth_send_control_data(card, ULP_ENABLE_SIZE, iob,
  2141. qeth_ulp_enable_cb, NULL);
  2142. return rc;
  2143. }
  2144. static int qeth_ulp_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
  2145. unsigned long data)
  2146. {
  2147. struct qeth_cmd_buffer *iob;
  2148. QETH_DBF_TEXT(SETUP, 2, "ulpstpcb");
  2149. iob = (struct qeth_cmd_buffer *) data;
  2150. memcpy(&card->token.ulp_connection_r,
  2151. QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data),
  2152. QETH_MPC_TOKEN_LENGTH);
  2153. if (!strncmp("00S", QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data),
  2154. 3)) {
  2155. QETH_DBF_TEXT(SETUP, 2, "olmlimit");
  2156. dev_err(&card->gdev->dev, "A connection could not be "
  2157. "established because of an OLM limit\n");
  2158. iob->rc = -EMLINK;
  2159. }
  2160. QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
  2161. return 0;
  2162. }
  2163. static int qeth_ulp_setup(struct qeth_card *card)
  2164. {
  2165. int rc;
  2166. __u16 temp;
  2167. struct qeth_cmd_buffer *iob;
  2168. struct ccw_dev_id dev_id;
  2169. QETH_DBF_TEXT(SETUP, 2, "ulpsetup");
  2170. iob = qeth_wait_for_buffer(&card->write);
  2171. memcpy(iob->data, ULP_SETUP, ULP_SETUP_SIZE);
  2172. memcpy(QETH_ULP_SETUP_DEST_ADDR(iob->data),
  2173. &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
  2174. memcpy(QETH_ULP_SETUP_CONNECTION_TOKEN(iob->data),
  2175. &card->token.ulp_connection_w, QETH_MPC_TOKEN_LENGTH);
  2176. memcpy(QETH_ULP_SETUP_FILTER_TOKEN(iob->data),
  2177. &card->token.ulp_filter_r, QETH_MPC_TOKEN_LENGTH);
  2178. ccw_device_get_id(CARD_DDEV(card), &dev_id);
  2179. memcpy(QETH_ULP_SETUP_CUA(iob->data), &dev_id.devno, 2);
  2180. temp = (card->info.cula << 8) + card->info.unit_addr2;
  2181. memcpy(QETH_ULP_SETUP_REAL_DEVADDR(iob->data), &temp, 2);
  2182. rc = qeth_send_control_data(card, ULP_SETUP_SIZE, iob,
  2183. qeth_ulp_setup_cb, NULL);
  2184. return rc;
  2185. }
  2186. static int qeth_init_qdio_out_buf(struct qeth_qdio_out_q *q, int bidx)
  2187. {
  2188. int rc;
  2189. struct qeth_qdio_out_buffer *newbuf;
  2190. rc = 0;
  2191. newbuf = kmem_cache_zalloc(qeth_qdio_outbuf_cache, GFP_ATOMIC);
  2192. if (!newbuf) {
  2193. rc = -ENOMEM;
  2194. goto out;
  2195. }
  2196. newbuf->buffer = q->qdio_bufs[bidx];
  2197. skb_queue_head_init(&newbuf->skb_list);
  2198. lockdep_set_class(&newbuf->skb_list.lock, &qdio_out_skb_queue_key);
  2199. newbuf->q = q;
  2200. newbuf->aob = NULL;
  2201. newbuf->next_pending = q->bufs[bidx];
  2202. atomic_set(&newbuf->state, QETH_QDIO_BUF_EMPTY);
  2203. q->bufs[bidx] = newbuf;
  2204. if (q->bufstates) {
  2205. q->bufstates[bidx].user = newbuf;
  2206. QETH_CARD_TEXT_(q->card, 2, "nbs%d", bidx);
  2207. QETH_CARD_TEXT_(q->card, 2, "%lx", (long) newbuf);
  2208. QETH_CARD_TEXT_(q->card, 2, "%lx",
  2209. (long) newbuf->next_pending);
  2210. }
  2211. out:
  2212. return rc;
  2213. }
  2214. static void qeth_free_qdio_out_buf(struct qeth_qdio_out_q *q)
  2215. {
  2216. if (!q)
  2217. return;
  2218. qdio_free_buffers(q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q);
  2219. kfree(q);
  2220. }
  2221. static struct qeth_qdio_out_q *qeth_alloc_qdio_out_buf(void)
  2222. {
  2223. struct qeth_qdio_out_q *q = kzalloc(sizeof(*q), GFP_KERNEL);
  2224. if (!q)
  2225. return NULL;
  2226. if (qdio_alloc_buffers(q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q)) {
  2227. kfree(q);
  2228. return NULL;
  2229. }
  2230. return q;
  2231. }
  2232. static int qeth_alloc_qdio_buffers(struct qeth_card *card)
  2233. {
  2234. int i, j;
  2235. QETH_DBF_TEXT(SETUP, 2, "allcqdbf");
  2236. if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED,
  2237. QETH_QDIO_ALLOCATED) != QETH_QDIO_UNINITIALIZED)
  2238. return 0;
  2239. QETH_DBF_TEXT(SETUP, 2, "inq");
  2240. card->qdio.in_q = qeth_alloc_qdio_queue();
  2241. if (!card->qdio.in_q)
  2242. goto out_nomem;
  2243. /* inbound buffer pool */
  2244. if (qeth_alloc_buffer_pool(card))
  2245. goto out_freeinq;
  2246. /* outbound */
  2247. card->qdio.out_qs =
  2248. kzalloc(card->qdio.no_out_queues *
  2249. sizeof(struct qeth_qdio_out_q *), GFP_KERNEL);
  2250. if (!card->qdio.out_qs)
  2251. goto out_freepool;
  2252. for (i = 0; i < card->qdio.no_out_queues; ++i) {
  2253. card->qdio.out_qs[i] = qeth_alloc_qdio_out_buf();
  2254. if (!card->qdio.out_qs[i])
  2255. goto out_freeoutq;
  2256. QETH_DBF_TEXT_(SETUP, 2, "outq %i", i);
  2257. QETH_DBF_HEX(SETUP, 2, &card->qdio.out_qs[i], sizeof(void *));
  2258. card->qdio.out_qs[i]->queue_no = i;
  2259. /* give outbound qeth_qdio_buffers their qdio_buffers */
  2260. for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
  2261. WARN_ON(card->qdio.out_qs[i]->bufs[j] != NULL);
  2262. if (qeth_init_qdio_out_buf(card->qdio.out_qs[i], j))
  2263. goto out_freeoutqbufs;
  2264. }
  2265. }
  2266. /* completion */
  2267. if (qeth_alloc_cq(card))
  2268. goto out_freeoutq;
  2269. return 0;
  2270. out_freeoutqbufs:
  2271. while (j > 0) {
  2272. --j;
  2273. kmem_cache_free(qeth_qdio_outbuf_cache,
  2274. card->qdio.out_qs[i]->bufs[j]);
  2275. card->qdio.out_qs[i]->bufs[j] = NULL;
  2276. }
  2277. out_freeoutq:
  2278. while (i > 0) {
  2279. qeth_free_qdio_out_buf(card->qdio.out_qs[--i]);
  2280. qeth_clear_outq_buffers(card->qdio.out_qs[i], 1);
  2281. }
  2282. kfree(card->qdio.out_qs);
  2283. card->qdio.out_qs = NULL;
  2284. out_freepool:
  2285. qeth_free_buffer_pool(card);
  2286. out_freeinq:
  2287. qeth_free_qdio_queue(card->qdio.in_q);
  2288. card->qdio.in_q = NULL;
  2289. out_nomem:
  2290. atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
  2291. return -ENOMEM;
  2292. }
  2293. static void qeth_free_qdio_buffers(struct qeth_card *card)
  2294. {
  2295. int i, j;
  2296. if (atomic_xchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED) ==
  2297. QETH_QDIO_UNINITIALIZED)
  2298. return;
  2299. qeth_free_cq(card);
  2300. cancel_delayed_work_sync(&card->buffer_reclaim_work);
  2301. for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
  2302. if (card->qdio.in_q->bufs[j].rx_skb)
  2303. dev_kfree_skb_any(card->qdio.in_q->bufs[j].rx_skb);
  2304. }
  2305. qeth_free_qdio_queue(card->qdio.in_q);
  2306. card->qdio.in_q = NULL;
  2307. /* inbound buffer pool */
  2308. qeth_free_buffer_pool(card);
  2309. /* free outbound qdio_qs */
  2310. if (card->qdio.out_qs) {
  2311. for (i = 0; i < card->qdio.no_out_queues; ++i) {
  2312. qeth_clear_outq_buffers(card->qdio.out_qs[i], 1);
  2313. qeth_free_qdio_out_buf(card->qdio.out_qs[i]);
  2314. }
  2315. kfree(card->qdio.out_qs);
  2316. card->qdio.out_qs = NULL;
  2317. }
  2318. }
  2319. static void qeth_create_qib_param_field(struct qeth_card *card,
  2320. char *param_field)
  2321. {
  2322. param_field[0] = _ascebc['P'];
  2323. param_field[1] = _ascebc['C'];
  2324. param_field[2] = _ascebc['I'];
  2325. param_field[3] = _ascebc['T'];
  2326. *((unsigned int *) (&param_field[4])) = QETH_PCI_THRESHOLD_A(card);
  2327. *((unsigned int *) (&param_field[8])) = QETH_PCI_THRESHOLD_B(card);
  2328. *((unsigned int *) (&param_field[12])) = QETH_PCI_TIMER_VALUE(card);
  2329. }
  2330. static void qeth_create_qib_param_field_blkt(struct qeth_card *card,
  2331. char *param_field)
  2332. {
  2333. param_field[16] = _ascebc['B'];
  2334. param_field[17] = _ascebc['L'];
  2335. param_field[18] = _ascebc['K'];
  2336. param_field[19] = _ascebc['T'];
  2337. *((unsigned int *) (&param_field[20])) = card->info.blkt.time_total;
  2338. *((unsigned int *) (&param_field[24])) = card->info.blkt.inter_packet;
  2339. *((unsigned int *) (&param_field[28])) =
  2340. card->info.blkt.inter_packet_jumbo;
  2341. }
  2342. static int qeth_qdio_activate(struct qeth_card *card)
  2343. {
  2344. QETH_DBF_TEXT(SETUP, 3, "qdioact");
  2345. return qdio_activate(CARD_DDEV(card));
  2346. }
  2347. static int qeth_dm_act(struct qeth_card *card)
  2348. {
  2349. int rc;
  2350. struct qeth_cmd_buffer *iob;
  2351. QETH_DBF_TEXT(SETUP, 2, "dmact");
  2352. iob = qeth_wait_for_buffer(&card->write);
  2353. memcpy(iob->data, DM_ACT, DM_ACT_SIZE);
  2354. memcpy(QETH_DM_ACT_DEST_ADDR(iob->data),
  2355. &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
  2356. memcpy(QETH_DM_ACT_CONNECTION_TOKEN(iob->data),
  2357. &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
  2358. rc = qeth_send_control_data(card, DM_ACT_SIZE, iob, NULL, NULL);
  2359. return rc;
  2360. }
  2361. static int qeth_mpc_initialize(struct qeth_card *card)
  2362. {
  2363. int rc;
  2364. QETH_DBF_TEXT(SETUP, 2, "mpcinit");
  2365. rc = qeth_issue_next_read(card);
  2366. if (rc) {
  2367. QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
  2368. return rc;
  2369. }
  2370. rc = qeth_cm_enable(card);
  2371. if (rc) {
  2372. QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
  2373. goto out_qdio;
  2374. }
  2375. rc = qeth_cm_setup(card);
  2376. if (rc) {
  2377. QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
  2378. goto out_qdio;
  2379. }
  2380. rc = qeth_ulp_enable(card);
  2381. if (rc) {
  2382. QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
  2383. goto out_qdio;
  2384. }
  2385. rc = qeth_ulp_setup(card);
  2386. if (rc) {
  2387. QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
  2388. goto out_qdio;
  2389. }
  2390. rc = qeth_alloc_qdio_buffers(card);
  2391. if (rc) {
  2392. QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
  2393. goto out_qdio;
  2394. }
  2395. rc = qeth_qdio_establish(card);
  2396. if (rc) {
  2397. QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
  2398. qeth_free_qdio_buffers(card);
  2399. goto out_qdio;
  2400. }
  2401. rc = qeth_qdio_activate(card);
  2402. if (rc) {
  2403. QETH_DBF_TEXT_(SETUP, 2, "7err%d", rc);
  2404. goto out_qdio;
  2405. }
  2406. rc = qeth_dm_act(card);
  2407. if (rc) {
  2408. QETH_DBF_TEXT_(SETUP, 2, "8err%d", rc);
  2409. goto out_qdio;
  2410. }
  2411. return 0;
  2412. out_qdio:
  2413. qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
  2414. qdio_free(CARD_DDEV(card));
  2415. return rc;
  2416. }
  2417. void qeth_print_status_message(struct qeth_card *card)
  2418. {
  2419. switch (card->info.type) {
  2420. case QETH_CARD_TYPE_OSD:
  2421. case QETH_CARD_TYPE_OSM:
  2422. case QETH_CARD_TYPE_OSX:
  2423. /* VM will use a non-zero first character
  2424. * to indicate a HiperSockets like reporting
  2425. * of the level OSA sets the first character to zero
  2426. * */
  2427. if (!card->info.mcl_level[0]) {
  2428. sprintf(card->info.mcl_level, "%02x%02x",
  2429. card->info.mcl_level[2],
  2430. card->info.mcl_level[3]);
  2431. break;
  2432. }
  2433. /* fallthrough */
  2434. case QETH_CARD_TYPE_IQD:
  2435. if ((card->info.guestlan) ||
  2436. (card->info.mcl_level[0] & 0x80)) {
  2437. card->info.mcl_level[0] = (char) _ebcasc[(__u8)
  2438. card->info.mcl_level[0]];
  2439. card->info.mcl_level[1] = (char) _ebcasc[(__u8)
  2440. card->info.mcl_level[1]];
  2441. card->info.mcl_level[2] = (char) _ebcasc[(__u8)
  2442. card->info.mcl_level[2]];
  2443. card->info.mcl_level[3] = (char) _ebcasc[(__u8)
  2444. card->info.mcl_level[3]];
  2445. card->info.mcl_level[QETH_MCL_LENGTH] = 0;
  2446. }
  2447. break;
  2448. default:
  2449. memset(&card->info.mcl_level[0], 0, QETH_MCL_LENGTH + 1);
  2450. }
  2451. dev_info(&card->gdev->dev,
  2452. "Device is a%s card%s%s%s\nwith link type %s.\n",
  2453. qeth_get_cardname(card),
  2454. (card->info.mcl_level[0]) ? " (level: " : "",
  2455. (card->info.mcl_level[0]) ? card->info.mcl_level : "",
  2456. (card->info.mcl_level[0]) ? ")" : "",
  2457. qeth_get_cardname_short(card));
  2458. }
  2459. EXPORT_SYMBOL_GPL(qeth_print_status_message);
  2460. static void qeth_initialize_working_pool_list(struct qeth_card *card)
  2461. {
  2462. struct qeth_buffer_pool_entry *entry;
  2463. QETH_CARD_TEXT(card, 5, "inwrklst");
  2464. list_for_each_entry(entry,
  2465. &card->qdio.init_pool.entry_list, init_list) {
  2466. qeth_put_buffer_pool_entry(card, entry);
  2467. }
  2468. }
  2469. static struct qeth_buffer_pool_entry *qeth_find_free_buffer_pool_entry(
  2470. struct qeth_card *card)
  2471. {
  2472. struct list_head *plh;
  2473. struct qeth_buffer_pool_entry *entry;
  2474. int i, free;
  2475. struct page *page;
  2476. if (list_empty(&card->qdio.in_buf_pool.entry_list))
  2477. return NULL;
  2478. list_for_each(plh, &card->qdio.in_buf_pool.entry_list) {
  2479. entry = list_entry(plh, struct qeth_buffer_pool_entry, list);
  2480. free = 1;
  2481. for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
  2482. if (page_count(virt_to_page(entry->elements[i])) > 1) {
  2483. free = 0;
  2484. break;
  2485. }
  2486. }
  2487. if (free) {
  2488. list_del_init(&entry->list);
  2489. return entry;
  2490. }
  2491. }
  2492. /* no free buffer in pool so take first one and swap pages */
  2493. entry = list_entry(card->qdio.in_buf_pool.entry_list.next,
  2494. struct qeth_buffer_pool_entry, list);
  2495. for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
  2496. if (page_count(virt_to_page(entry->elements[i])) > 1) {
  2497. page = alloc_page(GFP_ATOMIC);
  2498. if (!page) {
  2499. return NULL;
  2500. } else {
  2501. free_page((unsigned long)entry->elements[i]);
  2502. entry->elements[i] = page_address(page);
  2503. if (card->options.performance_stats)
  2504. card->perf_stats.sg_alloc_page_rx++;
  2505. }
  2506. }
  2507. }
  2508. list_del_init(&entry->list);
  2509. return entry;
  2510. }
  2511. static int qeth_init_input_buffer(struct qeth_card *card,
  2512. struct qeth_qdio_buffer *buf)
  2513. {
  2514. struct qeth_buffer_pool_entry *pool_entry;
  2515. int i;
  2516. if ((card->options.cq == QETH_CQ_ENABLED) && (!buf->rx_skb)) {
  2517. buf->rx_skb = netdev_alloc_skb(card->dev,
  2518. QETH_RX_PULL_LEN + ETH_HLEN);
  2519. if (!buf->rx_skb)
  2520. return 1;
  2521. }
  2522. pool_entry = qeth_find_free_buffer_pool_entry(card);
  2523. if (!pool_entry)
  2524. return 1;
  2525. /*
  2526. * since the buffer is accessed only from the input_tasklet
  2527. * there shouldn't be a need to synchronize; also, since we use
  2528. * the QETH_IN_BUF_REQUEUE_THRESHOLD we should never run out off
  2529. * buffers
  2530. */
  2531. buf->pool_entry = pool_entry;
  2532. for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
  2533. buf->buffer->element[i].length = PAGE_SIZE;
  2534. buf->buffer->element[i].addr = pool_entry->elements[i];
  2535. if (i == QETH_MAX_BUFFER_ELEMENTS(card) - 1)
  2536. buf->buffer->element[i].eflags = SBAL_EFLAGS_LAST_ENTRY;
  2537. else
  2538. buf->buffer->element[i].eflags = 0;
  2539. buf->buffer->element[i].sflags = 0;
  2540. }
  2541. return 0;
  2542. }
  2543. int qeth_init_qdio_queues(struct qeth_card *card)
  2544. {
  2545. int i, j;
  2546. int rc;
  2547. QETH_DBF_TEXT(SETUP, 2, "initqdqs");
  2548. /* inbound queue */
  2549. qdio_reset_buffers(card->qdio.in_q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q);
  2550. memset(&card->rx, 0, sizeof(struct qeth_rx));
  2551. qeth_initialize_working_pool_list(card);
  2552. /*give only as many buffers to hardware as we have buffer pool entries*/
  2553. for (i = 0; i < card->qdio.in_buf_pool.buf_count - 1; ++i)
  2554. qeth_init_input_buffer(card, &card->qdio.in_q->bufs[i]);
  2555. card->qdio.in_q->next_buf_to_init =
  2556. card->qdio.in_buf_pool.buf_count - 1;
  2557. rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0, 0,
  2558. card->qdio.in_buf_pool.buf_count - 1);
  2559. if (rc) {
  2560. QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
  2561. return rc;
  2562. }
  2563. /* completion */
  2564. rc = qeth_cq_init(card);
  2565. if (rc) {
  2566. return rc;
  2567. }
  2568. /* outbound queue */
  2569. for (i = 0; i < card->qdio.no_out_queues; ++i) {
  2570. qdio_reset_buffers(card->qdio.out_qs[i]->qdio_bufs,
  2571. QDIO_MAX_BUFFERS_PER_Q);
  2572. for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
  2573. qeth_clear_output_buffer(card->qdio.out_qs[i],
  2574. card->qdio.out_qs[i]->bufs[j],
  2575. QETH_QDIO_BUF_EMPTY);
  2576. }
  2577. card->qdio.out_qs[i]->card = card;
  2578. card->qdio.out_qs[i]->next_buf_to_fill = 0;
  2579. card->qdio.out_qs[i]->do_pack = 0;
  2580. atomic_set(&card->qdio.out_qs[i]->used_buffers, 0);
  2581. atomic_set(&card->qdio.out_qs[i]->set_pci_flags_count, 0);
  2582. atomic_set(&card->qdio.out_qs[i]->state,
  2583. QETH_OUT_Q_UNLOCKED);
  2584. }
  2585. return 0;
  2586. }
  2587. EXPORT_SYMBOL_GPL(qeth_init_qdio_queues);
  2588. static __u8 qeth_get_ipa_adp_type(enum qeth_link_types link_type)
  2589. {
  2590. switch (link_type) {
  2591. case QETH_LINK_TYPE_HSTR:
  2592. return 2;
  2593. default:
  2594. return 1;
  2595. }
  2596. }
  2597. static void qeth_fill_ipacmd_header(struct qeth_card *card,
  2598. struct qeth_ipa_cmd *cmd, __u8 command,
  2599. enum qeth_prot_versions prot)
  2600. {
  2601. memset(cmd, 0, sizeof(struct qeth_ipa_cmd));
  2602. cmd->hdr.command = command;
  2603. cmd->hdr.initiator = IPA_CMD_INITIATOR_HOST;
  2604. /* cmd->hdr.seqno is set by qeth_send_control_data() */
  2605. cmd->hdr.adapter_type = qeth_get_ipa_adp_type(card->info.link_type);
  2606. cmd->hdr.rel_adapter_no = (__u8) card->info.portno;
  2607. if (card->options.layer2)
  2608. cmd->hdr.prim_version_no = 2;
  2609. else
  2610. cmd->hdr.prim_version_no = 1;
  2611. cmd->hdr.param_count = 1;
  2612. cmd->hdr.prot_version = prot;
  2613. cmd->hdr.ipa_supported = 0;
  2614. cmd->hdr.ipa_enabled = 0;
  2615. }
  2616. struct qeth_cmd_buffer *qeth_get_ipacmd_buffer(struct qeth_card *card,
  2617. enum qeth_ipa_cmds ipacmd, enum qeth_prot_versions prot)
  2618. {
  2619. struct qeth_cmd_buffer *iob;
  2620. iob = qeth_get_buffer(&card->write);
  2621. if (iob) {
  2622. qeth_fill_ipacmd_header(card, __ipa_cmd(iob), ipacmd, prot);
  2623. } else {
  2624. dev_warn(&card->gdev->dev,
  2625. "The qeth driver ran out of channel command buffers\n");
  2626. QETH_DBF_MESSAGE(1, "%s The qeth driver ran out of channel command buffers",
  2627. dev_name(&card->gdev->dev));
  2628. }
  2629. return iob;
  2630. }
  2631. EXPORT_SYMBOL_GPL(qeth_get_ipacmd_buffer);
  2632. void qeth_prepare_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
  2633. char prot_type)
  2634. {
  2635. memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
  2636. memcpy(QETH_IPA_CMD_PROT_TYPE(iob->data), &prot_type, 1);
  2637. memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
  2638. &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
  2639. }
  2640. EXPORT_SYMBOL_GPL(qeth_prepare_ipa_cmd);
  2641. /**
  2642. * qeth_send_ipa_cmd() - send an IPA command
  2643. *
  2644. * See qeth_send_control_data() for explanation of the arguments.
  2645. */
  2646. int qeth_send_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
  2647. int (*reply_cb)(struct qeth_card *, struct qeth_reply*,
  2648. unsigned long),
  2649. void *reply_param)
  2650. {
  2651. int rc;
  2652. char prot_type;
  2653. QETH_CARD_TEXT(card, 4, "sendipa");
  2654. if (card->options.layer2)
  2655. if (card->info.type == QETH_CARD_TYPE_OSN)
  2656. prot_type = QETH_PROT_OSN2;
  2657. else
  2658. prot_type = QETH_PROT_LAYER2;
  2659. else
  2660. prot_type = QETH_PROT_TCPIP;
  2661. qeth_prepare_ipa_cmd(card, iob, prot_type);
  2662. rc = qeth_send_control_data(card, IPA_CMD_LENGTH,
  2663. iob, reply_cb, reply_param);
  2664. if (rc == -ETIME) {
  2665. qeth_clear_ipacmd_list(card);
  2666. qeth_schedule_recovery(card);
  2667. }
  2668. return rc;
  2669. }
  2670. EXPORT_SYMBOL_GPL(qeth_send_ipa_cmd);
  2671. static int qeth_send_startlan(struct qeth_card *card)
  2672. {
  2673. int rc;
  2674. struct qeth_cmd_buffer *iob;
  2675. QETH_DBF_TEXT(SETUP, 2, "strtlan");
  2676. iob = qeth_get_ipacmd_buffer(card, IPA_CMD_STARTLAN, 0);
  2677. if (!iob)
  2678. return -ENOMEM;
  2679. rc = qeth_send_ipa_cmd(card, iob, NULL, NULL);
  2680. return rc;
  2681. }
  2682. static int qeth_setadpparms_inspect_rc(struct qeth_ipa_cmd *cmd)
  2683. {
  2684. if (!cmd->hdr.return_code)
  2685. cmd->hdr.return_code =
  2686. cmd->data.setadapterparms.hdr.return_code;
  2687. return cmd->hdr.return_code;
  2688. }
  2689. static int qeth_query_setadapterparms_cb(struct qeth_card *card,
  2690. struct qeth_reply *reply, unsigned long data)
  2691. {
  2692. struct qeth_ipa_cmd *cmd = (struct qeth_ipa_cmd *) data;
  2693. QETH_CARD_TEXT(card, 3, "quyadpcb");
  2694. if (qeth_setadpparms_inspect_rc(cmd))
  2695. return 0;
  2696. if (cmd->data.setadapterparms.data.query_cmds_supp.lan_type & 0x7f) {
  2697. card->info.link_type =
  2698. cmd->data.setadapterparms.data.query_cmds_supp.lan_type;
  2699. QETH_DBF_TEXT_(SETUP, 2, "lnk %d", card->info.link_type);
  2700. }
  2701. card->options.adp.supported_funcs =
  2702. cmd->data.setadapterparms.data.query_cmds_supp.supported_cmds;
  2703. return 0;
  2704. }
  2705. static struct qeth_cmd_buffer *qeth_get_adapter_cmd(struct qeth_card *card,
  2706. __u32 command, __u32 cmdlen)
  2707. {
  2708. struct qeth_cmd_buffer *iob;
  2709. struct qeth_ipa_cmd *cmd;
  2710. iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SETADAPTERPARMS,
  2711. QETH_PROT_IPV4);
  2712. if (iob) {
  2713. cmd = __ipa_cmd(iob);
  2714. cmd->data.setadapterparms.hdr.cmdlength = cmdlen;
  2715. cmd->data.setadapterparms.hdr.command_code = command;
  2716. cmd->data.setadapterparms.hdr.used_total = 1;
  2717. cmd->data.setadapterparms.hdr.seq_no = 1;
  2718. }
  2719. return iob;
  2720. }
  2721. int qeth_query_setadapterparms(struct qeth_card *card)
  2722. {
  2723. int rc;
  2724. struct qeth_cmd_buffer *iob;
  2725. QETH_CARD_TEXT(card, 3, "queryadp");
  2726. iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_COMMANDS_SUPPORTED,
  2727. sizeof(struct qeth_ipacmd_setadpparms));
  2728. if (!iob)
  2729. return -ENOMEM;
  2730. rc = qeth_send_ipa_cmd(card, iob, qeth_query_setadapterparms_cb, NULL);
  2731. return rc;
  2732. }
  2733. EXPORT_SYMBOL_GPL(qeth_query_setadapterparms);
  2734. static int qeth_query_ipassists_cb(struct qeth_card *card,
  2735. struct qeth_reply *reply, unsigned long data)
  2736. {
  2737. struct qeth_ipa_cmd *cmd;
  2738. QETH_DBF_TEXT(SETUP, 2, "qipasscb");
  2739. cmd = (struct qeth_ipa_cmd *) data;
  2740. switch (cmd->hdr.return_code) {
  2741. case IPA_RC_NOTSUPP:
  2742. case IPA_RC_L2_UNSUPPORTED_CMD:
  2743. QETH_DBF_TEXT(SETUP, 2, "ipaunsup");
  2744. card->options.ipa4.supported_funcs |= IPA_SETADAPTERPARMS;
  2745. card->options.ipa6.supported_funcs |= IPA_SETADAPTERPARMS;
  2746. return -0;
  2747. default:
  2748. if (cmd->hdr.return_code) {
  2749. QETH_DBF_MESSAGE(1, "%s IPA_CMD_QIPASSIST: Unhandled "
  2750. "rc=%d\n",
  2751. dev_name(&card->gdev->dev),
  2752. cmd->hdr.return_code);
  2753. return 0;
  2754. }
  2755. }
  2756. if (cmd->hdr.prot_version == QETH_PROT_IPV4) {
  2757. card->options.ipa4.supported_funcs = cmd->hdr.ipa_supported;
  2758. card->options.ipa4.enabled_funcs = cmd->hdr.ipa_enabled;
  2759. } else if (cmd->hdr.prot_version == QETH_PROT_IPV6) {
  2760. card->options.ipa6.supported_funcs = cmd->hdr.ipa_supported;
  2761. card->options.ipa6.enabled_funcs = cmd->hdr.ipa_enabled;
  2762. } else
  2763. QETH_DBF_MESSAGE(1, "%s IPA_CMD_QIPASSIST: Flawed LIC detected"
  2764. "\n", dev_name(&card->gdev->dev));
  2765. return 0;
  2766. }
  2767. int qeth_query_ipassists(struct qeth_card *card, enum qeth_prot_versions prot)
  2768. {
  2769. int rc;
  2770. struct qeth_cmd_buffer *iob;
  2771. QETH_DBF_TEXT_(SETUP, 2, "qipassi%i", prot);
  2772. iob = qeth_get_ipacmd_buffer(card, IPA_CMD_QIPASSIST, prot);
  2773. if (!iob)
  2774. return -ENOMEM;
  2775. rc = qeth_send_ipa_cmd(card, iob, qeth_query_ipassists_cb, NULL);
  2776. return rc;
  2777. }
  2778. EXPORT_SYMBOL_GPL(qeth_query_ipassists);
  2779. static int qeth_query_switch_attributes_cb(struct qeth_card *card,
  2780. struct qeth_reply *reply, unsigned long data)
  2781. {
  2782. struct qeth_ipa_cmd *cmd = (struct qeth_ipa_cmd *) data;
  2783. struct qeth_query_switch_attributes *attrs;
  2784. struct qeth_switch_info *sw_info;
  2785. QETH_CARD_TEXT(card, 2, "qswiatcb");
  2786. if (qeth_setadpparms_inspect_rc(cmd))
  2787. return 0;
  2788. sw_info = (struct qeth_switch_info *)reply->param;
  2789. attrs = &cmd->data.setadapterparms.data.query_switch_attributes;
  2790. sw_info->capabilities = attrs->capabilities;
  2791. sw_info->settings = attrs->settings;
  2792. QETH_CARD_TEXT_(card, 2, "%04x%04x", sw_info->capabilities,
  2793. sw_info->settings);
  2794. return 0;
  2795. }
  2796. int qeth_query_switch_attributes(struct qeth_card *card,
  2797. struct qeth_switch_info *sw_info)
  2798. {
  2799. struct qeth_cmd_buffer *iob;
  2800. QETH_CARD_TEXT(card, 2, "qswiattr");
  2801. if (!qeth_adp_supported(card, IPA_SETADP_QUERY_SWITCH_ATTRIBUTES))
  2802. return -EOPNOTSUPP;
  2803. if (!netif_carrier_ok(card->dev))
  2804. return -ENOMEDIUM;
  2805. iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_SWITCH_ATTRIBUTES,
  2806. sizeof(struct qeth_ipacmd_setadpparms_hdr));
  2807. if (!iob)
  2808. return -ENOMEM;
  2809. return qeth_send_ipa_cmd(card, iob,
  2810. qeth_query_switch_attributes_cb, sw_info);
  2811. }
  2812. EXPORT_SYMBOL_GPL(qeth_query_switch_attributes);
  2813. static int qeth_query_setdiagass_cb(struct qeth_card *card,
  2814. struct qeth_reply *reply, unsigned long data)
  2815. {
  2816. struct qeth_ipa_cmd *cmd;
  2817. __u16 rc;
  2818. cmd = (struct qeth_ipa_cmd *)data;
  2819. rc = cmd->hdr.return_code;
  2820. if (rc)
  2821. QETH_CARD_TEXT_(card, 2, "diagq:%x", rc);
  2822. else
  2823. card->info.diagass_support = cmd->data.diagass.ext;
  2824. return 0;
  2825. }
  2826. static int qeth_query_setdiagass(struct qeth_card *card)
  2827. {
  2828. struct qeth_cmd_buffer *iob;
  2829. struct qeth_ipa_cmd *cmd;
  2830. QETH_DBF_TEXT(SETUP, 2, "qdiagass");
  2831. iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SET_DIAG_ASS, 0);
  2832. if (!iob)
  2833. return -ENOMEM;
  2834. cmd = __ipa_cmd(iob);
  2835. cmd->data.diagass.subcmd_len = 16;
  2836. cmd->data.diagass.subcmd = QETH_DIAGS_CMD_QUERY;
  2837. return qeth_send_ipa_cmd(card, iob, qeth_query_setdiagass_cb, NULL);
  2838. }
  2839. static void qeth_get_trap_id(struct qeth_card *card, struct qeth_trap_id *tid)
  2840. {
  2841. unsigned long info = get_zeroed_page(GFP_KERNEL);
  2842. struct sysinfo_2_2_2 *info222 = (struct sysinfo_2_2_2 *)info;
  2843. struct sysinfo_3_2_2 *info322 = (struct sysinfo_3_2_2 *)info;
  2844. struct ccw_dev_id ccwid;
  2845. int level;
  2846. tid->chpid = card->info.chpid;
  2847. ccw_device_get_id(CARD_RDEV(card), &ccwid);
  2848. tid->ssid = ccwid.ssid;
  2849. tid->devno = ccwid.devno;
  2850. if (!info)
  2851. return;
  2852. level = stsi(NULL, 0, 0, 0);
  2853. if ((level >= 2) && (stsi(info222, 2, 2, 2) == 0))
  2854. tid->lparnr = info222->lpar_number;
  2855. if ((level >= 3) && (stsi(info322, 3, 2, 2) == 0)) {
  2856. EBCASC(info322->vm[0].name, sizeof(info322->vm[0].name));
  2857. memcpy(tid->vmname, info322->vm[0].name, sizeof(tid->vmname));
  2858. }
  2859. free_page(info);
  2860. return;
  2861. }
  2862. static int qeth_hw_trap_cb(struct qeth_card *card,
  2863. struct qeth_reply *reply, unsigned long data)
  2864. {
  2865. struct qeth_ipa_cmd *cmd;
  2866. __u16 rc;
  2867. cmd = (struct qeth_ipa_cmd *)data;
  2868. rc = cmd->hdr.return_code;
  2869. if (rc)
  2870. QETH_CARD_TEXT_(card, 2, "trapc:%x", rc);
  2871. return 0;
  2872. }
  2873. int qeth_hw_trap(struct qeth_card *card, enum qeth_diags_trap_action action)
  2874. {
  2875. struct qeth_cmd_buffer *iob;
  2876. struct qeth_ipa_cmd *cmd;
  2877. QETH_DBF_TEXT(SETUP, 2, "diagtrap");
  2878. iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SET_DIAG_ASS, 0);
  2879. if (!iob)
  2880. return -ENOMEM;
  2881. cmd = __ipa_cmd(iob);
  2882. cmd->data.diagass.subcmd_len = 80;
  2883. cmd->data.diagass.subcmd = QETH_DIAGS_CMD_TRAP;
  2884. cmd->data.diagass.type = 1;
  2885. cmd->data.diagass.action = action;
  2886. switch (action) {
  2887. case QETH_DIAGS_TRAP_ARM:
  2888. cmd->data.diagass.options = 0x0003;
  2889. cmd->data.diagass.ext = 0x00010000 +
  2890. sizeof(struct qeth_trap_id);
  2891. qeth_get_trap_id(card,
  2892. (struct qeth_trap_id *)cmd->data.diagass.cdata);
  2893. break;
  2894. case QETH_DIAGS_TRAP_DISARM:
  2895. cmd->data.diagass.options = 0x0001;
  2896. break;
  2897. case QETH_DIAGS_TRAP_CAPTURE:
  2898. break;
  2899. }
  2900. return qeth_send_ipa_cmd(card, iob, qeth_hw_trap_cb, NULL);
  2901. }
  2902. EXPORT_SYMBOL_GPL(qeth_hw_trap);
  2903. static int qeth_check_qdio_errors(struct qeth_card *card,
  2904. struct qdio_buffer *buf,
  2905. unsigned int qdio_error,
  2906. const char *dbftext)
  2907. {
  2908. if (qdio_error) {
  2909. QETH_CARD_TEXT(card, 2, dbftext);
  2910. QETH_CARD_TEXT_(card, 2, " F15=%02X",
  2911. buf->element[15].sflags);
  2912. QETH_CARD_TEXT_(card, 2, " F14=%02X",
  2913. buf->element[14].sflags);
  2914. QETH_CARD_TEXT_(card, 2, " qerr=%X", qdio_error);
  2915. if ((buf->element[15].sflags) == 0x12) {
  2916. card->stats.rx_dropped++;
  2917. return 0;
  2918. } else
  2919. return 1;
  2920. }
  2921. return 0;
  2922. }
  2923. static void qeth_queue_input_buffer(struct qeth_card *card, int index)
  2924. {
  2925. struct qeth_qdio_q *queue = card->qdio.in_q;
  2926. struct list_head *lh;
  2927. int count;
  2928. int i;
  2929. int rc;
  2930. int newcount = 0;
  2931. count = (index < queue->next_buf_to_init)?
  2932. card->qdio.in_buf_pool.buf_count -
  2933. (queue->next_buf_to_init - index) :
  2934. card->qdio.in_buf_pool.buf_count -
  2935. (queue->next_buf_to_init + QDIO_MAX_BUFFERS_PER_Q - index);
  2936. /* only requeue at a certain threshold to avoid SIGAs */
  2937. if (count >= QETH_IN_BUF_REQUEUE_THRESHOLD(card)) {
  2938. for (i = queue->next_buf_to_init;
  2939. i < queue->next_buf_to_init + count; ++i) {
  2940. if (qeth_init_input_buffer(card,
  2941. &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q])) {
  2942. break;
  2943. } else {
  2944. newcount++;
  2945. }
  2946. }
  2947. if (newcount < count) {
  2948. /* we are in memory shortage so we switch back to
  2949. traditional skb allocation and drop packages */
  2950. atomic_set(&card->force_alloc_skb, 3);
  2951. count = newcount;
  2952. } else {
  2953. atomic_add_unless(&card->force_alloc_skb, -1, 0);
  2954. }
  2955. if (!count) {
  2956. i = 0;
  2957. list_for_each(lh, &card->qdio.in_buf_pool.entry_list)
  2958. i++;
  2959. if (i == card->qdio.in_buf_pool.buf_count) {
  2960. QETH_CARD_TEXT(card, 2, "qsarbw");
  2961. card->reclaim_index = index;
  2962. schedule_delayed_work(
  2963. &card->buffer_reclaim_work,
  2964. QETH_RECLAIM_WORK_TIME);
  2965. }
  2966. return;
  2967. }
  2968. /*
  2969. * according to old code it should be avoided to requeue all
  2970. * 128 buffers in order to benefit from PCI avoidance.
  2971. * this function keeps at least one buffer (the buffer at
  2972. * 'index') un-requeued -> this buffer is the first buffer that
  2973. * will be requeued the next time
  2974. */
  2975. if (card->options.performance_stats) {
  2976. card->perf_stats.inbound_do_qdio_cnt++;
  2977. card->perf_stats.inbound_do_qdio_start_time =
  2978. qeth_get_micros();
  2979. }
  2980. rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0,
  2981. queue->next_buf_to_init, count);
  2982. if (card->options.performance_stats)
  2983. card->perf_stats.inbound_do_qdio_time +=
  2984. qeth_get_micros() -
  2985. card->perf_stats.inbound_do_qdio_start_time;
  2986. if (rc) {
  2987. QETH_CARD_TEXT(card, 2, "qinberr");
  2988. }
  2989. queue->next_buf_to_init = (queue->next_buf_to_init + count) %
  2990. QDIO_MAX_BUFFERS_PER_Q;
  2991. }
  2992. }
  2993. static void qeth_buffer_reclaim_work(struct work_struct *work)
  2994. {
  2995. struct qeth_card *card = container_of(work, struct qeth_card,
  2996. buffer_reclaim_work.work);
  2997. QETH_CARD_TEXT_(card, 2, "brw:%x", card->reclaim_index);
  2998. qeth_queue_input_buffer(card, card->reclaim_index);
  2999. }
  3000. static void qeth_handle_send_error(struct qeth_card *card,
  3001. struct qeth_qdio_out_buffer *buffer, unsigned int qdio_err)
  3002. {
  3003. int sbalf15 = buffer->buffer->element[15].sflags;
  3004. QETH_CARD_TEXT(card, 6, "hdsnderr");
  3005. if (card->info.type == QETH_CARD_TYPE_IQD) {
  3006. if (sbalf15 == 0) {
  3007. qdio_err = 0;
  3008. } else {
  3009. qdio_err = 1;
  3010. }
  3011. }
  3012. qeth_check_qdio_errors(card, buffer->buffer, qdio_err, "qouterr");
  3013. if (!qdio_err)
  3014. return;
  3015. if ((sbalf15 >= 15) && (sbalf15 <= 31))
  3016. return;
  3017. QETH_CARD_TEXT(card, 1, "lnkfail");
  3018. QETH_CARD_TEXT_(card, 1, "%04x %02x",
  3019. (u16)qdio_err, (u8)sbalf15);
  3020. }
  3021. /**
  3022. * qeth_prep_flush_pack_buffer - Prepares flushing of a packing buffer.
  3023. * @queue: queue to check for packing buffer
  3024. *
  3025. * Returns number of buffers that were prepared for flush.
  3026. */
  3027. static int qeth_prep_flush_pack_buffer(struct qeth_qdio_out_q *queue)
  3028. {
  3029. struct qeth_qdio_out_buffer *buffer;
  3030. buffer = queue->bufs[queue->next_buf_to_fill];
  3031. if ((atomic_read(&buffer->state) == QETH_QDIO_BUF_EMPTY) &&
  3032. (buffer->next_element_to_fill > 0)) {
  3033. /* it's a packing buffer */
  3034. atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED);
  3035. queue->next_buf_to_fill =
  3036. (queue->next_buf_to_fill + 1) % QDIO_MAX_BUFFERS_PER_Q;
  3037. return 1;
  3038. }
  3039. return 0;
  3040. }
  3041. /*
  3042. * Switched to packing state if the number of used buffers on a queue
  3043. * reaches a certain limit.
  3044. */
  3045. static void qeth_switch_to_packing_if_needed(struct qeth_qdio_out_q *queue)
  3046. {
  3047. if (!queue->do_pack) {
  3048. if (atomic_read(&queue->used_buffers)
  3049. >= QETH_HIGH_WATERMARK_PACK){
  3050. /* switch non-PACKING -> PACKING */
  3051. QETH_CARD_TEXT(queue->card, 6, "np->pack");
  3052. if (queue->card->options.performance_stats)
  3053. queue->card->perf_stats.sc_dp_p++;
  3054. queue->do_pack = 1;
  3055. }
  3056. }
  3057. }
  3058. /*
  3059. * Switches from packing to non-packing mode. If there is a packing
  3060. * buffer on the queue this buffer will be prepared to be flushed.
  3061. * In that case 1 is returned to inform the caller. If no buffer
  3062. * has to be flushed, zero is returned.
  3063. */
  3064. static int qeth_switch_to_nonpacking_if_needed(struct qeth_qdio_out_q *queue)
  3065. {
  3066. if (queue->do_pack) {
  3067. if (atomic_read(&queue->used_buffers)
  3068. <= QETH_LOW_WATERMARK_PACK) {
  3069. /* switch PACKING -> non-PACKING */
  3070. QETH_CARD_TEXT(queue->card, 6, "pack->np");
  3071. if (queue->card->options.performance_stats)
  3072. queue->card->perf_stats.sc_p_dp++;
  3073. queue->do_pack = 0;
  3074. return qeth_prep_flush_pack_buffer(queue);
  3075. }
  3076. }
  3077. return 0;
  3078. }
  3079. static void qeth_flush_buffers(struct qeth_qdio_out_q *queue, int index,
  3080. int count)
  3081. {
  3082. struct qeth_qdio_out_buffer *buf;
  3083. int rc;
  3084. int i;
  3085. unsigned int qdio_flags;
  3086. for (i = index; i < index + count; ++i) {
  3087. int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
  3088. buf = queue->bufs[bidx];
  3089. buf->buffer->element[buf->next_element_to_fill - 1].eflags |=
  3090. SBAL_EFLAGS_LAST_ENTRY;
  3091. if (queue->bufstates)
  3092. queue->bufstates[bidx].user = buf;
  3093. if (queue->card->info.type == QETH_CARD_TYPE_IQD)
  3094. continue;
  3095. if (!queue->do_pack) {
  3096. if ((atomic_read(&queue->used_buffers) >=
  3097. (QETH_HIGH_WATERMARK_PACK -
  3098. QETH_WATERMARK_PACK_FUZZ)) &&
  3099. !atomic_read(&queue->set_pci_flags_count)) {
  3100. /* it's likely that we'll go to packing
  3101. * mode soon */
  3102. atomic_inc(&queue->set_pci_flags_count);
  3103. buf->buffer->element[0].sflags |= SBAL_SFLAGS0_PCI_REQ;
  3104. }
  3105. } else {
  3106. if (!atomic_read(&queue->set_pci_flags_count)) {
  3107. /*
  3108. * there's no outstanding PCI any more, so we
  3109. * have to request a PCI to be sure the the PCI
  3110. * will wake at some time in the future then we
  3111. * can flush packed buffers that might still be
  3112. * hanging around, which can happen if no
  3113. * further send was requested by the stack
  3114. */
  3115. atomic_inc(&queue->set_pci_flags_count);
  3116. buf->buffer->element[0].sflags |= SBAL_SFLAGS0_PCI_REQ;
  3117. }
  3118. }
  3119. }
  3120. netif_trans_update(queue->card->dev);
  3121. if (queue->card->options.performance_stats) {
  3122. queue->card->perf_stats.outbound_do_qdio_cnt++;
  3123. queue->card->perf_stats.outbound_do_qdio_start_time =
  3124. qeth_get_micros();
  3125. }
  3126. qdio_flags = QDIO_FLAG_SYNC_OUTPUT;
  3127. if (atomic_read(&queue->set_pci_flags_count))
  3128. qdio_flags |= QDIO_FLAG_PCI_OUT;
  3129. rc = do_QDIO(CARD_DDEV(queue->card), qdio_flags,
  3130. queue->queue_no, index, count);
  3131. if (queue->card->options.performance_stats)
  3132. queue->card->perf_stats.outbound_do_qdio_time +=
  3133. qeth_get_micros() -
  3134. queue->card->perf_stats.outbound_do_qdio_start_time;
  3135. atomic_add(count, &queue->used_buffers);
  3136. if (rc) {
  3137. queue->card->stats.tx_errors += count;
  3138. /* ignore temporary SIGA errors without busy condition */
  3139. if (rc == -ENOBUFS)
  3140. return;
  3141. QETH_CARD_TEXT(queue->card, 2, "flushbuf");
  3142. QETH_CARD_TEXT_(queue->card, 2, " q%d", queue->queue_no);
  3143. QETH_CARD_TEXT_(queue->card, 2, " idx%d", index);
  3144. QETH_CARD_TEXT_(queue->card, 2, " c%d", count);
  3145. QETH_CARD_TEXT_(queue->card, 2, " err%d", rc);
  3146. /* this must not happen under normal circumstances. if it
  3147. * happens something is really wrong -> recover */
  3148. qeth_schedule_recovery(queue->card);
  3149. return;
  3150. }
  3151. if (queue->card->options.performance_stats)
  3152. queue->card->perf_stats.bufs_sent += count;
  3153. }
  3154. static void qeth_check_outbound_queue(struct qeth_qdio_out_q *queue)
  3155. {
  3156. int index;
  3157. int flush_cnt = 0;
  3158. int q_was_packing = 0;
  3159. /*
  3160. * check if weed have to switch to non-packing mode or if
  3161. * we have to get a pci flag out on the queue
  3162. */
  3163. if ((atomic_read(&queue->used_buffers) <= QETH_LOW_WATERMARK_PACK) ||
  3164. !atomic_read(&queue->set_pci_flags_count)) {
  3165. if (atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH) ==
  3166. QETH_OUT_Q_UNLOCKED) {
  3167. /*
  3168. * If we get in here, there was no action in
  3169. * do_send_packet. So, we check if there is a
  3170. * packing buffer to be flushed here.
  3171. */
  3172. netif_stop_queue(queue->card->dev);
  3173. index = queue->next_buf_to_fill;
  3174. q_was_packing = queue->do_pack;
  3175. /* queue->do_pack may change */
  3176. barrier();
  3177. flush_cnt += qeth_switch_to_nonpacking_if_needed(queue);
  3178. if (!flush_cnt &&
  3179. !atomic_read(&queue->set_pci_flags_count))
  3180. flush_cnt += qeth_prep_flush_pack_buffer(queue);
  3181. if (queue->card->options.performance_stats &&
  3182. q_was_packing)
  3183. queue->card->perf_stats.bufs_sent_pack +=
  3184. flush_cnt;
  3185. if (flush_cnt)
  3186. qeth_flush_buffers(queue, index, flush_cnt);
  3187. atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
  3188. }
  3189. }
  3190. }
  3191. void qeth_qdio_start_poll(struct ccw_device *ccwdev, int queue,
  3192. unsigned long card_ptr)
  3193. {
  3194. struct qeth_card *card = (struct qeth_card *)card_ptr;
  3195. if (card->dev && (card->dev->flags & IFF_UP))
  3196. napi_schedule(&card->napi);
  3197. }
  3198. EXPORT_SYMBOL_GPL(qeth_qdio_start_poll);
  3199. int qeth_configure_cq(struct qeth_card *card, enum qeth_cq cq)
  3200. {
  3201. int rc;
  3202. if (card->options.cq == QETH_CQ_NOTAVAILABLE) {
  3203. rc = -1;
  3204. goto out;
  3205. } else {
  3206. if (card->options.cq == cq) {
  3207. rc = 0;
  3208. goto out;
  3209. }
  3210. if (card->state != CARD_STATE_DOWN &&
  3211. card->state != CARD_STATE_RECOVER) {
  3212. rc = -1;
  3213. goto out;
  3214. }
  3215. qeth_free_qdio_buffers(card);
  3216. card->options.cq = cq;
  3217. rc = 0;
  3218. }
  3219. out:
  3220. return rc;
  3221. }
  3222. EXPORT_SYMBOL_GPL(qeth_configure_cq);
  3223. static void qeth_qdio_cq_handler(struct qeth_card *card,
  3224. unsigned int qdio_err,
  3225. unsigned int queue, int first_element, int count) {
  3226. struct qeth_qdio_q *cq = card->qdio.c_q;
  3227. int i;
  3228. int rc;
  3229. if (!qeth_is_cq(card, queue))
  3230. goto out;
  3231. QETH_CARD_TEXT_(card, 5, "qcqhe%d", first_element);
  3232. QETH_CARD_TEXT_(card, 5, "qcqhc%d", count);
  3233. QETH_CARD_TEXT_(card, 5, "qcqherr%d", qdio_err);
  3234. if (qdio_err) {
  3235. netif_stop_queue(card->dev);
  3236. qeth_schedule_recovery(card);
  3237. goto out;
  3238. }
  3239. if (card->options.performance_stats) {
  3240. card->perf_stats.cq_cnt++;
  3241. card->perf_stats.cq_start_time = qeth_get_micros();
  3242. }
  3243. for (i = first_element; i < first_element + count; ++i) {
  3244. int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
  3245. struct qdio_buffer *buffer = cq->qdio_bufs[bidx];
  3246. int e;
  3247. e = 0;
  3248. while ((e < QDIO_MAX_ELEMENTS_PER_BUFFER) &&
  3249. buffer->element[e].addr) {
  3250. unsigned long phys_aob_addr;
  3251. phys_aob_addr = (unsigned long) buffer->element[e].addr;
  3252. qeth_qdio_handle_aob(card, phys_aob_addr);
  3253. buffer->element[e].addr = NULL;
  3254. buffer->element[e].eflags = 0;
  3255. buffer->element[e].sflags = 0;
  3256. buffer->element[e].length = 0;
  3257. ++e;
  3258. }
  3259. buffer->element[15].eflags = 0;
  3260. buffer->element[15].sflags = 0;
  3261. }
  3262. rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, queue,
  3263. card->qdio.c_q->next_buf_to_init,
  3264. count);
  3265. if (rc) {
  3266. dev_warn(&card->gdev->dev,
  3267. "QDIO reported an error, rc=%i\n", rc);
  3268. QETH_CARD_TEXT(card, 2, "qcqherr");
  3269. }
  3270. card->qdio.c_q->next_buf_to_init = (card->qdio.c_q->next_buf_to_init
  3271. + count) % QDIO_MAX_BUFFERS_PER_Q;
  3272. netif_wake_queue(card->dev);
  3273. if (card->options.performance_stats) {
  3274. int delta_t = qeth_get_micros();
  3275. delta_t -= card->perf_stats.cq_start_time;
  3276. card->perf_stats.cq_time += delta_t;
  3277. }
  3278. out:
  3279. return;
  3280. }
  3281. void qeth_qdio_input_handler(struct ccw_device *ccwdev, unsigned int qdio_err,
  3282. unsigned int queue, int first_elem, int count,
  3283. unsigned long card_ptr)
  3284. {
  3285. struct qeth_card *card = (struct qeth_card *)card_ptr;
  3286. QETH_CARD_TEXT_(card, 2, "qihq%d", queue);
  3287. QETH_CARD_TEXT_(card, 2, "qiec%d", qdio_err);
  3288. if (qeth_is_cq(card, queue))
  3289. qeth_qdio_cq_handler(card, qdio_err, queue, first_elem, count);
  3290. else if (qdio_err)
  3291. qeth_schedule_recovery(card);
  3292. }
  3293. EXPORT_SYMBOL_GPL(qeth_qdio_input_handler);
  3294. void qeth_qdio_output_handler(struct ccw_device *ccwdev,
  3295. unsigned int qdio_error, int __queue, int first_element,
  3296. int count, unsigned long card_ptr)
  3297. {
  3298. struct qeth_card *card = (struct qeth_card *) card_ptr;
  3299. struct qeth_qdio_out_q *queue = card->qdio.out_qs[__queue];
  3300. struct qeth_qdio_out_buffer *buffer;
  3301. int i;
  3302. QETH_CARD_TEXT(card, 6, "qdouhdl");
  3303. if (qdio_error & QDIO_ERROR_FATAL) {
  3304. QETH_CARD_TEXT(card, 2, "achkcond");
  3305. netif_stop_queue(card->dev);
  3306. qeth_schedule_recovery(card);
  3307. return;
  3308. }
  3309. if (card->options.performance_stats) {
  3310. card->perf_stats.outbound_handler_cnt++;
  3311. card->perf_stats.outbound_handler_start_time =
  3312. qeth_get_micros();
  3313. }
  3314. for (i = first_element; i < (first_element + count); ++i) {
  3315. int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
  3316. buffer = queue->bufs[bidx];
  3317. qeth_handle_send_error(card, buffer, qdio_error);
  3318. if (queue->bufstates &&
  3319. (queue->bufstates[bidx].flags &
  3320. QDIO_OUTBUF_STATE_FLAG_PENDING) != 0) {
  3321. WARN_ON_ONCE(card->options.cq != QETH_CQ_ENABLED);
  3322. if (atomic_cmpxchg(&buffer->state,
  3323. QETH_QDIO_BUF_PRIMED,
  3324. QETH_QDIO_BUF_PENDING) ==
  3325. QETH_QDIO_BUF_PRIMED) {
  3326. qeth_notify_skbs(queue, buffer,
  3327. TX_NOTIFY_PENDING);
  3328. }
  3329. buffer->aob = queue->bufstates[bidx].aob;
  3330. QETH_CARD_TEXT_(queue->card, 5, "pel%d", bidx);
  3331. QETH_CARD_TEXT(queue->card, 5, "aob");
  3332. QETH_CARD_TEXT_(queue->card, 5, "%lx",
  3333. virt_to_phys(buffer->aob));
  3334. if (qeth_init_qdio_out_buf(queue, bidx)) {
  3335. QETH_CARD_TEXT(card, 2, "outofbuf");
  3336. qeth_schedule_recovery(card);
  3337. }
  3338. } else {
  3339. if (card->options.cq == QETH_CQ_ENABLED) {
  3340. enum iucv_tx_notify n;
  3341. n = qeth_compute_cq_notification(
  3342. buffer->buffer->element[15].sflags, 0);
  3343. qeth_notify_skbs(queue, buffer, n);
  3344. }
  3345. qeth_clear_output_buffer(queue, buffer,
  3346. QETH_QDIO_BUF_EMPTY);
  3347. }
  3348. qeth_cleanup_handled_pending(queue, bidx, 0);
  3349. }
  3350. atomic_sub(count, &queue->used_buffers);
  3351. /* check if we need to do something on this outbound queue */
  3352. if (card->info.type != QETH_CARD_TYPE_IQD)
  3353. qeth_check_outbound_queue(queue);
  3354. netif_wake_queue(queue->card->dev);
  3355. if (card->options.performance_stats)
  3356. card->perf_stats.outbound_handler_time += qeth_get_micros() -
  3357. card->perf_stats.outbound_handler_start_time;
  3358. }
  3359. EXPORT_SYMBOL_GPL(qeth_qdio_output_handler);
  3360. /* We cannot use outbound queue 3 for unicast packets on HiperSockets */
  3361. static inline int qeth_cut_iqd_prio(struct qeth_card *card, int queue_num)
  3362. {
  3363. if ((card->info.type == QETH_CARD_TYPE_IQD) && (queue_num == 3))
  3364. return 2;
  3365. return queue_num;
  3366. }
  3367. /**
  3368. * Note: Function assumes that we have 4 outbound queues.
  3369. */
  3370. int qeth_get_priority_queue(struct qeth_card *card, struct sk_buff *skb,
  3371. int ipv, int cast_type)
  3372. {
  3373. __be16 *tci;
  3374. u8 tos;
  3375. if (cast_type && card->info.is_multicast_different)
  3376. return card->info.is_multicast_different &
  3377. (card->qdio.no_out_queues - 1);
  3378. switch (card->qdio.do_prio_queueing) {
  3379. case QETH_PRIO_Q_ING_TOS:
  3380. case QETH_PRIO_Q_ING_PREC:
  3381. switch (ipv) {
  3382. case 4:
  3383. tos = ipv4_get_dsfield(ip_hdr(skb));
  3384. break;
  3385. case 6:
  3386. tos = ipv6_get_dsfield(ipv6_hdr(skb));
  3387. break;
  3388. default:
  3389. return card->qdio.default_out_queue;
  3390. }
  3391. if (card->qdio.do_prio_queueing == QETH_PRIO_Q_ING_PREC)
  3392. return qeth_cut_iqd_prio(card, ~tos >> 6 & 3);
  3393. if (tos & IPTOS_MINCOST)
  3394. return qeth_cut_iqd_prio(card, 3);
  3395. if (tos & IPTOS_RELIABILITY)
  3396. return 2;
  3397. if (tos & IPTOS_THROUGHPUT)
  3398. return 1;
  3399. if (tos & IPTOS_LOWDELAY)
  3400. return 0;
  3401. break;
  3402. case QETH_PRIO_Q_ING_SKB:
  3403. if (skb->priority > 5)
  3404. return 0;
  3405. return qeth_cut_iqd_prio(card, ~skb->priority >> 1 & 3);
  3406. case QETH_PRIO_Q_ING_VLAN:
  3407. tci = &((struct ethhdr *)skb->data)->h_proto;
  3408. if (be16_to_cpu(*tci) == ETH_P_8021Q)
  3409. return qeth_cut_iqd_prio(card,
  3410. ~be16_to_cpu(*(tci + 1)) >> (VLAN_PRIO_SHIFT + 1) & 3);
  3411. break;
  3412. default:
  3413. break;
  3414. }
  3415. return card->qdio.default_out_queue;
  3416. }
  3417. EXPORT_SYMBOL_GPL(qeth_get_priority_queue);
  3418. /**
  3419. * qeth_get_elements_for_frags() - find number of SBALEs for skb frags.
  3420. * @skb: SKB address
  3421. *
  3422. * Returns the number of pages, and thus QDIO buffer elements, needed to cover
  3423. * fragmented part of the SKB. Returns zero for linear SKB.
  3424. */
  3425. int qeth_get_elements_for_frags(struct sk_buff *skb)
  3426. {
  3427. int cnt, elements = 0;
  3428. for (cnt = 0; cnt < skb_shinfo(skb)->nr_frags; cnt++) {
  3429. struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[cnt];
  3430. elements += qeth_get_elements_for_range(
  3431. (addr_t)skb_frag_address(frag),
  3432. (addr_t)skb_frag_address(frag) + skb_frag_size(frag));
  3433. }
  3434. return elements;
  3435. }
  3436. EXPORT_SYMBOL_GPL(qeth_get_elements_for_frags);
  3437. /**
  3438. * qeth_get_elements_no() - find number of SBALEs for skb data, inc. frags.
  3439. * @card: qeth card structure, to check max. elems.
  3440. * @skb: SKB address
  3441. * @extra_elems: extra elems needed, to check against max.
  3442. * @data_offset: range starts at skb->data + data_offset
  3443. *
  3444. * Returns the number of pages, and thus QDIO buffer elements, needed to cover
  3445. * skb data, including linear part and fragments. Checks if the result plus
  3446. * extra_elems fits under the limit for the card. Returns 0 if it does not.
  3447. * Note: extra_elems is not included in the returned result.
  3448. */
  3449. int qeth_get_elements_no(struct qeth_card *card,
  3450. struct sk_buff *skb, int extra_elems, int data_offset)
  3451. {
  3452. addr_t end = (addr_t)skb->data + skb_headlen(skb);
  3453. int elements = qeth_get_elements_for_frags(skb);
  3454. addr_t start = (addr_t)skb->data + data_offset;
  3455. if (start != end)
  3456. elements += qeth_get_elements_for_range(start, end);
  3457. if ((elements + extra_elems) > QETH_MAX_BUFFER_ELEMENTS(card)) {
  3458. QETH_DBF_MESSAGE(2, "Invalid size of IP packet "
  3459. "(Number=%d / Length=%d). Discarded.\n",
  3460. elements + extra_elems, skb->len);
  3461. return 0;
  3462. }
  3463. return elements;
  3464. }
  3465. EXPORT_SYMBOL_GPL(qeth_get_elements_no);
  3466. int qeth_hdr_chk_and_bounce(struct sk_buff *skb, struct qeth_hdr **hdr, int len)
  3467. {
  3468. int hroom, inpage, rest;
  3469. if (((unsigned long)skb->data & PAGE_MASK) !=
  3470. (((unsigned long)skb->data + len - 1) & PAGE_MASK)) {
  3471. hroom = skb_headroom(skb);
  3472. inpage = PAGE_SIZE - ((unsigned long) skb->data % PAGE_SIZE);
  3473. rest = len - inpage;
  3474. if (rest > hroom)
  3475. return 1;
  3476. memmove(skb->data - rest, skb->data, skb_headlen(skb));
  3477. skb->data -= rest;
  3478. skb->tail -= rest;
  3479. *hdr = (struct qeth_hdr *)skb->data;
  3480. QETH_DBF_MESSAGE(2, "skb bounce len: %d rest: %d\n", len, rest);
  3481. }
  3482. return 0;
  3483. }
  3484. EXPORT_SYMBOL_GPL(qeth_hdr_chk_and_bounce);
  3485. /**
  3486. * qeth_push_hdr() - push a qeth_hdr onto an skb.
  3487. * @skb: skb that the qeth_hdr should be pushed onto.
  3488. * @hdr: double pointer to a qeth_hdr. When returning with >= 0,
  3489. * it contains a valid pointer to a qeth_hdr.
  3490. * @len: length of the hdr that needs to be pushed on.
  3491. *
  3492. * Returns the pushed length. If the header can't be pushed on
  3493. * (eg. because it would cross a page boundary), it is allocated from
  3494. * the cache instead and 0 is returned.
  3495. * Error to create the hdr is indicated by returning with < 0.
  3496. */
  3497. int qeth_push_hdr(struct sk_buff *skb, struct qeth_hdr **hdr, unsigned int len)
  3498. {
  3499. if (skb_headroom(skb) >= len &&
  3500. qeth_get_elements_for_range((addr_t)skb->data - len,
  3501. (addr_t)skb->data) == 1) {
  3502. *hdr = skb_push(skb, len);
  3503. return len;
  3504. }
  3505. /* fall back */
  3506. *hdr = kmem_cache_alloc(qeth_core_header_cache, GFP_ATOMIC);
  3507. if (!*hdr)
  3508. return -ENOMEM;
  3509. return 0;
  3510. }
  3511. EXPORT_SYMBOL_GPL(qeth_push_hdr);
  3512. static void __qeth_fill_buffer(struct sk_buff *skb,
  3513. struct qeth_qdio_out_buffer *buf,
  3514. bool is_first_elem, unsigned int offset)
  3515. {
  3516. struct qdio_buffer *buffer = buf->buffer;
  3517. int element = buf->next_element_to_fill;
  3518. int length = skb_headlen(skb) - offset;
  3519. char *data = skb->data + offset;
  3520. int length_here, cnt;
  3521. /* map linear part into buffer element(s) */
  3522. while (length > 0) {
  3523. /* length_here is the remaining amount of data in this page */
  3524. length_here = PAGE_SIZE - ((unsigned long) data % PAGE_SIZE);
  3525. if (length < length_here)
  3526. length_here = length;
  3527. buffer->element[element].addr = data;
  3528. buffer->element[element].length = length_here;
  3529. length -= length_here;
  3530. if (is_first_elem) {
  3531. is_first_elem = false;
  3532. if (length || skb_is_nonlinear(skb))
  3533. /* skb needs additional elements */
  3534. buffer->element[element].eflags =
  3535. SBAL_EFLAGS_FIRST_FRAG;
  3536. else
  3537. buffer->element[element].eflags = 0;
  3538. } else {
  3539. buffer->element[element].eflags =
  3540. SBAL_EFLAGS_MIDDLE_FRAG;
  3541. }
  3542. data += length_here;
  3543. element++;
  3544. }
  3545. /* map page frags into buffer element(s) */
  3546. for (cnt = 0; cnt < skb_shinfo(skb)->nr_frags; cnt++) {
  3547. skb_frag_t *frag = &skb_shinfo(skb)->frags[cnt];
  3548. data = skb_frag_address(frag);
  3549. length = skb_frag_size(frag);
  3550. while (length > 0) {
  3551. length_here = PAGE_SIZE -
  3552. ((unsigned long) data % PAGE_SIZE);
  3553. if (length < length_here)
  3554. length_here = length;
  3555. buffer->element[element].addr = data;
  3556. buffer->element[element].length = length_here;
  3557. buffer->element[element].eflags =
  3558. SBAL_EFLAGS_MIDDLE_FRAG;
  3559. length -= length_here;
  3560. data += length_here;
  3561. element++;
  3562. }
  3563. }
  3564. if (buffer->element[element - 1].eflags)
  3565. buffer->element[element - 1].eflags = SBAL_EFLAGS_LAST_FRAG;
  3566. buf->next_element_to_fill = element;
  3567. }
  3568. /**
  3569. * qeth_fill_buffer() - map skb into an output buffer
  3570. * @queue: QDIO queue to submit the buffer on
  3571. * @buf: buffer to transport the skb
  3572. * @skb: skb to map into the buffer
  3573. * @hdr: qeth_hdr for this skb. Either at skb->data, or allocated
  3574. * from qeth_core_header_cache.
  3575. * @offset: when mapping the skb, start at skb->data + offset
  3576. * @hd_len: if > 0, build a dedicated header element of this size
  3577. */
  3578. static int qeth_fill_buffer(struct qeth_qdio_out_q *queue,
  3579. struct qeth_qdio_out_buffer *buf,
  3580. struct sk_buff *skb, struct qeth_hdr *hdr,
  3581. unsigned int offset, unsigned int hd_len)
  3582. {
  3583. struct qdio_buffer *buffer = buf->buffer;
  3584. bool is_first_elem = true;
  3585. int flush_cnt = 0;
  3586. refcount_inc(&skb->users);
  3587. skb_queue_tail(&buf->skb_list, skb);
  3588. /* build dedicated header element */
  3589. if (hd_len) {
  3590. int element = buf->next_element_to_fill;
  3591. is_first_elem = false;
  3592. buffer->element[element].addr = hdr;
  3593. buffer->element[element].length = hd_len;
  3594. buffer->element[element].eflags = SBAL_EFLAGS_FIRST_FRAG;
  3595. /* remember to free cache-allocated qeth_hdr: */
  3596. buf->is_header[element] = ((void *)hdr != skb->data);
  3597. buf->next_element_to_fill++;
  3598. }
  3599. __qeth_fill_buffer(skb, buf, is_first_elem, offset);
  3600. if (!queue->do_pack) {
  3601. QETH_CARD_TEXT(queue->card, 6, "fillbfnp");
  3602. /* set state to PRIMED -> will be flushed */
  3603. atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
  3604. flush_cnt = 1;
  3605. } else {
  3606. QETH_CARD_TEXT(queue->card, 6, "fillbfpa");
  3607. if (queue->card->options.performance_stats)
  3608. queue->card->perf_stats.skbs_sent_pack++;
  3609. if (buf->next_element_to_fill >=
  3610. QETH_MAX_BUFFER_ELEMENTS(queue->card)) {
  3611. /*
  3612. * packed buffer if full -> set state PRIMED
  3613. * -> will be flushed
  3614. */
  3615. atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
  3616. flush_cnt = 1;
  3617. }
  3618. }
  3619. return flush_cnt;
  3620. }
  3621. int qeth_do_send_packet_fast(struct qeth_qdio_out_q *queue, struct sk_buff *skb,
  3622. struct qeth_hdr *hdr, unsigned int offset,
  3623. unsigned int hd_len)
  3624. {
  3625. int index = queue->next_buf_to_fill;
  3626. struct qeth_qdio_out_buffer *buffer = queue->bufs[index];
  3627. /*
  3628. * check if buffer is empty to make sure that we do not 'overtake'
  3629. * ourselves and try to fill a buffer that is already primed
  3630. */
  3631. if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY)
  3632. return -EBUSY;
  3633. queue->next_buf_to_fill = (index + 1) % QDIO_MAX_BUFFERS_PER_Q;
  3634. qeth_fill_buffer(queue, buffer, skb, hdr, offset, hd_len);
  3635. qeth_flush_buffers(queue, index, 1);
  3636. return 0;
  3637. }
  3638. EXPORT_SYMBOL_GPL(qeth_do_send_packet_fast);
  3639. int qeth_do_send_packet(struct qeth_card *card, struct qeth_qdio_out_q *queue,
  3640. struct sk_buff *skb, struct qeth_hdr *hdr,
  3641. unsigned int offset, unsigned int hd_len,
  3642. int elements_needed)
  3643. {
  3644. struct qeth_qdio_out_buffer *buffer;
  3645. int start_index;
  3646. int flush_count = 0;
  3647. int do_pack = 0;
  3648. int tmp;
  3649. int rc = 0;
  3650. /* spin until we get the queue ... */
  3651. while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED,
  3652. QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED);
  3653. start_index = queue->next_buf_to_fill;
  3654. buffer = queue->bufs[queue->next_buf_to_fill];
  3655. /*
  3656. * check if buffer is empty to make sure that we do not 'overtake'
  3657. * ourselves and try to fill a buffer that is already primed
  3658. */
  3659. if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY) {
  3660. atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
  3661. return -EBUSY;
  3662. }
  3663. /* check if we need to switch packing state of this queue */
  3664. qeth_switch_to_packing_if_needed(queue);
  3665. if (queue->do_pack) {
  3666. do_pack = 1;
  3667. /* does packet fit in current buffer? */
  3668. if ((QETH_MAX_BUFFER_ELEMENTS(card) -
  3669. buffer->next_element_to_fill) < elements_needed) {
  3670. /* ... no -> set state PRIMED */
  3671. atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED);
  3672. flush_count++;
  3673. queue->next_buf_to_fill =
  3674. (queue->next_buf_to_fill + 1) %
  3675. QDIO_MAX_BUFFERS_PER_Q;
  3676. buffer = queue->bufs[queue->next_buf_to_fill];
  3677. /* we did a step forward, so check buffer state
  3678. * again */
  3679. if (atomic_read(&buffer->state) !=
  3680. QETH_QDIO_BUF_EMPTY) {
  3681. qeth_flush_buffers(queue, start_index,
  3682. flush_count);
  3683. atomic_set(&queue->state,
  3684. QETH_OUT_Q_UNLOCKED);
  3685. rc = -EBUSY;
  3686. goto out;
  3687. }
  3688. }
  3689. }
  3690. tmp = qeth_fill_buffer(queue, buffer, skb, hdr, offset, hd_len);
  3691. queue->next_buf_to_fill = (queue->next_buf_to_fill + tmp) %
  3692. QDIO_MAX_BUFFERS_PER_Q;
  3693. flush_count += tmp;
  3694. if (flush_count)
  3695. qeth_flush_buffers(queue, start_index, flush_count);
  3696. else if (!atomic_read(&queue->set_pci_flags_count))
  3697. atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH);
  3698. /*
  3699. * queue->state will go from LOCKED -> UNLOCKED or from
  3700. * LOCKED_FLUSH -> LOCKED if output_handler wanted to 'notify' us
  3701. * (switch packing state or flush buffer to get another pci flag out).
  3702. * In that case we will enter this loop
  3703. */
  3704. while (atomic_dec_return(&queue->state)) {
  3705. start_index = queue->next_buf_to_fill;
  3706. /* check if we can go back to non-packing state */
  3707. tmp = qeth_switch_to_nonpacking_if_needed(queue);
  3708. /*
  3709. * check if we need to flush a packing buffer to get a pci
  3710. * flag out on the queue
  3711. */
  3712. if (!tmp && !atomic_read(&queue->set_pci_flags_count))
  3713. tmp = qeth_prep_flush_pack_buffer(queue);
  3714. if (tmp) {
  3715. qeth_flush_buffers(queue, start_index, tmp);
  3716. flush_count += tmp;
  3717. }
  3718. }
  3719. out:
  3720. /* at this point the queue is UNLOCKED again */
  3721. if (queue->card->options.performance_stats && do_pack)
  3722. queue->card->perf_stats.bufs_sent_pack += flush_count;
  3723. return rc;
  3724. }
  3725. EXPORT_SYMBOL_GPL(qeth_do_send_packet);
  3726. static int qeth_setadp_promisc_mode_cb(struct qeth_card *card,
  3727. struct qeth_reply *reply, unsigned long data)
  3728. {
  3729. struct qeth_ipa_cmd *cmd = (struct qeth_ipa_cmd *) data;
  3730. struct qeth_ipacmd_setadpparms *setparms;
  3731. QETH_CARD_TEXT(card, 4, "prmadpcb");
  3732. setparms = &(cmd->data.setadapterparms);
  3733. if (qeth_setadpparms_inspect_rc(cmd)) {
  3734. QETH_CARD_TEXT_(card, 4, "prmrc%x", cmd->hdr.return_code);
  3735. setparms->data.mode = SET_PROMISC_MODE_OFF;
  3736. }
  3737. card->info.promisc_mode = setparms->data.mode;
  3738. return 0;
  3739. }
  3740. void qeth_setadp_promisc_mode(struct qeth_card *card)
  3741. {
  3742. enum qeth_ipa_promisc_modes mode;
  3743. struct net_device *dev = card->dev;
  3744. struct qeth_cmd_buffer *iob;
  3745. struct qeth_ipa_cmd *cmd;
  3746. QETH_CARD_TEXT(card, 4, "setprom");
  3747. if (((dev->flags & IFF_PROMISC) &&
  3748. (card->info.promisc_mode == SET_PROMISC_MODE_ON)) ||
  3749. (!(dev->flags & IFF_PROMISC) &&
  3750. (card->info.promisc_mode == SET_PROMISC_MODE_OFF)))
  3751. return;
  3752. mode = SET_PROMISC_MODE_OFF;
  3753. if (dev->flags & IFF_PROMISC)
  3754. mode = SET_PROMISC_MODE_ON;
  3755. QETH_CARD_TEXT_(card, 4, "mode:%x", mode);
  3756. iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_PROMISC_MODE,
  3757. sizeof(struct qeth_ipacmd_setadpparms_hdr) + 8);
  3758. if (!iob)
  3759. return;
  3760. cmd = __ipa_cmd(iob);
  3761. cmd->data.setadapterparms.data.mode = mode;
  3762. qeth_send_ipa_cmd(card, iob, qeth_setadp_promisc_mode_cb, NULL);
  3763. }
  3764. EXPORT_SYMBOL_GPL(qeth_setadp_promisc_mode);
  3765. int qeth_change_mtu(struct net_device *dev, int new_mtu)
  3766. {
  3767. struct qeth_card *card;
  3768. char dbf_text[15];
  3769. card = dev->ml_priv;
  3770. QETH_CARD_TEXT(card, 4, "chgmtu");
  3771. sprintf(dbf_text, "%8x", new_mtu);
  3772. QETH_CARD_TEXT(card, 4, dbf_text);
  3773. if (!qeth_mtu_is_valid(card, new_mtu))
  3774. return -EINVAL;
  3775. dev->mtu = new_mtu;
  3776. return 0;
  3777. }
  3778. EXPORT_SYMBOL_GPL(qeth_change_mtu);
  3779. struct net_device_stats *qeth_get_stats(struct net_device *dev)
  3780. {
  3781. struct qeth_card *card;
  3782. card = dev->ml_priv;
  3783. QETH_CARD_TEXT(card, 5, "getstat");
  3784. return &card->stats;
  3785. }
  3786. EXPORT_SYMBOL_GPL(qeth_get_stats);
  3787. static int qeth_setadpparms_change_macaddr_cb(struct qeth_card *card,
  3788. struct qeth_reply *reply, unsigned long data)
  3789. {
  3790. struct qeth_ipa_cmd *cmd = (struct qeth_ipa_cmd *) data;
  3791. QETH_CARD_TEXT(card, 4, "chgmaccb");
  3792. if (qeth_setadpparms_inspect_rc(cmd))
  3793. return 0;
  3794. if (!card->options.layer2 ||
  3795. !(card->info.mac_bits & QETH_LAYER2_MAC_READ)) {
  3796. ether_addr_copy(card->dev->dev_addr,
  3797. cmd->data.setadapterparms.data.change_addr.addr);
  3798. card->info.mac_bits |= QETH_LAYER2_MAC_READ;
  3799. }
  3800. return 0;
  3801. }
  3802. int qeth_setadpparms_change_macaddr(struct qeth_card *card)
  3803. {
  3804. int rc;
  3805. struct qeth_cmd_buffer *iob;
  3806. struct qeth_ipa_cmd *cmd;
  3807. QETH_CARD_TEXT(card, 4, "chgmac");
  3808. iob = qeth_get_adapter_cmd(card, IPA_SETADP_ALTER_MAC_ADDRESS,
  3809. sizeof(struct qeth_ipacmd_setadpparms_hdr) +
  3810. sizeof(struct qeth_change_addr));
  3811. if (!iob)
  3812. return -ENOMEM;
  3813. cmd = __ipa_cmd(iob);
  3814. cmd->data.setadapterparms.data.change_addr.cmd = CHANGE_ADDR_READ_MAC;
  3815. cmd->data.setadapterparms.data.change_addr.addr_size = ETH_ALEN;
  3816. ether_addr_copy(cmd->data.setadapterparms.data.change_addr.addr,
  3817. card->dev->dev_addr);
  3818. rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_change_macaddr_cb,
  3819. NULL);
  3820. return rc;
  3821. }
  3822. EXPORT_SYMBOL_GPL(qeth_setadpparms_change_macaddr);
  3823. static int qeth_setadpparms_set_access_ctrl_cb(struct qeth_card *card,
  3824. struct qeth_reply *reply, unsigned long data)
  3825. {
  3826. struct qeth_ipa_cmd *cmd = (struct qeth_ipa_cmd *) data;
  3827. struct qeth_set_access_ctrl *access_ctrl_req;
  3828. int fallback = *(int *)reply->param;
  3829. QETH_CARD_TEXT(card, 4, "setaccb");
  3830. if (cmd->hdr.return_code)
  3831. return 0;
  3832. qeth_setadpparms_inspect_rc(cmd);
  3833. access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl;
  3834. QETH_DBF_TEXT_(SETUP, 2, "setaccb");
  3835. QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name);
  3836. QETH_DBF_TEXT_(SETUP, 2, "rc=%d",
  3837. cmd->data.setadapterparms.hdr.return_code);
  3838. if (cmd->data.setadapterparms.hdr.return_code !=
  3839. SET_ACCESS_CTRL_RC_SUCCESS)
  3840. QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_CTRL(%s,%d)==%d\n",
  3841. card->gdev->dev.kobj.name,
  3842. access_ctrl_req->subcmd_code,
  3843. cmd->data.setadapterparms.hdr.return_code);
  3844. switch (cmd->data.setadapterparms.hdr.return_code) {
  3845. case SET_ACCESS_CTRL_RC_SUCCESS:
  3846. if (card->options.isolation == ISOLATION_MODE_NONE) {
  3847. dev_info(&card->gdev->dev,
  3848. "QDIO data connection isolation is deactivated\n");
  3849. } else {
  3850. dev_info(&card->gdev->dev,
  3851. "QDIO data connection isolation is activated\n");
  3852. }
  3853. break;
  3854. case SET_ACCESS_CTRL_RC_ALREADY_NOT_ISOLATED:
  3855. QETH_DBF_MESSAGE(2, "%s QDIO data connection isolation already "
  3856. "deactivated\n", dev_name(&card->gdev->dev));
  3857. if (fallback)
  3858. card->options.isolation = card->options.prev_isolation;
  3859. break;
  3860. case SET_ACCESS_CTRL_RC_ALREADY_ISOLATED:
  3861. QETH_DBF_MESSAGE(2, "%s QDIO data connection isolation already"
  3862. " activated\n", dev_name(&card->gdev->dev));
  3863. if (fallback)
  3864. card->options.isolation = card->options.prev_isolation;
  3865. break;
  3866. case SET_ACCESS_CTRL_RC_NOT_SUPPORTED:
  3867. dev_err(&card->gdev->dev, "Adapter does not "
  3868. "support QDIO data connection isolation\n");
  3869. break;
  3870. case SET_ACCESS_CTRL_RC_NONE_SHARED_ADAPTER:
  3871. dev_err(&card->gdev->dev,
  3872. "Adapter is dedicated. "
  3873. "QDIO data connection isolation not supported\n");
  3874. if (fallback)
  3875. card->options.isolation = card->options.prev_isolation;
  3876. break;
  3877. case SET_ACCESS_CTRL_RC_ACTIVE_CHECKSUM_OFF:
  3878. dev_err(&card->gdev->dev,
  3879. "TSO does not permit QDIO data connection isolation\n");
  3880. if (fallback)
  3881. card->options.isolation = card->options.prev_isolation;
  3882. break;
  3883. case SET_ACCESS_CTRL_RC_REFLREL_UNSUPPORTED:
  3884. dev_err(&card->gdev->dev, "The adjacent switch port does not "
  3885. "support reflective relay mode\n");
  3886. if (fallback)
  3887. card->options.isolation = card->options.prev_isolation;
  3888. break;
  3889. case SET_ACCESS_CTRL_RC_REFLREL_FAILED:
  3890. dev_err(&card->gdev->dev, "The reflective relay mode cannot be "
  3891. "enabled at the adjacent switch port");
  3892. if (fallback)
  3893. card->options.isolation = card->options.prev_isolation;
  3894. break;
  3895. case SET_ACCESS_CTRL_RC_REFLREL_DEACT_FAILED:
  3896. dev_warn(&card->gdev->dev, "Turning off reflective relay mode "
  3897. "at the adjacent switch failed\n");
  3898. break;
  3899. default:
  3900. /* this should never happen */
  3901. if (fallback)
  3902. card->options.isolation = card->options.prev_isolation;
  3903. break;
  3904. }
  3905. return 0;
  3906. }
  3907. static int qeth_setadpparms_set_access_ctrl(struct qeth_card *card,
  3908. enum qeth_ipa_isolation_modes isolation, int fallback)
  3909. {
  3910. int rc;
  3911. struct qeth_cmd_buffer *iob;
  3912. struct qeth_ipa_cmd *cmd;
  3913. struct qeth_set_access_ctrl *access_ctrl_req;
  3914. QETH_CARD_TEXT(card, 4, "setacctl");
  3915. QETH_DBF_TEXT_(SETUP, 2, "setacctl");
  3916. QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name);
  3917. iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_ACCESS_CONTROL,
  3918. sizeof(struct qeth_ipacmd_setadpparms_hdr) +
  3919. sizeof(struct qeth_set_access_ctrl));
  3920. if (!iob)
  3921. return -ENOMEM;
  3922. cmd = __ipa_cmd(iob);
  3923. access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl;
  3924. access_ctrl_req->subcmd_code = isolation;
  3925. rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_set_access_ctrl_cb,
  3926. &fallback);
  3927. QETH_DBF_TEXT_(SETUP, 2, "rc=%d", rc);
  3928. return rc;
  3929. }
  3930. int qeth_set_access_ctrl_online(struct qeth_card *card, int fallback)
  3931. {
  3932. int rc = 0;
  3933. QETH_CARD_TEXT(card, 4, "setactlo");
  3934. if ((card->info.type == QETH_CARD_TYPE_OSD ||
  3935. card->info.type == QETH_CARD_TYPE_OSX) &&
  3936. qeth_adp_supported(card, IPA_SETADP_SET_ACCESS_CONTROL)) {
  3937. rc = qeth_setadpparms_set_access_ctrl(card,
  3938. card->options.isolation, fallback);
  3939. if (rc) {
  3940. QETH_DBF_MESSAGE(3,
  3941. "IPA(SET_ACCESS_CTRL,%s,%d) sent failed\n",
  3942. card->gdev->dev.kobj.name,
  3943. rc);
  3944. rc = -EOPNOTSUPP;
  3945. }
  3946. } else if (card->options.isolation != ISOLATION_MODE_NONE) {
  3947. card->options.isolation = ISOLATION_MODE_NONE;
  3948. dev_err(&card->gdev->dev, "Adapter does not "
  3949. "support QDIO data connection isolation\n");
  3950. rc = -EOPNOTSUPP;
  3951. }
  3952. return rc;
  3953. }
  3954. EXPORT_SYMBOL_GPL(qeth_set_access_ctrl_online);
  3955. void qeth_tx_timeout(struct net_device *dev)
  3956. {
  3957. struct qeth_card *card;
  3958. card = dev->ml_priv;
  3959. QETH_CARD_TEXT(card, 4, "txtimeo");
  3960. card->stats.tx_errors++;
  3961. qeth_schedule_recovery(card);
  3962. }
  3963. EXPORT_SYMBOL_GPL(qeth_tx_timeout);
  3964. static int qeth_mdio_read(struct net_device *dev, int phy_id, int regnum)
  3965. {
  3966. struct qeth_card *card = dev->ml_priv;
  3967. int rc = 0;
  3968. switch (regnum) {
  3969. case MII_BMCR: /* Basic mode control register */
  3970. rc = BMCR_FULLDPLX;
  3971. if ((card->info.link_type != QETH_LINK_TYPE_GBIT_ETH) &&
  3972. (card->info.link_type != QETH_LINK_TYPE_OSN) &&
  3973. (card->info.link_type != QETH_LINK_TYPE_10GBIT_ETH))
  3974. rc |= BMCR_SPEED100;
  3975. break;
  3976. case MII_BMSR: /* Basic mode status register */
  3977. rc = BMSR_ERCAP | BMSR_ANEGCOMPLETE | BMSR_LSTATUS |
  3978. BMSR_10HALF | BMSR_10FULL | BMSR_100HALF | BMSR_100FULL |
  3979. BMSR_100BASE4;
  3980. break;
  3981. case MII_PHYSID1: /* PHYS ID 1 */
  3982. rc = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 8) |
  3983. dev->dev_addr[2];
  3984. rc = (rc >> 5) & 0xFFFF;
  3985. break;
  3986. case MII_PHYSID2: /* PHYS ID 2 */
  3987. rc = (dev->dev_addr[2] << 10) & 0xFFFF;
  3988. break;
  3989. case MII_ADVERTISE: /* Advertisement control reg */
  3990. rc = ADVERTISE_ALL;
  3991. break;
  3992. case MII_LPA: /* Link partner ability reg */
  3993. rc = LPA_10HALF | LPA_10FULL | LPA_100HALF | LPA_100FULL |
  3994. LPA_100BASE4 | LPA_LPACK;
  3995. break;
  3996. case MII_EXPANSION: /* Expansion register */
  3997. break;
  3998. case MII_DCOUNTER: /* disconnect counter */
  3999. break;
  4000. case MII_FCSCOUNTER: /* false carrier counter */
  4001. break;
  4002. case MII_NWAYTEST: /* N-way auto-neg test register */
  4003. break;
  4004. case MII_RERRCOUNTER: /* rx error counter */
  4005. rc = card->stats.rx_errors;
  4006. break;
  4007. case MII_SREVISION: /* silicon revision */
  4008. break;
  4009. case MII_RESV1: /* reserved 1 */
  4010. break;
  4011. case MII_LBRERROR: /* loopback, rx, bypass error */
  4012. break;
  4013. case MII_PHYADDR: /* physical address */
  4014. break;
  4015. case MII_RESV2: /* reserved 2 */
  4016. break;
  4017. case MII_TPISTATUS: /* TPI status for 10mbps */
  4018. break;
  4019. case MII_NCONFIG: /* network interface config */
  4020. break;
  4021. default:
  4022. break;
  4023. }
  4024. return rc;
  4025. }
  4026. static int qeth_send_ipa_snmp_cmd(struct qeth_card *card,
  4027. struct qeth_cmd_buffer *iob, int len,
  4028. int (*reply_cb)(struct qeth_card *, struct qeth_reply *,
  4029. unsigned long),
  4030. void *reply_param)
  4031. {
  4032. u16 s1, s2;
  4033. QETH_CARD_TEXT(card, 4, "sendsnmp");
  4034. memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
  4035. memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
  4036. &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
  4037. /* adjust PDU length fields in IPA_PDU_HEADER */
  4038. s1 = (u32) IPA_PDU_HEADER_SIZE + len;
  4039. s2 = (u32) len;
  4040. memcpy(QETH_IPA_PDU_LEN_TOTAL(iob->data), &s1, 2);
  4041. memcpy(QETH_IPA_PDU_LEN_PDU1(iob->data), &s2, 2);
  4042. memcpy(QETH_IPA_PDU_LEN_PDU2(iob->data), &s2, 2);
  4043. memcpy(QETH_IPA_PDU_LEN_PDU3(iob->data), &s2, 2);
  4044. return qeth_send_control_data(card, IPA_PDU_HEADER_SIZE + len, iob,
  4045. reply_cb, reply_param);
  4046. }
  4047. static int qeth_snmp_command_cb(struct qeth_card *card,
  4048. struct qeth_reply *reply, unsigned long sdata)
  4049. {
  4050. struct qeth_ipa_cmd *cmd;
  4051. struct qeth_arp_query_info *qinfo;
  4052. struct qeth_snmp_cmd *snmp;
  4053. unsigned char *data;
  4054. __u16 data_len;
  4055. QETH_CARD_TEXT(card, 3, "snpcmdcb");
  4056. cmd = (struct qeth_ipa_cmd *) sdata;
  4057. data = (unsigned char *)((char *)cmd - reply->offset);
  4058. qinfo = (struct qeth_arp_query_info *) reply->param;
  4059. snmp = &cmd->data.setadapterparms.data.snmp;
  4060. if (cmd->hdr.return_code) {
  4061. QETH_CARD_TEXT_(card, 4, "scer1%x", cmd->hdr.return_code);
  4062. return 0;
  4063. }
  4064. if (cmd->data.setadapterparms.hdr.return_code) {
  4065. cmd->hdr.return_code =
  4066. cmd->data.setadapterparms.hdr.return_code;
  4067. QETH_CARD_TEXT_(card, 4, "scer2%x", cmd->hdr.return_code);
  4068. return 0;
  4069. }
  4070. data_len = *((__u16 *)QETH_IPA_PDU_LEN_PDU1(data));
  4071. if (cmd->data.setadapterparms.hdr.seq_no == 1)
  4072. data_len -= (__u16)((char *)&snmp->data - (char *)cmd);
  4073. else
  4074. data_len -= (__u16)((char *)&snmp->request - (char *)cmd);
  4075. /* check if there is enough room in userspace */
  4076. if ((qinfo->udata_len - qinfo->udata_offset) < data_len) {
  4077. QETH_CARD_TEXT_(card, 4, "scer3%i", -ENOMEM);
  4078. cmd->hdr.return_code = IPA_RC_ENOMEM;
  4079. return 0;
  4080. }
  4081. QETH_CARD_TEXT_(card, 4, "snore%i",
  4082. cmd->data.setadapterparms.hdr.used_total);
  4083. QETH_CARD_TEXT_(card, 4, "sseqn%i",
  4084. cmd->data.setadapterparms.hdr.seq_no);
  4085. /*copy entries to user buffer*/
  4086. if (cmd->data.setadapterparms.hdr.seq_no == 1) {
  4087. memcpy(qinfo->udata + qinfo->udata_offset,
  4088. (char *)snmp,
  4089. data_len + offsetof(struct qeth_snmp_cmd, data));
  4090. qinfo->udata_offset += offsetof(struct qeth_snmp_cmd, data);
  4091. } else {
  4092. memcpy(qinfo->udata + qinfo->udata_offset,
  4093. (char *)&snmp->request, data_len);
  4094. }
  4095. qinfo->udata_offset += data_len;
  4096. /* check if all replies received ... */
  4097. QETH_CARD_TEXT_(card, 4, "srtot%i",
  4098. cmd->data.setadapterparms.hdr.used_total);
  4099. QETH_CARD_TEXT_(card, 4, "srseq%i",
  4100. cmd->data.setadapterparms.hdr.seq_no);
  4101. if (cmd->data.setadapterparms.hdr.seq_no <
  4102. cmd->data.setadapterparms.hdr.used_total)
  4103. return 1;
  4104. return 0;
  4105. }
  4106. static int qeth_snmp_command(struct qeth_card *card, char __user *udata)
  4107. {
  4108. struct qeth_cmd_buffer *iob;
  4109. struct qeth_ipa_cmd *cmd;
  4110. struct qeth_snmp_ureq *ureq;
  4111. unsigned int req_len;
  4112. struct qeth_arp_query_info qinfo = {0, };
  4113. int rc = 0;
  4114. QETH_CARD_TEXT(card, 3, "snmpcmd");
  4115. if (card->info.guestlan)
  4116. return -EOPNOTSUPP;
  4117. if ((!qeth_adp_supported(card, IPA_SETADP_SET_SNMP_CONTROL)) &&
  4118. (!card->options.layer2)) {
  4119. return -EOPNOTSUPP;
  4120. }
  4121. /* skip 4 bytes (data_len struct member) to get req_len */
  4122. if (copy_from_user(&req_len, udata + sizeof(int), sizeof(int)))
  4123. return -EFAULT;
  4124. if (req_len > (QETH_BUFSIZE - IPA_PDU_HEADER_SIZE -
  4125. sizeof(struct qeth_ipacmd_hdr) -
  4126. sizeof(struct qeth_ipacmd_setadpparms_hdr)))
  4127. return -EINVAL;
  4128. ureq = memdup_user(udata, req_len + sizeof(struct qeth_snmp_ureq_hdr));
  4129. if (IS_ERR(ureq)) {
  4130. QETH_CARD_TEXT(card, 2, "snmpnome");
  4131. return PTR_ERR(ureq);
  4132. }
  4133. qinfo.udata_len = ureq->hdr.data_len;
  4134. qinfo.udata = kzalloc(qinfo.udata_len, GFP_KERNEL);
  4135. if (!qinfo.udata) {
  4136. kfree(ureq);
  4137. return -ENOMEM;
  4138. }
  4139. qinfo.udata_offset = sizeof(struct qeth_snmp_ureq_hdr);
  4140. iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_SNMP_CONTROL,
  4141. QETH_SNMP_SETADP_CMDLENGTH + req_len);
  4142. if (!iob) {
  4143. rc = -ENOMEM;
  4144. goto out;
  4145. }
  4146. cmd = __ipa_cmd(iob);
  4147. memcpy(&cmd->data.setadapterparms.data.snmp, &ureq->cmd, req_len);
  4148. rc = qeth_send_ipa_snmp_cmd(card, iob, QETH_SETADP_BASE_LEN + req_len,
  4149. qeth_snmp_command_cb, (void *)&qinfo);
  4150. if (rc)
  4151. QETH_DBF_MESSAGE(2, "SNMP command failed on %s: (0x%x)\n",
  4152. QETH_CARD_IFNAME(card), rc);
  4153. else {
  4154. if (copy_to_user(udata, qinfo.udata, qinfo.udata_len))
  4155. rc = -EFAULT;
  4156. }
  4157. out:
  4158. kfree(ureq);
  4159. kfree(qinfo.udata);
  4160. return rc;
  4161. }
  4162. static int qeth_setadpparms_query_oat_cb(struct qeth_card *card,
  4163. struct qeth_reply *reply, unsigned long data)
  4164. {
  4165. struct qeth_ipa_cmd *cmd = (struct qeth_ipa_cmd *)data;
  4166. struct qeth_qoat_priv *priv;
  4167. char *resdata;
  4168. int resdatalen;
  4169. QETH_CARD_TEXT(card, 3, "qoatcb");
  4170. if (qeth_setadpparms_inspect_rc(cmd))
  4171. return 0;
  4172. priv = (struct qeth_qoat_priv *)reply->param;
  4173. resdatalen = cmd->data.setadapterparms.hdr.cmdlength;
  4174. resdata = (char *)data + 28;
  4175. if (resdatalen > (priv->buffer_len - priv->response_len)) {
  4176. cmd->hdr.return_code = IPA_RC_FFFF;
  4177. return 0;
  4178. }
  4179. memcpy((priv->buffer + priv->response_len), resdata,
  4180. resdatalen);
  4181. priv->response_len += resdatalen;
  4182. if (cmd->data.setadapterparms.hdr.seq_no <
  4183. cmd->data.setadapterparms.hdr.used_total)
  4184. return 1;
  4185. return 0;
  4186. }
  4187. static int qeth_query_oat_command(struct qeth_card *card, char __user *udata)
  4188. {
  4189. int rc = 0;
  4190. struct qeth_cmd_buffer *iob;
  4191. struct qeth_ipa_cmd *cmd;
  4192. struct qeth_query_oat *oat_req;
  4193. struct qeth_query_oat_data oat_data;
  4194. struct qeth_qoat_priv priv;
  4195. void __user *tmp;
  4196. QETH_CARD_TEXT(card, 3, "qoatcmd");
  4197. if (!qeth_adp_supported(card, IPA_SETADP_QUERY_OAT)) {
  4198. rc = -EOPNOTSUPP;
  4199. goto out;
  4200. }
  4201. if (copy_from_user(&oat_data, udata,
  4202. sizeof(struct qeth_query_oat_data))) {
  4203. rc = -EFAULT;
  4204. goto out;
  4205. }
  4206. priv.buffer_len = oat_data.buffer_len;
  4207. priv.response_len = 0;
  4208. priv.buffer = kzalloc(oat_data.buffer_len, GFP_KERNEL);
  4209. if (!priv.buffer) {
  4210. rc = -ENOMEM;
  4211. goto out;
  4212. }
  4213. iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_OAT,
  4214. sizeof(struct qeth_ipacmd_setadpparms_hdr) +
  4215. sizeof(struct qeth_query_oat));
  4216. if (!iob) {
  4217. rc = -ENOMEM;
  4218. goto out_free;
  4219. }
  4220. cmd = __ipa_cmd(iob);
  4221. oat_req = &cmd->data.setadapterparms.data.query_oat;
  4222. oat_req->subcmd_code = oat_data.command;
  4223. rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_query_oat_cb,
  4224. &priv);
  4225. if (!rc) {
  4226. if (is_compat_task())
  4227. tmp = compat_ptr(oat_data.ptr);
  4228. else
  4229. tmp = (void __user *)(unsigned long)oat_data.ptr;
  4230. if (copy_to_user(tmp, priv.buffer,
  4231. priv.response_len)) {
  4232. rc = -EFAULT;
  4233. goto out_free;
  4234. }
  4235. oat_data.response_len = priv.response_len;
  4236. if (copy_to_user(udata, &oat_data,
  4237. sizeof(struct qeth_query_oat_data)))
  4238. rc = -EFAULT;
  4239. } else
  4240. if (rc == IPA_RC_FFFF)
  4241. rc = -EFAULT;
  4242. out_free:
  4243. kfree(priv.buffer);
  4244. out:
  4245. return rc;
  4246. }
  4247. static int qeth_query_card_info_cb(struct qeth_card *card,
  4248. struct qeth_reply *reply, unsigned long data)
  4249. {
  4250. struct carrier_info *carrier_info = (struct carrier_info *)reply->param;
  4251. struct qeth_ipa_cmd *cmd = (struct qeth_ipa_cmd *)data;
  4252. struct qeth_query_card_info *card_info;
  4253. QETH_CARD_TEXT(card, 2, "qcrdincb");
  4254. if (qeth_setadpparms_inspect_rc(cmd))
  4255. return 0;
  4256. card_info = &cmd->data.setadapterparms.data.card_info;
  4257. carrier_info->card_type = card_info->card_type;
  4258. carrier_info->port_mode = card_info->port_mode;
  4259. carrier_info->port_speed = card_info->port_speed;
  4260. return 0;
  4261. }
  4262. static int qeth_query_card_info(struct qeth_card *card,
  4263. struct carrier_info *carrier_info)
  4264. {
  4265. struct qeth_cmd_buffer *iob;
  4266. QETH_CARD_TEXT(card, 2, "qcrdinfo");
  4267. if (!qeth_adp_supported(card, IPA_SETADP_QUERY_CARD_INFO))
  4268. return -EOPNOTSUPP;
  4269. iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_CARD_INFO,
  4270. sizeof(struct qeth_ipacmd_setadpparms_hdr));
  4271. if (!iob)
  4272. return -ENOMEM;
  4273. return qeth_send_ipa_cmd(card, iob, qeth_query_card_info_cb,
  4274. (void *)carrier_info);
  4275. }
  4276. /**
  4277. * qeth_vm_request_mac() - Request a hypervisor-managed MAC address
  4278. * @card: pointer to a qeth_card
  4279. *
  4280. * Returns
  4281. * 0, if a MAC address has been set for the card's netdevice
  4282. * a return code, for various error conditions
  4283. */
  4284. int qeth_vm_request_mac(struct qeth_card *card)
  4285. {
  4286. struct diag26c_mac_resp *response;
  4287. struct diag26c_mac_req *request;
  4288. struct ccw_dev_id id;
  4289. int rc;
  4290. QETH_DBF_TEXT(SETUP, 2, "vmreqmac");
  4291. if (!card->dev)
  4292. return -ENODEV;
  4293. request = kzalloc(sizeof(*request), GFP_KERNEL | GFP_DMA);
  4294. response = kzalloc(sizeof(*response), GFP_KERNEL | GFP_DMA);
  4295. if (!request || !response) {
  4296. rc = -ENOMEM;
  4297. goto out;
  4298. }
  4299. ccw_device_get_id(CARD_RDEV(card), &id);
  4300. request->resp_buf_len = sizeof(*response);
  4301. request->resp_version = DIAG26C_VERSION2;
  4302. request->op_code = DIAG26C_GET_MAC;
  4303. request->devno = id.devno;
  4304. QETH_DBF_HEX(CTRL, 2, request, sizeof(*request));
  4305. rc = diag26c(request, response, DIAG26C_MAC_SERVICES);
  4306. QETH_DBF_HEX(CTRL, 2, request, sizeof(*request));
  4307. if (rc)
  4308. goto out;
  4309. QETH_DBF_HEX(CTRL, 2, response, sizeof(*response));
  4310. if (request->resp_buf_len < sizeof(*response) ||
  4311. response->version != request->resp_version) {
  4312. rc = -EIO;
  4313. QETH_DBF_TEXT(SETUP, 2, "badresp");
  4314. QETH_DBF_HEX(SETUP, 2, &request->resp_buf_len,
  4315. sizeof(request->resp_buf_len));
  4316. } else if (!is_valid_ether_addr(response->mac)) {
  4317. rc = -EINVAL;
  4318. QETH_DBF_TEXT(SETUP, 2, "badmac");
  4319. QETH_DBF_HEX(SETUP, 2, response->mac, ETH_ALEN);
  4320. } else {
  4321. ether_addr_copy(card->dev->dev_addr, response->mac);
  4322. }
  4323. out:
  4324. kfree(response);
  4325. kfree(request);
  4326. return rc;
  4327. }
  4328. EXPORT_SYMBOL_GPL(qeth_vm_request_mac);
  4329. static int qeth_get_qdio_q_format(struct qeth_card *card)
  4330. {
  4331. if (card->info.type == QETH_CARD_TYPE_IQD)
  4332. return QDIO_IQDIO_QFMT;
  4333. else
  4334. return QDIO_QETH_QFMT;
  4335. }
  4336. static void qeth_determine_capabilities(struct qeth_card *card)
  4337. {
  4338. int rc;
  4339. int length;
  4340. char *prcd;
  4341. struct ccw_device *ddev;
  4342. int ddev_offline = 0;
  4343. QETH_DBF_TEXT(SETUP, 2, "detcapab");
  4344. ddev = CARD_DDEV(card);
  4345. if (!ddev->online) {
  4346. ddev_offline = 1;
  4347. rc = ccw_device_set_online(ddev);
  4348. if (rc) {
  4349. QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
  4350. goto out;
  4351. }
  4352. }
  4353. rc = qeth_read_conf_data(card, (void **) &prcd, &length);
  4354. if (rc) {
  4355. QETH_DBF_MESSAGE(2, "%s qeth_read_conf_data returned %i\n",
  4356. dev_name(&card->gdev->dev), rc);
  4357. QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
  4358. goto out_offline;
  4359. }
  4360. qeth_configure_unitaddr(card, prcd);
  4361. if (ddev_offline)
  4362. qeth_configure_blkt_default(card, prcd);
  4363. kfree(prcd);
  4364. rc = qdio_get_ssqd_desc(ddev, &card->ssqd);
  4365. if (rc)
  4366. QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
  4367. QETH_DBF_TEXT_(SETUP, 2, "qfmt%d", card->ssqd.qfmt);
  4368. QETH_DBF_TEXT_(SETUP, 2, "ac1:%02x", card->ssqd.qdioac1);
  4369. QETH_DBF_TEXT_(SETUP, 2, "ac2:%04x", card->ssqd.qdioac2);
  4370. QETH_DBF_TEXT_(SETUP, 2, "ac3:%04x", card->ssqd.qdioac3);
  4371. QETH_DBF_TEXT_(SETUP, 2, "icnt%d", card->ssqd.icnt);
  4372. if (!((card->ssqd.qfmt != QDIO_IQDIO_QFMT) ||
  4373. ((card->ssqd.qdioac1 & CHSC_AC1_INITIATE_INPUTQ) == 0) ||
  4374. ((card->ssqd.qdioac3 & CHSC_AC3_FORMAT2_CQ_AVAILABLE) == 0))) {
  4375. dev_info(&card->gdev->dev,
  4376. "Completion Queueing supported\n");
  4377. } else {
  4378. card->options.cq = QETH_CQ_NOTAVAILABLE;
  4379. }
  4380. out_offline:
  4381. if (ddev_offline == 1)
  4382. ccw_device_set_offline(ddev);
  4383. out:
  4384. return;
  4385. }
  4386. static void qeth_qdio_establish_cq(struct qeth_card *card,
  4387. struct qdio_buffer **in_sbal_ptrs,
  4388. void (**queue_start_poll)
  4389. (struct ccw_device *, int,
  4390. unsigned long))
  4391. {
  4392. int i;
  4393. if (card->options.cq == QETH_CQ_ENABLED) {
  4394. int offset = QDIO_MAX_BUFFERS_PER_Q *
  4395. (card->qdio.no_in_queues - 1);
  4396. for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) {
  4397. in_sbal_ptrs[offset + i] = (struct qdio_buffer *)
  4398. virt_to_phys(card->qdio.c_q->bufs[i].buffer);
  4399. }
  4400. queue_start_poll[card->qdio.no_in_queues - 1] = NULL;
  4401. }
  4402. }
  4403. static int qeth_qdio_establish(struct qeth_card *card)
  4404. {
  4405. struct qdio_initialize init_data;
  4406. char *qib_param_field;
  4407. struct qdio_buffer **in_sbal_ptrs;
  4408. void (**queue_start_poll) (struct ccw_device *, int, unsigned long);
  4409. struct qdio_buffer **out_sbal_ptrs;
  4410. int i, j, k;
  4411. int rc = 0;
  4412. QETH_DBF_TEXT(SETUP, 2, "qdioest");
  4413. qib_param_field = kzalloc(QDIO_MAX_BUFFERS_PER_Q * sizeof(char),
  4414. GFP_KERNEL);
  4415. if (!qib_param_field) {
  4416. rc = -ENOMEM;
  4417. goto out_free_nothing;
  4418. }
  4419. qeth_create_qib_param_field(card, qib_param_field);
  4420. qeth_create_qib_param_field_blkt(card, qib_param_field);
  4421. in_sbal_ptrs = kzalloc(card->qdio.no_in_queues *
  4422. QDIO_MAX_BUFFERS_PER_Q * sizeof(void *),
  4423. GFP_KERNEL);
  4424. if (!in_sbal_ptrs) {
  4425. rc = -ENOMEM;
  4426. goto out_free_qib_param;
  4427. }
  4428. for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) {
  4429. in_sbal_ptrs[i] = (struct qdio_buffer *)
  4430. virt_to_phys(card->qdio.in_q->bufs[i].buffer);
  4431. }
  4432. queue_start_poll = kzalloc(sizeof(void *) * card->qdio.no_in_queues,
  4433. GFP_KERNEL);
  4434. if (!queue_start_poll) {
  4435. rc = -ENOMEM;
  4436. goto out_free_in_sbals;
  4437. }
  4438. for (i = 0; i < card->qdio.no_in_queues; ++i)
  4439. queue_start_poll[i] = card->discipline->start_poll;
  4440. qeth_qdio_establish_cq(card, in_sbal_ptrs, queue_start_poll);
  4441. out_sbal_ptrs =
  4442. kzalloc(card->qdio.no_out_queues * QDIO_MAX_BUFFERS_PER_Q *
  4443. sizeof(void *), GFP_KERNEL);
  4444. if (!out_sbal_ptrs) {
  4445. rc = -ENOMEM;
  4446. goto out_free_queue_start_poll;
  4447. }
  4448. for (i = 0, k = 0; i < card->qdio.no_out_queues; ++i)
  4449. for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j, ++k) {
  4450. out_sbal_ptrs[k] = (struct qdio_buffer *)virt_to_phys(
  4451. card->qdio.out_qs[i]->bufs[j]->buffer);
  4452. }
  4453. memset(&init_data, 0, sizeof(struct qdio_initialize));
  4454. init_data.cdev = CARD_DDEV(card);
  4455. init_data.q_format = qeth_get_qdio_q_format(card);
  4456. init_data.qib_param_field_format = 0;
  4457. init_data.qib_param_field = qib_param_field;
  4458. init_data.no_input_qs = card->qdio.no_in_queues;
  4459. init_data.no_output_qs = card->qdio.no_out_queues;
  4460. init_data.input_handler = card->discipline->input_handler;
  4461. init_data.output_handler = card->discipline->output_handler;
  4462. init_data.queue_start_poll_array = queue_start_poll;
  4463. init_data.int_parm = (unsigned long) card;
  4464. init_data.input_sbal_addr_array = (void **) in_sbal_ptrs;
  4465. init_data.output_sbal_addr_array = (void **) out_sbal_ptrs;
  4466. init_data.output_sbal_state_array = card->qdio.out_bufstates;
  4467. init_data.scan_threshold =
  4468. (card->info.type == QETH_CARD_TYPE_IQD) ? 1 : 32;
  4469. if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ALLOCATED,
  4470. QETH_QDIO_ESTABLISHED) == QETH_QDIO_ALLOCATED) {
  4471. rc = qdio_allocate(&init_data);
  4472. if (rc) {
  4473. atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
  4474. goto out;
  4475. }
  4476. rc = qdio_establish(&init_data);
  4477. if (rc) {
  4478. atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
  4479. qdio_free(CARD_DDEV(card));
  4480. }
  4481. }
  4482. switch (card->options.cq) {
  4483. case QETH_CQ_ENABLED:
  4484. dev_info(&card->gdev->dev, "Completion Queue support enabled");
  4485. break;
  4486. case QETH_CQ_DISABLED:
  4487. dev_info(&card->gdev->dev, "Completion Queue support disabled");
  4488. break;
  4489. default:
  4490. break;
  4491. }
  4492. out:
  4493. kfree(out_sbal_ptrs);
  4494. out_free_queue_start_poll:
  4495. kfree(queue_start_poll);
  4496. out_free_in_sbals:
  4497. kfree(in_sbal_ptrs);
  4498. out_free_qib_param:
  4499. kfree(qib_param_field);
  4500. out_free_nothing:
  4501. return rc;
  4502. }
  4503. static void qeth_core_free_card(struct qeth_card *card)
  4504. {
  4505. QETH_DBF_TEXT(SETUP, 2, "freecrd");
  4506. QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
  4507. qeth_clean_channel(&card->read);
  4508. qeth_clean_channel(&card->write);
  4509. qeth_free_qdio_buffers(card);
  4510. unregister_service_level(&card->qeth_service_level);
  4511. kfree(card);
  4512. }
  4513. void qeth_trace_features(struct qeth_card *card)
  4514. {
  4515. QETH_CARD_TEXT(card, 2, "features");
  4516. QETH_CARD_HEX(card, 2, &card->options.ipa4, sizeof(card->options.ipa4));
  4517. QETH_CARD_HEX(card, 2, &card->options.ipa6, sizeof(card->options.ipa6));
  4518. QETH_CARD_HEX(card, 2, &card->options.adp, sizeof(card->options.adp));
  4519. QETH_CARD_HEX(card, 2, &card->info.diagass_support,
  4520. sizeof(card->info.diagass_support));
  4521. }
  4522. EXPORT_SYMBOL_GPL(qeth_trace_features);
  4523. static struct ccw_device_id qeth_ids[] = {
  4524. {CCW_DEVICE_DEVTYPE(0x1731, 0x01, 0x1732, 0x01),
  4525. .driver_info = QETH_CARD_TYPE_OSD},
  4526. {CCW_DEVICE_DEVTYPE(0x1731, 0x05, 0x1732, 0x05),
  4527. .driver_info = QETH_CARD_TYPE_IQD},
  4528. {CCW_DEVICE_DEVTYPE(0x1731, 0x06, 0x1732, 0x06),
  4529. .driver_info = QETH_CARD_TYPE_OSN},
  4530. {CCW_DEVICE_DEVTYPE(0x1731, 0x02, 0x1732, 0x03),
  4531. .driver_info = QETH_CARD_TYPE_OSM},
  4532. {CCW_DEVICE_DEVTYPE(0x1731, 0x02, 0x1732, 0x02),
  4533. .driver_info = QETH_CARD_TYPE_OSX},
  4534. {},
  4535. };
  4536. MODULE_DEVICE_TABLE(ccw, qeth_ids);
  4537. static struct ccw_driver qeth_ccw_driver = {
  4538. .driver = {
  4539. .owner = THIS_MODULE,
  4540. .name = "qeth",
  4541. },
  4542. .ids = qeth_ids,
  4543. .probe = ccwgroup_probe_ccwdev,
  4544. .remove = ccwgroup_remove_ccwdev,
  4545. };
  4546. int qeth_core_hardsetup_card(struct qeth_card *card)
  4547. {
  4548. int retries = 3;
  4549. int rc;
  4550. QETH_DBF_TEXT(SETUP, 2, "hrdsetup");
  4551. atomic_set(&card->force_alloc_skb, 0);
  4552. qeth_update_from_chp_desc(card);
  4553. retry:
  4554. if (retries < 3)
  4555. QETH_DBF_MESSAGE(2, "%s Retrying to do IDX activates.\n",
  4556. dev_name(&card->gdev->dev));
  4557. rc = qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
  4558. ccw_device_set_offline(CARD_DDEV(card));
  4559. ccw_device_set_offline(CARD_WDEV(card));
  4560. ccw_device_set_offline(CARD_RDEV(card));
  4561. qdio_free(CARD_DDEV(card));
  4562. rc = ccw_device_set_online(CARD_RDEV(card));
  4563. if (rc)
  4564. goto retriable;
  4565. rc = ccw_device_set_online(CARD_WDEV(card));
  4566. if (rc)
  4567. goto retriable;
  4568. rc = ccw_device_set_online(CARD_DDEV(card));
  4569. if (rc)
  4570. goto retriable;
  4571. retriable:
  4572. if (rc == -ERESTARTSYS) {
  4573. QETH_DBF_TEXT(SETUP, 2, "break1");
  4574. return rc;
  4575. } else if (rc) {
  4576. QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
  4577. if (--retries < 0)
  4578. goto out;
  4579. else
  4580. goto retry;
  4581. }
  4582. qeth_determine_capabilities(card);
  4583. qeth_init_tokens(card);
  4584. qeth_init_func_level(card);
  4585. rc = qeth_idx_activate_channel(&card->read, qeth_idx_read_cb);
  4586. if (rc == -ERESTARTSYS) {
  4587. QETH_DBF_TEXT(SETUP, 2, "break2");
  4588. return rc;
  4589. } else if (rc) {
  4590. QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
  4591. if (--retries < 0)
  4592. goto out;
  4593. else
  4594. goto retry;
  4595. }
  4596. rc = qeth_idx_activate_channel(&card->write, qeth_idx_write_cb);
  4597. if (rc == -ERESTARTSYS) {
  4598. QETH_DBF_TEXT(SETUP, 2, "break3");
  4599. return rc;
  4600. } else if (rc) {
  4601. QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
  4602. if (--retries < 0)
  4603. goto out;
  4604. else
  4605. goto retry;
  4606. }
  4607. card->read_or_write_problem = 0;
  4608. rc = qeth_mpc_initialize(card);
  4609. if (rc) {
  4610. QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
  4611. goto out;
  4612. }
  4613. rc = qeth_send_startlan(card);
  4614. if (rc) {
  4615. QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
  4616. if (rc == IPA_RC_LAN_OFFLINE) {
  4617. dev_warn(&card->gdev->dev,
  4618. "The LAN is offline\n");
  4619. card->lan_online = 0;
  4620. } else {
  4621. rc = -ENODEV;
  4622. goto out;
  4623. }
  4624. } else
  4625. card->lan_online = 1;
  4626. card->options.ipa4.supported_funcs = 0;
  4627. card->options.ipa6.supported_funcs = 0;
  4628. card->options.adp.supported_funcs = 0;
  4629. card->options.sbp.supported_funcs = 0;
  4630. card->info.diagass_support = 0;
  4631. rc = qeth_query_ipassists(card, QETH_PROT_IPV4);
  4632. if (rc == -ENOMEM)
  4633. goto out;
  4634. if (qeth_is_supported(card, IPA_SETADAPTERPARMS)) {
  4635. rc = qeth_query_setadapterparms(card);
  4636. if (rc < 0) {
  4637. QETH_DBF_TEXT_(SETUP, 2, "7err%d", rc);
  4638. goto out;
  4639. }
  4640. }
  4641. if (qeth_adp_supported(card, IPA_SETADP_SET_DIAG_ASSIST)) {
  4642. rc = qeth_query_setdiagass(card);
  4643. if (rc < 0) {
  4644. QETH_DBF_TEXT_(SETUP, 2, "8err%d", rc);
  4645. goto out;
  4646. }
  4647. }
  4648. return 0;
  4649. out:
  4650. dev_warn(&card->gdev->dev, "The qeth device driver failed to recover "
  4651. "an error on the device\n");
  4652. QETH_DBF_MESSAGE(2, "%s Initialization in hardsetup failed! rc=%d\n",
  4653. dev_name(&card->gdev->dev), rc);
  4654. return rc;
  4655. }
  4656. EXPORT_SYMBOL_GPL(qeth_core_hardsetup_card);
  4657. static void qeth_create_skb_frag(struct qdio_buffer_element *element,
  4658. struct sk_buff *skb, int offset, int data_len)
  4659. {
  4660. struct page *page = virt_to_page(element->addr);
  4661. unsigned int next_frag;
  4662. /* first fill the linear space */
  4663. if (!skb->len) {
  4664. unsigned int linear = min(data_len, skb_tailroom(skb));
  4665. skb_put_data(skb, element->addr + offset, linear);
  4666. data_len -= linear;
  4667. if (!data_len)
  4668. return;
  4669. offset += linear;
  4670. /* fall through to add page frag for remaining data */
  4671. }
  4672. next_frag = skb_shinfo(skb)->nr_frags;
  4673. get_page(page);
  4674. skb_add_rx_frag(skb, next_frag, page, offset, data_len, data_len);
  4675. }
  4676. static inline int qeth_is_last_sbale(struct qdio_buffer_element *sbale)
  4677. {
  4678. return (sbale->eflags & SBAL_EFLAGS_LAST_ENTRY);
  4679. }
  4680. struct sk_buff *qeth_core_get_next_skb(struct qeth_card *card,
  4681. struct qeth_qdio_buffer *qethbuffer,
  4682. struct qdio_buffer_element **__element, int *__offset,
  4683. struct qeth_hdr **hdr)
  4684. {
  4685. struct qdio_buffer_element *element = *__element;
  4686. struct qdio_buffer *buffer = qethbuffer->buffer;
  4687. int offset = *__offset;
  4688. struct sk_buff *skb;
  4689. int skb_len = 0;
  4690. void *data_ptr;
  4691. int data_len;
  4692. int headroom = 0;
  4693. int use_rx_sg = 0;
  4694. /* qeth_hdr must not cross element boundaries */
  4695. while (element->length < offset + sizeof(struct qeth_hdr)) {
  4696. if (qeth_is_last_sbale(element))
  4697. return NULL;
  4698. element++;
  4699. offset = 0;
  4700. }
  4701. *hdr = element->addr + offset;
  4702. offset += sizeof(struct qeth_hdr);
  4703. switch ((*hdr)->hdr.l2.id) {
  4704. case QETH_HEADER_TYPE_LAYER2:
  4705. skb_len = (*hdr)->hdr.l2.pkt_length;
  4706. break;
  4707. case QETH_HEADER_TYPE_LAYER3:
  4708. skb_len = (*hdr)->hdr.l3.length;
  4709. headroom = ETH_HLEN;
  4710. break;
  4711. case QETH_HEADER_TYPE_OSN:
  4712. skb_len = (*hdr)->hdr.osn.pdu_length;
  4713. headroom = sizeof(struct qeth_hdr);
  4714. break;
  4715. default:
  4716. break;
  4717. }
  4718. if (!skb_len)
  4719. return NULL;
  4720. if (((skb_len >= card->options.rx_sg_cb) &&
  4721. (!(card->info.type == QETH_CARD_TYPE_OSN)) &&
  4722. (!atomic_read(&card->force_alloc_skb))) ||
  4723. (card->options.cq == QETH_CQ_ENABLED))
  4724. use_rx_sg = 1;
  4725. if (use_rx_sg && qethbuffer->rx_skb) {
  4726. /* QETH_CQ_ENABLED only: */
  4727. skb = qethbuffer->rx_skb;
  4728. qethbuffer->rx_skb = NULL;
  4729. } else {
  4730. unsigned int linear = (use_rx_sg) ? QETH_RX_PULL_LEN : skb_len;
  4731. skb = napi_alloc_skb(&card->napi, linear + headroom);
  4732. }
  4733. if (!skb)
  4734. goto no_mem;
  4735. if (headroom)
  4736. skb_reserve(skb, headroom);
  4737. data_ptr = element->addr + offset;
  4738. while (skb_len) {
  4739. data_len = min(skb_len, (int)(element->length - offset));
  4740. if (data_len) {
  4741. if (use_rx_sg)
  4742. qeth_create_skb_frag(element, skb, offset,
  4743. data_len);
  4744. else
  4745. skb_put_data(skb, data_ptr, data_len);
  4746. }
  4747. skb_len -= data_len;
  4748. if (skb_len) {
  4749. if (qeth_is_last_sbale(element)) {
  4750. QETH_CARD_TEXT(card, 4, "unexeob");
  4751. QETH_CARD_HEX(card, 2, buffer, sizeof(void *));
  4752. dev_kfree_skb_any(skb);
  4753. card->stats.rx_errors++;
  4754. return NULL;
  4755. }
  4756. element++;
  4757. offset = 0;
  4758. data_ptr = element->addr;
  4759. } else {
  4760. offset += data_len;
  4761. }
  4762. }
  4763. *__element = element;
  4764. *__offset = offset;
  4765. if (use_rx_sg && card->options.performance_stats) {
  4766. card->perf_stats.sg_skbs_rx++;
  4767. card->perf_stats.sg_frags_rx += skb_shinfo(skb)->nr_frags;
  4768. }
  4769. return skb;
  4770. no_mem:
  4771. if (net_ratelimit()) {
  4772. QETH_CARD_TEXT(card, 2, "noskbmem");
  4773. }
  4774. card->stats.rx_dropped++;
  4775. return NULL;
  4776. }
  4777. EXPORT_SYMBOL_GPL(qeth_core_get_next_skb);
  4778. int qeth_poll(struct napi_struct *napi, int budget)
  4779. {
  4780. struct qeth_card *card = container_of(napi, struct qeth_card, napi);
  4781. int work_done = 0;
  4782. struct qeth_qdio_buffer *buffer;
  4783. int done;
  4784. int new_budget = budget;
  4785. if (card->options.performance_stats) {
  4786. card->perf_stats.inbound_cnt++;
  4787. card->perf_stats.inbound_start_time = qeth_get_micros();
  4788. }
  4789. while (1) {
  4790. if (!card->rx.b_count) {
  4791. card->rx.qdio_err = 0;
  4792. card->rx.b_count = qdio_get_next_buffers(
  4793. card->data.ccwdev, 0, &card->rx.b_index,
  4794. &card->rx.qdio_err);
  4795. if (card->rx.b_count <= 0) {
  4796. card->rx.b_count = 0;
  4797. break;
  4798. }
  4799. card->rx.b_element =
  4800. &card->qdio.in_q->bufs[card->rx.b_index]
  4801. .buffer->element[0];
  4802. card->rx.e_offset = 0;
  4803. }
  4804. while (card->rx.b_count) {
  4805. buffer = &card->qdio.in_q->bufs[card->rx.b_index];
  4806. if (!(card->rx.qdio_err &&
  4807. qeth_check_qdio_errors(card, buffer->buffer,
  4808. card->rx.qdio_err, "qinerr")))
  4809. work_done +=
  4810. card->discipline->process_rx_buffer(
  4811. card, new_budget, &done);
  4812. else
  4813. done = 1;
  4814. if (done) {
  4815. if (card->options.performance_stats)
  4816. card->perf_stats.bufs_rec++;
  4817. qeth_put_buffer_pool_entry(card,
  4818. buffer->pool_entry);
  4819. qeth_queue_input_buffer(card, card->rx.b_index);
  4820. card->rx.b_count--;
  4821. if (card->rx.b_count) {
  4822. card->rx.b_index =
  4823. (card->rx.b_index + 1) %
  4824. QDIO_MAX_BUFFERS_PER_Q;
  4825. card->rx.b_element =
  4826. &card->qdio.in_q
  4827. ->bufs[card->rx.b_index]
  4828. .buffer->element[0];
  4829. card->rx.e_offset = 0;
  4830. }
  4831. }
  4832. if (work_done >= budget)
  4833. goto out;
  4834. else
  4835. new_budget = budget - work_done;
  4836. }
  4837. }
  4838. napi_complete_done(napi, work_done);
  4839. if (qdio_start_irq(card->data.ccwdev, 0))
  4840. napi_schedule(&card->napi);
  4841. out:
  4842. if (card->options.performance_stats)
  4843. card->perf_stats.inbound_time += qeth_get_micros() -
  4844. card->perf_stats.inbound_start_time;
  4845. return work_done;
  4846. }
  4847. EXPORT_SYMBOL_GPL(qeth_poll);
  4848. static int qeth_setassparms_inspect_rc(struct qeth_ipa_cmd *cmd)
  4849. {
  4850. if (!cmd->hdr.return_code)
  4851. cmd->hdr.return_code = cmd->data.setassparms.hdr.return_code;
  4852. return cmd->hdr.return_code;
  4853. }
  4854. int qeth_setassparms_cb(struct qeth_card *card,
  4855. struct qeth_reply *reply, unsigned long data)
  4856. {
  4857. struct qeth_ipa_cmd *cmd;
  4858. QETH_CARD_TEXT(card, 4, "defadpcb");
  4859. cmd = (struct qeth_ipa_cmd *) data;
  4860. if (cmd->hdr.return_code == 0) {
  4861. cmd->hdr.return_code = cmd->data.setassparms.hdr.return_code;
  4862. if (cmd->hdr.prot_version == QETH_PROT_IPV4)
  4863. card->options.ipa4.enabled_funcs = cmd->hdr.ipa_enabled;
  4864. if (cmd->hdr.prot_version == QETH_PROT_IPV6)
  4865. card->options.ipa6.enabled_funcs = cmd->hdr.ipa_enabled;
  4866. }
  4867. return 0;
  4868. }
  4869. EXPORT_SYMBOL_GPL(qeth_setassparms_cb);
  4870. struct qeth_cmd_buffer *qeth_get_setassparms_cmd(struct qeth_card *card,
  4871. enum qeth_ipa_funcs ipa_func,
  4872. __u16 cmd_code, __u16 len,
  4873. enum qeth_prot_versions prot)
  4874. {
  4875. struct qeth_cmd_buffer *iob;
  4876. struct qeth_ipa_cmd *cmd;
  4877. QETH_CARD_TEXT(card, 4, "getasscm");
  4878. iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SETASSPARMS, prot);
  4879. if (iob) {
  4880. cmd = __ipa_cmd(iob);
  4881. cmd->data.setassparms.hdr.assist_no = ipa_func;
  4882. cmd->data.setassparms.hdr.length = 8 + len;
  4883. cmd->data.setassparms.hdr.command_code = cmd_code;
  4884. cmd->data.setassparms.hdr.return_code = 0;
  4885. cmd->data.setassparms.hdr.seq_no = 0;
  4886. }
  4887. return iob;
  4888. }
  4889. EXPORT_SYMBOL_GPL(qeth_get_setassparms_cmd);
  4890. int qeth_send_setassparms(struct qeth_card *card,
  4891. struct qeth_cmd_buffer *iob, __u16 len, long data,
  4892. int (*reply_cb)(struct qeth_card *,
  4893. struct qeth_reply *, unsigned long),
  4894. void *reply_param)
  4895. {
  4896. int rc;
  4897. struct qeth_ipa_cmd *cmd;
  4898. QETH_CARD_TEXT(card, 4, "sendassp");
  4899. cmd = __ipa_cmd(iob);
  4900. if (len <= sizeof(__u32))
  4901. cmd->data.setassparms.data.flags_32bit = (__u32) data;
  4902. else /* (len > sizeof(__u32)) */
  4903. memcpy(&cmd->data.setassparms.data, (void *) data, len);
  4904. rc = qeth_send_ipa_cmd(card, iob, reply_cb, reply_param);
  4905. return rc;
  4906. }
  4907. EXPORT_SYMBOL_GPL(qeth_send_setassparms);
  4908. int qeth_send_simple_setassparms(struct qeth_card *card,
  4909. enum qeth_ipa_funcs ipa_func,
  4910. __u16 cmd_code, long data)
  4911. {
  4912. int rc;
  4913. int length = 0;
  4914. struct qeth_cmd_buffer *iob;
  4915. QETH_CARD_TEXT(card, 4, "simassp4");
  4916. if (data)
  4917. length = sizeof(__u32);
  4918. iob = qeth_get_setassparms_cmd(card, ipa_func, cmd_code,
  4919. length, QETH_PROT_IPV4);
  4920. if (!iob)
  4921. return -ENOMEM;
  4922. rc = qeth_send_setassparms(card, iob, length, data,
  4923. qeth_setassparms_cb, NULL);
  4924. return rc;
  4925. }
  4926. EXPORT_SYMBOL_GPL(qeth_send_simple_setassparms);
  4927. static void qeth_unregister_dbf_views(void)
  4928. {
  4929. int x;
  4930. for (x = 0; x < QETH_DBF_INFOS; x++) {
  4931. debug_unregister(qeth_dbf[x].id);
  4932. qeth_dbf[x].id = NULL;
  4933. }
  4934. }
  4935. void qeth_dbf_longtext(debug_info_t *id, int level, char *fmt, ...)
  4936. {
  4937. char dbf_txt_buf[32];
  4938. va_list args;
  4939. if (!debug_level_enabled(id, level))
  4940. return;
  4941. va_start(args, fmt);
  4942. vsnprintf(dbf_txt_buf, sizeof(dbf_txt_buf), fmt, args);
  4943. va_end(args);
  4944. debug_text_event(id, level, dbf_txt_buf);
  4945. }
  4946. EXPORT_SYMBOL_GPL(qeth_dbf_longtext);
  4947. static int qeth_register_dbf_views(void)
  4948. {
  4949. int ret;
  4950. int x;
  4951. for (x = 0; x < QETH_DBF_INFOS; x++) {
  4952. /* register the areas */
  4953. qeth_dbf[x].id = debug_register(qeth_dbf[x].name,
  4954. qeth_dbf[x].pages,
  4955. qeth_dbf[x].areas,
  4956. qeth_dbf[x].len);
  4957. if (qeth_dbf[x].id == NULL) {
  4958. qeth_unregister_dbf_views();
  4959. return -ENOMEM;
  4960. }
  4961. /* register a view */
  4962. ret = debug_register_view(qeth_dbf[x].id, qeth_dbf[x].view);
  4963. if (ret) {
  4964. qeth_unregister_dbf_views();
  4965. return ret;
  4966. }
  4967. /* set a passing level */
  4968. debug_set_level(qeth_dbf[x].id, qeth_dbf[x].level);
  4969. }
  4970. return 0;
  4971. }
  4972. int qeth_core_load_discipline(struct qeth_card *card,
  4973. enum qeth_discipline_id discipline)
  4974. {
  4975. int rc = 0;
  4976. mutex_lock(&qeth_mod_mutex);
  4977. switch (discipline) {
  4978. case QETH_DISCIPLINE_LAYER3:
  4979. card->discipline = try_then_request_module(
  4980. symbol_get(qeth_l3_discipline), "qeth_l3");
  4981. break;
  4982. case QETH_DISCIPLINE_LAYER2:
  4983. card->discipline = try_then_request_module(
  4984. symbol_get(qeth_l2_discipline), "qeth_l2");
  4985. break;
  4986. default:
  4987. break;
  4988. }
  4989. if (!card->discipline) {
  4990. dev_err(&card->gdev->dev, "There is no kernel module to "
  4991. "support discipline %d\n", discipline);
  4992. rc = -EINVAL;
  4993. }
  4994. mutex_unlock(&qeth_mod_mutex);
  4995. return rc;
  4996. }
  4997. void qeth_core_free_discipline(struct qeth_card *card)
  4998. {
  4999. if (card->options.layer2)
  5000. symbol_put(qeth_l2_discipline);
  5001. else
  5002. symbol_put(qeth_l3_discipline);
  5003. card->discipline = NULL;
  5004. }
  5005. const struct device_type qeth_generic_devtype = {
  5006. .name = "qeth_generic",
  5007. .groups = qeth_generic_attr_groups,
  5008. };
  5009. EXPORT_SYMBOL_GPL(qeth_generic_devtype);
  5010. static const struct device_type qeth_osn_devtype = {
  5011. .name = "qeth_osn",
  5012. .groups = qeth_osn_attr_groups,
  5013. };
  5014. #define DBF_NAME_LEN 20
  5015. struct qeth_dbf_entry {
  5016. char dbf_name[DBF_NAME_LEN];
  5017. debug_info_t *dbf_info;
  5018. struct list_head dbf_list;
  5019. };
  5020. static LIST_HEAD(qeth_dbf_list);
  5021. static DEFINE_MUTEX(qeth_dbf_list_mutex);
  5022. static debug_info_t *qeth_get_dbf_entry(char *name)
  5023. {
  5024. struct qeth_dbf_entry *entry;
  5025. debug_info_t *rc = NULL;
  5026. mutex_lock(&qeth_dbf_list_mutex);
  5027. list_for_each_entry(entry, &qeth_dbf_list, dbf_list) {
  5028. if (strcmp(entry->dbf_name, name) == 0) {
  5029. rc = entry->dbf_info;
  5030. break;
  5031. }
  5032. }
  5033. mutex_unlock(&qeth_dbf_list_mutex);
  5034. return rc;
  5035. }
  5036. static int qeth_add_dbf_entry(struct qeth_card *card, char *name)
  5037. {
  5038. struct qeth_dbf_entry *new_entry;
  5039. card->debug = debug_register(name, 2, 1, 8);
  5040. if (!card->debug) {
  5041. QETH_DBF_TEXT_(SETUP, 2, "%s", "qcdbf");
  5042. goto err;
  5043. }
  5044. if (debug_register_view(card->debug, &debug_hex_ascii_view))
  5045. goto err_dbg;
  5046. new_entry = kzalloc(sizeof(struct qeth_dbf_entry), GFP_KERNEL);
  5047. if (!new_entry)
  5048. goto err_dbg;
  5049. strncpy(new_entry->dbf_name, name, DBF_NAME_LEN);
  5050. new_entry->dbf_info = card->debug;
  5051. mutex_lock(&qeth_dbf_list_mutex);
  5052. list_add(&new_entry->dbf_list, &qeth_dbf_list);
  5053. mutex_unlock(&qeth_dbf_list_mutex);
  5054. return 0;
  5055. err_dbg:
  5056. debug_unregister(card->debug);
  5057. err:
  5058. return -ENOMEM;
  5059. }
  5060. static void qeth_clear_dbf_list(void)
  5061. {
  5062. struct qeth_dbf_entry *entry, *tmp;
  5063. mutex_lock(&qeth_dbf_list_mutex);
  5064. list_for_each_entry_safe(entry, tmp, &qeth_dbf_list, dbf_list) {
  5065. list_del(&entry->dbf_list);
  5066. debug_unregister(entry->dbf_info);
  5067. kfree(entry);
  5068. }
  5069. mutex_unlock(&qeth_dbf_list_mutex);
  5070. }
  5071. static int qeth_core_probe_device(struct ccwgroup_device *gdev)
  5072. {
  5073. struct qeth_card *card;
  5074. struct device *dev;
  5075. int rc;
  5076. enum qeth_discipline_id enforced_disc;
  5077. unsigned long flags;
  5078. char dbf_name[DBF_NAME_LEN];
  5079. QETH_DBF_TEXT(SETUP, 2, "probedev");
  5080. dev = &gdev->dev;
  5081. if (!get_device(dev))
  5082. return -ENODEV;
  5083. QETH_DBF_TEXT_(SETUP, 2, "%s", dev_name(&gdev->dev));
  5084. card = qeth_alloc_card();
  5085. if (!card) {
  5086. QETH_DBF_TEXT_(SETUP, 2, "1err%d", -ENOMEM);
  5087. rc = -ENOMEM;
  5088. goto err_dev;
  5089. }
  5090. snprintf(dbf_name, sizeof(dbf_name), "qeth_card_%s",
  5091. dev_name(&gdev->dev));
  5092. card->debug = qeth_get_dbf_entry(dbf_name);
  5093. if (!card->debug) {
  5094. rc = qeth_add_dbf_entry(card, dbf_name);
  5095. if (rc)
  5096. goto err_card;
  5097. }
  5098. card->read.ccwdev = gdev->cdev[0];
  5099. card->write.ccwdev = gdev->cdev[1];
  5100. card->data.ccwdev = gdev->cdev[2];
  5101. dev_set_drvdata(&gdev->dev, card);
  5102. card->gdev = gdev;
  5103. gdev->cdev[0]->handler = qeth_irq;
  5104. gdev->cdev[1]->handler = qeth_irq;
  5105. gdev->cdev[2]->handler = qeth_irq;
  5106. qeth_determine_card_type(card);
  5107. rc = qeth_setup_card(card);
  5108. if (rc) {
  5109. QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
  5110. goto err_card;
  5111. }
  5112. qeth_determine_capabilities(card);
  5113. enforced_disc = qeth_enforce_discipline(card);
  5114. switch (enforced_disc) {
  5115. case QETH_DISCIPLINE_UNDETERMINED:
  5116. gdev->dev.type = &qeth_generic_devtype;
  5117. break;
  5118. default:
  5119. card->info.layer_enforced = true;
  5120. rc = qeth_core_load_discipline(card, enforced_disc);
  5121. if (rc)
  5122. goto err_card;
  5123. gdev->dev.type = (card->info.type != QETH_CARD_TYPE_OSN)
  5124. ? card->discipline->devtype
  5125. : &qeth_osn_devtype;
  5126. rc = card->discipline->setup(card->gdev);
  5127. if (rc)
  5128. goto err_disc;
  5129. break;
  5130. }
  5131. write_lock_irqsave(&qeth_core_card_list.rwlock, flags);
  5132. list_add_tail(&card->list, &qeth_core_card_list.list);
  5133. write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags);
  5134. return 0;
  5135. err_disc:
  5136. qeth_core_free_discipline(card);
  5137. err_card:
  5138. qeth_core_free_card(card);
  5139. err_dev:
  5140. put_device(dev);
  5141. return rc;
  5142. }
  5143. static void qeth_core_remove_device(struct ccwgroup_device *gdev)
  5144. {
  5145. unsigned long flags;
  5146. struct qeth_card *card = dev_get_drvdata(&gdev->dev);
  5147. QETH_DBF_TEXT(SETUP, 2, "removedv");
  5148. if (card->discipline) {
  5149. card->discipline->remove(gdev);
  5150. qeth_core_free_discipline(card);
  5151. }
  5152. write_lock_irqsave(&qeth_core_card_list.rwlock, flags);
  5153. list_del(&card->list);
  5154. write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags);
  5155. qeth_core_free_card(card);
  5156. dev_set_drvdata(&gdev->dev, NULL);
  5157. put_device(&gdev->dev);
  5158. return;
  5159. }
  5160. static int qeth_core_set_online(struct ccwgroup_device *gdev)
  5161. {
  5162. struct qeth_card *card = dev_get_drvdata(&gdev->dev);
  5163. int rc = 0;
  5164. enum qeth_discipline_id def_discipline;
  5165. if (!card->discipline) {
  5166. if (card->info.type == QETH_CARD_TYPE_IQD)
  5167. def_discipline = QETH_DISCIPLINE_LAYER3;
  5168. else
  5169. def_discipline = QETH_DISCIPLINE_LAYER2;
  5170. rc = qeth_core_load_discipline(card, def_discipline);
  5171. if (rc)
  5172. goto err;
  5173. rc = card->discipline->setup(card->gdev);
  5174. if (rc) {
  5175. qeth_core_free_discipline(card);
  5176. goto err;
  5177. }
  5178. }
  5179. rc = card->discipline->set_online(gdev);
  5180. err:
  5181. return rc;
  5182. }
  5183. static int qeth_core_set_offline(struct ccwgroup_device *gdev)
  5184. {
  5185. struct qeth_card *card = dev_get_drvdata(&gdev->dev);
  5186. return card->discipline->set_offline(gdev);
  5187. }
  5188. static void qeth_core_shutdown(struct ccwgroup_device *gdev)
  5189. {
  5190. struct qeth_card *card = dev_get_drvdata(&gdev->dev);
  5191. qeth_set_allowed_threads(card, 0, 1);
  5192. if ((gdev->state == CCWGROUP_ONLINE) && card->info.hwtrap)
  5193. qeth_hw_trap(card, QETH_DIAGS_TRAP_DISARM);
  5194. qeth_qdio_clear_card(card, 0);
  5195. qeth_clear_qdio_buffers(card);
  5196. qdio_free(CARD_DDEV(card));
  5197. }
  5198. static int qeth_core_freeze(struct ccwgroup_device *gdev)
  5199. {
  5200. struct qeth_card *card = dev_get_drvdata(&gdev->dev);
  5201. if (card->discipline && card->discipline->freeze)
  5202. return card->discipline->freeze(gdev);
  5203. return 0;
  5204. }
  5205. static int qeth_core_thaw(struct ccwgroup_device *gdev)
  5206. {
  5207. struct qeth_card *card = dev_get_drvdata(&gdev->dev);
  5208. if (card->discipline && card->discipline->thaw)
  5209. return card->discipline->thaw(gdev);
  5210. return 0;
  5211. }
  5212. static int qeth_core_restore(struct ccwgroup_device *gdev)
  5213. {
  5214. struct qeth_card *card = dev_get_drvdata(&gdev->dev);
  5215. if (card->discipline && card->discipline->restore)
  5216. return card->discipline->restore(gdev);
  5217. return 0;
  5218. }
  5219. static struct ccwgroup_driver qeth_core_ccwgroup_driver = {
  5220. .driver = {
  5221. .owner = THIS_MODULE,
  5222. .name = "qeth",
  5223. },
  5224. .ccw_driver = &qeth_ccw_driver,
  5225. .setup = qeth_core_probe_device,
  5226. .remove = qeth_core_remove_device,
  5227. .set_online = qeth_core_set_online,
  5228. .set_offline = qeth_core_set_offline,
  5229. .shutdown = qeth_core_shutdown,
  5230. .prepare = NULL,
  5231. .complete = NULL,
  5232. .freeze = qeth_core_freeze,
  5233. .thaw = qeth_core_thaw,
  5234. .restore = qeth_core_restore,
  5235. };
  5236. static ssize_t group_store(struct device_driver *ddrv, const char *buf,
  5237. size_t count)
  5238. {
  5239. int err;
  5240. err = ccwgroup_create_dev(qeth_core_root_dev,
  5241. &qeth_core_ccwgroup_driver, 3, buf);
  5242. return err ? err : count;
  5243. }
  5244. static DRIVER_ATTR_WO(group);
  5245. static struct attribute *qeth_drv_attrs[] = {
  5246. &driver_attr_group.attr,
  5247. NULL,
  5248. };
  5249. static struct attribute_group qeth_drv_attr_group = {
  5250. .attrs = qeth_drv_attrs,
  5251. };
  5252. static const struct attribute_group *qeth_drv_attr_groups[] = {
  5253. &qeth_drv_attr_group,
  5254. NULL,
  5255. };
  5256. int qeth_do_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
  5257. {
  5258. struct qeth_card *card = dev->ml_priv;
  5259. struct mii_ioctl_data *mii_data;
  5260. int rc = 0;
  5261. if (!card)
  5262. return -ENODEV;
  5263. if (!qeth_card_hw_is_reachable(card))
  5264. return -ENODEV;
  5265. if (card->info.type == QETH_CARD_TYPE_OSN)
  5266. return -EPERM;
  5267. switch (cmd) {
  5268. case SIOC_QETH_ADP_SET_SNMP_CONTROL:
  5269. rc = qeth_snmp_command(card, rq->ifr_ifru.ifru_data);
  5270. break;
  5271. case SIOC_QETH_GET_CARD_TYPE:
  5272. if ((card->info.type == QETH_CARD_TYPE_OSD ||
  5273. card->info.type == QETH_CARD_TYPE_OSM ||
  5274. card->info.type == QETH_CARD_TYPE_OSX) &&
  5275. !card->info.guestlan)
  5276. return 1;
  5277. else
  5278. return 0;
  5279. case SIOCGMIIPHY:
  5280. mii_data = if_mii(rq);
  5281. mii_data->phy_id = 0;
  5282. break;
  5283. case SIOCGMIIREG:
  5284. mii_data = if_mii(rq);
  5285. if (mii_data->phy_id != 0)
  5286. rc = -EINVAL;
  5287. else
  5288. mii_data->val_out = qeth_mdio_read(dev,
  5289. mii_data->phy_id, mii_data->reg_num);
  5290. break;
  5291. case SIOC_QETH_QUERY_OAT:
  5292. rc = qeth_query_oat_command(card, rq->ifr_ifru.ifru_data);
  5293. break;
  5294. default:
  5295. if (card->discipline->do_ioctl)
  5296. rc = card->discipline->do_ioctl(dev, rq, cmd);
  5297. else
  5298. rc = -EOPNOTSUPP;
  5299. }
  5300. if (rc)
  5301. QETH_CARD_TEXT_(card, 2, "ioce%x", rc);
  5302. return rc;
  5303. }
  5304. EXPORT_SYMBOL_GPL(qeth_do_ioctl);
  5305. static struct {
  5306. const char str[ETH_GSTRING_LEN];
  5307. } qeth_ethtool_stats_keys[] = {
  5308. /* 0 */{"rx skbs"},
  5309. {"rx buffers"},
  5310. {"tx skbs"},
  5311. {"tx buffers"},
  5312. {"tx skbs no packing"},
  5313. {"tx buffers no packing"},
  5314. {"tx skbs packing"},
  5315. {"tx buffers packing"},
  5316. {"tx sg skbs"},
  5317. {"tx sg frags"},
  5318. /* 10 */{"rx sg skbs"},
  5319. {"rx sg frags"},
  5320. {"rx sg page allocs"},
  5321. {"tx large kbytes"},
  5322. {"tx large count"},
  5323. {"tx pk state ch n->p"},
  5324. {"tx pk state ch p->n"},
  5325. {"tx pk watermark low"},
  5326. {"tx pk watermark high"},
  5327. {"queue 0 buffer usage"},
  5328. /* 20 */{"queue 1 buffer usage"},
  5329. {"queue 2 buffer usage"},
  5330. {"queue 3 buffer usage"},
  5331. {"rx poll time"},
  5332. {"rx poll count"},
  5333. {"rx do_QDIO time"},
  5334. {"rx do_QDIO count"},
  5335. {"tx handler time"},
  5336. {"tx handler count"},
  5337. {"tx time"},
  5338. /* 30 */{"tx count"},
  5339. {"tx do_QDIO time"},
  5340. {"tx do_QDIO count"},
  5341. {"tx csum"},
  5342. {"tx lin"},
  5343. {"tx linfail"},
  5344. {"cq handler count"},
  5345. {"cq handler time"}
  5346. };
  5347. int qeth_core_get_sset_count(struct net_device *dev, int stringset)
  5348. {
  5349. switch (stringset) {
  5350. case ETH_SS_STATS:
  5351. return (sizeof(qeth_ethtool_stats_keys) / ETH_GSTRING_LEN);
  5352. default:
  5353. return -EINVAL;
  5354. }
  5355. }
  5356. EXPORT_SYMBOL_GPL(qeth_core_get_sset_count);
  5357. void qeth_core_get_ethtool_stats(struct net_device *dev,
  5358. struct ethtool_stats *stats, u64 *data)
  5359. {
  5360. struct qeth_card *card = dev->ml_priv;
  5361. data[0] = card->stats.rx_packets -
  5362. card->perf_stats.initial_rx_packets;
  5363. data[1] = card->perf_stats.bufs_rec;
  5364. data[2] = card->stats.tx_packets -
  5365. card->perf_stats.initial_tx_packets;
  5366. data[3] = card->perf_stats.bufs_sent;
  5367. data[4] = card->stats.tx_packets - card->perf_stats.initial_tx_packets
  5368. - card->perf_stats.skbs_sent_pack;
  5369. data[5] = card->perf_stats.bufs_sent - card->perf_stats.bufs_sent_pack;
  5370. data[6] = card->perf_stats.skbs_sent_pack;
  5371. data[7] = card->perf_stats.bufs_sent_pack;
  5372. data[8] = card->perf_stats.sg_skbs_sent;
  5373. data[9] = card->perf_stats.sg_frags_sent;
  5374. data[10] = card->perf_stats.sg_skbs_rx;
  5375. data[11] = card->perf_stats.sg_frags_rx;
  5376. data[12] = card->perf_stats.sg_alloc_page_rx;
  5377. data[13] = (card->perf_stats.large_send_bytes >> 10);
  5378. data[14] = card->perf_stats.large_send_cnt;
  5379. data[15] = card->perf_stats.sc_dp_p;
  5380. data[16] = card->perf_stats.sc_p_dp;
  5381. data[17] = QETH_LOW_WATERMARK_PACK;
  5382. data[18] = QETH_HIGH_WATERMARK_PACK;
  5383. data[19] = atomic_read(&card->qdio.out_qs[0]->used_buffers);
  5384. data[20] = (card->qdio.no_out_queues > 1) ?
  5385. atomic_read(&card->qdio.out_qs[1]->used_buffers) : 0;
  5386. data[21] = (card->qdio.no_out_queues > 2) ?
  5387. atomic_read(&card->qdio.out_qs[2]->used_buffers) : 0;
  5388. data[22] = (card->qdio.no_out_queues > 3) ?
  5389. atomic_read(&card->qdio.out_qs[3]->used_buffers) : 0;
  5390. data[23] = card->perf_stats.inbound_time;
  5391. data[24] = card->perf_stats.inbound_cnt;
  5392. data[25] = card->perf_stats.inbound_do_qdio_time;
  5393. data[26] = card->perf_stats.inbound_do_qdio_cnt;
  5394. data[27] = card->perf_stats.outbound_handler_time;
  5395. data[28] = card->perf_stats.outbound_handler_cnt;
  5396. data[29] = card->perf_stats.outbound_time;
  5397. data[30] = card->perf_stats.outbound_cnt;
  5398. data[31] = card->perf_stats.outbound_do_qdio_time;
  5399. data[32] = card->perf_stats.outbound_do_qdio_cnt;
  5400. data[33] = card->perf_stats.tx_csum;
  5401. data[34] = card->perf_stats.tx_lin;
  5402. data[35] = card->perf_stats.tx_linfail;
  5403. data[36] = card->perf_stats.cq_cnt;
  5404. data[37] = card->perf_stats.cq_time;
  5405. }
  5406. EXPORT_SYMBOL_GPL(qeth_core_get_ethtool_stats);
  5407. void qeth_core_get_strings(struct net_device *dev, u32 stringset, u8 *data)
  5408. {
  5409. switch (stringset) {
  5410. case ETH_SS_STATS:
  5411. memcpy(data, &qeth_ethtool_stats_keys,
  5412. sizeof(qeth_ethtool_stats_keys));
  5413. break;
  5414. default:
  5415. WARN_ON(1);
  5416. break;
  5417. }
  5418. }
  5419. EXPORT_SYMBOL_GPL(qeth_core_get_strings);
  5420. void qeth_core_get_drvinfo(struct net_device *dev,
  5421. struct ethtool_drvinfo *info)
  5422. {
  5423. struct qeth_card *card = dev->ml_priv;
  5424. strlcpy(info->driver, card->options.layer2 ? "qeth_l2" : "qeth_l3",
  5425. sizeof(info->driver));
  5426. strlcpy(info->version, "1.0", sizeof(info->version));
  5427. strlcpy(info->fw_version, card->info.mcl_level,
  5428. sizeof(info->fw_version));
  5429. snprintf(info->bus_info, sizeof(info->bus_info), "%s/%s/%s",
  5430. CARD_RDEV_ID(card), CARD_WDEV_ID(card), CARD_DDEV_ID(card));
  5431. }
  5432. EXPORT_SYMBOL_GPL(qeth_core_get_drvinfo);
  5433. /* Helper function to fill 'advertising' and 'supported' which are the same. */
  5434. /* Autoneg and full-duplex are supported and advertised unconditionally. */
  5435. /* Always advertise and support all speeds up to specified, and only one */
  5436. /* specified port type. */
  5437. static void qeth_set_cmd_adv_sup(struct ethtool_link_ksettings *cmd,
  5438. int maxspeed, int porttype)
  5439. {
  5440. ethtool_link_ksettings_zero_link_mode(cmd, supported);
  5441. ethtool_link_ksettings_zero_link_mode(cmd, advertising);
  5442. ethtool_link_ksettings_zero_link_mode(cmd, lp_advertising);
  5443. ethtool_link_ksettings_add_link_mode(cmd, supported, Autoneg);
  5444. ethtool_link_ksettings_add_link_mode(cmd, advertising, Autoneg);
  5445. switch (porttype) {
  5446. case PORT_TP:
  5447. ethtool_link_ksettings_add_link_mode(cmd, supported, TP);
  5448. ethtool_link_ksettings_add_link_mode(cmd, advertising, TP);
  5449. break;
  5450. case PORT_FIBRE:
  5451. ethtool_link_ksettings_add_link_mode(cmd, supported, FIBRE);
  5452. ethtool_link_ksettings_add_link_mode(cmd, advertising, FIBRE);
  5453. break;
  5454. default:
  5455. ethtool_link_ksettings_add_link_mode(cmd, supported, TP);
  5456. ethtool_link_ksettings_add_link_mode(cmd, advertising, TP);
  5457. WARN_ON_ONCE(1);
  5458. }
  5459. /* fallthrough from high to low, to select all legal speeds: */
  5460. switch (maxspeed) {
  5461. case SPEED_10000:
  5462. ethtool_link_ksettings_add_link_mode(cmd, supported,
  5463. 10000baseT_Full);
  5464. ethtool_link_ksettings_add_link_mode(cmd, advertising,
  5465. 10000baseT_Full);
  5466. case SPEED_1000:
  5467. ethtool_link_ksettings_add_link_mode(cmd, supported,
  5468. 1000baseT_Full);
  5469. ethtool_link_ksettings_add_link_mode(cmd, advertising,
  5470. 1000baseT_Full);
  5471. ethtool_link_ksettings_add_link_mode(cmd, supported,
  5472. 1000baseT_Half);
  5473. ethtool_link_ksettings_add_link_mode(cmd, advertising,
  5474. 1000baseT_Half);
  5475. case SPEED_100:
  5476. ethtool_link_ksettings_add_link_mode(cmd, supported,
  5477. 100baseT_Full);
  5478. ethtool_link_ksettings_add_link_mode(cmd, advertising,
  5479. 100baseT_Full);
  5480. ethtool_link_ksettings_add_link_mode(cmd, supported,
  5481. 100baseT_Half);
  5482. ethtool_link_ksettings_add_link_mode(cmd, advertising,
  5483. 100baseT_Half);
  5484. case SPEED_10:
  5485. ethtool_link_ksettings_add_link_mode(cmd, supported,
  5486. 10baseT_Full);
  5487. ethtool_link_ksettings_add_link_mode(cmd, advertising,
  5488. 10baseT_Full);
  5489. ethtool_link_ksettings_add_link_mode(cmd, supported,
  5490. 10baseT_Half);
  5491. ethtool_link_ksettings_add_link_mode(cmd, advertising,
  5492. 10baseT_Half);
  5493. /* end fallthrough */
  5494. break;
  5495. default:
  5496. ethtool_link_ksettings_add_link_mode(cmd, supported,
  5497. 10baseT_Full);
  5498. ethtool_link_ksettings_add_link_mode(cmd, advertising,
  5499. 10baseT_Full);
  5500. ethtool_link_ksettings_add_link_mode(cmd, supported,
  5501. 10baseT_Half);
  5502. ethtool_link_ksettings_add_link_mode(cmd, advertising,
  5503. 10baseT_Half);
  5504. WARN_ON_ONCE(1);
  5505. }
  5506. }
  5507. int qeth_core_ethtool_get_link_ksettings(struct net_device *netdev,
  5508. struct ethtool_link_ksettings *cmd)
  5509. {
  5510. struct qeth_card *card = netdev->ml_priv;
  5511. enum qeth_link_types link_type;
  5512. struct carrier_info carrier_info;
  5513. int rc;
  5514. if ((card->info.type == QETH_CARD_TYPE_IQD) || (card->info.guestlan))
  5515. link_type = QETH_LINK_TYPE_10GBIT_ETH;
  5516. else
  5517. link_type = card->info.link_type;
  5518. cmd->base.duplex = DUPLEX_FULL;
  5519. cmd->base.autoneg = AUTONEG_ENABLE;
  5520. cmd->base.phy_address = 0;
  5521. cmd->base.mdio_support = 0;
  5522. cmd->base.eth_tp_mdix = ETH_TP_MDI_INVALID;
  5523. cmd->base.eth_tp_mdix_ctrl = ETH_TP_MDI_INVALID;
  5524. switch (link_type) {
  5525. case QETH_LINK_TYPE_FAST_ETH:
  5526. case QETH_LINK_TYPE_LANE_ETH100:
  5527. cmd->base.speed = SPEED_100;
  5528. cmd->base.port = PORT_TP;
  5529. break;
  5530. case QETH_LINK_TYPE_GBIT_ETH:
  5531. case QETH_LINK_TYPE_LANE_ETH1000:
  5532. cmd->base.speed = SPEED_1000;
  5533. cmd->base.port = PORT_FIBRE;
  5534. break;
  5535. case QETH_LINK_TYPE_10GBIT_ETH:
  5536. cmd->base.speed = SPEED_10000;
  5537. cmd->base.port = PORT_FIBRE;
  5538. break;
  5539. default:
  5540. cmd->base.speed = SPEED_10;
  5541. cmd->base.port = PORT_TP;
  5542. }
  5543. qeth_set_cmd_adv_sup(cmd, cmd->base.speed, cmd->base.port);
  5544. /* Check if we can obtain more accurate information. */
  5545. /* If QUERY_CARD_INFO command is not supported or fails, */
  5546. /* just return the heuristics that was filled above. */
  5547. if (!qeth_card_hw_is_reachable(card))
  5548. return -ENODEV;
  5549. rc = qeth_query_card_info(card, &carrier_info);
  5550. if (rc == -EOPNOTSUPP) /* for old hardware, return heuristic */
  5551. return 0;
  5552. if (rc) /* report error from the hardware operation */
  5553. return rc;
  5554. /* on success, fill in the information got from the hardware */
  5555. netdev_dbg(netdev,
  5556. "card info: card_type=0x%02x, port_mode=0x%04x, port_speed=0x%08x\n",
  5557. carrier_info.card_type,
  5558. carrier_info.port_mode,
  5559. carrier_info.port_speed);
  5560. /* Update attributes for which we've obtained more authoritative */
  5561. /* information, leave the rest the way they where filled above. */
  5562. switch (carrier_info.card_type) {
  5563. case CARD_INFO_TYPE_1G_COPPER_A:
  5564. case CARD_INFO_TYPE_1G_COPPER_B:
  5565. cmd->base.port = PORT_TP;
  5566. qeth_set_cmd_adv_sup(cmd, SPEED_1000, cmd->base.port);
  5567. break;
  5568. case CARD_INFO_TYPE_1G_FIBRE_A:
  5569. case CARD_INFO_TYPE_1G_FIBRE_B:
  5570. cmd->base.port = PORT_FIBRE;
  5571. qeth_set_cmd_adv_sup(cmd, SPEED_1000, cmd->base.port);
  5572. break;
  5573. case CARD_INFO_TYPE_10G_FIBRE_A:
  5574. case CARD_INFO_TYPE_10G_FIBRE_B:
  5575. cmd->base.port = PORT_FIBRE;
  5576. qeth_set_cmd_adv_sup(cmd, SPEED_10000, cmd->base.port);
  5577. break;
  5578. }
  5579. switch (carrier_info.port_mode) {
  5580. case CARD_INFO_PORTM_FULLDUPLEX:
  5581. cmd->base.duplex = DUPLEX_FULL;
  5582. break;
  5583. case CARD_INFO_PORTM_HALFDUPLEX:
  5584. cmd->base.duplex = DUPLEX_HALF;
  5585. break;
  5586. }
  5587. switch (carrier_info.port_speed) {
  5588. case CARD_INFO_PORTS_10M:
  5589. cmd->base.speed = SPEED_10;
  5590. break;
  5591. case CARD_INFO_PORTS_100M:
  5592. cmd->base.speed = SPEED_100;
  5593. break;
  5594. case CARD_INFO_PORTS_1G:
  5595. cmd->base.speed = SPEED_1000;
  5596. break;
  5597. case CARD_INFO_PORTS_10G:
  5598. cmd->base.speed = SPEED_10000;
  5599. break;
  5600. }
  5601. return 0;
  5602. }
  5603. EXPORT_SYMBOL_GPL(qeth_core_ethtool_get_link_ksettings);
  5604. /* Callback to handle checksum offload command reply from OSA card.
  5605. * Verify that required features have been enabled on the card.
  5606. * Return error in hdr->return_code as this value is checked by caller.
  5607. *
  5608. * Always returns zero to indicate no further messages from the OSA card.
  5609. */
  5610. static int qeth_ipa_checksum_run_cmd_cb(struct qeth_card *card,
  5611. struct qeth_reply *reply,
  5612. unsigned long data)
  5613. {
  5614. struct qeth_ipa_cmd *cmd = (struct qeth_ipa_cmd *) data;
  5615. struct qeth_checksum_cmd *chksum_cb =
  5616. (struct qeth_checksum_cmd *)reply->param;
  5617. QETH_CARD_TEXT(card, 4, "chkdoccb");
  5618. if (qeth_setassparms_inspect_rc(cmd))
  5619. return 0;
  5620. memset(chksum_cb, 0, sizeof(*chksum_cb));
  5621. if (cmd->data.setassparms.hdr.command_code == IPA_CMD_ASS_START) {
  5622. chksum_cb->supported =
  5623. cmd->data.setassparms.data.chksum.supported;
  5624. QETH_CARD_TEXT_(card, 3, "strt:%x", chksum_cb->supported);
  5625. }
  5626. if (cmd->data.setassparms.hdr.command_code == IPA_CMD_ASS_ENABLE) {
  5627. chksum_cb->supported =
  5628. cmd->data.setassparms.data.chksum.supported;
  5629. chksum_cb->enabled =
  5630. cmd->data.setassparms.data.chksum.enabled;
  5631. QETH_CARD_TEXT_(card, 3, "supp:%x", chksum_cb->supported);
  5632. QETH_CARD_TEXT_(card, 3, "enab:%x", chksum_cb->enabled);
  5633. }
  5634. return 0;
  5635. }
  5636. /* Send command to OSA card and check results. */
  5637. static int qeth_ipa_checksum_run_cmd(struct qeth_card *card,
  5638. enum qeth_ipa_funcs ipa_func,
  5639. __u16 cmd_code, long data,
  5640. struct qeth_checksum_cmd *chksum_cb)
  5641. {
  5642. struct qeth_cmd_buffer *iob;
  5643. int rc = -ENOMEM;
  5644. QETH_CARD_TEXT(card, 4, "chkdocmd");
  5645. iob = qeth_get_setassparms_cmd(card, ipa_func, cmd_code,
  5646. sizeof(__u32), QETH_PROT_IPV4);
  5647. if (iob)
  5648. rc = qeth_send_setassparms(card, iob, sizeof(__u32), data,
  5649. qeth_ipa_checksum_run_cmd_cb,
  5650. chksum_cb);
  5651. return rc;
  5652. }
  5653. static int qeth_send_checksum_on(struct qeth_card *card, int cstype)
  5654. {
  5655. const __u32 required_features = QETH_IPA_CHECKSUM_IP_HDR |
  5656. QETH_IPA_CHECKSUM_UDP |
  5657. QETH_IPA_CHECKSUM_TCP;
  5658. struct qeth_checksum_cmd chksum_cb;
  5659. int rc;
  5660. rc = qeth_ipa_checksum_run_cmd(card, cstype, IPA_CMD_ASS_START, 0,
  5661. &chksum_cb);
  5662. if (!rc) {
  5663. if ((required_features & chksum_cb.supported) !=
  5664. required_features)
  5665. rc = -EIO;
  5666. else if (!(QETH_IPA_CHECKSUM_LP2LP & chksum_cb.supported) &&
  5667. cstype == IPA_INBOUND_CHECKSUM)
  5668. dev_warn(&card->gdev->dev,
  5669. "Hardware checksumming is performed only if %s and its peer use different OSA Express 3 ports\n",
  5670. QETH_CARD_IFNAME(card));
  5671. }
  5672. if (rc) {
  5673. qeth_send_simple_setassparms(card, cstype, IPA_CMD_ASS_STOP, 0);
  5674. dev_warn(&card->gdev->dev,
  5675. "Starting HW checksumming for %s failed, using SW checksumming\n",
  5676. QETH_CARD_IFNAME(card));
  5677. return rc;
  5678. }
  5679. rc = qeth_ipa_checksum_run_cmd(card, cstype, IPA_CMD_ASS_ENABLE,
  5680. chksum_cb.supported, &chksum_cb);
  5681. if (!rc) {
  5682. if ((required_features & chksum_cb.enabled) !=
  5683. required_features)
  5684. rc = -EIO;
  5685. }
  5686. if (rc) {
  5687. qeth_send_simple_setassparms(card, cstype, IPA_CMD_ASS_STOP, 0);
  5688. dev_warn(&card->gdev->dev,
  5689. "Enabling HW checksumming for %s failed, using SW checksumming\n",
  5690. QETH_CARD_IFNAME(card));
  5691. return rc;
  5692. }
  5693. dev_info(&card->gdev->dev, "HW Checksumming (%sbound) enabled\n",
  5694. cstype == IPA_INBOUND_CHECKSUM ? "in" : "out");
  5695. return 0;
  5696. }
  5697. static int qeth_set_ipa_csum(struct qeth_card *card, int on, int cstype)
  5698. {
  5699. int rc = (on) ? qeth_send_checksum_on(card, cstype)
  5700. : qeth_send_simple_setassparms(card, cstype,
  5701. IPA_CMD_ASS_STOP, 0);
  5702. return rc ? -EIO : 0;
  5703. }
  5704. static int qeth_set_ipa_tso(struct qeth_card *card, int on)
  5705. {
  5706. int rc;
  5707. QETH_CARD_TEXT(card, 3, "sttso");
  5708. if (on) {
  5709. rc = qeth_send_simple_setassparms(card, IPA_OUTBOUND_TSO,
  5710. IPA_CMD_ASS_START, 0);
  5711. if (rc) {
  5712. dev_warn(&card->gdev->dev,
  5713. "Starting outbound TCP segmentation offload for %s failed\n",
  5714. QETH_CARD_IFNAME(card));
  5715. return -EIO;
  5716. }
  5717. dev_info(&card->gdev->dev, "Outbound TSO enabled\n");
  5718. } else {
  5719. rc = qeth_send_simple_setassparms(card, IPA_OUTBOUND_TSO,
  5720. IPA_CMD_ASS_STOP, 0);
  5721. }
  5722. return rc;
  5723. }
  5724. #define QETH_HW_FEATURES (NETIF_F_RXCSUM | NETIF_F_IP_CSUM | NETIF_F_TSO)
  5725. /**
  5726. * qeth_recover_features() - Restore device features after recovery
  5727. * @dev: the recovering net_device
  5728. *
  5729. * Caller must hold rtnl lock.
  5730. */
  5731. void qeth_recover_features(struct net_device *dev)
  5732. {
  5733. netdev_features_t features = dev->features;
  5734. struct qeth_card *card = dev->ml_priv;
  5735. /* force-off any feature that needs an IPA sequence.
  5736. * netdev_update_features() will restart them.
  5737. */
  5738. dev->features &= ~QETH_HW_FEATURES;
  5739. netdev_update_features(dev);
  5740. if (features == dev->features)
  5741. return;
  5742. dev_warn(&card->gdev->dev,
  5743. "Device recovery failed to restore all offload features\n");
  5744. }
  5745. EXPORT_SYMBOL_GPL(qeth_recover_features);
  5746. int qeth_set_features(struct net_device *dev, netdev_features_t features)
  5747. {
  5748. struct qeth_card *card = dev->ml_priv;
  5749. netdev_features_t changed = dev->features ^ features;
  5750. int rc = 0;
  5751. QETH_DBF_TEXT(SETUP, 2, "setfeat");
  5752. QETH_DBF_HEX(SETUP, 2, &features, sizeof(features));
  5753. if ((changed & NETIF_F_IP_CSUM)) {
  5754. rc = qeth_set_ipa_csum(card,
  5755. features & NETIF_F_IP_CSUM ? 1 : 0,
  5756. IPA_OUTBOUND_CHECKSUM);
  5757. if (rc)
  5758. changed ^= NETIF_F_IP_CSUM;
  5759. }
  5760. if ((changed & NETIF_F_RXCSUM)) {
  5761. rc = qeth_set_ipa_csum(card,
  5762. features & NETIF_F_RXCSUM ? 1 : 0,
  5763. IPA_INBOUND_CHECKSUM);
  5764. if (rc)
  5765. changed ^= NETIF_F_RXCSUM;
  5766. }
  5767. if ((changed & NETIF_F_TSO)) {
  5768. rc = qeth_set_ipa_tso(card, features & NETIF_F_TSO ? 1 : 0);
  5769. if (rc)
  5770. changed ^= NETIF_F_TSO;
  5771. }
  5772. /* everything changed successfully? */
  5773. if ((dev->features ^ features) == changed)
  5774. return 0;
  5775. /* something went wrong. save changed features and return error */
  5776. dev->features ^= changed;
  5777. return -EIO;
  5778. }
  5779. EXPORT_SYMBOL_GPL(qeth_set_features);
  5780. netdev_features_t qeth_fix_features(struct net_device *dev,
  5781. netdev_features_t features)
  5782. {
  5783. struct qeth_card *card = dev->ml_priv;
  5784. QETH_DBF_TEXT(SETUP, 2, "fixfeat");
  5785. if (!qeth_is_supported(card, IPA_OUTBOUND_CHECKSUM))
  5786. features &= ~NETIF_F_IP_CSUM;
  5787. if (!qeth_is_supported(card, IPA_INBOUND_CHECKSUM))
  5788. features &= ~NETIF_F_RXCSUM;
  5789. if (!qeth_is_supported(card, IPA_OUTBOUND_TSO))
  5790. features &= ~NETIF_F_TSO;
  5791. /* if the card isn't up, remove features that require hw changes */
  5792. if (card->state == CARD_STATE_DOWN ||
  5793. card->state == CARD_STATE_RECOVER)
  5794. features &= ~QETH_HW_FEATURES;
  5795. QETH_DBF_HEX(SETUP, 2, &features, sizeof(features));
  5796. return features;
  5797. }
  5798. EXPORT_SYMBOL_GPL(qeth_fix_features);
  5799. netdev_features_t qeth_features_check(struct sk_buff *skb,
  5800. struct net_device *dev,
  5801. netdev_features_t features)
  5802. {
  5803. /* GSO segmentation builds skbs with
  5804. * a (small) linear part for the headers, and
  5805. * page frags for the data.
  5806. * Compared to a linear skb, the header-only part consumes an
  5807. * additional buffer element. This reduces buffer utilization, and
  5808. * hurts throughput. So compress small segments into one element.
  5809. */
  5810. if (netif_needs_gso(skb, features)) {
  5811. /* match skb_segment(): */
  5812. unsigned int doffset = skb->data - skb_mac_header(skb);
  5813. unsigned int hsize = skb_shinfo(skb)->gso_size;
  5814. unsigned int hroom = skb_headroom(skb);
  5815. /* linearize only if resulting skb allocations are order-0: */
  5816. if (SKB_DATA_ALIGN(hroom + doffset + hsize) <= SKB_MAX_HEAD(0))
  5817. features &= ~NETIF_F_SG;
  5818. }
  5819. return vlan_features_check(skb, features);
  5820. }
  5821. EXPORT_SYMBOL_GPL(qeth_features_check);
  5822. static int __init qeth_core_init(void)
  5823. {
  5824. int rc;
  5825. pr_info("loading core functions\n");
  5826. INIT_LIST_HEAD(&qeth_core_card_list.list);
  5827. INIT_LIST_HEAD(&qeth_dbf_list);
  5828. rwlock_init(&qeth_core_card_list.rwlock);
  5829. mutex_init(&qeth_mod_mutex);
  5830. qeth_wq = create_singlethread_workqueue("qeth_wq");
  5831. if (!qeth_wq) {
  5832. rc = -ENOMEM;
  5833. goto out_err;
  5834. }
  5835. rc = qeth_register_dbf_views();
  5836. if (rc)
  5837. goto dbf_err;
  5838. qeth_core_root_dev = root_device_register("qeth");
  5839. rc = PTR_ERR_OR_ZERO(qeth_core_root_dev);
  5840. if (rc)
  5841. goto register_err;
  5842. qeth_core_header_cache = kmem_cache_create("qeth_hdr",
  5843. sizeof(struct qeth_hdr) + ETH_HLEN, 64, 0, NULL);
  5844. if (!qeth_core_header_cache) {
  5845. rc = -ENOMEM;
  5846. goto slab_err;
  5847. }
  5848. qeth_qdio_outbuf_cache = kmem_cache_create("qeth_buf",
  5849. sizeof(struct qeth_qdio_out_buffer), 0, 0, NULL);
  5850. if (!qeth_qdio_outbuf_cache) {
  5851. rc = -ENOMEM;
  5852. goto cqslab_err;
  5853. }
  5854. rc = ccw_driver_register(&qeth_ccw_driver);
  5855. if (rc)
  5856. goto ccw_err;
  5857. qeth_core_ccwgroup_driver.driver.groups = qeth_drv_attr_groups;
  5858. rc = ccwgroup_driver_register(&qeth_core_ccwgroup_driver);
  5859. if (rc)
  5860. goto ccwgroup_err;
  5861. return 0;
  5862. ccwgroup_err:
  5863. ccw_driver_unregister(&qeth_ccw_driver);
  5864. ccw_err:
  5865. kmem_cache_destroy(qeth_qdio_outbuf_cache);
  5866. cqslab_err:
  5867. kmem_cache_destroy(qeth_core_header_cache);
  5868. slab_err:
  5869. root_device_unregister(qeth_core_root_dev);
  5870. register_err:
  5871. qeth_unregister_dbf_views();
  5872. dbf_err:
  5873. destroy_workqueue(qeth_wq);
  5874. out_err:
  5875. pr_err("Initializing the qeth device driver failed\n");
  5876. return rc;
  5877. }
  5878. static void __exit qeth_core_exit(void)
  5879. {
  5880. qeth_clear_dbf_list();
  5881. destroy_workqueue(qeth_wq);
  5882. ccwgroup_driver_unregister(&qeth_core_ccwgroup_driver);
  5883. ccw_driver_unregister(&qeth_ccw_driver);
  5884. kmem_cache_destroy(qeth_qdio_outbuf_cache);
  5885. kmem_cache_destroy(qeth_core_header_cache);
  5886. root_device_unregister(qeth_core_root_dev);
  5887. qeth_unregister_dbf_views();
  5888. pr_info("core functions removed\n");
  5889. }
  5890. module_init(qeth_core_init);
  5891. module_exit(qeth_core_exit);
  5892. MODULE_AUTHOR("Frank Blaschka <frank.blaschka@de.ibm.com>");
  5893. MODULE_DESCRIPTION("qeth core functions");
  5894. MODULE_LICENSE("GPL");