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ice_hw_autogen.h

ice_hw_autogen.h 13 KB
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  1. /* SPDX-License-Identifier: GPL-2.0 */
    2. 

  2. /* Copyright (c) 2018, Intel Corporation. */
    3. 

  3. 

  4. /* Machine-generated file */
    5. 

  5. 

  6. #ifndef _ICE_HW_AUTOGEN_H_
    7. 

  7. #define _ICE_HW_AUTOGEN_H_
    8. 

  8. 

  9. #define QTX_COMM_DBELL(_DBQM)		(0x002C0000 + ((_DBQM) * 4))
    10. 

  10. #define PF_FW_ARQBAH			0x00080180
    11. 

  11. #define PF_FW_ARQBAL			0x00080080
    12. 

  12. #define PF_FW_ARQH			0x00080380
    13. 

  13. #define PF_FW_ARQH_ARQH_S		0
    14. 

  14. #define PF_FW_ARQH_ARQH_M		ICE_M(0x3FF, PF_FW_ARQH_ARQH_S)
    15. 

  15. #define PF_FW_ARQLEN			0x00080280
    16. 

  16. #define PF_FW_ARQLEN_ARQLEN_S		0
    17. 

  17. #define PF_FW_ARQLEN_ARQLEN_M		ICE_M(0x3FF, PF_FW_ARQLEN_ARQLEN_S)
    18. 

  18. #define PF_FW_ARQLEN_ARQVFE_S		28
    19. 

  19. #define PF_FW_ARQLEN_ARQVFE_M		BIT(PF_FW_ARQLEN_ARQVFE_S)
    20. 

  20. #define PF_FW_ARQLEN_ARQOVFL_S		29
    21. 

  21. #define PF_FW_ARQLEN_ARQOVFL_M		BIT(PF_FW_ARQLEN_ARQOVFL_S)
    22. 

  22. #define PF_FW_ARQLEN_ARQCRIT_S		30
    23. 

  23. #define PF_FW_ARQLEN_ARQCRIT_M		BIT(PF_FW_ARQLEN_ARQCRIT_S)
    24. 

  24. #define PF_FW_ARQLEN_ARQENABLE_S	31
    25. 

  25. #define PF_FW_ARQLEN_ARQENABLE_M	BIT(PF_FW_ARQLEN_ARQENABLE_S)
    26. 

  26. #define PF_FW_ARQT			0x00080480
    27. 

  27. #define PF_FW_ATQBAH			0x00080100
    28. 

  28. #define PF_FW_ATQBAL			0x00080000
    29. 

  29. #define PF_FW_ATQH			0x00080300
    30. 

  30. #define PF_FW_ATQH_ATQH_S		0
    31. 

  31. #define PF_FW_ATQH_ATQH_M		ICE_M(0x3FF, PF_FW_ATQH_ATQH_S)
    32. 

  32. #define PF_FW_ATQLEN			0x00080200
    33. 

  33. #define PF_FW_ATQLEN_ATQLEN_S		0
    34. 

  34. #define PF_FW_ATQLEN_ATQLEN_M		ICE_M(0x3FF, PF_FW_ATQLEN_ATQLEN_S)
    35. 

  35. #define PF_FW_ATQLEN_ATQVFE_S		28
    36. 

  36. #define PF_FW_ATQLEN_ATQVFE_M		BIT(PF_FW_ATQLEN_ATQVFE_S)
    37. 

  37. #define PF_FW_ATQLEN_ATQOVFL_S		29
    38. 

  38. #define PF_FW_ATQLEN_ATQOVFL_M		BIT(PF_FW_ATQLEN_ATQOVFL_S)
    39. 

  39. #define PF_FW_ATQLEN_ATQCRIT_S		30
    40. 

  40. #define PF_FW_ATQLEN_ATQCRIT_M		BIT(PF_FW_ATQLEN_ATQCRIT_S)
    41. 

  41. #define PF_FW_ATQLEN_ATQENABLE_S	31
    42. 

  42. #define PF_FW_ATQLEN_ATQENABLE_M	BIT(PF_FW_ATQLEN_ATQENABLE_S)
    43. 

  43. #define PF_FW_ATQT			0x00080400
    44. 

  44. 

  45. #define GLFLXP_RXDID_FLAGS(_i, _j)		(0x0045D000 + ((_i) * 4 + (_j) * 256))
    46. 

  46. #define GLFLXP_RXDID_FLAGS_FLEXIFLAG_4N_S	0
    47. 

  47. #define GLFLXP_RXDID_FLAGS_FLEXIFLAG_4N_M	ICE_M(0x3F, GLFLXP_RXDID_FLAGS_FLEXIFLAG_4N_S)
    48. 

  48. #define GLFLXP_RXDID_FLAGS_FLEXIFLAG_4N_1_S	8
    49. 

  49. #define GLFLXP_RXDID_FLAGS_FLEXIFLAG_4N_1_M	ICE_M(0x3F, GLFLXP_RXDID_FLAGS_FLEXIFLAG_4N_1_S)
    50. 

  50. #define GLFLXP_RXDID_FLAGS_FLEXIFLAG_4N_2_S	16
    51. 

  51. #define GLFLXP_RXDID_FLAGS_FLEXIFLAG_4N_2_M	ICE_M(0x3F, GLFLXP_RXDID_FLAGS_FLEXIFLAG_4N_2_S)
    52. 

  52. #define GLFLXP_RXDID_FLAGS_FLEXIFLAG_4N_3_S	24
    53. 

  53. #define GLFLXP_RXDID_FLAGS_FLEXIFLAG_4N_3_M	ICE_M(0x3F, GLFLXP_RXDID_FLAGS_FLEXIFLAG_4N_3_S)
    54. 

  54. #define GLFLXP_RXDID_FLX_WRD_0(_i)		(0x0045c800 + ((_i) * 4))
    55. 

  55. #define GLFLXP_RXDID_FLX_WRD_0_PROT_MDID_S	0
    56. 

  56. #define GLFLXP_RXDID_FLX_WRD_0_PROT_MDID_M	ICE_M(0xFF, GLFLXP_RXDID_FLX_WRD_0_PROT_MDID_S)
    57. 

  57. #define GLFLXP_RXDID_FLX_WRD_0_RXDID_OPCODE_S	30
    58. 

  58. #define GLFLXP_RXDID_FLX_WRD_0_RXDID_OPCODE_M	ICE_M(0x3, GLFLXP_RXDID_FLX_WRD_0_RXDID_OPCODE_S)
    59. 

  59. #define GLFLXP_RXDID_FLX_WRD_1(_i)		(0x0045c900 + ((_i) * 4))
    60. 

  60. #define GLFLXP_RXDID_FLX_WRD_1_PROT_MDID_S	0
    61. 

  61. #define GLFLXP_RXDID_FLX_WRD_1_PROT_MDID_M	ICE_M(0xFF, GLFLXP_RXDID_FLX_WRD_1_PROT_MDID_S)
    62. 

  62. #define GLFLXP_RXDID_FLX_WRD_1_RXDID_OPCODE_S	30
    63. 

  63. #define GLFLXP_RXDID_FLX_WRD_1_RXDID_OPCODE_M	ICE_M(0x3, GLFLXP_RXDID_FLX_WRD_1_RXDID_OPCODE_S)
    64. 

  64. #define GLFLXP_RXDID_FLX_WRD_2(_i)		(0x0045ca00 + ((_i) * 4))
    65. 

  65. #define GLFLXP_RXDID_FLX_WRD_2_PROT_MDID_S	0
    66. 

  66. #define GLFLXP_RXDID_FLX_WRD_2_PROT_MDID_M	ICE_M(0xFF, GLFLXP_RXDID_FLX_WRD_2_PROT_MDID_S)
    67. 

  67. #define GLFLXP_RXDID_FLX_WRD_2_RXDID_OPCODE_S	30
    68. 

  68. #define GLFLXP_RXDID_FLX_WRD_2_RXDID_OPCODE_M	ICE_M(0x3, GLFLXP_RXDID_FLX_WRD_2_RXDID_OPCODE_S)
    69. 

  69. #define GLFLXP_RXDID_FLX_WRD_3(_i)		(0x0045cb00 + ((_i) * 4))
    70. 

  70. #define GLFLXP_RXDID_FLX_WRD_3_PROT_MDID_S	0
    71. 

  71. #define GLFLXP_RXDID_FLX_WRD_3_PROT_MDID_M	ICE_M(0xFF, GLFLXP_RXDID_FLX_WRD_3_PROT_MDID_S)
    72. 

  72. #define GLFLXP_RXDID_FLX_WRD_3_RXDID_OPCODE_S	30
    73. 

  73. #define GLFLXP_RXDID_FLX_WRD_3_RXDID_OPCODE_M	ICE_M(0x3, GLFLXP_RXDID_FLX_WRD_3_RXDID_OPCODE_S)
    74. 

  74. 

  75. #define QRXFLXP_CNTXT(_QRX)		(0x00480000 + ((_QRX) * 4))
    76. 

  76. #define QRXFLXP_CNTXT_RXDID_IDX_S	0
    77. 

  77. #define QRXFLXP_CNTXT_RXDID_IDX_M	ICE_M(0x3F, QRXFLXP_CNTXT_RXDID_IDX_S)
    78. 

  78. #define QRXFLXP_CNTXT_RXDID_PRIO_S	8
    79. 

  79. #define QRXFLXP_CNTXT_RXDID_PRIO_M	ICE_M(0x7, QRXFLXP_CNTXT_RXDID_PRIO_S)
    80. 

  80. #define QRXFLXP_CNTXT_TS_S		11
    81. 

  81. #define QRXFLXP_CNTXT_TS_M		BIT(QRXFLXP_CNTXT_TS_S)
    82. 

  82. #define GLGEN_RSTAT			0x000B8188
    83. 

  83. #define GLGEN_RSTAT_DEVSTATE_S		0
    84. 

  84. #define GLGEN_RSTAT_DEVSTATE_M		ICE_M(0x3, GLGEN_RSTAT_DEVSTATE_S)
    85. 

  85. #define GLGEN_RSTCTL			0x000B8180
    86. 

  86. #define GLGEN_RSTCTL_GRSTDEL_S		0
    87. 

  87. #define GLGEN_RSTCTL_GRSTDEL_M		ICE_M(0x3F, GLGEN_RSTCTL_GRSTDEL_S)
    88. 

  88. #define GLGEN_RSTAT_RESET_TYPE_S	2
    89. 

  89. #define GLGEN_RSTAT_RESET_TYPE_M	ICE_M(0x3, GLGEN_RSTAT_RESET_TYPE_S)
    90. 

  90. #define GLGEN_RTRIG			0x000B8190
    91. 

  91. #define GLGEN_RTRIG_CORER_S		0
    92. 

  92. #define GLGEN_RTRIG_CORER_M		BIT(GLGEN_RTRIG_CORER_S)
    93. 

  93. #define GLGEN_RTRIG_GLOBR_S		1
    94. 

  94. #define GLGEN_RTRIG_GLOBR_M		BIT(GLGEN_RTRIG_GLOBR_S)
    95. 

  95. #define GLGEN_STAT			0x000B612C
    96. 

  96. #define PFGEN_CTRL			0x00091000
    97. 

  97. #define PFGEN_CTRL_PFSWR_S		0
    98. 

  98. #define PFGEN_CTRL_PFSWR_M		BIT(PFGEN_CTRL_PFSWR_S)
    99. 

  99. #define PFGEN_STATE			0x00088000
    100. 

  100. #define PRTGEN_STATUS			0x000B8100
    101. 

  101. #define PFHMC_ERRORDATA			0x00520500
    102. 

  102. #define PFHMC_ERRORINFO			0x00520400
    103. 

  103. #define GLINT_DYN_CTL(_INT)		(0x00160000 + ((_INT) * 4))
    104. 

  104. #define GLINT_DYN_CTL_INTENA_S		0
    105. 

  105. #define GLINT_DYN_CTL_INTENA_M		BIT(GLINT_DYN_CTL_INTENA_S)
    106. 

  106. #define GLINT_DYN_CTL_CLEARPBA_S	1
    107. 

  107. #define GLINT_DYN_CTL_CLEARPBA_M	BIT(GLINT_DYN_CTL_CLEARPBA_S)
    108. 

  108. #define GLINT_DYN_CTL_SWINT_TRIG_S	2
    109. 

  109. #define GLINT_DYN_CTL_SWINT_TRIG_M	BIT(GLINT_DYN_CTL_SWINT_TRIG_S)
    110. 

  110. #define GLINT_DYN_CTL_ITR_INDX_S	3
    111. 

  111. #define GLINT_DYN_CTL_SW_ITR_INDX_S	25
    112. 

  112. #define GLINT_DYN_CTL_SW_ITR_INDX_M	ICE_M(0x3, GLINT_DYN_CTL_SW_ITR_INDX_S)
    113. 

  113. #define GLINT_DYN_CTL_INTENA_MSK_S	31
    114. 

  114. #define GLINT_DYN_CTL_INTENA_MSK_M	BIT(GLINT_DYN_CTL_INTENA_MSK_S)
    115. 

  115. #define GLINT_ITR(_i, _INT)		(0x00154000 + ((_i) * 8192 + (_INT) * 4))
    116. 

  116. #define PFINT_FW_CTL			0x0016C800
    117. 

  117. #define PFINT_FW_CTL_MSIX_INDX_S	0
    118. 

  118. #define PFINT_FW_CTL_MSIX_INDX_M	ICE_M(0x7FF, PFINT_FW_CTL_MSIX_INDX_S)
    119. 

  119. #define PFINT_FW_CTL_ITR_INDX_S		11
    120. 

  120. #define PFINT_FW_CTL_ITR_INDX_M		ICE_M(0x3, PFINT_FW_CTL_ITR_INDX_S)
    121. 

  121. #define PFINT_FW_CTL_CAUSE_ENA_S	30
    122. 

  122. #define PFINT_FW_CTL_CAUSE_ENA_M	BIT(PFINT_FW_CTL_CAUSE_ENA_S)
    123. 

  123. #define PFINT_OICR			0x0016CA00
    124. 

  124. #define PFINT_OICR_HLP_RDY_S		14
    125. 

  125. #define PFINT_OICR_HLP_RDY_M		BIT(PFINT_OICR_HLP_RDY_S)
    126. 

  126. #define PFINT_OICR_CPM_RDY_S		15
    127. 

  127. #define PFINT_OICR_CPM_RDY_M		BIT(PFINT_OICR_CPM_RDY_S)
    128. 

  128. #define PFINT_OICR_ECC_ERR_S		16
    129. 

  129. #define PFINT_OICR_ECC_ERR_M		BIT(PFINT_OICR_ECC_ERR_S)
    130. 

  130. #define PFINT_OICR_MAL_DETECT_S		19
    131. 

  131. #define PFINT_OICR_MAL_DETECT_M		BIT(PFINT_OICR_MAL_DETECT_S)
    132. 

  132. #define PFINT_OICR_GRST_S		20
    133. 

  133. #define PFINT_OICR_GRST_M		BIT(PFINT_OICR_GRST_S)
    134. 

  134. #define PFINT_OICR_PCI_EXCEPTION_S	21
    135. 

  135. #define PFINT_OICR_PCI_EXCEPTION_M	BIT(PFINT_OICR_PCI_EXCEPTION_S)
    136. 

  136. #define PFINT_OICR_GPIO_S		22
    137. 

  137. #define PFINT_OICR_GPIO_M		BIT(PFINT_OICR_GPIO_S)
    138. 

  138. #define PFINT_OICR_STORM_DETECT_S	24
    139. 

  139. #define PFINT_OICR_STORM_DETECT_M	BIT(PFINT_OICR_STORM_DETECT_S)
    140. 

  140. #define PFINT_OICR_HMC_ERR_S		26
    141. 

  141. #define PFINT_OICR_HMC_ERR_M		BIT(PFINT_OICR_HMC_ERR_S)
    142. 

  142. #define PFINT_OICR_PE_CRITERR_S		28
    143. 

  143. #define PFINT_OICR_PE_CRITERR_M		BIT(PFINT_OICR_PE_CRITERR_S)
    144. 

  144. #define PFINT_OICR_CTL			0x0016CA80
    145. 

  145. #define PFINT_OICR_CTL_MSIX_INDX_S	0
    146. 

  146. #define PFINT_OICR_CTL_MSIX_INDX_M	ICE_M(0x7FF, PFINT_OICR_CTL_MSIX_INDX_S)
    147. 

  147. #define PFINT_OICR_CTL_ITR_INDX_S	11
    148. 

  148. #define PFINT_OICR_CTL_ITR_INDX_M	ICE_M(0x3, PFINT_OICR_CTL_ITR_INDX_S)
    149. 

  149. #define PFINT_OICR_CTL_CAUSE_ENA_S	30
    150. 

  150. #define PFINT_OICR_CTL_CAUSE_ENA_M	BIT(PFINT_OICR_CTL_CAUSE_ENA_S)
    151. 

  151. #define PFINT_OICR_ENA			0x0016C900
    152. 

  152. #define QINT_RQCTL(_QRX)		(0x00150000 + ((_QRX) * 4))
    153. 

  153. #define QINT_RQCTL_MSIX_INDX_S		0
    154. 

  154. #define QINT_RQCTL_ITR_INDX_S		11
    155. 

  155. #define QINT_RQCTL_CAUSE_ENA_S		30
    156. 

  156. #define QINT_RQCTL_CAUSE_ENA_M		BIT(QINT_RQCTL_CAUSE_ENA_S)
    157. 

  157. #define QINT_TQCTL(_DBQM)		(0x00140000 + ((_DBQM) * 4))
    158. 

  158. #define QINT_TQCTL_MSIX_INDX_S		0
    159. 

  159. #define QINT_TQCTL_ITR_INDX_S		11
    160. 

  160. #define QINT_TQCTL_CAUSE_ENA_S		30
    161. 

  161. #define QINT_TQCTL_CAUSE_ENA_M		BIT(QINT_TQCTL_CAUSE_ENA_S)
    162. 

  162. #define GLLAN_RCTL_0			0x002941F8
    163. 

  163. #define QRX_CONTEXT(_i, _QRX)		(0x00280000 + ((_i) * 8192 + (_QRX) * 4))
    164. 

  164. #define QRX_CTRL(_QRX)			(0x00120000 + ((_QRX) * 4))
    165. 

  165. #define QRX_CTRL_MAX_INDEX		2047
    166. 

  166. #define QRX_CTRL_QENA_REQ_S		0
    167. 

  167. #define QRX_CTRL_QENA_REQ_M		BIT(QRX_CTRL_QENA_REQ_S)
    168. 

  168. #define QRX_CTRL_QENA_STAT_S		2
    169. 

  169. #define QRX_CTRL_QENA_STAT_M		BIT(QRX_CTRL_QENA_STAT_S)
    170. 

  170. #define QRX_ITR(_QRX)			(0x00292000 + ((_QRX) * 4))
    171. 

  171. #define QRX_TAIL(_QRX)			(0x00290000 + ((_QRX) * 4))
    172. 

  172. #define GLNVM_FLA			0x000B6108
    173. 

  173. #define GLNVM_FLA_LOCKED_S		6
    174. 

  174. #define GLNVM_FLA_LOCKED_M		BIT(GLNVM_FLA_LOCKED_S)
    175. 

  175. #define GLNVM_GENS			0x000B6100
    176. 

  176. #define GLNVM_GENS_SR_SIZE_S		5
    177. 

  177. #define GLNVM_GENS_SR_SIZE_M		ICE_M(0x7, GLNVM_GENS_SR_SIZE_S)
    178. 

  178. #define GLNVM_ULD			0x000B6008
    179. 

  179. #define GLNVM_ULD_CORER_DONE_S		3
    180. 

  180. #define GLNVM_ULD_CORER_DONE_M		BIT(GLNVM_ULD_CORER_DONE_S)
    181. 

  181. #define GLNVM_ULD_GLOBR_DONE_S		4
    182. 

  182. #define GLNVM_ULD_GLOBR_DONE_M		BIT(GLNVM_ULD_GLOBR_DONE_S)
    183. 

  183. #define PF_FUNC_RID			0x0009E880
    184. 

  184. #define PF_FUNC_RID_FUNC_NUM_S		0
    185. 

  185. #define PF_FUNC_RID_FUNC_NUM_M		ICE_M(0x7, PF_FUNC_RID_FUNC_NUM_S)
    186. 

  186. #define GLPRT_BPRCH(_i)			(0x00381384 + ((_i) * 8))
    187. 

  187. #define GLPRT_BPRCL(_i)			(0x00381380 + ((_i) * 8))
    188. 

  188. #define GLPRT_BPTCH(_i)			(0x00381244 + ((_i) * 8))
    189. 

  189. #define GLPRT_BPTCL(_i)			(0x00381240 + ((_i) * 8))
    190. 

  190. #define GLPRT_CRCERRS(_i)		(0x00380100 + ((_i) * 8))
    191. 

  191. #define GLPRT_GORCH(_i)			(0x00380004 + ((_i) * 8))
    192. 

  192. #define GLPRT_GORCL(_i)			(0x00380000 + ((_i) * 8))
    193. 

  193. #define GLPRT_GOTCH(_i)			(0x00380B44 + ((_i) * 8))
    194. 

  194. #define GLPRT_GOTCL(_i)			(0x00380B40 + ((_i) * 8))
    195. 

  195. #define GLPRT_ILLERRC(_i)		(0x003801C0 + ((_i) * 8))
    196. 

  196. #define GLPRT_LXOFFRXC(_i)		(0x003802C0 + ((_i) * 8))
    197. 

  197. #define GLPRT_LXOFFTXC(_i)		(0x00381180 + ((_i) * 8))
    198. 

  198. #define GLPRT_LXONRXC(_i)		(0x00380280 + ((_i) * 8))
    199. 

  199. #define GLPRT_LXONTXC(_i)		(0x00381140 + ((_i) * 8))
    200. 

  200. #define GLPRT_MLFC(_i)			(0x00380040 + ((_i) * 8))
    201. 

  201. #define GLPRT_MPRCH(_i)			(0x00381344 + ((_i) * 8))
    202. 

  202. #define GLPRT_MPRCL(_i)			(0x00381340 + ((_i) * 8))
    203. 

  203. #define GLPRT_MPTCH(_i)			(0x00381204 + ((_i) * 8))
    204. 

  204. #define GLPRT_MPTCL(_i)			(0x00381200 + ((_i) * 8))
    205. 

  205. #define GLPRT_MRFC(_i)			(0x00380080 + ((_i) * 8))
    206. 

  206. #define GLPRT_PRC1023H(_i)		(0x00380A04 + ((_i) * 8))
    207. 

  207. #define GLPRT_PRC1023L(_i)		(0x00380A00 + ((_i) * 8))
    208. 

  208. #define GLPRT_PRC127H(_i)		(0x00380944 + ((_i) * 8))
    209. 

  209. #define GLPRT_PRC127L(_i)		(0x00380940 + ((_i) * 8))
    210. 

  210. #define GLPRT_PRC1522H(_i)		(0x00380A44 + ((_i) * 8))
    211. 

  211. #define GLPRT_PRC1522L(_i)		(0x00380A40 + ((_i) * 8))
    212. 

  212. #define GLPRT_PRC255H(_i)		(0x00380984 + ((_i) * 8))
    213. 

  213. #define GLPRT_PRC255L(_i)		(0x00380980 + ((_i) * 8))
    214. 

  214. #define GLPRT_PRC511H(_i)		(0x003809C4 + ((_i) * 8))
    215. 

  215. #define GLPRT_PRC511L(_i)		(0x003809C0 + ((_i) * 8))
    216. 

  216. #define GLPRT_PRC64H(_i)		(0x00380904 + ((_i) * 8))
    217. 

  217. #define GLPRT_PRC64L(_i)		(0x00380900 + ((_i) * 8))
    218. 

  218. #define GLPRT_PRC9522H(_i)		(0x00380A84 + ((_i) * 8))
    219. 

  219. #define GLPRT_PRC9522L(_i)		(0x00380A80 + ((_i) * 8))
    220. 

  220. #define GLPRT_PTC1023H(_i)		(0x00380C84 + ((_i) * 8))
    221. 

  221. #define GLPRT_PTC1023L(_i)		(0x00380C80 + ((_i) * 8))
    222. 

  222. #define GLPRT_PTC127H(_i)		(0x00380BC4 + ((_i) * 8))
    223. 

  223. #define GLPRT_PTC127L(_i)		(0x00380BC0 + ((_i) * 8))
    224. 

  224. #define GLPRT_PTC1522H(_i)		(0x00380CC4 + ((_i) * 8))
    225. 

  225. #define GLPRT_PTC1522L(_i)		(0x00380CC0 + ((_i) * 8))
    226. 

  226. #define GLPRT_PTC255H(_i)		(0x00380C04 + ((_i) * 8))
    227. 

  227. #define GLPRT_PTC255L(_i)		(0x00380C00 + ((_i) * 8))
    228. 

  228. #define GLPRT_PTC511H(_i)		(0x00380C44 + ((_i) * 8))
    229. 

  229. #define GLPRT_PTC511L(_i)		(0x00380C40 + ((_i) * 8))
    230. 

  230. #define GLPRT_PTC64H(_i)		(0x00380B84 + ((_i) * 8))
    231. 

  231. #define GLPRT_PTC64L(_i)		(0x00380B80 + ((_i) * 8))
    232. 

  232. #define GLPRT_PTC9522H(_i)		(0x00380D04 + ((_i) * 8))
    233. 

  233. #define GLPRT_PTC9522L(_i)		(0x00380D00 + ((_i) * 8))
    234. 

  234. #define GLPRT_RFC(_i)			(0x00380AC0 + ((_i) * 8))
    235. 

  235. #define GLPRT_RJC(_i)			(0x00380B00 + ((_i) * 8))
    236. 

  236. #define GLPRT_RLEC(_i)			(0x00380140 + ((_i) * 8))
    237. 

  237. #define GLPRT_ROC(_i)			(0x00380240 + ((_i) * 8))
    238. 

  238. #define GLPRT_RUC(_i)			(0x00380200 + ((_i) * 8))
    239. 

  239. #define GLPRT_TDOLD(_i)			(0x00381280 + ((_i) * 8))
    240. 

  240. #define GLPRT_UPRCH(_i)			(0x00381304 + ((_i) * 8))
    241. 

  241. #define GLPRT_UPRCL(_i)			(0x00381300 + ((_i) * 8))
    242. 

  242. #define GLPRT_UPTCH(_i)			(0x003811C4 + ((_i) * 8))
    243. 

  243. #define GLPRT_UPTCL(_i)			(0x003811C0 + ((_i) * 8))
    244. 

  244. #define GLV_BPRCH(_i)			(0x003B6004 + ((_i) * 8))
    245. 

  245. #define GLV_BPRCL(_i)			(0x003B6000 + ((_i) * 8))
    246. 

  246. #define GLV_BPTCH(_i)			(0x0030E004 + ((_i) * 8))
    247. 

  247. #define GLV_BPTCL(_i)			(0x0030E000 + ((_i) * 8))
    248. 

  248. #define GLV_GORCH(_i)			(0x003B0004 + ((_i) * 8))
    249. 

  249. #define GLV_GORCL(_i)			(0x003B0000 + ((_i) * 8))
    250. 

  250. #define GLV_GOTCH(_i)			(0x00300004 + ((_i) * 8))
    251. 

  251. #define GLV_GOTCL(_i)			(0x00300000 + ((_i) * 8))
    252. 

  252. #define GLV_MPRCH(_i)			(0x003B4004 + ((_i) * 8))
    253. 

  253. #define GLV_MPRCL(_i)			(0x003B4000 + ((_i) * 8))
    254. 

  254. #define GLV_MPTCH(_i)			(0x0030C004 + ((_i) * 8))
    255. 

  255. #define GLV_MPTCL(_i)			(0x0030C000 + ((_i) * 8))
    256. 

  256. #define GLV_RDPC(_i)			(0x00294C04 + ((_i) * 4))
    257. 

  257. #define GLV_TEPC(_VSI)			(0x00312000 + ((_VSI) * 4))
    258. 

  258. #define GLV_UPRCH(_i)			(0x003B2004 + ((_i) * 8))
    259. 

  259. #define GLV_UPRCL(_i)			(0x003B2000 + ((_i) * 8))
    260. 

  260. #define GLV_UPTCH(_i)			(0x0030A004 + ((_i) * 8))
    261. 

  261. #define GLV_UPTCL(_i)			(0x0030A000 + ((_i) * 8))
    262. 

  262. #define VSIQF_HKEY_MAX_INDEX		12
    263. 

  263. 

  264. #endif /* _ICE_HW_AUTOGEN_H_ */
    265.