stm32-dac.c 8.3 KB

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  1. /*
  2. * This file is part of STM32 DAC driver
  3. *
  4. * Copyright (C) 2017, STMicroelectronics - All Rights Reserved
  5. * Authors: Amelie Delaunay <amelie.delaunay@st.com>
  6. * Fabrice Gasnier <fabrice.gasnier@st.com>
  7. *
  8. * License type: GPLv2
  9. *
  10. * This program is free software; you can redistribute it and/or modify it
  11. * under the terms of the GNU General Public License version 2 as published by
  12. * the Free Software Foundation.
  13. *
  14. * This program is distributed in the hope that it will be useful, but
  15. * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  16. * or FITNESS FOR A PARTICULAR PURPOSE.
  17. * See the GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License along with
  20. * this program. If not, see <http://www.gnu.org/licenses/>.
  21. */
  22. #include <linux/bitfield.h>
  23. #include <linux/delay.h>
  24. #include <linux/iio/iio.h>
  25. #include <linux/kernel.h>
  26. #include <linux/module.h>
  27. #include <linux/platform_device.h>
  28. #include "stm32-dac-core.h"
  29. #define STM32_DAC_CHANNEL_1 1
  30. #define STM32_DAC_CHANNEL_2 2
  31. #define STM32_DAC_IS_CHAN_1(ch) ((ch) & STM32_DAC_CHANNEL_1)
  32. /**
  33. * struct stm32_dac - private data of DAC driver
  34. * @common: reference to DAC common data
  35. */
  36. struct stm32_dac {
  37. struct stm32_dac_common *common;
  38. };
  39. static int stm32_dac_is_enabled(struct iio_dev *indio_dev, int channel)
  40. {
  41. struct stm32_dac *dac = iio_priv(indio_dev);
  42. u32 en, val;
  43. int ret;
  44. ret = regmap_read(dac->common->regmap, STM32_DAC_CR, &val);
  45. if (ret < 0)
  46. return ret;
  47. if (STM32_DAC_IS_CHAN_1(channel))
  48. en = FIELD_GET(STM32_DAC_CR_EN1, val);
  49. else
  50. en = FIELD_GET(STM32_DAC_CR_EN2, val);
  51. return !!en;
  52. }
  53. static int stm32_dac_set_enable_state(struct iio_dev *indio_dev, int ch,
  54. bool enable)
  55. {
  56. struct stm32_dac *dac = iio_priv(indio_dev);
  57. u32 msk = STM32_DAC_IS_CHAN_1(ch) ? STM32_DAC_CR_EN1 : STM32_DAC_CR_EN2;
  58. u32 en = enable ? msk : 0;
  59. int ret;
  60. ret = regmap_update_bits(dac->common->regmap, STM32_DAC_CR, msk, en);
  61. if (ret < 0) {
  62. dev_err(&indio_dev->dev, "%s failed\n", en ?
  63. "Enable" : "Disable");
  64. return ret;
  65. }
  66. /*
  67. * When HFSEL is set, it is not allowed to write the DHRx register
  68. * during 8 clock cycles after the ENx bit is set. It is not allowed
  69. * to make software/hardware trigger during this period either.
  70. */
  71. if (en && dac->common->hfsel)
  72. udelay(1);
  73. return 0;
  74. }
  75. static int stm32_dac_get_value(struct stm32_dac *dac, int channel, int *val)
  76. {
  77. int ret;
  78. if (STM32_DAC_IS_CHAN_1(channel))
  79. ret = regmap_read(dac->common->regmap, STM32_DAC_DOR1, val);
  80. else
  81. ret = regmap_read(dac->common->regmap, STM32_DAC_DOR2, val);
  82. return ret ? ret : IIO_VAL_INT;
  83. }
  84. static int stm32_dac_set_value(struct stm32_dac *dac, int channel, int val)
  85. {
  86. int ret;
  87. if (STM32_DAC_IS_CHAN_1(channel))
  88. ret = regmap_write(dac->common->regmap, STM32_DAC_DHR12R1, val);
  89. else
  90. ret = regmap_write(dac->common->regmap, STM32_DAC_DHR12R2, val);
  91. return ret;
  92. }
  93. static int stm32_dac_read_raw(struct iio_dev *indio_dev,
  94. struct iio_chan_spec const *chan,
  95. int *val, int *val2, long mask)
  96. {
  97. struct stm32_dac *dac = iio_priv(indio_dev);
  98. switch (mask) {
  99. case IIO_CHAN_INFO_RAW:
  100. return stm32_dac_get_value(dac, chan->channel, val);
  101. case IIO_CHAN_INFO_SCALE:
  102. *val = dac->common->vref_mv;
  103. *val2 = chan->scan_type.realbits;
  104. return IIO_VAL_FRACTIONAL_LOG2;
  105. default:
  106. return -EINVAL;
  107. }
  108. }
  109. static int stm32_dac_write_raw(struct iio_dev *indio_dev,
  110. struct iio_chan_spec const *chan,
  111. int val, int val2, long mask)
  112. {
  113. struct stm32_dac *dac = iio_priv(indio_dev);
  114. switch (mask) {
  115. case IIO_CHAN_INFO_RAW:
  116. return stm32_dac_set_value(dac, chan->channel, val);
  117. default:
  118. return -EINVAL;
  119. }
  120. }
  121. static int stm32_dac_debugfs_reg_access(struct iio_dev *indio_dev,
  122. unsigned reg, unsigned writeval,
  123. unsigned *readval)
  124. {
  125. struct stm32_dac *dac = iio_priv(indio_dev);
  126. if (!readval)
  127. return regmap_write(dac->common->regmap, reg, writeval);
  128. else
  129. return regmap_read(dac->common->regmap, reg, readval);
  130. }
  131. static const struct iio_info stm32_dac_iio_info = {
  132. .read_raw = stm32_dac_read_raw,
  133. .write_raw = stm32_dac_write_raw,
  134. .debugfs_reg_access = stm32_dac_debugfs_reg_access,
  135. .driver_module = THIS_MODULE,
  136. };
  137. static const char * const stm32_dac_powerdown_modes[] = {
  138. "three_state",
  139. };
  140. static int stm32_dac_get_powerdown_mode(struct iio_dev *indio_dev,
  141. const struct iio_chan_spec *chan)
  142. {
  143. return 0;
  144. }
  145. static int stm32_dac_set_powerdown_mode(struct iio_dev *indio_dev,
  146. const struct iio_chan_spec *chan,
  147. unsigned int type)
  148. {
  149. return 0;
  150. }
  151. static ssize_t stm32_dac_read_powerdown(struct iio_dev *indio_dev,
  152. uintptr_t private,
  153. const struct iio_chan_spec *chan,
  154. char *buf)
  155. {
  156. int ret = stm32_dac_is_enabled(indio_dev, chan->channel);
  157. if (ret < 0)
  158. return ret;
  159. return sprintf(buf, "%d\n", ret ? 0 : 1);
  160. }
  161. static ssize_t stm32_dac_write_powerdown(struct iio_dev *indio_dev,
  162. uintptr_t private,
  163. const struct iio_chan_spec *chan,
  164. const char *buf, size_t len)
  165. {
  166. bool powerdown;
  167. int ret;
  168. ret = strtobool(buf, &powerdown);
  169. if (ret)
  170. return ret;
  171. ret = stm32_dac_set_enable_state(indio_dev, chan->channel, !powerdown);
  172. if (ret)
  173. return ret;
  174. return len;
  175. }
  176. static const struct iio_enum stm32_dac_powerdown_mode_en = {
  177. .items = stm32_dac_powerdown_modes,
  178. .num_items = ARRAY_SIZE(stm32_dac_powerdown_modes),
  179. .get = stm32_dac_get_powerdown_mode,
  180. .set = stm32_dac_set_powerdown_mode,
  181. };
  182. static const struct iio_chan_spec_ext_info stm32_dac_ext_info[] = {
  183. {
  184. .name = "powerdown",
  185. .read = stm32_dac_read_powerdown,
  186. .write = stm32_dac_write_powerdown,
  187. .shared = IIO_SEPARATE,
  188. },
  189. IIO_ENUM("powerdown_mode", IIO_SEPARATE, &stm32_dac_powerdown_mode_en),
  190. IIO_ENUM_AVAILABLE("powerdown_mode", &stm32_dac_powerdown_mode_en),
  191. {},
  192. };
  193. #define STM32_DAC_CHANNEL(chan, name) { \
  194. .type = IIO_VOLTAGE, \
  195. .indexed = 1, \
  196. .output = 1, \
  197. .channel = chan, \
  198. .info_mask_separate = \
  199. BIT(IIO_CHAN_INFO_RAW) | \
  200. BIT(IIO_CHAN_INFO_SCALE), \
  201. /* scan_index is always 0 as num_channels is 1 */ \
  202. .scan_type = { \
  203. .sign = 'u', \
  204. .realbits = 12, \
  205. .storagebits = 16, \
  206. }, \
  207. .datasheet_name = name, \
  208. .ext_info = stm32_dac_ext_info \
  209. }
  210. static const struct iio_chan_spec stm32_dac_channels[] = {
  211. STM32_DAC_CHANNEL(STM32_DAC_CHANNEL_1, "out1"),
  212. STM32_DAC_CHANNEL(STM32_DAC_CHANNEL_2, "out2"),
  213. };
  214. static int stm32_dac_chan_of_init(struct iio_dev *indio_dev)
  215. {
  216. struct device_node *np = indio_dev->dev.of_node;
  217. unsigned int i;
  218. u32 channel;
  219. int ret;
  220. ret = of_property_read_u32(np, "reg", &channel);
  221. if (ret) {
  222. dev_err(&indio_dev->dev, "Failed to read reg property\n");
  223. return ret;
  224. }
  225. for (i = 0; i < ARRAY_SIZE(stm32_dac_channels); i++) {
  226. if (stm32_dac_channels[i].channel == channel)
  227. break;
  228. }
  229. if (i >= ARRAY_SIZE(stm32_dac_channels)) {
  230. dev_err(&indio_dev->dev, "Invalid st,dac-channel\n");
  231. return -EINVAL;
  232. }
  233. indio_dev->channels = &stm32_dac_channels[i];
  234. /*
  235. * Expose only one channel here, as they can be used independently,
  236. * with separate trigger. Then separate IIO devices are instantiated
  237. * to manage this.
  238. */
  239. indio_dev->num_channels = 1;
  240. return 0;
  241. };
  242. static int stm32_dac_probe(struct platform_device *pdev)
  243. {
  244. struct device_node *np = pdev->dev.of_node;
  245. struct iio_dev *indio_dev;
  246. struct stm32_dac *dac;
  247. int ret;
  248. if (!np)
  249. return -ENODEV;
  250. indio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(*dac));
  251. if (!indio_dev)
  252. return -ENOMEM;
  253. platform_set_drvdata(pdev, indio_dev);
  254. dac = iio_priv(indio_dev);
  255. dac->common = dev_get_drvdata(pdev->dev.parent);
  256. indio_dev->name = dev_name(&pdev->dev);
  257. indio_dev->dev.parent = &pdev->dev;
  258. indio_dev->dev.of_node = pdev->dev.of_node;
  259. indio_dev->info = &stm32_dac_iio_info;
  260. indio_dev->modes = INDIO_DIRECT_MODE;
  261. ret = stm32_dac_chan_of_init(indio_dev);
  262. if (ret < 0)
  263. return ret;
  264. return devm_iio_device_register(&pdev->dev, indio_dev);
  265. }
  266. static const struct of_device_id stm32_dac_of_match[] = {
  267. { .compatible = "st,stm32-dac", },
  268. {},
  269. };
  270. MODULE_DEVICE_TABLE(of, stm32_dac_of_match);
  271. static struct platform_driver stm32_dac_driver = {
  272. .probe = stm32_dac_probe,
  273. .driver = {
  274. .name = "stm32-dac",
  275. .of_match_table = stm32_dac_of_match,
  276. },
  277. };
  278. module_platform_driver(stm32_dac_driver);
  279. MODULE_ALIAS("platform:stm32-dac");
  280. MODULE_AUTHOR("Amelie Delaunay <amelie.delaunay@st.com>");
  281. MODULE_DESCRIPTION("STMicroelectronics STM32 DAC driver");
  282. MODULE_LICENSE("GPL v2");