EventClass.py 3.5 KB

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  1. # EventClass.py
  2. # SPDX-License-Identifier: GPL-2.0
  3. #
  4. # This is a library defining some events types classes, which could
  5. # be used by other scripts to analyzing the perf samples.
  6. #
  7. # Currently there are just a few classes defined for examples,
  8. # PerfEvent is the base class for all perf event sample, PebsEvent
  9. # is a HW base Intel x86 PEBS event, and user could add more SW/HW
  10. # event classes based on requirements.
  11. import struct
  12. # Event types, user could add more here
  13. EVTYPE_GENERIC = 0
  14. EVTYPE_PEBS = 1 # Basic PEBS event
  15. EVTYPE_PEBS_LL = 2 # PEBS event with load latency info
  16. EVTYPE_IBS = 3
  17. #
  18. # Currently we don't have good way to tell the event type, but by
  19. # the size of raw buffer, raw PEBS event with load latency data's
  20. # size is 176 bytes, while the pure PEBS event's size is 144 bytes.
  21. #
  22. def create_event(name, comm, dso, symbol, raw_buf):
  23. if (len(raw_buf) == 144):
  24. event = PebsEvent(name, comm, dso, symbol, raw_buf)
  25. elif (len(raw_buf) == 176):
  26. event = PebsNHM(name, comm, dso, symbol, raw_buf)
  27. else:
  28. event = PerfEvent(name, comm, dso, symbol, raw_buf)
  29. return event
  30. class PerfEvent(object):
  31. event_num = 0
  32. def __init__(self, name, comm, dso, symbol, raw_buf, ev_type=EVTYPE_GENERIC):
  33. self.name = name
  34. self.comm = comm
  35. self.dso = dso
  36. self.symbol = symbol
  37. self.raw_buf = raw_buf
  38. self.ev_type = ev_type
  39. PerfEvent.event_num += 1
  40. def show(self):
  41. print "PMU event: name=%12s, symbol=%24s, comm=%8s, dso=%12s" % (self.name, self.symbol, self.comm, self.dso)
  42. #
  43. # Basic Intel PEBS (Precise Event-based Sampling) event, whose raw buffer
  44. # contains the context info when that event happened: the EFLAGS and
  45. # linear IP info, as well as all the registers.
  46. #
  47. class PebsEvent(PerfEvent):
  48. pebs_num = 0
  49. def __init__(self, name, comm, dso, symbol, raw_buf, ev_type=EVTYPE_PEBS):
  50. tmp_buf=raw_buf[0:80]
  51. flags, ip, ax, bx, cx, dx, si, di, bp, sp = struct.unpack('QQQQQQQQQQ', tmp_buf)
  52. self.flags = flags
  53. self.ip = ip
  54. self.ax = ax
  55. self.bx = bx
  56. self.cx = cx
  57. self.dx = dx
  58. self.si = si
  59. self.di = di
  60. self.bp = bp
  61. self.sp = sp
  62. PerfEvent.__init__(self, name, comm, dso, symbol, raw_buf, ev_type)
  63. PebsEvent.pebs_num += 1
  64. del tmp_buf
  65. #
  66. # Intel Nehalem and Westmere support PEBS plus Load Latency info which lie
  67. # in the four 64 bit words write after the PEBS data:
  68. # Status: records the IA32_PERF_GLOBAL_STATUS register value
  69. # DLA: Data Linear Address (EIP)
  70. # DSE: Data Source Encoding, where the latency happens, hit or miss
  71. # in L1/L2/L3 or IO operations
  72. # LAT: the actual latency in cycles
  73. #
  74. class PebsNHM(PebsEvent):
  75. pebs_nhm_num = 0
  76. def __init__(self, name, comm, dso, symbol, raw_buf, ev_type=EVTYPE_PEBS_LL):
  77. tmp_buf=raw_buf[144:176]
  78. status, dla, dse, lat = struct.unpack('QQQQ', tmp_buf)
  79. self.status = status
  80. self.dla = dla
  81. self.dse = dse
  82. self.lat = lat
  83. PebsEvent.__init__(self, name, comm, dso, symbol, raw_buf, ev_type)
  84. PebsNHM.pebs_nhm_num += 1
  85. del tmp_buf