imx6qdl-apf6dev.dtsi 11 KB

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  1. /*
  2. * Copyright 2015 Armadeus Systems
  3. *
  4. * This file is dual-licensed: you can use it either under the terms
  5. * of the GPL or the X11 license, at your option. Note that this dual
  6. * licensing only applies to this file, and not this project as a
  7. * whole.
  8. *
  9. * a) This file is free software; you can redistribute it and/or
  10. * modify it under the terms of the GNU General Public License as
  11. * published by the Free Software Foundation; either version 2 of
  12. * the License, or (at your option) any later version.
  13. *
  14. * This file is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public
  20. * License along with this file; if not, write to the Free
  21. * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
  22. * MA 02110-1301 USA
  23. *
  24. * Or, alternatively,
  25. *
  26. * b) Permission is hereby granted, free of charge, to any person
  27. * obtaining a copy of this software and associated documentation
  28. * files (the "Software"), to deal in the Software without
  29. * restriction, including without limitation the rights to use,
  30. * copy, modify, merge, publish, distribute, sublicense, and/or
  31. * sell copies of the Software, and to permit persons to whom the
  32. * Software is furnished to do so, subject to the following
  33. * conditions:
  34. *
  35. * The above copyright notice and this permission notice shall be
  36. * included in all copies or substantial portions of the Software.
  37. *
  38. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  39. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  40. * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  41. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
  42. * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  43. * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  44. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  45. * OTHER DEALINGS IN THE SOFTWARE.
  46. */
  47. #include <dt-bindings/gpio/gpio.h>
  48. #include <dt-bindings/input/input.h>
  49. #include <dt-bindings/interrupt-controller/irq.h>
  50. / {
  51. chosen {
  52. stdout-path = &uart4;
  53. };
  54. display@di0 {
  55. compatible = "fsl,imx-parallel-display";
  56. interface-pix-fmt = "bgr666";
  57. pinctrl-names = "default";
  58. pinctrl-0 = <&pinctrl_ipu1_disp1>;
  59. display-timings {
  60. lw700 {
  61. clock-frequency = <33000033>;
  62. hactive = <800>;
  63. vactive = <480>;
  64. hback-porch = <96>;
  65. hfront-porch = <96>;
  66. vback-porch = <20>;
  67. vfront-porch = <21>;
  68. hsync-len = <64>;
  69. vsync-len = <4>;
  70. hsync-active = <1>;
  71. vsync-active = <1>;
  72. de-active = <1>;
  73. pixelclk-active = <1>;
  74. };
  75. };
  76. port {
  77. display_in: endpoint {
  78. remote-endpoint = <&ipu1_di0_disp0>;
  79. };
  80. };
  81. };
  82. gpio-keys {
  83. compatible = "gpio-keys";
  84. pinctrl-names = "default";
  85. pinctrl-0 = <&pinctrl_gpio_keys>;
  86. user-button {
  87. label = "User button";
  88. gpios = <&gpio1 9 GPIO_ACTIVE_LOW>;
  89. linux,code = <BTN_MISC>;
  90. wakeup-source;
  91. };
  92. };
  93. leds {
  94. compatible = "gpio-leds";
  95. pinctrl-names = "default";
  96. pinctrl-0 = <&pinctrl_gpio_leds>;
  97. user-led {
  98. label = "User LED";
  99. gpios = <&gpio7 12 GPIO_ACTIVE_HIGH>;
  100. linux,default-trigger = "heartbeat";
  101. default-state = "on";
  102. };
  103. };
  104. regulators {
  105. compatible = "simple-bus";
  106. reg_3p3v: 3p3v {
  107. compatible = "regulator-fixed";
  108. regulator-name = "3P3V";
  109. regulator-min-microvolt = <3300000>;
  110. regulator-max-microvolt = <3300000>;
  111. regulator-always-on;
  112. };
  113. reg_usbh1_vbus: usb-h1-vbus {
  114. compatible = "regulator-fixed";
  115. regulator-name = "usb_h1_vbus";
  116. regulator-min-microvolt = <5000000>;
  117. regulator-max-microvolt = <5000000>;
  118. regulator-always-on;
  119. };
  120. reg_usb_otg_vbus: usb-otg-vbus {
  121. compatible = "regulator-fixed";
  122. regulator-name = "usb_otg_vbus";
  123. regulator-min-microvolt = <5000000>;
  124. regulator-max-microvolt = <5000000>;
  125. regulator-always-on;
  126. };
  127. };
  128. sound {
  129. compatible = "fsl,imx6-armadeus-sgtl5000",
  130. "fsl,imx-audio-sgtl5000";
  131. model = "imx6-armadeus-sgtl5000";
  132. ssi-controller = <&ssi1>;
  133. audio-codec = <&codec>;
  134. audio-routing =
  135. "MIC_IN", "Mic Jack",
  136. "Mic Jack", "Mic Bias",
  137. "Headphone Jack", "HP_OUT";
  138. mux-int-port = <1>;
  139. mux-ext-port = <3>;
  140. };
  141. sound-spdif {
  142. compatible = "fsl,imx-audio-spdif";
  143. model = "imx-spdif";
  144. spdif-controller = <&spdif>;
  145. spdif-out;
  146. };
  147. };
  148. &audmux {
  149. pinctrl-names = "default";
  150. pinctrl-0 = <&pinctrl_audmux>;
  151. status = "okay";
  152. };
  153. &can2 {
  154. pinctrl-names = "default";
  155. pinctrl-0 = <&pinctrl_flexcan2>;
  156. status = "okay";
  157. };
  158. &ecspi1 {
  159. pinctrl-names = "default";
  160. pinctrl-0 = <&pinctrl_ecspi1>;
  161. cs-gpios = <&gpio4 9 GPIO_ACTIVE_LOW>,
  162. <&gpio4 10 GPIO_ACTIVE_LOW>,
  163. <&gpio4 11 GPIO_ACTIVE_LOW>;
  164. status = "okay";
  165. };
  166. &hdmi {
  167. ddc-i2c-bus = <&i2c3>;
  168. status = "okay";
  169. };
  170. &i2c1 {
  171. clock-frequency = <400000>;
  172. pinctrl-names = "default";
  173. pinctrl-0 = <&pinctrl_i2c1>;
  174. status = "okay";
  175. touchscreen@48 {
  176. compatible = "semtech,sx8654";
  177. reg = <0x48>;
  178. pinctrl-names = "default";
  179. pinctrl-0 = <&pinctrl_touchscreen>;
  180. interrupt-parent = <&gpio6>;
  181. interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
  182. };
  183. };
  184. &i2c2 {
  185. clock-frequency = <400000>;
  186. pinctrl-names = "default";
  187. pinctrl-0 = <&pinctrl_i2c2>;
  188. status = "okay";
  189. codec: sgtl5000@0a {
  190. compatible = "fsl,sgtl5000";
  191. reg = <0x0a>;
  192. clocks = <&clks IMX6QDL_CLK_CKO>;
  193. VDDA-supply = <&reg_3p3v>;
  194. VDDIO-supply = <&reg_3p3v>;
  195. };
  196. };
  197. &i2c3 {
  198. clock-frequency = <400000>;
  199. pinctrl-names = "default";
  200. pinctrl-0 = <&pinctrl_i2c3>;
  201. status = "okay";
  202. };
  203. &ipu1_di0_disp0 {
  204. remote-endpoint = <&display_in>;
  205. };
  206. &pcie {
  207. pinctrl-names = "default";
  208. pinctrl-0 = <&pinctrl_pcie>;
  209. reset-gpio = <&gpio6 2 GPIO_ACTIVE_HIGH>;
  210. status = "okay";
  211. };
  212. &pwm3 {
  213. pinctrl-names = "default";
  214. pinctrl-0 = <&pinctrl_pwm3>;
  215. status = "okay";
  216. };
  217. /* GPS */
  218. &uart1 {
  219. pinctrl-names = "default";
  220. pinctrl-0 = <&pinctrl_uart1>;
  221. status = "okay";
  222. };
  223. /* GSM */
  224. &uart3 {
  225. pinctrl-names = "default";
  226. pinctrl-0 = <&pinctrl_uart3 &pinctrl_gsm>;
  227. uart-has-rtscts;
  228. status = "okay";
  229. };
  230. /* console */
  231. &uart4 {
  232. pinctrl-names = "default";
  233. pinctrl-0 = <&pinctrl_uart4>;
  234. status = "okay";
  235. };
  236. &usbh1 {
  237. vbus-supply = <&reg_usbh1_vbus>;
  238. phy_type = "utmi";
  239. status = "okay";
  240. };
  241. &usbotg {
  242. pinctrl-names = "default";
  243. pinctrl-0 = <&pinctrl_usbotg>;
  244. vbus-supply = <&reg_usb_otg_vbus>;
  245. dr_mode = "otg";
  246. status = "okay";
  247. };
  248. /* microSD */
  249. &usdhc2 {
  250. pinctrl-names = "default";
  251. pinctrl-0 = <&pinctrl_usdhc2>;
  252. cd-gpios = <&gpio1 2 GPIO_ACTIVE_LOW>;
  253. no-1-8-v;
  254. status = "okay";
  255. };
  256. &spdif {
  257. pinctrl-names = "default";
  258. pinctrl-0 = <&pinctrl_spdif>;
  259. status = "okay";
  260. };
  261. &ssi1 {
  262. status = "okay";
  263. };
  264. &iomuxc {
  265. pinctrl-names = "default";
  266. pinctrl-0 = <&pinctrl_gpios>;
  267. apf6dev {
  268. pinctrl_audmux: audmuxgrp {
  269. fsl,pins = <
  270. MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x1b0b0
  271. MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x1b0b0
  272. MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x1b0b0
  273. MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x1b0b0
  274. MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0
  275. >;
  276. };
  277. pinctrl_ecspi1: ecspi1grp {
  278. fsl,pins = <
  279. MX6QDL_PAD_KEY_COL1__ECSPI1_MISO 0x100b1
  280. MX6QDL_PAD_KEY_ROW0__ECSPI1_MOSI 0x100b1
  281. MX6QDL_PAD_KEY_COL0__ECSPI1_SCLK 0x100b1
  282. MX6QDL_PAD_KEY_ROW1__GPIO4_IO09 0x1b0b0
  283. MX6QDL_PAD_KEY_ROW2__GPIO4_IO11 0x1b0b0
  284. MX6QDL_PAD_KEY_COL2__GPIO4_IO10 0x1b0b0
  285. >;
  286. };
  287. pinctrl_flexcan2: flexcan2grp {
  288. fsl,pins = <
  289. MX6QDL_PAD_KEY_COL4__FLEXCAN2_TX 0x1b0b0
  290. MX6QDL_PAD_KEY_ROW4__FLEXCAN2_RX 0x1b0b0
  291. >;
  292. };
  293. pinctrl_gpio_keys: gpiokeysgrp {
  294. fsl,pins = <
  295. MX6QDL_PAD_GPIO_9__GPIO1_IO09 0x1b0b0
  296. >;
  297. };
  298. pinctrl_gpio_leds: gpioledsgrp {
  299. fsl,pins = <
  300. MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x130b0
  301. >;
  302. };
  303. pinctrl_gpios: gpiosgrp {
  304. fsl,pins = <
  305. MX6QDL_PAD_DI0_PIN4__GPIO4_IO20 0x100b1
  306. MX6QDL_PAD_DISP0_DAT18__GPIO5_IO12 0x100b1
  307. MX6QDL_PAD_DISP0_DAT19__GPIO5_IO13 0x100b1
  308. MX6QDL_PAD_DISP0_DAT20__GPIO5_IO14 0x100b1
  309. MX6QDL_PAD_DISP0_DAT21__GPIO5_IO15 0x100b1
  310. MX6QDL_PAD_DISP0_DAT22__GPIO5_IO16 0x100b1
  311. MX6QDL_PAD_DISP0_DAT23__GPIO5_IO17 0x100b1
  312. MX6QDL_PAD_CSI0_PIXCLK__GPIO5_IO18 0x100b1
  313. MX6QDL_PAD_CSI0_VSYNC__GPIO5_IO21 0x100b1
  314. >;
  315. };
  316. pinctrl_gsm: gsmgrp {
  317. fsl,pins = <
  318. MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x130b0 /* GSM_POKIN */
  319. MX6QDL_PAD_GPIO_18__GPIO7_IO13 0x130b0 /* GSM_PWR_EN */
  320. >;
  321. };
  322. pinctrl_i2c1: i2c1grp {
  323. fsl,pins = <
  324. MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001b8b1
  325. MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001b8b1
  326. >;
  327. };
  328. pinctrl_i2c2: i2c2grp {
  329. fsl,pins = <
  330. MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
  331. MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
  332. >;
  333. };
  334. pinctrl_i2c3: i2c3grp {
  335. fsl,pins = <
  336. MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
  337. MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1
  338. >;
  339. };
  340. pinctrl_ipu1_disp1: ipu1disp1grp {
  341. fsl,pins = <
  342. MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x100b1
  343. MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x100b1
  344. MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x100b1
  345. MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x100b1
  346. MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x100b1
  347. MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x100b1
  348. MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x100b1
  349. MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x100b1
  350. MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x100b1
  351. MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x100b1
  352. MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 0x100b1
  353. MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07 0x100b1
  354. MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08 0x100b1
  355. MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09 0x100b1
  356. MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10 0x100b1
  357. MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11 0x100b1
  358. MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12 0x100b1
  359. MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13 0x100b1
  360. MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14 0x100b1
  361. MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15 0x100b1
  362. MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16 0x100b1
  363. MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17 0x100b1
  364. >;
  365. };
  366. pinctrl_pcie: pciegrp {
  367. fsl,pins = <
  368. MX6QDL_PAD_CSI0_DAT16__GPIO6_IO02 0x130b0
  369. >;
  370. };
  371. pinctrl_pwm3: pwm3grp {
  372. fsl,pins = <
  373. MX6QDL_PAD_SD4_DAT1__PWM3_OUT 0x1b0b1
  374. >;
  375. };
  376. pinctrl_uart1: uart1grp {
  377. fsl,pins = <
  378. MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b0
  379. MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b0
  380. >;
  381. };
  382. pinctrl_uart3: uart3grp {
  383. fsl,pins = <
  384. MX6QDL_PAD_EIM_D23__UART3_CTS_B 0x1b0b0
  385. MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b0
  386. MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b0
  387. MX6QDL_PAD_EIM_D31__UART3_RTS_B 0x1b0b0
  388. >;
  389. };
  390. pinctrl_uart4: uart4grp {
  391. fsl,pins = <
  392. MX6QDL_PAD_CSI0_DAT12__UART4_TX_DATA 0x1b0b0
  393. MX6QDL_PAD_CSI0_DAT13__UART4_RX_DATA 0x1b0b0
  394. >;
  395. };
  396. pinctrl_usbotg: usbotggrp {
  397. fsl,pins = <
  398. MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x1b0b0
  399. >;
  400. };
  401. pinctrl_usdhc2: usdhc2grp {
  402. fsl,pins = <
  403. MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059
  404. MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059
  405. MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059
  406. MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059
  407. MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059
  408. MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059
  409. >;
  410. };
  411. pinctrl_spdif: spdifgrp {
  412. fsl,pins = <
  413. MX6QDL_PAD_GPIO_19__SPDIF_OUT 0x1b0b0
  414. >;
  415. };
  416. pinctrl_touchscreen: touchscreengrp {
  417. fsl,pins = <
  418. MX6QDL_PAD_CSI0_DAT17__GPIO6_IO03 0x1b0b0
  419. >;
  420. };
  421. };
  422. };