fpga-region.c 16 KB

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  1. /*
  2. * FPGA Region - Device Tree support for FPGA programming under Linux
  3. *
  4. * Copyright (C) 2013-2016 Altera Corporation
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms and conditions of the GNU General Public License,
  8. * version 2, as published by the Free Software Foundation.
  9. *
  10. * This program is distributed in the hope it will be useful, but WITHOUT
  11. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  13. * more details.
  14. *
  15. * You should have received a copy of the GNU General Public License along with
  16. * this program. If not, see <http://www.gnu.org/licenses/>.
  17. */
  18. #include <linux/fpga/fpga-bridge.h>
  19. #include <linux/fpga/fpga-mgr.h>
  20. #include <linux/idr.h>
  21. #include <linux/kernel.h>
  22. #include <linux/list.h>
  23. #include <linux/module.h>
  24. #include <linux/of_platform.h>
  25. #include <linux/slab.h>
  26. #include <linux/spinlock.h>
  27. /**
  28. * struct fpga_region - FPGA Region structure
  29. * @dev: FPGA Region device
  30. * @mutex: enforces exclusive reference to region
  31. * @bridge_list: list of FPGA bridges specified in region
  32. * @info: fpga image specific information
  33. */
  34. struct fpga_region {
  35. struct device dev;
  36. struct mutex mutex; /* for exclusive reference to region */
  37. struct list_head bridge_list;
  38. struct fpga_image_info *info;
  39. };
  40. #define to_fpga_region(d) container_of(d, struct fpga_region, dev)
  41. static DEFINE_IDA(fpga_region_ida);
  42. static struct class *fpga_region_class;
  43. static const struct of_device_id fpga_region_of_match[] = {
  44. { .compatible = "fpga-region", },
  45. {},
  46. };
  47. MODULE_DEVICE_TABLE(of, fpga_region_of_match);
  48. static int fpga_region_of_node_match(struct device *dev, const void *data)
  49. {
  50. return dev->of_node == data;
  51. }
  52. /**
  53. * fpga_region_find - find FPGA region
  54. * @np: device node of FPGA Region
  55. * Caller will need to put_device(&region->dev) when done.
  56. * Returns FPGA Region struct or NULL
  57. */
  58. static struct fpga_region *fpga_region_find(struct device_node *np)
  59. {
  60. struct device *dev;
  61. dev = class_find_device(fpga_region_class, NULL, np,
  62. fpga_region_of_node_match);
  63. if (!dev)
  64. return NULL;
  65. return to_fpga_region(dev);
  66. }
  67. /**
  68. * fpga_region_get - get an exclusive reference to a fpga region
  69. * @region: FPGA Region struct
  70. *
  71. * Caller should call fpga_region_put() when done with region.
  72. *
  73. * Return fpga_region struct if successful.
  74. * Return -EBUSY if someone already has a reference to the region.
  75. * Return -ENODEV if @np is not a FPGA Region.
  76. */
  77. static struct fpga_region *fpga_region_get(struct fpga_region *region)
  78. {
  79. struct device *dev = &region->dev;
  80. if (!mutex_trylock(&region->mutex)) {
  81. dev_dbg(dev, "%s: FPGA Region already in use\n", __func__);
  82. return ERR_PTR(-EBUSY);
  83. }
  84. get_device(dev);
  85. of_node_get(dev->of_node);
  86. if (!try_module_get(dev->parent->driver->owner)) {
  87. of_node_put(dev->of_node);
  88. put_device(dev);
  89. mutex_unlock(&region->mutex);
  90. return ERR_PTR(-ENODEV);
  91. }
  92. dev_dbg(dev, "get\n");
  93. return region;
  94. }
  95. /**
  96. * fpga_region_put - release a reference to a region
  97. *
  98. * @region: FPGA region
  99. */
  100. static void fpga_region_put(struct fpga_region *region)
  101. {
  102. struct device *dev = &region->dev;
  103. dev_dbg(dev, "put\n");
  104. module_put(dev->parent->driver->owner);
  105. of_node_put(dev->of_node);
  106. put_device(dev);
  107. mutex_unlock(&region->mutex);
  108. }
  109. /**
  110. * fpga_region_get_manager - get reference for FPGA manager
  111. * @region: FPGA region
  112. *
  113. * Get FPGA Manager from "fpga-mgr" property or from ancestor region.
  114. *
  115. * Caller should call fpga_mgr_put() when done with manager.
  116. *
  117. * Return: fpga manager struct or IS_ERR() condition containing error code.
  118. */
  119. static struct fpga_manager *fpga_region_get_manager(struct fpga_region *region)
  120. {
  121. struct device *dev = &region->dev;
  122. struct device_node *np = dev->of_node;
  123. struct device_node *mgr_node;
  124. struct fpga_manager *mgr;
  125. of_node_get(np);
  126. while (np) {
  127. if (of_device_is_compatible(np, "fpga-region")) {
  128. mgr_node = of_parse_phandle(np, "fpga-mgr", 0);
  129. if (mgr_node) {
  130. mgr = of_fpga_mgr_get(mgr_node);
  131. of_node_put(np);
  132. return mgr;
  133. }
  134. }
  135. np = of_get_next_parent(np);
  136. }
  137. of_node_put(np);
  138. return ERR_PTR(-EINVAL);
  139. }
  140. /**
  141. * fpga_region_get_bridges - create a list of bridges
  142. * @region: FPGA region
  143. * @overlay: device node of the overlay
  144. *
  145. * Create a list of bridges including the parent bridge and the bridges
  146. * specified by "fpga-bridges" property. Note that the
  147. * fpga_bridges_enable/disable/put functions are all fine with an empty list
  148. * if that happens.
  149. *
  150. * Caller should call fpga_bridges_put(&region->bridge_list) when
  151. * done with the bridges.
  152. *
  153. * Return 0 for success (even if there are no bridges specified)
  154. * or -EBUSY if any of the bridges are in use.
  155. */
  156. static int fpga_region_get_bridges(struct fpga_region *region,
  157. struct device_node *overlay)
  158. {
  159. struct device *dev = &region->dev;
  160. struct device_node *region_np = dev->of_node;
  161. struct device_node *br, *np, *parent_br = NULL;
  162. int i, ret;
  163. /* If parent is a bridge, add to list */
  164. ret = of_fpga_bridge_get_to_list(region_np->parent, region->info,
  165. &region->bridge_list);
  166. /* -EBUSY means parent is a bridge that is under use. Give up. */
  167. if (ret == -EBUSY)
  168. return ret;
  169. /* Zero return code means parent was a bridge and was added to list. */
  170. if (!ret)
  171. parent_br = region_np->parent;
  172. /* If overlay has a list of bridges, use it. */
  173. if (of_parse_phandle(overlay, "fpga-bridges", 0))
  174. np = overlay;
  175. else
  176. np = region_np;
  177. for (i = 0; ; i++) {
  178. br = of_parse_phandle(np, "fpga-bridges", i);
  179. if (!br)
  180. break;
  181. /* If parent bridge is in list, skip it. */
  182. if (br == parent_br)
  183. continue;
  184. /* If node is a bridge, get it and add to list */
  185. ret = of_fpga_bridge_get_to_list(br, region->info,
  186. &region->bridge_list);
  187. /* If any of the bridges are in use, give up */
  188. if (ret == -EBUSY) {
  189. fpga_bridges_put(&region->bridge_list);
  190. return -EBUSY;
  191. }
  192. }
  193. return 0;
  194. }
  195. /**
  196. * fpga_region_program_fpga - program FPGA
  197. * @region: FPGA region
  198. * @overlay: device node of the overlay
  199. * Program an FPGA using information in the region's fpga image info.
  200. * Return 0 for success or negative error code.
  201. */
  202. static int fpga_region_program_fpga(struct fpga_region *region,
  203. struct device_node *overlay)
  204. {
  205. struct device *dev = &region->dev;
  206. struct fpga_manager *mgr;
  207. int ret;
  208. region = fpga_region_get(region);
  209. if (IS_ERR(region)) {
  210. dev_err(dev, "failed to get FPGA region\n");
  211. return PTR_ERR(region);
  212. }
  213. mgr = fpga_region_get_manager(region);
  214. if (IS_ERR(mgr)) {
  215. dev_err(dev, "failed to get FPGA manager\n");
  216. ret = PTR_ERR(mgr);
  217. goto err_put_region;
  218. }
  219. ret = fpga_mgr_lock(mgr);
  220. if (ret) {
  221. dev_err(dev, "FPGA manager is busy\n");
  222. goto err_put_mgr;
  223. }
  224. ret = fpga_region_get_bridges(region, overlay);
  225. if (ret) {
  226. dev_err(dev, "failed to get FPGA bridges\n");
  227. goto err_unlock_mgr;
  228. }
  229. ret = fpga_bridges_disable(&region->bridge_list);
  230. if (ret) {
  231. dev_err(dev, "failed to disable bridges\n");
  232. goto err_put_br;
  233. }
  234. ret = fpga_mgr_load(mgr, region->info);
  235. if (ret) {
  236. dev_err(dev, "failed to load FPGA image\n");
  237. goto err_put_br;
  238. }
  239. ret = fpga_bridges_enable(&region->bridge_list);
  240. if (ret) {
  241. dev_err(dev, "failed to enable region bridges\n");
  242. goto err_put_br;
  243. }
  244. fpga_mgr_unlock(mgr);
  245. fpga_mgr_put(mgr);
  246. fpga_region_put(region);
  247. return 0;
  248. err_put_br:
  249. fpga_bridges_put(&region->bridge_list);
  250. err_unlock_mgr:
  251. fpga_mgr_unlock(mgr);
  252. err_put_mgr:
  253. fpga_mgr_put(mgr);
  254. err_put_region:
  255. fpga_region_put(region);
  256. return ret;
  257. }
  258. /**
  259. * child_regions_with_firmware
  260. * @overlay: device node of the overlay
  261. *
  262. * If the overlay adds child FPGA regions, they are not allowed to have
  263. * firmware-name property.
  264. *
  265. * Return 0 for OK or -EINVAL if child FPGA region adds firmware-name.
  266. */
  267. static int child_regions_with_firmware(struct device_node *overlay)
  268. {
  269. struct device_node *child_region;
  270. const char *child_firmware_name;
  271. int ret = 0;
  272. of_node_get(overlay);
  273. child_region = of_find_matching_node(overlay, fpga_region_of_match);
  274. while (child_region) {
  275. if (!of_property_read_string(child_region, "firmware-name",
  276. &child_firmware_name)) {
  277. ret = -EINVAL;
  278. break;
  279. }
  280. child_region = of_find_matching_node(child_region,
  281. fpga_region_of_match);
  282. }
  283. of_node_put(child_region);
  284. if (ret)
  285. pr_err("firmware-name not allowed in child FPGA region: %pOF",
  286. child_region);
  287. return ret;
  288. }
  289. /**
  290. * fpga_region_notify_pre_apply - pre-apply overlay notification
  291. *
  292. * @region: FPGA region that the overlay was applied to
  293. * @nd: overlay notification data
  294. *
  295. * Called after when an overlay targeted to a FPGA Region is about to be
  296. * applied. Function will check the properties that will be added to the FPGA
  297. * region. If the checks pass, it will program the FPGA.
  298. *
  299. * The checks are:
  300. * The overlay must add either firmware-name or external-fpga-config property
  301. * to the FPGA Region.
  302. *
  303. * firmware-name : program the FPGA
  304. * external-fpga-config : FPGA is already programmed
  305. * encrypted-fpga-config : FPGA bitstream is encrypted
  306. *
  307. * The overlay can add other FPGA regions, but child FPGA regions cannot have a
  308. * firmware-name property since those regions don't exist yet.
  309. *
  310. * If the overlay that breaks the rules, notifier returns an error and the
  311. * overlay is rejected before it goes into the main tree.
  312. *
  313. * Returns 0 for success or negative error code for failure.
  314. */
  315. static int fpga_region_notify_pre_apply(struct fpga_region *region,
  316. struct of_overlay_notify_data *nd)
  317. {
  318. struct device *dev = &region->dev;
  319. struct fpga_image_info *info;
  320. const char *firmware_name;
  321. int ret;
  322. info = fpga_image_info_alloc(dev);
  323. if (!info)
  324. return -ENOMEM;
  325. /* Reject overlay if child FPGA Regions have firmware-name property */
  326. ret = child_regions_with_firmware(nd->overlay);
  327. if (ret)
  328. return ret;
  329. /* Read FPGA region properties from the overlay */
  330. if (of_property_read_bool(nd->overlay, "partial-fpga-config"))
  331. info->flags |= FPGA_MGR_PARTIAL_RECONFIG;
  332. if (of_property_read_bool(nd->overlay, "external-fpga-config"))
  333. info->flags |= FPGA_MGR_EXTERNAL_CONFIG;
  334. if (of_property_read_bool(nd->overlay, "encrypted-fpga-config"))
  335. info->flags |= FPGA_MGR_ENCRYPTED_BITSTREAM;
  336. if (!of_property_read_string(nd->overlay, "firmware-name",
  337. &firmware_name)) {
  338. info->firmware_name = devm_kstrdup(dev, firmware_name,
  339. GFP_KERNEL);
  340. if (!info->firmware_name)
  341. return -ENOMEM;
  342. }
  343. of_property_read_u32(nd->overlay, "region-unfreeze-timeout-us",
  344. &info->enable_timeout_us);
  345. of_property_read_u32(nd->overlay, "region-freeze-timeout-us",
  346. &info->disable_timeout_us);
  347. of_property_read_u32(nd->overlay, "config-complete-timeout-us",
  348. &info->config_complete_timeout_us);
  349. /* If FPGA was externally programmed, don't specify firmware */
  350. if ((info->flags & FPGA_MGR_EXTERNAL_CONFIG) && info->firmware_name) {
  351. dev_err(dev, "error: specified firmware and external-fpga-config");
  352. fpga_image_info_free(info);
  353. return -EINVAL;
  354. }
  355. /* FPGA is already configured externally. We're done. */
  356. if (info->flags & FPGA_MGR_EXTERNAL_CONFIG) {
  357. fpga_image_info_free(info);
  358. return 0;
  359. }
  360. /* If we got this far, we should be programming the FPGA */
  361. if (!info->firmware_name) {
  362. dev_err(dev, "should specify firmware-name or external-fpga-config\n");
  363. fpga_image_info_free(info);
  364. return -EINVAL;
  365. }
  366. region->info = info;
  367. ret = fpga_region_program_fpga(region, nd->overlay);
  368. if (ret) {
  369. fpga_image_info_free(info);
  370. region->info = NULL;
  371. }
  372. return ret;
  373. }
  374. /**
  375. * fpga_region_notify_post_remove - post-remove overlay notification
  376. *
  377. * @region: FPGA region that was targeted by the overlay that was removed
  378. * @nd: overlay notification data
  379. *
  380. * Called after an overlay has been removed if the overlay's target was a
  381. * FPGA region.
  382. */
  383. static void fpga_region_notify_post_remove(struct fpga_region *region,
  384. struct of_overlay_notify_data *nd)
  385. {
  386. fpga_bridges_disable(&region->bridge_list);
  387. fpga_bridges_put(&region->bridge_list);
  388. fpga_image_info_free(region->info);
  389. region->info = NULL;
  390. }
  391. /**
  392. * of_fpga_region_notify - reconfig notifier for dynamic DT changes
  393. * @nb: notifier block
  394. * @action: notifier action
  395. * @arg: reconfig data
  396. *
  397. * This notifier handles programming a FPGA when a "firmware-name" property is
  398. * added to a fpga-region.
  399. *
  400. * Returns NOTIFY_OK or error if FPGA programming fails.
  401. */
  402. static int of_fpga_region_notify(struct notifier_block *nb,
  403. unsigned long action, void *arg)
  404. {
  405. struct of_overlay_notify_data *nd = arg;
  406. struct fpga_region *region;
  407. int ret;
  408. switch (action) {
  409. case OF_OVERLAY_PRE_APPLY:
  410. pr_debug("%s OF_OVERLAY_PRE_APPLY\n", __func__);
  411. break;
  412. case OF_OVERLAY_POST_APPLY:
  413. pr_debug("%s OF_OVERLAY_POST_APPLY\n", __func__);
  414. return NOTIFY_OK; /* not for us */
  415. case OF_OVERLAY_PRE_REMOVE:
  416. pr_debug("%s OF_OVERLAY_PRE_REMOVE\n", __func__);
  417. return NOTIFY_OK; /* not for us */
  418. case OF_OVERLAY_POST_REMOVE:
  419. pr_debug("%s OF_OVERLAY_POST_REMOVE\n", __func__);
  420. break;
  421. default: /* should not happen */
  422. return NOTIFY_OK;
  423. }
  424. region = fpga_region_find(nd->target);
  425. if (!region)
  426. return NOTIFY_OK;
  427. ret = 0;
  428. switch (action) {
  429. case OF_OVERLAY_PRE_APPLY:
  430. ret = fpga_region_notify_pre_apply(region, nd);
  431. break;
  432. case OF_OVERLAY_POST_REMOVE:
  433. fpga_region_notify_post_remove(region, nd);
  434. break;
  435. }
  436. put_device(&region->dev);
  437. if (ret)
  438. return notifier_from_errno(ret);
  439. return NOTIFY_OK;
  440. }
  441. static struct notifier_block fpga_region_of_nb = {
  442. .notifier_call = of_fpga_region_notify,
  443. };
  444. static int fpga_region_probe(struct platform_device *pdev)
  445. {
  446. struct device *dev = &pdev->dev;
  447. struct device_node *np = dev->of_node;
  448. struct fpga_region *region;
  449. int id, ret = 0;
  450. region = kzalloc(sizeof(*region), GFP_KERNEL);
  451. if (!region)
  452. return -ENOMEM;
  453. id = ida_simple_get(&fpga_region_ida, 0, 0, GFP_KERNEL);
  454. if (id < 0) {
  455. ret = id;
  456. goto err_kfree;
  457. }
  458. mutex_init(&region->mutex);
  459. INIT_LIST_HEAD(&region->bridge_list);
  460. device_initialize(&region->dev);
  461. region->dev.class = fpga_region_class;
  462. region->dev.parent = dev;
  463. region->dev.of_node = np;
  464. region->dev.id = id;
  465. dev_set_drvdata(dev, region);
  466. ret = dev_set_name(&region->dev, "region%d", id);
  467. if (ret)
  468. goto err_remove;
  469. ret = device_add(&region->dev);
  470. if (ret)
  471. goto err_remove;
  472. of_platform_populate(np, fpga_region_of_match, NULL, &region->dev);
  473. dev_info(dev, "FPGA Region probed\n");
  474. return 0;
  475. err_remove:
  476. ida_simple_remove(&fpga_region_ida, id);
  477. err_kfree:
  478. kfree(region);
  479. return ret;
  480. }
  481. static int fpga_region_remove(struct platform_device *pdev)
  482. {
  483. struct fpga_region *region = platform_get_drvdata(pdev);
  484. device_unregister(&region->dev);
  485. return 0;
  486. }
  487. static struct platform_driver fpga_region_driver = {
  488. .probe = fpga_region_probe,
  489. .remove = fpga_region_remove,
  490. .driver = {
  491. .name = "fpga-region",
  492. .of_match_table = of_match_ptr(fpga_region_of_match),
  493. },
  494. };
  495. static void fpga_region_dev_release(struct device *dev)
  496. {
  497. struct fpga_region *region = to_fpga_region(dev);
  498. ida_simple_remove(&fpga_region_ida, region->dev.id);
  499. kfree(region);
  500. }
  501. /**
  502. * fpga_region_init - init function for fpga_region class
  503. * Creates the fpga_region class and registers a reconfig notifier.
  504. */
  505. static int __init fpga_region_init(void)
  506. {
  507. int ret;
  508. fpga_region_class = class_create(THIS_MODULE, "fpga_region");
  509. if (IS_ERR(fpga_region_class))
  510. return PTR_ERR(fpga_region_class);
  511. fpga_region_class->dev_release = fpga_region_dev_release;
  512. ret = of_overlay_notifier_register(&fpga_region_of_nb);
  513. if (ret)
  514. goto err_class;
  515. ret = platform_driver_register(&fpga_region_driver);
  516. if (ret)
  517. goto err_plat;
  518. return 0;
  519. err_plat:
  520. of_overlay_notifier_unregister(&fpga_region_of_nb);
  521. err_class:
  522. class_destroy(fpga_region_class);
  523. ida_destroy(&fpga_region_ida);
  524. return ret;
  525. }
  526. static void __exit fpga_region_exit(void)
  527. {
  528. platform_driver_unregister(&fpga_region_driver);
  529. of_overlay_notifier_unregister(&fpga_region_of_nb);
  530. class_destroy(fpga_region_class);
  531. ida_destroy(&fpga_region_ida);
  532. }
  533. subsys_initcall(fpga_region_init);
  534. module_exit(fpga_region_exit);
  535. MODULE_DESCRIPTION("FPGA Region");
  536. MODULE_AUTHOR("Alan Tull <atull@opensource.altera.com>");
  537. MODULE_LICENSE("GPL v2");