turbostat.c 82 KB

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  1. /*
  2. * turbostat -- show CPU frequency and C-state residency
  3. * on modern Intel turbo-capable processors.
  4. *
  5. * Copyright (c) 2013 Intel Corporation.
  6. * Len Brown <len.brown@intel.com>
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms and conditions of the GNU General Public License,
  10. * version 2, as published by the Free Software Foundation.
  11. *
  12. * This program is distributed in the hope it will be useful, but WITHOUT
  13. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  15. * more details.
  16. *
  17. * You should have received a copy of the GNU General Public License along with
  18. * this program; if not, write to the Free Software Foundation, Inc.,
  19. * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  20. */
  21. #define _GNU_SOURCE
  22. #include MSRHEADER
  23. #include <stdarg.h>
  24. #include <stdio.h>
  25. #include <err.h>
  26. #include <unistd.h>
  27. #include <sys/types.h>
  28. #include <sys/wait.h>
  29. #include <sys/stat.h>
  30. #include <sys/resource.h>
  31. #include <fcntl.h>
  32. #include <signal.h>
  33. #include <sys/time.h>
  34. #include <stdlib.h>
  35. #include <getopt.h>
  36. #include <dirent.h>
  37. #include <string.h>
  38. #include <ctype.h>
  39. #include <sched.h>
  40. #include <cpuid.h>
  41. #include <linux/capability.h>
  42. #include <errno.h>
  43. char *proc_stat = "/proc/stat";
  44. unsigned int interval_sec = 5;
  45. unsigned int debug;
  46. unsigned int rapl_joules;
  47. unsigned int summary_only;
  48. unsigned int dump_only;
  49. unsigned int skip_c0;
  50. unsigned int skip_c1;
  51. unsigned int do_nhm_cstates;
  52. unsigned int do_snb_cstates;
  53. unsigned int do_knl_cstates;
  54. unsigned int do_pc2;
  55. unsigned int do_pc3;
  56. unsigned int do_pc6;
  57. unsigned int do_pc7;
  58. unsigned int do_c8_c9_c10;
  59. unsigned int do_skl_residency;
  60. unsigned int do_slm_cstates;
  61. unsigned int use_c1_residency_msr;
  62. unsigned int has_aperf;
  63. unsigned int has_epb;
  64. unsigned int units = 1000000; /* MHz etc */
  65. unsigned int genuine_intel;
  66. unsigned int has_invariant_tsc;
  67. unsigned int do_nhm_platform_info;
  68. unsigned int extra_msr_offset32;
  69. unsigned int extra_msr_offset64;
  70. unsigned int extra_delta_offset32;
  71. unsigned int extra_delta_offset64;
  72. unsigned int aperf_mperf_multiplier = 1;
  73. int do_smi;
  74. double bclk;
  75. double base_hz;
  76. double tsc_tweak = 1.0;
  77. unsigned int show_pkg;
  78. unsigned int show_core;
  79. unsigned int show_cpu;
  80. unsigned int show_pkg_only;
  81. unsigned int show_core_only;
  82. char *output_buffer, *outp;
  83. unsigned int do_rapl;
  84. unsigned int do_dts;
  85. unsigned int do_ptm;
  86. unsigned int tcc_activation_temp;
  87. unsigned int tcc_activation_temp_override;
  88. double rapl_power_units, rapl_time_units;
  89. double rapl_dram_energy_units, rapl_energy_units;
  90. double rapl_joule_counter_range;
  91. unsigned int do_core_perf_limit_reasons;
  92. unsigned int do_gfx_perf_limit_reasons;
  93. unsigned int do_ring_perf_limit_reasons;
  94. unsigned int crystal_hz;
  95. unsigned long long tsc_hz;
  96. int base_cpu;
  97. #define RAPL_PKG (1 << 0)
  98. /* 0x610 MSR_PKG_POWER_LIMIT */
  99. /* 0x611 MSR_PKG_ENERGY_STATUS */
  100. #define RAPL_PKG_PERF_STATUS (1 << 1)
  101. /* 0x613 MSR_PKG_PERF_STATUS */
  102. #define RAPL_PKG_POWER_INFO (1 << 2)
  103. /* 0x614 MSR_PKG_POWER_INFO */
  104. #define RAPL_DRAM (1 << 3)
  105. /* 0x618 MSR_DRAM_POWER_LIMIT */
  106. /* 0x619 MSR_DRAM_ENERGY_STATUS */
  107. #define RAPL_DRAM_PERF_STATUS (1 << 4)
  108. /* 0x61b MSR_DRAM_PERF_STATUS */
  109. #define RAPL_DRAM_POWER_INFO (1 << 5)
  110. /* 0x61c MSR_DRAM_POWER_INFO */
  111. #define RAPL_CORES (1 << 6)
  112. /* 0x638 MSR_PP0_POWER_LIMIT */
  113. /* 0x639 MSR_PP0_ENERGY_STATUS */
  114. #define RAPL_CORE_POLICY (1 << 7)
  115. /* 0x63a MSR_PP0_POLICY */
  116. #define RAPL_GFX (1 << 8)
  117. /* 0x640 MSR_PP1_POWER_LIMIT */
  118. /* 0x641 MSR_PP1_ENERGY_STATUS */
  119. /* 0x642 MSR_PP1_POLICY */
  120. #define TJMAX_DEFAULT 100
  121. #define MAX(a, b) ((a) > (b) ? (a) : (b))
  122. int aperf_mperf_unstable;
  123. int backwards_count;
  124. char *progname;
  125. cpu_set_t *cpu_present_set, *cpu_affinity_set;
  126. size_t cpu_present_setsize, cpu_affinity_setsize;
  127. struct thread_data {
  128. unsigned long long tsc;
  129. unsigned long long aperf;
  130. unsigned long long mperf;
  131. unsigned long long c1;
  132. unsigned long long extra_msr64;
  133. unsigned long long extra_delta64;
  134. unsigned long long extra_msr32;
  135. unsigned long long extra_delta32;
  136. unsigned int smi_count;
  137. unsigned int cpu_id;
  138. unsigned int flags;
  139. #define CPU_IS_FIRST_THREAD_IN_CORE 0x2
  140. #define CPU_IS_FIRST_CORE_IN_PACKAGE 0x4
  141. } *thread_even, *thread_odd;
  142. struct core_data {
  143. unsigned long long c3;
  144. unsigned long long c6;
  145. unsigned long long c7;
  146. unsigned int core_temp_c;
  147. unsigned int core_id;
  148. } *core_even, *core_odd;
  149. struct pkg_data {
  150. unsigned long long pc2;
  151. unsigned long long pc3;
  152. unsigned long long pc6;
  153. unsigned long long pc7;
  154. unsigned long long pc8;
  155. unsigned long long pc9;
  156. unsigned long long pc10;
  157. unsigned long long pkg_wtd_core_c0;
  158. unsigned long long pkg_any_core_c0;
  159. unsigned long long pkg_any_gfxe_c0;
  160. unsigned long long pkg_both_core_gfxe_c0;
  161. unsigned int package_id;
  162. unsigned int energy_pkg; /* MSR_PKG_ENERGY_STATUS */
  163. unsigned int energy_dram; /* MSR_DRAM_ENERGY_STATUS */
  164. unsigned int energy_cores; /* MSR_PP0_ENERGY_STATUS */
  165. unsigned int energy_gfx; /* MSR_PP1_ENERGY_STATUS */
  166. unsigned int rapl_pkg_perf_status; /* MSR_PKG_PERF_STATUS */
  167. unsigned int rapl_dram_perf_status; /* MSR_DRAM_PERF_STATUS */
  168. unsigned int pkg_temp_c;
  169. } *package_even, *package_odd;
  170. #define ODD_COUNTERS thread_odd, core_odd, package_odd
  171. #define EVEN_COUNTERS thread_even, core_even, package_even
  172. #define GET_THREAD(thread_base, thread_no, core_no, pkg_no) \
  173. (thread_base + (pkg_no) * topo.num_cores_per_pkg * \
  174. topo.num_threads_per_core + \
  175. (core_no) * topo.num_threads_per_core + (thread_no))
  176. #define GET_CORE(core_base, core_no, pkg_no) \
  177. (core_base + (pkg_no) * topo.num_cores_per_pkg + (core_no))
  178. #define GET_PKG(pkg_base, pkg_no) (pkg_base + pkg_no)
  179. struct system_summary {
  180. struct thread_data threads;
  181. struct core_data cores;
  182. struct pkg_data packages;
  183. } sum, average;
  184. struct topo_params {
  185. int num_packages;
  186. int num_cpus;
  187. int num_cores;
  188. int max_cpu_num;
  189. int num_cores_per_pkg;
  190. int num_threads_per_core;
  191. } topo;
  192. struct timeval tv_even, tv_odd, tv_delta;
  193. void setup_all_buffers(void);
  194. int cpu_is_not_present(int cpu)
  195. {
  196. return !CPU_ISSET_S(cpu, cpu_present_setsize, cpu_present_set);
  197. }
  198. /*
  199. * run func(thread, core, package) in topology order
  200. * skip non-present cpus
  201. */
  202. int for_all_cpus(int (func)(struct thread_data *, struct core_data *, struct pkg_data *),
  203. struct thread_data *thread_base, struct core_data *core_base, struct pkg_data *pkg_base)
  204. {
  205. int retval, pkg_no, core_no, thread_no;
  206. for (pkg_no = 0; pkg_no < topo.num_packages; ++pkg_no) {
  207. for (core_no = 0; core_no < topo.num_cores_per_pkg; ++core_no) {
  208. for (thread_no = 0; thread_no <
  209. topo.num_threads_per_core; ++thread_no) {
  210. struct thread_data *t;
  211. struct core_data *c;
  212. struct pkg_data *p;
  213. t = GET_THREAD(thread_base, thread_no, core_no, pkg_no);
  214. if (cpu_is_not_present(t->cpu_id))
  215. continue;
  216. c = GET_CORE(core_base, core_no, pkg_no);
  217. p = GET_PKG(pkg_base, pkg_no);
  218. retval = func(t, c, p);
  219. if (retval)
  220. return retval;
  221. }
  222. }
  223. }
  224. return 0;
  225. }
  226. int cpu_migrate(int cpu)
  227. {
  228. CPU_ZERO_S(cpu_affinity_setsize, cpu_affinity_set);
  229. CPU_SET_S(cpu, cpu_affinity_setsize, cpu_affinity_set);
  230. if (sched_setaffinity(0, cpu_affinity_setsize, cpu_affinity_set) == -1)
  231. return -1;
  232. else
  233. return 0;
  234. }
  235. int get_msr(int cpu, off_t offset, unsigned long long *msr)
  236. {
  237. ssize_t retval;
  238. char pathname[32];
  239. int fd;
  240. sprintf(pathname, "/dev/cpu/%d/msr", cpu);
  241. fd = open(pathname, O_RDONLY);
  242. if (fd < 0)
  243. err(-1, "%s open failed, try chown or chmod +r /dev/cpu/*/msr, or run as root", pathname);
  244. retval = pread(fd, msr, sizeof *msr, offset);
  245. close(fd);
  246. if (retval != sizeof *msr)
  247. err(-1, "%s offset 0x%llx read failed", pathname, (unsigned long long)offset);
  248. return 0;
  249. }
  250. /*
  251. * Example Format w/ field column widths:
  252. *
  253. * Package Core CPU Avg_MHz Bzy_MHz TSC_MHz SMI %Busy CPU_%c1 CPU_%c3 CPU_%c6 CPU_%c7 CoreTmp PkgTmp Pkg%pc2 Pkg%pc3 Pkg%pc6 Pkg%pc7 PkgWatt CorWatt GFXWatt
  254. * 123456781234567812345678123456781234567812345678123456781234567812345678123456781234567812345678123456781234567812345678123456781234567812345678123456781234567812345678
  255. */
  256. void print_header(void)
  257. {
  258. if (show_pkg)
  259. outp += sprintf(outp, " Package");
  260. if (show_core)
  261. outp += sprintf(outp, " Core");
  262. if (show_cpu)
  263. outp += sprintf(outp, " CPU");
  264. if (has_aperf)
  265. outp += sprintf(outp, " Avg_MHz");
  266. if (has_aperf)
  267. outp += sprintf(outp, " %%Busy");
  268. if (has_aperf)
  269. outp += sprintf(outp, " Bzy_MHz");
  270. outp += sprintf(outp, " TSC_MHz");
  271. if (extra_delta_offset32)
  272. outp += sprintf(outp, " count 0x%03X", extra_delta_offset32);
  273. if (extra_delta_offset64)
  274. outp += sprintf(outp, " COUNT 0x%03X", extra_delta_offset64);
  275. if (extra_msr_offset32)
  276. outp += sprintf(outp, " MSR 0x%03X", extra_msr_offset32);
  277. if (extra_msr_offset64)
  278. outp += sprintf(outp, " MSR 0x%03X", extra_msr_offset64);
  279. if (!debug)
  280. goto done;
  281. if (do_smi)
  282. outp += sprintf(outp, " SMI");
  283. if (do_nhm_cstates)
  284. outp += sprintf(outp, " CPU%%c1");
  285. if (do_nhm_cstates && !do_slm_cstates && !do_knl_cstates)
  286. outp += sprintf(outp, " CPU%%c3");
  287. if (do_nhm_cstates)
  288. outp += sprintf(outp, " CPU%%c6");
  289. if (do_snb_cstates)
  290. outp += sprintf(outp, " CPU%%c7");
  291. if (do_dts)
  292. outp += sprintf(outp, " CoreTmp");
  293. if (do_ptm)
  294. outp += sprintf(outp, " PkgTmp");
  295. if (do_skl_residency) {
  296. outp += sprintf(outp, " Totl%%C0");
  297. outp += sprintf(outp, " Any%%C0");
  298. outp += sprintf(outp, " GFX%%C0");
  299. outp += sprintf(outp, " CPUGFX%%");
  300. }
  301. if (do_pc2)
  302. outp += sprintf(outp, " Pkg%%pc2");
  303. if (do_pc3)
  304. outp += sprintf(outp, " Pkg%%pc3");
  305. if (do_pc6)
  306. outp += sprintf(outp, " Pkg%%pc6");
  307. if (do_pc7)
  308. outp += sprintf(outp, " Pkg%%pc7");
  309. if (do_c8_c9_c10) {
  310. outp += sprintf(outp, " Pkg%%pc8");
  311. outp += sprintf(outp, " Pkg%%pc9");
  312. outp += sprintf(outp, " Pk%%pc10");
  313. }
  314. if (do_rapl && !rapl_joules) {
  315. if (do_rapl & RAPL_PKG)
  316. outp += sprintf(outp, " PkgWatt");
  317. if (do_rapl & RAPL_CORES)
  318. outp += sprintf(outp, " CorWatt");
  319. if (do_rapl & RAPL_GFX)
  320. outp += sprintf(outp, " GFXWatt");
  321. if (do_rapl & RAPL_DRAM)
  322. outp += sprintf(outp, " RAMWatt");
  323. if (do_rapl & RAPL_PKG_PERF_STATUS)
  324. outp += sprintf(outp, " PKG_%%");
  325. if (do_rapl & RAPL_DRAM_PERF_STATUS)
  326. outp += sprintf(outp, " RAM_%%");
  327. } else if (do_rapl && rapl_joules) {
  328. if (do_rapl & RAPL_PKG)
  329. outp += sprintf(outp, " Pkg_J");
  330. if (do_rapl & RAPL_CORES)
  331. outp += sprintf(outp, " Cor_J");
  332. if (do_rapl & RAPL_GFX)
  333. outp += sprintf(outp, " GFX_J");
  334. if (do_rapl & RAPL_DRAM)
  335. outp += sprintf(outp, " RAM_J");
  336. if (do_rapl & RAPL_PKG_PERF_STATUS)
  337. outp += sprintf(outp, " PKG_%%");
  338. if (do_rapl & RAPL_DRAM_PERF_STATUS)
  339. outp += sprintf(outp, " RAM_%%");
  340. outp += sprintf(outp, " time");
  341. }
  342. done:
  343. outp += sprintf(outp, "\n");
  344. }
  345. int dump_counters(struct thread_data *t, struct core_data *c,
  346. struct pkg_data *p)
  347. {
  348. outp += sprintf(outp, "t %p, c %p, p %p\n", t, c, p);
  349. if (t) {
  350. outp += sprintf(outp, "CPU: %d flags 0x%x\n",
  351. t->cpu_id, t->flags);
  352. outp += sprintf(outp, "TSC: %016llX\n", t->tsc);
  353. outp += sprintf(outp, "aperf: %016llX\n", t->aperf);
  354. outp += sprintf(outp, "mperf: %016llX\n", t->mperf);
  355. outp += sprintf(outp, "c1: %016llX\n", t->c1);
  356. outp += sprintf(outp, "msr0x%x: %08llX\n",
  357. extra_delta_offset32, t->extra_delta32);
  358. outp += sprintf(outp, "msr0x%x: %016llX\n",
  359. extra_delta_offset64, t->extra_delta64);
  360. outp += sprintf(outp, "msr0x%x: %08llX\n",
  361. extra_msr_offset32, t->extra_msr32);
  362. outp += sprintf(outp, "msr0x%x: %016llX\n",
  363. extra_msr_offset64, t->extra_msr64);
  364. if (do_smi)
  365. outp += sprintf(outp, "SMI: %08X\n", t->smi_count);
  366. }
  367. if (c) {
  368. outp += sprintf(outp, "core: %d\n", c->core_id);
  369. outp += sprintf(outp, "c3: %016llX\n", c->c3);
  370. outp += sprintf(outp, "c6: %016llX\n", c->c6);
  371. outp += sprintf(outp, "c7: %016llX\n", c->c7);
  372. outp += sprintf(outp, "DTS: %dC\n", c->core_temp_c);
  373. }
  374. if (p) {
  375. outp += sprintf(outp, "package: %d\n", p->package_id);
  376. outp += sprintf(outp, "Weighted cores: %016llX\n", p->pkg_wtd_core_c0);
  377. outp += sprintf(outp, "Any cores: %016llX\n", p->pkg_any_core_c0);
  378. outp += sprintf(outp, "Any GFX: %016llX\n", p->pkg_any_gfxe_c0);
  379. outp += sprintf(outp, "CPU + GFX: %016llX\n", p->pkg_both_core_gfxe_c0);
  380. outp += sprintf(outp, "pc2: %016llX\n", p->pc2);
  381. if (do_pc3)
  382. outp += sprintf(outp, "pc3: %016llX\n", p->pc3);
  383. if (do_pc6)
  384. outp += sprintf(outp, "pc6: %016llX\n", p->pc6);
  385. if (do_pc7)
  386. outp += sprintf(outp, "pc7: %016llX\n", p->pc7);
  387. outp += sprintf(outp, "pc8: %016llX\n", p->pc8);
  388. outp += sprintf(outp, "pc9: %016llX\n", p->pc9);
  389. outp += sprintf(outp, "pc10: %016llX\n", p->pc10);
  390. outp += sprintf(outp, "Joules PKG: %0X\n", p->energy_pkg);
  391. outp += sprintf(outp, "Joules COR: %0X\n", p->energy_cores);
  392. outp += sprintf(outp, "Joules GFX: %0X\n", p->energy_gfx);
  393. outp += sprintf(outp, "Joules RAM: %0X\n", p->energy_dram);
  394. outp += sprintf(outp, "Throttle PKG: %0X\n",
  395. p->rapl_pkg_perf_status);
  396. outp += sprintf(outp, "Throttle RAM: %0X\n",
  397. p->rapl_dram_perf_status);
  398. outp += sprintf(outp, "PTM: %dC\n", p->pkg_temp_c);
  399. }
  400. outp += sprintf(outp, "\n");
  401. return 0;
  402. }
  403. /*
  404. * column formatting convention & formats
  405. */
  406. int format_counters(struct thread_data *t, struct core_data *c,
  407. struct pkg_data *p)
  408. {
  409. double interval_float;
  410. char *fmt8;
  411. /* if showing only 1st thread in core and this isn't one, bail out */
  412. if (show_core_only && !(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
  413. return 0;
  414. /* if showing only 1st thread in pkg and this isn't one, bail out */
  415. if (show_pkg_only && !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
  416. return 0;
  417. interval_float = tv_delta.tv_sec + tv_delta.tv_usec/1000000.0;
  418. /* topo columns, print blanks on 1st (average) line */
  419. if (t == &average.threads) {
  420. if (show_pkg)
  421. outp += sprintf(outp, " -");
  422. if (show_core)
  423. outp += sprintf(outp, " -");
  424. if (show_cpu)
  425. outp += sprintf(outp, " -");
  426. } else {
  427. if (show_pkg) {
  428. if (p)
  429. outp += sprintf(outp, "%8d", p->package_id);
  430. else
  431. outp += sprintf(outp, " -");
  432. }
  433. if (show_core) {
  434. if (c)
  435. outp += sprintf(outp, "%8d", c->core_id);
  436. else
  437. outp += sprintf(outp, " -");
  438. }
  439. if (show_cpu)
  440. outp += sprintf(outp, "%8d", t->cpu_id);
  441. }
  442. /* Avg_MHz */
  443. if (has_aperf)
  444. outp += sprintf(outp, "%8.0f",
  445. 1.0 / units * t->aperf / interval_float);
  446. /* %Busy */
  447. if (has_aperf) {
  448. if (!skip_c0)
  449. outp += sprintf(outp, "%8.2f", 100.0 * t->mperf/t->tsc/tsc_tweak);
  450. else
  451. outp += sprintf(outp, "********");
  452. }
  453. /* Bzy_MHz */
  454. if (has_aperf)
  455. outp += sprintf(outp, "%8.0f",
  456. 1.0 * t->tsc * tsc_tweak / units * t->aperf / t->mperf / interval_float);
  457. /* TSC_MHz */
  458. outp += sprintf(outp, "%8.0f", 1.0 * t->tsc/units/interval_float);
  459. /* delta */
  460. if (extra_delta_offset32)
  461. outp += sprintf(outp, " %11llu", t->extra_delta32);
  462. /* DELTA */
  463. if (extra_delta_offset64)
  464. outp += sprintf(outp, " %11llu", t->extra_delta64);
  465. /* msr */
  466. if (extra_msr_offset32)
  467. outp += sprintf(outp, " 0x%08llx", t->extra_msr32);
  468. /* MSR */
  469. if (extra_msr_offset64)
  470. outp += sprintf(outp, " 0x%016llx", t->extra_msr64);
  471. if (!debug)
  472. goto done;
  473. /* SMI */
  474. if (do_smi)
  475. outp += sprintf(outp, "%8d", t->smi_count);
  476. if (do_nhm_cstates) {
  477. if (!skip_c1)
  478. outp += sprintf(outp, "%8.2f", 100.0 * t->c1/t->tsc);
  479. else
  480. outp += sprintf(outp, "********");
  481. }
  482. /* print per-core data only for 1st thread in core */
  483. if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
  484. goto done;
  485. if (do_nhm_cstates && !do_slm_cstates && !do_knl_cstates)
  486. outp += sprintf(outp, "%8.2f", 100.0 * c->c3/t->tsc);
  487. if (do_nhm_cstates)
  488. outp += sprintf(outp, "%8.2f", 100.0 * c->c6/t->tsc);
  489. if (do_snb_cstates)
  490. outp += sprintf(outp, "%8.2f", 100.0 * c->c7/t->tsc);
  491. if (do_dts)
  492. outp += sprintf(outp, "%8d", c->core_temp_c);
  493. /* print per-package data only for 1st core in package */
  494. if (!(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
  495. goto done;
  496. /* PkgTmp */
  497. if (do_ptm)
  498. outp += sprintf(outp, "%8d", p->pkg_temp_c);
  499. /* Totl%C0, Any%C0 GFX%C0 CPUGFX% */
  500. if (do_skl_residency) {
  501. outp += sprintf(outp, "%8.2f", 100.0 * p->pkg_wtd_core_c0/t->tsc);
  502. outp += sprintf(outp, "%8.2f", 100.0 * p->pkg_any_core_c0/t->tsc);
  503. outp += sprintf(outp, "%8.2f", 100.0 * p->pkg_any_gfxe_c0/t->tsc);
  504. outp += sprintf(outp, "%8.2f", 100.0 * p->pkg_both_core_gfxe_c0/t->tsc);
  505. }
  506. if (do_pc2)
  507. outp += sprintf(outp, "%8.2f", 100.0 * p->pc2/t->tsc);
  508. if (do_pc3)
  509. outp += sprintf(outp, "%8.2f", 100.0 * p->pc3/t->tsc);
  510. if (do_pc6)
  511. outp += sprintf(outp, "%8.2f", 100.0 * p->pc6/t->tsc);
  512. if (do_pc7)
  513. outp += sprintf(outp, "%8.2f", 100.0 * p->pc7/t->tsc);
  514. if (do_c8_c9_c10) {
  515. outp += sprintf(outp, "%8.2f", 100.0 * p->pc8/t->tsc);
  516. outp += sprintf(outp, "%8.2f", 100.0 * p->pc9/t->tsc);
  517. outp += sprintf(outp, "%8.2f", 100.0 * p->pc10/t->tsc);
  518. }
  519. /*
  520. * If measurement interval exceeds minimum RAPL Joule Counter range,
  521. * indicate that results are suspect by printing "**" in fraction place.
  522. */
  523. if (interval_float < rapl_joule_counter_range)
  524. fmt8 = "%8.2f";
  525. else
  526. fmt8 = " %6.0f**";
  527. if (do_rapl && !rapl_joules) {
  528. if (do_rapl & RAPL_PKG)
  529. outp += sprintf(outp, fmt8, p->energy_pkg * rapl_energy_units / interval_float);
  530. if (do_rapl & RAPL_CORES)
  531. outp += sprintf(outp, fmt8, p->energy_cores * rapl_energy_units / interval_float);
  532. if (do_rapl & RAPL_GFX)
  533. outp += sprintf(outp, fmt8, p->energy_gfx * rapl_energy_units / interval_float);
  534. if (do_rapl & RAPL_DRAM)
  535. outp += sprintf(outp, fmt8, p->energy_dram * rapl_dram_energy_units / interval_float);
  536. if (do_rapl & RAPL_PKG_PERF_STATUS)
  537. outp += sprintf(outp, fmt8, 100.0 * p->rapl_pkg_perf_status * rapl_time_units / interval_float);
  538. if (do_rapl & RAPL_DRAM_PERF_STATUS)
  539. outp += sprintf(outp, fmt8, 100.0 * p->rapl_dram_perf_status * rapl_time_units / interval_float);
  540. } else if (do_rapl && rapl_joules) {
  541. if (do_rapl & RAPL_PKG)
  542. outp += sprintf(outp, fmt8,
  543. p->energy_pkg * rapl_energy_units);
  544. if (do_rapl & RAPL_CORES)
  545. outp += sprintf(outp, fmt8,
  546. p->energy_cores * rapl_energy_units);
  547. if (do_rapl & RAPL_GFX)
  548. outp += sprintf(outp, fmt8,
  549. p->energy_gfx * rapl_energy_units);
  550. if (do_rapl & RAPL_DRAM)
  551. outp += sprintf(outp, fmt8,
  552. p->energy_dram * rapl_dram_energy_units);
  553. if (do_rapl & RAPL_PKG_PERF_STATUS)
  554. outp += sprintf(outp, fmt8, 100.0 * p->rapl_pkg_perf_status * rapl_time_units / interval_float);
  555. if (do_rapl & RAPL_DRAM_PERF_STATUS)
  556. outp += sprintf(outp, fmt8, 100.0 * p->rapl_dram_perf_status * rapl_time_units / interval_float);
  557. outp += sprintf(outp, fmt8, interval_float);
  558. }
  559. done:
  560. outp += sprintf(outp, "\n");
  561. return 0;
  562. }
  563. void flush_stdout()
  564. {
  565. fputs(output_buffer, stdout);
  566. fflush(stdout);
  567. outp = output_buffer;
  568. }
  569. void flush_stderr()
  570. {
  571. fputs(output_buffer, stderr);
  572. outp = output_buffer;
  573. }
  574. void format_all_counters(struct thread_data *t, struct core_data *c, struct pkg_data *p)
  575. {
  576. static int printed;
  577. if (!printed || !summary_only)
  578. print_header();
  579. if (topo.num_cpus > 1)
  580. format_counters(&average.threads, &average.cores,
  581. &average.packages);
  582. printed = 1;
  583. if (summary_only)
  584. return;
  585. for_all_cpus(format_counters, t, c, p);
  586. }
  587. #define DELTA_WRAP32(new, old) \
  588. if (new > old) { \
  589. old = new - old; \
  590. } else { \
  591. old = 0x100000000 + new - old; \
  592. }
  593. void
  594. delta_package(struct pkg_data *new, struct pkg_data *old)
  595. {
  596. if (do_skl_residency) {
  597. old->pkg_wtd_core_c0 = new->pkg_wtd_core_c0 - old->pkg_wtd_core_c0;
  598. old->pkg_any_core_c0 = new->pkg_any_core_c0 - old->pkg_any_core_c0;
  599. old->pkg_any_gfxe_c0 = new->pkg_any_gfxe_c0 - old->pkg_any_gfxe_c0;
  600. old->pkg_both_core_gfxe_c0 = new->pkg_both_core_gfxe_c0 - old->pkg_both_core_gfxe_c0;
  601. }
  602. old->pc2 = new->pc2 - old->pc2;
  603. if (do_pc3)
  604. old->pc3 = new->pc3 - old->pc3;
  605. if (do_pc6)
  606. old->pc6 = new->pc6 - old->pc6;
  607. if (do_pc7)
  608. old->pc7 = new->pc7 - old->pc7;
  609. old->pc8 = new->pc8 - old->pc8;
  610. old->pc9 = new->pc9 - old->pc9;
  611. old->pc10 = new->pc10 - old->pc10;
  612. old->pkg_temp_c = new->pkg_temp_c;
  613. DELTA_WRAP32(new->energy_pkg, old->energy_pkg);
  614. DELTA_WRAP32(new->energy_cores, old->energy_cores);
  615. DELTA_WRAP32(new->energy_gfx, old->energy_gfx);
  616. DELTA_WRAP32(new->energy_dram, old->energy_dram);
  617. DELTA_WRAP32(new->rapl_pkg_perf_status, old->rapl_pkg_perf_status);
  618. DELTA_WRAP32(new->rapl_dram_perf_status, old->rapl_dram_perf_status);
  619. }
  620. void
  621. delta_core(struct core_data *new, struct core_data *old)
  622. {
  623. old->c3 = new->c3 - old->c3;
  624. old->c6 = new->c6 - old->c6;
  625. old->c7 = new->c7 - old->c7;
  626. old->core_temp_c = new->core_temp_c;
  627. }
  628. /*
  629. * old = new - old
  630. */
  631. void
  632. delta_thread(struct thread_data *new, struct thread_data *old,
  633. struct core_data *core_delta)
  634. {
  635. old->tsc = new->tsc - old->tsc;
  636. /* check for TSC < 1 Mcycles over interval */
  637. if (old->tsc < (1000 * 1000))
  638. errx(-3, "Insanely slow TSC rate, TSC stops in idle?\n"
  639. "You can disable all c-states by booting with \"idle=poll\"\n"
  640. "or just the deep ones with \"processor.max_cstate=1\"");
  641. old->c1 = new->c1 - old->c1;
  642. if (has_aperf) {
  643. if ((new->aperf > old->aperf) && (new->mperf > old->mperf)) {
  644. old->aperf = new->aperf - old->aperf;
  645. old->mperf = new->mperf - old->mperf;
  646. } else {
  647. if (!aperf_mperf_unstable) {
  648. fprintf(stderr, "%s: APERF or MPERF went backwards *\n", progname);
  649. fprintf(stderr, "* Frequency results do not cover entire interval *\n");
  650. fprintf(stderr, "* fix this by running Linux-2.6.30 or later *\n");
  651. aperf_mperf_unstable = 1;
  652. }
  653. /*
  654. * mperf delta is likely a huge "positive" number
  655. * can not use it for calculating c0 time
  656. */
  657. skip_c0 = 1;
  658. skip_c1 = 1;
  659. }
  660. }
  661. if (use_c1_residency_msr) {
  662. /*
  663. * Some models have a dedicated C1 residency MSR,
  664. * which should be more accurate than the derivation below.
  665. */
  666. } else {
  667. /*
  668. * As counter collection is not atomic,
  669. * it is possible for mperf's non-halted cycles + idle states
  670. * to exceed TSC's all cycles: show c1 = 0% in that case.
  671. */
  672. if ((old->mperf + core_delta->c3 + core_delta->c6 + core_delta->c7) > old->tsc)
  673. old->c1 = 0;
  674. else {
  675. /* normal case, derive c1 */
  676. old->c1 = old->tsc - old->mperf - core_delta->c3
  677. - core_delta->c6 - core_delta->c7;
  678. }
  679. }
  680. if (old->mperf == 0) {
  681. if (debug > 1) fprintf(stderr, "cpu%d MPERF 0!\n", old->cpu_id);
  682. old->mperf = 1; /* divide by 0 protection */
  683. }
  684. old->extra_delta32 = new->extra_delta32 - old->extra_delta32;
  685. old->extra_delta32 &= 0xFFFFFFFF;
  686. old->extra_delta64 = new->extra_delta64 - old->extra_delta64;
  687. /*
  688. * Extra MSR is just a snapshot, simply copy latest w/o subtracting
  689. */
  690. old->extra_msr32 = new->extra_msr32;
  691. old->extra_msr64 = new->extra_msr64;
  692. if (do_smi)
  693. old->smi_count = new->smi_count - old->smi_count;
  694. }
  695. int delta_cpu(struct thread_data *t, struct core_data *c,
  696. struct pkg_data *p, struct thread_data *t2,
  697. struct core_data *c2, struct pkg_data *p2)
  698. {
  699. /* calculate core delta only for 1st thread in core */
  700. if (t->flags & CPU_IS_FIRST_THREAD_IN_CORE)
  701. delta_core(c, c2);
  702. /* always calculate thread delta */
  703. delta_thread(t, t2, c2); /* c2 is core delta */
  704. /* calculate package delta only for 1st core in package */
  705. if (t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE)
  706. delta_package(p, p2);
  707. return 0;
  708. }
  709. void clear_counters(struct thread_data *t, struct core_data *c, struct pkg_data *p)
  710. {
  711. t->tsc = 0;
  712. t->aperf = 0;
  713. t->mperf = 0;
  714. t->c1 = 0;
  715. t->smi_count = 0;
  716. t->extra_delta32 = 0;
  717. t->extra_delta64 = 0;
  718. /* tells format_counters to dump all fields from this set */
  719. t->flags = CPU_IS_FIRST_THREAD_IN_CORE | CPU_IS_FIRST_CORE_IN_PACKAGE;
  720. c->c3 = 0;
  721. c->c6 = 0;
  722. c->c7 = 0;
  723. c->core_temp_c = 0;
  724. p->pkg_wtd_core_c0 = 0;
  725. p->pkg_any_core_c0 = 0;
  726. p->pkg_any_gfxe_c0 = 0;
  727. p->pkg_both_core_gfxe_c0 = 0;
  728. p->pc2 = 0;
  729. if (do_pc3)
  730. p->pc3 = 0;
  731. if (do_pc6)
  732. p->pc6 = 0;
  733. if (do_pc7)
  734. p->pc7 = 0;
  735. p->pc8 = 0;
  736. p->pc9 = 0;
  737. p->pc10 = 0;
  738. p->energy_pkg = 0;
  739. p->energy_dram = 0;
  740. p->energy_cores = 0;
  741. p->energy_gfx = 0;
  742. p->rapl_pkg_perf_status = 0;
  743. p->rapl_dram_perf_status = 0;
  744. p->pkg_temp_c = 0;
  745. }
  746. int sum_counters(struct thread_data *t, struct core_data *c,
  747. struct pkg_data *p)
  748. {
  749. average.threads.tsc += t->tsc;
  750. average.threads.aperf += t->aperf;
  751. average.threads.mperf += t->mperf;
  752. average.threads.c1 += t->c1;
  753. average.threads.extra_delta32 += t->extra_delta32;
  754. average.threads.extra_delta64 += t->extra_delta64;
  755. /* sum per-core values only for 1st thread in core */
  756. if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
  757. return 0;
  758. average.cores.c3 += c->c3;
  759. average.cores.c6 += c->c6;
  760. average.cores.c7 += c->c7;
  761. average.cores.core_temp_c = MAX(average.cores.core_temp_c, c->core_temp_c);
  762. /* sum per-pkg values only for 1st core in pkg */
  763. if (!(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
  764. return 0;
  765. if (do_skl_residency) {
  766. average.packages.pkg_wtd_core_c0 += p->pkg_wtd_core_c0;
  767. average.packages.pkg_any_core_c0 += p->pkg_any_core_c0;
  768. average.packages.pkg_any_gfxe_c0 += p->pkg_any_gfxe_c0;
  769. average.packages.pkg_both_core_gfxe_c0 += p->pkg_both_core_gfxe_c0;
  770. }
  771. average.packages.pc2 += p->pc2;
  772. if (do_pc3)
  773. average.packages.pc3 += p->pc3;
  774. if (do_pc6)
  775. average.packages.pc6 += p->pc6;
  776. if (do_pc7)
  777. average.packages.pc7 += p->pc7;
  778. average.packages.pc8 += p->pc8;
  779. average.packages.pc9 += p->pc9;
  780. average.packages.pc10 += p->pc10;
  781. average.packages.energy_pkg += p->energy_pkg;
  782. average.packages.energy_dram += p->energy_dram;
  783. average.packages.energy_cores += p->energy_cores;
  784. average.packages.energy_gfx += p->energy_gfx;
  785. average.packages.pkg_temp_c = MAX(average.packages.pkg_temp_c, p->pkg_temp_c);
  786. average.packages.rapl_pkg_perf_status += p->rapl_pkg_perf_status;
  787. average.packages.rapl_dram_perf_status += p->rapl_dram_perf_status;
  788. return 0;
  789. }
  790. /*
  791. * sum the counters for all cpus in the system
  792. * compute the weighted average
  793. */
  794. void compute_average(struct thread_data *t, struct core_data *c,
  795. struct pkg_data *p)
  796. {
  797. clear_counters(&average.threads, &average.cores, &average.packages);
  798. for_all_cpus(sum_counters, t, c, p);
  799. average.threads.tsc /= topo.num_cpus;
  800. average.threads.aperf /= topo.num_cpus;
  801. average.threads.mperf /= topo.num_cpus;
  802. average.threads.c1 /= topo.num_cpus;
  803. average.threads.extra_delta32 /= topo.num_cpus;
  804. average.threads.extra_delta32 &= 0xFFFFFFFF;
  805. average.threads.extra_delta64 /= topo.num_cpus;
  806. average.cores.c3 /= topo.num_cores;
  807. average.cores.c6 /= topo.num_cores;
  808. average.cores.c7 /= topo.num_cores;
  809. if (do_skl_residency) {
  810. average.packages.pkg_wtd_core_c0 /= topo.num_packages;
  811. average.packages.pkg_any_core_c0 /= topo.num_packages;
  812. average.packages.pkg_any_gfxe_c0 /= topo.num_packages;
  813. average.packages.pkg_both_core_gfxe_c0 /= topo.num_packages;
  814. }
  815. average.packages.pc2 /= topo.num_packages;
  816. if (do_pc3)
  817. average.packages.pc3 /= topo.num_packages;
  818. if (do_pc6)
  819. average.packages.pc6 /= topo.num_packages;
  820. if (do_pc7)
  821. average.packages.pc7 /= topo.num_packages;
  822. average.packages.pc8 /= topo.num_packages;
  823. average.packages.pc9 /= topo.num_packages;
  824. average.packages.pc10 /= topo.num_packages;
  825. }
  826. static unsigned long long rdtsc(void)
  827. {
  828. unsigned int low, high;
  829. asm volatile("rdtsc" : "=a" (low), "=d" (high));
  830. return low | ((unsigned long long)high) << 32;
  831. }
  832. /*
  833. * get_counters(...)
  834. * migrate to cpu
  835. * acquire and record local counters for that cpu
  836. */
  837. int get_counters(struct thread_data *t, struct core_data *c, struct pkg_data *p)
  838. {
  839. int cpu = t->cpu_id;
  840. unsigned long long msr;
  841. if (cpu_migrate(cpu)) {
  842. fprintf(stderr, "Could not migrate to CPU %d\n", cpu);
  843. return -1;
  844. }
  845. t->tsc = rdtsc(); /* we are running on local CPU of interest */
  846. if (has_aperf) {
  847. if (get_msr(cpu, MSR_IA32_APERF, &t->aperf))
  848. return -3;
  849. if (get_msr(cpu, MSR_IA32_MPERF, &t->mperf))
  850. return -4;
  851. t->aperf = t->aperf * aperf_mperf_multiplier;
  852. t->mperf = t->mperf * aperf_mperf_multiplier;
  853. }
  854. if (do_smi) {
  855. if (get_msr(cpu, MSR_SMI_COUNT, &msr))
  856. return -5;
  857. t->smi_count = msr & 0xFFFFFFFF;
  858. }
  859. if (extra_delta_offset32) {
  860. if (get_msr(cpu, extra_delta_offset32, &msr))
  861. return -5;
  862. t->extra_delta32 = msr & 0xFFFFFFFF;
  863. }
  864. if (extra_delta_offset64)
  865. if (get_msr(cpu, extra_delta_offset64, &t->extra_delta64))
  866. return -5;
  867. if (extra_msr_offset32) {
  868. if (get_msr(cpu, extra_msr_offset32, &msr))
  869. return -5;
  870. t->extra_msr32 = msr & 0xFFFFFFFF;
  871. }
  872. if (extra_msr_offset64)
  873. if (get_msr(cpu, extra_msr_offset64, &t->extra_msr64))
  874. return -5;
  875. if (use_c1_residency_msr) {
  876. if (get_msr(cpu, MSR_CORE_C1_RES, &t->c1))
  877. return -6;
  878. }
  879. /* collect core counters only for 1st thread in core */
  880. if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
  881. return 0;
  882. if (do_nhm_cstates && !do_slm_cstates && !do_knl_cstates) {
  883. if (get_msr(cpu, MSR_CORE_C3_RESIDENCY, &c->c3))
  884. return -6;
  885. }
  886. if (do_nhm_cstates && !do_knl_cstates) {
  887. if (get_msr(cpu, MSR_CORE_C6_RESIDENCY, &c->c6))
  888. return -7;
  889. } else if (do_knl_cstates) {
  890. if (get_msr(cpu, MSR_KNL_CORE_C6_RESIDENCY, &c->c6))
  891. return -7;
  892. }
  893. if (do_snb_cstates)
  894. if (get_msr(cpu, MSR_CORE_C7_RESIDENCY, &c->c7))
  895. return -8;
  896. if (do_dts) {
  897. if (get_msr(cpu, MSR_IA32_THERM_STATUS, &msr))
  898. return -9;
  899. c->core_temp_c = tcc_activation_temp - ((msr >> 16) & 0x7F);
  900. }
  901. /* collect package counters only for 1st core in package */
  902. if (!(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
  903. return 0;
  904. if (do_skl_residency) {
  905. if (get_msr(cpu, MSR_PKG_WEIGHTED_CORE_C0_RES, &p->pkg_wtd_core_c0))
  906. return -10;
  907. if (get_msr(cpu, MSR_PKG_ANY_CORE_C0_RES, &p->pkg_any_core_c0))
  908. return -11;
  909. if (get_msr(cpu, MSR_PKG_ANY_GFXE_C0_RES, &p->pkg_any_gfxe_c0))
  910. return -12;
  911. if (get_msr(cpu, MSR_PKG_BOTH_CORE_GFXE_C0_RES, &p->pkg_both_core_gfxe_c0))
  912. return -13;
  913. }
  914. if (do_pc3)
  915. if (get_msr(cpu, MSR_PKG_C3_RESIDENCY, &p->pc3))
  916. return -9;
  917. if (do_pc6)
  918. if (get_msr(cpu, MSR_PKG_C6_RESIDENCY, &p->pc6))
  919. return -10;
  920. if (do_pc2)
  921. if (get_msr(cpu, MSR_PKG_C2_RESIDENCY, &p->pc2))
  922. return -11;
  923. if (do_pc7)
  924. if (get_msr(cpu, MSR_PKG_C7_RESIDENCY, &p->pc7))
  925. return -12;
  926. if (do_c8_c9_c10) {
  927. if (get_msr(cpu, MSR_PKG_C8_RESIDENCY, &p->pc8))
  928. return -13;
  929. if (get_msr(cpu, MSR_PKG_C9_RESIDENCY, &p->pc9))
  930. return -13;
  931. if (get_msr(cpu, MSR_PKG_C10_RESIDENCY, &p->pc10))
  932. return -13;
  933. }
  934. if (do_rapl & RAPL_PKG) {
  935. if (get_msr(cpu, MSR_PKG_ENERGY_STATUS, &msr))
  936. return -13;
  937. p->energy_pkg = msr & 0xFFFFFFFF;
  938. }
  939. if (do_rapl & RAPL_CORES) {
  940. if (get_msr(cpu, MSR_PP0_ENERGY_STATUS, &msr))
  941. return -14;
  942. p->energy_cores = msr & 0xFFFFFFFF;
  943. }
  944. if (do_rapl & RAPL_DRAM) {
  945. if (get_msr(cpu, MSR_DRAM_ENERGY_STATUS, &msr))
  946. return -15;
  947. p->energy_dram = msr & 0xFFFFFFFF;
  948. }
  949. if (do_rapl & RAPL_GFX) {
  950. if (get_msr(cpu, MSR_PP1_ENERGY_STATUS, &msr))
  951. return -16;
  952. p->energy_gfx = msr & 0xFFFFFFFF;
  953. }
  954. if (do_rapl & RAPL_PKG_PERF_STATUS) {
  955. if (get_msr(cpu, MSR_PKG_PERF_STATUS, &msr))
  956. return -16;
  957. p->rapl_pkg_perf_status = msr & 0xFFFFFFFF;
  958. }
  959. if (do_rapl & RAPL_DRAM_PERF_STATUS) {
  960. if (get_msr(cpu, MSR_DRAM_PERF_STATUS, &msr))
  961. return -16;
  962. p->rapl_dram_perf_status = msr & 0xFFFFFFFF;
  963. }
  964. if (do_ptm) {
  965. if (get_msr(cpu, MSR_IA32_PACKAGE_THERM_STATUS, &msr))
  966. return -17;
  967. p->pkg_temp_c = tcc_activation_temp - ((msr >> 16) & 0x7F);
  968. }
  969. return 0;
  970. }
  971. /*
  972. * MSR_PKG_CST_CONFIG_CONTROL decoding for pkg_cstate_limit:
  973. * If you change the values, note they are used both in comparisons
  974. * (>= PCL__7) and to index pkg_cstate_limit_strings[].
  975. */
  976. #define PCLUKN 0 /* Unknown */
  977. #define PCLRSV 1 /* Reserved */
  978. #define PCL__0 2 /* PC0 */
  979. #define PCL__1 3 /* PC1 */
  980. #define PCL__2 4 /* PC2 */
  981. #define PCL__3 5 /* PC3 */
  982. #define PCL__4 6 /* PC4 */
  983. #define PCL__6 7 /* PC6 */
  984. #define PCL_6N 8 /* PC6 No Retention */
  985. #define PCL_6R 9 /* PC6 Retention */
  986. #define PCL__7 10 /* PC7 */
  987. #define PCL_7S 11 /* PC7 Shrink */
  988. #define PCL__8 12 /* PC8 */
  989. #define PCL__9 13 /* PC9 */
  990. #define PCLUNL 14 /* Unlimited */
  991. int pkg_cstate_limit = PCLUKN;
  992. char *pkg_cstate_limit_strings[] = { "reserved", "unknown", "pc0", "pc1", "pc2",
  993. "pc3", "pc4", "pc6", "pc6n", "pc6r", "pc7", "pc7s", "pc8", "pc9", "unlimited"};
  994. int nhm_pkg_cstate_limits[16] = {PCL__0, PCL__1, PCL__3, PCL__6, PCL__7, PCLRSV, PCLRSV, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
  995. int snb_pkg_cstate_limits[16] = {PCL__0, PCL__2, PCL_6N, PCL_6R, PCL__7, PCL_7S, PCLRSV, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
  996. int hsw_pkg_cstate_limits[16] = {PCL__0, PCL__2, PCL__3, PCL__6, PCL__7, PCL_7S, PCL__8, PCL__9, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
  997. int slv_pkg_cstate_limits[16] = {PCL__0, PCL__1, PCLRSV, PCLRSV, PCL__4, PCLRSV, PCL__6, PCL__7, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
  998. int amt_pkg_cstate_limits[16] = {PCL__0, PCL__1, PCL__2, PCLRSV, PCLRSV, PCLRSV, PCL__6, PCL__7, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
  999. int phi_pkg_cstate_limits[16] = {PCL__0, PCL__2, PCL_6N, PCL_6R, PCLRSV, PCLRSV, PCLRSV, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
  1000. static void
  1001. calculate_tsc_tweak()
  1002. {
  1003. unsigned long long msr;
  1004. unsigned int base_ratio;
  1005. get_msr(base_cpu, MSR_NHM_PLATFORM_INFO, &msr);
  1006. base_ratio = (msr >> 8) & 0xFF;
  1007. base_hz = base_ratio * bclk * 1000000;
  1008. tsc_tweak = base_hz / tsc_hz;
  1009. }
  1010. static void
  1011. dump_nhm_platform_info(void)
  1012. {
  1013. unsigned long long msr;
  1014. unsigned int ratio;
  1015. get_msr(base_cpu, MSR_NHM_PLATFORM_INFO, &msr);
  1016. fprintf(stderr, "cpu%d: MSR_NHM_PLATFORM_INFO: 0x%08llx\n", base_cpu, msr);
  1017. ratio = (msr >> 40) & 0xFF;
  1018. fprintf(stderr, "%d * %.0f = %.0f MHz max efficiency frequency\n",
  1019. ratio, bclk, ratio * bclk);
  1020. ratio = (msr >> 8) & 0xFF;
  1021. fprintf(stderr, "%d * %.0f = %.0f MHz base frequency\n",
  1022. ratio, bclk, ratio * bclk);
  1023. get_msr(base_cpu, MSR_IA32_POWER_CTL, &msr);
  1024. fprintf(stderr, "cpu%d: MSR_IA32_POWER_CTL: 0x%08llx (C1E auto-promotion: %sabled)\n",
  1025. base_cpu, msr, msr & 0x2 ? "EN" : "DIS");
  1026. return;
  1027. }
  1028. static void
  1029. dump_hsw_turbo_ratio_limits(void)
  1030. {
  1031. unsigned long long msr;
  1032. unsigned int ratio;
  1033. get_msr(base_cpu, MSR_TURBO_RATIO_LIMIT2, &msr);
  1034. fprintf(stderr, "cpu%d: MSR_TURBO_RATIO_LIMIT2: 0x%08llx\n", base_cpu, msr);
  1035. ratio = (msr >> 8) & 0xFF;
  1036. if (ratio)
  1037. fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 18 active cores\n",
  1038. ratio, bclk, ratio * bclk);
  1039. ratio = (msr >> 0) & 0xFF;
  1040. if (ratio)
  1041. fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 17 active cores\n",
  1042. ratio, bclk, ratio * bclk);
  1043. return;
  1044. }
  1045. static void
  1046. dump_ivt_turbo_ratio_limits(void)
  1047. {
  1048. unsigned long long msr;
  1049. unsigned int ratio;
  1050. get_msr(base_cpu, MSR_TURBO_RATIO_LIMIT1, &msr);
  1051. fprintf(stderr, "cpu%d: MSR_TURBO_RATIO_LIMIT1: 0x%08llx\n", base_cpu, msr);
  1052. ratio = (msr >> 56) & 0xFF;
  1053. if (ratio)
  1054. fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 16 active cores\n",
  1055. ratio, bclk, ratio * bclk);
  1056. ratio = (msr >> 48) & 0xFF;
  1057. if (ratio)
  1058. fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 15 active cores\n",
  1059. ratio, bclk, ratio * bclk);
  1060. ratio = (msr >> 40) & 0xFF;
  1061. if (ratio)
  1062. fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 14 active cores\n",
  1063. ratio, bclk, ratio * bclk);
  1064. ratio = (msr >> 32) & 0xFF;
  1065. if (ratio)
  1066. fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 13 active cores\n",
  1067. ratio, bclk, ratio * bclk);
  1068. ratio = (msr >> 24) & 0xFF;
  1069. if (ratio)
  1070. fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 12 active cores\n",
  1071. ratio, bclk, ratio * bclk);
  1072. ratio = (msr >> 16) & 0xFF;
  1073. if (ratio)
  1074. fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 11 active cores\n",
  1075. ratio, bclk, ratio * bclk);
  1076. ratio = (msr >> 8) & 0xFF;
  1077. if (ratio)
  1078. fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 10 active cores\n",
  1079. ratio, bclk, ratio * bclk);
  1080. ratio = (msr >> 0) & 0xFF;
  1081. if (ratio)
  1082. fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 9 active cores\n",
  1083. ratio, bclk, ratio * bclk);
  1084. return;
  1085. }
  1086. static void
  1087. dump_nhm_turbo_ratio_limits(void)
  1088. {
  1089. unsigned long long msr;
  1090. unsigned int ratio;
  1091. get_msr(base_cpu, MSR_TURBO_RATIO_LIMIT, &msr);
  1092. fprintf(stderr, "cpu%d: MSR_TURBO_RATIO_LIMIT: 0x%08llx\n", base_cpu, msr);
  1093. ratio = (msr >> 56) & 0xFF;
  1094. if (ratio)
  1095. fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 8 active cores\n",
  1096. ratio, bclk, ratio * bclk);
  1097. ratio = (msr >> 48) & 0xFF;
  1098. if (ratio)
  1099. fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 7 active cores\n",
  1100. ratio, bclk, ratio * bclk);
  1101. ratio = (msr >> 40) & 0xFF;
  1102. if (ratio)
  1103. fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 6 active cores\n",
  1104. ratio, bclk, ratio * bclk);
  1105. ratio = (msr >> 32) & 0xFF;
  1106. if (ratio)
  1107. fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 5 active cores\n",
  1108. ratio, bclk, ratio * bclk);
  1109. ratio = (msr >> 24) & 0xFF;
  1110. if (ratio)
  1111. fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 4 active cores\n",
  1112. ratio, bclk, ratio * bclk);
  1113. ratio = (msr >> 16) & 0xFF;
  1114. if (ratio)
  1115. fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 3 active cores\n",
  1116. ratio, bclk, ratio * bclk);
  1117. ratio = (msr >> 8) & 0xFF;
  1118. if (ratio)
  1119. fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 2 active cores\n",
  1120. ratio, bclk, ratio * bclk);
  1121. ratio = (msr >> 0) & 0xFF;
  1122. if (ratio)
  1123. fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 1 active cores\n",
  1124. ratio, bclk, ratio * bclk);
  1125. return;
  1126. }
  1127. static void
  1128. dump_knl_turbo_ratio_limits(void)
  1129. {
  1130. int cores;
  1131. unsigned int ratio;
  1132. unsigned long long msr;
  1133. int delta_cores;
  1134. int delta_ratio;
  1135. int i;
  1136. get_msr(base_cpu, MSR_NHM_TURBO_RATIO_LIMIT, &msr);
  1137. fprintf(stderr, "cpu%d: MSR_NHM_TURBO_RATIO_LIMIT: 0x%08llx\n",
  1138. base_cpu, msr);
  1139. /**
  1140. * Turbo encoding in KNL is as follows:
  1141. * [7:0] -- Base value of number of active cores of bucket 1.
  1142. * [15:8] -- Base value of freq ratio of bucket 1.
  1143. * [20:16] -- +ve delta of number of active cores of bucket 2.
  1144. * i.e. active cores of bucket 2 =
  1145. * active cores of bucket 1 + delta
  1146. * [23:21] -- Negative delta of freq ratio of bucket 2.
  1147. * i.e. freq ratio of bucket 2 =
  1148. * freq ratio of bucket 1 - delta
  1149. * [28:24]-- +ve delta of number of active cores of bucket 3.
  1150. * [31:29]-- -ve delta of freq ratio of bucket 3.
  1151. * [36:32]-- +ve delta of number of active cores of bucket 4.
  1152. * [39:37]-- -ve delta of freq ratio of bucket 4.
  1153. * [44:40]-- +ve delta of number of active cores of bucket 5.
  1154. * [47:45]-- -ve delta of freq ratio of bucket 5.
  1155. * [52:48]-- +ve delta of number of active cores of bucket 6.
  1156. * [55:53]-- -ve delta of freq ratio of bucket 6.
  1157. * [60:56]-- +ve delta of number of active cores of bucket 7.
  1158. * [63:61]-- -ve delta of freq ratio of bucket 7.
  1159. */
  1160. cores = msr & 0xFF;
  1161. ratio = (msr >> 8) && 0xFF;
  1162. if (ratio > 0)
  1163. fprintf(stderr,
  1164. "%d * %.0f = %.0f MHz max turbo %d active cores\n",
  1165. ratio, bclk, ratio * bclk, cores);
  1166. for (i = 16; i < 64; i = i + 8) {
  1167. delta_cores = (msr >> i) & 0x1F;
  1168. delta_ratio = (msr >> (i + 5)) && 0x7;
  1169. if (!delta_cores || !delta_ratio)
  1170. return;
  1171. cores = cores + delta_cores;
  1172. ratio = ratio - delta_ratio;
  1173. /** -ve ratios will make successive ratio calculations
  1174. * negative. Hence return instead of carrying on.
  1175. */
  1176. if (ratio > 0)
  1177. fprintf(stderr,
  1178. "%d * %.0f = %.0f MHz max turbo %d active cores\n",
  1179. ratio, bclk, ratio * bclk, cores);
  1180. }
  1181. }
  1182. static void
  1183. dump_nhm_cst_cfg(void)
  1184. {
  1185. unsigned long long msr;
  1186. get_msr(base_cpu, MSR_NHM_SNB_PKG_CST_CFG_CTL, &msr);
  1187. #define SNB_C1_AUTO_UNDEMOTE (1UL << 27)
  1188. #define SNB_C3_AUTO_UNDEMOTE (1UL << 28)
  1189. fprintf(stderr, "cpu%d: MSR_NHM_SNB_PKG_CST_CFG_CTL: 0x%08llx", base_cpu, msr);
  1190. fprintf(stderr, " (%s%s%s%s%slocked: pkg-cstate-limit=%d: %s)\n",
  1191. (msr & SNB_C3_AUTO_UNDEMOTE) ? "UNdemote-C3, " : "",
  1192. (msr & SNB_C1_AUTO_UNDEMOTE) ? "UNdemote-C1, " : "",
  1193. (msr & NHM_C3_AUTO_DEMOTE) ? "demote-C3, " : "",
  1194. (msr & NHM_C1_AUTO_DEMOTE) ? "demote-C1, " : "",
  1195. (msr & (1 << 15)) ? "" : "UN",
  1196. (unsigned int)msr & 7,
  1197. pkg_cstate_limit_strings[pkg_cstate_limit]);
  1198. return;
  1199. }
  1200. static void
  1201. dump_config_tdp(void)
  1202. {
  1203. unsigned long long msr;
  1204. get_msr(base_cpu, MSR_CONFIG_TDP_NOMINAL, &msr);
  1205. fprintf(stderr, "cpu%d: MSR_CONFIG_TDP_NOMINAL: 0x%08llx", base_cpu, msr);
  1206. fprintf(stderr, " (base_ratio=%d)\n", (unsigned int)msr & 0xEF);
  1207. get_msr(base_cpu, MSR_CONFIG_TDP_LEVEL_1, &msr);
  1208. fprintf(stderr, "cpu%d: MSR_CONFIG_TDP_LEVEL_1: 0x%08llx (", base_cpu, msr);
  1209. if (msr) {
  1210. fprintf(stderr, "PKG_MIN_PWR_LVL1=%d ", (unsigned int)(msr >> 48) & 0xEFFF);
  1211. fprintf(stderr, "PKG_MAX_PWR_LVL1=%d ", (unsigned int)(msr >> 32) & 0xEFFF);
  1212. fprintf(stderr, "LVL1_RATIO=%d ", (unsigned int)(msr >> 16) & 0xEF);
  1213. fprintf(stderr, "PKG_TDP_LVL1=%d", (unsigned int)(msr) & 0xEFFF);
  1214. }
  1215. fprintf(stderr, ")\n");
  1216. get_msr(base_cpu, MSR_CONFIG_TDP_LEVEL_2, &msr);
  1217. fprintf(stderr, "cpu%d: MSR_CONFIG_TDP_LEVEL_2: 0x%08llx (", base_cpu, msr);
  1218. if (msr) {
  1219. fprintf(stderr, "PKG_MIN_PWR_LVL2=%d ", (unsigned int)(msr >> 48) & 0xEFFF);
  1220. fprintf(stderr, "PKG_MAX_PWR_LVL2=%d ", (unsigned int)(msr >> 32) & 0xEFFF);
  1221. fprintf(stderr, "LVL2_RATIO=%d ", (unsigned int)(msr >> 16) & 0xEF);
  1222. fprintf(stderr, "PKG_TDP_LVL2=%d", (unsigned int)(msr) & 0xEFFF);
  1223. }
  1224. fprintf(stderr, ")\n");
  1225. get_msr(base_cpu, MSR_CONFIG_TDP_CONTROL, &msr);
  1226. fprintf(stderr, "cpu%d: MSR_CONFIG_TDP_CONTROL: 0x%08llx (", base_cpu, msr);
  1227. if ((msr) & 0x3)
  1228. fprintf(stderr, "TDP_LEVEL=%d ", (unsigned int)(msr) & 0x3);
  1229. fprintf(stderr, " lock=%d", (unsigned int)(msr >> 31) & 1);
  1230. fprintf(stderr, ")\n");
  1231. get_msr(base_cpu, MSR_TURBO_ACTIVATION_RATIO, &msr);
  1232. fprintf(stderr, "cpu%d: MSR_TURBO_ACTIVATION_RATIO: 0x%08llx (", base_cpu, msr);
  1233. fprintf(stderr, "MAX_NON_TURBO_RATIO=%d", (unsigned int)(msr) & 0xEF);
  1234. fprintf(stderr, " lock=%d", (unsigned int)(msr >> 31) & 1);
  1235. fprintf(stderr, ")\n");
  1236. }
  1237. void free_all_buffers(void)
  1238. {
  1239. CPU_FREE(cpu_present_set);
  1240. cpu_present_set = NULL;
  1241. cpu_present_set = 0;
  1242. CPU_FREE(cpu_affinity_set);
  1243. cpu_affinity_set = NULL;
  1244. cpu_affinity_setsize = 0;
  1245. free(thread_even);
  1246. free(core_even);
  1247. free(package_even);
  1248. thread_even = NULL;
  1249. core_even = NULL;
  1250. package_even = NULL;
  1251. free(thread_odd);
  1252. free(core_odd);
  1253. free(package_odd);
  1254. thread_odd = NULL;
  1255. core_odd = NULL;
  1256. package_odd = NULL;
  1257. free(output_buffer);
  1258. output_buffer = NULL;
  1259. outp = NULL;
  1260. }
  1261. /*
  1262. * Open a file, and exit on failure
  1263. */
  1264. FILE *fopen_or_die(const char *path, const char *mode)
  1265. {
  1266. FILE *filep = fopen(path, "r");
  1267. if (!filep)
  1268. err(1, "%s: open failed", path);
  1269. return filep;
  1270. }
  1271. /*
  1272. * Parse a file containing a single int.
  1273. */
  1274. int parse_int_file(const char *fmt, ...)
  1275. {
  1276. va_list args;
  1277. char path[PATH_MAX];
  1278. FILE *filep;
  1279. int value;
  1280. va_start(args, fmt);
  1281. vsnprintf(path, sizeof(path), fmt, args);
  1282. va_end(args);
  1283. filep = fopen_or_die(path, "r");
  1284. if (fscanf(filep, "%d", &value) != 1)
  1285. err(1, "%s: failed to parse number from file", path);
  1286. fclose(filep);
  1287. return value;
  1288. }
  1289. /*
  1290. * get_cpu_position_in_core(cpu)
  1291. * return the position of the CPU among its HT siblings in the core
  1292. * return -1 if the sibling is not in list
  1293. */
  1294. int get_cpu_position_in_core(int cpu)
  1295. {
  1296. char path[64];
  1297. FILE *filep;
  1298. int this_cpu;
  1299. char character;
  1300. int i;
  1301. sprintf(path,
  1302. "/sys/devices/system/cpu/cpu%d/topology/thread_siblings_list",
  1303. cpu);
  1304. filep = fopen(path, "r");
  1305. if (filep == NULL) {
  1306. perror(path);
  1307. exit(1);
  1308. }
  1309. for (i = 0; i < topo.num_threads_per_core; i++) {
  1310. fscanf(filep, "%d", &this_cpu);
  1311. if (this_cpu == cpu) {
  1312. fclose(filep);
  1313. return i;
  1314. }
  1315. /* Account for no separator after last thread*/
  1316. if (i != (topo.num_threads_per_core - 1))
  1317. fscanf(filep, "%c", &character);
  1318. }
  1319. fclose(filep);
  1320. return -1;
  1321. }
  1322. /*
  1323. * cpu_is_first_core_in_package(cpu)
  1324. * return 1 if given CPU is 1st core in package
  1325. */
  1326. int cpu_is_first_core_in_package(int cpu)
  1327. {
  1328. return cpu == parse_int_file("/sys/devices/system/cpu/cpu%d/topology/core_siblings_list", cpu);
  1329. }
  1330. int get_physical_package_id(int cpu)
  1331. {
  1332. return parse_int_file("/sys/devices/system/cpu/cpu%d/topology/physical_package_id", cpu);
  1333. }
  1334. int get_core_id(int cpu)
  1335. {
  1336. return parse_int_file("/sys/devices/system/cpu/cpu%d/topology/core_id", cpu);
  1337. }
  1338. int get_num_ht_siblings(int cpu)
  1339. {
  1340. char path[80];
  1341. FILE *filep;
  1342. int sib1;
  1343. int matches = 0;
  1344. char character;
  1345. char str[100];
  1346. char *ch;
  1347. sprintf(path, "/sys/devices/system/cpu/cpu%d/topology/thread_siblings_list", cpu);
  1348. filep = fopen_or_die(path, "r");
  1349. /*
  1350. * file format:
  1351. * A ',' separated or '-' separated set of numbers
  1352. * (eg 1-2 or 1,3,4,5)
  1353. */
  1354. fscanf(filep, "%d%c\n", &sib1, &character);
  1355. fseek(filep, 0, SEEK_SET);
  1356. fgets(str, 100, filep);
  1357. ch = strchr(str, character);
  1358. while (ch != NULL) {
  1359. matches++;
  1360. ch = strchr(ch+1, character);
  1361. }
  1362. fclose(filep);
  1363. return matches+1;
  1364. }
  1365. /*
  1366. * run func(thread, core, package) in topology order
  1367. * skip non-present cpus
  1368. */
  1369. int for_all_cpus_2(int (func)(struct thread_data *, struct core_data *,
  1370. struct pkg_data *, struct thread_data *, struct core_data *,
  1371. struct pkg_data *), struct thread_data *thread_base,
  1372. struct core_data *core_base, struct pkg_data *pkg_base,
  1373. struct thread_data *thread_base2, struct core_data *core_base2,
  1374. struct pkg_data *pkg_base2)
  1375. {
  1376. int retval, pkg_no, core_no, thread_no;
  1377. for (pkg_no = 0; pkg_no < topo.num_packages; ++pkg_no) {
  1378. for (core_no = 0; core_no < topo.num_cores_per_pkg; ++core_no) {
  1379. for (thread_no = 0; thread_no <
  1380. topo.num_threads_per_core; ++thread_no) {
  1381. struct thread_data *t, *t2;
  1382. struct core_data *c, *c2;
  1383. struct pkg_data *p, *p2;
  1384. t = GET_THREAD(thread_base, thread_no, core_no, pkg_no);
  1385. if (cpu_is_not_present(t->cpu_id))
  1386. continue;
  1387. t2 = GET_THREAD(thread_base2, thread_no, core_no, pkg_no);
  1388. c = GET_CORE(core_base, core_no, pkg_no);
  1389. c2 = GET_CORE(core_base2, core_no, pkg_no);
  1390. p = GET_PKG(pkg_base, pkg_no);
  1391. p2 = GET_PKG(pkg_base2, pkg_no);
  1392. retval = func(t, c, p, t2, c2, p2);
  1393. if (retval)
  1394. return retval;
  1395. }
  1396. }
  1397. }
  1398. return 0;
  1399. }
  1400. /*
  1401. * run func(cpu) on every cpu in /proc/stat
  1402. * return max_cpu number
  1403. */
  1404. int for_all_proc_cpus(int (func)(int))
  1405. {
  1406. FILE *fp;
  1407. int cpu_num;
  1408. int retval;
  1409. fp = fopen_or_die(proc_stat, "r");
  1410. retval = fscanf(fp, "cpu %*d %*d %*d %*d %*d %*d %*d %*d %*d %*d\n");
  1411. if (retval != 0)
  1412. err(1, "%s: failed to parse format", proc_stat);
  1413. while (1) {
  1414. retval = fscanf(fp, "cpu%u %*d %*d %*d %*d %*d %*d %*d %*d %*d %*d\n", &cpu_num);
  1415. if (retval != 1)
  1416. break;
  1417. retval = func(cpu_num);
  1418. if (retval) {
  1419. fclose(fp);
  1420. return(retval);
  1421. }
  1422. }
  1423. fclose(fp);
  1424. return 0;
  1425. }
  1426. void re_initialize(void)
  1427. {
  1428. free_all_buffers();
  1429. setup_all_buffers();
  1430. printf("turbostat: re-initialized with num_cpus %d\n", topo.num_cpus);
  1431. }
  1432. /*
  1433. * count_cpus()
  1434. * remember the last one seen, it will be the max
  1435. */
  1436. int count_cpus(int cpu)
  1437. {
  1438. if (topo.max_cpu_num < cpu)
  1439. topo.max_cpu_num = cpu;
  1440. topo.num_cpus += 1;
  1441. return 0;
  1442. }
  1443. int mark_cpu_present(int cpu)
  1444. {
  1445. CPU_SET_S(cpu, cpu_present_setsize, cpu_present_set);
  1446. return 0;
  1447. }
  1448. void turbostat_loop()
  1449. {
  1450. int retval;
  1451. int restarted = 0;
  1452. restart:
  1453. restarted++;
  1454. retval = for_all_cpus(get_counters, EVEN_COUNTERS);
  1455. if (retval < -1) {
  1456. exit(retval);
  1457. } else if (retval == -1) {
  1458. if (restarted > 1) {
  1459. exit(retval);
  1460. }
  1461. re_initialize();
  1462. goto restart;
  1463. }
  1464. restarted = 0;
  1465. gettimeofday(&tv_even, (struct timezone *)NULL);
  1466. while (1) {
  1467. if (for_all_proc_cpus(cpu_is_not_present)) {
  1468. re_initialize();
  1469. goto restart;
  1470. }
  1471. sleep(interval_sec);
  1472. retval = for_all_cpus(get_counters, ODD_COUNTERS);
  1473. if (retval < -1) {
  1474. exit(retval);
  1475. } else if (retval == -1) {
  1476. re_initialize();
  1477. goto restart;
  1478. }
  1479. gettimeofday(&tv_odd, (struct timezone *)NULL);
  1480. timersub(&tv_odd, &tv_even, &tv_delta);
  1481. for_all_cpus_2(delta_cpu, ODD_COUNTERS, EVEN_COUNTERS);
  1482. compute_average(EVEN_COUNTERS);
  1483. format_all_counters(EVEN_COUNTERS);
  1484. flush_stdout();
  1485. sleep(interval_sec);
  1486. retval = for_all_cpus(get_counters, EVEN_COUNTERS);
  1487. if (retval < -1) {
  1488. exit(retval);
  1489. } else if (retval == -1) {
  1490. re_initialize();
  1491. goto restart;
  1492. }
  1493. gettimeofday(&tv_even, (struct timezone *)NULL);
  1494. timersub(&tv_even, &tv_odd, &tv_delta);
  1495. for_all_cpus_2(delta_cpu, EVEN_COUNTERS, ODD_COUNTERS);
  1496. compute_average(ODD_COUNTERS);
  1497. format_all_counters(ODD_COUNTERS);
  1498. flush_stdout();
  1499. }
  1500. }
  1501. void check_dev_msr()
  1502. {
  1503. struct stat sb;
  1504. char pathname[32];
  1505. sprintf(pathname, "/dev/cpu/%d/msr", base_cpu);
  1506. if (stat(pathname, &sb))
  1507. if (system("/sbin/modprobe msr > /dev/null 2>&1"))
  1508. err(-5, "no /dev/cpu/0/msr, Try \"# modprobe msr\" ");
  1509. }
  1510. void check_permissions()
  1511. {
  1512. struct __user_cap_header_struct cap_header_data;
  1513. cap_user_header_t cap_header = &cap_header_data;
  1514. struct __user_cap_data_struct cap_data_data;
  1515. cap_user_data_t cap_data = &cap_data_data;
  1516. extern int capget(cap_user_header_t hdrp, cap_user_data_t datap);
  1517. int do_exit = 0;
  1518. char pathname[32];
  1519. /* check for CAP_SYS_RAWIO */
  1520. cap_header->pid = getpid();
  1521. cap_header->version = _LINUX_CAPABILITY_VERSION;
  1522. if (capget(cap_header, cap_data) < 0)
  1523. err(-6, "capget(2) failed");
  1524. if ((cap_data->effective & (1 << CAP_SYS_RAWIO)) == 0) {
  1525. do_exit++;
  1526. warnx("capget(CAP_SYS_RAWIO) failed,"
  1527. " try \"# setcap cap_sys_rawio=ep %s\"", progname);
  1528. }
  1529. /* test file permissions */
  1530. sprintf(pathname, "/dev/cpu/%d/msr", base_cpu);
  1531. if (euidaccess(pathname, R_OK)) {
  1532. do_exit++;
  1533. warn("/dev/cpu/0/msr open failed, try chown or chmod +r /dev/cpu/*/msr");
  1534. }
  1535. /* if all else fails, thell them to be root */
  1536. if (do_exit)
  1537. if (getuid() != 0)
  1538. warnx("... or simply run as root");
  1539. if (do_exit)
  1540. exit(-6);
  1541. }
  1542. /*
  1543. * NHM adds support for additional MSRs:
  1544. *
  1545. * MSR_SMI_COUNT 0x00000034
  1546. *
  1547. * MSR_NHM_PLATFORM_INFO 0x000000ce
  1548. * MSR_NHM_SNB_PKG_CST_CFG_CTL 0x000000e2
  1549. *
  1550. * MSR_PKG_C3_RESIDENCY 0x000003f8
  1551. * MSR_PKG_C6_RESIDENCY 0x000003f9
  1552. * MSR_CORE_C3_RESIDENCY 0x000003fc
  1553. * MSR_CORE_C6_RESIDENCY 0x000003fd
  1554. *
  1555. * Side effect:
  1556. * sets global pkg_cstate_limit to decode MSR_NHM_SNB_PKG_CST_CFG_CTL
  1557. */
  1558. int probe_nhm_msrs(unsigned int family, unsigned int model)
  1559. {
  1560. unsigned long long msr;
  1561. int *pkg_cstate_limits;
  1562. if (!genuine_intel)
  1563. return 0;
  1564. if (family != 6)
  1565. return 0;
  1566. switch (model) {
  1567. case 0x1A: /* Core i7, Xeon 5500 series - Bloomfield, Gainstown NHM-EP */
  1568. case 0x1E: /* Core i7 and i5 Processor - Clarksfield, Lynnfield, Jasper Forest */
  1569. case 0x1F: /* Core i7 and i5 Processor - Nehalem */
  1570. case 0x25: /* Westmere Client - Clarkdale, Arrandale */
  1571. case 0x2C: /* Westmere EP - Gulftown */
  1572. case 0x2E: /* Nehalem-EX Xeon - Beckton */
  1573. case 0x2F: /* Westmere-EX Xeon - Eagleton */
  1574. pkg_cstate_limits = nhm_pkg_cstate_limits;
  1575. break;
  1576. case 0x2A: /* SNB */
  1577. case 0x2D: /* SNB Xeon */
  1578. case 0x3A: /* IVB */
  1579. case 0x3E: /* IVB Xeon */
  1580. pkg_cstate_limits = snb_pkg_cstate_limits;
  1581. break;
  1582. case 0x3C: /* HSW */
  1583. case 0x3F: /* HSX */
  1584. case 0x45: /* HSW */
  1585. case 0x46: /* HSW */
  1586. case 0x3D: /* BDW */
  1587. case 0x47: /* BDW */
  1588. case 0x4F: /* BDX */
  1589. case 0x56: /* BDX-DE */
  1590. case 0x4E: /* SKL */
  1591. case 0x5E: /* SKL */
  1592. pkg_cstate_limits = hsw_pkg_cstate_limits;
  1593. break;
  1594. case 0x37: /* BYT */
  1595. case 0x4D: /* AVN */
  1596. pkg_cstate_limits = slv_pkg_cstate_limits;
  1597. break;
  1598. case 0x4C: /* AMT */
  1599. pkg_cstate_limits = amt_pkg_cstate_limits;
  1600. break;
  1601. case 0x57: /* PHI */
  1602. pkg_cstate_limits = phi_pkg_cstate_limits;
  1603. break;
  1604. default:
  1605. return 0;
  1606. }
  1607. get_msr(base_cpu, MSR_NHM_SNB_PKG_CST_CFG_CTL, &msr);
  1608. pkg_cstate_limit = pkg_cstate_limits[msr & 0xF];
  1609. return 1;
  1610. }
  1611. int has_nhm_turbo_ratio_limit(unsigned int family, unsigned int model)
  1612. {
  1613. switch (model) {
  1614. /* Nehalem compatible, but do not include turbo-ratio limit support */
  1615. case 0x2E: /* Nehalem-EX Xeon - Beckton */
  1616. case 0x2F: /* Westmere-EX Xeon - Eagleton */
  1617. return 0;
  1618. default:
  1619. return 1;
  1620. }
  1621. }
  1622. int has_ivt_turbo_ratio_limit(unsigned int family, unsigned int model)
  1623. {
  1624. if (!genuine_intel)
  1625. return 0;
  1626. if (family != 6)
  1627. return 0;
  1628. switch (model) {
  1629. case 0x3E: /* IVB Xeon */
  1630. case 0x3F: /* HSW Xeon */
  1631. return 1;
  1632. default:
  1633. return 0;
  1634. }
  1635. }
  1636. int has_hsw_turbo_ratio_limit(unsigned int family, unsigned int model)
  1637. {
  1638. if (!genuine_intel)
  1639. return 0;
  1640. if (family != 6)
  1641. return 0;
  1642. switch (model) {
  1643. case 0x3F: /* HSW Xeon */
  1644. return 1;
  1645. default:
  1646. return 0;
  1647. }
  1648. }
  1649. int has_knl_turbo_ratio_limit(unsigned int family, unsigned int model)
  1650. {
  1651. if (!genuine_intel)
  1652. return 0;
  1653. if (family != 6)
  1654. return 0;
  1655. switch (model) {
  1656. case 0x57: /* Knights Landing */
  1657. return 1;
  1658. default:
  1659. return 0;
  1660. }
  1661. }
  1662. int has_config_tdp(unsigned int family, unsigned int model)
  1663. {
  1664. if (!genuine_intel)
  1665. return 0;
  1666. if (family != 6)
  1667. return 0;
  1668. switch (model) {
  1669. case 0x3A: /* IVB */
  1670. case 0x3C: /* HSW */
  1671. case 0x3F: /* HSX */
  1672. case 0x45: /* HSW */
  1673. case 0x46: /* HSW */
  1674. case 0x3D: /* BDW */
  1675. case 0x47: /* BDW */
  1676. case 0x4F: /* BDX */
  1677. case 0x56: /* BDX-DE */
  1678. case 0x4E: /* SKL */
  1679. case 0x5E: /* SKL */
  1680. case 0x57: /* Knights Landing */
  1681. return 1;
  1682. default:
  1683. return 0;
  1684. }
  1685. }
  1686. static void
  1687. dump_cstate_pstate_config_info(family, model)
  1688. {
  1689. if (!do_nhm_platform_info)
  1690. return;
  1691. dump_nhm_platform_info();
  1692. if (has_hsw_turbo_ratio_limit(family, model))
  1693. dump_hsw_turbo_ratio_limits();
  1694. if (has_ivt_turbo_ratio_limit(family, model))
  1695. dump_ivt_turbo_ratio_limits();
  1696. if (has_nhm_turbo_ratio_limit(family, model))
  1697. dump_nhm_turbo_ratio_limits();
  1698. if (has_knl_turbo_ratio_limit(family, model))
  1699. dump_knl_turbo_ratio_limits();
  1700. if (has_config_tdp(family, model))
  1701. dump_config_tdp();
  1702. dump_nhm_cst_cfg();
  1703. }
  1704. /*
  1705. * print_epb()
  1706. * Decode the ENERGY_PERF_BIAS MSR
  1707. */
  1708. int print_epb(struct thread_data *t, struct core_data *c, struct pkg_data *p)
  1709. {
  1710. unsigned long long msr;
  1711. char *epb_string;
  1712. int cpu;
  1713. if (!has_epb)
  1714. return 0;
  1715. cpu = t->cpu_id;
  1716. /* EPB is per-package */
  1717. if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE) || !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
  1718. return 0;
  1719. if (cpu_migrate(cpu)) {
  1720. fprintf(stderr, "Could not migrate to CPU %d\n", cpu);
  1721. return -1;
  1722. }
  1723. if (get_msr(cpu, MSR_IA32_ENERGY_PERF_BIAS, &msr))
  1724. return 0;
  1725. switch (msr & 0xF) {
  1726. case ENERGY_PERF_BIAS_PERFORMANCE:
  1727. epb_string = "performance";
  1728. break;
  1729. case ENERGY_PERF_BIAS_NORMAL:
  1730. epb_string = "balanced";
  1731. break;
  1732. case ENERGY_PERF_BIAS_POWERSAVE:
  1733. epb_string = "powersave";
  1734. break;
  1735. default:
  1736. epb_string = "custom";
  1737. break;
  1738. }
  1739. fprintf(stderr, "cpu%d: MSR_IA32_ENERGY_PERF_BIAS: 0x%08llx (%s)\n", cpu, msr, epb_string);
  1740. return 0;
  1741. }
  1742. /*
  1743. * print_perf_limit()
  1744. */
  1745. int print_perf_limit(struct thread_data *t, struct core_data *c, struct pkg_data *p)
  1746. {
  1747. unsigned long long msr;
  1748. int cpu;
  1749. cpu = t->cpu_id;
  1750. /* per-package */
  1751. if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE) || !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
  1752. return 0;
  1753. if (cpu_migrate(cpu)) {
  1754. fprintf(stderr, "Could not migrate to CPU %d\n", cpu);
  1755. return -1;
  1756. }
  1757. if (do_core_perf_limit_reasons) {
  1758. get_msr(cpu, MSR_CORE_PERF_LIMIT_REASONS, &msr);
  1759. fprintf(stderr, "cpu%d: MSR_CORE_PERF_LIMIT_REASONS, 0x%08llx", cpu, msr);
  1760. fprintf(stderr, " (Active: %s%s%s%s%s%s%s%s%s%s%s%s%s%s)",
  1761. (msr & 1 << 15) ? "bit15, " : "",
  1762. (msr & 1 << 14) ? "bit14, " : "",
  1763. (msr & 1 << 13) ? "Transitions, " : "",
  1764. (msr & 1 << 12) ? "MultiCoreTurbo, " : "",
  1765. (msr & 1 << 11) ? "PkgPwrL2, " : "",
  1766. (msr & 1 << 10) ? "PkgPwrL1, " : "",
  1767. (msr & 1 << 9) ? "CorePwr, " : "",
  1768. (msr & 1 << 8) ? "Amps, " : "",
  1769. (msr & 1 << 6) ? "VR-Therm, " : "",
  1770. (msr & 1 << 5) ? "Auto-HWP, " : "",
  1771. (msr & 1 << 4) ? "Graphics, " : "",
  1772. (msr & 1 << 2) ? "bit2, " : "",
  1773. (msr & 1 << 1) ? "ThermStatus, " : "",
  1774. (msr & 1 << 0) ? "PROCHOT, " : "");
  1775. fprintf(stderr, " (Logged: %s%s%s%s%s%s%s%s%s%s%s%s%s%s)\n",
  1776. (msr & 1 << 31) ? "bit31, " : "",
  1777. (msr & 1 << 30) ? "bit30, " : "",
  1778. (msr & 1 << 29) ? "Transitions, " : "",
  1779. (msr & 1 << 28) ? "MultiCoreTurbo, " : "",
  1780. (msr & 1 << 27) ? "PkgPwrL2, " : "",
  1781. (msr & 1 << 26) ? "PkgPwrL1, " : "",
  1782. (msr & 1 << 25) ? "CorePwr, " : "",
  1783. (msr & 1 << 24) ? "Amps, " : "",
  1784. (msr & 1 << 22) ? "VR-Therm, " : "",
  1785. (msr & 1 << 21) ? "Auto-HWP, " : "",
  1786. (msr & 1 << 20) ? "Graphics, " : "",
  1787. (msr & 1 << 18) ? "bit18, " : "",
  1788. (msr & 1 << 17) ? "ThermStatus, " : "",
  1789. (msr & 1 << 16) ? "PROCHOT, " : "");
  1790. }
  1791. if (do_gfx_perf_limit_reasons) {
  1792. get_msr(cpu, MSR_GFX_PERF_LIMIT_REASONS, &msr);
  1793. fprintf(stderr, "cpu%d: MSR_GFX_PERF_LIMIT_REASONS, 0x%08llx", cpu, msr);
  1794. fprintf(stderr, " (Active: %s%s%s%s%s%s%s%s)",
  1795. (msr & 1 << 0) ? "PROCHOT, " : "",
  1796. (msr & 1 << 1) ? "ThermStatus, " : "",
  1797. (msr & 1 << 4) ? "Graphics, " : "",
  1798. (msr & 1 << 6) ? "VR-Therm, " : "",
  1799. (msr & 1 << 8) ? "Amps, " : "",
  1800. (msr & 1 << 9) ? "GFXPwr, " : "",
  1801. (msr & 1 << 10) ? "PkgPwrL1, " : "",
  1802. (msr & 1 << 11) ? "PkgPwrL2, " : "");
  1803. fprintf(stderr, " (Logged: %s%s%s%s%s%s%s%s)\n",
  1804. (msr & 1 << 16) ? "PROCHOT, " : "",
  1805. (msr & 1 << 17) ? "ThermStatus, " : "",
  1806. (msr & 1 << 20) ? "Graphics, " : "",
  1807. (msr & 1 << 22) ? "VR-Therm, " : "",
  1808. (msr & 1 << 24) ? "Amps, " : "",
  1809. (msr & 1 << 25) ? "GFXPwr, " : "",
  1810. (msr & 1 << 26) ? "PkgPwrL1, " : "",
  1811. (msr & 1 << 27) ? "PkgPwrL2, " : "");
  1812. }
  1813. if (do_ring_perf_limit_reasons) {
  1814. get_msr(cpu, MSR_RING_PERF_LIMIT_REASONS, &msr);
  1815. fprintf(stderr, "cpu%d: MSR_RING_PERF_LIMIT_REASONS, 0x%08llx", cpu, msr);
  1816. fprintf(stderr, " (Active: %s%s%s%s%s%s)",
  1817. (msr & 1 << 0) ? "PROCHOT, " : "",
  1818. (msr & 1 << 1) ? "ThermStatus, " : "",
  1819. (msr & 1 << 6) ? "VR-Therm, " : "",
  1820. (msr & 1 << 8) ? "Amps, " : "",
  1821. (msr & 1 << 10) ? "PkgPwrL1, " : "",
  1822. (msr & 1 << 11) ? "PkgPwrL2, " : "");
  1823. fprintf(stderr, " (Logged: %s%s%s%s%s%s)\n",
  1824. (msr & 1 << 16) ? "PROCHOT, " : "",
  1825. (msr & 1 << 17) ? "ThermStatus, " : "",
  1826. (msr & 1 << 22) ? "VR-Therm, " : "",
  1827. (msr & 1 << 24) ? "Amps, " : "",
  1828. (msr & 1 << 26) ? "PkgPwrL1, " : "",
  1829. (msr & 1 << 27) ? "PkgPwrL2, " : "");
  1830. }
  1831. return 0;
  1832. }
  1833. #define RAPL_POWER_GRANULARITY 0x7FFF /* 15 bit power granularity */
  1834. #define RAPL_TIME_GRANULARITY 0x3F /* 6 bit time granularity */
  1835. double get_tdp(model)
  1836. {
  1837. unsigned long long msr;
  1838. if (do_rapl & RAPL_PKG_POWER_INFO)
  1839. if (!get_msr(base_cpu, MSR_PKG_POWER_INFO, &msr))
  1840. return ((msr >> 0) & RAPL_POWER_GRANULARITY) * rapl_power_units;
  1841. switch (model) {
  1842. case 0x37:
  1843. case 0x4D:
  1844. return 30.0;
  1845. default:
  1846. return 135.0;
  1847. }
  1848. }
  1849. /*
  1850. * rapl_dram_energy_units_probe()
  1851. * Energy units are either hard-coded, or come from RAPL Energy Unit MSR.
  1852. */
  1853. static double
  1854. rapl_dram_energy_units_probe(int model, double rapl_energy_units)
  1855. {
  1856. /* only called for genuine_intel, family 6 */
  1857. switch (model) {
  1858. case 0x3F: /* HSX */
  1859. case 0x4F: /* BDX */
  1860. case 0x56: /* BDX-DE */
  1861. case 0x57: /* KNL */
  1862. return (rapl_dram_energy_units = 15.3 / 1000000);
  1863. default:
  1864. return (rapl_energy_units);
  1865. }
  1866. }
  1867. /*
  1868. * rapl_probe()
  1869. *
  1870. * sets do_rapl, rapl_power_units, rapl_energy_units, rapl_time_units
  1871. */
  1872. void rapl_probe(unsigned int family, unsigned int model)
  1873. {
  1874. unsigned long long msr;
  1875. unsigned int time_unit;
  1876. double tdp;
  1877. if (!genuine_intel)
  1878. return;
  1879. if (family != 6)
  1880. return;
  1881. switch (model) {
  1882. case 0x2A:
  1883. case 0x3A:
  1884. case 0x3C: /* HSW */
  1885. case 0x45: /* HSW */
  1886. case 0x46: /* HSW */
  1887. case 0x3D: /* BDW */
  1888. case 0x47: /* BDW */
  1889. do_rapl = RAPL_PKG | RAPL_CORES | RAPL_CORE_POLICY | RAPL_GFX | RAPL_PKG_POWER_INFO;
  1890. break;
  1891. case 0x4E: /* SKL */
  1892. case 0x5E: /* SKL */
  1893. do_rapl = RAPL_PKG | RAPL_DRAM | RAPL_DRAM_PERF_STATUS | RAPL_PKG_PERF_STATUS | RAPL_PKG_POWER_INFO;
  1894. break;
  1895. case 0x3F: /* HSX */
  1896. case 0x4F: /* BDX */
  1897. case 0x56: /* BDX-DE */
  1898. case 0x57: /* KNL */
  1899. do_rapl = RAPL_PKG | RAPL_DRAM | RAPL_DRAM_POWER_INFO | RAPL_DRAM_PERF_STATUS | RAPL_PKG_PERF_STATUS | RAPL_PKG_POWER_INFO;
  1900. break;
  1901. case 0x2D:
  1902. case 0x3E:
  1903. do_rapl = RAPL_PKG | RAPL_CORES | RAPL_CORE_POLICY | RAPL_DRAM | RAPL_DRAM_POWER_INFO | RAPL_PKG_PERF_STATUS | RAPL_DRAM_PERF_STATUS | RAPL_PKG_POWER_INFO;
  1904. break;
  1905. case 0x37: /* BYT */
  1906. case 0x4D: /* AVN */
  1907. do_rapl = RAPL_PKG | RAPL_CORES ;
  1908. break;
  1909. default:
  1910. return;
  1911. }
  1912. /* units on package 0, verify later other packages match */
  1913. if (get_msr(base_cpu, MSR_RAPL_POWER_UNIT, &msr))
  1914. return;
  1915. rapl_power_units = 1.0 / (1 << (msr & 0xF));
  1916. if (model == 0x37)
  1917. rapl_energy_units = 1.0 * (1 << (msr >> 8 & 0x1F)) / 1000000;
  1918. else
  1919. rapl_energy_units = 1.0 / (1 << (msr >> 8 & 0x1F));
  1920. rapl_dram_energy_units = rapl_dram_energy_units_probe(model, rapl_energy_units);
  1921. time_unit = msr >> 16 & 0xF;
  1922. if (time_unit == 0)
  1923. time_unit = 0xA;
  1924. rapl_time_units = 1.0 / (1 << (time_unit));
  1925. tdp = get_tdp(model);
  1926. rapl_joule_counter_range = 0xFFFFFFFF * rapl_energy_units / tdp;
  1927. if (debug)
  1928. fprintf(stderr, "RAPL: %.0f sec. Joule Counter Range, at %.0f Watts\n", rapl_joule_counter_range, tdp);
  1929. return;
  1930. }
  1931. void perf_limit_reasons_probe(family, model)
  1932. {
  1933. if (!genuine_intel)
  1934. return;
  1935. if (family != 6)
  1936. return;
  1937. switch (model) {
  1938. case 0x3C: /* HSW */
  1939. case 0x45: /* HSW */
  1940. case 0x46: /* HSW */
  1941. do_gfx_perf_limit_reasons = 1;
  1942. case 0x3F: /* HSX */
  1943. do_core_perf_limit_reasons = 1;
  1944. do_ring_perf_limit_reasons = 1;
  1945. default:
  1946. return;
  1947. }
  1948. }
  1949. int print_thermal(struct thread_data *t, struct core_data *c, struct pkg_data *p)
  1950. {
  1951. unsigned long long msr;
  1952. unsigned int dts;
  1953. int cpu;
  1954. if (!(do_dts || do_ptm))
  1955. return 0;
  1956. cpu = t->cpu_id;
  1957. /* DTS is per-core, no need to print for each thread */
  1958. if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
  1959. return 0;
  1960. if (cpu_migrate(cpu)) {
  1961. fprintf(stderr, "Could not migrate to CPU %d\n", cpu);
  1962. return -1;
  1963. }
  1964. if (do_ptm && (t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE)) {
  1965. if (get_msr(cpu, MSR_IA32_PACKAGE_THERM_STATUS, &msr))
  1966. return 0;
  1967. dts = (msr >> 16) & 0x7F;
  1968. fprintf(stderr, "cpu%d: MSR_IA32_PACKAGE_THERM_STATUS: 0x%08llx (%d C)\n",
  1969. cpu, msr, tcc_activation_temp - dts);
  1970. #ifdef THERM_DEBUG
  1971. if (get_msr(cpu, MSR_IA32_PACKAGE_THERM_INTERRUPT, &msr))
  1972. return 0;
  1973. dts = (msr >> 16) & 0x7F;
  1974. dts2 = (msr >> 8) & 0x7F;
  1975. fprintf(stderr, "cpu%d: MSR_IA32_PACKAGE_THERM_INTERRUPT: 0x%08llx (%d C, %d C)\n",
  1976. cpu, msr, tcc_activation_temp - dts, tcc_activation_temp - dts2);
  1977. #endif
  1978. }
  1979. if (do_dts) {
  1980. unsigned int resolution;
  1981. if (get_msr(cpu, MSR_IA32_THERM_STATUS, &msr))
  1982. return 0;
  1983. dts = (msr >> 16) & 0x7F;
  1984. resolution = (msr >> 27) & 0xF;
  1985. fprintf(stderr, "cpu%d: MSR_IA32_THERM_STATUS: 0x%08llx (%d C +/- %d)\n",
  1986. cpu, msr, tcc_activation_temp - dts, resolution);
  1987. #ifdef THERM_DEBUG
  1988. if (get_msr(cpu, MSR_IA32_THERM_INTERRUPT, &msr))
  1989. return 0;
  1990. dts = (msr >> 16) & 0x7F;
  1991. dts2 = (msr >> 8) & 0x7F;
  1992. fprintf(stderr, "cpu%d: MSR_IA32_THERM_INTERRUPT: 0x%08llx (%d C, %d C)\n",
  1993. cpu, msr, tcc_activation_temp - dts, tcc_activation_temp - dts2);
  1994. #endif
  1995. }
  1996. return 0;
  1997. }
  1998. void print_power_limit_msr(int cpu, unsigned long long msr, char *label)
  1999. {
  2000. fprintf(stderr, "cpu%d: %s: %sabled (%f Watts, %f sec, clamp %sabled)\n",
  2001. cpu, label,
  2002. ((msr >> 15) & 1) ? "EN" : "DIS",
  2003. ((msr >> 0) & 0x7FFF) * rapl_power_units,
  2004. (1.0 + (((msr >> 22) & 0x3)/4.0)) * (1 << ((msr >> 17) & 0x1F)) * rapl_time_units,
  2005. (((msr >> 16) & 1) ? "EN" : "DIS"));
  2006. return;
  2007. }
  2008. int print_rapl(struct thread_data *t, struct core_data *c, struct pkg_data *p)
  2009. {
  2010. unsigned long long msr;
  2011. int cpu;
  2012. if (!do_rapl)
  2013. return 0;
  2014. /* RAPL counters are per package, so print only for 1st thread/package */
  2015. if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE) || !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
  2016. return 0;
  2017. cpu = t->cpu_id;
  2018. if (cpu_migrate(cpu)) {
  2019. fprintf(stderr, "Could not migrate to CPU %d\n", cpu);
  2020. return -1;
  2021. }
  2022. if (get_msr(cpu, MSR_RAPL_POWER_UNIT, &msr))
  2023. return -1;
  2024. if (debug) {
  2025. fprintf(stderr, "cpu%d: MSR_RAPL_POWER_UNIT: 0x%08llx "
  2026. "(%f Watts, %f Joules, %f sec.)\n", cpu, msr,
  2027. rapl_power_units, rapl_energy_units, rapl_time_units);
  2028. }
  2029. if (do_rapl & RAPL_PKG_POWER_INFO) {
  2030. if (get_msr(cpu, MSR_PKG_POWER_INFO, &msr))
  2031. return -5;
  2032. fprintf(stderr, "cpu%d: MSR_PKG_POWER_INFO: 0x%08llx (%.0f W TDP, RAPL %.0f - %.0f W, %f sec.)\n",
  2033. cpu, msr,
  2034. ((msr >> 0) & RAPL_POWER_GRANULARITY) * rapl_power_units,
  2035. ((msr >> 16) & RAPL_POWER_GRANULARITY) * rapl_power_units,
  2036. ((msr >> 32) & RAPL_POWER_GRANULARITY) * rapl_power_units,
  2037. ((msr >> 48) & RAPL_TIME_GRANULARITY) * rapl_time_units);
  2038. }
  2039. if (do_rapl & RAPL_PKG) {
  2040. if (get_msr(cpu, MSR_PKG_POWER_LIMIT, &msr))
  2041. return -9;
  2042. fprintf(stderr, "cpu%d: MSR_PKG_POWER_LIMIT: 0x%08llx (%slocked)\n",
  2043. cpu, msr, (msr >> 63) & 1 ? "": "UN");
  2044. print_power_limit_msr(cpu, msr, "PKG Limit #1");
  2045. fprintf(stderr, "cpu%d: PKG Limit #2: %sabled (%f Watts, %f* sec, clamp %sabled)\n",
  2046. cpu,
  2047. ((msr >> 47) & 1) ? "EN" : "DIS",
  2048. ((msr >> 32) & 0x7FFF) * rapl_power_units,
  2049. (1.0 + (((msr >> 54) & 0x3)/4.0)) * (1 << ((msr >> 49) & 0x1F)) * rapl_time_units,
  2050. ((msr >> 48) & 1) ? "EN" : "DIS");
  2051. }
  2052. if (do_rapl & RAPL_DRAM_POWER_INFO) {
  2053. if (get_msr(cpu, MSR_DRAM_POWER_INFO, &msr))
  2054. return -6;
  2055. fprintf(stderr, "cpu%d: MSR_DRAM_POWER_INFO,: 0x%08llx (%.0f W TDP, RAPL %.0f - %.0f W, %f sec.)\n",
  2056. cpu, msr,
  2057. ((msr >> 0) & RAPL_POWER_GRANULARITY) * rapl_power_units,
  2058. ((msr >> 16) & RAPL_POWER_GRANULARITY) * rapl_power_units,
  2059. ((msr >> 32) & RAPL_POWER_GRANULARITY) * rapl_power_units,
  2060. ((msr >> 48) & RAPL_TIME_GRANULARITY) * rapl_time_units);
  2061. }
  2062. if (do_rapl & RAPL_DRAM) {
  2063. if (get_msr(cpu, MSR_DRAM_POWER_LIMIT, &msr))
  2064. return -9;
  2065. fprintf(stderr, "cpu%d: MSR_DRAM_POWER_LIMIT: 0x%08llx (%slocked)\n",
  2066. cpu, msr, (msr >> 31) & 1 ? "": "UN");
  2067. print_power_limit_msr(cpu, msr, "DRAM Limit");
  2068. }
  2069. if (do_rapl & RAPL_CORE_POLICY) {
  2070. if (debug) {
  2071. if (get_msr(cpu, MSR_PP0_POLICY, &msr))
  2072. return -7;
  2073. fprintf(stderr, "cpu%d: MSR_PP0_POLICY: %lld\n", cpu, msr & 0xF);
  2074. }
  2075. }
  2076. if (do_rapl & RAPL_CORES) {
  2077. if (debug) {
  2078. if (get_msr(cpu, MSR_PP0_POWER_LIMIT, &msr))
  2079. return -9;
  2080. fprintf(stderr, "cpu%d: MSR_PP0_POWER_LIMIT: 0x%08llx (%slocked)\n",
  2081. cpu, msr, (msr >> 31) & 1 ? "": "UN");
  2082. print_power_limit_msr(cpu, msr, "Cores Limit");
  2083. }
  2084. }
  2085. if (do_rapl & RAPL_GFX) {
  2086. if (debug) {
  2087. if (get_msr(cpu, MSR_PP1_POLICY, &msr))
  2088. return -8;
  2089. fprintf(stderr, "cpu%d: MSR_PP1_POLICY: %lld\n", cpu, msr & 0xF);
  2090. if (get_msr(cpu, MSR_PP1_POWER_LIMIT, &msr))
  2091. return -9;
  2092. fprintf(stderr, "cpu%d: MSR_PP1_POWER_LIMIT: 0x%08llx (%slocked)\n",
  2093. cpu, msr, (msr >> 31) & 1 ? "": "UN");
  2094. print_power_limit_msr(cpu, msr, "GFX Limit");
  2095. }
  2096. }
  2097. return 0;
  2098. }
  2099. /*
  2100. * SNB adds support for additional MSRs:
  2101. *
  2102. * MSR_PKG_C7_RESIDENCY 0x000003fa
  2103. * MSR_CORE_C7_RESIDENCY 0x000003fe
  2104. * MSR_PKG_C2_RESIDENCY 0x0000060d
  2105. */
  2106. int has_snb_msrs(unsigned int family, unsigned int model)
  2107. {
  2108. if (!genuine_intel)
  2109. return 0;
  2110. switch (model) {
  2111. case 0x2A:
  2112. case 0x2D:
  2113. case 0x3A: /* IVB */
  2114. case 0x3E: /* IVB Xeon */
  2115. case 0x3C: /* HSW */
  2116. case 0x3F: /* HSW */
  2117. case 0x45: /* HSW */
  2118. case 0x46: /* HSW */
  2119. case 0x3D: /* BDW */
  2120. case 0x47: /* BDW */
  2121. case 0x4F: /* BDX */
  2122. case 0x56: /* BDX-DE */
  2123. case 0x4E: /* SKL */
  2124. case 0x5E: /* SKL */
  2125. return 1;
  2126. }
  2127. return 0;
  2128. }
  2129. /*
  2130. * HSW adds support for additional MSRs:
  2131. *
  2132. * MSR_PKG_C8_RESIDENCY 0x00000630
  2133. * MSR_PKG_C9_RESIDENCY 0x00000631
  2134. * MSR_PKG_C10_RESIDENCY 0x00000632
  2135. */
  2136. int has_hsw_msrs(unsigned int family, unsigned int model)
  2137. {
  2138. if (!genuine_intel)
  2139. return 0;
  2140. switch (model) {
  2141. case 0x45: /* HSW */
  2142. case 0x3D: /* BDW */
  2143. case 0x4E: /* SKL */
  2144. case 0x5E: /* SKL */
  2145. return 1;
  2146. }
  2147. return 0;
  2148. }
  2149. /*
  2150. * SKL adds support for additional MSRS:
  2151. *
  2152. * MSR_PKG_WEIGHTED_CORE_C0_RES 0x00000658
  2153. * MSR_PKG_ANY_CORE_C0_RES 0x00000659
  2154. * MSR_PKG_ANY_GFXE_C0_RES 0x0000065A
  2155. * MSR_PKG_BOTH_CORE_GFXE_C0_RES 0x0000065B
  2156. */
  2157. int has_skl_msrs(unsigned int family, unsigned int model)
  2158. {
  2159. if (!genuine_intel)
  2160. return 0;
  2161. switch (model) {
  2162. case 0x4E: /* SKL */
  2163. case 0x5E: /* SKL */
  2164. return 1;
  2165. }
  2166. return 0;
  2167. }
  2168. int is_slm(unsigned int family, unsigned int model)
  2169. {
  2170. if (!genuine_intel)
  2171. return 0;
  2172. switch (model) {
  2173. case 0x37: /* BYT */
  2174. case 0x4D: /* AVN */
  2175. return 1;
  2176. }
  2177. return 0;
  2178. }
  2179. int is_knl(unsigned int family, unsigned int model)
  2180. {
  2181. if (!genuine_intel)
  2182. return 0;
  2183. switch (model) {
  2184. case 0x57: /* KNL */
  2185. return 1;
  2186. }
  2187. return 0;
  2188. }
  2189. unsigned int get_aperf_mperf_multiplier(unsigned int family, unsigned int model)
  2190. {
  2191. if (is_knl(family, model))
  2192. return 1024;
  2193. return 1;
  2194. }
  2195. #define SLM_BCLK_FREQS 5
  2196. double slm_freq_table[SLM_BCLK_FREQS] = { 83.3, 100.0, 133.3, 116.7, 80.0};
  2197. double slm_bclk(void)
  2198. {
  2199. unsigned long long msr = 3;
  2200. unsigned int i;
  2201. double freq;
  2202. if (get_msr(base_cpu, MSR_FSB_FREQ, &msr))
  2203. fprintf(stderr, "SLM BCLK: unknown\n");
  2204. i = msr & 0xf;
  2205. if (i >= SLM_BCLK_FREQS) {
  2206. fprintf(stderr, "SLM BCLK[%d] invalid\n", i);
  2207. msr = 3;
  2208. }
  2209. freq = slm_freq_table[i];
  2210. fprintf(stderr, "SLM BCLK: %.1f Mhz\n", freq);
  2211. return freq;
  2212. }
  2213. double discover_bclk(unsigned int family, unsigned int model)
  2214. {
  2215. if (has_snb_msrs(family, model))
  2216. return 100.00;
  2217. else if (is_slm(family, model))
  2218. return slm_bclk();
  2219. else
  2220. return 133.33;
  2221. }
  2222. /*
  2223. * MSR_IA32_TEMPERATURE_TARGET indicates the temperature where
  2224. * the Thermal Control Circuit (TCC) activates.
  2225. * This is usually equal to tjMax.
  2226. *
  2227. * Older processors do not have this MSR, so there we guess,
  2228. * but also allow cmdline over-ride with -T.
  2229. *
  2230. * Several MSR temperature values are in units of degrees-C
  2231. * below this value, including the Digital Thermal Sensor (DTS),
  2232. * Package Thermal Management Sensor (PTM), and thermal event thresholds.
  2233. */
  2234. int set_temperature_target(struct thread_data *t, struct core_data *c, struct pkg_data *p)
  2235. {
  2236. unsigned long long msr;
  2237. unsigned int target_c_local;
  2238. int cpu;
  2239. /* tcc_activation_temp is used only for dts or ptm */
  2240. if (!(do_dts || do_ptm))
  2241. return 0;
  2242. /* this is a per-package concept */
  2243. if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE) || !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
  2244. return 0;
  2245. cpu = t->cpu_id;
  2246. if (cpu_migrate(cpu)) {
  2247. fprintf(stderr, "Could not migrate to CPU %d\n", cpu);
  2248. return -1;
  2249. }
  2250. if (tcc_activation_temp_override != 0) {
  2251. tcc_activation_temp = tcc_activation_temp_override;
  2252. fprintf(stderr, "cpu%d: Using cmdline TCC Target (%d C)\n",
  2253. cpu, tcc_activation_temp);
  2254. return 0;
  2255. }
  2256. /* Temperature Target MSR is Nehalem and newer only */
  2257. if (!do_nhm_platform_info)
  2258. goto guess;
  2259. if (get_msr(base_cpu, MSR_IA32_TEMPERATURE_TARGET, &msr))
  2260. goto guess;
  2261. target_c_local = (msr >> 16) & 0xFF;
  2262. if (debug)
  2263. fprintf(stderr, "cpu%d: MSR_IA32_TEMPERATURE_TARGET: 0x%08llx (%d C)\n",
  2264. cpu, msr, target_c_local);
  2265. if (!target_c_local)
  2266. goto guess;
  2267. tcc_activation_temp = target_c_local;
  2268. return 0;
  2269. guess:
  2270. tcc_activation_temp = TJMAX_DEFAULT;
  2271. fprintf(stderr, "cpu%d: Guessing tjMax %d C, Please use -T to specify\n",
  2272. cpu, tcc_activation_temp);
  2273. return 0;
  2274. }
  2275. void process_cpuid()
  2276. {
  2277. unsigned int eax, ebx, ecx, edx, max_level;
  2278. unsigned int fms, family, model, stepping;
  2279. eax = ebx = ecx = edx = 0;
  2280. __get_cpuid(0, &max_level, &ebx, &ecx, &edx);
  2281. if (ebx == 0x756e6547 && edx == 0x49656e69 && ecx == 0x6c65746e)
  2282. genuine_intel = 1;
  2283. if (debug)
  2284. fprintf(stderr, "CPUID(0): %.4s%.4s%.4s ",
  2285. (char *)&ebx, (char *)&edx, (char *)&ecx);
  2286. __get_cpuid(1, &fms, &ebx, &ecx, &edx);
  2287. family = (fms >> 8) & 0xf;
  2288. model = (fms >> 4) & 0xf;
  2289. stepping = fms & 0xf;
  2290. if (family == 6 || family == 0xf)
  2291. model += ((fms >> 16) & 0xf) << 4;
  2292. if (debug)
  2293. fprintf(stderr, "%d CPUID levels; family:model:stepping 0x%x:%x:%x (%d:%d:%d)\n",
  2294. max_level, family, model, stepping, family, model, stepping);
  2295. if (!(edx & (1 << 5)))
  2296. errx(1, "CPUID: no MSR");
  2297. /*
  2298. * check max extended function levels of CPUID.
  2299. * This is needed to check for invariant TSC.
  2300. * This check is valid for both Intel and AMD.
  2301. */
  2302. ebx = ecx = edx = 0;
  2303. __get_cpuid(0x80000000, &max_level, &ebx, &ecx, &edx);
  2304. if (max_level >= 0x80000007) {
  2305. /*
  2306. * Non-Stop TSC is advertised by CPUID.EAX=0x80000007: EDX.bit8
  2307. * this check is valid for both Intel and AMD
  2308. */
  2309. __get_cpuid(0x80000007, &eax, &ebx, &ecx, &edx);
  2310. has_invariant_tsc = edx & (1 << 8);
  2311. }
  2312. /*
  2313. * APERF/MPERF is advertised by CPUID.EAX=0x6: ECX.bit0
  2314. * this check is valid for both Intel and AMD
  2315. */
  2316. __get_cpuid(0x6, &eax, &ebx, &ecx, &edx);
  2317. has_aperf = ecx & (1 << 0);
  2318. do_dts = eax & (1 << 0);
  2319. do_ptm = eax & (1 << 6);
  2320. has_epb = ecx & (1 << 3);
  2321. if (debug)
  2322. fprintf(stderr, "CPUID(6): %sAPERF, %sDTS, %sPTM, %sEPB\n",
  2323. has_aperf ? "" : "No ",
  2324. do_dts ? "" : "No ",
  2325. do_ptm ? "" : "No ",
  2326. has_epb ? "" : "No ");
  2327. if (max_level > 0x15) {
  2328. unsigned int eax_crystal;
  2329. unsigned int ebx_tsc;
  2330. /*
  2331. * CPUID 15H TSC/Crystal ratio, possibly Crystal Hz
  2332. */
  2333. eax_crystal = ebx_tsc = crystal_hz = edx = 0;
  2334. __get_cpuid(0x15, &eax_crystal, &ebx_tsc, &crystal_hz, &edx);
  2335. if (ebx_tsc != 0) {
  2336. if (debug && (ebx != 0))
  2337. fprintf(stderr, "CPUID(0x15): eax_crystal: %d ebx_tsc: %d ecx_crystal_hz: %d\n",
  2338. eax_crystal, ebx_tsc, crystal_hz);
  2339. if (crystal_hz == 0)
  2340. switch(model) {
  2341. case 0x4E: /* SKL */
  2342. case 0x5E: /* SKL */
  2343. crystal_hz = 24000000; /* 24 MHz */
  2344. break;
  2345. default:
  2346. crystal_hz = 0;
  2347. }
  2348. if (crystal_hz) {
  2349. tsc_hz = (unsigned long long) crystal_hz * ebx_tsc / eax_crystal;
  2350. if (debug)
  2351. fprintf(stderr, "TSC: %lld MHz (%d Hz * %d / %d / 1000000)\n",
  2352. tsc_hz / 1000000, crystal_hz, ebx_tsc, eax_crystal);
  2353. }
  2354. }
  2355. }
  2356. if (has_aperf)
  2357. aperf_mperf_multiplier = get_aperf_mperf_multiplier(family, model);
  2358. do_nhm_platform_info = do_nhm_cstates = do_smi = probe_nhm_msrs(family, model);
  2359. do_snb_cstates = has_snb_msrs(family, model);
  2360. do_pc2 = do_snb_cstates && (pkg_cstate_limit >= PCL__2);
  2361. do_pc3 = (pkg_cstate_limit >= PCL__3);
  2362. do_pc6 = (pkg_cstate_limit >= PCL__6);
  2363. do_pc7 = do_snb_cstates && (pkg_cstate_limit >= PCL__7);
  2364. do_c8_c9_c10 = has_hsw_msrs(family, model);
  2365. do_skl_residency = has_skl_msrs(family, model);
  2366. do_slm_cstates = is_slm(family, model);
  2367. do_knl_cstates = is_knl(family, model);
  2368. bclk = discover_bclk(family, model);
  2369. rapl_probe(family, model);
  2370. perf_limit_reasons_probe(family, model);
  2371. if (debug)
  2372. dump_cstate_pstate_config_info();
  2373. if (has_skl_msrs(family, model))
  2374. calculate_tsc_tweak();
  2375. return;
  2376. }
  2377. void help()
  2378. {
  2379. fprintf(stderr,
  2380. "Usage: turbostat [OPTIONS][(--interval seconds) | COMMAND ...]\n"
  2381. "\n"
  2382. "Turbostat forks the specified COMMAND and prints statistics\n"
  2383. "when COMMAND completes.\n"
  2384. "If no COMMAND is specified, turbostat wakes every 5-seconds\n"
  2385. "to print statistics, until interrupted.\n"
  2386. "--debug run in \"debug\" mode\n"
  2387. "--interval sec Override default 5-second measurement interval\n"
  2388. "--help print this help message\n"
  2389. "--counter msr print 32-bit counter at address \"msr\"\n"
  2390. "--Counter msr print 64-bit Counter at address \"msr\"\n"
  2391. "--msr msr print 32-bit value at address \"msr\"\n"
  2392. "--MSR msr print 64-bit Value at address \"msr\"\n"
  2393. "--version print version information\n"
  2394. "\n"
  2395. "For more help, run \"man turbostat\"\n");
  2396. }
  2397. /*
  2398. * in /dev/cpu/ return success for names that are numbers
  2399. * ie. filter out ".", "..", "microcode".
  2400. */
  2401. int dir_filter(const struct dirent *dirp)
  2402. {
  2403. if (isdigit(dirp->d_name[0]))
  2404. return 1;
  2405. else
  2406. return 0;
  2407. }
  2408. int open_dev_cpu_msr(int dummy1)
  2409. {
  2410. return 0;
  2411. }
  2412. void topology_probe()
  2413. {
  2414. int i;
  2415. int max_core_id = 0;
  2416. int max_package_id = 0;
  2417. int max_siblings = 0;
  2418. struct cpu_topology {
  2419. int core_id;
  2420. int physical_package_id;
  2421. } *cpus;
  2422. /* Initialize num_cpus, max_cpu_num */
  2423. topo.num_cpus = 0;
  2424. topo.max_cpu_num = 0;
  2425. for_all_proc_cpus(count_cpus);
  2426. if (!summary_only && topo.num_cpus > 1)
  2427. show_cpu = 1;
  2428. if (debug > 1)
  2429. fprintf(stderr, "num_cpus %d max_cpu_num %d\n", topo.num_cpus, topo.max_cpu_num);
  2430. cpus = calloc(1, (topo.max_cpu_num + 1) * sizeof(struct cpu_topology));
  2431. if (cpus == NULL)
  2432. err(1, "calloc cpus");
  2433. /*
  2434. * Allocate and initialize cpu_present_set
  2435. */
  2436. cpu_present_set = CPU_ALLOC((topo.max_cpu_num + 1));
  2437. if (cpu_present_set == NULL)
  2438. err(3, "CPU_ALLOC");
  2439. cpu_present_setsize = CPU_ALLOC_SIZE((topo.max_cpu_num + 1));
  2440. CPU_ZERO_S(cpu_present_setsize, cpu_present_set);
  2441. for_all_proc_cpus(mark_cpu_present);
  2442. /*
  2443. * Allocate and initialize cpu_affinity_set
  2444. */
  2445. cpu_affinity_set = CPU_ALLOC((topo.max_cpu_num + 1));
  2446. if (cpu_affinity_set == NULL)
  2447. err(3, "CPU_ALLOC");
  2448. cpu_affinity_setsize = CPU_ALLOC_SIZE((topo.max_cpu_num + 1));
  2449. CPU_ZERO_S(cpu_affinity_setsize, cpu_affinity_set);
  2450. /*
  2451. * For online cpus
  2452. * find max_core_id, max_package_id
  2453. */
  2454. for (i = 0; i <= topo.max_cpu_num; ++i) {
  2455. int siblings;
  2456. if (cpu_is_not_present(i)) {
  2457. if (debug > 1)
  2458. fprintf(stderr, "cpu%d NOT PRESENT\n", i);
  2459. continue;
  2460. }
  2461. cpus[i].core_id = get_core_id(i);
  2462. if (cpus[i].core_id > max_core_id)
  2463. max_core_id = cpus[i].core_id;
  2464. cpus[i].physical_package_id = get_physical_package_id(i);
  2465. if (cpus[i].physical_package_id > max_package_id)
  2466. max_package_id = cpus[i].physical_package_id;
  2467. siblings = get_num_ht_siblings(i);
  2468. if (siblings > max_siblings)
  2469. max_siblings = siblings;
  2470. if (debug > 1)
  2471. fprintf(stderr, "cpu %d pkg %d core %d\n",
  2472. i, cpus[i].physical_package_id, cpus[i].core_id);
  2473. }
  2474. topo.num_cores_per_pkg = max_core_id + 1;
  2475. if (debug > 1)
  2476. fprintf(stderr, "max_core_id %d, sizing for %d cores per package\n",
  2477. max_core_id, topo.num_cores_per_pkg);
  2478. if (debug && !summary_only && topo.num_cores_per_pkg > 1)
  2479. show_core = 1;
  2480. topo.num_packages = max_package_id + 1;
  2481. if (debug > 1)
  2482. fprintf(stderr, "max_package_id %d, sizing for %d packages\n",
  2483. max_package_id, topo.num_packages);
  2484. if (debug && !summary_only && topo.num_packages > 1)
  2485. show_pkg = 1;
  2486. topo.num_threads_per_core = max_siblings;
  2487. if (debug > 1)
  2488. fprintf(stderr, "max_siblings %d\n", max_siblings);
  2489. free(cpus);
  2490. }
  2491. void
  2492. allocate_counters(struct thread_data **t, struct core_data **c, struct pkg_data **p)
  2493. {
  2494. int i;
  2495. *t = calloc(topo.num_threads_per_core * topo.num_cores_per_pkg *
  2496. topo.num_packages, sizeof(struct thread_data));
  2497. if (*t == NULL)
  2498. goto error;
  2499. for (i = 0; i < topo.num_threads_per_core *
  2500. topo.num_cores_per_pkg * topo.num_packages; i++)
  2501. (*t)[i].cpu_id = -1;
  2502. *c = calloc(topo.num_cores_per_pkg * topo.num_packages,
  2503. sizeof(struct core_data));
  2504. if (*c == NULL)
  2505. goto error;
  2506. for (i = 0; i < topo.num_cores_per_pkg * topo.num_packages; i++)
  2507. (*c)[i].core_id = -1;
  2508. *p = calloc(topo.num_packages, sizeof(struct pkg_data));
  2509. if (*p == NULL)
  2510. goto error;
  2511. for (i = 0; i < topo.num_packages; i++)
  2512. (*p)[i].package_id = i;
  2513. return;
  2514. error:
  2515. err(1, "calloc counters");
  2516. }
  2517. /*
  2518. * init_counter()
  2519. *
  2520. * set cpu_id, core_num, pkg_num
  2521. * set FIRST_THREAD_IN_CORE and FIRST_CORE_IN_PACKAGE
  2522. *
  2523. * increment topo.num_cores when 1st core in pkg seen
  2524. */
  2525. void init_counter(struct thread_data *thread_base, struct core_data *core_base,
  2526. struct pkg_data *pkg_base, int thread_num, int core_num,
  2527. int pkg_num, int cpu_id)
  2528. {
  2529. struct thread_data *t;
  2530. struct core_data *c;
  2531. struct pkg_data *p;
  2532. t = GET_THREAD(thread_base, thread_num, core_num, pkg_num);
  2533. c = GET_CORE(core_base, core_num, pkg_num);
  2534. p = GET_PKG(pkg_base, pkg_num);
  2535. t->cpu_id = cpu_id;
  2536. if (thread_num == 0) {
  2537. t->flags |= CPU_IS_FIRST_THREAD_IN_CORE;
  2538. if (cpu_is_first_core_in_package(cpu_id))
  2539. t->flags |= CPU_IS_FIRST_CORE_IN_PACKAGE;
  2540. }
  2541. c->core_id = core_num;
  2542. p->package_id = pkg_num;
  2543. }
  2544. int initialize_counters(int cpu_id)
  2545. {
  2546. int my_thread_id, my_core_id, my_package_id;
  2547. my_package_id = get_physical_package_id(cpu_id);
  2548. my_core_id = get_core_id(cpu_id);
  2549. my_thread_id = get_cpu_position_in_core(cpu_id);
  2550. if (!my_thread_id)
  2551. topo.num_cores++;
  2552. init_counter(EVEN_COUNTERS, my_thread_id, my_core_id, my_package_id, cpu_id);
  2553. init_counter(ODD_COUNTERS, my_thread_id, my_core_id, my_package_id, cpu_id);
  2554. return 0;
  2555. }
  2556. void allocate_output_buffer()
  2557. {
  2558. output_buffer = calloc(1, (1 + topo.num_cpus) * 1024);
  2559. outp = output_buffer;
  2560. if (outp == NULL)
  2561. err(-1, "calloc output buffer");
  2562. }
  2563. void setup_all_buffers(void)
  2564. {
  2565. topology_probe();
  2566. allocate_counters(&thread_even, &core_even, &package_even);
  2567. allocate_counters(&thread_odd, &core_odd, &package_odd);
  2568. allocate_output_buffer();
  2569. for_all_proc_cpus(initialize_counters);
  2570. }
  2571. void set_base_cpu(void)
  2572. {
  2573. base_cpu = sched_getcpu();
  2574. if (base_cpu < 0)
  2575. err(-ENODEV, "No valid cpus found");
  2576. if (debug > 1)
  2577. fprintf(stderr, "base_cpu = %d\n", base_cpu);
  2578. }
  2579. void turbostat_init()
  2580. {
  2581. setup_all_buffers();
  2582. set_base_cpu();
  2583. check_dev_msr();
  2584. check_permissions();
  2585. process_cpuid();
  2586. if (debug)
  2587. for_all_cpus(print_epb, ODD_COUNTERS);
  2588. if (debug)
  2589. for_all_cpus(print_perf_limit, ODD_COUNTERS);
  2590. if (debug)
  2591. for_all_cpus(print_rapl, ODD_COUNTERS);
  2592. for_all_cpus(set_temperature_target, ODD_COUNTERS);
  2593. if (debug)
  2594. for_all_cpus(print_thermal, ODD_COUNTERS);
  2595. }
  2596. int fork_it(char **argv)
  2597. {
  2598. pid_t child_pid;
  2599. int status;
  2600. status = for_all_cpus(get_counters, EVEN_COUNTERS);
  2601. if (status)
  2602. exit(status);
  2603. /* clear affinity side-effect of get_counters() */
  2604. sched_setaffinity(0, cpu_present_setsize, cpu_present_set);
  2605. gettimeofday(&tv_even, (struct timezone *)NULL);
  2606. child_pid = fork();
  2607. if (!child_pid) {
  2608. /* child */
  2609. execvp(argv[0], argv);
  2610. } else {
  2611. /* parent */
  2612. if (child_pid == -1)
  2613. err(1, "fork");
  2614. signal(SIGINT, SIG_IGN);
  2615. signal(SIGQUIT, SIG_IGN);
  2616. if (waitpid(child_pid, &status, 0) == -1)
  2617. err(status, "waitpid");
  2618. }
  2619. /*
  2620. * n.b. fork_it() does not check for errors from for_all_cpus()
  2621. * because re-starting is problematic when forking
  2622. */
  2623. for_all_cpus(get_counters, ODD_COUNTERS);
  2624. gettimeofday(&tv_odd, (struct timezone *)NULL);
  2625. timersub(&tv_odd, &tv_even, &tv_delta);
  2626. for_all_cpus_2(delta_cpu, ODD_COUNTERS, EVEN_COUNTERS);
  2627. compute_average(EVEN_COUNTERS);
  2628. format_all_counters(EVEN_COUNTERS);
  2629. flush_stderr();
  2630. fprintf(stderr, "%.6f sec\n", tv_delta.tv_sec + tv_delta.tv_usec/1000000.0);
  2631. return status;
  2632. }
  2633. int get_and_dump_counters(void)
  2634. {
  2635. int status;
  2636. status = for_all_cpus(get_counters, ODD_COUNTERS);
  2637. if (status)
  2638. return status;
  2639. status = for_all_cpus(dump_counters, ODD_COUNTERS);
  2640. if (status)
  2641. return status;
  2642. flush_stdout();
  2643. return status;
  2644. }
  2645. void print_version() {
  2646. fprintf(stderr, "turbostat version 4.8 26-Sep, 2015"
  2647. " - Len Brown <lenb@kernel.org>\n");
  2648. }
  2649. void cmdline(int argc, char **argv)
  2650. {
  2651. int opt;
  2652. int option_index = 0;
  2653. static struct option long_options[] = {
  2654. {"Counter", required_argument, 0, 'C'},
  2655. {"counter", required_argument, 0, 'c'},
  2656. {"Dump", no_argument, 0, 'D'},
  2657. {"debug", no_argument, 0, 'd'},
  2658. {"interval", required_argument, 0, 'i'},
  2659. {"help", no_argument, 0, 'h'},
  2660. {"Joules", no_argument, 0, 'J'},
  2661. {"MSR", required_argument, 0, 'M'},
  2662. {"msr", required_argument, 0, 'm'},
  2663. {"Package", no_argument, 0, 'p'},
  2664. {"processor", no_argument, 0, 'p'},
  2665. {"Summary", no_argument, 0, 'S'},
  2666. {"TCC", required_argument, 0, 'T'},
  2667. {"version", no_argument, 0, 'v' },
  2668. {0, 0, 0, 0 }
  2669. };
  2670. progname = argv[0];
  2671. while ((opt = getopt_long_only(argc, argv, "+C:c:Ddhi:JM:m:PpST:v",
  2672. long_options, &option_index)) != -1) {
  2673. switch (opt) {
  2674. case 'C':
  2675. sscanf(optarg, "%x", &extra_delta_offset64);
  2676. break;
  2677. case 'c':
  2678. sscanf(optarg, "%x", &extra_delta_offset32);
  2679. break;
  2680. case 'D':
  2681. dump_only++;
  2682. break;
  2683. case 'd':
  2684. debug++;
  2685. break;
  2686. case 'h':
  2687. default:
  2688. help();
  2689. exit(1);
  2690. case 'i':
  2691. interval_sec = atoi(optarg);
  2692. break;
  2693. case 'J':
  2694. rapl_joules++;
  2695. break;
  2696. case 'M':
  2697. sscanf(optarg, "%x", &extra_msr_offset64);
  2698. break;
  2699. case 'm':
  2700. sscanf(optarg, "%x", &extra_msr_offset32);
  2701. break;
  2702. case 'P':
  2703. show_pkg_only++;
  2704. break;
  2705. case 'p':
  2706. show_core_only++;
  2707. break;
  2708. case 'S':
  2709. summary_only++;
  2710. break;
  2711. case 'T':
  2712. tcc_activation_temp_override = atoi(optarg);
  2713. break;
  2714. case 'v':
  2715. print_version();
  2716. exit(0);
  2717. break;
  2718. }
  2719. }
  2720. }
  2721. int main(int argc, char **argv)
  2722. {
  2723. cmdline(argc, argv);
  2724. if (debug)
  2725. print_version();
  2726. turbostat_init();
  2727. /* dump counters and exit */
  2728. if (dump_only)
  2729. return get_and_dump_counters();
  2730. /*
  2731. * if any params left, it must be a command to fork
  2732. */
  2733. if (argc - optind)
  2734. return fork_it(argv + optind);
  2735. else
  2736. turbostat_loop();
  2737. return 0;
  2738. }