skl-messages.c 23 KB

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  1. /*
  2. * skl-message.c - HDA DSP interface for FW registration, Pipe and Module
  3. * configurations
  4. *
  5. * Copyright (C) 2015 Intel Corp
  6. * Author:Rafal Redzimski <rafal.f.redzimski@intel.com>
  7. * Jeeja KP <jeeja.kp@intel.com>
  8. * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License as version 2, as
  12. * published by the Free Software Foundation.
  13. *
  14. * This program is distributed in the hope that it will be useful, but
  15. * WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  17. * General Public License for more details.
  18. */
  19. #include <linux/slab.h>
  20. #include <linux/pci.h>
  21. #include <sound/core.h>
  22. #include <sound/pcm.h>
  23. #include "skl-sst-dsp.h"
  24. #include "skl-sst-ipc.h"
  25. #include "skl.h"
  26. #include "../common/sst-dsp.h"
  27. #include "../common/sst-dsp-priv.h"
  28. #include "skl-topology.h"
  29. #include "skl-tplg-interface.h"
  30. static int skl_alloc_dma_buf(struct device *dev,
  31. struct snd_dma_buffer *dmab, size_t size)
  32. {
  33. struct hdac_ext_bus *ebus = dev_get_drvdata(dev);
  34. struct hdac_bus *bus = ebus_to_hbus(ebus);
  35. if (!bus)
  36. return -ENODEV;
  37. return bus->io_ops->dma_alloc_pages(bus, SNDRV_DMA_TYPE_DEV, size, dmab);
  38. }
  39. static int skl_free_dma_buf(struct device *dev, struct snd_dma_buffer *dmab)
  40. {
  41. struct hdac_ext_bus *ebus = dev_get_drvdata(dev);
  42. struct hdac_bus *bus = ebus_to_hbus(ebus);
  43. if (!bus)
  44. return -ENODEV;
  45. bus->io_ops->dma_free_pages(bus, dmab);
  46. return 0;
  47. }
  48. int skl_init_dsp(struct skl *skl)
  49. {
  50. void __iomem *mmio_base;
  51. struct hdac_ext_bus *ebus = &skl->ebus;
  52. struct hdac_bus *bus = ebus_to_hbus(ebus);
  53. int irq = bus->irq;
  54. struct skl_dsp_loader_ops loader_ops;
  55. int ret;
  56. loader_ops.alloc_dma_buf = skl_alloc_dma_buf;
  57. loader_ops.free_dma_buf = skl_free_dma_buf;
  58. /* enable ppcap interrupt */
  59. snd_hdac_ext_bus_ppcap_enable(&skl->ebus, true);
  60. snd_hdac_ext_bus_ppcap_int_enable(&skl->ebus, true);
  61. /* read the BAR of the ADSP MMIO */
  62. mmio_base = pci_ioremap_bar(skl->pci, 4);
  63. if (mmio_base == NULL) {
  64. dev_err(bus->dev, "ioremap error\n");
  65. return -ENXIO;
  66. }
  67. ret = skl_sst_dsp_init(bus->dev, mmio_base, irq,
  68. loader_ops, &skl->skl_sst);
  69. dev_dbg(bus->dev, "dsp registration status=%d\n", ret);
  70. return ret;
  71. }
  72. void skl_free_dsp(struct skl *skl)
  73. {
  74. struct hdac_ext_bus *ebus = &skl->ebus;
  75. struct hdac_bus *bus = ebus_to_hbus(ebus);
  76. struct skl_sst *ctx = skl->skl_sst;
  77. /* disable ppcap interrupt */
  78. snd_hdac_ext_bus_ppcap_int_enable(&skl->ebus, false);
  79. skl_sst_dsp_cleanup(bus->dev, ctx);
  80. if (ctx->dsp->addr.lpe)
  81. iounmap(ctx->dsp->addr.lpe);
  82. }
  83. int skl_suspend_dsp(struct skl *skl)
  84. {
  85. struct skl_sst *ctx = skl->skl_sst;
  86. int ret;
  87. /* if ppcap is not supported return 0 */
  88. if (!skl->ebus.ppcap)
  89. return 0;
  90. ret = skl_dsp_sleep(ctx->dsp);
  91. if (ret < 0)
  92. return ret;
  93. /* disable ppcap interrupt */
  94. snd_hdac_ext_bus_ppcap_int_enable(&skl->ebus, false);
  95. snd_hdac_ext_bus_ppcap_enable(&skl->ebus, false);
  96. return 0;
  97. }
  98. int skl_resume_dsp(struct skl *skl)
  99. {
  100. struct skl_sst *ctx = skl->skl_sst;
  101. /* if ppcap is not supported return 0 */
  102. if (!skl->ebus.ppcap)
  103. return 0;
  104. /* enable ppcap interrupt */
  105. snd_hdac_ext_bus_ppcap_enable(&skl->ebus, true);
  106. snd_hdac_ext_bus_ppcap_int_enable(&skl->ebus, true);
  107. return skl_dsp_wake(ctx->dsp);
  108. }
  109. enum skl_bitdepth skl_get_bit_depth(int params)
  110. {
  111. switch (params) {
  112. case 8:
  113. return SKL_DEPTH_8BIT;
  114. case 16:
  115. return SKL_DEPTH_16BIT;
  116. case 24:
  117. return SKL_DEPTH_24BIT;
  118. case 32:
  119. return SKL_DEPTH_32BIT;
  120. default:
  121. return SKL_DEPTH_INVALID;
  122. }
  123. }
  124. static u32 skl_create_channel_map(enum skl_ch_cfg ch_cfg)
  125. {
  126. u32 config;
  127. switch (ch_cfg) {
  128. case SKL_CH_CFG_MONO:
  129. config = (0xFFFFFFF0 | SKL_CHANNEL_LEFT);
  130. break;
  131. case SKL_CH_CFG_STEREO:
  132. config = (0xFFFFFF00 | SKL_CHANNEL_LEFT
  133. | (SKL_CHANNEL_RIGHT << 4));
  134. break;
  135. case SKL_CH_CFG_2_1:
  136. config = (0xFFFFF000 | SKL_CHANNEL_LEFT
  137. | (SKL_CHANNEL_RIGHT << 4)
  138. | (SKL_CHANNEL_LFE << 8));
  139. break;
  140. case SKL_CH_CFG_3_0:
  141. config = (0xFFFFF000 | SKL_CHANNEL_LEFT
  142. | (SKL_CHANNEL_CENTER << 4)
  143. | (SKL_CHANNEL_RIGHT << 8));
  144. break;
  145. case SKL_CH_CFG_3_1:
  146. config = (0xFFFF0000 | SKL_CHANNEL_LEFT
  147. | (SKL_CHANNEL_CENTER << 4)
  148. | (SKL_CHANNEL_RIGHT << 8)
  149. | (SKL_CHANNEL_LFE << 12));
  150. break;
  151. case SKL_CH_CFG_QUATRO:
  152. config = (0xFFFF0000 | SKL_CHANNEL_LEFT
  153. | (SKL_CHANNEL_RIGHT << 4)
  154. | (SKL_CHANNEL_LEFT_SURROUND << 8)
  155. | (SKL_CHANNEL_RIGHT_SURROUND << 12));
  156. break;
  157. case SKL_CH_CFG_4_0:
  158. config = (0xFFFF0000 | SKL_CHANNEL_LEFT
  159. | (SKL_CHANNEL_CENTER << 4)
  160. | (SKL_CHANNEL_RIGHT << 8)
  161. | (SKL_CHANNEL_CENTER_SURROUND << 12));
  162. break;
  163. case SKL_CH_CFG_5_0:
  164. config = (0xFFF00000 | SKL_CHANNEL_LEFT
  165. | (SKL_CHANNEL_CENTER << 4)
  166. | (SKL_CHANNEL_RIGHT << 8)
  167. | (SKL_CHANNEL_LEFT_SURROUND << 12)
  168. | (SKL_CHANNEL_RIGHT_SURROUND << 16));
  169. break;
  170. case SKL_CH_CFG_5_1:
  171. config = (0xFF000000 | SKL_CHANNEL_CENTER
  172. | (SKL_CHANNEL_LEFT << 4)
  173. | (SKL_CHANNEL_RIGHT << 8)
  174. | (SKL_CHANNEL_LEFT_SURROUND << 12)
  175. | (SKL_CHANNEL_RIGHT_SURROUND << 16)
  176. | (SKL_CHANNEL_LFE << 20));
  177. break;
  178. case SKL_CH_CFG_DUAL_MONO:
  179. config = (0xFFFFFF00 | SKL_CHANNEL_LEFT
  180. | (SKL_CHANNEL_LEFT << 4));
  181. break;
  182. case SKL_CH_CFG_I2S_DUAL_STEREO_0:
  183. config = (0xFFFFFF00 | SKL_CHANNEL_LEFT
  184. | (SKL_CHANNEL_RIGHT << 4));
  185. break;
  186. case SKL_CH_CFG_I2S_DUAL_STEREO_1:
  187. config = (0xFFFF00FF | (SKL_CHANNEL_LEFT << 8)
  188. | (SKL_CHANNEL_RIGHT << 12));
  189. break;
  190. default:
  191. config = 0xFFFFFFFF;
  192. break;
  193. }
  194. return config;
  195. }
  196. /*
  197. * Each module in DSP expects a base module configuration, which consists of
  198. * PCM format information, which we calculate in driver and resource values
  199. * which are read from widget information passed through topology binary
  200. * This is send when we create a module with INIT_INSTANCE IPC msg
  201. */
  202. static void skl_set_base_module_format(struct skl_sst *ctx,
  203. struct skl_module_cfg *mconfig,
  204. struct skl_base_cfg *base_cfg)
  205. {
  206. struct skl_module_fmt *format = &mconfig->in_fmt;
  207. base_cfg->audio_fmt.number_of_channels = (u8)format->channels;
  208. base_cfg->audio_fmt.s_freq = format->s_freq;
  209. base_cfg->audio_fmt.bit_depth = format->bit_depth;
  210. base_cfg->audio_fmt.valid_bit_depth = format->valid_bit_depth;
  211. base_cfg->audio_fmt.ch_cfg = format->ch_cfg;
  212. dev_dbg(ctx->dev, "bit_depth=%x valid_bd=%x ch_config=%x\n",
  213. format->bit_depth, format->valid_bit_depth,
  214. format->ch_cfg);
  215. base_cfg->audio_fmt.channel_map = skl_create_channel_map(
  216. base_cfg->audio_fmt.ch_cfg);
  217. base_cfg->audio_fmt.interleaving = SKL_INTERLEAVING_PER_CHANNEL;
  218. base_cfg->cps = mconfig->mcps;
  219. base_cfg->ibs = mconfig->ibs;
  220. base_cfg->obs = mconfig->obs;
  221. }
  222. /*
  223. * Copies copier capabilities into copier module and updates copier module
  224. * config size.
  225. */
  226. static void skl_copy_copier_caps(struct skl_module_cfg *mconfig,
  227. struct skl_cpr_cfg *cpr_mconfig)
  228. {
  229. if (mconfig->formats_config.caps_size == 0)
  230. return;
  231. memcpy(cpr_mconfig->gtw_cfg.config_data,
  232. mconfig->formats_config.caps,
  233. mconfig->formats_config.caps_size);
  234. cpr_mconfig->gtw_cfg.config_length =
  235. (mconfig->formats_config.caps_size) / 4;
  236. }
  237. /*
  238. * Calculate the gatewat settings required for copier module, type of
  239. * gateway and index of gateway to use
  240. */
  241. static void skl_setup_cpr_gateway_cfg(struct skl_sst *ctx,
  242. struct skl_module_cfg *mconfig,
  243. struct skl_cpr_cfg *cpr_mconfig)
  244. {
  245. union skl_connector_node_id node_id = {0};
  246. struct skl_pipe_params *params = mconfig->pipe->p_params;
  247. switch (mconfig->dev_type) {
  248. case SKL_DEVICE_BT:
  249. node_id.node.dma_type =
  250. (SKL_CONN_SOURCE == mconfig->hw_conn_type) ?
  251. SKL_DMA_I2S_LINK_OUTPUT_CLASS :
  252. SKL_DMA_I2S_LINK_INPUT_CLASS;
  253. node_id.node.vindex = params->host_dma_id +
  254. (mconfig->vbus_id << 3);
  255. break;
  256. case SKL_DEVICE_I2S:
  257. node_id.node.dma_type =
  258. (SKL_CONN_SOURCE == mconfig->hw_conn_type) ?
  259. SKL_DMA_I2S_LINK_OUTPUT_CLASS :
  260. SKL_DMA_I2S_LINK_INPUT_CLASS;
  261. node_id.node.vindex = params->host_dma_id +
  262. (mconfig->time_slot << 1) +
  263. (mconfig->vbus_id << 3);
  264. break;
  265. case SKL_DEVICE_DMIC:
  266. node_id.node.dma_type = SKL_DMA_DMIC_LINK_INPUT_CLASS;
  267. node_id.node.vindex = mconfig->vbus_id +
  268. (mconfig->time_slot);
  269. break;
  270. case SKL_DEVICE_HDALINK:
  271. node_id.node.dma_type =
  272. (SKL_CONN_SOURCE == mconfig->hw_conn_type) ?
  273. SKL_DMA_HDA_LINK_OUTPUT_CLASS :
  274. SKL_DMA_HDA_LINK_INPUT_CLASS;
  275. node_id.node.vindex = params->link_dma_id;
  276. break;
  277. default:
  278. node_id.node.dma_type =
  279. (SKL_CONN_SOURCE == mconfig->hw_conn_type) ?
  280. SKL_DMA_HDA_HOST_OUTPUT_CLASS :
  281. SKL_DMA_HDA_HOST_INPUT_CLASS;
  282. node_id.node.vindex = params->host_dma_id;
  283. break;
  284. }
  285. cpr_mconfig->gtw_cfg.node_id = node_id.val;
  286. if (SKL_CONN_SOURCE == mconfig->hw_conn_type)
  287. cpr_mconfig->gtw_cfg.dma_buffer_size = 2 * mconfig->obs;
  288. else
  289. cpr_mconfig->gtw_cfg.dma_buffer_size = 2 * mconfig->ibs;
  290. cpr_mconfig->cpr_feature_mask = 0;
  291. cpr_mconfig->gtw_cfg.config_length = 0;
  292. skl_copy_copier_caps(mconfig, cpr_mconfig);
  293. }
  294. static void skl_setup_out_format(struct skl_sst *ctx,
  295. struct skl_module_cfg *mconfig,
  296. struct skl_audio_data_format *out_fmt)
  297. {
  298. struct skl_module_fmt *format = &mconfig->out_fmt;
  299. out_fmt->number_of_channels = (u8)format->channels;
  300. out_fmt->s_freq = format->s_freq;
  301. out_fmt->bit_depth = format->bit_depth;
  302. out_fmt->valid_bit_depth = format->valid_bit_depth;
  303. out_fmt->ch_cfg = format->ch_cfg;
  304. out_fmt->channel_map = skl_create_channel_map(out_fmt->ch_cfg);
  305. out_fmt->interleaving = SKL_INTERLEAVING_PER_CHANNEL;
  306. dev_dbg(ctx->dev, "copier out format chan=%d fre=%d bitdepth=%d\n",
  307. out_fmt->number_of_channels, format->s_freq, format->bit_depth);
  308. }
  309. /*
  310. * DSP needs SRC module for frequency conversion, SRC takes base module
  311. * configuration and the target frequency as extra parameter passed as src
  312. * config
  313. */
  314. static void skl_set_src_format(struct skl_sst *ctx,
  315. struct skl_module_cfg *mconfig,
  316. struct skl_src_module_cfg *src_mconfig)
  317. {
  318. struct skl_module_fmt *fmt = &mconfig->out_fmt;
  319. skl_set_base_module_format(ctx, mconfig,
  320. (struct skl_base_cfg *)src_mconfig);
  321. src_mconfig->src_cfg = fmt->s_freq;
  322. }
  323. /*
  324. * DSP needs updown module to do channel conversion. updown module take base
  325. * module configuration and channel configuration
  326. * It also take coefficients and now we have defaults applied here
  327. */
  328. static void skl_set_updown_mixer_format(struct skl_sst *ctx,
  329. struct skl_module_cfg *mconfig,
  330. struct skl_up_down_mixer_cfg *mixer_mconfig)
  331. {
  332. struct skl_module_fmt *fmt = &mconfig->out_fmt;
  333. int i = 0;
  334. skl_set_base_module_format(ctx, mconfig,
  335. (struct skl_base_cfg *)mixer_mconfig);
  336. mixer_mconfig->out_ch_cfg = fmt->ch_cfg;
  337. /* Select F/W default coefficient */
  338. mixer_mconfig->coeff_sel = 0x0;
  339. /* User coeff, don't care since we are selecting F/W defaults */
  340. for (i = 0; i < UP_DOWN_MIXER_MAX_COEFF; i++)
  341. mixer_mconfig->coeff[i] = 0xDEADBEEF;
  342. }
  343. /*
  344. * 'copier' is DSP internal module which copies data from Host DMA (HDA host
  345. * dma) or link (hda link, SSP, PDM)
  346. * Here we calculate the copier module parameters, like PCM format, output
  347. * format, gateway settings
  348. * copier_module_config is sent as input buffer with INIT_INSTANCE IPC msg
  349. */
  350. static void skl_set_copier_format(struct skl_sst *ctx,
  351. struct skl_module_cfg *mconfig,
  352. struct skl_cpr_cfg *cpr_mconfig)
  353. {
  354. struct skl_audio_data_format *out_fmt = &cpr_mconfig->out_fmt;
  355. struct skl_base_cfg *base_cfg = (struct skl_base_cfg *)cpr_mconfig;
  356. skl_set_base_module_format(ctx, mconfig, base_cfg);
  357. skl_setup_out_format(ctx, mconfig, out_fmt);
  358. skl_setup_cpr_gateway_cfg(ctx, mconfig, cpr_mconfig);
  359. }
  360. static u16 skl_get_module_param_size(struct skl_sst *ctx,
  361. struct skl_module_cfg *mconfig)
  362. {
  363. u16 param_size;
  364. switch (mconfig->m_type) {
  365. case SKL_MODULE_TYPE_COPIER:
  366. param_size = sizeof(struct skl_cpr_cfg);
  367. param_size += mconfig->formats_config.caps_size;
  368. return param_size;
  369. case SKL_MODULE_TYPE_SRCINT:
  370. return sizeof(struct skl_src_module_cfg);
  371. case SKL_MODULE_TYPE_UPDWMIX:
  372. return sizeof(struct skl_up_down_mixer_cfg);
  373. default:
  374. /*
  375. * return only base cfg when no specific module type is
  376. * specified
  377. */
  378. return sizeof(struct skl_base_cfg);
  379. }
  380. return 0;
  381. }
  382. /*
  383. * DSP firmware supports various modules like copier, SRC, updown etc.
  384. * These modules required various parameters to be calculated and sent for
  385. * the module initialization to DSP. By default a generic module needs only
  386. * base module format configuration
  387. */
  388. static int skl_set_module_format(struct skl_sst *ctx,
  389. struct skl_module_cfg *module_config,
  390. u16 *module_config_size,
  391. void **param_data)
  392. {
  393. u16 param_size;
  394. param_size = skl_get_module_param_size(ctx, module_config);
  395. *param_data = kzalloc(param_size, GFP_KERNEL);
  396. if (NULL == *param_data)
  397. return -ENOMEM;
  398. *module_config_size = param_size;
  399. switch (module_config->m_type) {
  400. case SKL_MODULE_TYPE_COPIER:
  401. skl_set_copier_format(ctx, module_config, *param_data);
  402. break;
  403. case SKL_MODULE_TYPE_SRCINT:
  404. skl_set_src_format(ctx, module_config, *param_data);
  405. break;
  406. case SKL_MODULE_TYPE_UPDWMIX:
  407. skl_set_updown_mixer_format(ctx, module_config, *param_data);
  408. break;
  409. default:
  410. skl_set_base_module_format(ctx, module_config, *param_data);
  411. break;
  412. }
  413. dev_dbg(ctx->dev, "Module type=%d config size: %d bytes\n",
  414. module_config->id.module_id, param_size);
  415. print_hex_dump(KERN_DEBUG, "Module params:", DUMP_PREFIX_OFFSET, 8, 4,
  416. *param_data, param_size, false);
  417. return 0;
  418. }
  419. static int skl_get_queue_index(struct skl_module_pin *mpin,
  420. struct skl_module_inst_id id, int max)
  421. {
  422. int i;
  423. for (i = 0; i < max; i++) {
  424. if (mpin[i].id.module_id == id.module_id &&
  425. mpin[i].id.instance_id == id.instance_id)
  426. return i;
  427. }
  428. return -EINVAL;
  429. }
  430. /*
  431. * Allocates queue for each module.
  432. * if dynamic, the pin_index is allocated 0 to max_pin.
  433. * In static, the pin_index is fixed based on module_id and instance id
  434. */
  435. static int skl_alloc_queue(struct skl_module_pin *mpin,
  436. struct skl_module_inst_id id, int max)
  437. {
  438. int i;
  439. /*
  440. * if pin in dynamic, find first free pin
  441. * otherwise find match module and instance id pin as topology will
  442. * ensure a unique pin is assigned to this so no need to
  443. * allocate/free
  444. */
  445. for (i = 0; i < max; i++) {
  446. if (mpin[i].is_dynamic) {
  447. if (!mpin[i].in_use) {
  448. mpin[i].in_use = true;
  449. mpin[i].id.module_id = id.module_id;
  450. mpin[i].id.instance_id = id.instance_id;
  451. return i;
  452. }
  453. } else {
  454. if (mpin[i].id.module_id == id.module_id &&
  455. mpin[i].id.instance_id == id.instance_id)
  456. return i;
  457. }
  458. }
  459. return -EINVAL;
  460. }
  461. static void skl_free_queue(struct skl_module_pin *mpin, int q_index)
  462. {
  463. if (mpin[q_index].is_dynamic) {
  464. mpin[q_index].in_use = false;
  465. mpin[q_index].id.module_id = 0;
  466. mpin[q_index].id.instance_id = 0;
  467. }
  468. }
  469. /*
  470. * A module needs to be instanataited in DSP. A mdoule is present in a
  471. * collection of module referred as a PIPE.
  472. * We first calculate the module format, based on module type and then
  473. * invoke the DSP by sending IPC INIT_INSTANCE using ipc helper
  474. */
  475. int skl_init_module(struct skl_sst *ctx,
  476. struct skl_module_cfg *mconfig, char *param)
  477. {
  478. u16 module_config_size = 0;
  479. void *param_data = NULL;
  480. int ret;
  481. struct skl_ipc_init_instance_msg msg;
  482. dev_dbg(ctx->dev, "%s: module_id = %d instance=%d\n", __func__,
  483. mconfig->id.module_id, mconfig->id.instance_id);
  484. if (mconfig->pipe->state != SKL_PIPE_CREATED) {
  485. dev_err(ctx->dev, "Pipe not created state= %d pipe_id= %d\n",
  486. mconfig->pipe->state, mconfig->pipe->ppl_id);
  487. return -EIO;
  488. }
  489. ret = skl_set_module_format(ctx, mconfig,
  490. &module_config_size, &param_data);
  491. if (ret < 0) {
  492. dev_err(ctx->dev, "Failed to set module format ret=%d\n", ret);
  493. return ret;
  494. }
  495. msg.module_id = mconfig->id.module_id;
  496. msg.instance_id = mconfig->id.instance_id;
  497. msg.ppl_instance_id = mconfig->pipe->ppl_id;
  498. msg.param_data_size = module_config_size;
  499. msg.core_id = mconfig->core_id;
  500. ret = skl_ipc_init_instance(&ctx->ipc, &msg, param_data);
  501. if (ret < 0) {
  502. dev_err(ctx->dev, "Failed to init instance ret=%d\n", ret);
  503. kfree(param_data);
  504. return ret;
  505. }
  506. mconfig->m_state = SKL_MODULE_INIT_DONE;
  507. return ret;
  508. }
  509. static void skl_dump_bind_info(struct skl_sst *ctx, struct skl_module_cfg
  510. *src_module, struct skl_module_cfg *dst_module)
  511. {
  512. dev_dbg(ctx->dev, "%s: src module_id = %d src_instance=%d\n",
  513. __func__, src_module->id.module_id, src_module->id.instance_id);
  514. dev_dbg(ctx->dev, "%s: dst_module=%d dst_instacne=%d\n", __func__,
  515. dst_module->id.module_id, dst_module->id.instance_id);
  516. dev_dbg(ctx->dev, "src_module state = %d dst module state = %d\n",
  517. src_module->m_state, dst_module->m_state);
  518. }
  519. /*
  520. * On module freeup, we need to unbind the module with modules
  521. * it is already bind.
  522. * Find the pin allocated and unbind then using bind_unbind IPC
  523. */
  524. int skl_unbind_modules(struct skl_sst *ctx,
  525. struct skl_module_cfg *src_mcfg,
  526. struct skl_module_cfg *dst_mcfg)
  527. {
  528. int ret;
  529. struct skl_ipc_bind_unbind_msg msg;
  530. struct skl_module_inst_id src_id = src_mcfg->id;
  531. struct skl_module_inst_id dst_id = dst_mcfg->id;
  532. int in_max = dst_mcfg->max_in_queue;
  533. int out_max = src_mcfg->max_out_queue;
  534. int src_index, dst_index;
  535. skl_dump_bind_info(ctx, src_mcfg, dst_mcfg);
  536. if (src_mcfg->m_state != SKL_MODULE_BIND_DONE)
  537. return 0;
  538. /*
  539. * if intra module unbind, check if both modules are BIND,
  540. * then send unbind
  541. */
  542. if ((src_mcfg->pipe->ppl_id != dst_mcfg->pipe->ppl_id) &&
  543. dst_mcfg->m_state != SKL_MODULE_BIND_DONE)
  544. return 0;
  545. else if (src_mcfg->m_state < SKL_MODULE_INIT_DONE &&
  546. dst_mcfg->m_state < SKL_MODULE_INIT_DONE)
  547. return 0;
  548. /* get src queue index */
  549. src_index = skl_get_queue_index(src_mcfg->m_out_pin, dst_id, out_max);
  550. if (src_index < 0)
  551. return -EINVAL;
  552. msg.src_queue = src_mcfg->m_out_pin[src_index].pin_index;
  553. /* get dst queue index */
  554. dst_index = skl_get_queue_index(dst_mcfg->m_in_pin, src_id, in_max);
  555. if (dst_index < 0)
  556. return -EINVAL;
  557. msg.dst_queue = dst_mcfg->m_in_pin[dst_index].pin_index;
  558. msg.module_id = src_mcfg->id.module_id;
  559. msg.instance_id = src_mcfg->id.instance_id;
  560. msg.dst_module_id = dst_mcfg->id.module_id;
  561. msg.dst_instance_id = dst_mcfg->id.instance_id;
  562. msg.bind = false;
  563. ret = skl_ipc_bind_unbind(&ctx->ipc, &msg);
  564. if (!ret) {
  565. src_mcfg->m_state = SKL_MODULE_UNINIT;
  566. /* free queue only if unbind is success */
  567. skl_free_queue(src_mcfg->m_out_pin, src_index);
  568. skl_free_queue(dst_mcfg->m_in_pin, dst_index);
  569. }
  570. return ret;
  571. }
  572. /*
  573. * Once a module is instantiated it need to be 'bind' with other modules in
  574. * the pipeline. For binding we need to find the module pins which are bind
  575. * together
  576. * This function finds the pins and then sends bund_unbind IPC message to
  577. * DSP using IPC helper
  578. */
  579. int skl_bind_modules(struct skl_sst *ctx,
  580. struct skl_module_cfg *src_mcfg,
  581. struct skl_module_cfg *dst_mcfg)
  582. {
  583. int ret;
  584. struct skl_ipc_bind_unbind_msg msg;
  585. struct skl_module_inst_id src_id = src_mcfg->id;
  586. struct skl_module_inst_id dst_id = dst_mcfg->id;
  587. int in_max = dst_mcfg->max_in_queue;
  588. int out_max = src_mcfg->max_out_queue;
  589. int src_index, dst_index;
  590. skl_dump_bind_info(ctx, src_mcfg, dst_mcfg);
  591. if (src_mcfg->m_state < SKL_MODULE_INIT_DONE &&
  592. dst_mcfg->m_state < SKL_MODULE_INIT_DONE)
  593. return 0;
  594. src_index = skl_alloc_queue(src_mcfg->m_out_pin, dst_id, out_max);
  595. if (src_index < 0)
  596. return -EINVAL;
  597. msg.src_queue = src_mcfg->m_out_pin[src_index].pin_index;
  598. dst_index = skl_alloc_queue(dst_mcfg->m_in_pin, src_id, in_max);
  599. if (dst_index < 0) {
  600. skl_free_queue(src_mcfg->m_out_pin, src_index);
  601. return -EINVAL;
  602. }
  603. msg.dst_queue = dst_mcfg->m_in_pin[dst_index].pin_index;
  604. dev_dbg(ctx->dev, "src queue = %d dst queue =%d\n",
  605. msg.src_queue, msg.dst_queue);
  606. msg.module_id = src_mcfg->id.module_id;
  607. msg.instance_id = src_mcfg->id.instance_id;
  608. msg.dst_module_id = dst_mcfg->id.module_id;
  609. msg.dst_instance_id = dst_mcfg->id.instance_id;
  610. msg.bind = true;
  611. ret = skl_ipc_bind_unbind(&ctx->ipc, &msg);
  612. if (!ret) {
  613. src_mcfg->m_state = SKL_MODULE_BIND_DONE;
  614. } else {
  615. /* error case , if IPC fails, clear the queue index */
  616. skl_free_queue(src_mcfg->m_out_pin, src_index);
  617. skl_free_queue(dst_mcfg->m_in_pin, dst_index);
  618. }
  619. return ret;
  620. }
  621. static int skl_set_pipe_state(struct skl_sst *ctx, struct skl_pipe *pipe,
  622. enum skl_ipc_pipeline_state state)
  623. {
  624. dev_dbg(ctx->dev, "%s: pipe_satate = %d\n", __func__, state);
  625. return skl_ipc_set_pipeline_state(&ctx->ipc, pipe->ppl_id, state);
  626. }
  627. /*
  628. * A pipeline is a collection of modules. Before a module in instantiated a
  629. * pipeline needs to be created for it.
  630. * This function creates pipeline, by sending create pipeline IPC messages
  631. * to FW
  632. */
  633. int skl_create_pipeline(struct skl_sst *ctx, struct skl_pipe *pipe)
  634. {
  635. int ret;
  636. dev_dbg(ctx->dev, "%s: pipe_id = %d\n", __func__, pipe->ppl_id);
  637. ret = skl_ipc_create_pipeline(&ctx->ipc, pipe->memory_pages,
  638. pipe->pipe_priority, pipe->ppl_id);
  639. if (ret < 0) {
  640. dev_err(ctx->dev, "Failed to create pipeline\n");
  641. return ret;
  642. }
  643. pipe->state = SKL_PIPE_CREATED;
  644. return 0;
  645. }
  646. /*
  647. * A pipeline needs to be deleted on cleanup. If a pipeline is running, then
  648. * pause the pipeline first and then delete it
  649. * The pipe delete is done by sending delete pipeline IPC. DSP will stop the
  650. * DMA engines and releases resources
  651. */
  652. int skl_delete_pipe(struct skl_sst *ctx, struct skl_pipe *pipe)
  653. {
  654. int ret;
  655. dev_dbg(ctx->dev, "%s: pipe = %d\n", __func__, pipe->ppl_id);
  656. /* If pipe is not started, do not try to stop the pipe in FW. */
  657. if (pipe->state > SKL_PIPE_STARTED) {
  658. ret = skl_set_pipe_state(ctx, pipe, PPL_PAUSED);
  659. if (ret < 0) {
  660. dev_err(ctx->dev, "Failed to stop pipeline\n");
  661. return ret;
  662. }
  663. pipe->state = SKL_PIPE_PAUSED;
  664. } else {
  665. /* If pipe was not created in FW, do not try to delete it */
  666. if (pipe->state < SKL_PIPE_CREATED)
  667. return 0;
  668. ret = skl_ipc_delete_pipeline(&ctx->ipc, pipe->ppl_id);
  669. if (ret < 0)
  670. dev_err(ctx->dev, "Failed to delete pipeline\n");
  671. }
  672. return ret;
  673. }
  674. /*
  675. * A pipeline is also a scheduling entity in DSP which can be run, stopped
  676. * For processing data the pipe need to be run by sending IPC set pipe state
  677. * to DSP
  678. */
  679. int skl_run_pipe(struct skl_sst *ctx, struct skl_pipe *pipe)
  680. {
  681. int ret;
  682. dev_dbg(ctx->dev, "%s: pipe = %d\n", __func__, pipe->ppl_id);
  683. /* If pipe was not created in FW, do not try to pause or delete */
  684. if (pipe->state < SKL_PIPE_CREATED)
  685. return 0;
  686. /* Pipe has to be paused before it is started */
  687. ret = skl_set_pipe_state(ctx, pipe, PPL_PAUSED);
  688. if (ret < 0) {
  689. dev_err(ctx->dev, "Failed to pause pipe\n");
  690. return ret;
  691. }
  692. pipe->state = SKL_PIPE_PAUSED;
  693. ret = skl_set_pipe_state(ctx, pipe, PPL_RUNNING);
  694. if (ret < 0) {
  695. dev_err(ctx->dev, "Failed to start pipe\n");
  696. return ret;
  697. }
  698. pipe->state = SKL_PIPE_STARTED;
  699. return 0;
  700. }
  701. /*
  702. * Stop the pipeline by sending set pipe state IPC
  703. * DSP doesnt implement stop so we always send pause message
  704. */
  705. int skl_stop_pipe(struct skl_sst *ctx, struct skl_pipe *pipe)
  706. {
  707. int ret;
  708. dev_dbg(ctx->dev, "In %s pipe=%d\n", __func__, pipe->ppl_id);
  709. /* If pipe was not created in FW, do not try to pause or delete */
  710. if (pipe->state < SKL_PIPE_PAUSED)
  711. return 0;
  712. ret = skl_set_pipe_state(ctx, pipe, PPL_PAUSED);
  713. if (ret < 0) {
  714. dev_dbg(ctx->dev, "Failed to stop pipe\n");
  715. return ret;
  716. }
  717. pipe->state = SKL_PIPE_CREATED;
  718. return 0;
  719. }