sst.c 14 KB

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  1. /*
  2. * sst.c - Intel SST Driver for audio engine
  3. *
  4. * Copyright (C) 2008-14 Intel Corp
  5. * Authors: Vinod Koul <vinod.koul@intel.com>
  6. * Harsha Priya <priya.harsha@intel.com>
  7. * Dharageswari R <dharageswari.r@intel.com>
  8. * KP Jeeja <jeeja.kp@intel.com>
  9. * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
  10. *
  11. * This program is free software; you can redistribute it and/or modify
  12. * it under the terms of the GNU General Public License as published by
  13. * the Free Software Foundation; version 2 of the License.
  14. *
  15. * This program is distributed in the hope that it will be useful, but
  16. * WITHOUT ANY WARRANTY; without even the implied warranty of
  17. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  18. * General Public License for more details.
  19. *
  20. * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
  21. */
  22. #include <linux/module.h>
  23. #include <linux/fs.h>
  24. #include <linux/interrupt.h>
  25. #include <linux/firmware.h>
  26. #include <linux/pm_runtime.h>
  27. #include <linux/pm_qos.h>
  28. #include <linux/async.h>
  29. #include <linux/acpi.h>
  30. #include <sound/core.h>
  31. #include <sound/soc.h>
  32. #include <asm/platform_sst_audio.h>
  33. #include "../sst-mfld-platform.h"
  34. #include "sst.h"
  35. #include "../../common/sst-dsp.h"
  36. MODULE_AUTHOR("Vinod Koul <vinod.koul@intel.com>");
  37. MODULE_AUTHOR("Harsha Priya <priya.harsha@intel.com>");
  38. MODULE_DESCRIPTION("Intel (R) SST(R) Audio Engine Driver");
  39. MODULE_LICENSE("GPL v2");
  40. static inline bool sst_is_process_reply(u32 msg_id)
  41. {
  42. return ((msg_id & PROCESS_MSG) ? true : false);
  43. }
  44. static inline bool sst_validate_mailbox_size(unsigned int size)
  45. {
  46. return ((size <= SST_MAILBOX_SIZE) ? true : false);
  47. }
  48. static irqreturn_t intel_sst_interrupt_mrfld(int irq, void *context)
  49. {
  50. union interrupt_reg_mrfld isr;
  51. union ipc_header_mrfld header;
  52. union sst_imr_reg_mrfld imr;
  53. struct ipc_post *msg = NULL;
  54. unsigned int size = 0;
  55. struct intel_sst_drv *drv = (struct intel_sst_drv *) context;
  56. irqreturn_t retval = IRQ_HANDLED;
  57. /* Interrupt arrived, check src */
  58. isr.full = sst_shim_read64(drv->shim, SST_ISRX);
  59. if (isr.part.done_interrupt) {
  60. /* Clear done bit */
  61. spin_lock(&drv->ipc_spin_lock);
  62. header.full = sst_shim_read64(drv->shim,
  63. drv->ipc_reg.ipcx);
  64. header.p.header_high.part.done = 0;
  65. sst_shim_write64(drv->shim, drv->ipc_reg.ipcx, header.full);
  66. /* write 1 to clear status register */;
  67. isr.part.done_interrupt = 1;
  68. sst_shim_write64(drv->shim, SST_ISRX, isr.full);
  69. spin_unlock(&drv->ipc_spin_lock);
  70. /* we can send more messages to DSP so trigger work */
  71. queue_work(drv->post_msg_wq, &drv->ipc_post_msg_wq);
  72. retval = IRQ_HANDLED;
  73. }
  74. if (isr.part.busy_interrupt) {
  75. /* message from dsp so copy that */
  76. spin_lock(&drv->ipc_spin_lock);
  77. imr.full = sst_shim_read64(drv->shim, SST_IMRX);
  78. imr.part.busy_interrupt = 1;
  79. sst_shim_write64(drv->shim, SST_IMRX, imr.full);
  80. spin_unlock(&drv->ipc_spin_lock);
  81. header.full = sst_shim_read64(drv->shim, drv->ipc_reg.ipcd);
  82. if (sst_create_ipc_msg(&msg, header.p.header_high.part.large)) {
  83. drv->ops->clear_interrupt(drv);
  84. return IRQ_HANDLED;
  85. }
  86. if (header.p.header_high.part.large) {
  87. size = header.p.header_low_payload;
  88. if (sst_validate_mailbox_size(size)) {
  89. memcpy_fromio(msg->mailbox_data,
  90. drv->mailbox + drv->mailbox_recv_offset, size);
  91. } else {
  92. dev_err(drv->dev,
  93. "Mailbox not copied, payload size is: %u\n", size);
  94. header.p.header_low_payload = 0;
  95. }
  96. }
  97. msg->mrfld_header = header;
  98. msg->is_process_reply =
  99. sst_is_process_reply(header.p.header_high.part.msg_id);
  100. spin_lock(&drv->rx_msg_lock);
  101. list_add_tail(&msg->node, &drv->rx_list);
  102. spin_unlock(&drv->rx_msg_lock);
  103. drv->ops->clear_interrupt(drv);
  104. retval = IRQ_WAKE_THREAD;
  105. }
  106. return retval;
  107. }
  108. static irqreturn_t intel_sst_irq_thread_mrfld(int irq, void *context)
  109. {
  110. struct intel_sst_drv *drv = (struct intel_sst_drv *) context;
  111. struct ipc_post *__msg, *msg = NULL;
  112. unsigned long irq_flags;
  113. spin_lock_irqsave(&drv->rx_msg_lock, irq_flags);
  114. if (list_empty(&drv->rx_list)) {
  115. spin_unlock_irqrestore(&drv->rx_msg_lock, irq_flags);
  116. return IRQ_HANDLED;
  117. }
  118. list_for_each_entry_safe(msg, __msg, &drv->rx_list, node) {
  119. list_del(&msg->node);
  120. spin_unlock_irqrestore(&drv->rx_msg_lock, irq_flags);
  121. if (msg->is_process_reply)
  122. drv->ops->process_message(msg);
  123. else
  124. drv->ops->process_reply(drv, msg);
  125. if (msg->is_large)
  126. kfree(msg->mailbox_data);
  127. kfree(msg);
  128. spin_lock_irqsave(&drv->rx_msg_lock, irq_flags);
  129. }
  130. spin_unlock_irqrestore(&drv->rx_msg_lock, irq_flags);
  131. return IRQ_HANDLED;
  132. }
  133. static int sst_save_dsp_context_v2(struct intel_sst_drv *sst)
  134. {
  135. int ret = 0;
  136. ret = sst_prepare_and_post_msg(sst, SST_TASK_ID_MEDIA, IPC_CMD,
  137. IPC_PREP_D3, PIPE_RSVD, 0, NULL, NULL,
  138. true, true, false, true);
  139. if (ret < 0) {
  140. dev_err(sst->dev, "not suspending FW!!, Err: %d\n", ret);
  141. return -EIO;
  142. }
  143. return 0;
  144. }
  145. static struct intel_sst_ops mrfld_ops = {
  146. .interrupt = intel_sst_interrupt_mrfld,
  147. .irq_thread = intel_sst_irq_thread_mrfld,
  148. .clear_interrupt = intel_sst_clear_intr_mrfld,
  149. .start = sst_start_mrfld,
  150. .reset = intel_sst_reset_dsp_mrfld,
  151. .post_message = sst_post_message_mrfld,
  152. .process_reply = sst_process_reply_mrfld,
  153. .save_dsp_context = sst_save_dsp_context_v2,
  154. .alloc_stream = sst_alloc_stream_mrfld,
  155. .post_download = sst_post_download_mrfld,
  156. };
  157. int sst_driver_ops(struct intel_sst_drv *sst)
  158. {
  159. switch (sst->dev_id) {
  160. case SST_MRFLD_PCI_ID:
  161. case SST_BYT_ACPI_ID:
  162. case SST_CHV_ACPI_ID:
  163. sst->tstamp = SST_TIME_STAMP_MRFLD;
  164. sst->ops = &mrfld_ops;
  165. return 0;
  166. default:
  167. dev_err(sst->dev,
  168. "SST Driver capablities missing for dev_id: %x", sst->dev_id);
  169. return -EINVAL;
  170. };
  171. }
  172. void sst_process_pending_msg(struct work_struct *work)
  173. {
  174. struct intel_sst_drv *ctx = container_of(work,
  175. struct intel_sst_drv, ipc_post_msg_wq);
  176. ctx->ops->post_message(ctx, NULL, false);
  177. }
  178. static int sst_workqueue_init(struct intel_sst_drv *ctx)
  179. {
  180. INIT_LIST_HEAD(&ctx->memcpy_list);
  181. INIT_LIST_HEAD(&ctx->rx_list);
  182. INIT_LIST_HEAD(&ctx->ipc_dispatch_list);
  183. INIT_LIST_HEAD(&ctx->block_list);
  184. INIT_WORK(&ctx->ipc_post_msg_wq, sst_process_pending_msg);
  185. init_waitqueue_head(&ctx->wait_queue);
  186. ctx->post_msg_wq =
  187. create_singlethread_workqueue("sst_post_msg_wq");
  188. if (!ctx->post_msg_wq)
  189. return -EBUSY;
  190. return 0;
  191. }
  192. static void sst_init_locks(struct intel_sst_drv *ctx)
  193. {
  194. mutex_init(&ctx->sst_lock);
  195. spin_lock_init(&ctx->rx_msg_lock);
  196. spin_lock_init(&ctx->ipc_spin_lock);
  197. spin_lock_init(&ctx->block_lock);
  198. }
  199. int sst_alloc_drv_context(struct intel_sst_drv **ctx,
  200. struct device *dev, unsigned int dev_id)
  201. {
  202. *ctx = devm_kzalloc(dev, sizeof(struct intel_sst_drv), GFP_KERNEL);
  203. if (!(*ctx))
  204. return -ENOMEM;
  205. (*ctx)->dev = dev;
  206. (*ctx)->dev_id = dev_id;
  207. return 0;
  208. }
  209. EXPORT_SYMBOL_GPL(sst_alloc_drv_context);
  210. int sst_context_init(struct intel_sst_drv *ctx)
  211. {
  212. int ret = 0, i;
  213. if (!ctx->pdata)
  214. return -EINVAL;
  215. if (!ctx->pdata->probe_data)
  216. return -EINVAL;
  217. memcpy(&ctx->info, ctx->pdata->probe_data, sizeof(ctx->info));
  218. ret = sst_driver_ops(ctx);
  219. if (ret != 0)
  220. return -EINVAL;
  221. sst_init_locks(ctx);
  222. sst_set_fw_state_locked(ctx, SST_RESET);
  223. /* pvt_id 0 reserved for async messages */
  224. ctx->pvt_id = 1;
  225. ctx->stream_cnt = 0;
  226. ctx->fw_in_mem = NULL;
  227. /* we use memcpy, so set to 0 */
  228. ctx->use_dma = 0;
  229. ctx->use_lli = 0;
  230. if (sst_workqueue_init(ctx))
  231. return -EINVAL;
  232. ctx->mailbox_recv_offset = ctx->pdata->ipc_info->mbox_recv_off;
  233. ctx->ipc_reg.ipcx = SST_IPCX + ctx->pdata->ipc_info->ipc_offset;
  234. ctx->ipc_reg.ipcd = SST_IPCD + ctx->pdata->ipc_info->ipc_offset;
  235. dev_info(ctx->dev, "Got drv data max stream %d\n",
  236. ctx->info.max_streams);
  237. for (i = 1; i <= ctx->info.max_streams; i++) {
  238. struct stream_info *stream = &ctx->streams[i];
  239. memset(stream, 0, sizeof(*stream));
  240. stream->pipe_id = PIPE_RSVD;
  241. mutex_init(&stream->lock);
  242. }
  243. /* Register the ISR */
  244. ret = devm_request_threaded_irq(ctx->dev, ctx->irq_num, ctx->ops->interrupt,
  245. ctx->ops->irq_thread, 0, SST_DRV_NAME,
  246. ctx);
  247. if (ret)
  248. goto do_free_mem;
  249. dev_dbg(ctx->dev, "Registered IRQ %#x\n", ctx->irq_num);
  250. /* default intr are unmasked so set this as masked */
  251. sst_shim_write64(ctx->shim, SST_IMRX, 0xFFFF0038);
  252. ctx->qos = devm_kzalloc(ctx->dev,
  253. sizeof(struct pm_qos_request), GFP_KERNEL);
  254. if (!ctx->qos) {
  255. ret = -ENOMEM;
  256. goto do_free_mem;
  257. }
  258. pm_qos_add_request(ctx->qos, PM_QOS_CPU_DMA_LATENCY,
  259. PM_QOS_DEFAULT_VALUE);
  260. dev_dbg(ctx->dev, "Requesting FW %s now...\n", ctx->firmware_name);
  261. ret = request_firmware_nowait(THIS_MODULE, true, ctx->firmware_name,
  262. ctx->dev, GFP_KERNEL, ctx, sst_firmware_load_cb);
  263. if (ret) {
  264. dev_err(ctx->dev, "Firmware download failed:%d\n", ret);
  265. goto do_free_mem;
  266. }
  267. sst_register(ctx->dev);
  268. return 0;
  269. do_free_mem:
  270. destroy_workqueue(ctx->post_msg_wq);
  271. return ret;
  272. }
  273. EXPORT_SYMBOL_GPL(sst_context_init);
  274. void sst_context_cleanup(struct intel_sst_drv *ctx)
  275. {
  276. pm_runtime_get_noresume(ctx->dev);
  277. pm_runtime_disable(ctx->dev);
  278. sst_unregister(ctx->dev);
  279. sst_set_fw_state_locked(ctx, SST_SHUTDOWN);
  280. flush_scheduled_work();
  281. destroy_workqueue(ctx->post_msg_wq);
  282. pm_qos_remove_request(ctx->qos);
  283. kfree(ctx->fw_sg_list.src);
  284. kfree(ctx->fw_sg_list.dst);
  285. ctx->fw_sg_list.list_len = 0;
  286. kfree(ctx->fw_in_mem);
  287. ctx->fw_in_mem = NULL;
  288. sst_memcpy_free_resources(ctx);
  289. ctx = NULL;
  290. }
  291. EXPORT_SYMBOL_GPL(sst_context_cleanup);
  292. static inline void sst_save_shim64(struct intel_sst_drv *ctx,
  293. void __iomem *shim,
  294. struct sst_shim_regs64 *shim_regs)
  295. {
  296. unsigned long irq_flags;
  297. spin_lock_irqsave(&ctx->ipc_spin_lock, irq_flags);
  298. shim_regs->imrx = sst_shim_read64(shim, SST_IMRX);
  299. shim_regs->csr = sst_shim_read64(shim, SST_CSR);
  300. spin_unlock_irqrestore(&ctx->ipc_spin_lock, irq_flags);
  301. }
  302. static inline void sst_restore_shim64(struct intel_sst_drv *ctx,
  303. void __iomem *shim,
  304. struct sst_shim_regs64 *shim_regs)
  305. {
  306. unsigned long irq_flags;
  307. /*
  308. * we only need to restore IMRX for this case, rest will be
  309. * initialize by FW or driver when firmware is loaded
  310. */
  311. spin_lock_irqsave(&ctx->ipc_spin_lock, irq_flags);
  312. sst_shim_write64(shim, SST_IMRX, shim_regs->imrx);
  313. sst_shim_write64(shim, SST_CSR, shim_regs->csr);
  314. spin_unlock_irqrestore(&ctx->ipc_spin_lock, irq_flags);
  315. }
  316. void sst_configure_runtime_pm(struct intel_sst_drv *ctx)
  317. {
  318. pm_runtime_set_autosuspend_delay(ctx->dev, SST_SUSPEND_DELAY);
  319. pm_runtime_use_autosuspend(ctx->dev);
  320. /*
  321. * For acpi devices, the actual physical device state is
  322. * initially active. So change the state to active before
  323. * enabling the pm
  324. */
  325. if (!acpi_disabled)
  326. pm_runtime_set_active(ctx->dev);
  327. pm_runtime_enable(ctx->dev);
  328. if (acpi_disabled)
  329. pm_runtime_set_active(ctx->dev);
  330. else
  331. pm_runtime_put_noidle(ctx->dev);
  332. sst_save_shim64(ctx, ctx->shim, ctx->shim_regs64);
  333. }
  334. EXPORT_SYMBOL_GPL(sst_configure_runtime_pm);
  335. static int intel_sst_runtime_suspend(struct device *dev)
  336. {
  337. int ret = 0;
  338. struct intel_sst_drv *ctx = dev_get_drvdata(dev);
  339. if (ctx->sst_state == SST_RESET) {
  340. dev_dbg(dev, "LPE is already in RESET state, No action\n");
  341. return 0;
  342. }
  343. /* save fw context */
  344. if (ctx->ops->save_dsp_context(ctx))
  345. return -EBUSY;
  346. /* Move the SST state to Reset */
  347. sst_set_fw_state_locked(ctx, SST_RESET);
  348. synchronize_irq(ctx->irq_num);
  349. flush_workqueue(ctx->post_msg_wq);
  350. ctx->ops->reset(ctx);
  351. /* save the shim registers because PMC doesn't save state */
  352. sst_save_shim64(ctx, ctx->shim, ctx->shim_regs64);
  353. return ret;
  354. }
  355. static int intel_sst_suspend(struct device *dev)
  356. {
  357. struct intel_sst_drv *ctx = dev_get_drvdata(dev);
  358. struct sst_fw_save *fw_save;
  359. int i, ret = 0;
  360. /* check first if we are already in SW reset */
  361. if (ctx->sst_state == SST_RESET)
  362. return 0;
  363. /*
  364. * check if any stream is active and running
  365. * they should already by suspend by soc_suspend
  366. */
  367. for (i = 1; i <= ctx->info.max_streams; i++) {
  368. struct stream_info *stream = &ctx->streams[i];
  369. if (stream->status == STREAM_RUNNING) {
  370. dev_err(dev, "stream %d is running, cant susupend, abort\n", i);
  371. return -EBUSY;
  372. }
  373. }
  374. synchronize_irq(ctx->irq_num);
  375. flush_workqueue(ctx->post_msg_wq);
  376. /* Move the SST state to Reset */
  377. sst_set_fw_state_locked(ctx, SST_RESET);
  378. /* tell DSP we are suspending */
  379. if (ctx->ops->save_dsp_context(ctx))
  380. return -EBUSY;
  381. /* save the memories */
  382. fw_save = kzalloc(sizeof(*fw_save), GFP_KERNEL);
  383. if (!fw_save)
  384. return -ENOMEM;
  385. fw_save->iram = kzalloc(ctx->iram_end - ctx->iram_base, GFP_KERNEL);
  386. if (!fw_save->iram) {
  387. ret = -ENOMEM;
  388. goto iram;
  389. }
  390. fw_save->dram = kzalloc(ctx->dram_end - ctx->dram_base, GFP_KERNEL);
  391. if (!fw_save->dram) {
  392. ret = -ENOMEM;
  393. goto dram;
  394. }
  395. fw_save->sram = kzalloc(SST_MAILBOX_SIZE, GFP_KERNEL);
  396. if (!fw_save->sram) {
  397. ret = -ENOMEM;
  398. goto sram;
  399. }
  400. fw_save->ddr = kzalloc(ctx->ddr_end - ctx->ddr_base, GFP_KERNEL);
  401. if (!fw_save->ddr) {
  402. ret = -ENOMEM;
  403. goto ddr;
  404. }
  405. memcpy32_fromio(fw_save->iram, ctx->iram, ctx->iram_end - ctx->iram_base);
  406. memcpy32_fromio(fw_save->dram, ctx->dram, ctx->dram_end - ctx->dram_base);
  407. memcpy32_fromio(fw_save->sram, ctx->mailbox, SST_MAILBOX_SIZE);
  408. memcpy32_fromio(fw_save->ddr, ctx->ddr, ctx->ddr_end - ctx->ddr_base);
  409. ctx->fw_save = fw_save;
  410. ctx->ops->reset(ctx);
  411. return 0;
  412. ddr:
  413. kfree(fw_save->sram);
  414. sram:
  415. kfree(fw_save->dram);
  416. dram:
  417. kfree(fw_save->iram);
  418. iram:
  419. kfree(fw_save);
  420. return ret;
  421. }
  422. static int intel_sst_resume(struct device *dev)
  423. {
  424. struct intel_sst_drv *ctx = dev_get_drvdata(dev);
  425. struct sst_fw_save *fw_save = ctx->fw_save;
  426. int ret = 0;
  427. struct sst_block *block;
  428. if (!fw_save)
  429. return 0;
  430. sst_set_fw_state_locked(ctx, SST_FW_LOADING);
  431. /* we have to restore the memory saved */
  432. ctx->ops->reset(ctx);
  433. ctx->fw_save = NULL;
  434. memcpy32_toio(ctx->iram, fw_save->iram, ctx->iram_end - ctx->iram_base);
  435. memcpy32_toio(ctx->dram, fw_save->dram, ctx->dram_end - ctx->dram_base);
  436. memcpy32_toio(ctx->mailbox, fw_save->sram, SST_MAILBOX_SIZE);
  437. memcpy32_toio(ctx->ddr, fw_save->ddr, ctx->ddr_end - ctx->ddr_base);
  438. kfree(fw_save->sram);
  439. kfree(fw_save->dram);
  440. kfree(fw_save->iram);
  441. kfree(fw_save->ddr);
  442. kfree(fw_save);
  443. block = sst_create_block(ctx, 0, FW_DWNL_ID);
  444. if (block == NULL)
  445. return -ENOMEM;
  446. /* start and wait for ack */
  447. ctx->ops->start(ctx);
  448. ret = sst_wait_timeout(ctx, block);
  449. if (ret) {
  450. dev_err(ctx->dev, "fw download failed %d\n", ret);
  451. /* FW download failed due to timeout */
  452. ret = -EBUSY;
  453. } else {
  454. sst_set_fw_state_locked(ctx, SST_FW_RUNNING);
  455. }
  456. sst_free_block(ctx, block);
  457. return ret;
  458. }
  459. const struct dev_pm_ops intel_sst_pm = {
  460. .suspend = intel_sst_suspend,
  461. .resume = intel_sst_resume,
  462. .runtime_suspend = intel_sst_runtime_suspend,
  463. };
  464. EXPORT_SYMBOL_GPL(intel_sst_pm);