sm712fb.c 44 KB

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  1. /*
  2. * Silicon Motion SM7XX frame buffer device
  3. *
  4. * Copyright (C) 2006 Silicon Motion Technology Corp.
  5. * Authors: Ge Wang, gewang@siliconmotion.com
  6. * Boyod boyod.yang@siliconmotion.com.cn
  7. *
  8. * Copyright (C) 2009 Lemote, Inc.
  9. * Author: Wu Zhangjin, wuzhangjin@gmail.com
  10. *
  11. * Copyright (C) 2011 Igalia, S.L.
  12. * Author: Javier M. Mellid <jmunhoz@igalia.com>
  13. *
  14. * This file is subject to the terms and conditions of the GNU General Public
  15. * License. See the file COPYING in the main directory of this archive for
  16. * more details.
  17. *
  18. * Framebuffer driver for Silicon Motion SM710, SM712, SM721 and SM722 chips
  19. */
  20. #include <linux/io.h>
  21. #include <linux/fb.h>
  22. #include <linux/pci.h>
  23. #include <linux/init.h>
  24. #include <linux/slab.h>
  25. #include <linux/uaccess.h>
  26. #include <linux/module.h>
  27. #include <linux/console.h>
  28. #include <linux/screen_info.h>
  29. #ifdef CONFIG_PM
  30. #include <linux/pm.h>
  31. #endif
  32. #include "sm712.h"
  33. /*
  34. * Private structure
  35. */
  36. struct smtcfb_info {
  37. struct pci_dev *pdev;
  38. struct fb_info *fb;
  39. u16 chip_id;
  40. u8 chip_rev_id;
  41. void __iomem *lfb; /* linear frame buffer */
  42. void __iomem *dp_regs; /* drawing processor control regs */
  43. void __iomem *vp_regs; /* video processor control regs */
  44. void __iomem *cp_regs; /* capture processor control regs */
  45. void __iomem *mmio; /* memory map IO port */
  46. u_int width;
  47. u_int height;
  48. u_int hz;
  49. u32 colreg[17];
  50. };
  51. void __iomem *smtc_regbaseaddress; /* Memory Map IO starting address */
  52. static struct fb_var_screeninfo smtcfb_var = {
  53. .xres = 1024,
  54. .yres = 600,
  55. .xres_virtual = 1024,
  56. .yres_virtual = 600,
  57. .bits_per_pixel = 16,
  58. .red = {16, 8, 0},
  59. .green = {8, 8, 0},
  60. .blue = {0, 8, 0},
  61. .activate = FB_ACTIVATE_NOW,
  62. .height = -1,
  63. .width = -1,
  64. .vmode = FB_VMODE_NONINTERLACED,
  65. .nonstd = 0,
  66. .accel_flags = FB_ACCELF_TEXT,
  67. };
  68. static struct fb_fix_screeninfo smtcfb_fix = {
  69. .id = "smXXXfb",
  70. .type = FB_TYPE_PACKED_PIXELS,
  71. .visual = FB_VISUAL_TRUECOLOR,
  72. .line_length = 800 * 3,
  73. .accel = FB_ACCEL_SMI_LYNX,
  74. .type_aux = 0,
  75. .xpanstep = 0,
  76. .ypanstep = 0,
  77. .ywrapstep = 0,
  78. };
  79. struct vesa_mode {
  80. char index[6];
  81. u16 lfb_width;
  82. u16 lfb_height;
  83. u16 lfb_depth;
  84. };
  85. static const struct vesa_mode vesa_mode_table[] = {
  86. {"0x301", 640, 480, 8},
  87. {"0x303", 800, 600, 8},
  88. {"0x305", 1024, 768, 8},
  89. {"0x307", 1280, 1024, 8},
  90. {"0x311", 640, 480, 16},
  91. {"0x314", 800, 600, 16},
  92. {"0x317", 1024, 768, 16},
  93. {"0x31A", 1280, 1024, 16},
  94. {"0x312", 640, 480, 24},
  95. {"0x315", 800, 600, 24},
  96. {"0x318", 1024, 768, 24},
  97. {"0x31B", 1280, 1024, 24},
  98. };
  99. /**********************************************************************
  100. SM712 Mode table.
  101. **********************************************************************/
  102. static const struct modeinit vgamode[] = {
  103. {
  104. /* mode#0: 640 x 480 16Bpp 60Hz */
  105. 640, 480, 16, 60,
  106. /* Init_MISC */
  107. 0xE3,
  108. { /* Init_SR0_SR4 */
  109. 0x03, 0x01, 0x0F, 0x00, 0x0E,
  110. },
  111. { /* Init_SR10_SR24 */
  112. 0xFF, 0xBE, 0xEF, 0xFF, 0x00, 0x0E, 0x17, 0x2C,
  113. 0x99, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  114. 0xC4, 0x30, 0x02, 0x01, 0x01,
  115. },
  116. { /* Init_SR30_SR75 */
  117. 0x32, 0x03, 0xA0, 0x09, 0xC0, 0x32, 0x32, 0x32,
  118. 0x32, 0x32, 0x32, 0x32, 0x00, 0x00, 0x03, 0xFF,
  119. 0x00, 0xFC, 0x00, 0x00, 0x20, 0x18, 0x00, 0xFC,
  120. 0x20, 0x0C, 0x44, 0x20, 0x00, 0x32, 0x32, 0x32,
  121. 0x04, 0x24, 0x63, 0x4F, 0x52, 0x0B, 0xDF, 0xEA,
  122. 0x04, 0x50, 0x19, 0x32, 0x32, 0x00, 0x00, 0x32,
  123. 0x01, 0x80, 0x7E, 0x1A, 0x1A, 0x00, 0x00, 0x00,
  124. 0x50, 0x03, 0x74, 0x14, 0x07, 0x82, 0x07, 0x04,
  125. 0x00, 0x45, 0x30, 0x30, 0x40, 0x30,
  126. },
  127. { /* Init_SR80_SR93 */
  128. 0xFF, 0x07, 0x00, 0x6F, 0x7F, 0x7F, 0xFF, 0x32,
  129. 0xF7, 0x00, 0x00, 0x00, 0xEF, 0xFF, 0x32, 0x32,
  130. 0x00, 0x00, 0x00, 0x00,
  131. },
  132. { /* Init_SRA0_SRAF */
  133. 0x00, 0xFF, 0xBF, 0xFF, 0xFF, 0xED, 0xED, 0xED,
  134. 0x7B, 0xFF, 0xFF, 0xFF, 0xBF, 0xEF, 0xFF, 0xDF,
  135. },
  136. { /* Init_GR00_GR08 */
  137. 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F,
  138. 0xFF,
  139. },
  140. { /* Init_AR00_AR14 */
  141. 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
  142. 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
  143. 0x41, 0x00, 0x0F, 0x00, 0x00,
  144. },
  145. { /* Init_CR00_CR18 */
  146. 0x5F, 0x4F, 0x4F, 0x00, 0x53, 0x1F, 0x0B, 0x3E,
  147. 0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  148. 0xEA, 0x0C, 0xDF, 0x50, 0x40, 0xDF, 0x00, 0xE3,
  149. 0xFF,
  150. },
  151. { /* Init_CR30_CR4D */
  152. 0x00, 0x00, 0x00, 0x00, 0x00, 0x55, 0x03, 0x20,
  153. 0x00, 0x00, 0x00, 0x40, 0x00, 0xE7, 0xFF, 0xFD,
  154. 0x5F, 0x4F, 0x00, 0x54, 0x00, 0x0B, 0xDF, 0x00,
  155. 0xEA, 0x0C, 0x2E, 0x00, 0x4F, 0xDF,
  156. },
  157. { /* Init_CR90_CRA7 */
  158. 0x56, 0xDD, 0x5E, 0xEA, 0x87, 0x44, 0x8F, 0x55,
  159. 0x0A, 0x8F, 0x55, 0x0A, 0x00, 0x00, 0x18, 0x00,
  160. 0x11, 0x10, 0x0B, 0x0A, 0x0A, 0x0A, 0x0A, 0x00,
  161. },
  162. },
  163. {
  164. /* mode#1: 640 x 480 24Bpp 60Hz */
  165. 640, 480, 24, 60,
  166. /* Init_MISC */
  167. 0xE3,
  168. { /* Init_SR0_SR4 */
  169. 0x03, 0x01, 0x0F, 0x00, 0x0E,
  170. },
  171. { /* Init_SR10_SR24 */
  172. 0xFF, 0xBE, 0xEF, 0xFF, 0x00, 0x0E, 0x17, 0x2C,
  173. 0x99, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  174. 0xC4, 0x30, 0x02, 0x01, 0x01,
  175. },
  176. { /* Init_SR30_SR75 */
  177. 0x32, 0x03, 0xA0, 0x09, 0xC0, 0x32, 0x32, 0x32,
  178. 0x32, 0x32, 0x32, 0x32, 0x00, 0x00, 0x03, 0xFF,
  179. 0x00, 0xFC, 0x00, 0x00, 0x20, 0x18, 0x00, 0xFC,
  180. 0x20, 0x0C, 0x44, 0x20, 0x00, 0x32, 0x32, 0x32,
  181. 0x04, 0x24, 0x63, 0x4F, 0x52, 0x0B, 0xDF, 0xEA,
  182. 0x04, 0x50, 0x19, 0x32, 0x32, 0x00, 0x00, 0x32,
  183. 0x01, 0x80, 0x7E, 0x1A, 0x1A, 0x00, 0x00, 0x00,
  184. 0x50, 0x03, 0x74, 0x14, 0x07, 0x82, 0x07, 0x04,
  185. 0x00, 0x45, 0x30, 0x30, 0x40, 0x30,
  186. },
  187. { /* Init_SR80_SR93 */
  188. 0xFF, 0x07, 0x00, 0x6F, 0x7F, 0x7F, 0xFF, 0x32,
  189. 0xF7, 0x00, 0x00, 0x00, 0xEF, 0xFF, 0x32, 0x32,
  190. 0x00, 0x00, 0x00, 0x00,
  191. },
  192. { /* Init_SRA0_SRAF */
  193. 0x00, 0xFF, 0xBF, 0xFF, 0xFF, 0xED, 0xED, 0xED,
  194. 0x7B, 0xFF, 0xFF, 0xFF, 0xBF, 0xEF, 0xFF, 0xDF,
  195. },
  196. { /* Init_GR00_GR08 */
  197. 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F,
  198. 0xFF,
  199. },
  200. { /* Init_AR00_AR14 */
  201. 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
  202. 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
  203. 0x41, 0x00, 0x0F, 0x00, 0x00,
  204. },
  205. { /* Init_CR00_CR18 */
  206. 0x5F, 0x4F, 0x4F, 0x00, 0x53, 0x1F, 0x0B, 0x3E,
  207. 0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  208. 0xEA, 0x0C, 0xDF, 0x50, 0x40, 0xDF, 0x00, 0xE3,
  209. 0xFF,
  210. },
  211. { /* Init_CR30_CR4D */
  212. 0x00, 0x00, 0x00, 0x00, 0x00, 0x55, 0x03, 0x20,
  213. 0x00, 0x00, 0x00, 0x40, 0x00, 0xE7, 0xFF, 0xFD,
  214. 0x5F, 0x4F, 0x00, 0x54, 0x00, 0x0B, 0xDF, 0x00,
  215. 0xEA, 0x0C, 0x2E, 0x00, 0x4F, 0xDF,
  216. },
  217. { /* Init_CR90_CRA7 */
  218. 0x56, 0xDD, 0x5E, 0xEA, 0x87, 0x44, 0x8F, 0x55,
  219. 0x0A, 0x8F, 0x55, 0x0A, 0x00, 0x00, 0x18, 0x00,
  220. 0x11, 0x10, 0x0B, 0x0A, 0x0A, 0x0A, 0x0A, 0x00,
  221. },
  222. },
  223. {
  224. /* mode#0: 640 x 480 32Bpp 60Hz */
  225. 640, 480, 32, 60,
  226. /* Init_MISC */
  227. 0xE3,
  228. { /* Init_SR0_SR4 */
  229. 0x03, 0x01, 0x0F, 0x00, 0x0E,
  230. },
  231. { /* Init_SR10_SR24 */
  232. 0xFF, 0xBE, 0xEF, 0xFF, 0x00, 0x0E, 0x17, 0x2C,
  233. 0x99, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  234. 0xC4, 0x30, 0x02, 0x01, 0x01,
  235. },
  236. { /* Init_SR30_SR75 */
  237. 0x32, 0x03, 0xA0, 0x09, 0xC0, 0x32, 0x32, 0x32,
  238. 0x32, 0x32, 0x32, 0x32, 0x00, 0x00, 0x03, 0xFF,
  239. 0x00, 0xFC, 0x00, 0x00, 0x20, 0x18, 0x00, 0xFC,
  240. 0x20, 0x0C, 0x44, 0x20, 0x00, 0x32, 0x32, 0x32,
  241. 0x04, 0x24, 0x63, 0x4F, 0x52, 0x0B, 0xDF, 0xEA,
  242. 0x04, 0x50, 0x19, 0x32, 0x32, 0x00, 0x00, 0x32,
  243. 0x01, 0x80, 0x7E, 0x1A, 0x1A, 0x00, 0x00, 0x00,
  244. 0x50, 0x03, 0x74, 0x14, 0x07, 0x82, 0x07, 0x04,
  245. 0x00, 0x45, 0x30, 0x30, 0x40, 0x30,
  246. },
  247. { /* Init_SR80_SR93 */
  248. 0xFF, 0x07, 0x00, 0x6F, 0x7F, 0x7F, 0xFF, 0x32,
  249. 0xF7, 0x00, 0x00, 0x00, 0xEF, 0xFF, 0x32, 0x32,
  250. 0x00, 0x00, 0x00, 0x00,
  251. },
  252. { /* Init_SRA0_SRAF */
  253. 0x00, 0xFF, 0xBF, 0xFF, 0xFF, 0xED, 0xED, 0xED,
  254. 0x7B, 0xFF, 0xFF, 0xFF, 0xBF, 0xEF, 0xFF, 0xDF,
  255. },
  256. { /* Init_GR00_GR08 */
  257. 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F,
  258. 0xFF,
  259. },
  260. { /* Init_AR00_AR14 */
  261. 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
  262. 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
  263. 0x41, 0x00, 0x0F, 0x00, 0x00,
  264. },
  265. { /* Init_CR00_CR18 */
  266. 0x5F, 0x4F, 0x4F, 0x00, 0x53, 0x1F, 0x0B, 0x3E,
  267. 0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  268. 0xEA, 0x0C, 0xDF, 0x50, 0x40, 0xDF, 0x00, 0xE3,
  269. 0xFF,
  270. },
  271. { /* Init_CR30_CR4D */
  272. 0x00, 0x00, 0x00, 0x00, 0x00, 0x55, 0x03, 0x20,
  273. 0x00, 0x00, 0x00, 0x40, 0x00, 0xE7, 0xFF, 0xFD,
  274. 0x5F, 0x4F, 0x00, 0x54, 0x00, 0x0B, 0xDF, 0x00,
  275. 0xEA, 0x0C, 0x2E, 0x00, 0x4F, 0xDF,
  276. },
  277. { /* Init_CR90_CRA7 */
  278. 0x56, 0xDD, 0x5E, 0xEA, 0x87, 0x44, 0x8F, 0x55,
  279. 0x0A, 0x8F, 0x55, 0x0A, 0x00, 0x00, 0x18, 0x00,
  280. 0x11, 0x10, 0x0B, 0x0A, 0x0A, 0x0A, 0x0A, 0x00,
  281. },
  282. },
  283. { /* mode#2: 800 x 600 16Bpp 60Hz */
  284. 800, 600, 16, 60,
  285. /* Init_MISC */
  286. 0x2B,
  287. { /* Init_SR0_SR4 */
  288. 0x03, 0x01, 0x0F, 0x03, 0x0E,
  289. },
  290. { /* Init_SR10_SR24 */
  291. 0xFF, 0xBE, 0xEE, 0xFF, 0x00, 0x0E, 0x17, 0x2C,
  292. 0x99, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
  293. 0xC4, 0x30, 0x02, 0x01, 0x01,
  294. },
  295. { /* Init_SR30_SR75 */
  296. 0x34, 0x03, 0x20, 0x09, 0xC0, 0x24, 0x24, 0x24,
  297. 0x24, 0x24, 0x24, 0x24, 0x00, 0x00, 0x03, 0xFF,
  298. 0x00, 0xFC, 0x00, 0x00, 0x20, 0x38, 0x00, 0xFC,
  299. 0x20, 0x0C, 0x44, 0x20, 0x00, 0x24, 0x24, 0x24,
  300. 0x04, 0x48, 0x83, 0x63, 0x68, 0x72, 0x57, 0x58,
  301. 0x04, 0x55, 0x59, 0x24, 0x24, 0x00, 0x00, 0x24,
  302. 0x01, 0x80, 0x7A, 0x1A, 0x1A, 0x00, 0x00, 0x00,
  303. 0x50, 0x03, 0x74, 0x14, 0x1C, 0x85, 0x35, 0x13,
  304. 0x02, 0x45, 0x30, 0x35, 0x40, 0x20,
  305. },
  306. { /* Init_SR80_SR93 */
  307. 0x00, 0x00, 0x00, 0x6F, 0x7F, 0x7F, 0xFF, 0x24,
  308. 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0x24, 0x24,
  309. 0x00, 0x00, 0x00, 0x00,
  310. },
  311. { /* Init_SRA0_SRAF */
  312. 0x00, 0xFF, 0xBF, 0xFF, 0xFF, 0xED, 0xED, 0xED,
  313. 0x7B, 0xFF, 0xFF, 0xFF, 0xBF, 0xEF, 0xBF, 0xDF,
  314. },
  315. { /* Init_GR00_GR08 */
  316. 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F,
  317. 0xFF,
  318. },
  319. { /* Init_AR00_AR14 */
  320. 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
  321. 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
  322. 0x41, 0x00, 0x0F, 0x00, 0x00,
  323. },
  324. { /* Init_CR00_CR18 */
  325. 0x7F, 0x63, 0x63, 0x00, 0x68, 0x18, 0x72, 0xF0,
  326. 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  327. 0x58, 0x0C, 0x57, 0x64, 0x40, 0x57, 0x00, 0xE3,
  328. 0xFF,
  329. },
  330. { /* Init_CR30_CR4D */
  331. 0x00, 0x00, 0x00, 0x00, 0x00, 0x33, 0x03, 0x20,
  332. 0x00, 0x00, 0x00, 0x40, 0x00, 0xE7, 0xBF, 0xFD,
  333. 0x7F, 0x63, 0x00, 0x69, 0x18, 0x72, 0x57, 0x00,
  334. 0x58, 0x0C, 0xE0, 0x20, 0x63, 0x57,
  335. },
  336. { /* Init_CR90_CRA7 */
  337. 0x56, 0x4B, 0x5E, 0x55, 0x86, 0x9D, 0x8E, 0xAA,
  338. 0xDB, 0x2A, 0xDF, 0x33, 0x00, 0x00, 0x18, 0x00,
  339. 0x20, 0x1F, 0x1A, 0x19, 0x0F, 0x0F, 0x0F, 0x00,
  340. },
  341. },
  342. { /* mode#3: 800 x 600 24Bpp 60Hz */
  343. 800, 600, 24, 60,
  344. 0x2B,
  345. { /* Init_SR0_SR4 */
  346. 0x03, 0x01, 0x0F, 0x03, 0x0E,
  347. },
  348. { /* Init_SR10_SR24 */
  349. 0xFF, 0xBE, 0xEE, 0xFF, 0x00, 0x0E, 0x17, 0x2C,
  350. 0x99, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  351. 0xC4, 0x30, 0x02, 0x01, 0x01,
  352. },
  353. { /* Init_SR30_SR75 */
  354. 0x36, 0x03, 0x20, 0x09, 0xC0, 0x36, 0x36, 0x36,
  355. 0x36, 0x36, 0x36, 0x36, 0x00, 0x00, 0x03, 0xFF,
  356. 0x00, 0xFC, 0x00, 0x00, 0x20, 0x18, 0x00, 0xFC,
  357. 0x20, 0x0C, 0x44, 0x20, 0x00, 0x36, 0x36, 0x36,
  358. 0x04, 0x48, 0x83, 0x63, 0x68, 0x72, 0x57, 0x58,
  359. 0x04, 0x55, 0x59, 0x36, 0x36, 0x00, 0x00, 0x36,
  360. 0x01, 0x80, 0x7E, 0x1A, 0x1A, 0x00, 0x00, 0x00,
  361. 0x50, 0x03, 0x74, 0x14, 0x1C, 0x85, 0x35, 0x13,
  362. 0x02, 0x45, 0x30, 0x30, 0x40, 0x20,
  363. },
  364. { /* Init_SR80_SR93 */
  365. 0xFF, 0x07, 0x00, 0x6F, 0x7F, 0x7F, 0xFF, 0x36,
  366. 0xF7, 0x00, 0x00, 0x00, 0xEF, 0xFF, 0x36, 0x36,
  367. 0x00, 0x00, 0x00, 0x00,
  368. },
  369. { /* Init_SRA0_SRAF */
  370. 0x00, 0xFF, 0xBF, 0xFF, 0xFF, 0xED, 0xED, 0xED,
  371. 0x7B, 0xFF, 0xFF, 0xFF, 0xBF, 0xEF, 0xBF, 0xDF,
  372. },
  373. { /* Init_GR00_GR08 */
  374. 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F,
  375. 0xFF,
  376. },
  377. { /* Init_AR00_AR14 */
  378. 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
  379. 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
  380. 0x41, 0x00, 0x0F, 0x00, 0x00,
  381. },
  382. { /* Init_CR00_CR18 */
  383. 0x7F, 0x63, 0x63, 0x00, 0x68, 0x18, 0x72, 0xF0,
  384. 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  385. 0x58, 0x0C, 0x57, 0x64, 0x40, 0x57, 0x00, 0xE3,
  386. 0xFF,
  387. },
  388. { /* Init_CR30_CR4D */
  389. 0x00, 0x00, 0x00, 0x00, 0x00, 0x33, 0x03, 0x20,
  390. 0x00, 0x00, 0x00, 0x40, 0x00, 0xE7, 0xBF, 0xFD,
  391. 0x7F, 0x63, 0x00, 0x69, 0x18, 0x72, 0x57, 0x00,
  392. 0x58, 0x0C, 0xE0, 0x20, 0x63, 0x57,
  393. },
  394. { /* Init_CR90_CRA7 */
  395. 0x56, 0x4B, 0x5E, 0x55, 0x86, 0x9D, 0x8E, 0xAA,
  396. 0xDB, 0x2A, 0xDF, 0x33, 0x00, 0x00, 0x18, 0x00,
  397. 0x20, 0x1F, 0x1A, 0x19, 0x0F, 0x0F, 0x0F, 0x00,
  398. },
  399. },
  400. { /* mode#7: 800 x 600 32Bpp 60Hz */
  401. 800, 600, 32, 60,
  402. /* Init_MISC */
  403. 0x2B,
  404. { /* Init_SR0_SR4 */
  405. 0x03, 0x01, 0x0F, 0x03, 0x0E,
  406. },
  407. { /* Init_SR10_SR24 */
  408. 0xFF, 0xBE, 0xEE, 0xFF, 0x00, 0x0E, 0x17, 0x2C,
  409. 0x99, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
  410. 0xC4, 0x30, 0x02, 0x01, 0x01,
  411. },
  412. { /* Init_SR30_SR75 */
  413. 0x34, 0x03, 0x20, 0x09, 0xC0, 0x24, 0x24, 0x24,
  414. 0x24, 0x24, 0x24, 0x24, 0x00, 0x00, 0x03, 0xFF,
  415. 0x00, 0xFC, 0x00, 0x00, 0x20, 0x38, 0x00, 0xFC,
  416. 0x20, 0x0C, 0x44, 0x20, 0x00, 0x24, 0x24, 0x24,
  417. 0x04, 0x48, 0x83, 0x63, 0x68, 0x72, 0x57, 0x58,
  418. 0x04, 0x55, 0x59, 0x24, 0x24, 0x00, 0x00, 0x24,
  419. 0x01, 0x80, 0x7A, 0x1A, 0x1A, 0x00, 0x00, 0x00,
  420. 0x50, 0x03, 0x74, 0x14, 0x1C, 0x85, 0x35, 0x13,
  421. 0x02, 0x45, 0x30, 0x35, 0x40, 0x20,
  422. },
  423. { /* Init_SR80_SR93 */
  424. 0x00, 0x00, 0x00, 0x6F, 0x7F, 0x7F, 0xFF, 0x24,
  425. 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0x24, 0x24,
  426. 0x00, 0x00, 0x00, 0x00,
  427. },
  428. { /* Init_SRA0_SRAF */
  429. 0x00, 0xFF, 0xBF, 0xFF, 0xFF, 0xED, 0xED, 0xED,
  430. 0x7B, 0xFF, 0xFF, 0xFF, 0xBF, 0xEF, 0xBF, 0xDF,
  431. },
  432. { /* Init_GR00_GR08 */
  433. 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F,
  434. 0xFF,
  435. },
  436. { /* Init_AR00_AR14 */
  437. 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
  438. 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
  439. 0x41, 0x00, 0x0F, 0x00, 0x00,
  440. },
  441. { /* Init_CR00_CR18 */
  442. 0x7F, 0x63, 0x63, 0x00, 0x68, 0x18, 0x72, 0xF0,
  443. 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  444. 0x58, 0x0C, 0x57, 0x64, 0x40, 0x57, 0x00, 0xE3,
  445. 0xFF,
  446. },
  447. { /* Init_CR30_CR4D */
  448. 0x00, 0x00, 0x00, 0x00, 0x00, 0x33, 0x03, 0x20,
  449. 0x00, 0x00, 0x00, 0x40, 0x00, 0xE7, 0xBF, 0xFD,
  450. 0x7F, 0x63, 0x00, 0x69, 0x18, 0x72, 0x57, 0x00,
  451. 0x58, 0x0C, 0xE0, 0x20, 0x63, 0x57,
  452. },
  453. { /* Init_CR90_CRA7 */
  454. 0x56, 0x4B, 0x5E, 0x55, 0x86, 0x9D, 0x8E, 0xAA,
  455. 0xDB, 0x2A, 0xDF, 0x33, 0x00, 0x00, 0x18, 0x00,
  456. 0x20, 0x1F, 0x1A, 0x19, 0x0F, 0x0F, 0x0F, 0x00,
  457. },
  458. },
  459. /* We use 1024x768 table to light 1024x600 panel for lemote */
  460. { /* mode#4: 1024 x 600 16Bpp 60Hz */
  461. 1024, 600, 16, 60,
  462. /* Init_MISC */
  463. 0xEB,
  464. { /* Init_SR0_SR4 */
  465. 0x03, 0x01, 0x0F, 0x00, 0x0E,
  466. },
  467. { /* Init_SR10_SR24 */
  468. 0xC8, 0x40, 0x14, 0x60, 0x00, 0x0A, 0x17, 0x20,
  469. 0x51, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
  470. 0xC4, 0x30, 0x02, 0x00, 0x01,
  471. },
  472. { /* Init_SR30_SR75 */
  473. 0x22, 0x03, 0x24, 0x09, 0xC0, 0x22, 0x22, 0x22,
  474. 0x22, 0x22, 0x22, 0x22, 0x00, 0x00, 0x03, 0xFF,
  475. 0x00, 0xFC, 0x00, 0x00, 0x20, 0x18, 0x00, 0xFC,
  476. 0x20, 0x0C, 0x44, 0x20, 0x00, 0x22, 0x22, 0x22,
  477. 0x06, 0x68, 0xA7, 0x7F, 0x83, 0x24, 0xFF, 0x03,
  478. 0x00, 0x60, 0x59, 0x22, 0x22, 0x00, 0x00, 0x22,
  479. 0x01, 0x80, 0x7A, 0x1A, 0x1A, 0x00, 0x00, 0x00,
  480. 0x50, 0x03, 0x16, 0x02, 0x0D, 0x82, 0x09, 0x02,
  481. 0x04, 0x45, 0x3F, 0x30, 0x40, 0x20,
  482. },
  483. { /* Init_SR80_SR93 */
  484. 0xFF, 0x07, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x3A,
  485. 0xF7, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0x3A, 0x3A,
  486. 0x00, 0x00, 0x00, 0x00,
  487. },
  488. { /* Init_SRA0_SRAF */
  489. 0x00, 0xFB, 0x9F, 0x01, 0x00, 0xED, 0xED, 0xED,
  490. 0x7B, 0xFB, 0xFF, 0xFF, 0x97, 0xEF, 0xBF, 0xDF,
  491. },
  492. { /* Init_GR00_GR08 */
  493. 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F,
  494. 0xFF,
  495. },
  496. { /* Init_AR00_AR14 */
  497. 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
  498. 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
  499. 0x41, 0x00, 0x0F, 0x00, 0x00,
  500. },
  501. { /* Init_CR00_CR18 */
  502. 0xA3, 0x7F, 0x7F, 0x00, 0x85, 0x16, 0x24, 0xF5,
  503. 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  504. 0x03, 0x09, 0xFF, 0x80, 0x40, 0xFF, 0x00, 0xE3,
  505. 0xFF,
  506. },
  507. { /* Init_CR30_CR4D */
  508. 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x02, 0x20,
  509. 0x00, 0x00, 0x00, 0x40, 0x00, 0xFF, 0xBF, 0xFF,
  510. 0xA3, 0x7F, 0x00, 0x82, 0x0b, 0x6f, 0x57, 0x00,
  511. 0x5c, 0x0f, 0xE0, 0xe0, 0x7F, 0x57,
  512. },
  513. { /* Init_CR90_CRA7 */
  514. 0x55, 0xD9, 0x5D, 0xE1, 0x86, 0x1B, 0x8E, 0x26,
  515. 0xDA, 0x8D, 0xDE, 0x94, 0x00, 0x00, 0x18, 0x00,
  516. 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x15, 0x03,
  517. },
  518. },
  519. { /* mode#5: 1024 x 768 24Bpp 60Hz */
  520. 1024, 768, 24, 60,
  521. /* Init_MISC */
  522. 0xEB,
  523. { /* Init_SR0_SR4 */
  524. 0x03, 0x01, 0x0F, 0x03, 0x0E,
  525. },
  526. { /* Init_SR10_SR24 */
  527. 0xF3, 0xB6, 0xC0, 0xDD, 0x00, 0x0E, 0x17, 0x2C,
  528. 0x99, 0x02, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
  529. 0xC4, 0x30, 0x02, 0x01, 0x01,
  530. },
  531. { /* Init_SR30_SR75 */
  532. 0x38, 0x03, 0x20, 0x09, 0xC0, 0x3A, 0x3A, 0x3A,
  533. 0x3A, 0x3A, 0x3A, 0x3A, 0x00, 0x00, 0x03, 0xFF,
  534. 0x00, 0xFC, 0x00, 0x00, 0x20, 0x18, 0x00, 0xFC,
  535. 0x20, 0x0C, 0x44, 0x20, 0x00, 0x00, 0x00, 0x3A,
  536. 0x06, 0x68, 0xA7, 0x7F, 0x83, 0x24, 0xFF, 0x03,
  537. 0x00, 0x60, 0x59, 0x3A, 0x3A, 0x00, 0x00, 0x3A,
  538. 0x01, 0x80, 0x7E, 0x1A, 0x1A, 0x00, 0x00, 0x00,
  539. 0x50, 0x03, 0x74, 0x14, 0x3B, 0x0D, 0x09, 0x02,
  540. 0x04, 0x45, 0x30, 0x30, 0x40, 0x20,
  541. },
  542. { /* Init_SR80_SR93 */
  543. 0xFF, 0x07, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x3A,
  544. 0xF7, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0x3A, 0x3A,
  545. 0x00, 0x00, 0x00, 0x00,
  546. },
  547. { /* Init_SRA0_SRAF */
  548. 0x00, 0xFB, 0x9F, 0x01, 0x00, 0xED, 0xED, 0xED,
  549. 0x7B, 0xFB, 0xFF, 0xFF, 0x97, 0xEF, 0xBF, 0xDF,
  550. },
  551. { /* Init_GR00_GR08 */
  552. 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F,
  553. 0xFF,
  554. },
  555. { /* Init_AR00_AR14 */
  556. 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
  557. 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
  558. 0x41, 0x00, 0x0F, 0x00, 0x00,
  559. },
  560. { /* Init_CR00_CR18 */
  561. 0xA3, 0x7F, 0x7F, 0x00, 0x85, 0x16, 0x24, 0xF5,
  562. 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  563. 0x03, 0x09, 0xFF, 0x80, 0x40, 0xFF, 0x00, 0xE3,
  564. 0xFF,
  565. },
  566. { /* Init_CR30_CR4D */
  567. 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x02, 0x20,
  568. 0x00, 0x00, 0x00, 0x40, 0x00, 0xFF, 0xBF, 0xFF,
  569. 0xA3, 0x7F, 0x00, 0x86, 0x15, 0x24, 0xFF, 0x00,
  570. 0x01, 0x07, 0xE5, 0x20, 0x7F, 0xFF,
  571. },
  572. { /* Init_CR90_CRA7 */
  573. 0x55, 0xD9, 0x5D, 0xE1, 0x86, 0x1B, 0x8E, 0x26,
  574. 0xDA, 0x8D, 0xDE, 0x94, 0x00, 0x00, 0x18, 0x00,
  575. 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x15, 0x03,
  576. },
  577. },
  578. { /* mode#4: 1024 x 768 32Bpp 60Hz */
  579. 1024, 768, 32, 60,
  580. /* Init_MISC */
  581. 0xEB,
  582. { /* Init_SR0_SR4 */
  583. 0x03, 0x01, 0x0F, 0x03, 0x0E,
  584. },
  585. { /* Init_SR10_SR24 */
  586. 0xF3, 0xB6, 0xC0, 0xDD, 0x00, 0x0E, 0x17, 0x2C,
  587. 0x99, 0x02, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
  588. 0xC4, 0x32, 0x02, 0x01, 0x01,
  589. },
  590. { /* Init_SR30_SR75 */
  591. 0x38, 0x03, 0x20, 0x09, 0xC0, 0x3A, 0x3A, 0x3A,
  592. 0x3A, 0x3A, 0x3A, 0x3A, 0x00, 0x00, 0x03, 0xFF,
  593. 0x00, 0xFC, 0x00, 0x00, 0x20, 0x18, 0x00, 0xFC,
  594. 0x20, 0x0C, 0x44, 0x20, 0x00, 0x00, 0x00, 0x3A,
  595. 0x06, 0x68, 0xA7, 0x7F, 0x83, 0x24, 0xFF, 0x03,
  596. 0x00, 0x60, 0x59, 0x3A, 0x3A, 0x00, 0x00, 0x3A,
  597. 0x01, 0x80, 0x7E, 0x1A, 0x1A, 0x00, 0x00, 0x00,
  598. 0x50, 0x03, 0x74, 0x14, 0x3B, 0x0D, 0x09, 0x02,
  599. 0x04, 0x45, 0x30, 0x30, 0x40, 0x20,
  600. },
  601. { /* Init_SR80_SR93 */
  602. 0xFF, 0x07, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x3A,
  603. 0xF7, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0x3A, 0x3A,
  604. 0x00, 0x00, 0x00, 0x00,
  605. },
  606. { /* Init_SRA0_SRAF */
  607. 0x00, 0xFB, 0x9F, 0x01, 0x00, 0xED, 0xED, 0xED,
  608. 0x7B, 0xFB, 0xFF, 0xFF, 0x97, 0xEF, 0xBF, 0xDF,
  609. },
  610. { /* Init_GR00_GR08 */
  611. 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F,
  612. 0xFF,
  613. },
  614. { /* Init_AR00_AR14 */
  615. 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
  616. 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
  617. 0x41, 0x00, 0x0F, 0x00, 0x00,
  618. },
  619. { /* Init_CR00_CR18 */
  620. 0xA3, 0x7F, 0x7F, 0x00, 0x85, 0x16, 0x24, 0xF5,
  621. 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  622. 0x03, 0x09, 0xFF, 0x80, 0x40, 0xFF, 0x00, 0xE3,
  623. 0xFF,
  624. },
  625. { /* Init_CR30_CR4D */
  626. 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x02, 0x20,
  627. 0x00, 0x00, 0x00, 0x40, 0x00, 0xFF, 0xBF, 0xFF,
  628. 0xA3, 0x7F, 0x00, 0x86, 0x15, 0x24, 0xFF, 0x00,
  629. 0x01, 0x07, 0xE5, 0x20, 0x7F, 0xFF,
  630. },
  631. { /* Init_CR90_CRA7 */
  632. 0x55, 0xD9, 0x5D, 0xE1, 0x86, 0x1B, 0x8E, 0x26,
  633. 0xDA, 0x8D, 0xDE, 0x94, 0x00, 0x00, 0x18, 0x00,
  634. 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x15, 0x03,
  635. },
  636. },
  637. { /* mode#6: 320 x 240 16Bpp 60Hz */
  638. 320, 240, 16, 60,
  639. /* Init_MISC */
  640. 0xEB,
  641. { /* Init_SR0_SR4 */
  642. 0x03, 0x01, 0x0F, 0x03, 0x0E,
  643. },
  644. { /* Init_SR10_SR24 */
  645. 0xF3, 0xB6, 0xC0, 0xDD, 0x00, 0x0E, 0x17, 0x2C,
  646. 0x99, 0x02, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
  647. 0xC4, 0x32, 0x02, 0x01, 0x01,
  648. },
  649. { /* Init_SR30_SR75 */
  650. 0x38, 0x03, 0x20, 0x09, 0xC0, 0x3A, 0x3A, 0x3A,
  651. 0x3A, 0x3A, 0x3A, 0x3A, 0x00, 0x00, 0x03, 0xFF,
  652. 0x00, 0xFC, 0x00, 0x00, 0x20, 0x18, 0x00, 0xFC,
  653. 0x20, 0x0C, 0x44, 0x20, 0x00, 0x00, 0x00, 0x3A,
  654. 0x06, 0x68, 0xA7, 0x7F, 0x83, 0x24, 0xFF, 0x03,
  655. 0x00, 0x60, 0x59, 0x3A, 0x3A, 0x00, 0x00, 0x3A,
  656. 0x01, 0x80, 0x7E, 0x1A, 0x1A, 0x00, 0x00, 0x00,
  657. 0x50, 0x03, 0x74, 0x14, 0x08, 0x43, 0x08, 0x43,
  658. 0x04, 0x45, 0x30, 0x30, 0x40, 0x20,
  659. },
  660. { /* Init_SR80_SR93 */
  661. 0xFF, 0x07, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x3A,
  662. 0xF7, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0x3A, 0x3A,
  663. 0x00, 0x00, 0x00, 0x00,
  664. },
  665. { /* Init_SRA0_SRAF */
  666. 0x00, 0xFB, 0x9F, 0x01, 0x00, 0xED, 0xED, 0xED,
  667. 0x7B, 0xFB, 0xFF, 0xFF, 0x97, 0xEF, 0xBF, 0xDF,
  668. },
  669. { /* Init_GR00_GR08 */
  670. 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F,
  671. 0xFF,
  672. },
  673. { /* Init_AR00_AR14 */
  674. 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
  675. 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
  676. 0x41, 0x00, 0x0F, 0x00, 0x00,
  677. },
  678. { /* Init_CR00_CR18 */
  679. 0xA3, 0x7F, 0x7F, 0x00, 0x85, 0x16, 0x24, 0xF5,
  680. 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  681. 0x03, 0x09, 0xFF, 0x80, 0x40, 0xFF, 0x00, 0xE3,
  682. 0xFF,
  683. },
  684. { /* Init_CR30_CR4D */
  685. 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x02, 0x20,
  686. 0x00, 0x00, 0x30, 0x40, 0x00, 0xFF, 0xBF, 0xFF,
  687. 0x2E, 0x27, 0x00, 0x2b, 0x0c, 0x0F, 0xEF, 0x00,
  688. 0xFe, 0x0f, 0x01, 0xC0, 0x27, 0xEF,
  689. },
  690. { /* Init_CR90_CRA7 */
  691. 0x55, 0xD9, 0x5D, 0xE1, 0x86, 0x1B, 0x8E, 0x26,
  692. 0xDA, 0x8D, 0xDE, 0x94, 0x00, 0x00, 0x18, 0x00,
  693. 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x15, 0x03,
  694. },
  695. },
  696. { /* mode#8: 320 x 240 32Bpp 60Hz */
  697. 320, 240, 32, 60,
  698. /* Init_MISC */
  699. 0xEB,
  700. { /* Init_SR0_SR4 */
  701. 0x03, 0x01, 0x0F, 0x03, 0x0E,
  702. },
  703. { /* Init_SR10_SR24 */
  704. 0xF3, 0xB6, 0xC0, 0xDD, 0x00, 0x0E, 0x17, 0x2C,
  705. 0x99, 0x02, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
  706. 0xC4, 0x32, 0x02, 0x01, 0x01,
  707. },
  708. { /* Init_SR30_SR75 */
  709. 0x38, 0x03, 0x20, 0x09, 0xC0, 0x3A, 0x3A, 0x3A,
  710. 0x3A, 0x3A, 0x3A, 0x3A, 0x00, 0x00, 0x03, 0xFF,
  711. 0x00, 0xFC, 0x00, 0x00, 0x20, 0x18, 0x00, 0xFC,
  712. 0x20, 0x0C, 0x44, 0x20, 0x00, 0x00, 0x00, 0x3A,
  713. 0x06, 0x68, 0xA7, 0x7F, 0x83, 0x24, 0xFF, 0x03,
  714. 0x00, 0x60, 0x59, 0x3A, 0x3A, 0x00, 0x00, 0x3A,
  715. 0x01, 0x80, 0x7E, 0x1A, 0x1A, 0x00, 0x00, 0x00,
  716. 0x50, 0x03, 0x74, 0x14, 0x08, 0x43, 0x08, 0x43,
  717. 0x04, 0x45, 0x30, 0x30, 0x40, 0x20,
  718. },
  719. { /* Init_SR80_SR93 */
  720. 0xFF, 0x07, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x3A,
  721. 0xF7, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0x3A, 0x3A,
  722. 0x00, 0x00, 0x00, 0x00,
  723. },
  724. { /* Init_SRA0_SRAF */
  725. 0x00, 0xFB, 0x9F, 0x01, 0x00, 0xED, 0xED, 0xED,
  726. 0x7B, 0xFB, 0xFF, 0xFF, 0x97, 0xEF, 0xBF, 0xDF,
  727. },
  728. { /* Init_GR00_GR08 */
  729. 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F,
  730. 0xFF,
  731. },
  732. { /* Init_AR00_AR14 */
  733. 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
  734. 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
  735. 0x41, 0x00, 0x0F, 0x00, 0x00,
  736. },
  737. { /* Init_CR00_CR18 */
  738. 0xA3, 0x7F, 0x7F, 0x00, 0x85, 0x16, 0x24, 0xF5,
  739. 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  740. 0x03, 0x09, 0xFF, 0x80, 0x40, 0xFF, 0x00, 0xE3,
  741. 0xFF,
  742. },
  743. { /* Init_CR30_CR4D */
  744. 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x02, 0x20,
  745. 0x00, 0x00, 0x30, 0x40, 0x00, 0xFF, 0xBF, 0xFF,
  746. 0x2E, 0x27, 0x00, 0x2b, 0x0c, 0x0F, 0xEF, 0x00,
  747. 0xFe, 0x0f, 0x01, 0xC0, 0x27, 0xEF,
  748. },
  749. { /* Init_CR90_CRA7 */
  750. 0x55, 0xD9, 0x5D, 0xE1, 0x86, 0x1B, 0x8E, 0x26,
  751. 0xDA, 0x8D, 0xDE, 0x94, 0x00, 0x00, 0x18, 0x00,
  752. 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x15, 0x03,
  753. },
  754. },
  755. };
  756. static struct screen_info smtc_scr_info;
  757. static char *mode_option;
  758. /* process command line options, get vga parameter */
  759. static void __init sm7xx_vga_setup(char *options)
  760. {
  761. int i;
  762. if (!options || !*options)
  763. return;
  764. smtc_scr_info.lfb_width = 0;
  765. smtc_scr_info.lfb_height = 0;
  766. smtc_scr_info.lfb_depth = 0;
  767. pr_debug("sm7xx_vga_setup = %s\n", options);
  768. for (i = 0; i < ARRAY_SIZE(vesa_mode_table); i++) {
  769. if (strstr(options, vesa_mode_table[i].index)) {
  770. smtc_scr_info.lfb_width = vesa_mode_table[i].lfb_width;
  771. smtc_scr_info.lfb_height =
  772. vesa_mode_table[i].lfb_height;
  773. smtc_scr_info.lfb_depth = vesa_mode_table[i].lfb_depth;
  774. return;
  775. }
  776. }
  777. }
  778. static void sm712_setpalette(int regno, unsigned red, unsigned green,
  779. unsigned blue, struct fb_info *info)
  780. {
  781. /* set bit 5:4 = 01 (write LCD RAM only) */
  782. smtc_seqw(0x66, (smtc_seqr(0x66) & 0xC3) | 0x10);
  783. smtc_mmiowb(regno, dac_reg);
  784. smtc_mmiowb(red >> 10, dac_val);
  785. smtc_mmiowb(green >> 10, dac_val);
  786. smtc_mmiowb(blue >> 10, dac_val);
  787. }
  788. /* chan_to_field
  789. *
  790. * convert a colour value into a field position
  791. *
  792. * from pxafb.c
  793. */
  794. static inline unsigned int chan_to_field(unsigned int chan,
  795. struct fb_bitfield *bf)
  796. {
  797. chan &= 0xffff;
  798. chan >>= 16 - bf->length;
  799. return chan << bf->offset;
  800. }
  801. static int smtc_blank(int blank_mode, struct fb_info *info)
  802. {
  803. /* clear DPMS setting */
  804. switch (blank_mode) {
  805. case FB_BLANK_UNBLANK:
  806. /* Screen On: HSync: On, VSync : On */
  807. smtc_seqw(0x01, (smtc_seqr(0x01) & (~0x20)));
  808. smtc_seqw(0x6a, 0x16);
  809. smtc_seqw(0x6b, 0x02);
  810. smtc_seqw(0x21, (smtc_seqr(0x21) & 0x77));
  811. smtc_seqw(0x22, (smtc_seqr(0x22) & (~0x30)));
  812. smtc_seqw(0x23, (smtc_seqr(0x23) & (~0xc0)));
  813. smtc_seqw(0x24, (smtc_seqr(0x24) | 0x01));
  814. smtc_seqw(0x31, (smtc_seqr(0x31) | 0x03));
  815. break;
  816. case FB_BLANK_NORMAL:
  817. /* Screen Off: HSync: On, VSync : On Soft blank */
  818. smtc_seqw(0x01, (smtc_seqr(0x01) & (~0x20)));
  819. smtc_seqw(0x6a, 0x16);
  820. smtc_seqw(0x6b, 0x02);
  821. smtc_seqw(0x22, (smtc_seqr(0x22) & (~0x30)));
  822. smtc_seqw(0x23, (smtc_seqr(0x23) & (~0xc0)));
  823. smtc_seqw(0x24, (smtc_seqr(0x24) | 0x01));
  824. smtc_seqw(0x31, ((smtc_seqr(0x31) & (~0x07)) | 0x00));
  825. break;
  826. case FB_BLANK_VSYNC_SUSPEND:
  827. /* Screen On: HSync: On, VSync : Off */
  828. smtc_seqw(0x01, (smtc_seqr(0x01) | 0x20));
  829. smtc_seqw(0x20, (smtc_seqr(0x20) & (~0xB0)));
  830. smtc_seqw(0x6a, 0x0c);
  831. smtc_seqw(0x6b, 0x02);
  832. smtc_seqw(0x21, (smtc_seqr(0x21) | 0x88));
  833. smtc_seqw(0x22, ((smtc_seqr(0x22) & (~0x30)) | 0x20));
  834. smtc_seqw(0x23, ((smtc_seqr(0x23) & (~0xc0)) | 0x20));
  835. smtc_seqw(0x24, (smtc_seqr(0x24) & (~0x01)));
  836. smtc_seqw(0x31, ((smtc_seqr(0x31) & (~0x07)) | 0x00));
  837. smtc_seqw(0x34, (smtc_seqr(0x34) | 0x80));
  838. break;
  839. case FB_BLANK_HSYNC_SUSPEND:
  840. /* Screen On: HSync: Off, VSync : On */
  841. smtc_seqw(0x01, (smtc_seqr(0x01) | 0x20));
  842. smtc_seqw(0x20, (smtc_seqr(0x20) & (~0xB0)));
  843. smtc_seqw(0x6a, 0x0c);
  844. smtc_seqw(0x6b, 0x02);
  845. smtc_seqw(0x21, (smtc_seqr(0x21) | 0x88));
  846. smtc_seqw(0x22, ((smtc_seqr(0x22) & (~0x30)) | 0x10));
  847. smtc_seqw(0x23, ((smtc_seqr(0x23) & (~0xc0)) | 0xD8));
  848. smtc_seqw(0x24, (smtc_seqr(0x24) & (~0x01)));
  849. smtc_seqw(0x31, ((smtc_seqr(0x31) & (~0x07)) | 0x00));
  850. smtc_seqw(0x34, (smtc_seqr(0x34) | 0x80));
  851. break;
  852. case FB_BLANK_POWERDOWN:
  853. /* Screen On: HSync: Off, VSync : Off */
  854. smtc_seqw(0x01, (smtc_seqr(0x01) | 0x20));
  855. smtc_seqw(0x20, (smtc_seqr(0x20) & (~0xB0)));
  856. smtc_seqw(0x6a, 0x0c);
  857. smtc_seqw(0x6b, 0x02);
  858. smtc_seqw(0x21, (smtc_seqr(0x21) | 0x88));
  859. smtc_seqw(0x22, ((smtc_seqr(0x22) & (~0x30)) | 0x30));
  860. smtc_seqw(0x23, ((smtc_seqr(0x23) & (~0xc0)) | 0xD8));
  861. smtc_seqw(0x24, (smtc_seqr(0x24) & (~0x01)));
  862. smtc_seqw(0x31, ((smtc_seqr(0x31) & (~0x07)) | 0x00));
  863. smtc_seqw(0x34, (smtc_seqr(0x34) | 0x80));
  864. break;
  865. default:
  866. return -EINVAL;
  867. }
  868. return 0;
  869. }
  870. static int smtc_setcolreg(unsigned regno, unsigned red, unsigned green,
  871. unsigned blue, unsigned trans, struct fb_info *info)
  872. {
  873. struct smtcfb_info *sfb;
  874. u32 val;
  875. sfb = info->par;
  876. if (regno > 255)
  877. return 1;
  878. switch (sfb->fb->fix.visual) {
  879. case FB_VISUAL_DIRECTCOLOR:
  880. case FB_VISUAL_TRUECOLOR:
  881. /*
  882. * 16/32 bit true-colour, use pseudo-palette for 16 base color
  883. */
  884. if (regno >= 16)
  885. break;
  886. if (sfb->fb->var.bits_per_pixel == 16) {
  887. u32 *pal = sfb->fb->pseudo_palette;
  888. val = chan_to_field(red, &sfb->fb->var.red);
  889. val |= chan_to_field(green, &sfb->fb->var.green);
  890. val |= chan_to_field(blue, &sfb->fb->var.blue);
  891. pal[regno] = pal_rgb(red, green, blue, val);
  892. } else {
  893. u32 *pal = sfb->fb->pseudo_palette;
  894. val = chan_to_field(red, &sfb->fb->var.red);
  895. val |= chan_to_field(green, &sfb->fb->var.green);
  896. val |= chan_to_field(blue, &sfb->fb->var.blue);
  897. pal[regno] = big_swap(val);
  898. }
  899. break;
  900. case FB_VISUAL_PSEUDOCOLOR:
  901. /* color depth 8 bit */
  902. sm712_setpalette(regno, red, green, blue, info);
  903. break;
  904. default:
  905. return 1; /* unknown type */
  906. }
  907. return 0;
  908. }
  909. static ssize_t smtcfb_read(struct fb_info *info, char __user *buf,
  910. size_t count, loff_t *ppos)
  911. {
  912. unsigned long p = *ppos;
  913. u32 *buffer, *dst;
  914. u32 __iomem *src;
  915. int c, i, cnt = 0, err = 0;
  916. unsigned long total_size;
  917. if (!info || !info->screen_base)
  918. return -ENODEV;
  919. if (info->state != FBINFO_STATE_RUNNING)
  920. return -EPERM;
  921. total_size = info->screen_size;
  922. if (total_size == 0)
  923. total_size = info->fix.smem_len;
  924. if (p >= total_size)
  925. return 0;
  926. if (count >= total_size)
  927. count = total_size;
  928. if (count + p > total_size)
  929. count = total_size - p;
  930. buffer = kmalloc((count > PAGE_SIZE) ? PAGE_SIZE : count, GFP_KERNEL);
  931. if (!buffer)
  932. return -ENOMEM;
  933. src = (u32 __iomem *)(info->screen_base + p);
  934. if (info->fbops->fb_sync)
  935. info->fbops->fb_sync(info);
  936. while (count) {
  937. c = (count > PAGE_SIZE) ? PAGE_SIZE : count;
  938. dst = buffer;
  939. for (i = c >> 2; i--;) {
  940. *dst = fb_readl(src++);
  941. *dst = big_swap(*dst);
  942. dst++;
  943. }
  944. if (c & 3) {
  945. u8 *dst8 = (u8 *)dst;
  946. u8 __iomem *src8 = (u8 __iomem *)src;
  947. for (i = c & 3; i--;) {
  948. if (i & 1) {
  949. *dst8++ = fb_readb(++src8);
  950. } else {
  951. *dst8++ = fb_readb(--src8);
  952. src8 += 2;
  953. }
  954. }
  955. src = (u32 __iomem *)src8;
  956. }
  957. if (copy_to_user(buf, buffer, c)) {
  958. err = -EFAULT;
  959. break;
  960. }
  961. *ppos += c;
  962. buf += c;
  963. cnt += c;
  964. count -= c;
  965. }
  966. kfree(buffer);
  967. return (err) ? err : cnt;
  968. }
  969. static ssize_t smtcfb_write(struct fb_info *info, const char __user *buf,
  970. size_t count, loff_t *ppos)
  971. {
  972. unsigned long p = *ppos;
  973. u32 *buffer, *src;
  974. u32 __iomem *dst;
  975. int c, i, cnt = 0, err = 0;
  976. unsigned long total_size;
  977. if (!info || !info->screen_base)
  978. return -ENODEV;
  979. if (info->state != FBINFO_STATE_RUNNING)
  980. return -EPERM;
  981. total_size = info->screen_size;
  982. if (total_size == 0)
  983. total_size = info->fix.smem_len;
  984. if (p > total_size)
  985. return -EFBIG;
  986. if (count > total_size) {
  987. err = -EFBIG;
  988. count = total_size;
  989. }
  990. if (count + p > total_size) {
  991. if (!err)
  992. err = -ENOSPC;
  993. count = total_size - p;
  994. }
  995. buffer = kmalloc((count > PAGE_SIZE) ? PAGE_SIZE : count, GFP_KERNEL);
  996. if (!buffer)
  997. return -ENOMEM;
  998. dst = (u32 __iomem *)(info->screen_base + p);
  999. if (info->fbops->fb_sync)
  1000. info->fbops->fb_sync(info);
  1001. while (count) {
  1002. c = (count > PAGE_SIZE) ? PAGE_SIZE : count;
  1003. src = buffer;
  1004. if (copy_from_user(src, buf, c)) {
  1005. err = -EFAULT;
  1006. break;
  1007. }
  1008. for (i = c >> 2; i--;) {
  1009. fb_writel(big_swap(*src), dst++);
  1010. src++;
  1011. }
  1012. if (c & 3) {
  1013. u8 *src8 = (u8 *)src;
  1014. u8 __iomem *dst8 = (u8 __iomem *)dst;
  1015. for (i = c & 3; i--;) {
  1016. if (i & 1) {
  1017. fb_writeb(*src8++, ++dst8);
  1018. } else {
  1019. fb_writeb(*src8++, --dst8);
  1020. dst8 += 2;
  1021. }
  1022. }
  1023. dst = (u32 __iomem *)dst8;
  1024. }
  1025. *ppos += c;
  1026. buf += c;
  1027. cnt += c;
  1028. count -= c;
  1029. }
  1030. kfree(buffer);
  1031. return (cnt) ? cnt : err;
  1032. }
  1033. static void sm7xx_set_timing(struct smtcfb_info *sfb)
  1034. {
  1035. int i = 0, j = 0;
  1036. u32 m_nscreenstride;
  1037. dev_dbg(&sfb->pdev->dev,
  1038. "sfb->width=%d sfb->height=%d sfb->fb->var.bits_per_pixel=%d sfb->hz=%d\n",
  1039. sfb->width, sfb->height, sfb->fb->var.bits_per_pixel, sfb->hz);
  1040. for (j = 0; j < ARRAY_SIZE(vgamode); j++) {
  1041. if (vgamode[j].mmsizex != sfb->width ||
  1042. vgamode[j].mmsizey != sfb->height ||
  1043. vgamode[j].bpp != sfb->fb->var.bits_per_pixel ||
  1044. vgamode[j].hz != sfb->hz)
  1045. continue;
  1046. dev_dbg(&sfb->pdev->dev,
  1047. "vgamode[j].mmsizex=%d vgamode[j].mmSizeY=%d vgamode[j].bpp=%d vgamode[j].hz=%d\n",
  1048. vgamode[j].mmsizex, vgamode[j].mmsizey,
  1049. vgamode[j].bpp, vgamode[j].hz);
  1050. dev_dbg(&sfb->pdev->dev, "vgamode index=%d\n", j);
  1051. smtc_mmiowb(0x0, 0x3c6);
  1052. smtc_seqw(0, 0x1);
  1053. smtc_mmiowb(vgamode[j].init_misc, 0x3c2);
  1054. /* init SEQ register SR00 - SR04 */
  1055. for (i = 0; i < SIZE_SR00_SR04; i++)
  1056. smtc_seqw(i, vgamode[j].init_sr00_sr04[i]);
  1057. /* init SEQ register SR10 - SR24 */
  1058. for (i = 0; i < SIZE_SR10_SR24; i++)
  1059. smtc_seqw(i + 0x10, vgamode[j].init_sr10_sr24[i]);
  1060. /* init SEQ register SR30 - SR75 */
  1061. for (i = 0; i < SIZE_SR30_SR75; i++)
  1062. if ((i + 0x30) != 0x62 && (i + 0x30) != 0x6a &&
  1063. (i + 0x30) != 0x6b)
  1064. smtc_seqw(i + 0x30,
  1065. vgamode[j].init_sr30_sr75[i]);
  1066. /* init SEQ register SR80 - SR93 */
  1067. for (i = 0; i < SIZE_SR80_SR93; i++)
  1068. smtc_seqw(i + 0x80, vgamode[j].init_sr80_sr93[i]);
  1069. /* init SEQ register SRA0 - SRAF */
  1070. for (i = 0; i < SIZE_SRA0_SRAF; i++)
  1071. smtc_seqw(i + 0xa0, vgamode[j].init_sra0_sraf[i]);
  1072. /* init Graphic register GR00 - GR08 */
  1073. for (i = 0; i < SIZE_GR00_GR08; i++)
  1074. smtc_grphw(i, vgamode[j].init_gr00_gr08[i]);
  1075. /* init Attribute register AR00 - AR14 */
  1076. for (i = 0; i < SIZE_AR00_AR14; i++)
  1077. smtc_attrw(i, vgamode[j].init_ar00_ar14[i]);
  1078. /* init CRTC register CR00 - CR18 */
  1079. for (i = 0; i < SIZE_CR00_CR18; i++)
  1080. smtc_crtcw(i, vgamode[j].init_cr00_cr18[i]);
  1081. /* init CRTC register CR30 - CR4D */
  1082. for (i = 0; i < SIZE_CR30_CR4D; i++)
  1083. smtc_crtcw(i + 0x30, vgamode[j].init_cr30_cr4d[i]);
  1084. /* init CRTC register CR90 - CRA7 */
  1085. for (i = 0; i < SIZE_CR90_CRA7; i++)
  1086. smtc_crtcw(i + 0x90, vgamode[j].init_cr90_cra7[i]);
  1087. }
  1088. smtc_mmiowb(0x67, 0x3c2);
  1089. /* set VPR registers */
  1090. writel(0x0, sfb->vp_regs + 0x0C);
  1091. writel(0x0, sfb->vp_regs + 0x40);
  1092. /* set data width */
  1093. m_nscreenstride = (sfb->width * sfb->fb->var.bits_per_pixel) / 64;
  1094. switch (sfb->fb->var.bits_per_pixel) {
  1095. case 8:
  1096. writel(0x0, sfb->vp_regs + 0x0);
  1097. break;
  1098. case 16:
  1099. writel(0x00020000, sfb->vp_regs + 0x0);
  1100. break;
  1101. case 24:
  1102. writel(0x00040000, sfb->vp_regs + 0x0);
  1103. break;
  1104. case 32:
  1105. writel(0x00030000, sfb->vp_regs + 0x0);
  1106. break;
  1107. }
  1108. writel((u32)(((m_nscreenstride + 2) << 16) | m_nscreenstride),
  1109. sfb->vp_regs + 0x10);
  1110. }
  1111. static void smtc_set_timing(struct smtcfb_info *sfb)
  1112. {
  1113. switch (sfb->chip_id) {
  1114. case 0x710:
  1115. case 0x712:
  1116. case 0x720:
  1117. sm7xx_set_timing(sfb);
  1118. break;
  1119. }
  1120. }
  1121. static void smtcfb_setmode(struct smtcfb_info *sfb)
  1122. {
  1123. switch (sfb->fb->var.bits_per_pixel) {
  1124. case 32:
  1125. sfb->fb->fix.visual = FB_VISUAL_TRUECOLOR;
  1126. sfb->fb->fix.line_length = sfb->fb->var.xres * 4;
  1127. sfb->fb->var.red.length = 8;
  1128. sfb->fb->var.green.length = 8;
  1129. sfb->fb->var.blue.length = 8;
  1130. sfb->fb->var.red.offset = 16;
  1131. sfb->fb->var.green.offset = 8;
  1132. sfb->fb->var.blue.offset = 0;
  1133. break;
  1134. case 24:
  1135. sfb->fb->fix.visual = FB_VISUAL_TRUECOLOR;
  1136. sfb->fb->fix.line_length = sfb->fb->var.xres * 3;
  1137. sfb->fb->var.red.length = 8;
  1138. sfb->fb->var.green.length = 8;
  1139. sfb->fb->var.blue.length = 8;
  1140. sfb->fb->var.red.offset = 16;
  1141. sfb->fb->var.green.offset = 8;
  1142. sfb->fb->var.blue.offset = 0;
  1143. break;
  1144. case 8:
  1145. sfb->fb->fix.visual = FB_VISUAL_PSEUDOCOLOR;
  1146. sfb->fb->fix.line_length = sfb->fb->var.xres;
  1147. sfb->fb->var.red.length = 3;
  1148. sfb->fb->var.green.length = 3;
  1149. sfb->fb->var.blue.length = 2;
  1150. sfb->fb->var.red.offset = 5;
  1151. sfb->fb->var.green.offset = 2;
  1152. sfb->fb->var.blue.offset = 0;
  1153. break;
  1154. case 16:
  1155. default:
  1156. sfb->fb->fix.visual = FB_VISUAL_TRUECOLOR;
  1157. sfb->fb->fix.line_length = sfb->fb->var.xres * 2;
  1158. sfb->fb->var.red.length = 5;
  1159. sfb->fb->var.green.length = 6;
  1160. sfb->fb->var.blue.length = 5;
  1161. sfb->fb->var.red.offset = 11;
  1162. sfb->fb->var.green.offset = 5;
  1163. sfb->fb->var.blue.offset = 0;
  1164. break;
  1165. }
  1166. sfb->width = sfb->fb->var.xres;
  1167. sfb->height = sfb->fb->var.yres;
  1168. sfb->hz = 60;
  1169. smtc_set_timing(sfb);
  1170. }
  1171. static int smtc_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
  1172. {
  1173. /* sanity checks */
  1174. if (var->xres_virtual < var->xres)
  1175. var->xres_virtual = var->xres;
  1176. if (var->yres_virtual < var->yres)
  1177. var->yres_virtual = var->yres;
  1178. /* set valid default bpp */
  1179. if ((var->bits_per_pixel != 8) && (var->bits_per_pixel != 16) &&
  1180. (var->bits_per_pixel != 24) && (var->bits_per_pixel != 32))
  1181. var->bits_per_pixel = 16;
  1182. return 0;
  1183. }
  1184. static int smtc_set_par(struct fb_info *info)
  1185. {
  1186. smtcfb_setmode(info->par);
  1187. return 0;
  1188. }
  1189. static struct fb_ops smtcfb_ops = {
  1190. .owner = THIS_MODULE,
  1191. .fb_check_var = smtc_check_var,
  1192. .fb_set_par = smtc_set_par,
  1193. .fb_setcolreg = smtc_setcolreg,
  1194. .fb_blank = smtc_blank,
  1195. .fb_fillrect = cfb_fillrect,
  1196. .fb_imageblit = cfb_imageblit,
  1197. .fb_copyarea = cfb_copyarea,
  1198. .fb_read = smtcfb_read,
  1199. .fb_write = smtcfb_write,
  1200. };
  1201. /*
  1202. * Unmap in the memory mapped IO registers
  1203. */
  1204. static void smtc_unmap_mmio(struct smtcfb_info *sfb)
  1205. {
  1206. if (sfb && smtc_regbaseaddress)
  1207. smtc_regbaseaddress = NULL;
  1208. }
  1209. /*
  1210. * Map in the screen memory
  1211. */
  1212. static int smtc_map_smem(struct smtcfb_info *sfb,
  1213. struct pci_dev *pdev, u_long smem_len)
  1214. {
  1215. sfb->fb->fix.smem_start = pci_resource_start(pdev, 0);
  1216. if (sfb->fb->var.bits_per_pixel == 32)
  1217. sfb->fb->fix.smem_start += big_addr;
  1218. sfb->fb->fix.smem_len = smem_len;
  1219. sfb->fb->screen_base = sfb->lfb;
  1220. if (!sfb->fb->screen_base) {
  1221. dev_err(&pdev->dev,
  1222. "%s: unable to map screen memory\n", sfb->fb->fix.id);
  1223. return -ENOMEM;
  1224. }
  1225. return 0;
  1226. }
  1227. /*
  1228. * Unmap in the screen memory
  1229. *
  1230. */
  1231. static void smtc_unmap_smem(struct smtcfb_info *sfb)
  1232. {
  1233. if (sfb && sfb->fb->screen_base) {
  1234. iounmap(sfb->fb->screen_base);
  1235. sfb->fb->screen_base = NULL;
  1236. }
  1237. }
  1238. /*
  1239. * We need to wake up the device and make sure its in linear memory mode.
  1240. */
  1241. static inline void sm7xx_init_hw(void)
  1242. {
  1243. outb_p(0x18, 0x3c4);
  1244. outb_p(0x11, 0x3c5);
  1245. }
  1246. static int smtcfb_pci_probe(struct pci_dev *pdev,
  1247. const struct pci_device_id *ent)
  1248. {
  1249. struct smtcfb_info *sfb;
  1250. struct fb_info *info;
  1251. u_long smem_size = 0x00800000; /* default 8MB */
  1252. int err;
  1253. unsigned long mmio_base;
  1254. dev_info(&pdev->dev, "Silicon Motion display driver.\n");
  1255. err = pci_enable_device(pdev); /* enable SMTC chip */
  1256. if (err)
  1257. return err;
  1258. err = pci_request_region(pdev, 0, "sm7xxfb");
  1259. if (err < 0) {
  1260. dev_err(&pdev->dev, "cannot reserve framebuffer region\n");
  1261. goto failed_regions;
  1262. }
  1263. sprintf(smtcfb_fix.id, "sm%Xfb", ent->device);
  1264. info = framebuffer_alloc(sizeof(*sfb), &pdev->dev);
  1265. if (!info) {
  1266. dev_err(&pdev->dev, "framebuffer_alloc failed\n");
  1267. err = -ENOMEM;
  1268. goto failed_free;
  1269. }
  1270. sfb = info->par;
  1271. sfb->fb = info;
  1272. sfb->chip_id = ent->device;
  1273. sfb->pdev = pdev;
  1274. info->flags = FBINFO_FLAG_DEFAULT;
  1275. info->fbops = &smtcfb_ops;
  1276. info->fix = smtcfb_fix;
  1277. info->var = smtcfb_var;
  1278. info->pseudo_palette = sfb->colreg;
  1279. info->par = sfb;
  1280. pci_set_drvdata(pdev, sfb);
  1281. sm7xx_init_hw();
  1282. /* get mode parameter from smtc_scr_info */
  1283. if (smtc_scr_info.lfb_width != 0) {
  1284. sfb->fb->var.xres = smtc_scr_info.lfb_width;
  1285. sfb->fb->var.yres = smtc_scr_info.lfb_height;
  1286. sfb->fb->var.bits_per_pixel = smtc_scr_info.lfb_depth;
  1287. } else {
  1288. /* default resolution 1024x600 16bit mode */
  1289. sfb->fb->var.xres = SCREEN_X_RES;
  1290. sfb->fb->var.yres = SCREEN_Y_RES;
  1291. sfb->fb->var.bits_per_pixel = SCREEN_BPP;
  1292. }
  1293. big_pixel_depth(sfb->fb->var.bits_per_pixel, smtc_scr_info.lfb_depth);
  1294. /* Map address and memory detection */
  1295. mmio_base = pci_resource_start(pdev, 0);
  1296. pci_read_config_byte(pdev, PCI_REVISION_ID, &sfb->chip_rev_id);
  1297. switch (sfb->chip_id) {
  1298. case 0x710:
  1299. case 0x712:
  1300. sfb->fb->fix.mmio_start = mmio_base + 0x00400000;
  1301. sfb->fb->fix.mmio_len = 0x00400000;
  1302. smem_size = SM712_VIDEOMEMORYSIZE;
  1303. sfb->lfb = ioremap(mmio_base, mmio_addr);
  1304. if (!sfb->lfb) {
  1305. dev_err(&pdev->dev,
  1306. "%s: unable to map memory mapped IO!\n",
  1307. sfb->fb->fix.id);
  1308. err = -ENOMEM;
  1309. goto failed_fb;
  1310. }
  1311. sfb->mmio = (smtc_regbaseaddress =
  1312. sfb->lfb + 0x00700000);
  1313. sfb->dp_regs = sfb->lfb + 0x00408000;
  1314. sfb->vp_regs = sfb->lfb + 0x0040c000;
  1315. if (sfb->fb->var.bits_per_pixel == 32) {
  1316. sfb->lfb += big_addr;
  1317. dev_info(&pdev->dev, "sfb->lfb=%p\n", sfb->lfb);
  1318. }
  1319. /* set MCLK = 14.31818 * (0x16 / 0x2) */
  1320. smtc_seqw(0x6a, 0x16);
  1321. smtc_seqw(0x6b, 0x02);
  1322. smtc_seqw(0x62, 0x3e);
  1323. /* enable PCI burst */
  1324. smtc_seqw(0x17, 0x20);
  1325. /* enable word swap */
  1326. if (sfb->fb->var.bits_per_pixel == 32)
  1327. seqw17();
  1328. break;
  1329. case 0x720:
  1330. sfb->fb->fix.mmio_start = mmio_base;
  1331. sfb->fb->fix.mmio_len = 0x00200000;
  1332. smem_size = SM722_VIDEOMEMORYSIZE;
  1333. sfb->dp_regs = ioremap(mmio_base, 0x00a00000);
  1334. sfb->lfb = sfb->dp_regs + 0x00200000;
  1335. sfb->mmio = (smtc_regbaseaddress =
  1336. sfb->dp_regs + 0x000c0000);
  1337. sfb->vp_regs = sfb->dp_regs + 0x800;
  1338. smtc_seqw(0x62, 0xff);
  1339. smtc_seqw(0x6a, 0x0d);
  1340. smtc_seqw(0x6b, 0x02);
  1341. break;
  1342. default:
  1343. dev_err(&pdev->dev,
  1344. "No valid Silicon Motion display chip was detected!\n");
  1345. goto failed_fb;
  1346. }
  1347. /* can support 32 bpp */
  1348. if (15 == sfb->fb->var.bits_per_pixel)
  1349. sfb->fb->var.bits_per_pixel = 16;
  1350. sfb->fb->var.xres_virtual = sfb->fb->var.xres;
  1351. sfb->fb->var.yres_virtual = sfb->fb->var.yres;
  1352. err = smtc_map_smem(sfb, pdev, smem_size);
  1353. if (err)
  1354. goto failed;
  1355. smtcfb_setmode(sfb);
  1356. err = register_framebuffer(info);
  1357. if (err < 0)
  1358. goto failed;
  1359. dev_info(&pdev->dev,
  1360. "Silicon Motion SM%X Rev%X primary display mode %dx%d-%d Init Complete.\n",
  1361. sfb->chip_id, sfb->chip_rev_id, sfb->fb->var.xres,
  1362. sfb->fb->var.yres, sfb->fb->var.bits_per_pixel);
  1363. return 0;
  1364. failed:
  1365. dev_err(&pdev->dev, "Silicon Motion, Inc. primary display init fail.\n");
  1366. smtc_unmap_smem(sfb);
  1367. smtc_unmap_mmio(sfb);
  1368. failed_fb:
  1369. framebuffer_release(info);
  1370. failed_free:
  1371. pci_release_region(pdev, 0);
  1372. failed_regions:
  1373. pci_disable_device(pdev);
  1374. return err;
  1375. }
  1376. /*
  1377. * 0x710 (LynxEM)
  1378. * 0x712 (LynxEM+)
  1379. * 0x720 (Lynx3DM, Lynx3DM+)
  1380. */
  1381. static const struct pci_device_id smtcfb_pci_table[] = {
  1382. { PCI_DEVICE(0x126f, 0x710), },
  1383. { PCI_DEVICE(0x126f, 0x712), },
  1384. { PCI_DEVICE(0x126f, 0x720), },
  1385. {0,}
  1386. };
  1387. MODULE_DEVICE_TABLE(pci, smtcfb_pci_table);
  1388. static void smtcfb_pci_remove(struct pci_dev *pdev)
  1389. {
  1390. struct smtcfb_info *sfb;
  1391. sfb = pci_get_drvdata(pdev);
  1392. smtc_unmap_smem(sfb);
  1393. smtc_unmap_mmio(sfb);
  1394. unregister_framebuffer(sfb->fb);
  1395. framebuffer_release(sfb->fb);
  1396. pci_release_region(pdev, 0);
  1397. pci_disable_device(pdev);
  1398. }
  1399. #ifdef CONFIG_PM
  1400. static int smtcfb_pci_suspend(struct device *device)
  1401. {
  1402. struct pci_dev *pdev = to_pci_dev(device);
  1403. struct smtcfb_info *sfb;
  1404. sfb = pci_get_drvdata(pdev);
  1405. /* set the hw in sleep mode use external clock and self memory refresh
  1406. * so that we can turn off internal PLLs later on
  1407. */
  1408. smtc_seqw(0x20, (smtc_seqr(0x20) | 0xc0));
  1409. smtc_seqw(0x69, (smtc_seqr(0x69) & 0xf7));
  1410. console_lock();
  1411. fb_set_suspend(sfb->fb, 1);
  1412. console_unlock();
  1413. /* additionally turn off all function blocks including internal PLLs */
  1414. smtc_seqw(0x21, 0xff);
  1415. return 0;
  1416. }
  1417. static int smtcfb_pci_resume(struct device *device)
  1418. {
  1419. struct pci_dev *pdev = to_pci_dev(device);
  1420. struct smtcfb_info *sfb;
  1421. sfb = pci_get_drvdata(pdev);
  1422. /* reinit hardware */
  1423. sm7xx_init_hw();
  1424. switch (sfb->chip_id) {
  1425. case 0x710:
  1426. case 0x712:
  1427. /* set MCLK = 14.31818 * (0x16 / 0x2) */
  1428. smtc_seqw(0x6a, 0x16);
  1429. smtc_seqw(0x6b, 0x02);
  1430. smtc_seqw(0x62, 0x3e);
  1431. /* enable PCI burst */
  1432. smtc_seqw(0x17, 0x20);
  1433. if (sfb->fb->var.bits_per_pixel == 32)
  1434. seqw17();
  1435. break;
  1436. case 0x720:
  1437. smtc_seqw(0x62, 0xff);
  1438. smtc_seqw(0x6a, 0x0d);
  1439. smtc_seqw(0x6b, 0x02);
  1440. break;
  1441. }
  1442. smtc_seqw(0x34, (smtc_seqr(0x34) | 0xc0));
  1443. smtc_seqw(0x33, ((smtc_seqr(0x33) | 0x08) & 0xfb));
  1444. smtcfb_setmode(sfb);
  1445. console_lock();
  1446. fb_set_suspend(sfb->fb, 0);
  1447. console_unlock();
  1448. return 0;
  1449. }
  1450. static SIMPLE_DEV_PM_OPS(sm7xx_pm_ops, smtcfb_pci_suspend, smtcfb_pci_resume);
  1451. #define SM7XX_PM_OPS (&sm7xx_pm_ops)
  1452. #else /* !CONFIG_PM */
  1453. #define SM7XX_PM_OPS NULL
  1454. #endif /* !CONFIG_PM */
  1455. static struct pci_driver smtcfb_driver = {
  1456. .name = "smtcfb",
  1457. .id_table = smtcfb_pci_table,
  1458. .probe = smtcfb_pci_probe,
  1459. .remove = smtcfb_pci_remove,
  1460. .driver.pm = SM7XX_PM_OPS,
  1461. };
  1462. static int __init sm712fb_init(void)
  1463. {
  1464. char *option = NULL;
  1465. if (fb_get_options("sm712fb", &option))
  1466. return -ENODEV;
  1467. if (option && *option)
  1468. mode_option = option;
  1469. sm7xx_vga_setup(mode_option);
  1470. return pci_register_driver(&smtcfb_driver);
  1471. }
  1472. module_init(sm712fb_init);
  1473. static void __exit sm712fb_exit(void)
  1474. {
  1475. pci_unregister_driver(&smtcfb_driver);
  1476. }
  1477. module_exit(sm712fb_exit);
  1478. MODULE_AUTHOR("Siliconmotion ");
  1479. MODULE_DESCRIPTION("Framebuffer driver for SMI Graphic Cards");
  1480. MODULE_LICENSE("GPL");