hdmi4.c 16 KB

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  1. /*
  2. * HDMI interface DSS driver for TI's OMAP4 family of SoCs.
  3. * Copyright (C) 2010-2011 Texas Instruments Incorporated - http://www.ti.com/
  4. * Authors: Yong Zhi
  5. * Mythri pk <mythripk@ti.com>
  6. *
  7. * This program is free software; you can redistribute it and/or modify it
  8. * under the terms of the GNU General Public License version 2 as published by
  9. * the Free Software Foundation.
  10. *
  11. * This program is distributed in the hope that it will be useful, but WITHOUT
  12. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  13. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  14. * more details.
  15. *
  16. * You should have received a copy of the GNU General Public License along with
  17. * this program. If not, see <http://www.gnu.org/licenses/>.
  18. */
  19. #define DSS_SUBSYS_NAME "HDMI"
  20. #include <linux/kernel.h>
  21. #include <linux/module.h>
  22. #include <linux/err.h>
  23. #include <linux/io.h>
  24. #include <linux/interrupt.h>
  25. #include <linux/mutex.h>
  26. #include <linux/delay.h>
  27. #include <linux/string.h>
  28. #include <linux/platform_device.h>
  29. #include <linux/pm_runtime.h>
  30. #include <linux/clk.h>
  31. #include <linux/gpio.h>
  32. #include <linux/regulator/consumer.h>
  33. #include <linux/component.h>
  34. #include <video/omapdss.h>
  35. #include <sound/omap-hdmi-audio.h>
  36. #include "hdmi4_core.h"
  37. #include "dss.h"
  38. #include "dss_features.h"
  39. #include "hdmi.h"
  40. static struct omap_hdmi hdmi;
  41. static int hdmi_runtime_get(void)
  42. {
  43. int r;
  44. DSSDBG("hdmi_runtime_get\n");
  45. r = pm_runtime_get_sync(&hdmi.pdev->dev);
  46. WARN_ON(r < 0);
  47. if (r < 0)
  48. return r;
  49. return 0;
  50. }
  51. static void hdmi_runtime_put(void)
  52. {
  53. int r;
  54. DSSDBG("hdmi_runtime_put\n");
  55. r = pm_runtime_put_sync(&hdmi.pdev->dev);
  56. WARN_ON(r < 0 && r != -ENOSYS);
  57. }
  58. static irqreturn_t hdmi_irq_handler(int irq, void *data)
  59. {
  60. struct hdmi_wp_data *wp = data;
  61. u32 irqstatus;
  62. irqstatus = hdmi_wp_get_irqstatus(wp);
  63. hdmi_wp_set_irqstatus(wp, irqstatus);
  64. if ((irqstatus & HDMI_IRQ_LINK_CONNECT) &&
  65. irqstatus & HDMI_IRQ_LINK_DISCONNECT) {
  66. /*
  67. * If we get both connect and disconnect interrupts at the same
  68. * time, turn off the PHY, clear interrupts, and restart, which
  69. * raises connect interrupt if a cable is connected, or nothing
  70. * if cable is not connected.
  71. */
  72. hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_OFF);
  73. hdmi_wp_set_irqstatus(wp, HDMI_IRQ_LINK_CONNECT |
  74. HDMI_IRQ_LINK_DISCONNECT);
  75. hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_LDOON);
  76. } else if (irqstatus & HDMI_IRQ_LINK_CONNECT) {
  77. hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_TXON);
  78. } else if (irqstatus & HDMI_IRQ_LINK_DISCONNECT) {
  79. hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_LDOON);
  80. }
  81. return IRQ_HANDLED;
  82. }
  83. static int hdmi_init_regulator(void)
  84. {
  85. int r;
  86. struct regulator *reg;
  87. if (hdmi.vdda_reg != NULL)
  88. return 0;
  89. reg = devm_regulator_get(&hdmi.pdev->dev, "vdda");
  90. if (IS_ERR(reg)) {
  91. if (PTR_ERR(reg) != -EPROBE_DEFER)
  92. DSSERR("can't get VDDA regulator\n");
  93. return PTR_ERR(reg);
  94. }
  95. if (regulator_can_change_voltage(reg)) {
  96. r = regulator_set_voltage(reg, 1800000, 1800000);
  97. if (r) {
  98. devm_regulator_put(reg);
  99. DSSWARN("can't set the regulator voltage\n");
  100. return r;
  101. }
  102. }
  103. hdmi.vdda_reg = reg;
  104. return 0;
  105. }
  106. static int hdmi_power_on_core(struct omap_dss_device *dssdev)
  107. {
  108. int r;
  109. r = regulator_enable(hdmi.vdda_reg);
  110. if (r)
  111. return r;
  112. r = hdmi_runtime_get();
  113. if (r)
  114. goto err_runtime_get;
  115. /* Make selection of HDMI in DSS */
  116. dss_select_hdmi_venc_clk_source(DSS_HDMI_M_PCLK);
  117. hdmi.core_enabled = true;
  118. return 0;
  119. err_runtime_get:
  120. regulator_disable(hdmi.vdda_reg);
  121. return r;
  122. }
  123. static void hdmi_power_off_core(struct omap_dss_device *dssdev)
  124. {
  125. hdmi.core_enabled = false;
  126. hdmi_runtime_put();
  127. regulator_disable(hdmi.vdda_reg);
  128. }
  129. static int hdmi_power_on_full(struct omap_dss_device *dssdev)
  130. {
  131. int r;
  132. struct omap_video_timings *p;
  133. struct omap_overlay_manager *mgr = hdmi.output.manager;
  134. struct hdmi_wp_data *wp = &hdmi.wp;
  135. struct dss_pll_clock_info hdmi_cinfo = { 0 };
  136. r = hdmi_power_on_core(dssdev);
  137. if (r)
  138. return r;
  139. /* disable and clear irqs */
  140. hdmi_wp_clear_irqenable(wp, 0xffffffff);
  141. hdmi_wp_set_irqstatus(wp, 0xffffffff);
  142. p = &hdmi.cfg.timings;
  143. DSSDBG("hdmi_power_on x_res= %d y_res = %d\n", p->x_res, p->y_res);
  144. hdmi_pll_compute(&hdmi.pll, p->pixelclock, &hdmi_cinfo);
  145. r = dss_pll_enable(&hdmi.pll.pll);
  146. if (r) {
  147. DSSERR("Failed to enable PLL\n");
  148. goto err_pll_enable;
  149. }
  150. r = dss_pll_set_config(&hdmi.pll.pll, &hdmi_cinfo);
  151. if (r) {
  152. DSSERR("Failed to configure PLL\n");
  153. goto err_pll_cfg;
  154. }
  155. r = hdmi_phy_configure(&hdmi.phy, hdmi_cinfo.clkdco,
  156. hdmi_cinfo.clkout[0]);
  157. if (r) {
  158. DSSDBG("Failed to configure PHY\n");
  159. goto err_phy_cfg;
  160. }
  161. r = hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_LDOON);
  162. if (r)
  163. goto err_phy_pwr;
  164. hdmi4_configure(&hdmi.core, &hdmi.wp, &hdmi.cfg);
  165. /* bypass TV gamma table */
  166. dispc_enable_gamma_table(0);
  167. /* tv size */
  168. dss_mgr_set_timings(mgr, p);
  169. r = hdmi_wp_video_start(&hdmi.wp);
  170. if (r)
  171. goto err_vid_enable;
  172. r = dss_mgr_enable(mgr);
  173. if (r)
  174. goto err_mgr_enable;
  175. hdmi_wp_set_irqenable(wp,
  176. HDMI_IRQ_LINK_CONNECT | HDMI_IRQ_LINK_DISCONNECT);
  177. return 0;
  178. err_mgr_enable:
  179. hdmi_wp_video_stop(&hdmi.wp);
  180. err_vid_enable:
  181. hdmi_wp_set_phy_pwr(&hdmi.wp, HDMI_PHYPWRCMD_OFF);
  182. err_phy_pwr:
  183. err_phy_cfg:
  184. err_pll_cfg:
  185. dss_pll_disable(&hdmi.pll.pll);
  186. err_pll_enable:
  187. hdmi_power_off_core(dssdev);
  188. return -EIO;
  189. }
  190. static void hdmi_power_off_full(struct omap_dss_device *dssdev)
  191. {
  192. struct omap_overlay_manager *mgr = hdmi.output.manager;
  193. hdmi_wp_clear_irqenable(&hdmi.wp, 0xffffffff);
  194. dss_mgr_disable(mgr);
  195. hdmi_wp_video_stop(&hdmi.wp);
  196. hdmi_wp_set_phy_pwr(&hdmi.wp, HDMI_PHYPWRCMD_OFF);
  197. dss_pll_disable(&hdmi.pll.pll);
  198. hdmi_power_off_core(dssdev);
  199. }
  200. static int hdmi_display_check_timing(struct omap_dss_device *dssdev,
  201. struct omap_video_timings *timings)
  202. {
  203. struct omap_dss_device *out = &hdmi.output;
  204. if (!dispc_mgr_timings_ok(out->dispc_channel, timings))
  205. return -EINVAL;
  206. return 0;
  207. }
  208. static void hdmi_display_set_timing(struct omap_dss_device *dssdev,
  209. struct omap_video_timings *timings)
  210. {
  211. mutex_lock(&hdmi.lock);
  212. hdmi.cfg.timings = *timings;
  213. dispc_set_tv_pclk(timings->pixelclock);
  214. mutex_unlock(&hdmi.lock);
  215. }
  216. static void hdmi_display_get_timings(struct omap_dss_device *dssdev,
  217. struct omap_video_timings *timings)
  218. {
  219. *timings = hdmi.cfg.timings;
  220. }
  221. static void hdmi_dump_regs(struct seq_file *s)
  222. {
  223. mutex_lock(&hdmi.lock);
  224. if (hdmi_runtime_get()) {
  225. mutex_unlock(&hdmi.lock);
  226. return;
  227. }
  228. hdmi_wp_dump(&hdmi.wp, s);
  229. hdmi_pll_dump(&hdmi.pll, s);
  230. hdmi_phy_dump(&hdmi.phy, s);
  231. hdmi4_core_dump(&hdmi.core, s);
  232. hdmi_runtime_put();
  233. mutex_unlock(&hdmi.lock);
  234. }
  235. static int read_edid(u8 *buf, int len)
  236. {
  237. int r;
  238. mutex_lock(&hdmi.lock);
  239. r = hdmi_runtime_get();
  240. BUG_ON(r);
  241. r = hdmi4_read_edid(&hdmi.core, buf, len);
  242. hdmi_runtime_put();
  243. mutex_unlock(&hdmi.lock);
  244. return r;
  245. }
  246. static int hdmi_display_enable(struct omap_dss_device *dssdev)
  247. {
  248. struct omap_dss_device *out = &hdmi.output;
  249. int r = 0;
  250. DSSDBG("ENTER hdmi_display_enable\n");
  251. mutex_lock(&hdmi.lock);
  252. if (out == NULL || out->manager == NULL) {
  253. DSSERR("failed to enable display: no output/manager\n");
  254. r = -ENODEV;
  255. goto err0;
  256. }
  257. r = hdmi_power_on_full(dssdev);
  258. if (r) {
  259. DSSERR("failed to power on device\n");
  260. goto err0;
  261. }
  262. hdmi.display_enabled = true;
  263. mutex_unlock(&hdmi.lock);
  264. return 0;
  265. err0:
  266. mutex_unlock(&hdmi.lock);
  267. return r;
  268. }
  269. static void hdmi_display_disable(struct omap_dss_device *dssdev)
  270. {
  271. DSSDBG("Enter hdmi_display_disable\n");
  272. mutex_lock(&hdmi.lock);
  273. if (hdmi.audio_pdev && hdmi.audio_abort_cb)
  274. hdmi.audio_abort_cb(&hdmi.audio_pdev->dev);
  275. hdmi_power_off_full(dssdev);
  276. hdmi.display_enabled = false;
  277. mutex_unlock(&hdmi.lock);
  278. }
  279. static int hdmi_core_enable(struct omap_dss_device *dssdev)
  280. {
  281. int r = 0;
  282. DSSDBG("ENTER omapdss_hdmi_core_enable\n");
  283. mutex_lock(&hdmi.lock);
  284. r = hdmi_power_on_core(dssdev);
  285. if (r) {
  286. DSSERR("failed to power on device\n");
  287. goto err0;
  288. }
  289. mutex_unlock(&hdmi.lock);
  290. return 0;
  291. err0:
  292. mutex_unlock(&hdmi.lock);
  293. return r;
  294. }
  295. static void hdmi_core_disable(struct omap_dss_device *dssdev)
  296. {
  297. DSSDBG("Enter omapdss_hdmi_core_disable\n");
  298. mutex_lock(&hdmi.lock);
  299. hdmi_power_off_core(dssdev);
  300. mutex_unlock(&hdmi.lock);
  301. }
  302. static int hdmi_connect(struct omap_dss_device *dssdev,
  303. struct omap_dss_device *dst)
  304. {
  305. struct omap_overlay_manager *mgr;
  306. int r;
  307. r = hdmi_init_regulator();
  308. if (r)
  309. return r;
  310. mgr = omap_dss_get_overlay_manager(dssdev->dispc_channel);
  311. if (!mgr)
  312. return -ENODEV;
  313. r = dss_mgr_connect(mgr, dssdev);
  314. if (r)
  315. return r;
  316. r = omapdss_output_set_device(dssdev, dst);
  317. if (r) {
  318. DSSERR("failed to connect output to new device: %s\n",
  319. dst->name);
  320. dss_mgr_disconnect(mgr, dssdev);
  321. return r;
  322. }
  323. return 0;
  324. }
  325. static void hdmi_disconnect(struct omap_dss_device *dssdev,
  326. struct omap_dss_device *dst)
  327. {
  328. WARN_ON(dst != dssdev->dst);
  329. if (dst != dssdev->dst)
  330. return;
  331. omapdss_output_unset_device(dssdev);
  332. if (dssdev->manager)
  333. dss_mgr_disconnect(dssdev->manager, dssdev);
  334. }
  335. static int hdmi_read_edid(struct omap_dss_device *dssdev,
  336. u8 *edid, int len)
  337. {
  338. bool need_enable;
  339. int r;
  340. need_enable = hdmi.core_enabled == false;
  341. if (need_enable) {
  342. r = hdmi_core_enable(dssdev);
  343. if (r)
  344. return r;
  345. }
  346. r = read_edid(edid, len);
  347. if (need_enable)
  348. hdmi_core_disable(dssdev);
  349. return r;
  350. }
  351. static int hdmi_set_infoframe(struct omap_dss_device *dssdev,
  352. const struct hdmi_avi_infoframe *avi)
  353. {
  354. hdmi.cfg.infoframe = *avi;
  355. return 0;
  356. }
  357. static int hdmi_set_hdmi_mode(struct omap_dss_device *dssdev,
  358. bool hdmi_mode)
  359. {
  360. hdmi.cfg.hdmi_dvi_mode = hdmi_mode ? HDMI_HDMI : HDMI_DVI;
  361. return 0;
  362. }
  363. static const struct omapdss_hdmi_ops hdmi_ops = {
  364. .connect = hdmi_connect,
  365. .disconnect = hdmi_disconnect,
  366. .enable = hdmi_display_enable,
  367. .disable = hdmi_display_disable,
  368. .check_timings = hdmi_display_check_timing,
  369. .set_timings = hdmi_display_set_timing,
  370. .get_timings = hdmi_display_get_timings,
  371. .read_edid = hdmi_read_edid,
  372. .set_infoframe = hdmi_set_infoframe,
  373. .set_hdmi_mode = hdmi_set_hdmi_mode,
  374. };
  375. static void hdmi_init_output(struct platform_device *pdev)
  376. {
  377. struct omap_dss_device *out = &hdmi.output;
  378. out->dev = &pdev->dev;
  379. out->id = OMAP_DSS_OUTPUT_HDMI;
  380. out->output_type = OMAP_DISPLAY_TYPE_HDMI;
  381. out->name = "hdmi.0";
  382. out->dispc_channel = OMAP_DSS_CHANNEL_DIGIT;
  383. out->ops.hdmi = &hdmi_ops;
  384. out->owner = THIS_MODULE;
  385. omapdss_register_output(out);
  386. }
  387. static void hdmi_uninit_output(struct platform_device *pdev)
  388. {
  389. struct omap_dss_device *out = &hdmi.output;
  390. omapdss_unregister_output(out);
  391. }
  392. static int hdmi_probe_of(struct platform_device *pdev)
  393. {
  394. struct device_node *node = pdev->dev.of_node;
  395. struct device_node *ep;
  396. int r;
  397. ep = omapdss_of_get_first_endpoint(node);
  398. if (!ep)
  399. return 0;
  400. r = hdmi_parse_lanes_of(pdev, ep, &hdmi.phy);
  401. if (r)
  402. goto err;
  403. of_node_put(ep);
  404. return 0;
  405. err:
  406. of_node_put(ep);
  407. return r;
  408. }
  409. /* Audio callbacks */
  410. static int hdmi_audio_startup(struct device *dev,
  411. void (*abort_cb)(struct device *dev))
  412. {
  413. struct omap_hdmi *hd = dev_get_drvdata(dev);
  414. int ret = 0;
  415. mutex_lock(&hd->lock);
  416. if (!hdmi_mode_has_audio(&hd->cfg) || !hd->display_enabled) {
  417. ret = -EPERM;
  418. goto out;
  419. }
  420. hd->audio_abort_cb = abort_cb;
  421. out:
  422. mutex_unlock(&hd->lock);
  423. return ret;
  424. }
  425. static int hdmi_audio_shutdown(struct device *dev)
  426. {
  427. struct omap_hdmi *hd = dev_get_drvdata(dev);
  428. mutex_lock(&hd->lock);
  429. hd->audio_abort_cb = NULL;
  430. mutex_unlock(&hd->lock);
  431. return 0;
  432. }
  433. static int hdmi_audio_start(struct device *dev)
  434. {
  435. struct omap_hdmi *hd = dev_get_drvdata(dev);
  436. WARN_ON(!hdmi_mode_has_audio(&hd->cfg));
  437. WARN_ON(!hd->display_enabled);
  438. hdmi_wp_audio_enable(&hd->wp, true);
  439. hdmi4_audio_start(&hd->core, &hd->wp);
  440. return 0;
  441. }
  442. static void hdmi_audio_stop(struct device *dev)
  443. {
  444. struct omap_hdmi *hd = dev_get_drvdata(dev);
  445. WARN_ON(!hdmi_mode_has_audio(&hd->cfg));
  446. WARN_ON(!hd->display_enabled);
  447. hdmi4_audio_stop(&hd->core, &hd->wp);
  448. hdmi_wp_audio_enable(&hd->wp, false);
  449. }
  450. static int hdmi_audio_config(struct device *dev,
  451. struct omap_dss_audio *dss_audio)
  452. {
  453. struct omap_hdmi *hd = dev_get_drvdata(dev);
  454. int ret;
  455. mutex_lock(&hd->lock);
  456. if (!hdmi_mode_has_audio(&hd->cfg) || !hd->display_enabled) {
  457. ret = -EPERM;
  458. goto out;
  459. }
  460. ret = hdmi4_audio_config(&hd->core, &hd->wp, dss_audio,
  461. hd->cfg.timings.pixelclock);
  462. out:
  463. mutex_unlock(&hd->lock);
  464. return ret;
  465. }
  466. static const struct omap_hdmi_audio_ops hdmi_audio_ops = {
  467. .audio_startup = hdmi_audio_startup,
  468. .audio_shutdown = hdmi_audio_shutdown,
  469. .audio_start = hdmi_audio_start,
  470. .audio_stop = hdmi_audio_stop,
  471. .audio_config = hdmi_audio_config,
  472. };
  473. static int hdmi_audio_register(struct device *dev)
  474. {
  475. struct omap_hdmi_audio_pdata pdata = {
  476. .dev = dev,
  477. .dss_version = omapdss_get_version(),
  478. .audio_dma_addr = hdmi_wp_get_audio_dma_addr(&hdmi.wp),
  479. .ops = &hdmi_audio_ops,
  480. };
  481. hdmi.audio_pdev = platform_device_register_data(
  482. dev, "omap-hdmi-audio", PLATFORM_DEVID_AUTO,
  483. &pdata, sizeof(pdata));
  484. if (IS_ERR(hdmi.audio_pdev))
  485. return PTR_ERR(hdmi.audio_pdev);
  486. return 0;
  487. }
  488. /* HDMI HW IP initialisation */
  489. static int hdmi4_bind(struct device *dev, struct device *master, void *data)
  490. {
  491. struct platform_device *pdev = to_platform_device(dev);
  492. int r;
  493. int irq;
  494. hdmi.pdev = pdev;
  495. dev_set_drvdata(&pdev->dev, &hdmi);
  496. mutex_init(&hdmi.lock);
  497. if (pdev->dev.of_node) {
  498. r = hdmi_probe_of(pdev);
  499. if (r)
  500. return r;
  501. }
  502. r = hdmi_wp_init(pdev, &hdmi.wp);
  503. if (r)
  504. return r;
  505. r = hdmi_pll_init(pdev, &hdmi.pll, &hdmi.wp);
  506. if (r)
  507. return r;
  508. r = hdmi_phy_init(pdev, &hdmi.phy);
  509. if (r)
  510. goto err;
  511. r = hdmi4_core_init(pdev, &hdmi.core);
  512. if (r)
  513. goto err;
  514. irq = platform_get_irq(pdev, 0);
  515. if (irq < 0) {
  516. DSSERR("platform_get_irq failed\n");
  517. r = -ENODEV;
  518. goto err;
  519. }
  520. r = devm_request_threaded_irq(&pdev->dev, irq,
  521. NULL, hdmi_irq_handler,
  522. IRQF_ONESHOT, "OMAP HDMI", &hdmi.wp);
  523. if (r) {
  524. DSSERR("HDMI IRQ request failed\n");
  525. goto err;
  526. }
  527. pm_runtime_enable(&pdev->dev);
  528. hdmi_init_output(pdev);
  529. r = hdmi_audio_register(&pdev->dev);
  530. if (r) {
  531. DSSERR("Registering HDMI audio failed\n");
  532. hdmi_uninit_output(pdev);
  533. pm_runtime_disable(&pdev->dev);
  534. return r;
  535. }
  536. dss_debugfs_create_file("hdmi", hdmi_dump_regs);
  537. return 0;
  538. err:
  539. hdmi_pll_uninit(&hdmi.pll);
  540. return r;
  541. }
  542. static void hdmi4_unbind(struct device *dev, struct device *master, void *data)
  543. {
  544. struct platform_device *pdev = to_platform_device(dev);
  545. if (hdmi.audio_pdev)
  546. platform_device_unregister(hdmi.audio_pdev);
  547. hdmi_uninit_output(pdev);
  548. hdmi_pll_uninit(&hdmi.pll);
  549. pm_runtime_disable(&pdev->dev);
  550. }
  551. static const struct component_ops hdmi4_component_ops = {
  552. .bind = hdmi4_bind,
  553. .unbind = hdmi4_unbind,
  554. };
  555. static int hdmi4_probe(struct platform_device *pdev)
  556. {
  557. return component_add(&pdev->dev, &hdmi4_component_ops);
  558. }
  559. static int hdmi4_remove(struct platform_device *pdev)
  560. {
  561. component_del(&pdev->dev, &hdmi4_component_ops);
  562. return 0;
  563. }
  564. static int hdmi_runtime_suspend(struct device *dev)
  565. {
  566. dispc_runtime_put();
  567. return 0;
  568. }
  569. static int hdmi_runtime_resume(struct device *dev)
  570. {
  571. int r;
  572. r = dispc_runtime_get();
  573. if (r < 0)
  574. return r;
  575. return 0;
  576. }
  577. static const struct dev_pm_ops hdmi_pm_ops = {
  578. .runtime_suspend = hdmi_runtime_suspend,
  579. .runtime_resume = hdmi_runtime_resume,
  580. };
  581. static const struct of_device_id hdmi_of_match[] = {
  582. { .compatible = "ti,omap4-hdmi", },
  583. {},
  584. };
  585. static struct platform_driver omapdss_hdmihw_driver = {
  586. .probe = hdmi4_probe,
  587. .remove = hdmi4_remove,
  588. .driver = {
  589. .name = "omapdss_hdmi",
  590. .pm = &hdmi_pm_ops,
  591. .of_match_table = hdmi_of_match,
  592. .suppress_bind_attrs = true,
  593. },
  594. };
  595. int __init hdmi4_init_platform_driver(void)
  596. {
  597. return platform_driver_register(&omapdss_hdmihw_driver);
  598. }
  599. void hdmi4_uninit_platform_driver(void)
  600. {
  601. platform_driver_unregister(&omapdss_hdmihw_driver);
  602. }