panel-tpo-td043mtea1.c 15 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687
  1. /*
  2. * TPO TD043MTEA1 Panel driver
  3. *
  4. * Author: Gražvydas Ignotas <notasas@gmail.com>
  5. * Converted to new DSS device model: Tomi Valkeinen <tomi.valkeinen@ti.com>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation; either version 2 of the License, or
  10. * (at your option) any later version.
  11. */
  12. #include <linux/module.h>
  13. #include <linux/delay.h>
  14. #include <linux/spi/spi.h>
  15. #include <linux/regulator/consumer.h>
  16. #include <linux/gpio.h>
  17. #include <linux/err.h>
  18. #include <linux/slab.h>
  19. #include <linux/of_gpio.h>
  20. #include <video/omapdss.h>
  21. #include <video/omap-panel-data.h>
  22. #define TPO_R02_MODE(x) ((x) & 7)
  23. #define TPO_R02_MODE_800x480 7
  24. #define TPO_R02_NCLK_RISING BIT(3)
  25. #define TPO_R02_HSYNC_HIGH BIT(4)
  26. #define TPO_R02_VSYNC_HIGH BIT(5)
  27. #define TPO_R03_NSTANDBY BIT(0)
  28. #define TPO_R03_EN_CP_CLK BIT(1)
  29. #define TPO_R03_EN_VGL_PUMP BIT(2)
  30. #define TPO_R03_EN_PWM BIT(3)
  31. #define TPO_R03_DRIVING_CAP_100 BIT(4)
  32. #define TPO_R03_EN_PRE_CHARGE BIT(6)
  33. #define TPO_R03_SOFTWARE_CTL BIT(7)
  34. #define TPO_R04_NFLIP_H BIT(0)
  35. #define TPO_R04_NFLIP_V BIT(1)
  36. #define TPO_R04_CP_CLK_FREQ_1H BIT(2)
  37. #define TPO_R04_VGL_FREQ_1H BIT(4)
  38. #define TPO_R03_VAL_NORMAL (TPO_R03_NSTANDBY | TPO_R03_EN_CP_CLK | \
  39. TPO_R03_EN_VGL_PUMP | TPO_R03_EN_PWM | \
  40. TPO_R03_DRIVING_CAP_100 | TPO_R03_EN_PRE_CHARGE | \
  41. TPO_R03_SOFTWARE_CTL)
  42. #define TPO_R03_VAL_STANDBY (TPO_R03_DRIVING_CAP_100 | \
  43. TPO_R03_EN_PRE_CHARGE | TPO_R03_SOFTWARE_CTL)
  44. static const u16 tpo_td043_def_gamma[12] = {
  45. 105, 315, 381, 431, 490, 537, 579, 686, 780, 837, 880, 1023
  46. };
  47. struct panel_drv_data {
  48. struct omap_dss_device dssdev;
  49. struct omap_dss_device *in;
  50. struct omap_video_timings videomode;
  51. int data_lines;
  52. struct spi_device *spi;
  53. struct regulator *vcc_reg;
  54. int nreset_gpio;
  55. u16 gamma[12];
  56. u32 mode;
  57. u32 hmirror:1;
  58. u32 vmirror:1;
  59. u32 powered_on:1;
  60. u32 spi_suspended:1;
  61. u32 power_on_resume:1;
  62. };
  63. static const struct omap_video_timings tpo_td043_timings = {
  64. .x_res = 800,
  65. .y_res = 480,
  66. .pixelclock = 36000000,
  67. .hsw = 1,
  68. .hfp = 68,
  69. .hbp = 214,
  70. .vsw = 1,
  71. .vfp = 39,
  72. .vbp = 34,
  73. .vsync_level = OMAPDSS_SIG_ACTIVE_LOW,
  74. .hsync_level = OMAPDSS_SIG_ACTIVE_LOW,
  75. .data_pclk_edge = OMAPDSS_DRIVE_SIG_FALLING_EDGE,
  76. .de_level = OMAPDSS_SIG_ACTIVE_HIGH,
  77. .sync_pclk_edge = OMAPDSS_DRIVE_SIG_RISING_EDGE,
  78. };
  79. #define to_panel_data(p) container_of(p, struct panel_drv_data, dssdev)
  80. static int tpo_td043_write(struct spi_device *spi, u8 addr, u8 data)
  81. {
  82. struct spi_message m;
  83. struct spi_transfer xfer;
  84. u16 w;
  85. int r;
  86. spi_message_init(&m);
  87. memset(&xfer, 0, sizeof(xfer));
  88. w = ((u16)addr << 10) | (1 << 8) | data;
  89. xfer.tx_buf = &w;
  90. xfer.bits_per_word = 16;
  91. xfer.len = 2;
  92. spi_message_add_tail(&xfer, &m);
  93. r = spi_sync(spi, &m);
  94. if (r < 0)
  95. dev_warn(&spi->dev, "failed to write to LCD reg (%d)\n", r);
  96. return r;
  97. }
  98. static void tpo_td043_write_gamma(struct spi_device *spi, u16 gamma[12])
  99. {
  100. u8 i, val;
  101. /* gamma bits [9:8] */
  102. for (val = i = 0; i < 4; i++)
  103. val |= (gamma[i] & 0x300) >> ((i + 1) * 2);
  104. tpo_td043_write(spi, 0x11, val);
  105. for (val = i = 0; i < 4; i++)
  106. val |= (gamma[i+4] & 0x300) >> ((i + 1) * 2);
  107. tpo_td043_write(spi, 0x12, val);
  108. for (val = i = 0; i < 4; i++)
  109. val |= (gamma[i+8] & 0x300) >> ((i + 1) * 2);
  110. tpo_td043_write(spi, 0x13, val);
  111. /* gamma bits [7:0] */
  112. for (val = i = 0; i < 12; i++)
  113. tpo_td043_write(spi, 0x14 + i, gamma[i] & 0xff);
  114. }
  115. static int tpo_td043_write_mirror(struct spi_device *spi, bool h, bool v)
  116. {
  117. u8 reg4 = TPO_R04_NFLIP_H | TPO_R04_NFLIP_V |
  118. TPO_R04_CP_CLK_FREQ_1H | TPO_R04_VGL_FREQ_1H;
  119. if (h)
  120. reg4 &= ~TPO_R04_NFLIP_H;
  121. if (v)
  122. reg4 &= ~TPO_R04_NFLIP_V;
  123. return tpo_td043_write(spi, 4, reg4);
  124. }
  125. static int tpo_td043_set_hmirror(struct omap_dss_device *dssdev, bool enable)
  126. {
  127. struct panel_drv_data *ddata = dev_get_drvdata(dssdev->dev);
  128. ddata->hmirror = enable;
  129. return tpo_td043_write_mirror(ddata->spi, ddata->hmirror,
  130. ddata->vmirror);
  131. }
  132. static bool tpo_td043_get_hmirror(struct omap_dss_device *dssdev)
  133. {
  134. struct panel_drv_data *ddata = dev_get_drvdata(dssdev->dev);
  135. return ddata->hmirror;
  136. }
  137. static ssize_t tpo_td043_vmirror_show(struct device *dev,
  138. struct device_attribute *attr, char *buf)
  139. {
  140. struct panel_drv_data *ddata = dev_get_drvdata(dev);
  141. return snprintf(buf, PAGE_SIZE, "%d\n", ddata->vmirror);
  142. }
  143. static ssize_t tpo_td043_vmirror_store(struct device *dev,
  144. struct device_attribute *attr, const char *buf, size_t count)
  145. {
  146. struct panel_drv_data *ddata = dev_get_drvdata(dev);
  147. int val;
  148. int ret;
  149. ret = kstrtoint(buf, 0, &val);
  150. if (ret < 0)
  151. return ret;
  152. val = !!val;
  153. ret = tpo_td043_write_mirror(ddata->spi, ddata->hmirror, val);
  154. if (ret < 0)
  155. return ret;
  156. ddata->vmirror = val;
  157. return count;
  158. }
  159. static ssize_t tpo_td043_mode_show(struct device *dev,
  160. struct device_attribute *attr, char *buf)
  161. {
  162. struct panel_drv_data *ddata = dev_get_drvdata(dev);
  163. return snprintf(buf, PAGE_SIZE, "%d\n", ddata->mode);
  164. }
  165. static ssize_t tpo_td043_mode_store(struct device *dev,
  166. struct device_attribute *attr, const char *buf, size_t count)
  167. {
  168. struct panel_drv_data *ddata = dev_get_drvdata(dev);
  169. long val;
  170. int ret;
  171. ret = kstrtol(buf, 0, &val);
  172. if (ret != 0 || val & ~7)
  173. return -EINVAL;
  174. ddata->mode = val;
  175. val |= TPO_R02_NCLK_RISING;
  176. tpo_td043_write(ddata->spi, 2, val);
  177. return count;
  178. }
  179. static ssize_t tpo_td043_gamma_show(struct device *dev,
  180. struct device_attribute *attr, char *buf)
  181. {
  182. struct panel_drv_data *ddata = dev_get_drvdata(dev);
  183. ssize_t len = 0;
  184. int ret;
  185. int i;
  186. for (i = 0; i < ARRAY_SIZE(ddata->gamma); i++) {
  187. ret = snprintf(buf + len, PAGE_SIZE - len, "%u ",
  188. ddata->gamma[i]);
  189. if (ret < 0)
  190. return ret;
  191. len += ret;
  192. }
  193. buf[len - 1] = '\n';
  194. return len;
  195. }
  196. static ssize_t tpo_td043_gamma_store(struct device *dev,
  197. struct device_attribute *attr, const char *buf, size_t count)
  198. {
  199. struct panel_drv_data *ddata = dev_get_drvdata(dev);
  200. unsigned int g[12];
  201. int ret;
  202. int i;
  203. ret = sscanf(buf, "%u %u %u %u %u %u %u %u %u %u %u %u",
  204. &g[0], &g[1], &g[2], &g[3], &g[4], &g[5],
  205. &g[6], &g[7], &g[8], &g[9], &g[10], &g[11]);
  206. if (ret != 12)
  207. return -EINVAL;
  208. for (i = 0; i < 12; i++)
  209. ddata->gamma[i] = g[i];
  210. tpo_td043_write_gamma(ddata->spi, ddata->gamma);
  211. return count;
  212. }
  213. static DEVICE_ATTR(vmirror, S_IRUGO | S_IWUSR,
  214. tpo_td043_vmirror_show, tpo_td043_vmirror_store);
  215. static DEVICE_ATTR(mode, S_IRUGO | S_IWUSR,
  216. tpo_td043_mode_show, tpo_td043_mode_store);
  217. static DEVICE_ATTR(gamma, S_IRUGO | S_IWUSR,
  218. tpo_td043_gamma_show, tpo_td043_gamma_store);
  219. static struct attribute *tpo_td043_attrs[] = {
  220. &dev_attr_vmirror.attr,
  221. &dev_attr_mode.attr,
  222. &dev_attr_gamma.attr,
  223. NULL,
  224. };
  225. static struct attribute_group tpo_td043_attr_group = {
  226. .attrs = tpo_td043_attrs,
  227. };
  228. static int tpo_td043_power_on(struct panel_drv_data *ddata)
  229. {
  230. int r;
  231. if (ddata->powered_on)
  232. return 0;
  233. r = regulator_enable(ddata->vcc_reg);
  234. if (r != 0)
  235. return r;
  236. /* wait for panel to stabilize */
  237. msleep(160);
  238. if (gpio_is_valid(ddata->nreset_gpio))
  239. gpio_set_value(ddata->nreset_gpio, 1);
  240. tpo_td043_write(ddata->spi, 2,
  241. TPO_R02_MODE(ddata->mode) | TPO_R02_NCLK_RISING);
  242. tpo_td043_write(ddata->spi, 3, TPO_R03_VAL_NORMAL);
  243. tpo_td043_write(ddata->spi, 0x20, 0xf0);
  244. tpo_td043_write(ddata->spi, 0x21, 0xf0);
  245. tpo_td043_write_mirror(ddata->spi, ddata->hmirror,
  246. ddata->vmirror);
  247. tpo_td043_write_gamma(ddata->spi, ddata->gamma);
  248. ddata->powered_on = 1;
  249. return 0;
  250. }
  251. static void tpo_td043_power_off(struct panel_drv_data *ddata)
  252. {
  253. if (!ddata->powered_on)
  254. return;
  255. tpo_td043_write(ddata->spi, 3,
  256. TPO_R03_VAL_STANDBY | TPO_R03_EN_PWM);
  257. if (gpio_is_valid(ddata->nreset_gpio))
  258. gpio_set_value(ddata->nreset_gpio, 0);
  259. /* wait for at least 2 vsyncs before cutting off power */
  260. msleep(50);
  261. tpo_td043_write(ddata->spi, 3, TPO_R03_VAL_STANDBY);
  262. regulator_disable(ddata->vcc_reg);
  263. ddata->powered_on = 0;
  264. }
  265. static int tpo_td043_connect(struct omap_dss_device *dssdev)
  266. {
  267. struct panel_drv_data *ddata = to_panel_data(dssdev);
  268. struct omap_dss_device *in = ddata->in;
  269. int r;
  270. if (omapdss_device_is_connected(dssdev))
  271. return 0;
  272. r = in->ops.dpi->connect(in, dssdev);
  273. if (r)
  274. return r;
  275. return 0;
  276. }
  277. static void tpo_td043_disconnect(struct omap_dss_device *dssdev)
  278. {
  279. struct panel_drv_data *ddata = to_panel_data(dssdev);
  280. struct omap_dss_device *in = ddata->in;
  281. if (!omapdss_device_is_connected(dssdev))
  282. return;
  283. in->ops.dpi->disconnect(in, dssdev);
  284. }
  285. static int tpo_td043_enable(struct omap_dss_device *dssdev)
  286. {
  287. struct panel_drv_data *ddata = to_panel_data(dssdev);
  288. struct omap_dss_device *in = ddata->in;
  289. int r;
  290. if (!omapdss_device_is_connected(dssdev))
  291. return -ENODEV;
  292. if (omapdss_device_is_enabled(dssdev))
  293. return 0;
  294. if (ddata->data_lines)
  295. in->ops.dpi->set_data_lines(in, ddata->data_lines);
  296. in->ops.dpi->set_timings(in, &ddata->videomode);
  297. r = in->ops.dpi->enable(in);
  298. if (r)
  299. return r;
  300. /*
  301. * If we are resuming from system suspend, SPI clocks might not be
  302. * enabled yet, so we'll program the LCD from SPI PM resume callback.
  303. */
  304. if (!ddata->spi_suspended) {
  305. r = tpo_td043_power_on(ddata);
  306. if (r) {
  307. in->ops.dpi->disable(in);
  308. return r;
  309. }
  310. }
  311. dssdev->state = OMAP_DSS_DISPLAY_ACTIVE;
  312. return 0;
  313. }
  314. static void tpo_td043_disable(struct omap_dss_device *dssdev)
  315. {
  316. struct panel_drv_data *ddata = to_panel_data(dssdev);
  317. struct omap_dss_device *in = ddata->in;
  318. if (!omapdss_device_is_enabled(dssdev))
  319. return;
  320. in->ops.dpi->disable(in);
  321. if (!ddata->spi_suspended)
  322. tpo_td043_power_off(ddata);
  323. dssdev->state = OMAP_DSS_DISPLAY_DISABLED;
  324. }
  325. static void tpo_td043_set_timings(struct omap_dss_device *dssdev,
  326. struct omap_video_timings *timings)
  327. {
  328. struct panel_drv_data *ddata = to_panel_data(dssdev);
  329. struct omap_dss_device *in = ddata->in;
  330. ddata->videomode = *timings;
  331. dssdev->panel.timings = *timings;
  332. in->ops.dpi->set_timings(in, timings);
  333. }
  334. static void tpo_td043_get_timings(struct omap_dss_device *dssdev,
  335. struct omap_video_timings *timings)
  336. {
  337. struct panel_drv_data *ddata = to_panel_data(dssdev);
  338. *timings = ddata->videomode;
  339. }
  340. static int tpo_td043_check_timings(struct omap_dss_device *dssdev,
  341. struct omap_video_timings *timings)
  342. {
  343. struct panel_drv_data *ddata = to_panel_data(dssdev);
  344. struct omap_dss_device *in = ddata->in;
  345. return in->ops.dpi->check_timings(in, timings);
  346. }
  347. static struct omap_dss_driver tpo_td043_ops = {
  348. .connect = tpo_td043_connect,
  349. .disconnect = tpo_td043_disconnect,
  350. .enable = tpo_td043_enable,
  351. .disable = tpo_td043_disable,
  352. .set_timings = tpo_td043_set_timings,
  353. .get_timings = tpo_td043_get_timings,
  354. .check_timings = tpo_td043_check_timings,
  355. .set_mirror = tpo_td043_set_hmirror,
  356. .get_mirror = tpo_td043_get_hmirror,
  357. .get_resolution = omapdss_default_get_resolution,
  358. };
  359. static int tpo_td043_probe_pdata(struct spi_device *spi)
  360. {
  361. const struct panel_tpo_td043mtea1_platform_data *pdata;
  362. struct panel_drv_data *ddata = dev_get_drvdata(&spi->dev);
  363. struct omap_dss_device *dssdev, *in;
  364. pdata = dev_get_platdata(&spi->dev);
  365. ddata->nreset_gpio = pdata->nreset_gpio;
  366. in = omap_dss_find_output(pdata->source);
  367. if (in == NULL) {
  368. dev_err(&spi->dev, "failed to find video source '%s'\n",
  369. pdata->source);
  370. return -EPROBE_DEFER;
  371. }
  372. ddata->in = in;
  373. ddata->data_lines = pdata->data_lines;
  374. dssdev = &ddata->dssdev;
  375. dssdev->name = pdata->name;
  376. return 0;
  377. }
  378. static int tpo_td043_probe_of(struct spi_device *spi)
  379. {
  380. struct device_node *node = spi->dev.of_node;
  381. struct panel_drv_data *ddata = dev_get_drvdata(&spi->dev);
  382. struct omap_dss_device *in;
  383. int gpio;
  384. gpio = of_get_named_gpio(node, "reset-gpios", 0);
  385. if (!gpio_is_valid(gpio)) {
  386. dev_err(&spi->dev, "failed to parse enable gpio\n");
  387. return gpio;
  388. }
  389. ddata->nreset_gpio = gpio;
  390. in = omapdss_of_find_source_for_first_ep(node);
  391. if (IS_ERR(in)) {
  392. dev_err(&spi->dev, "failed to find video source\n");
  393. return PTR_ERR(in);
  394. }
  395. ddata->in = in;
  396. return 0;
  397. }
  398. static int tpo_td043_probe(struct spi_device *spi)
  399. {
  400. struct panel_drv_data *ddata;
  401. struct omap_dss_device *dssdev;
  402. int r;
  403. dev_dbg(&spi->dev, "%s\n", __func__);
  404. spi->bits_per_word = 16;
  405. spi->mode = SPI_MODE_0;
  406. r = spi_setup(spi);
  407. if (r < 0) {
  408. dev_err(&spi->dev, "spi_setup failed: %d\n", r);
  409. return r;
  410. }
  411. ddata = devm_kzalloc(&spi->dev, sizeof(*ddata), GFP_KERNEL);
  412. if (ddata == NULL)
  413. return -ENOMEM;
  414. dev_set_drvdata(&spi->dev, ddata);
  415. ddata->spi = spi;
  416. if (dev_get_platdata(&spi->dev)) {
  417. r = tpo_td043_probe_pdata(spi);
  418. if (r)
  419. return r;
  420. } else if (spi->dev.of_node) {
  421. r = tpo_td043_probe_of(spi);
  422. if (r)
  423. return r;
  424. } else {
  425. return -ENODEV;
  426. }
  427. ddata->mode = TPO_R02_MODE_800x480;
  428. memcpy(ddata->gamma, tpo_td043_def_gamma, sizeof(ddata->gamma));
  429. ddata->vcc_reg = devm_regulator_get(&spi->dev, "vcc");
  430. if (IS_ERR(ddata->vcc_reg)) {
  431. dev_err(&spi->dev, "failed to get LCD VCC regulator\n");
  432. r = PTR_ERR(ddata->vcc_reg);
  433. goto err_regulator;
  434. }
  435. if (gpio_is_valid(ddata->nreset_gpio)) {
  436. r = devm_gpio_request_one(&spi->dev,
  437. ddata->nreset_gpio, GPIOF_OUT_INIT_LOW,
  438. "lcd reset");
  439. if (r < 0) {
  440. dev_err(&spi->dev, "couldn't request reset GPIO\n");
  441. goto err_gpio_req;
  442. }
  443. }
  444. r = sysfs_create_group(&spi->dev.kobj, &tpo_td043_attr_group);
  445. if (r) {
  446. dev_err(&spi->dev, "failed to create sysfs files\n");
  447. goto err_sysfs;
  448. }
  449. ddata->videomode = tpo_td043_timings;
  450. dssdev = &ddata->dssdev;
  451. dssdev->dev = &spi->dev;
  452. dssdev->driver = &tpo_td043_ops;
  453. dssdev->type = OMAP_DISPLAY_TYPE_DPI;
  454. dssdev->owner = THIS_MODULE;
  455. dssdev->panel.timings = ddata->videomode;
  456. r = omapdss_register_display(dssdev);
  457. if (r) {
  458. dev_err(&spi->dev, "Failed to register panel\n");
  459. goto err_reg;
  460. }
  461. return 0;
  462. err_reg:
  463. sysfs_remove_group(&spi->dev.kobj, &tpo_td043_attr_group);
  464. err_sysfs:
  465. err_gpio_req:
  466. err_regulator:
  467. omap_dss_put_device(ddata->in);
  468. return r;
  469. }
  470. static int tpo_td043_remove(struct spi_device *spi)
  471. {
  472. struct panel_drv_data *ddata = dev_get_drvdata(&spi->dev);
  473. struct omap_dss_device *dssdev = &ddata->dssdev;
  474. struct omap_dss_device *in = ddata->in;
  475. dev_dbg(&ddata->spi->dev, "%s\n", __func__);
  476. omapdss_unregister_display(dssdev);
  477. tpo_td043_disable(dssdev);
  478. tpo_td043_disconnect(dssdev);
  479. omap_dss_put_device(in);
  480. sysfs_remove_group(&spi->dev.kobj, &tpo_td043_attr_group);
  481. return 0;
  482. }
  483. #ifdef CONFIG_PM_SLEEP
  484. static int tpo_td043_spi_suspend(struct device *dev)
  485. {
  486. struct panel_drv_data *ddata = dev_get_drvdata(dev);
  487. dev_dbg(dev, "tpo_td043_spi_suspend, tpo %p\n", ddata);
  488. ddata->power_on_resume = ddata->powered_on;
  489. tpo_td043_power_off(ddata);
  490. ddata->spi_suspended = 1;
  491. return 0;
  492. }
  493. static int tpo_td043_spi_resume(struct device *dev)
  494. {
  495. struct panel_drv_data *ddata = dev_get_drvdata(dev);
  496. int ret;
  497. dev_dbg(dev, "tpo_td043_spi_resume\n");
  498. if (ddata->power_on_resume) {
  499. ret = tpo_td043_power_on(ddata);
  500. if (ret)
  501. return ret;
  502. }
  503. ddata->spi_suspended = 0;
  504. return 0;
  505. }
  506. #endif
  507. static SIMPLE_DEV_PM_OPS(tpo_td043_spi_pm,
  508. tpo_td043_spi_suspend, tpo_td043_spi_resume);
  509. static const struct of_device_id tpo_td043_of_match[] = {
  510. { .compatible = "omapdss,tpo,td043mtea1", },
  511. {},
  512. };
  513. MODULE_DEVICE_TABLE(of, tpo_td043_of_match);
  514. static struct spi_driver tpo_td043_spi_driver = {
  515. .driver = {
  516. .name = "panel-tpo-td043mtea1",
  517. .owner = THIS_MODULE,
  518. .pm = &tpo_td043_spi_pm,
  519. .of_match_table = tpo_td043_of_match,
  520. .suppress_bind_attrs = true,
  521. },
  522. .probe = tpo_td043_probe,
  523. .remove = tpo_td043_remove,
  524. };
  525. module_spi_driver(tpo_td043_spi_driver);
  526. MODULE_ALIAS("spi:tpo,td043mtea1");
  527. MODULE_AUTHOR("Gražvydas Ignotas <notasas@gmail.com>");
  528. MODULE_DESCRIPTION("TPO TD043MTEA1 LCD Driver");
  529. MODULE_LICENSE("GPL");