udc.c 47 KB

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  1. /*
  2. * udc.c - ChipIdea UDC driver
  3. *
  4. * Copyright (C) 2008 Chipidea - MIPS Technologies, Inc. All rights reserved.
  5. *
  6. * Author: David Lopo
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. */
  12. #include <linux/delay.h>
  13. #include <linux/device.h>
  14. #include <linux/dmapool.h>
  15. #include <linux/err.h>
  16. #include <linux/irqreturn.h>
  17. #include <linux/kernel.h>
  18. #include <linux/slab.h>
  19. #include <linux/pm_runtime.h>
  20. #include <linux/usb/ch9.h>
  21. #include <linux/usb/gadget.h>
  22. #include <linux/usb/otg-fsm.h>
  23. #include <linux/usb/chipidea.h>
  24. #include "ci.h"
  25. #include "udc.h"
  26. #include "bits.h"
  27. #include "debug.h"
  28. #include "otg.h"
  29. #include "otg_fsm.h"
  30. /* control endpoint description */
  31. static const struct usb_endpoint_descriptor
  32. ctrl_endpt_out_desc = {
  33. .bLength = USB_DT_ENDPOINT_SIZE,
  34. .bDescriptorType = USB_DT_ENDPOINT,
  35. .bEndpointAddress = USB_DIR_OUT,
  36. .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
  37. .wMaxPacketSize = cpu_to_le16(CTRL_PAYLOAD_MAX),
  38. };
  39. static const struct usb_endpoint_descriptor
  40. ctrl_endpt_in_desc = {
  41. .bLength = USB_DT_ENDPOINT_SIZE,
  42. .bDescriptorType = USB_DT_ENDPOINT,
  43. .bEndpointAddress = USB_DIR_IN,
  44. .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
  45. .wMaxPacketSize = cpu_to_le16(CTRL_PAYLOAD_MAX),
  46. };
  47. /**
  48. * hw_ep_bit: calculates the bit number
  49. * @num: endpoint number
  50. * @dir: endpoint direction
  51. *
  52. * This function returns bit number
  53. */
  54. static inline int hw_ep_bit(int num, int dir)
  55. {
  56. return num + (dir ? 16 : 0);
  57. }
  58. static inline int ep_to_bit(struct ci_hdrc *ci, int n)
  59. {
  60. int fill = 16 - ci->hw_ep_max / 2;
  61. if (n >= ci->hw_ep_max / 2)
  62. n += fill;
  63. return n;
  64. }
  65. /**
  66. * hw_device_state: enables/disables interrupts (execute without interruption)
  67. * @dma: 0 => disable, !0 => enable and set dma engine
  68. *
  69. * This function returns an error code
  70. */
  71. static int hw_device_state(struct ci_hdrc *ci, u32 dma)
  72. {
  73. if (dma) {
  74. hw_write(ci, OP_ENDPTLISTADDR, ~0, dma);
  75. /* interrupt, error, port change, reset, sleep/suspend */
  76. hw_write(ci, OP_USBINTR, ~0,
  77. USBi_UI|USBi_UEI|USBi_PCI|USBi_URI|USBi_SLI);
  78. } else {
  79. hw_write(ci, OP_USBINTR, ~0, 0);
  80. }
  81. return 0;
  82. }
  83. /**
  84. * hw_ep_flush: flush endpoint fifo (execute without interruption)
  85. * @num: endpoint number
  86. * @dir: endpoint direction
  87. *
  88. * This function returns an error code
  89. */
  90. static int hw_ep_flush(struct ci_hdrc *ci, int num, int dir)
  91. {
  92. int n = hw_ep_bit(num, dir);
  93. do {
  94. /* flush any pending transfer */
  95. hw_write(ci, OP_ENDPTFLUSH, ~0, BIT(n));
  96. while (hw_read(ci, OP_ENDPTFLUSH, BIT(n)))
  97. cpu_relax();
  98. } while (hw_read(ci, OP_ENDPTSTAT, BIT(n)));
  99. return 0;
  100. }
  101. /**
  102. * hw_ep_disable: disables endpoint (execute without interruption)
  103. * @num: endpoint number
  104. * @dir: endpoint direction
  105. *
  106. * This function returns an error code
  107. */
  108. static int hw_ep_disable(struct ci_hdrc *ci, int num, int dir)
  109. {
  110. hw_ep_flush(ci, num, dir);
  111. hw_write(ci, OP_ENDPTCTRL + num,
  112. dir ? ENDPTCTRL_TXE : ENDPTCTRL_RXE, 0);
  113. return 0;
  114. }
  115. /**
  116. * hw_ep_enable: enables endpoint (execute without interruption)
  117. * @num: endpoint number
  118. * @dir: endpoint direction
  119. * @type: endpoint type
  120. *
  121. * This function returns an error code
  122. */
  123. static int hw_ep_enable(struct ci_hdrc *ci, int num, int dir, int type)
  124. {
  125. u32 mask, data;
  126. if (dir) {
  127. mask = ENDPTCTRL_TXT; /* type */
  128. data = type << __ffs(mask);
  129. mask |= ENDPTCTRL_TXS; /* unstall */
  130. mask |= ENDPTCTRL_TXR; /* reset data toggle */
  131. data |= ENDPTCTRL_TXR;
  132. mask |= ENDPTCTRL_TXE; /* enable */
  133. data |= ENDPTCTRL_TXE;
  134. } else {
  135. mask = ENDPTCTRL_RXT; /* type */
  136. data = type << __ffs(mask);
  137. mask |= ENDPTCTRL_RXS; /* unstall */
  138. mask |= ENDPTCTRL_RXR; /* reset data toggle */
  139. data |= ENDPTCTRL_RXR;
  140. mask |= ENDPTCTRL_RXE; /* enable */
  141. data |= ENDPTCTRL_RXE;
  142. }
  143. hw_write(ci, OP_ENDPTCTRL + num, mask, data);
  144. return 0;
  145. }
  146. /**
  147. * hw_ep_get_halt: return endpoint halt status
  148. * @num: endpoint number
  149. * @dir: endpoint direction
  150. *
  151. * This function returns 1 if endpoint halted
  152. */
  153. static int hw_ep_get_halt(struct ci_hdrc *ci, int num, int dir)
  154. {
  155. u32 mask = dir ? ENDPTCTRL_TXS : ENDPTCTRL_RXS;
  156. return hw_read(ci, OP_ENDPTCTRL + num, mask) ? 1 : 0;
  157. }
  158. /**
  159. * hw_ep_prime: primes endpoint (execute without interruption)
  160. * @num: endpoint number
  161. * @dir: endpoint direction
  162. * @is_ctrl: true if control endpoint
  163. *
  164. * This function returns an error code
  165. */
  166. static int hw_ep_prime(struct ci_hdrc *ci, int num, int dir, int is_ctrl)
  167. {
  168. int n = hw_ep_bit(num, dir);
  169. if (is_ctrl && dir == RX && hw_read(ci, OP_ENDPTSETUPSTAT, BIT(num)))
  170. return -EAGAIN;
  171. hw_write(ci, OP_ENDPTPRIME, ~0, BIT(n));
  172. while (hw_read(ci, OP_ENDPTPRIME, BIT(n)))
  173. cpu_relax();
  174. if (is_ctrl && dir == RX && hw_read(ci, OP_ENDPTSETUPSTAT, BIT(num)))
  175. return -EAGAIN;
  176. /* status shoult be tested according with manual but it doesn't work */
  177. return 0;
  178. }
  179. /**
  180. * hw_ep_set_halt: configures ep halt & resets data toggle after clear (execute
  181. * without interruption)
  182. * @num: endpoint number
  183. * @dir: endpoint direction
  184. * @value: true => stall, false => unstall
  185. *
  186. * This function returns an error code
  187. */
  188. static int hw_ep_set_halt(struct ci_hdrc *ci, int num, int dir, int value)
  189. {
  190. if (value != 0 && value != 1)
  191. return -EINVAL;
  192. do {
  193. enum ci_hw_regs reg = OP_ENDPTCTRL + num;
  194. u32 mask_xs = dir ? ENDPTCTRL_TXS : ENDPTCTRL_RXS;
  195. u32 mask_xr = dir ? ENDPTCTRL_TXR : ENDPTCTRL_RXR;
  196. /* data toggle - reserved for EP0 but it's in ESS */
  197. hw_write(ci, reg, mask_xs|mask_xr,
  198. value ? mask_xs : mask_xr);
  199. } while (value != hw_ep_get_halt(ci, num, dir));
  200. return 0;
  201. }
  202. /**
  203. * hw_is_port_high_speed: test if port is high speed
  204. *
  205. * This function returns true if high speed port
  206. */
  207. static int hw_port_is_high_speed(struct ci_hdrc *ci)
  208. {
  209. return ci->hw_bank.lpm ? hw_read(ci, OP_DEVLC, DEVLC_PSPD) :
  210. hw_read(ci, OP_PORTSC, PORTSC_HSP);
  211. }
  212. /**
  213. * hw_test_and_clear_complete: test & clear complete status (execute without
  214. * interruption)
  215. * @n: endpoint number
  216. *
  217. * This function returns complete status
  218. */
  219. static int hw_test_and_clear_complete(struct ci_hdrc *ci, int n)
  220. {
  221. n = ep_to_bit(ci, n);
  222. return hw_test_and_clear(ci, OP_ENDPTCOMPLETE, BIT(n));
  223. }
  224. /**
  225. * hw_test_and_clear_intr_active: test & clear active interrupts (execute
  226. * without interruption)
  227. *
  228. * This function returns active interrutps
  229. */
  230. static u32 hw_test_and_clear_intr_active(struct ci_hdrc *ci)
  231. {
  232. u32 reg = hw_read_intr_status(ci) & hw_read_intr_enable(ci);
  233. hw_write(ci, OP_USBSTS, ~0, reg);
  234. return reg;
  235. }
  236. /**
  237. * hw_test_and_clear_setup_guard: test & clear setup guard (execute without
  238. * interruption)
  239. *
  240. * This function returns guard value
  241. */
  242. static int hw_test_and_clear_setup_guard(struct ci_hdrc *ci)
  243. {
  244. return hw_test_and_write(ci, OP_USBCMD, USBCMD_SUTW, 0);
  245. }
  246. /**
  247. * hw_test_and_set_setup_guard: test & set setup guard (execute without
  248. * interruption)
  249. *
  250. * This function returns guard value
  251. */
  252. static int hw_test_and_set_setup_guard(struct ci_hdrc *ci)
  253. {
  254. return hw_test_and_write(ci, OP_USBCMD, USBCMD_SUTW, USBCMD_SUTW);
  255. }
  256. /**
  257. * hw_usb_set_address: configures USB address (execute without interruption)
  258. * @value: new USB address
  259. *
  260. * This function explicitly sets the address, without the "USBADRA" (advance)
  261. * feature, which is not supported by older versions of the controller.
  262. */
  263. static void hw_usb_set_address(struct ci_hdrc *ci, u8 value)
  264. {
  265. hw_write(ci, OP_DEVICEADDR, DEVICEADDR_USBADR,
  266. value << __ffs(DEVICEADDR_USBADR));
  267. }
  268. /**
  269. * hw_usb_reset: restart device after a bus reset (execute without
  270. * interruption)
  271. *
  272. * This function returns an error code
  273. */
  274. static int hw_usb_reset(struct ci_hdrc *ci)
  275. {
  276. hw_usb_set_address(ci, 0);
  277. /* ESS flushes only at end?!? */
  278. hw_write(ci, OP_ENDPTFLUSH, ~0, ~0);
  279. /* clear setup token semaphores */
  280. hw_write(ci, OP_ENDPTSETUPSTAT, 0, 0);
  281. /* clear complete status */
  282. hw_write(ci, OP_ENDPTCOMPLETE, 0, 0);
  283. /* wait until all bits cleared */
  284. while (hw_read(ci, OP_ENDPTPRIME, ~0))
  285. udelay(10); /* not RTOS friendly */
  286. /* reset all endpoints ? */
  287. /* reset internal status and wait for further instructions
  288. no need to verify the port reset status (ESS does it) */
  289. return 0;
  290. }
  291. /******************************************************************************
  292. * UTIL block
  293. *****************************************************************************/
  294. static int add_td_to_list(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq,
  295. unsigned length)
  296. {
  297. int i;
  298. u32 temp;
  299. struct td_node *lastnode, *node = kzalloc(sizeof(struct td_node),
  300. GFP_ATOMIC);
  301. if (node == NULL)
  302. return -ENOMEM;
  303. node->ptr = dma_pool_alloc(hwep->td_pool, GFP_ATOMIC,
  304. &node->dma);
  305. if (node->ptr == NULL) {
  306. kfree(node);
  307. return -ENOMEM;
  308. }
  309. memset(node->ptr, 0, sizeof(struct ci_hw_td));
  310. node->ptr->token = cpu_to_le32(length << __ffs(TD_TOTAL_BYTES));
  311. node->ptr->token &= cpu_to_le32(TD_TOTAL_BYTES);
  312. node->ptr->token |= cpu_to_le32(TD_STATUS_ACTIVE);
  313. if (hwep->type == USB_ENDPOINT_XFER_ISOC && hwep->dir == TX) {
  314. u32 mul = hwreq->req.length / hwep->ep.maxpacket;
  315. if (hwreq->req.length == 0
  316. || hwreq->req.length % hwep->ep.maxpacket)
  317. mul++;
  318. node->ptr->token |= mul << __ffs(TD_MULTO);
  319. }
  320. temp = (u32) (hwreq->req.dma + hwreq->req.actual);
  321. if (length) {
  322. node->ptr->page[0] = cpu_to_le32(temp);
  323. for (i = 1; i < TD_PAGE_COUNT; i++) {
  324. u32 page = temp + i * CI_HDRC_PAGE_SIZE;
  325. page &= ~TD_RESERVED_MASK;
  326. node->ptr->page[i] = cpu_to_le32(page);
  327. }
  328. }
  329. hwreq->req.actual += length;
  330. if (!list_empty(&hwreq->tds)) {
  331. /* get the last entry */
  332. lastnode = list_entry(hwreq->tds.prev,
  333. struct td_node, td);
  334. lastnode->ptr->next = cpu_to_le32(node->dma);
  335. }
  336. INIT_LIST_HEAD(&node->td);
  337. list_add_tail(&node->td, &hwreq->tds);
  338. return 0;
  339. }
  340. /**
  341. * _usb_addr: calculates endpoint address from direction & number
  342. * @ep: endpoint
  343. */
  344. static inline u8 _usb_addr(struct ci_hw_ep *ep)
  345. {
  346. return ((ep->dir == TX) ? USB_ENDPOINT_DIR_MASK : 0) | ep->num;
  347. }
  348. /**
  349. * _hardware_queue: configures a request at hardware level
  350. * @gadget: gadget
  351. * @hwep: endpoint
  352. *
  353. * This function returns an error code
  354. */
  355. static int _hardware_enqueue(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq)
  356. {
  357. struct ci_hdrc *ci = hwep->ci;
  358. int ret = 0;
  359. unsigned rest = hwreq->req.length;
  360. int pages = TD_PAGE_COUNT;
  361. struct td_node *firstnode, *lastnode;
  362. /* don't queue twice */
  363. if (hwreq->req.status == -EALREADY)
  364. return -EALREADY;
  365. hwreq->req.status = -EALREADY;
  366. ret = usb_gadget_map_request(&ci->gadget, &hwreq->req, hwep->dir);
  367. if (ret)
  368. return ret;
  369. /*
  370. * The first buffer could be not page aligned.
  371. * In that case we have to span into one extra td.
  372. */
  373. if (hwreq->req.dma % PAGE_SIZE)
  374. pages--;
  375. if (rest == 0)
  376. add_td_to_list(hwep, hwreq, 0);
  377. while (rest > 0) {
  378. unsigned count = min(hwreq->req.length - hwreq->req.actual,
  379. (unsigned)(pages * CI_HDRC_PAGE_SIZE));
  380. add_td_to_list(hwep, hwreq, count);
  381. rest -= count;
  382. }
  383. if (hwreq->req.zero && hwreq->req.length && hwep->dir == TX
  384. && (hwreq->req.length % hwep->ep.maxpacket == 0))
  385. add_td_to_list(hwep, hwreq, 0);
  386. firstnode = list_first_entry(&hwreq->tds, struct td_node, td);
  387. lastnode = list_entry(hwreq->tds.prev,
  388. struct td_node, td);
  389. lastnode->ptr->next = cpu_to_le32(TD_TERMINATE);
  390. if (!hwreq->req.no_interrupt)
  391. lastnode->ptr->token |= cpu_to_le32(TD_IOC);
  392. wmb();
  393. hwreq->req.actual = 0;
  394. if (!list_empty(&hwep->qh.queue)) {
  395. struct ci_hw_req *hwreqprev;
  396. int n = hw_ep_bit(hwep->num, hwep->dir);
  397. int tmp_stat;
  398. struct td_node *prevlastnode;
  399. u32 next = firstnode->dma & TD_ADDR_MASK;
  400. hwreqprev = list_entry(hwep->qh.queue.prev,
  401. struct ci_hw_req, queue);
  402. prevlastnode = list_entry(hwreqprev->tds.prev,
  403. struct td_node, td);
  404. prevlastnode->ptr->next = cpu_to_le32(next);
  405. wmb();
  406. if (hw_read(ci, OP_ENDPTPRIME, BIT(n)))
  407. goto done;
  408. do {
  409. hw_write(ci, OP_USBCMD, USBCMD_ATDTW, USBCMD_ATDTW);
  410. tmp_stat = hw_read(ci, OP_ENDPTSTAT, BIT(n));
  411. } while (!hw_read(ci, OP_USBCMD, USBCMD_ATDTW));
  412. hw_write(ci, OP_USBCMD, USBCMD_ATDTW, 0);
  413. if (tmp_stat)
  414. goto done;
  415. }
  416. /* QH configuration */
  417. hwep->qh.ptr->td.next = cpu_to_le32(firstnode->dma);
  418. hwep->qh.ptr->td.token &=
  419. cpu_to_le32(~(TD_STATUS_HALTED|TD_STATUS_ACTIVE));
  420. if (hwep->type == USB_ENDPOINT_XFER_ISOC && hwep->dir == RX) {
  421. u32 mul = hwreq->req.length / hwep->ep.maxpacket;
  422. if (hwreq->req.length == 0
  423. || hwreq->req.length % hwep->ep.maxpacket)
  424. mul++;
  425. hwep->qh.ptr->cap |= mul << __ffs(QH_MULT);
  426. }
  427. wmb(); /* synchronize before ep prime */
  428. ret = hw_ep_prime(ci, hwep->num, hwep->dir,
  429. hwep->type == USB_ENDPOINT_XFER_CONTROL);
  430. done:
  431. return ret;
  432. }
  433. /*
  434. * free_pending_td: remove a pending request for the endpoint
  435. * @hwep: endpoint
  436. */
  437. static void free_pending_td(struct ci_hw_ep *hwep)
  438. {
  439. struct td_node *pending = hwep->pending_td;
  440. dma_pool_free(hwep->td_pool, pending->ptr, pending->dma);
  441. hwep->pending_td = NULL;
  442. kfree(pending);
  443. }
  444. static int reprime_dtd(struct ci_hdrc *ci, struct ci_hw_ep *hwep,
  445. struct td_node *node)
  446. {
  447. hwep->qh.ptr->td.next = node->dma;
  448. hwep->qh.ptr->td.token &=
  449. cpu_to_le32(~(TD_STATUS_HALTED | TD_STATUS_ACTIVE));
  450. /* Synchronize before ep prime */
  451. wmb();
  452. return hw_ep_prime(ci, hwep->num, hwep->dir,
  453. hwep->type == USB_ENDPOINT_XFER_CONTROL);
  454. }
  455. /**
  456. * _hardware_dequeue: handles a request at hardware level
  457. * @gadget: gadget
  458. * @hwep: endpoint
  459. *
  460. * This function returns an error code
  461. */
  462. static int _hardware_dequeue(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq)
  463. {
  464. u32 tmptoken;
  465. struct td_node *node, *tmpnode;
  466. unsigned remaining_length;
  467. unsigned actual = hwreq->req.length;
  468. struct ci_hdrc *ci = hwep->ci;
  469. if (hwreq->req.status != -EALREADY)
  470. return -EINVAL;
  471. hwreq->req.status = 0;
  472. list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
  473. tmptoken = le32_to_cpu(node->ptr->token);
  474. if ((TD_STATUS_ACTIVE & tmptoken) != 0) {
  475. int n = hw_ep_bit(hwep->num, hwep->dir);
  476. if (ci->rev == CI_REVISION_24)
  477. if (!hw_read(ci, OP_ENDPTSTAT, BIT(n)))
  478. reprime_dtd(ci, hwep, node);
  479. hwreq->req.status = -EALREADY;
  480. return -EBUSY;
  481. }
  482. remaining_length = (tmptoken & TD_TOTAL_BYTES);
  483. remaining_length >>= __ffs(TD_TOTAL_BYTES);
  484. actual -= remaining_length;
  485. hwreq->req.status = tmptoken & TD_STATUS;
  486. if ((TD_STATUS_HALTED & hwreq->req.status)) {
  487. hwreq->req.status = -EPIPE;
  488. break;
  489. } else if ((TD_STATUS_DT_ERR & hwreq->req.status)) {
  490. hwreq->req.status = -EPROTO;
  491. break;
  492. } else if ((TD_STATUS_TR_ERR & hwreq->req.status)) {
  493. hwreq->req.status = -EILSEQ;
  494. break;
  495. }
  496. if (remaining_length) {
  497. if (hwep->dir) {
  498. hwreq->req.status = -EPROTO;
  499. break;
  500. }
  501. }
  502. /*
  503. * As the hardware could still address the freed td
  504. * which will run the udc unusable, the cleanup of the
  505. * td has to be delayed by one.
  506. */
  507. if (hwep->pending_td)
  508. free_pending_td(hwep);
  509. hwep->pending_td = node;
  510. list_del_init(&node->td);
  511. }
  512. usb_gadget_unmap_request(&hwep->ci->gadget, &hwreq->req, hwep->dir);
  513. hwreq->req.actual += actual;
  514. if (hwreq->req.status)
  515. return hwreq->req.status;
  516. return hwreq->req.actual;
  517. }
  518. /**
  519. * _ep_nuke: dequeues all endpoint requests
  520. * @hwep: endpoint
  521. *
  522. * This function returns an error code
  523. * Caller must hold lock
  524. */
  525. static int _ep_nuke(struct ci_hw_ep *hwep)
  526. __releases(hwep->lock)
  527. __acquires(hwep->lock)
  528. {
  529. struct td_node *node, *tmpnode;
  530. if (hwep == NULL)
  531. return -EINVAL;
  532. hw_ep_flush(hwep->ci, hwep->num, hwep->dir);
  533. while (!list_empty(&hwep->qh.queue)) {
  534. /* pop oldest request */
  535. struct ci_hw_req *hwreq = list_entry(hwep->qh.queue.next,
  536. struct ci_hw_req, queue);
  537. list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
  538. dma_pool_free(hwep->td_pool, node->ptr, node->dma);
  539. list_del_init(&node->td);
  540. node->ptr = NULL;
  541. kfree(node);
  542. }
  543. list_del_init(&hwreq->queue);
  544. hwreq->req.status = -ESHUTDOWN;
  545. if (hwreq->req.complete != NULL) {
  546. spin_unlock(hwep->lock);
  547. usb_gadget_giveback_request(&hwep->ep, &hwreq->req);
  548. spin_lock(hwep->lock);
  549. }
  550. }
  551. if (hwep->pending_td)
  552. free_pending_td(hwep);
  553. return 0;
  554. }
  555. static int _ep_set_halt(struct usb_ep *ep, int value, bool check_transfer)
  556. {
  557. struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
  558. int direction, retval = 0;
  559. unsigned long flags;
  560. if (ep == NULL || hwep->ep.desc == NULL)
  561. return -EINVAL;
  562. if (usb_endpoint_xfer_isoc(hwep->ep.desc))
  563. return -EOPNOTSUPP;
  564. spin_lock_irqsave(hwep->lock, flags);
  565. if (value && hwep->dir == TX && check_transfer &&
  566. !list_empty(&hwep->qh.queue) &&
  567. !usb_endpoint_xfer_control(hwep->ep.desc)) {
  568. spin_unlock_irqrestore(hwep->lock, flags);
  569. return -EAGAIN;
  570. }
  571. direction = hwep->dir;
  572. do {
  573. retval |= hw_ep_set_halt(hwep->ci, hwep->num, hwep->dir, value);
  574. if (!value)
  575. hwep->wedge = 0;
  576. if (hwep->type == USB_ENDPOINT_XFER_CONTROL)
  577. hwep->dir = (hwep->dir == TX) ? RX : TX;
  578. } while (hwep->dir != direction);
  579. spin_unlock_irqrestore(hwep->lock, flags);
  580. return retval;
  581. }
  582. /**
  583. * _gadget_stop_activity: stops all USB activity, flushes & disables all endpts
  584. * @gadget: gadget
  585. *
  586. * This function returns an error code
  587. */
  588. static int _gadget_stop_activity(struct usb_gadget *gadget)
  589. {
  590. struct usb_ep *ep;
  591. struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget);
  592. unsigned long flags;
  593. spin_lock_irqsave(&ci->lock, flags);
  594. ci->gadget.speed = USB_SPEED_UNKNOWN;
  595. ci->remote_wakeup = 0;
  596. ci->suspended = 0;
  597. spin_unlock_irqrestore(&ci->lock, flags);
  598. /* flush all endpoints */
  599. gadget_for_each_ep(ep, gadget) {
  600. usb_ep_fifo_flush(ep);
  601. }
  602. usb_ep_fifo_flush(&ci->ep0out->ep);
  603. usb_ep_fifo_flush(&ci->ep0in->ep);
  604. /* make sure to disable all endpoints */
  605. gadget_for_each_ep(ep, gadget) {
  606. usb_ep_disable(ep);
  607. }
  608. if (ci->status != NULL) {
  609. usb_ep_free_request(&ci->ep0in->ep, ci->status);
  610. ci->status = NULL;
  611. }
  612. return 0;
  613. }
  614. /******************************************************************************
  615. * ISR block
  616. *****************************************************************************/
  617. /**
  618. * isr_reset_handler: USB reset interrupt handler
  619. * @ci: UDC device
  620. *
  621. * This function resets USB engine after a bus reset occurred
  622. */
  623. static void isr_reset_handler(struct ci_hdrc *ci)
  624. __releases(ci->lock)
  625. __acquires(ci->lock)
  626. {
  627. int retval;
  628. spin_unlock(&ci->lock);
  629. if (ci->gadget.speed != USB_SPEED_UNKNOWN)
  630. usb_gadget_udc_reset(&ci->gadget, ci->driver);
  631. retval = _gadget_stop_activity(&ci->gadget);
  632. if (retval)
  633. goto done;
  634. retval = hw_usb_reset(ci);
  635. if (retval)
  636. goto done;
  637. ci->status = usb_ep_alloc_request(&ci->ep0in->ep, GFP_ATOMIC);
  638. if (ci->status == NULL)
  639. retval = -ENOMEM;
  640. done:
  641. spin_lock(&ci->lock);
  642. if (retval)
  643. dev_err(ci->dev, "error: %i\n", retval);
  644. }
  645. /**
  646. * isr_get_status_complete: get_status request complete function
  647. * @ep: endpoint
  648. * @req: request handled
  649. *
  650. * Caller must release lock
  651. */
  652. static void isr_get_status_complete(struct usb_ep *ep, struct usb_request *req)
  653. {
  654. if (ep == NULL || req == NULL)
  655. return;
  656. kfree(req->buf);
  657. usb_ep_free_request(ep, req);
  658. }
  659. /**
  660. * _ep_queue: queues (submits) an I/O request to an endpoint
  661. *
  662. * Caller must hold lock
  663. */
  664. static int _ep_queue(struct usb_ep *ep, struct usb_request *req,
  665. gfp_t __maybe_unused gfp_flags)
  666. {
  667. struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
  668. struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req);
  669. struct ci_hdrc *ci = hwep->ci;
  670. int retval = 0;
  671. if (ep == NULL || req == NULL || hwep->ep.desc == NULL)
  672. return -EINVAL;
  673. if (hwep->type == USB_ENDPOINT_XFER_CONTROL) {
  674. if (req->length)
  675. hwep = (ci->ep0_dir == RX) ?
  676. ci->ep0out : ci->ep0in;
  677. if (!list_empty(&hwep->qh.queue)) {
  678. _ep_nuke(hwep);
  679. retval = -EOVERFLOW;
  680. dev_warn(hwep->ci->dev, "endpoint ctrl %X nuked\n",
  681. _usb_addr(hwep));
  682. }
  683. }
  684. if (usb_endpoint_xfer_isoc(hwep->ep.desc) &&
  685. hwreq->req.length > (1 + hwep->ep.mult) * hwep->ep.maxpacket) {
  686. dev_err(hwep->ci->dev, "request length too big for isochronous\n");
  687. return -EMSGSIZE;
  688. }
  689. /* first nuke then test link, e.g. previous status has not sent */
  690. if (!list_empty(&hwreq->queue)) {
  691. dev_err(hwep->ci->dev, "request already in queue\n");
  692. return -EBUSY;
  693. }
  694. /* push request */
  695. hwreq->req.status = -EINPROGRESS;
  696. hwreq->req.actual = 0;
  697. retval = _hardware_enqueue(hwep, hwreq);
  698. if (retval == -EALREADY)
  699. retval = 0;
  700. if (!retval)
  701. list_add_tail(&hwreq->queue, &hwep->qh.queue);
  702. return retval;
  703. }
  704. /**
  705. * isr_get_status_response: get_status request response
  706. * @ci: ci struct
  707. * @setup: setup request packet
  708. *
  709. * This function returns an error code
  710. */
  711. static int isr_get_status_response(struct ci_hdrc *ci,
  712. struct usb_ctrlrequest *setup)
  713. __releases(hwep->lock)
  714. __acquires(hwep->lock)
  715. {
  716. struct ci_hw_ep *hwep = ci->ep0in;
  717. struct usb_request *req = NULL;
  718. gfp_t gfp_flags = GFP_ATOMIC;
  719. int dir, num, retval;
  720. if (hwep == NULL || setup == NULL)
  721. return -EINVAL;
  722. spin_unlock(hwep->lock);
  723. req = usb_ep_alloc_request(&hwep->ep, gfp_flags);
  724. spin_lock(hwep->lock);
  725. if (req == NULL)
  726. return -ENOMEM;
  727. req->complete = isr_get_status_complete;
  728. req->length = 2;
  729. req->buf = kzalloc(req->length, gfp_flags);
  730. if (req->buf == NULL) {
  731. retval = -ENOMEM;
  732. goto err_free_req;
  733. }
  734. if ((setup->bRequestType & USB_RECIP_MASK) == USB_RECIP_DEVICE) {
  735. *(u16 *)req->buf = (ci->remote_wakeup << 1) |
  736. ci->gadget.is_selfpowered;
  737. } else if ((setup->bRequestType & USB_RECIP_MASK) \
  738. == USB_RECIP_ENDPOINT) {
  739. dir = (le16_to_cpu(setup->wIndex) & USB_ENDPOINT_DIR_MASK) ?
  740. TX : RX;
  741. num = le16_to_cpu(setup->wIndex) & USB_ENDPOINT_NUMBER_MASK;
  742. *(u16 *)req->buf = hw_ep_get_halt(ci, num, dir);
  743. }
  744. /* else do nothing; reserved for future use */
  745. retval = _ep_queue(&hwep->ep, req, gfp_flags);
  746. if (retval)
  747. goto err_free_buf;
  748. return 0;
  749. err_free_buf:
  750. kfree(req->buf);
  751. err_free_req:
  752. spin_unlock(hwep->lock);
  753. usb_ep_free_request(&hwep->ep, req);
  754. spin_lock(hwep->lock);
  755. return retval;
  756. }
  757. /**
  758. * isr_setup_status_complete: setup_status request complete function
  759. * @ep: endpoint
  760. * @req: request handled
  761. *
  762. * Caller must release lock. Put the port in test mode if test mode
  763. * feature is selected.
  764. */
  765. static void
  766. isr_setup_status_complete(struct usb_ep *ep, struct usb_request *req)
  767. {
  768. struct ci_hdrc *ci = req->context;
  769. unsigned long flags;
  770. if (ci->setaddr) {
  771. hw_usb_set_address(ci, ci->address);
  772. ci->setaddr = false;
  773. if (ci->address)
  774. usb_gadget_set_state(&ci->gadget, USB_STATE_ADDRESS);
  775. }
  776. spin_lock_irqsave(&ci->lock, flags);
  777. if (ci->test_mode)
  778. hw_port_test_set(ci, ci->test_mode);
  779. spin_unlock_irqrestore(&ci->lock, flags);
  780. }
  781. /**
  782. * isr_setup_status_phase: queues the status phase of a setup transation
  783. * @ci: ci struct
  784. *
  785. * This function returns an error code
  786. */
  787. static int isr_setup_status_phase(struct ci_hdrc *ci)
  788. {
  789. int retval;
  790. struct ci_hw_ep *hwep;
  791. hwep = (ci->ep0_dir == TX) ? ci->ep0out : ci->ep0in;
  792. ci->status->context = ci;
  793. ci->status->complete = isr_setup_status_complete;
  794. retval = _ep_queue(&hwep->ep, ci->status, GFP_ATOMIC);
  795. return retval;
  796. }
  797. /**
  798. * isr_tr_complete_low: transaction complete low level handler
  799. * @hwep: endpoint
  800. *
  801. * This function returns an error code
  802. * Caller must hold lock
  803. */
  804. static int isr_tr_complete_low(struct ci_hw_ep *hwep)
  805. __releases(hwep->lock)
  806. __acquires(hwep->lock)
  807. {
  808. struct ci_hw_req *hwreq, *hwreqtemp;
  809. struct ci_hw_ep *hweptemp = hwep;
  810. int retval = 0;
  811. list_for_each_entry_safe(hwreq, hwreqtemp, &hwep->qh.queue,
  812. queue) {
  813. retval = _hardware_dequeue(hwep, hwreq);
  814. if (retval < 0)
  815. break;
  816. list_del_init(&hwreq->queue);
  817. if (hwreq->req.complete != NULL) {
  818. spin_unlock(hwep->lock);
  819. if ((hwep->type == USB_ENDPOINT_XFER_CONTROL) &&
  820. hwreq->req.length)
  821. hweptemp = hwep->ci->ep0in;
  822. usb_gadget_giveback_request(&hweptemp->ep, &hwreq->req);
  823. spin_lock(hwep->lock);
  824. }
  825. }
  826. if (retval == -EBUSY)
  827. retval = 0;
  828. return retval;
  829. }
  830. static int otg_a_alt_hnp_support(struct ci_hdrc *ci)
  831. {
  832. dev_warn(&ci->gadget.dev,
  833. "connect the device to an alternate port if you want HNP\n");
  834. return isr_setup_status_phase(ci);
  835. }
  836. /**
  837. * isr_setup_packet_handler: setup packet handler
  838. * @ci: UDC descriptor
  839. *
  840. * This function handles setup packet
  841. */
  842. static void isr_setup_packet_handler(struct ci_hdrc *ci)
  843. __releases(ci->lock)
  844. __acquires(ci->lock)
  845. {
  846. struct ci_hw_ep *hwep = &ci->ci_hw_ep[0];
  847. struct usb_ctrlrequest req;
  848. int type, num, dir, err = -EINVAL;
  849. u8 tmode = 0;
  850. /*
  851. * Flush data and handshake transactions of previous
  852. * setup packet.
  853. */
  854. _ep_nuke(ci->ep0out);
  855. _ep_nuke(ci->ep0in);
  856. /* read_setup_packet */
  857. do {
  858. hw_test_and_set_setup_guard(ci);
  859. memcpy(&req, &hwep->qh.ptr->setup, sizeof(req));
  860. } while (!hw_test_and_clear_setup_guard(ci));
  861. type = req.bRequestType;
  862. ci->ep0_dir = (type & USB_DIR_IN) ? TX : RX;
  863. switch (req.bRequest) {
  864. case USB_REQ_CLEAR_FEATURE:
  865. if (type == (USB_DIR_OUT|USB_RECIP_ENDPOINT) &&
  866. le16_to_cpu(req.wValue) ==
  867. USB_ENDPOINT_HALT) {
  868. if (req.wLength != 0)
  869. break;
  870. num = le16_to_cpu(req.wIndex);
  871. dir = num & USB_ENDPOINT_DIR_MASK;
  872. num &= USB_ENDPOINT_NUMBER_MASK;
  873. if (dir) /* TX */
  874. num += ci->hw_ep_max / 2;
  875. if (!ci->ci_hw_ep[num].wedge) {
  876. spin_unlock(&ci->lock);
  877. err = usb_ep_clear_halt(
  878. &ci->ci_hw_ep[num].ep);
  879. spin_lock(&ci->lock);
  880. if (err)
  881. break;
  882. }
  883. err = isr_setup_status_phase(ci);
  884. } else if (type == (USB_DIR_OUT|USB_RECIP_DEVICE) &&
  885. le16_to_cpu(req.wValue) ==
  886. USB_DEVICE_REMOTE_WAKEUP) {
  887. if (req.wLength != 0)
  888. break;
  889. ci->remote_wakeup = 0;
  890. err = isr_setup_status_phase(ci);
  891. } else {
  892. goto delegate;
  893. }
  894. break;
  895. case USB_REQ_GET_STATUS:
  896. if (type != (USB_DIR_IN|USB_RECIP_DEVICE) &&
  897. type != (USB_DIR_IN|USB_RECIP_ENDPOINT) &&
  898. type != (USB_DIR_IN|USB_RECIP_INTERFACE))
  899. goto delegate;
  900. if (le16_to_cpu(req.wLength) != 2 ||
  901. le16_to_cpu(req.wValue) != 0)
  902. break;
  903. err = isr_get_status_response(ci, &req);
  904. break;
  905. case USB_REQ_SET_ADDRESS:
  906. if (type != (USB_DIR_OUT|USB_RECIP_DEVICE))
  907. goto delegate;
  908. if (le16_to_cpu(req.wLength) != 0 ||
  909. le16_to_cpu(req.wIndex) != 0)
  910. break;
  911. ci->address = (u8)le16_to_cpu(req.wValue);
  912. ci->setaddr = true;
  913. err = isr_setup_status_phase(ci);
  914. break;
  915. case USB_REQ_SET_FEATURE:
  916. if (type == (USB_DIR_OUT|USB_RECIP_ENDPOINT) &&
  917. le16_to_cpu(req.wValue) ==
  918. USB_ENDPOINT_HALT) {
  919. if (req.wLength != 0)
  920. break;
  921. num = le16_to_cpu(req.wIndex);
  922. dir = num & USB_ENDPOINT_DIR_MASK;
  923. num &= USB_ENDPOINT_NUMBER_MASK;
  924. if (dir) /* TX */
  925. num += ci->hw_ep_max / 2;
  926. spin_unlock(&ci->lock);
  927. err = _ep_set_halt(&ci->ci_hw_ep[num].ep, 1, false);
  928. spin_lock(&ci->lock);
  929. if (!err)
  930. isr_setup_status_phase(ci);
  931. } else if (type == (USB_DIR_OUT|USB_RECIP_DEVICE)) {
  932. if (req.wLength != 0)
  933. break;
  934. switch (le16_to_cpu(req.wValue)) {
  935. case USB_DEVICE_REMOTE_WAKEUP:
  936. ci->remote_wakeup = 1;
  937. err = isr_setup_status_phase(ci);
  938. break;
  939. case USB_DEVICE_TEST_MODE:
  940. tmode = le16_to_cpu(req.wIndex) >> 8;
  941. switch (tmode) {
  942. case TEST_J:
  943. case TEST_K:
  944. case TEST_SE0_NAK:
  945. case TEST_PACKET:
  946. case TEST_FORCE_EN:
  947. ci->test_mode = tmode;
  948. err = isr_setup_status_phase(
  949. ci);
  950. break;
  951. default:
  952. break;
  953. }
  954. break;
  955. case USB_DEVICE_B_HNP_ENABLE:
  956. if (ci_otg_is_fsm_mode(ci)) {
  957. ci->gadget.b_hnp_enable = 1;
  958. err = isr_setup_status_phase(
  959. ci);
  960. }
  961. break;
  962. case USB_DEVICE_A_ALT_HNP_SUPPORT:
  963. if (ci_otg_is_fsm_mode(ci))
  964. err = otg_a_alt_hnp_support(ci);
  965. break;
  966. case USB_DEVICE_A_HNP_SUPPORT:
  967. if (ci_otg_is_fsm_mode(ci)) {
  968. ci->gadget.a_hnp_support = 1;
  969. err = isr_setup_status_phase(
  970. ci);
  971. }
  972. break;
  973. default:
  974. goto delegate;
  975. }
  976. } else {
  977. goto delegate;
  978. }
  979. break;
  980. default:
  981. delegate:
  982. if (req.wLength == 0) /* no data phase */
  983. ci->ep0_dir = TX;
  984. spin_unlock(&ci->lock);
  985. err = ci->driver->setup(&ci->gadget, &req);
  986. spin_lock(&ci->lock);
  987. break;
  988. }
  989. if (err < 0) {
  990. spin_unlock(&ci->lock);
  991. if (_ep_set_halt(&hwep->ep, 1, false))
  992. dev_err(ci->dev, "error: _ep_set_halt\n");
  993. spin_lock(&ci->lock);
  994. }
  995. }
  996. /**
  997. * isr_tr_complete_handler: transaction complete interrupt handler
  998. * @ci: UDC descriptor
  999. *
  1000. * This function handles traffic events
  1001. */
  1002. static void isr_tr_complete_handler(struct ci_hdrc *ci)
  1003. __releases(ci->lock)
  1004. __acquires(ci->lock)
  1005. {
  1006. unsigned i;
  1007. int err;
  1008. for (i = 0; i < ci->hw_ep_max; i++) {
  1009. struct ci_hw_ep *hwep = &ci->ci_hw_ep[i];
  1010. if (hwep->ep.desc == NULL)
  1011. continue; /* not configured */
  1012. if (hw_test_and_clear_complete(ci, i)) {
  1013. err = isr_tr_complete_low(hwep);
  1014. if (hwep->type == USB_ENDPOINT_XFER_CONTROL) {
  1015. if (err > 0) /* needs status phase */
  1016. err = isr_setup_status_phase(ci);
  1017. if (err < 0) {
  1018. spin_unlock(&ci->lock);
  1019. if (_ep_set_halt(&hwep->ep, 1, false))
  1020. dev_err(ci->dev,
  1021. "error: _ep_set_halt\n");
  1022. spin_lock(&ci->lock);
  1023. }
  1024. }
  1025. }
  1026. /* Only handle setup packet below */
  1027. if (i == 0 &&
  1028. hw_test_and_clear(ci, OP_ENDPTSETUPSTAT, BIT(0)))
  1029. isr_setup_packet_handler(ci);
  1030. }
  1031. }
  1032. /******************************************************************************
  1033. * ENDPT block
  1034. *****************************************************************************/
  1035. /**
  1036. * ep_enable: configure endpoint, making it usable
  1037. *
  1038. * Check usb_ep_enable() at "usb_gadget.h" for details
  1039. */
  1040. static int ep_enable(struct usb_ep *ep,
  1041. const struct usb_endpoint_descriptor *desc)
  1042. {
  1043. struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
  1044. int retval = 0;
  1045. unsigned long flags;
  1046. u32 cap = 0;
  1047. if (ep == NULL || desc == NULL)
  1048. return -EINVAL;
  1049. spin_lock_irqsave(hwep->lock, flags);
  1050. /* only internal SW should enable ctrl endpts */
  1051. if (!list_empty(&hwep->qh.queue)) {
  1052. dev_warn(hwep->ci->dev, "enabling a non-empty endpoint!\n");
  1053. spin_unlock_irqrestore(hwep->lock, flags);
  1054. return -EBUSY;
  1055. }
  1056. hwep->ep.desc = desc;
  1057. hwep->dir = usb_endpoint_dir_in(desc) ? TX : RX;
  1058. hwep->num = usb_endpoint_num(desc);
  1059. hwep->type = usb_endpoint_type(desc);
  1060. hwep->ep.maxpacket = usb_endpoint_maxp(desc) & 0x07ff;
  1061. hwep->ep.mult = QH_ISO_MULT(usb_endpoint_maxp(desc));
  1062. if (hwep->type == USB_ENDPOINT_XFER_CONTROL)
  1063. cap |= QH_IOS;
  1064. cap |= QH_ZLT;
  1065. cap |= (hwep->ep.maxpacket << __ffs(QH_MAX_PKT)) & QH_MAX_PKT;
  1066. /*
  1067. * For ISO-TX, we set mult at QH as the largest value, and use
  1068. * MultO at TD as real mult value.
  1069. */
  1070. if (hwep->type == USB_ENDPOINT_XFER_ISOC && hwep->dir == TX)
  1071. cap |= 3 << __ffs(QH_MULT);
  1072. hwep->qh.ptr->cap = cpu_to_le32(cap);
  1073. hwep->qh.ptr->td.next |= cpu_to_le32(TD_TERMINATE); /* needed? */
  1074. if (hwep->num != 0 && hwep->type == USB_ENDPOINT_XFER_CONTROL) {
  1075. dev_err(hwep->ci->dev, "Set control xfer at non-ep0\n");
  1076. retval = -EINVAL;
  1077. }
  1078. /*
  1079. * Enable endpoints in the HW other than ep0 as ep0
  1080. * is always enabled
  1081. */
  1082. if (hwep->num)
  1083. retval |= hw_ep_enable(hwep->ci, hwep->num, hwep->dir,
  1084. hwep->type);
  1085. spin_unlock_irqrestore(hwep->lock, flags);
  1086. return retval;
  1087. }
  1088. /**
  1089. * ep_disable: endpoint is no longer usable
  1090. *
  1091. * Check usb_ep_disable() at "usb_gadget.h" for details
  1092. */
  1093. static int ep_disable(struct usb_ep *ep)
  1094. {
  1095. struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
  1096. int direction, retval = 0;
  1097. unsigned long flags;
  1098. if (ep == NULL)
  1099. return -EINVAL;
  1100. else if (hwep->ep.desc == NULL)
  1101. return -EBUSY;
  1102. spin_lock_irqsave(hwep->lock, flags);
  1103. /* only internal SW should disable ctrl endpts */
  1104. direction = hwep->dir;
  1105. do {
  1106. retval |= _ep_nuke(hwep);
  1107. retval |= hw_ep_disable(hwep->ci, hwep->num, hwep->dir);
  1108. if (hwep->type == USB_ENDPOINT_XFER_CONTROL)
  1109. hwep->dir = (hwep->dir == TX) ? RX : TX;
  1110. } while (hwep->dir != direction);
  1111. hwep->ep.desc = NULL;
  1112. spin_unlock_irqrestore(hwep->lock, flags);
  1113. return retval;
  1114. }
  1115. /**
  1116. * ep_alloc_request: allocate a request object to use with this endpoint
  1117. *
  1118. * Check usb_ep_alloc_request() at "usb_gadget.h" for details
  1119. */
  1120. static struct usb_request *ep_alloc_request(struct usb_ep *ep, gfp_t gfp_flags)
  1121. {
  1122. struct ci_hw_req *hwreq = NULL;
  1123. if (ep == NULL)
  1124. return NULL;
  1125. hwreq = kzalloc(sizeof(struct ci_hw_req), gfp_flags);
  1126. if (hwreq != NULL) {
  1127. INIT_LIST_HEAD(&hwreq->queue);
  1128. INIT_LIST_HEAD(&hwreq->tds);
  1129. }
  1130. return (hwreq == NULL) ? NULL : &hwreq->req;
  1131. }
  1132. /**
  1133. * ep_free_request: frees a request object
  1134. *
  1135. * Check usb_ep_free_request() at "usb_gadget.h" for details
  1136. */
  1137. static void ep_free_request(struct usb_ep *ep, struct usb_request *req)
  1138. {
  1139. struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
  1140. struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req);
  1141. struct td_node *node, *tmpnode;
  1142. unsigned long flags;
  1143. if (ep == NULL || req == NULL) {
  1144. return;
  1145. } else if (!list_empty(&hwreq->queue)) {
  1146. dev_err(hwep->ci->dev, "freeing queued request\n");
  1147. return;
  1148. }
  1149. spin_lock_irqsave(hwep->lock, flags);
  1150. list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
  1151. dma_pool_free(hwep->td_pool, node->ptr, node->dma);
  1152. list_del_init(&node->td);
  1153. node->ptr = NULL;
  1154. kfree(node);
  1155. }
  1156. kfree(hwreq);
  1157. spin_unlock_irqrestore(hwep->lock, flags);
  1158. }
  1159. /**
  1160. * ep_queue: queues (submits) an I/O request to an endpoint
  1161. *
  1162. * Check usb_ep_queue()* at usb_gadget.h" for details
  1163. */
  1164. static int ep_queue(struct usb_ep *ep, struct usb_request *req,
  1165. gfp_t __maybe_unused gfp_flags)
  1166. {
  1167. struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
  1168. int retval = 0;
  1169. unsigned long flags;
  1170. if (ep == NULL || req == NULL || hwep->ep.desc == NULL)
  1171. return -EINVAL;
  1172. spin_lock_irqsave(hwep->lock, flags);
  1173. retval = _ep_queue(ep, req, gfp_flags);
  1174. spin_unlock_irqrestore(hwep->lock, flags);
  1175. return retval;
  1176. }
  1177. /**
  1178. * ep_dequeue: dequeues (cancels, unlinks) an I/O request from an endpoint
  1179. *
  1180. * Check usb_ep_dequeue() at "usb_gadget.h" for details
  1181. */
  1182. static int ep_dequeue(struct usb_ep *ep, struct usb_request *req)
  1183. {
  1184. struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
  1185. struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req);
  1186. unsigned long flags;
  1187. struct td_node *node, *tmpnode;
  1188. if (ep == NULL || req == NULL || hwreq->req.status != -EALREADY ||
  1189. hwep->ep.desc == NULL || list_empty(&hwreq->queue) ||
  1190. list_empty(&hwep->qh.queue))
  1191. return -EINVAL;
  1192. spin_lock_irqsave(hwep->lock, flags);
  1193. hw_ep_flush(hwep->ci, hwep->num, hwep->dir);
  1194. list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
  1195. dma_pool_free(hwep->td_pool, node->ptr, node->dma);
  1196. list_del(&node->td);
  1197. kfree(node);
  1198. }
  1199. /* pop request */
  1200. list_del_init(&hwreq->queue);
  1201. usb_gadget_unmap_request(&hwep->ci->gadget, req, hwep->dir);
  1202. req->status = -ECONNRESET;
  1203. if (hwreq->req.complete != NULL) {
  1204. spin_unlock(hwep->lock);
  1205. usb_gadget_giveback_request(&hwep->ep, &hwreq->req);
  1206. spin_lock(hwep->lock);
  1207. }
  1208. spin_unlock_irqrestore(hwep->lock, flags);
  1209. return 0;
  1210. }
  1211. /**
  1212. * ep_set_halt: sets the endpoint halt feature
  1213. *
  1214. * Check usb_ep_set_halt() at "usb_gadget.h" for details
  1215. */
  1216. static int ep_set_halt(struct usb_ep *ep, int value)
  1217. {
  1218. return _ep_set_halt(ep, value, true);
  1219. }
  1220. /**
  1221. * ep_set_wedge: sets the halt feature and ignores clear requests
  1222. *
  1223. * Check usb_ep_set_wedge() at "usb_gadget.h" for details
  1224. */
  1225. static int ep_set_wedge(struct usb_ep *ep)
  1226. {
  1227. struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
  1228. unsigned long flags;
  1229. if (ep == NULL || hwep->ep.desc == NULL)
  1230. return -EINVAL;
  1231. spin_lock_irqsave(hwep->lock, flags);
  1232. hwep->wedge = 1;
  1233. spin_unlock_irqrestore(hwep->lock, flags);
  1234. return usb_ep_set_halt(ep);
  1235. }
  1236. /**
  1237. * ep_fifo_flush: flushes contents of a fifo
  1238. *
  1239. * Check usb_ep_fifo_flush() at "usb_gadget.h" for details
  1240. */
  1241. static void ep_fifo_flush(struct usb_ep *ep)
  1242. {
  1243. struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
  1244. unsigned long flags;
  1245. if (ep == NULL) {
  1246. dev_err(hwep->ci->dev, "%02X: -EINVAL\n", _usb_addr(hwep));
  1247. return;
  1248. }
  1249. spin_lock_irqsave(hwep->lock, flags);
  1250. hw_ep_flush(hwep->ci, hwep->num, hwep->dir);
  1251. spin_unlock_irqrestore(hwep->lock, flags);
  1252. }
  1253. /**
  1254. * Endpoint-specific part of the API to the USB controller hardware
  1255. * Check "usb_gadget.h" for details
  1256. */
  1257. static const struct usb_ep_ops usb_ep_ops = {
  1258. .enable = ep_enable,
  1259. .disable = ep_disable,
  1260. .alloc_request = ep_alloc_request,
  1261. .free_request = ep_free_request,
  1262. .queue = ep_queue,
  1263. .dequeue = ep_dequeue,
  1264. .set_halt = ep_set_halt,
  1265. .set_wedge = ep_set_wedge,
  1266. .fifo_flush = ep_fifo_flush,
  1267. };
  1268. /******************************************************************************
  1269. * GADGET block
  1270. *****************************************************************************/
  1271. static int ci_udc_vbus_session(struct usb_gadget *_gadget, int is_active)
  1272. {
  1273. struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
  1274. unsigned long flags;
  1275. int gadget_ready = 0;
  1276. spin_lock_irqsave(&ci->lock, flags);
  1277. ci->vbus_active = is_active;
  1278. if (ci->driver)
  1279. gadget_ready = 1;
  1280. spin_unlock_irqrestore(&ci->lock, flags);
  1281. if (gadget_ready) {
  1282. if (is_active) {
  1283. pm_runtime_get_sync(&_gadget->dev);
  1284. hw_device_reset(ci);
  1285. hw_device_state(ci, ci->ep0out->qh.dma);
  1286. usb_gadget_set_state(_gadget, USB_STATE_POWERED);
  1287. usb_udc_vbus_handler(_gadget, true);
  1288. } else {
  1289. usb_udc_vbus_handler(_gadget, false);
  1290. if (ci->driver)
  1291. ci->driver->disconnect(&ci->gadget);
  1292. hw_device_state(ci, 0);
  1293. if (ci->platdata->notify_event)
  1294. ci->platdata->notify_event(ci,
  1295. CI_HDRC_CONTROLLER_STOPPED_EVENT);
  1296. _gadget_stop_activity(&ci->gadget);
  1297. pm_runtime_put_sync(&_gadget->dev);
  1298. usb_gadget_set_state(_gadget, USB_STATE_NOTATTACHED);
  1299. }
  1300. }
  1301. return 0;
  1302. }
  1303. static int ci_udc_wakeup(struct usb_gadget *_gadget)
  1304. {
  1305. struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
  1306. unsigned long flags;
  1307. int ret = 0;
  1308. spin_lock_irqsave(&ci->lock, flags);
  1309. if (!ci->remote_wakeup) {
  1310. ret = -EOPNOTSUPP;
  1311. goto out;
  1312. }
  1313. if (!hw_read(ci, OP_PORTSC, PORTSC_SUSP)) {
  1314. ret = -EINVAL;
  1315. goto out;
  1316. }
  1317. hw_write(ci, OP_PORTSC, PORTSC_FPR, PORTSC_FPR);
  1318. out:
  1319. spin_unlock_irqrestore(&ci->lock, flags);
  1320. return ret;
  1321. }
  1322. static int ci_udc_vbus_draw(struct usb_gadget *_gadget, unsigned ma)
  1323. {
  1324. struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
  1325. if (ci->usb_phy)
  1326. return usb_phy_set_power(ci->usb_phy, ma);
  1327. return -ENOTSUPP;
  1328. }
  1329. static int ci_udc_selfpowered(struct usb_gadget *_gadget, int is_on)
  1330. {
  1331. struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
  1332. struct ci_hw_ep *hwep = ci->ep0in;
  1333. unsigned long flags;
  1334. spin_lock_irqsave(hwep->lock, flags);
  1335. _gadget->is_selfpowered = (is_on != 0);
  1336. spin_unlock_irqrestore(hwep->lock, flags);
  1337. return 0;
  1338. }
  1339. /* Change Data+ pullup status
  1340. * this func is used by usb_gadget_connect/disconnet
  1341. */
  1342. static int ci_udc_pullup(struct usb_gadget *_gadget, int is_on)
  1343. {
  1344. struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
  1345. /* Data+ pullup controlled by OTG state machine in OTG fsm mode */
  1346. if (ci_otg_is_fsm_mode(ci))
  1347. return 0;
  1348. pm_runtime_get_sync(&ci->gadget.dev);
  1349. if (is_on)
  1350. hw_write(ci, OP_USBCMD, USBCMD_RS, USBCMD_RS);
  1351. else
  1352. hw_write(ci, OP_USBCMD, USBCMD_RS, 0);
  1353. pm_runtime_put_sync(&ci->gadget.dev);
  1354. return 0;
  1355. }
  1356. static int ci_udc_start(struct usb_gadget *gadget,
  1357. struct usb_gadget_driver *driver);
  1358. static int ci_udc_stop(struct usb_gadget *gadget);
  1359. /**
  1360. * Device operations part of the API to the USB controller hardware,
  1361. * which don't involve endpoints (or i/o)
  1362. * Check "usb_gadget.h" for details
  1363. */
  1364. static const struct usb_gadget_ops usb_gadget_ops = {
  1365. .vbus_session = ci_udc_vbus_session,
  1366. .wakeup = ci_udc_wakeup,
  1367. .set_selfpowered = ci_udc_selfpowered,
  1368. .pullup = ci_udc_pullup,
  1369. .vbus_draw = ci_udc_vbus_draw,
  1370. .udc_start = ci_udc_start,
  1371. .udc_stop = ci_udc_stop,
  1372. };
  1373. static int init_eps(struct ci_hdrc *ci)
  1374. {
  1375. int retval = 0, i, j;
  1376. for (i = 0; i < ci->hw_ep_max/2; i++)
  1377. for (j = RX; j <= TX; j++) {
  1378. int k = i + j * ci->hw_ep_max/2;
  1379. struct ci_hw_ep *hwep = &ci->ci_hw_ep[k];
  1380. scnprintf(hwep->name, sizeof(hwep->name), "ep%i%s", i,
  1381. (j == TX) ? "in" : "out");
  1382. hwep->ci = ci;
  1383. hwep->lock = &ci->lock;
  1384. hwep->td_pool = ci->td_pool;
  1385. hwep->ep.name = hwep->name;
  1386. hwep->ep.ops = &usb_ep_ops;
  1387. if (i == 0) {
  1388. hwep->ep.caps.type_control = true;
  1389. } else {
  1390. hwep->ep.caps.type_iso = true;
  1391. hwep->ep.caps.type_bulk = true;
  1392. hwep->ep.caps.type_int = true;
  1393. }
  1394. if (j == TX)
  1395. hwep->ep.caps.dir_in = true;
  1396. else
  1397. hwep->ep.caps.dir_out = true;
  1398. /*
  1399. * for ep0: maxP defined in desc, for other
  1400. * eps, maxP is set by epautoconfig() called
  1401. * by gadget layer
  1402. */
  1403. usb_ep_set_maxpacket_limit(&hwep->ep, (unsigned short)~0);
  1404. INIT_LIST_HEAD(&hwep->qh.queue);
  1405. hwep->qh.ptr = dma_pool_alloc(ci->qh_pool, GFP_KERNEL,
  1406. &hwep->qh.dma);
  1407. if (hwep->qh.ptr == NULL)
  1408. retval = -ENOMEM;
  1409. else
  1410. memset(hwep->qh.ptr, 0, sizeof(*hwep->qh.ptr));
  1411. /*
  1412. * set up shorthands for ep0 out and in endpoints,
  1413. * don't add to gadget's ep_list
  1414. */
  1415. if (i == 0) {
  1416. if (j == RX)
  1417. ci->ep0out = hwep;
  1418. else
  1419. ci->ep0in = hwep;
  1420. usb_ep_set_maxpacket_limit(&hwep->ep, CTRL_PAYLOAD_MAX);
  1421. continue;
  1422. }
  1423. list_add_tail(&hwep->ep.ep_list, &ci->gadget.ep_list);
  1424. }
  1425. return retval;
  1426. }
  1427. static void destroy_eps(struct ci_hdrc *ci)
  1428. {
  1429. int i;
  1430. for (i = 0; i < ci->hw_ep_max; i++) {
  1431. struct ci_hw_ep *hwep = &ci->ci_hw_ep[i];
  1432. if (hwep->pending_td)
  1433. free_pending_td(hwep);
  1434. dma_pool_free(ci->qh_pool, hwep->qh.ptr, hwep->qh.dma);
  1435. }
  1436. }
  1437. /**
  1438. * ci_udc_start: register a gadget driver
  1439. * @gadget: our gadget
  1440. * @driver: the driver being registered
  1441. *
  1442. * Interrupts are enabled here.
  1443. */
  1444. static int ci_udc_start(struct usb_gadget *gadget,
  1445. struct usb_gadget_driver *driver)
  1446. {
  1447. struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget);
  1448. unsigned long flags;
  1449. int retval = -ENOMEM;
  1450. if (driver->disconnect == NULL)
  1451. return -EINVAL;
  1452. ci->ep0out->ep.desc = &ctrl_endpt_out_desc;
  1453. retval = usb_ep_enable(&ci->ep0out->ep);
  1454. if (retval)
  1455. return retval;
  1456. ci->ep0in->ep.desc = &ctrl_endpt_in_desc;
  1457. retval = usb_ep_enable(&ci->ep0in->ep);
  1458. if (retval)
  1459. return retval;
  1460. ci->driver = driver;
  1461. /* Start otg fsm for B-device */
  1462. if (ci_otg_is_fsm_mode(ci) && ci->fsm.id) {
  1463. ci_hdrc_otg_fsm_start(ci);
  1464. return retval;
  1465. }
  1466. pm_runtime_get_sync(&ci->gadget.dev);
  1467. if (ci->vbus_active) {
  1468. spin_lock_irqsave(&ci->lock, flags);
  1469. hw_device_reset(ci);
  1470. } else {
  1471. usb_udc_vbus_handler(&ci->gadget, false);
  1472. pm_runtime_put_sync(&ci->gadget.dev);
  1473. return retval;
  1474. }
  1475. retval = hw_device_state(ci, ci->ep0out->qh.dma);
  1476. spin_unlock_irqrestore(&ci->lock, flags);
  1477. if (retval)
  1478. pm_runtime_put_sync(&ci->gadget.dev);
  1479. return retval;
  1480. }
  1481. /**
  1482. * ci_udc_stop: unregister a gadget driver
  1483. */
  1484. static int ci_udc_stop(struct usb_gadget *gadget)
  1485. {
  1486. struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget);
  1487. unsigned long flags;
  1488. spin_lock_irqsave(&ci->lock, flags);
  1489. if (ci->vbus_active) {
  1490. hw_device_state(ci, 0);
  1491. if (ci->platdata->notify_event)
  1492. ci->platdata->notify_event(ci,
  1493. CI_HDRC_CONTROLLER_STOPPED_EVENT);
  1494. spin_unlock_irqrestore(&ci->lock, flags);
  1495. _gadget_stop_activity(&ci->gadget);
  1496. spin_lock_irqsave(&ci->lock, flags);
  1497. pm_runtime_put(&ci->gadget.dev);
  1498. }
  1499. ci->driver = NULL;
  1500. spin_unlock_irqrestore(&ci->lock, flags);
  1501. return 0;
  1502. }
  1503. /******************************************************************************
  1504. * BUS block
  1505. *****************************************************************************/
  1506. /**
  1507. * udc_irq: ci interrupt handler
  1508. *
  1509. * This function returns IRQ_HANDLED if the IRQ has been handled
  1510. * It locks access to registers
  1511. */
  1512. static irqreturn_t udc_irq(struct ci_hdrc *ci)
  1513. {
  1514. irqreturn_t retval;
  1515. u32 intr;
  1516. if (ci == NULL)
  1517. return IRQ_HANDLED;
  1518. spin_lock(&ci->lock);
  1519. if (ci->platdata->flags & CI_HDRC_REGS_SHARED) {
  1520. if (hw_read(ci, OP_USBMODE, USBMODE_CM) !=
  1521. USBMODE_CM_DC) {
  1522. spin_unlock(&ci->lock);
  1523. return IRQ_NONE;
  1524. }
  1525. }
  1526. intr = hw_test_and_clear_intr_active(ci);
  1527. if (intr) {
  1528. /* order defines priority - do NOT change it */
  1529. if (USBi_URI & intr)
  1530. isr_reset_handler(ci);
  1531. if (USBi_PCI & intr) {
  1532. ci->gadget.speed = hw_port_is_high_speed(ci) ?
  1533. USB_SPEED_HIGH : USB_SPEED_FULL;
  1534. if (ci->suspended && ci->driver->resume) {
  1535. spin_unlock(&ci->lock);
  1536. ci->driver->resume(&ci->gadget);
  1537. spin_lock(&ci->lock);
  1538. ci->suspended = 0;
  1539. }
  1540. }
  1541. if (USBi_UI & intr)
  1542. isr_tr_complete_handler(ci);
  1543. if (USBi_SLI & intr) {
  1544. if (ci->gadget.speed != USB_SPEED_UNKNOWN &&
  1545. ci->driver->suspend) {
  1546. ci->suspended = 1;
  1547. spin_unlock(&ci->lock);
  1548. ci->driver->suspend(&ci->gadget);
  1549. usb_gadget_set_state(&ci->gadget,
  1550. USB_STATE_SUSPENDED);
  1551. spin_lock(&ci->lock);
  1552. }
  1553. }
  1554. retval = IRQ_HANDLED;
  1555. } else {
  1556. retval = IRQ_NONE;
  1557. }
  1558. spin_unlock(&ci->lock);
  1559. return retval;
  1560. }
  1561. /**
  1562. * udc_start: initialize gadget role
  1563. * @ci: chipidea controller
  1564. */
  1565. static int udc_start(struct ci_hdrc *ci)
  1566. {
  1567. struct device *dev = ci->dev;
  1568. struct usb_otg_caps *otg_caps = &ci->platdata->ci_otg_caps;
  1569. int retval = 0;
  1570. spin_lock_init(&ci->lock);
  1571. ci->gadget.ops = &usb_gadget_ops;
  1572. ci->gadget.speed = USB_SPEED_UNKNOWN;
  1573. ci->gadget.max_speed = USB_SPEED_HIGH;
  1574. ci->gadget.name = ci->platdata->name;
  1575. ci->gadget.otg_caps = otg_caps;
  1576. if (ci->is_otg && (otg_caps->hnp_support || otg_caps->srp_support ||
  1577. otg_caps->adp_support))
  1578. ci->gadget.is_otg = 1;
  1579. INIT_LIST_HEAD(&ci->gadget.ep_list);
  1580. /* alloc resources */
  1581. ci->qh_pool = dma_pool_create("ci_hw_qh", dev,
  1582. sizeof(struct ci_hw_qh),
  1583. 64, CI_HDRC_PAGE_SIZE);
  1584. if (ci->qh_pool == NULL)
  1585. return -ENOMEM;
  1586. ci->td_pool = dma_pool_create("ci_hw_td", dev,
  1587. sizeof(struct ci_hw_td),
  1588. 64, CI_HDRC_PAGE_SIZE);
  1589. if (ci->td_pool == NULL) {
  1590. retval = -ENOMEM;
  1591. goto free_qh_pool;
  1592. }
  1593. retval = init_eps(ci);
  1594. if (retval)
  1595. goto free_pools;
  1596. ci->gadget.ep0 = &ci->ep0in->ep;
  1597. retval = usb_add_gadget_udc(dev, &ci->gadget);
  1598. if (retval)
  1599. goto destroy_eps;
  1600. pm_runtime_no_callbacks(&ci->gadget.dev);
  1601. pm_runtime_enable(&ci->gadget.dev);
  1602. return retval;
  1603. destroy_eps:
  1604. destroy_eps(ci);
  1605. free_pools:
  1606. dma_pool_destroy(ci->td_pool);
  1607. free_qh_pool:
  1608. dma_pool_destroy(ci->qh_pool);
  1609. return retval;
  1610. }
  1611. /**
  1612. * ci_hdrc_gadget_destroy: parent remove must call this to remove UDC
  1613. *
  1614. * No interrupts active, the IRQ has been released
  1615. */
  1616. void ci_hdrc_gadget_destroy(struct ci_hdrc *ci)
  1617. {
  1618. if (!ci->roles[CI_ROLE_GADGET])
  1619. return;
  1620. usb_del_gadget_udc(&ci->gadget);
  1621. destroy_eps(ci);
  1622. dma_pool_destroy(ci->td_pool);
  1623. dma_pool_destroy(ci->qh_pool);
  1624. }
  1625. static int udc_id_switch_for_device(struct ci_hdrc *ci)
  1626. {
  1627. if (ci->is_otg)
  1628. /* Clear and enable BSV irq */
  1629. hw_write_otgsc(ci, OTGSC_BSVIS | OTGSC_BSVIE,
  1630. OTGSC_BSVIS | OTGSC_BSVIE);
  1631. return 0;
  1632. }
  1633. static void udc_id_switch_for_host(struct ci_hdrc *ci)
  1634. {
  1635. /*
  1636. * host doesn't care B_SESSION_VALID event
  1637. * so clear and disbale BSV irq
  1638. */
  1639. if (ci->is_otg)
  1640. hw_write_otgsc(ci, OTGSC_BSVIE | OTGSC_BSVIS, OTGSC_BSVIS);
  1641. }
  1642. /**
  1643. * ci_hdrc_gadget_init - initialize device related bits
  1644. * ci: the controller
  1645. *
  1646. * This function initializes the gadget, if the device is "device capable".
  1647. */
  1648. int ci_hdrc_gadget_init(struct ci_hdrc *ci)
  1649. {
  1650. struct ci_role_driver *rdrv;
  1651. if (!hw_read(ci, CAP_DCCPARAMS, DCCPARAMS_DC))
  1652. return -ENXIO;
  1653. rdrv = devm_kzalloc(ci->dev, sizeof(struct ci_role_driver), GFP_KERNEL);
  1654. if (!rdrv)
  1655. return -ENOMEM;
  1656. rdrv->start = udc_id_switch_for_device;
  1657. rdrv->stop = udc_id_switch_for_host;
  1658. rdrv->irq = udc_irq;
  1659. rdrv->name = "gadget";
  1660. ci->roles[CI_ROLE_GADGET] = rdrv;
  1661. return udc_start(ci);
  1662. }