pxa.c 23 KB

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  1. /*
  2. * Based on drivers/serial/8250.c by Russell King.
  3. *
  4. * Author: Nicolas Pitre
  5. * Created: Feb 20, 2003
  6. * Copyright: (C) 2003 Monta Vista Software, Inc.
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; either version 2 of the License, or
  11. * (at your option) any later version.
  12. *
  13. * Note 1: This driver is made separate from the already too overloaded
  14. * 8250.c because it needs some kirks of its own and that'll make it
  15. * easier to add DMA support.
  16. *
  17. * Note 2: I'm too sick of device allocation policies for serial ports.
  18. * If someone else wants to request an "official" allocation of major/minor
  19. * for this driver please be my guest. And don't forget that new hardware
  20. * to come from Intel might have more than 3 or 4 of those UARTs. Let's
  21. * hope for a better port registration and dynamic device allocation scheme
  22. * with the serial core maintainer satisfaction to appear soon.
  23. */
  24. #if defined(CONFIG_SERIAL_PXA_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
  25. #define SUPPORT_SYSRQ
  26. #endif
  27. #include <linux/module.h>
  28. #include <linux/ioport.h>
  29. #include <linux/init.h>
  30. #include <linux/console.h>
  31. #include <linux/sysrq.h>
  32. #include <linux/serial_reg.h>
  33. #include <linux/circ_buf.h>
  34. #include <linux/delay.h>
  35. #include <linux/interrupt.h>
  36. #include <linux/of.h>
  37. #include <linux/platform_device.h>
  38. #include <linux/tty.h>
  39. #include <linux/tty_flip.h>
  40. #include <linux/serial_core.h>
  41. #include <linux/clk.h>
  42. #include <linux/io.h>
  43. #include <linux/slab.h>
  44. #define PXA_NAME_LEN 8
  45. struct uart_pxa_port {
  46. struct uart_port port;
  47. unsigned char ier;
  48. unsigned char lcr;
  49. unsigned char mcr;
  50. unsigned int lsr_break_flag;
  51. struct clk *clk;
  52. char name[PXA_NAME_LEN];
  53. };
  54. static inline unsigned int serial_in(struct uart_pxa_port *up, int offset)
  55. {
  56. offset <<= 2;
  57. return readl(up->port.membase + offset);
  58. }
  59. static inline void serial_out(struct uart_pxa_port *up, int offset, int value)
  60. {
  61. offset <<= 2;
  62. writel(value, up->port.membase + offset);
  63. }
  64. static void serial_pxa_enable_ms(struct uart_port *port)
  65. {
  66. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  67. up->ier |= UART_IER_MSI;
  68. serial_out(up, UART_IER, up->ier);
  69. }
  70. static void serial_pxa_stop_tx(struct uart_port *port)
  71. {
  72. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  73. if (up->ier & UART_IER_THRI) {
  74. up->ier &= ~UART_IER_THRI;
  75. serial_out(up, UART_IER, up->ier);
  76. }
  77. }
  78. static void serial_pxa_stop_rx(struct uart_port *port)
  79. {
  80. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  81. up->ier &= ~UART_IER_RLSI;
  82. up->port.read_status_mask &= ~UART_LSR_DR;
  83. serial_out(up, UART_IER, up->ier);
  84. }
  85. static inline void receive_chars(struct uart_pxa_port *up, int *status)
  86. {
  87. unsigned int ch, flag;
  88. int max_count = 256;
  89. do {
  90. /* work around Errata #20 according to
  91. * Intel(R) PXA27x Processor Family
  92. * Specification Update (May 2005)
  93. *
  94. * Step 2
  95. * Disable the Reciever Time Out Interrupt via IER[RTOEI]
  96. */
  97. up->ier &= ~UART_IER_RTOIE;
  98. serial_out(up, UART_IER, up->ier);
  99. ch = serial_in(up, UART_RX);
  100. flag = TTY_NORMAL;
  101. up->port.icount.rx++;
  102. if (unlikely(*status & (UART_LSR_BI | UART_LSR_PE |
  103. UART_LSR_FE | UART_LSR_OE))) {
  104. /*
  105. * For statistics only
  106. */
  107. if (*status & UART_LSR_BI) {
  108. *status &= ~(UART_LSR_FE | UART_LSR_PE);
  109. up->port.icount.brk++;
  110. /*
  111. * We do the SysRQ and SAK checking
  112. * here because otherwise the break
  113. * may get masked by ignore_status_mask
  114. * or read_status_mask.
  115. */
  116. if (uart_handle_break(&up->port))
  117. goto ignore_char;
  118. } else if (*status & UART_LSR_PE)
  119. up->port.icount.parity++;
  120. else if (*status & UART_LSR_FE)
  121. up->port.icount.frame++;
  122. if (*status & UART_LSR_OE)
  123. up->port.icount.overrun++;
  124. /*
  125. * Mask off conditions which should be ignored.
  126. */
  127. *status &= up->port.read_status_mask;
  128. #ifdef CONFIG_SERIAL_PXA_CONSOLE
  129. if (up->port.line == up->port.cons->index) {
  130. /* Recover the break flag from console xmit */
  131. *status |= up->lsr_break_flag;
  132. up->lsr_break_flag = 0;
  133. }
  134. #endif
  135. if (*status & UART_LSR_BI) {
  136. flag = TTY_BREAK;
  137. } else if (*status & UART_LSR_PE)
  138. flag = TTY_PARITY;
  139. else if (*status & UART_LSR_FE)
  140. flag = TTY_FRAME;
  141. }
  142. if (uart_handle_sysrq_char(&up->port, ch))
  143. goto ignore_char;
  144. uart_insert_char(&up->port, *status, UART_LSR_OE, ch, flag);
  145. ignore_char:
  146. *status = serial_in(up, UART_LSR);
  147. } while ((*status & UART_LSR_DR) && (max_count-- > 0));
  148. tty_flip_buffer_push(&up->port.state->port);
  149. /* work around Errata #20 according to
  150. * Intel(R) PXA27x Processor Family
  151. * Specification Update (May 2005)
  152. *
  153. * Step 6:
  154. * No more data in FIFO: Re-enable RTO interrupt via IER[RTOIE]
  155. */
  156. up->ier |= UART_IER_RTOIE;
  157. serial_out(up, UART_IER, up->ier);
  158. }
  159. static void transmit_chars(struct uart_pxa_port *up)
  160. {
  161. struct circ_buf *xmit = &up->port.state->xmit;
  162. int count;
  163. if (up->port.x_char) {
  164. serial_out(up, UART_TX, up->port.x_char);
  165. up->port.icount.tx++;
  166. up->port.x_char = 0;
  167. return;
  168. }
  169. if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) {
  170. serial_pxa_stop_tx(&up->port);
  171. return;
  172. }
  173. count = up->port.fifosize / 2;
  174. do {
  175. serial_out(up, UART_TX, xmit->buf[xmit->tail]);
  176. xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
  177. up->port.icount.tx++;
  178. if (uart_circ_empty(xmit))
  179. break;
  180. } while (--count > 0);
  181. if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
  182. uart_write_wakeup(&up->port);
  183. if (uart_circ_empty(xmit))
  184. serial_pxa_stop_tx(&up->port);
  185. }
  186. static void serial_pxa_start_tx(struct uart_port *port)
  187. {
  188. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  189. if (!(up->ier & UART_IER_THRI)) {
  190. up->ier |= UART_IER_THRI;
  191. serial_out(up, UART_IER, up->ier);
  192. }
  193. }
  194. /* should hold up->port.lock */
  195. static inline void check_modem_status(struct uart_pxa_port *up)
  196. {
  197. int status;
  198. status = serial_in(up, UART_MSR);
  199. if ((status & UART_MSR_ANY_DELTA) == 0)
  200. return;
  201. if (status & UART_MSR_TERI)
  202. up->port.icount.rng++;
  203. if (status & UART_MSR_DDSR)
  204. up->port.icount.dsr++;
  205. if (status & UART_MSR_DDCD)
  206. uart_handle_dcd_change(&up->port, status & UART_MSR_DCD);
  207. if (status & UART_MSR_DCTS)
  208. uart_handle_cts_change(&up->port, status & UART_MSR_CTS);
  209. wake_up_interruptible(&up->port.state->port.delta_msr_wait);
  210. }
  211. /*
  212. * This handles the interrupt from one port.
  213. */
  214. static inline irqreturn_t serial_pxa_irq(int irq, void *dev_id)
  215. {
  216. struct uart_pxa_port *up = dev_id;
  217. unsigned int iir, lsr;
  218. iir = serial_in(up, UART_IIR);
  219. if (iir & UART_IIR_NO_INT)
  220. return IRQ_NONE;
  221. spin_lock(&up->port.lock);
  222. lsr = serial_in(up, UART_LSR);
  223. if (lsr & UART_LSR_DR)
  224. receive_chars(up, &lsr);
  225. check_modem_status(up);
  226. if (lsr & UART_LSR_THRE)
  227. transmit_chars(up);
  228. spin_unlock(&up->port.lock);
  229. return IRQ_HANDLED;
  230. }
  231. static unsigned int serial_pxa_tx_empty(struct uart_port *port)
  232. {
  233. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  234. unsigned long flags;
  235. unsigned int ret;
  236. spin_lock_irqsave(&up->port.lock, flags);
  237. ret = serial_in(up, UART_LSR) & UART_LSR_TEMT ? TIOCSER_TEMT : 0;
  238. spin_unlock_irqrestore(&up->port.lock, flags);
  239. return ret;
  240. }
  241. static unsigned int serial_pxa_get_mctrl(struct uart_port *port)
  242. {
  243. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  244. unsigned char status;
  245. unsigned int ret;
  246. status = serial_in(up, UART_MSR);
  247. ret = 0;
  248. if (status & UART_MSR_DCD)
  249. ret |= TIOCM_CAR;
  250. if (status & UART_MSR_RI)
  251. ret |= TIOCM_RNG;
  252. if (status & UART_MSR_DSR)
  253. ret |= TIOCM_DSR;
  254. if (status & UART_MSR_CTS)
  255. ret |= TIOCM_CTS;
  256. return ret;
  257. }
  258. static void serial_pxa_set_mctrl(struct uart_port *port, unsigned int mctrl)
  259. {
  260. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  261. unsigned char mcr = 0;
  262. if (mctrl & TIOCM_RTS)
  263. mcr |= UART_MCR_RTS;
  264. if (mctrl & TIOCM_DTR)
  265. mcr |= UART_MCR_DTR;
  266. if (mctrl & TIOCM_OUT1)
  267. mcr |= UART_MCR_OUT1;
  268. if (mctrl & TIOCM_OUT2)
  269. mcr |= UART_MCR_OUT2;
  270. if (mctrl & TIOCM_LOOP)
  271. mcr |= UART_MCR_LOOP;
  272. mcr |= up->mcr;
  273. serial_out(up, UART_MCR, mcr);
  274. }
  275. static void serial_pxa_break_ctl(struct uart_port *port, int break_state)
  276. {
  277. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  278. unsigned long flags;
  279. spin_lock_irqsave(&up->port.lock, flags);
  280. if (break_state == -1)
  281. up->lcr |= UART_LCR_SBC;
  282. else
  283. up->lcr &= ~UART_LCR_SBC;
  284. serial_out(up, UART_LCR, up->lcr);
  285. spin_unlock_irqrestore(&up->port.lock, flags);
  286. }
  287. static int serial_pxa_startup(struct uart_port *port)
  288. {
  289. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  290. unsigned long flags;
  291. int retval;
  292. if (port->line == 3) /* HWUART */
  293. up->mcr |= UART_MCR_AFE;
  294. else
  295. up->mcr = 0;
  296. up->port.uartclk = clk_get_rate(up->clk);
  297. /*
  298. * Allocate the IRQ
  299. */
  300. retval = request_irq(up->port.irq, serial_pxa_irq, 0, up->name, up);
  301. if (retval)
  302. return retval;
  303. /*
  304. * Clear the FIFO buffers and disable them.
  305. * (they will be reenabled in set_termios())
  306. */
  307. serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO);
  308. serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO |
  309. UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
  310. serial_out(up, UART_FCR, 0);
  311. /*
  312. * Clear the interrupt registers.
  313. */
  314. (void) serial_in(up, UART_LSR);
  315. (void) serial_in(up, UART_RX);
  316. (void) serial_in(up, UART_IIR);
  317. (void) serial_in(up, UART_MSR);
  318. /*
  319. * Now, initialize the UART
  320. */
  321. serial_out(up, UART_LCR, UART_LCR_WLEN8);
  322. spin_lock_irqsave(&up->port.lock, flags);
  323. up->port.mctrl |= TIOCM_OUT2;
  324. serial_pxa_set_mctrl(&up->port, up->port.mctrl);
  325. spin_unlock_irqrestore(&up->port.lock, flags);
  326. /*
  327. * Finally, enable interrupts. Note: Modem status interrupts
  328. * are set via set_termios(), which will be occurring imminently
  329. * anyway, so we don't enable them here.
  330. */
  331. up->ier = UART_IER_RLSI | UART_IER_RDI | UART_IER_RTOIE | UART_IER_UUE;
  332. serial_out(up, UART_IER, up->ier);
  333. /*
  334. * And clear the interrupt registers again for luck.
  335. */
  336. (void) serial_in(up, UART_LSR);
  337. (void) serial_in(up, UART_RX);
  338. (void) serial_in(up, UART_IIR);
  339. (void) serial_in(up, UART_MSR);
  340. return 0;
  341. }
  342. static void serial_pxa_shutdown(struct uart_port *port)
  343. {
  344. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  345. unsigned long flags;
  346. free_irq(up->port.irq, up);
  347. /*
  348. * Disable interrupts from this port
  349. */
  350. up->ier = 0;
  351. serial_out(up, UART_IER, 0);
  352. spin_lock_irqsave(&up->port.lock, flags);
  353. up->port.mctrl &= ~TIOCM_OUT2;
  354. serial_pxa_set_mctrl(&up->port, up->port.mctrl);
  355. spin_unlock_irqrestore(&up->port.lock, flags);
  356. /*
  357. * Disable break condition and FIFOs
  358. */
  359. serial_out(up, UART_LCR, serial_in(up, UART_LCR) & ~UART_LCR_SBC);
  360. serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO |
  361. UART_FCR_CLEAR_RCVR |
  362. UART_FCR_CLEAR_XMIT);
  363. serial_out(up, UART_FCR, 0);
  364. }
  365. static void
  366. serial_pxa_set_termios(struct uart_port *port, struct ktermios *termios,
  367. struct ktermios *old)
  368. {
  369. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  370. unsigned char cval, fcr = 0;
  371. unsigned long flags;
  372. unsigned int baud, quot;
  373. unsigned int dll;
  374. switch (termios->c_cflag & CSIZE) {
  375. case CS5:
  376. cval = UART_LCR_WLEN5;
  377. break;
  378. case CS6:
  379. cval = UART_LCR_WLEN6;
  380. break;
  381. case CS7:
  382. cval = UART_LCR_WLEN7;
  383. break;
  384. default:
  385. case CS8:
  386. cval = UART_LCR_WLEN8;
  387. break;
  388. }
  389. if (termios->c_cflag & CSTOPB)
  390. cval |= UART_LCR_STOP;
  391. if (termios->c_cflag & PARENB)
  392. cval |= UART_LCR_PARITY;
  393. if (!(termios->c_cflag & PARODD))
  394. cval |= UART_LCR_EPAR;
  395. /*
  396. * Ask the core to calculate the divisor for us.
  397. */
  398. baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
  399. quot = uart_get_divisor(port, baud);
  400. if ((up->port.uartclk / quot) < (2400 * 16))
  401. fcr = UART_FCR_ENABLE_FIFO | UART_FCR_PXAR1;
  402. else if ((up->port.uartclk / quot) < (230400 * 16))
  403. fcr = UART_FCR_ENABLE_FIFO | UART_FCR_PXAR8;
  404. else
  405. fcr = UART_FCR_ENABLE_FIFO | UART_FCR_PXAR32;
  406. /*
  407. * Ok, we're now changing the port state. Do it with
  408. * interrupts disabled.
  409. */
  410. spin_lock_irqsave(&up->port.lock, flags);
  411. /*
  412. * Ensure the port will be enabled.
  413. * This is required especially for serial console.
  414. */
  415. up->ier |= UART_IER_UUE;
  416. /*
  417. * Update the per-port timeout.
  418. */
  419. uart_update_timeout(port, termios->c_cflag, baud);
  420. up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
  421. if (termios->c_iflag & INPCK)
  422. up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE;
  423. if (termios->c_iflag & (IGNBRK | BRKINT | PARMRK))
  424. up->port.read_status_mask |= UART_LSR_BI;
  425. /*
  426. * Characters to ignore
  427. */
  428. up->port.ignore_status_mask = 0;
  429. if (termios->c_iflag & IGNPAR)
  430. up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE;
  431. if (termios->c_iflag & IGNBRK) {
  432. up->port.ignore_status_mask |= UART_LSR_BI;
  433. /*
  434. * If we're ignoring parity and break indicators,
  435. * ignore overruns too (for real raw support).
  436. */
  437. if (termios->c_iflag & IGNPAR)
  438. up->port.ignore_status_mask |= UART_LSR_OE;
  439. }
  440. /*
  441. * ignore all characters if CREAD is not set
  442. */
  443. if ((termios->c_cflag & CREAD) == 0)
  444. up->port.ignore_status_mask |= UART_LSR_DR;
  445. /*
  446. * CTS flow control flag and modem status interrupts
  447. */
  448. up->ier &= ~UART_IER_MSI;
  449. if (UART_ENABLE_MS(&up->port, termios->c_cflag))
  450. up->ier |= UART_IER_MSI;
  451. serial_out(up, UART_IER, up->ier);
  452. if (termios->c_cflag & CRTSCTS)
  453. up->mcr |= UART_MCR_AFE;
  454. else
  455. up->mcr &= ~UART_MCR_AFE;
  456. serial_out(up, UART_LCR, cval | UART_LCR_DLAB); /* set DLAB */
  457. serial_out(up, UART_DLL, quot & 0xff); /* LS of divisor */
  458. /*
  459. * work around Errata #75 according to Intel(R) PXA27x Processor Family
  460. * Specification Update (Nov 2005)
  461. */
  462. dll = serial_in(up, UART_DLL);
  463. WARN_ON(dll != (quot & 0xff));
  464. serial_out(up, UART_DLM, quot >> 8); /* MS of divisor */
  465. serial_out(up, UART_LCR, cval); /* reset DLAB */
  466. up->lcr = cval; /* Save LCR */
  467. serial_pxa_set_mctrl(&up->port, up->port.mctrl);
  468. serial_out(up, UART_FCR, fcr);
  469. spin_unlock_irqrestore(&up->port.lock, flags);
  470. }
  471. static void
  472. serial_pxa_pm(struct uart_port *port, unsigned int state,
  473. unsigned int oldstate)
  474. {
  475. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  476. if (!state)
  477. clk_prepare_enable(up->clk);
  478. else
  479. clk_disable_unprepare(up->clk);
  480. }
  481. static void serial_pxa_release_port(struct uart_port *port)
  482. {
  483. }
  484. static int serial_pxa_request_port(struct uart_port *port)
  485. {
  486. return 0;
  487. }
  488. static void serial_pxa_config_port(struct uart_port *port, int flags)
  489. {
  490. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  491. up->port.type = PORT_PXA;
  492. }
  493. static int
  494. serial_pxa_verify_port(struct uart_port *port, struct serial_struct *ser)
  495. {
  496. /* we don't want the core code to modify any port params */
  497. return -EINVAL;
  498. }
  499. static const char *
  500. serial_pxa_type(struct uart_port *port)
  501. {
  502. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  503. return up->name;
  504. }
  505. static struct uart_pxa_port *serial_pxa_ports[4];
  506. static struct uart_driver serial_pxa_reg;
  507. #ifdef CONFIG_SERIAL_PXA_CONSOLE
  508. #define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
  509. /*
  510. * Wait for transmitter & holding register to empty
  511. */
  512. static inline void wait_for_xmitr(struct uart_pxa_port *up)
  513. {
  514. unsigned int status, tmout = 10000;
  515. /* Wait up to 10ms for the character(s) to be sent. */
  516. do {
  517. status = serial_in(up, UART_LSR);
  518. if (status & UART_LSR_BI)
  519. up->lsr_break_flag = UART_LSR_BI;
  520. if (--tmout == 0)
  521. break;
  522. udelay(1);
  523. } while ((status & BOTH_EMPTY) != BOTH_EMPTY);
  524. /* Wait up to 1s for flow control if necessary */
  525. if (up->port.flags & UPF_CONS_FLOW) {
  526. tmout = 1000000;
  527. while (--tmout &&
  528. ((serial_in(up, UART_MSR) & UART_MSR_CTS) == 0))
  529. udelay(1);
  530. }
  531. }
  532. static void serial_pxa_console_putchar(struct uart_port *port, int ch)
  533. {
  534. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  535. wait_for_xmitr(up);
  536. serial_out(up, UART_TX, ch);
  537. }
  538. /*
  539. * Print a string to the serial port trying not to disturb
  540. * any possible real use of the port...
  541. *
  542. * The console_lock must be held when we get here.
  543. */
  544. static void
  545. serial_pxa_console_write(struct console *co, const char *s, unsigned int count)
  546. {
  547. struct uart_pxa_port *up = serial_pxa_ports[co->index];
  548. unsigned int ier;
  549. unsigned long flags;
  550. int locked = 1;
  551. clk_enable(up->clk);
  552. local_irq_save(flags);
  553. if (up->port.sysrq)
  554. locked = 0;
  555. else if (oops_in_progress)
  556. locked = spin_trylock(&up->port.lock);
  557. else
  558. spin_lock(&up->port.lock);
  559. /*
  560. * First save the IER then disable the interrupts
  561. */
  562. ier = serial_in(up, UART_IER);
  563. serial_out(up, UART_IER, UART_IER_UUE);
  564. uart_console_write(&up->port, s, count, serial_pxa_console_putchar);
  565. /*
  566. * Finally, wait for transmitter to become empty
  567. * and restore the IER
  568. */
  569. wait_for_xmitr(up);
  570. serial_out(up, UART_IER, ier);
  571. if (locked)
  572. spin_unlock(&up->port.lock);
  573. local_irq_restore(flags);
  574. clk_disable(up->clk);
  575. }
  576. #ifdef CONFIG_CONSOLE_POLL
  577. /*
  578. * Console polling routines for writing and reading from the uart while
  579. * in an interrupt or debug context.
  580. */
  581. static int serial_pxa_get_poll_char(struct uart_port *port)
  582. {
  583. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  584. unsigned char lsr = serial_in(up, UART_LSR);
  585. while (!(lsr & UART_LSR_DR))
  586. lsr = serial_in(up, UART_LSR);
  587. return serial_in(up, UART_RX);
  588. }
  589. static void serial_pxa_put_poll_char(struct uart_port *port,
  590. unsigned char c)
  591. {
  592. unsigned int ier;
  593. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  594. /*
  595. * First save the IER then disable the interrupts
  596. */
  597. ier = serial_in(up, UART_IER);
  598. serial_out(up, UART_IER, UART_IER_UUE);
  599. wait_for_xmitr(up);
  600. /*
  601. * Send the character out.
  602. */
  603. serial_out(up, UART_TX, c);
  604. /*
  605. * Finally, wait for transmitter to become empty
  606. * and restore the IER
  607. */
  608. wait_for_xmitr(up);
  609. serial_out(up, UART_IER, ier);
  610. }
  611. #endif /* CONFIG_CONSOLE_POLL */
  612. static int __init
  613. serial_pxa_console_setup(struct console *co, char *options)
  614. {
  615. struct uart_pxa_port *up;
  616. int baud = 9600;
  617. int bits = 8;
  618. int parity = 'n';
  619. int flow = 'n';
  620. if (co->index == -1 || co->index >= serial_pxa_reg.nr)
  621. co->index = 0;
  622. up = serial_pxa_ports[co->index];
  623. if (!up)
  624. return -ENODEV;
  625. if (options)
  626. uart_parse_options(options, &baud, &parity, &bits, &flow);
  627. return uart_set_options(&up->port, co, baud, parity, bits, flow);
  628. }
  629. static struct console serial_pxa_console = {
  630. .name = "ttyS",
  631. .write = serial_pxa_console_write,
  632. .device = uart_console_device,
  633. .setup = serial_pxa_console_setup,
  634. .flags = CON_PRINTBUFFER,
  635. .index = -1,
  636. .data = &serial_pxa_reg,
  637. };
  638. #define PXA_CONSOLE &serial_pxa_console
  639. #else
  640. #define PXA_CONSOLE NULL
  641. #endif
  642. static struct uart_ops serial_pxa_pops = {
  643. .tx_empty = serial_pxa_tx_empty,
  644. .set_mctrl = serial_pxa_set_mctrl,
  645. .get_mctrl = serial_pxa_get_mctrl,
  646. .stop_tx = serial_pxa_stop_tx,
  647. .start_tx = serial_pxa_start_tx,
  648. .stop_rx = serial_pxa_stop_rx,
  649. .enable_ms = serial_pxa_enable_ms,
  650. .break_ctl = serial_pxa_break_ctl,
  651. .startup = serial_pxa_startup,
  652. .shutdown = serial_pxa_shutdown,
  653. .set_termios = serial_pxa_set_termios,
  654. .pm = serial_pxa_pm,
  655. .type = serial_pxa_type,
  656. .release_port = serial_pxa_release_port,
  657. .request_port = serial_pxa_request_port,
  658. .config_port = serial_pxa_config_port,
  659. .verify_port = serial_pxa_verify_port,
  660. #if defined(CONFIG_CONSOLE_POLL) && defined(CONFIG_SERIAL_PXA_CONSOLE)
  661. .poll_get_char = serial_pxa_get_poll_char,
  662. .poll_put_char = serial_pxa_put_poll_char,
  663. #endif
  664. };
  665. static struct uart_driver serial_pxa_reg = {
  666. .owner = THIS_MODULE,
  667. .driver_name = "PXA serial",
  668. .dev_name = "ttyS",
  669. .major = TTY_MAJOR,
  670. .minor = 64,
  671. .nr = 4,
  672. .cons = PXA_CONSOLE,
  673. };
  674. #ifdef CONFIG_PM
  675. static int serial_pxa_suspend(struct device *dev)
  676. {
  677. struct uart_pxa_port *sport = dev_get_drvdata(dev);
  678. if (sport)
  679. uart_suspend_port(&serial_pxa_reg, &sport->port);
  680. return 0;
  681. }
  682. static int serial_pxa_resume(struct device *dev)
  683. {
  684. struct uart_pxa_port *sport = dev_get_drvdata(dev);
  685. if (sport)
  686. uart_resume_port(&serial_pxa_reg, &sport->port);
  687. return 0;
  688. }
  689. static const struct dev_pm_ops serial_pxa_pm_ops = {
  690. .suspend = serial_pxa_suspend,
  691. .resume = serial_pxa_resume,
  692. };
  693. #endif
  694. static const struct of_device_id serial_pxa_dt_ids[] = {
  695. { .compatible = "mrvl,pxa-uart", },
  696. { .compatible = "mrvl,mmp-uart", },
  697. {}
  698. };
  699. MODULE_DEVICE_TABLE(of, serial_pxa_dt_ids);
  700. static int serial_pxa_probe_dt(struct platform_device *pdev,
  701. struct uart_pxa_port *sport)
  702. {
  703. struct device_node *np = pdev->dev.of_node;
  704. int ret;
  705. if (!np)
  706. return 1;
  707. ret = of_alias_get_id(np, "serial");
  708. if (ret < 0) {
  709. dev_err(&pdev->dev, "failed to get alias id, errno %d\n", ret);
  710. return ret;
  711. }
  712. sport->port.line = ret;
  713. return 0;
  714. }
  715. static int serial_pxa_probe(struct platform_device *dev)
  716. {
  717. struct uart_pxa_port *sport;
  718. struct resource *mmres, *irqres;
  719. int ret;
  720. mmres = platform_get_resource(dev, IORESOURCE_MEM, 0);
  721. irqres = platform_get_resource(dev, IORESOURCE_IRQ, 0);
  722. if (!mmres || !irqres)
  723. return -ENODEV;
  724. sport = kzalloc(sizeof(struct uart_pxa_port), GFP_KERNEL);
  725. if (!sport)
  726. return -ENOMEM;
  727. sport->clk = clk_get(&dev->dev, NULL);
  728. if (IS_ERR(sport->clk)) {
  729. ret = PTR_ERR(sport->clk);
  730. goto err_free;
  731. }
  732. ret = clk_prepare(sport->clk);
  733. if (ret) {
  734. clk_put(sport->clk);
  735. goto err_free;
  736. }
  737. sport->port.type = PORT_PXA;
  738. sport->port.iotype = UPIO_MEM;
  739. sport->port.mapbase = mmres->start;
  740. sport->port.irq = irqres->start;
  741. sport->port.fifosize = 64;
  742. sport->port.ops = &serial_pxa_pops;
  743. sport->port.dev = &dev->dev;
  744. sport->port.flags = UPF_IOREMAP | UPF_BOOT_AUTOCONF;
  745. sport->port.uartclk = clk_get_rate(sport->clk);
  746. ret = serial_pxa_probe_dt(dev, sport);
  747. if (ret > 0)
  748. sport->port.line = dev->id;
  749. else if (ret < 0)
  750. goto err_clk;
  751. snprintf(sport->name, PXA_NAME_LEN - 1, "UART%d", sport->port.line + 1);
  752. sport->port.membase = ioremap(mmres->start, resource_size(mmres));
  753. if (!sport->port.membase) {
  754. ret = -ENOMEM;
  755. goto err_clk;
  756. }
  757. serial_pxa_ports[sport->port.line] = sport;
  758. uart_add_one_port(&serial_pxa_reg, &sport->port);
  759. platform_set_drvdata(dev, sport);
  760. return 0;
  761. err_clk:
  762. clk_unprepare(sport->clk);
  763. clk_put(sport->clk);
  764. err_free:
  765. kfree(sport);
  766. return ret;
  767. }
  768. static int serial_pxa_remove(struct platform_device *dev)
  769. {
  770. struct uart_pxa_port *sport = platform_get_drvdata(dev);
  771. uart_remove_one_port(&serial_pxa_reg, &sport->port);
  772. clk_unprepare(sport->clk);
  773. clk_put(sport->clk);
  774. kfree(sport);
  775. return 0;
  776. }
  777. static struct platform_driver serial_pxa_driver = {
  778. .probe = serial_pxa_probe,
  779. .remove = serial_pxa_remove,
  780. .driver = {
  781. .name = "pxa2xx-uart",
  782. #ifdef CONFIG_PM
  783. .pm = &serial_pxa_pm_ops,
  784. #endif
  785. .of_match_table = serial_pxa_dt_ids,
  786. },
  787. };
  788. static int __init serial_pxa_init(void)
  789. {
  790. int ret;
  791. ret = uart_register_driver(&serial_pxa_reg);
  792. if (ret != 0)
  793. return ret;
  794. ret = platform_driver_register(&serial_pxa_driver);
  795. if (ret != 0)
  796. uart_unregister_driver(&serial_pxa_reg);
  797. return ret;
  798. }
  799. static void __exit serial_pxa_exit(void)
  800. {
  801. platform_driver_unregister(&serial_pxa_driver);
  802. uart_unregister_driver(&serial_pxa_reg);
  803. }
  804. module_init(serial_pxa_init);
  805. module_exit(serial_pxa_exit);
  806. MODULE_LICENSE("GPL");
  807. MODULE_ALIAS("platform:pxa2xx-uart");