8250_mtk.c 8.1 KB

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  1. /*
  2. * Mediatek 8250 driver.
  3. *
  4. * Copyright (c) 2014 MundoReader S.L.
  5. * Author: Matthias Brugger <matthias.bgg@gmail.com>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation; either version 2 of the License, or
  10. * (at your option) any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. */
  17. #include <linux/clk.h>
  18. #include <linux/io.h>
  19. #include <linux/module.h>
  20. #include <linux/of_irq.h>
  21. #include <linux/of_platform.h>
  22. #include <linux/platform_device.h>
  23. #include <linux/pm_runtime.h>
  24. #include <linux/serial_8250.h>
  25. #include <linux/serial_reg.h>
  26. #include "8250.h"
  27. #define UART_MTK_HIGHS 0x09 /* Highspeed register */
  28. #define UART_MTK_SAMPLE_COUNT 0x0a /* Sample count register */
  29. #define UART_MTK_SAMPLE_POINT 0x0b /* Sample point register */
  30. #define MTK_UART_RATE_FIX 0x0d /* UART Rate Fix Register */
  31. struct mtk8250_data {
  32. int line;
  33. struct clk *uart_clk;
  34. struct clk *bus_clk;
  35. };
  36. static void
  37. mtk8250_set_termios(struct uart_port *port, struct ktermios *termios,
  38. struct ktermios *old)
  39. {
  40. unsigned long flags;
  41. unsigned int baud, quot;
  42. struct uart_8250_port *up =
  43. container_of(port, struct uart_8250_port, port);
  44. serial8250_do_set_termios(port, termios, old);
  45. /*
  46. * Mediatek UARTs use an extra highspeed register (UART_MTK_HIGHS)
  47. *
  48. * We need to recalcualte the quot register, as the claculation depends
  49. * on the vaule in the highspeed register.
  50. *
  51. * Some baudrates are not supported by the chip, so we use the next
  52. * lower rate supported and update termios c_flag.
  53. *
  54. * If highspeed register is set to 3, we need to specify sample count
  55. * and sample point to increase accuracy. If not, we reset the
  56. * registers to their default values.
  57. */
  58. baud = uart_get_baud_rate(port, termios, old,
  59. port->uartclk / 16 / 0xffff,
  60. port->uartclk / 16);
  61. if (baud <= 115200) {
  62. serial_port_out(port, UART_MTK_HIGHS, 0x0);
  63. quot = uart_get_divisor(port, baud);
  64. } else if (baud <= 576000) {
  65. serial_port_out(port, UART_MTK_HIGHS, 0x2);
  66. /* Set to next lower baudrate supported */
  67. if ((baud == 500000) || (baud == 576000))
  68. baud = 460800;
  69. quot = DIV_ROUND_UP(port->uartclk, 4 * baud);
  70. } else {
  71. serial_port_out(port, UART_MTK_HIGHS, 0x3);
  72. /* Set to highest baudrate supported */
  73. if (baud >= 1152000)
  74. baud = 921600;
  75. quot = DIV_ROUND_UP(port->uartclk, 256 * baud);
  76. }
  77. /*
  78. * Ok, we're now changing the port state. Do it with
  79. * interrupts disabled.
  80. */
  81. spin_lock_irqsave(&port->lock, flags);
  82. /* set DLAB we have cval saved in up->lcr from the call to the core */
  83. serial_port_out(port, UART_LCR, up->lcr | UART_LCR_DLAB);
  84. serial_dl_write(up, quot);
  85. /* reset DLAB */
  86. serial_port_out(port, UART_LCR, up->lcr);
  87. if (baud > 460800) {
  88. unsigned int tmp;
  89. tmp = DIV_ROUND_CLOSEST(port->uartclk, quot * baud);
  90. serial_port_out(port, UART_MTK_SAMPLE_COUNT, tmp - 1);
  91. serial_port_out(port, UART_MTK_SAMPLE_POINT,
  92. (tmp - 2) >> 1);
  93. } else {
  94. serial_port_out(port, UART_MTK_SAMPLE_COUNT, 0x00);
  95. serial_port_out(port, UART_MTK_SAMPLE_POINT, 0xff);
  96. }
  97. spin_unlock_irqrestore(&port->lock, flags);
  98. /* Don't rewrite B0 */
  99. if (tty_termios_baud_rate(termios))
  100. tty_termios_encode_baud_rate(termios, baud, baud);
  101. }
  102. static int mtk8250_runtime_suspend(struct device *dev)
  103. {
  104. struct mtk8250_data *data = dev_get_drvdata(dev);
  105. clk_disable_unprepare(data->uart_clk);
  106. clk_disable_unprepare(data->bus_clk);
  107. return 0;
  108. }
  109. static int mtk8250_runtime_resume(struct device *dev)
  110. {
  111. struct mtk8250_data *data = dev_get_drvdata(dev);
  112. int err;
  113. err = clk_prepare_enable(data->uart_clk);
  114. if (err) {
  115. dev_warn(dev, "Can't enable clock\n");
  116. return err;
  117. }
  118. err = clk_prepare_enable(data->bus_clk);
  119. if (err) {
  120. dev_warn(dev, "Can't enable bus clock\n");
  121. return err;
  122. }
  123. return 0;
  124. }
  125. static void
  126. mtk8250_do_pm(struct uart_port *port, unsigned int state, unsigned int old)
  127. {
  128. if (!state)
  129. pm_runtime_get_sync(port->dev);
  130. serial8250_do_pm(port, state, old);
  131. if (state)
  132. pm_runtime_put_sync_suspend(port->dev);
  133. }
  134. static int mtk8250_probe_of(struct platform_device *pdev, struct uart_port *p,
  135. struct mtk8250_data *data)
  136. {
  137. data->uart_clk = devm_clk_get(&pdev->dev, "baud");
  138. if (IS_ERR(data->uart_clk)) {
  139. /*
  140. * For compatibility with older device trees try unnamed
  141. * clk when no baud clk can be found.
  142. */
  143. data->uart_clk = devm_clk_get(&pdev->dev, NULL);
  144. if (IS_ERR(data->uart_clk)) {
  145. dev_warn(&pdev->dev, "Can't get uart clock\n");
  146. return PTR_ERR(data->uart_clk);
  147. }
  148. return 0;
  149. }
  150. data->bus_clk = devm_clk_get(&pdev->dev, "bus");
  151. if (IS_ERR(data->bus_clk))
  152. return PTR_ERR(data->bus_clk);
  153. return 0;
  154. }
  155. static int mtk8250_probe(struct platform_device *pdev)
  156. {
  157. struct uart_8250_port uart = {};
  158. struct resource *regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  159. struct resource *irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
  160. struct mtk8250_data *data;
  161. int err;
  162. if (!regs || !irq) {
  163. dev_err(&pdev->dev, "no registers/irq defined\n");
  164. return -EINVAL;
  165. }
  166. uart.port.membase = devm_ioremap(&pdev->dev, regs->start,
  167. resource_size(regs));
  168. if (!uart.port.membase)
  169. return -ENOMEM;
  170. data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
  171. if (!data)
  172. return -ENOMEM;
  173. if (pdev->dev.of_node) {
  174. err = mtk8250_probe_of(pdev, &uart.port, data);
  175. if (err)
  176. return err;
  177. } else
  178. return -ENODEV;
  179. spin_lock_init(&uart.port.lock);
  180. uart.port.mapbase = regs->start;
  181. uart.port.irq = irq->start;
  182. uart.port.pm = mtk8250_do_pm;
  183. uart.port.type = PORT_16550;
  184. uart.port.flags = UPF_BOOT_AUTOCONF | UPF_FIXED_PORT;
  185. uart.port.dev = &pdev->dev;
  186. uart.port.iotype = UPIO_MEM32;
  187. uart.port.regshift = 2;
  188. uart.port.private_data = data;
  189. uart.port.set_termios = mtk8250_set_termios;
  190. uart.port.uartclk = clk_get_rate(data->uart_clk);
  191. /* Disable Rate Fix function */
  192. writel(0x0, uart.port.membase +
  193. (MTK_UART_RATE_FIX << uart.port.regshift));
  194. platform_set_drvdata(pdev, data);
  195. pm_runtime_enable(&pdev->dev);
  196. if (!pm_runtime_enabled(&pdev->dev)) {
  197. err = mtk8250_runtime_resume(&pdev->dev);
  198. if (err)
  199. return err;
  200. }
  201. data->line = serial8250_register_8250_port(&uart);
  202. if (data->line < 0)
  203. return data->line;
  204. return 0;
  205. }
  206. static int mtk8250_remove(struct platform_device *pdev)
  207. {
  208. struct mtk8250_data *data = platform_get_drvdata(pdev);
  209. pm_runtime_get_sync(&pdev->dev);
  210. serial8250_unregister_port(data->line);
  211. pm_runtime_disable(&pdev->dev);
  212. pm_runtime_put_noidle(&pdev->dev);
  213. if (!pm_runtime_status_suspended(&pdev->dev))
  214. mtk8250_runtime_suspend(&pdev->dev);
  215. return 0;
  216. }
  217. #ifdef CONFIG_PM_SLEEP
  218. static int mtk8250_suspend(struct device *dev)
  219. {
  220. struct mtk8250_data *data = dev_get_drvdata(dev);
  221. serial8250_suspend_port(data->line);
  222. return 0;
  223. }
  224. static int mtk8250_resume(struct device *dev)
  225. {
  226. struct mtk8250_data *data = dev_get_drvdata(dev);
  227. serial8250_resume_port(data->line);
  228. return 0;
  229. }
  230. #endif /* CONFIG_PM_SLEEP */
  231. static const struct dev_pm_ops mtk8250_pm_ops = {
  232. SET_SYSTEM_SLEEP_PM_OPS(mtk8250_suspend, mtk8250_resume)
  233. SET_RUNTIME_PM_OPS(mtk8250_runtime_suspend, mtk8250_runtime_resume,
  234. NULL)
  235. };
  236. static const struct of_device_id mtk8250_of_match[] = {
  237. { .compatible = "mediatek,mt6577-uart" },
  238. { /* Sentinel */ }
  239. };
  240. MODULE_DEVICE_TABLE(of, mtk8250_of_match);
  241. static struct platform_driver mtk8250_platform_driver = {
  242. .driver = {
  243. .name = "mt6577-uart",
  244. .pm = &mtk8250_pm_ops,
  245. .of_match_table = mtk8250_of_match,
  246. },
  247. .probe = mtk8250_probe,
  248. .remove = mtk8250_remove,
  249. };
  250. module_platform_driver(mtk8250_platform_driver);
  251. #ifdef CONFIG_SERIAL_8250_CONSOLE
  252. static int __init early_mtk8250_setup(struct earlycon_device *device,
  253. const char *options)
  254. {
  255. if (!device->port.membase)
  256. return -ENODEV;
  257. device->port.iotype = UPIO_MEM32;
  258. return early_serial8250_setup(device, NULL);
  259. }
  260. OF_EARLYCON_DECLARE(mtk8250, "mediatek,mt6577-uart", early_mtk8250_setup);
  261. #endif
  262. MODULE_AUTHOR("Matthias Brugger");
  263. MODULE_LICENSE("GPL");
  264. MODULE_DESCRIPTION("Mediatek 8250 serial port driver");