8250_dma.c 6.2 KB

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  1. /*
  2. * 8250_dma.c - DMA Engine API support for 8250.c
  3. *
  4. * Copyright (C) 2013 Intel Corporation
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. */
  11. #include <linux/tty.h>
  12. #include <linux/tty_flip.h>
  13. #include <linux/serial_reg.h>
  14. #include <linux/dma-mapping.h>
  15. #include "8250.h"
  16. static void __dma_tx_complete(void *param)
  17. {
  18. struct uart_8250_port *p = param;
  19. struct uart_8250_dma *dma = p->dma;
  20. struct circ_buf *xmit = &p->port.state->xmit;
  21. unsigned long flags;
  22. int ret;
  23. dma_sync_single_for_cpu(dma->txchan->device->dev, dma->tx_addr,
  24. UART_XMIT_SIZE, DMA_TO_DEVICE);
  25. spin_lock_irqsave(&p->port.lock, flags);
  26. dma->tx_running = 0;
  27. xmit->tail += dma->tx_size;
  28. xmit->tail &= UART_XMIT_SIZE - 1;
  29. p->port.icount.tx += dma->tx_size;
  30. if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
  31. uart_write_wakeup(&p->port);
  32. ret = serial8250_tx_dma(p);
  33. if (ret) {
  34. p->ier |= UART_IER_THRI;
  35. serial_port_out(&p->port, UART_IER, p->ier);
  36. }
  37. spin_unlock_irqrestore(&p->port.lock, flags);
  38. }
  39. static void __dma_rx_complete(void *param)
  40. {
  41. struct uart_8250_port *p = param;
  42. struct uart_8250_dma *dma = p->dma;
  43. struct tty_port *tty_port = &p->port.state->port;
  44. struct dma_tx_state state;
  45. int count;
  46. dma_sync_single_for_cpu(dma->rxchan->device->dev, dma->rx_addr,
  47. dma->rx_size, DMA_FROM_DEVICE);
  48. dma->rx_running = 0;
  49. dmaengine_tx_status(dma->rxchan, dma->rx_cookie, &state);
  50. count = dma->rx_size - state.residue;
  51. tty_insert_flip_string(tty_port, dma->rx_buf, count);
  52. p->port.icount.rx += count;
  53. tty_flip_buffer_push(tty_port);
  54. }
  55. int serial8250_tx_dma(struct uart_8250_port *p)
  56. {
  57. struct uart_8250_dma *dma = p->dma;
  58. struct circ_buf *xmit = &p->port.state->xmit;
  59. struct dma_async_tx_descriptor *desc;
  60. int ret;
  61. if (uart_tx_stopped(&p->port) || dma->tx_running ||
  62. uart_circ_empty(xmit))
  63. return 0;
  64. dma->tx_size = CIRC_CNT_TO_END(xmit->head, xmit->tail, UART_XMIT_SIZE);
  65. desc = dmaengine_prep_slave_single(dma->txchan,
  66. dma->tx_addr + xmit->tail,
  67. dma->tx_size, DMA_MEM_TO_DEV,
  68. DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
  69. if (!desc) {
  70. ret = -EBUSY;
  71. goto err;
  72. }
  73. dma->tx_running = 1;
  74. desc->callback = __dma_tx_complete;
  75. desc->callback_param = p;
  76. dma->tx_cookie = dmaengine_submit(desc);
  77. dma_sync_single_for_device(dma->txchan->device->dev, dma->tx_addr,
  78. UART_XMIT_SIZE, DMA_TO_DEVICE);
  79. dma_async_issue_pending(dma->txchan);
  80. if (dma->tx_err) {
  81. dma->tx_err = 0;
  82. if (p->ier & UART_IER_THRI) {
  83. p->ier &= ~UART_IER_THRI;
  84. serial_out(p, UART_IER, p->ier);
  85. }
  86. }
  87. return 0;
  88. err:
  89. dma->tx_err = 1;
  90. return ret;
  91. }
  92. int serial8250_rx_dma(struct uart_8250_port *p, unsigned int iir)
  93. {
  94. struct uart_8250_dma *dma = p->dma;
  95. struct dma_async_tx_descriptor *desc;
  96. switch (iir & 0x3f) {
  97. case UART_IIR_RLSI:
  98. /* 8250_core handles errors and break interrupts */
  99. return -EIO;
  100. case UART_IIR_RX_TIMEOUT:
  101. /*
  102. * If RCVR FIFO trigger level was not reached, complete the
  103. * transfer and let 8250_core copy the remaining data.
  104. */
  105. if (dma->rx_running) {
  106. dmaengine_pause(dma->rxchan);
  107. __dma_rx_complete(p);
  108. dmaengine_terminate_all(dma->rxchan);
  109. }
  110. return -ETIMEDOUT;
  111. default:
  112. break;
  113. }
  114. if (dma->rx_running)
  115. return 0;
  116. desc = dmaengine_prep_slave_single(dma->rxchan, dma->rx_addr,
  117. dma->rx_size, DMA_DEV_TO_MEM,
  118. DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
  119. if (!desc)
  120. return -EBUSY;
  121. dma->rx_running = 1;
  122. desc->callback = __dma_rx_complete;
  123. desc->callback_param = p;
  124. dma->rx_cookie = dmaengine_submit(desc);
  125. dma_sync_single_for_device(dma->rxchan->device->dev, dma->rx_addr,
  126. dma->rx_size, DMA_FROM_DEVICE);
  127. dma_async_issue_pending(dma->rxchan);
  128. return 0;
  129. }
  130. int serial8250_request_dma(struct uart_8250_port *p)
  131. {
  132. struct uart_8250_dma *dma = p->dma;
  133. dma_cap_mask_t mask;
  134. /* Default slave configuration parameters */
  135. dma->rxconf.direction = DMA_DEV_TO_MEM;
  136. dma->rxconf.src_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE;
  137. dma->rxconf.src_addr = p->port.mapbase + UART_RX;
  138. dma->txconf.direction = DMA_MEM_TO_DEV;
  139. dma->txconf.dst_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE;
  140. dma->txconf.dst_addr = p->port.mapbase + UART_TX;
  141. dma_cap_zero(mask);
  142. dma_cap_set(DMA_SLAVE, mask);
  143. /* Get a channel for RX */
  144. dma->rxchan = dma_request_slave_channel_compat(mask,
  145. dma->fn, dma->rx_param,
  146. p->port.dev, "rx");
  147. if (!dma->rxchan)
  148. return -ENODEV;
  149. dmaengine_slave_config(dma->rxchan, &dma->rxconf);
  150. /* Get a channel for TX */
  151. dma->txchan = dma_request_slave_channel_compat(mask,
  152. dma->fn, dma->tx_param,
  153. p->port.dev, "tx");
  154. if (!dma->txchan) {
  155. dma_release_channel(dma->rxchan);
  156. return -ENODEV;
  157. }
  158. dmaengine_slave_config(dma->txchan, &dma->txconf);
  159. /* RX buffer */
  160. if (!dma->rx_size)
  161. dma->rx_size = PAGE_SIZE;
  162. dma->rx_buf = dma_alloc_coherent(dma->rxchan->device->dev, dma->rx_size,
  163. &dma->rx_addr, GFP_KERNEL);
  164. if (!dma->rx_buf)
  165. goto err;
  166. /* TX buffer */
  167. dma->tx_addr = dma_map_single(dma->txchan->device->dev,
  168. p->port.state->xmit.buf,
  169. UART_XMIT_SIZE,
  170. DMA_TO_DEVICE);
  171. if (dma_mapping_error(dma->txchan->device->dev, dma->tx_addr)) {
  172. dma_free_coherent(dma->rxchan->device->dev, dma->rx_size,
  173. dma->rx_buf, dma->rx_addr);
  174. goto err;
  175. }
  176. dev_dbg_ratelimited(p->port.dev, "got both dma channels\n");
  177. return 0;
  178. err:
  179. dma_release_channel(dma->rxchan);
  180. dma_release_channel(dma->txchan);
  181. return -ENOMEM;
  182. }
  183. EXPORT_SYMBOL_GPL(serial8250_request_dma);
  184. void serial8250_release_dma(struct uart_8250_port *p)
  185. {
  186. struct uart_8250_dma *dma = p->dma;
  187. if (!dma)
  188. return;
  189. /* Release RX resources */
  190. dmaengine_terminate_all(dma->rxchan);
  191. dma_free_coherent(dma->rxchan->device->dev, dma->rx_size, dma->rx_buf,
  192. dma->rx_addr);
  193. dma_release_channel(dma->rxchan);
  194. dma->rxchan = NULL;
  195. /* Release TX resources */
  196. dmaengine_terminate_all(dma->txchan);
  197. dma_unmap_single(dma->txchan->device->dev, dma->tx_addr,
  198. UART_XMIT_SIZE, DMA_TO_DEVICE);
  199. dma_release_channel(dma->txchan);
  200. dma->txchan = NULL;
  201. dma->tx_running = 0;
  202. dev_dbg_ratelimited(p->port.dev, "dma channels released\n");
  203. }
  204. EXPORT_SYMBOL_GPL(serial8250_release_dma);