qeth_core_main.c 165 KB

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  1. /*
  2. * Copyright IBM Corp. 2007, 2009
  3. * Author(s): Utz Bacher <utz.bacher@de.ibm.com>,
  4. * Frank Pavlic <fpavlic@de.ibm.com>,
  5. * Thomas Spatzier <tspat@de.ibm.com>,
  6. * Frank Blaschka <frank.blaschka@de.ibm.com>
  7. */
  8. #define KMSG_COMPONENT "qeth"
  9. #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
  10. #include <linux/module.h>
  11. #include <linux/moduleparam.h>
  12. #include <linux/string.h>
  13. #include <linux/errno.h>
  14. #include <linux/kernel.h>
  15. #include <linux/ip.h>
  16. #include <linux/tcp.h>
  17. #include <linux/mii.h>
  18. #include <linux/kthread.h>
  19. #include <linux/slab.h>
  20. #include <net/iucv/af_iucv.h>
  21. #include <net/dsfield.h>
  22. #include <asm/ebcdic.h>
  23. #include <asm/chpid.h>
  24. #include <asm/io.h>
  25. #include <asm/sysinfo.h>
  26. #include <asm/compat.h>
  27. #include "qeth_core.h"
  28. struct qeth_dbf_info qeth_dbf[QETH_DBF_INFOS] = {
  29. /* define dbf - Name, Pages, Areas, Maxlen, Level, View, Handle */
  30. /* N P A M L V H */
  31. [QETH_DBF_SETUP] = {"qeth_setup",
  32. 8, 1, 8, 5, &debug_hex_ascii_view, NULL},
  33. [QETH_DBF_MSG] = {"qeth_msg", 8, 1, 11 * sizeof(long), 3,
  34. &debug_sprintf_view, NULL},
  35. [QETH_DBF_CTRL] = {"qeth_control",
  36. 8, 1, QETH_DBF_CTRL_LEN, 5, &debug_hex_ascii_view, NULL},
  37. };
  38. EXPORT_SYMBOL_GPL(qeth_dbf);
  39. struct qeth_card_list_struct qeth_core_card_list;
  40. EXPORT_SYMBOL_GPL(qeth_core_card_list);
  41. struct kmem_cache *qeth_core_header_cache;
  42. EXPORT_SYMBOL_GPL(qeth_core_header_cache);
  43. static struct kmem_cache *qeth_qdio_outbuf_cache;
  44. static struct device *qeth_core_root_dev;
  45. static unsigned int known_devices[][6] = QETH_MODELLIST_ARRAY;
  46. static struct lock_class_key qdio_out_skb_queue_key;
  47. static struct mutex qeth_mod_mutex;
  48. static void qeth_send_control_data_cb(struct qeth_channel *,
  49. struct qeth_cmd_buffer *);
  50. static int qeth_issue_next_read(struct qeth_card *);
  51. static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *);
  52. static void qeth_setup_ccw(struct qeth_channel *, unsigned char *, __u32);
  53. static void qeth_free_buffer_pool(struct qeth_card *);
  54. static int qeth_qdio_establish(struct qeth_card *);
  55. static void qeth_free_qdio_buffers(struct qeth_card *);
  56. static void qeth_notify_skbs(struct qeth_qdio_out_q *queue,
  57. struct qeth_qdio_out_buffer *buf,
  58. enum iucv_tx_notify notification);
  59. static void qeth_release_skbs(struct qeth_qdio_out_buffer *buf);
  60. static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue,
  61. struct qeth_qdio_out_buffer *buf,
  62. enum qeth_qdio_buffer_states newbufstate);
  63. static int qeth_init_qdio_out_buf(struct qeth_qdio_out_q *, int);
  64. struct workqueue_struct *qeth_wq;
  65. EXPORT_SYMBOL_GPL(qeth_wq);
  66. int qeth_card_hw_is_reachable(struct qeth_card *card)
  67. {
  68. return (card->state == CARD_STATE_SOFTSETUP) ||
  69. (card->state == CARD_STATE_UP);
  70. }
  71. EXPORT_SYMBOL_GPL(qeth_card_hw_is_reachable);
  72. static void qeth_close_dev_handler(struct work_struct *work)
  73. {
  74. struct qeth_card *card;
  75. card = container_of(work, struct qeth_card, close_dev_work);
  76. QETH_CARD_TEXT(card, 2, "cldevhdl");
  77. rtnl_lock();
  78. dev_close(card->dev);
  79. rtnl_unlock();
  80. ccwgroup_set_offline(card->gdev);
  81. }
  82. void qeth_close_dev(struct qeth_card *card)
  83. {
  84. QETH_CARD_TEXT(card, 2, "cldevsubm");
  85. queue_work(qeth_wq, &card->close_dev_work);
  86. }
  87. EXPORT_SYMBOL_GPL(qeth_close_dev);
  88. static inline const char *qeth_get_cardname(struct qeth_card *card)
  89. {
  90. if (card->info.guestlan) {
  91. switch (card->info.type) {
  92. case QETH_CARD_TYPE_OSD:
  93. return " Virtual NIC QDIO";
  94. case QETH_CARD_TYPE_IQD:
  95. return " Virtual NIC Hiper";
  96. case QETH_CARD_TYPE_OSM:
  97. return " Virtual NIC QDIO - OSM";
  98. case QETH_CARD_TYPE_OSX:
  99. return " Virtual NIC QDIO - OSX";
  100. default:
  101. return " unknown";
  102. }
  103. } else {
  104. switch (card->info.type) {
  105. case QETH_CARD_TYPE_OSD:
  106. return " OSD Express";
  107. case QETH_CARD_TYPE_IQD:
  108. return " HiperSockets";
  109. case QETH_CARD_TYPE_OSN:
  110. return " OSN QDIO";
  111. case QETH_CARD_TYPE_OSM:
  112. return " OSM QDIO";
  113. case QETH_CARD_TYPE_OSX:
  114. return " OSX QDIO";
  115. default:
  116. return " unknown";
  117. }
  118. }
  119. return " n/a";
  120. }
  121. /* max length to be returned: 14 */
  122. const char *qeth_get_cardname_short(struct qeth_card *card)
  123. {
  124. if (card->info.guestlan) {
  125. switch (card->info.type) {
  126. case QETH_CARD_TYPE_OSD:
  127. return "Virt.NIC QDIO";
  128. case QETH_CARD_TYPE_IQD:
  129. return "Virt.NIC Hiper";
  130. case QETH_CARD_TYPE_OSM:
  131. return "Virt.NIC OSM";
  132. case QETH_CARD_TYPE_OSX:
  133. return "Virt.NIC OSX";
  134. default:
  135. return "unknown";
  136. }
  137. } else {
  138. switch (card->info.type) {
  139. case QETH_CARD_TYPE_OSD:
  140. switch (card->info.link_type) {
  141. case QETH_LINK_TYPE_FAST_ETH:
  142. return "OSD_100";
  143. case QETH_LINK_TYPE_HSTR:
  144. return "HSTR";
  145. case QETH_LINK_TYPE_GBIT_ETH:
  146. return "OSD_1000";
  147. case QETH_LINK_TYPE_10GBIT_ETH:
  148. return "OSD_10GIG";
  149. case QETH_LINK_TYPE_LANE_ETH100:
  150. return "OSD_FE_LANE";
  151. case QETH_LINK_TYPE_LANE_TR:
  152. return "OSD_TR_LANE";
  153. case QETH_LINK_TYPE_LANE_ETH1000:
  154. return "OSD_GbE_LANE";
  155. case QETH_LINK_TYPE_LANE:
  156. return "OSD_ATM_LANE";
  157. default:
  158. return "OSD_Express";
  159. }
  160. case QETH_CARD_TYPE_IQD:
  161. return "HiperSockets";
  162. case QETH_CARD_TYPE_OSN:
  163. return "OSN";
  164. case QETH_CARD_TYPE_OSM:
  165. return "OSM_1000";
  166. case QETH_CARD_TYPE_OSX:
  167. return "OSX_10GIG";
  168. default:
  169. return "unknown";
  170. }
  171. }
  172. return "n/a";
  173. }
  174. void qeth_set_recovery_task(struct qeth_card *card)
  175. {
  176. card->recovery_task = current;
  177. }
  178. EXPORT_SYMBOL_GPL(qeth_set_recovery_task);
  179. void qeth_clear_recovery_task(struct qeth_card *card)
  180. {
  181. card->recovery_task = NULL;
  182. }
  183. EXPORT_SYMBOL_GPL(qeth_clear_recovery_task);
  184. static bool qeth_is_recovery_task(const struct qeth_card *card)
  185. {
  186. return card->recovery_task == current;
  187. }
  188. void qeth_set_allowed_threads(struct qeth_card *card, unsigned long threads,
  189. int clear_start_mask)
  190. {
  191. unsigned long flags;
  192. spin_lock_irqsave(&card->thread_mask_lock, flags);
  193. card->thread_allowed_mask = threads;
  194. if (clear_start_mask)
  195. card->thread_start_mask &= threads;
  196. spin_unlock_irqrestore(&card->thread_mask_lock, flags);
  197. wake_up(&card->wait_q);
  198. }
  199. EXPORT_SYMBOL_GPL(qeth_set_allowed_threads);
  200. int qeth_threads_running(struct qeth_card *card, unsigned long threads)
  201. {
  202. unsigned long flags;
  203. int rc = 0;
  204. spin_lock_irqsave(&card->thread_mask_lock, flags);
  205. rc = (card->thread_running_mask & threads);
  206. spin_unlock_irqrestore(&card->thread_mask_lock, flags);
  207. return rc;
  208. }
  209. EXPORT_SYMBOL_GPL(qeth_threads_running);
  210. int qeth_wait_for_threads(struct qeth_card *card, unsigned long threads)
  211. {
  212. if (qeth_is_recovery_task(card))
  213. return 0;
  214. return wait_event_interruptible(card->wait_q,
  215. qeth_threads_running(card, threads) == 0);
  216. }
  217. EXPORT_SYMBOL_GPL(qeth_wait_for_threads);
  218. void qeth_clear_working_pool_list(struct qeth_card *card)
  219. {
  220. struct qeth_buffer_pool_entry *pool_entry, *tmp;
  221. QETH_CARD_TEXT(card, 5, "clwrklst");
  222. list_for_each_entry_safe(pool_entry, tmp,
  223. &card->qdio.in_buf_pool.entry_list, list){
  224. list_del(&pool_entry->list);
  225. }
  226. }
  227. EXPORT_SYMBOL_GPL(qeth_clear_working_pool_list);
  228. static int qeth_alloc_buffer_pool(struct qeth_card *card)
  229. {
  230. struct qeth_buffer_pool_entry *pool_entry;
  231. void *ptr;
  232. int i, j;
  233. QETH_CARD_TEXT(card, 5, "alocpool");
  234. for (i = 0; i < card->qdio.init_pool.buf_count; ++i) {
  235. pool_entry = kzalloc(sizeof(*pool_entry), GFP_KERNEL);
  236. if (!pool_entry) {
  237. qeth_free_buffer_pool(card);
  238. return -ENOMEM;
  239. }
  240. for (j = 0; j < QETH_MAX_BUFFER_ELEMENTS(card); ++j) {
  241. ptr = (void *) __get_free_page(GFP_KERNEL);
  242. if (!ptr) {
  243. while (j > 0)
  244. free_page((unsigned long)
  245. pool_entry->elements[--j]);
  246. kfree(pool_entry);
  247. qeth_free_buffer_pool(card);
  248. return -ENOMEM;
  249. }
  250. pool_entry->elements[j] = ptr;
  251. }
  252. list_add(&pool_entry->init_list,
  253. &card->qdio.init_pool.entry_list);
  254. }
  255. return 0;
  256. }
  257. int qeth_realloc_buffer_pool(struct qeth_card *card, int bufcnt)
  258. {
  259. QETH_CARD_TEXT(card, 2, "realcbp");
  260. if ((card->state != CARD_STATE_DOWN) &&
  261. (card->state != CARD_STATE_RECOVER))
  262. return -EPERM;
  263. /* TODO: steel/add buffers from/to a running card's buffer pool (?) */
  264. qeth_clear_working_pool_list(card);
  265. qeth_free_buffer_pool(card);
  266. card->qdio.in_buf_pool.buf_count = bufcnt;
  267. card->qdio.init_pool.buf_count = bufcnt;
  268. return qeth_alloc_buffer_pool(card);
  269. }
  270. EXPORT_SYMBOL_GPL(qeth_realloc_buffer_pool);
  271. static void qeth_free_qdio_queue(struct qeth_qdio_q *q)
  272. {
  273. if (!q)
  274. return;
  275. qdio_free_buffers(q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q);
  276. kfree(q);
  277. }
  278. static struct qeth_qdio_q *qeth_alloc_qdio_queue(void)
  279. {
  280. struct qeth_qdio_q *q = kzalloc(sizeof(*q), GFP_KERNEL);
  281. int i;
  282. if (!q)
  283. return NULL;
  284. if (qdio_alloc_buffers(q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q)) {
  285. kfree(q);
  286. return NULL;
  287. }
  288. for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i)
  289. q->bufs[i].buffer = q->qdio_bufs[i];
  290. QETH_DBF_HEX(SETUP, 2, &q, sizeof(void *));
  291. return q;
  292. }
  293. static inline int qeth_cq_init(struct qeth_card *card)
  294. {
  295. int rc;
  296. if (card->options.cq == QETH_CQ_ENABLED) {
  297. QETH_DBF_TEXT(SETUP, 2, "cqinit");
  298. qdio_reset_buffers(card->qdio.c_q->qdio_bufs,
  299. QDIO_MAX_BUFFERS_PER_Q);
  300. card->qdio.c_q->next_buf_to_init = 127;
  301. rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT,
  302. card->qdio.no_in_queues - 1, 0,
  303. 127);
  304. if (rc) {
  305. QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
  306. goto out;
  307. }
  308. }
  309. rc = 0;
  310. out:
  311. return rc;
  312. }
  313. static inline int qeth_alloc_cq(struct qeth_card *card)
  314. {
  315. int rc;
  316. if (card->options.cq == QETH_CQ_ENABLED) {
  317. int i;
  318. struct qdio_outbuf_state *outbuf_states;
  319. QETH_DBF_TEXT(SETUP, 2, "cqon");
  320. card->qdio.c_q = qeth_alloc_qdio_queue();
  321. if (!card->qdio.c_q) {
  322. rc = -1;
  323. goto kmsg_out;
  324. }
  325. card->qdio.no_in_queues = 2;
  326. card->qdio.out_bufstates =
  327. kzalloc(card->qdio.no_out_queues *
  328. QDIO_MAX_BUFFERS_PER_Q *
  329. sizeof(struct qdio_outbuf_state), GFP_KERNEL);
  330. outbuf_states = card->qdio.out_bufstates;
  331. if (outbuf_states == NULL) {
  332. rc = -1;
  333. goto free_cq_out;
  334. }
  335. for (i = 0; i < card->qdio.no_out_queues; ++i) {
  336. card->qdio.out_qs[i]->bufstates = outbuf_states;
  337. outbuf_states += QDIO_MAX_BUFFERS_PER_Q;
  338. }
  339. } else {
  340. QETH_DBF_TEXT(SETUP, 2, "nocq");
  341. card->qdio.c_q = NULL;
  342. card->qdio.no_in_queues = 1;
  343. }
  344. QETH_DBF_TEXT_(SETUP, 2, "iqc%d", card->qdio.no_in_queues);
  345. rc = 0;
  346. out:
  347. return rc;
  348. free_cq_out:
  349. qeth_free_qdio_queue(card->qdio.c_q);
  350. card->qdio.c_q = NULL;
  351. kmsg_out:
  352. dev_err(&card->gdev->dev, "Failed to create completion queue\n");
  353. goto out;
  354. }
  355. static inline void qeth_free_cq(struct qeth_card *card)
  356. {
  357. if (card->qdio.c_q) {
  358. --card->qdio.no_in_queues;
  359. qeth_free_qdio_queue(card->qdio.c_q);
  360. card->qdio.c_q = NULL;
  361. }
  362. kfree(card->qdio.out_bufstates);
  363. card->qdio.out_bufstates = NULL;
  364. }
  365. static inline enum iucv_tx_notify qeth_compute_cq_notification(int sbalf15,
  366. int delayed) {
  367. enum iucv_tx_notify n;
  368. switch (sbalf15) {
  369. case 0:
  370. n = delayed ? TX_NOTIFY_DELAYED_OK : TX_NOTIFY_OK;
  371. break;
  372. case 4:
  373. case 16:
  374. case 17:
  375. case 18:
  376. n = delayed ? TX_NOTIFY_DELAYED_UNREACHABLE :
  377. TX_NOTIFY_UNREACHABLE;
  378. break;
  379. default:
  380. n = delayed ? TX_NOTIFY_DELAYED_GENERALERROR :
  381. TX_NOTIFY_GENERALERROR;
  382. break;
  383. }
  384. return n;
  385. }
  386. static inline void qeth_cleanup_handled_pending(struct qeth_qdio_out_q *q,
  387. int bidx, int forced_cleanup)
  388. {
  389. if (q->card->options.cq != QETH_CQ_ENABLED)
  390. return;
  391. if (q->bufs[bidx]->next_pending != NULL) {
  392. struct qeth_qdio_out_buffer *head = q->bufs[bidx];
  393. struct qeth_qdio_out_buffer *c = q->bufs[bidx]->next_pending;
  394. while (c) {
  395. if (forced_cleanup ||
  396. atomic_read(&c->state) ==
  397. QETH_QDIO_BUF_HANDLED_DELAYED) {
  398. struct qeth_qdio_out_buffer *f = c;
  399. QETH_CARD_TEXT(f->q->card, 5, "fp");
  400. QETH_CARD_TEXT_(f->q->card, 5, "%lx", (long) f);
  401. /* release here to avoid interleaving between
  402. outbound tasklet and inbound tasklet
  403. regarding notifications and lifecycle */
  404. qeth_release_skbs(c);
  405. c = f->next_pending;
  406. WARN_ON_ONCE(head->next_pending != f);
  407. head->next_pending = c;
  408. kmem_cache_free(qeth_qdio_outbuf_cache, f);
  409. } else {
  410. head = c;
  411. c = c->next_pending;
  412. }
  413. }
  414. }
  415. if (forced_cleanup && (atomic_read(&(q->bufs[bidx]->state)) ==
  416. QETH_QDIO_BUF_HANDLED_DELAYED)) {
  417. /* for recovery situations */
  418. q->bufs[bidx]->aob = q->bufstates[bidx].aob;
  419. qeth_init_qdio_out_buf(q, bidx);
  420. QETH_CARD_TEXT(q->card, 2, "clprecov");
  421. }
  422. }
  423. static inline void qeth_qdio_handle_aob(struct qeth_card *card,
  424. unsigned long phys_aob_addr) {
  425. struct qaob *aob;
  426. struct qeth_qdio_out_buffer *buffer;
  427. enum iucv_tx_notify notification;
  428. aob = (struct qaob *) phys_to_virt(phys_aob_addr);
  429. QETH_CARD_TEXT(card, 5, "haob");
  430. QETH_CARD_TEXT_(card, 5, "%lx", phys_aob_addr);
  431. buffer = (struct qeth_qdio_out_buffer *) aob->user1;
  432. QETH_CARD_TEXT_(card, 5, "%lx", aob->user1);
  433. if (atomic_cmpxchg(&buffer->state, QETH_QDIO_BUF_PRIMED,
  434. QETH_QDIO_BUF_IN_CQ) == QETH_QDIO_BUF_PRIMED) {
  435. notification = TX_NOTIFY_OK;
  436. } else {
  437. WARN_ON_ONCE(atomic_read(&buffer->state) !=
  438. QETH_QDIO_BUF_PENDING);
  439. atomic_set(&buffer->state, QETH_QDIO_BUF_IN_CQ);
  440. notification = TX_NOTIFY_DELAYED_OK;
  441. }
  442. if (aob->aorc != 0) {
  443. QETH_CARD_TEXT_(card, 2, "aorc%02X", aob->aorc);
  444. notification = qeth_compute_cq_notification(aob->aorc, 1);
  445. }
  446. qeth_notify_skbs(buffer->q, buffer, notification);
  447. buffer->aob = NULL;
  448. qeth_clear_output_buffer(buffer->q, buffer,
  449. QETH_QDIO_BUF_HANDLED_DELAYED);
  450. /* from here on: do not touch buffer anymore */
  451. qdio_release_aob(aob);
  452. }
  453. static inline int qeth_is_cq(struct qeth_card *card, unsigned int queue)
  454. {
  455. return card->options.cq == QETH_CQ_ENABLED &&
  456. card->qdio.c_q != NULL &&
  457. queue != 0 &&
  458. queue == card->qdio.no_in_queues - 1;
  459. }
  460. static int qeth_issue_next_read(struct qeth_card *card)
  461. {
  462. int rc;
  463. struct qeth_cmd_buffer *iob;
  464. QETH_CARD_TEXT(card, 5, "issnxrd");
  465. if (card->read.state != CH_STATE_UP)
  466. return -EIO;
  467. iob = qeth_get_buffer(&card->read);
  468. if (!iob) {
  469. dev_warn(&card->gdev->dev, "The qeth device driver "
  470. "failed to recover an error on the device\n");
  471. QETH_DBF_MESSAGE(2, "%s issue_next_read failed: no iob "
  472. "available\n", dev_name(&card->gdev->dev));
  473. return -ENOMEM;
  474. }
  475. qeth_setup_ccw(&card->read, iob->data, QETH_BUFSIZE);
  476. QETH_CARD_TEXT(card, 6, "noirqpnd");
  477. rc = ccw_device_start(card->read.ccwdev, &card->read.ccw,
  478. (addr_t) iob, 0, 0);
  479. if (rc) {
  480. QETH_DBF_MESSAGE(2, "%s error in starting next read ccw! "
  481. "rc=%i\n", dev_name(&card->gdev->dev), rc);
  482. atomic_set(&card->read.irq_pending, 0);
  483. card->read_or_write_problem = 1;
  484. qeth_schedule_recovery(card);
  485. wake_up(&card->wait_q);
  486. }
  487. return rc;
  488. }
  489. static struct qeth_reply *qeth_alloc_reply(struct qeth_card *card)
  490. {
  491. struct qeth_reply *reply;
  492. reply = kzalloc(sizeof(struct qeth_reply), GFP_ATOMIC);
  493. if (reply) {
  494. atomic_set(&reply->refcnt, 1);
  495. atomic_set(&reply->received, 0);
  496. reply->card = card;
  497. }
  498. return reply;
  499. }
  500. static void qeth_get_reply(struct qeth_reply *reply)
  501. {
  502. WARN_ON(atomic_read(&reply->refcnt) <= 0);
  503. atomic_inc(&reply->refcnt);
  504. }
  505. static void qeth_put_reply(struct qeth_reply *reply)
  506. {
  507. WARN_ON(atomic_read(&reply->refcnt) <= 0);
  508. if (atomic_dec_and_test(&reply->refcnt))
  509. kfree(reply);
  510. }
  511. static void qeth_issue_ipa_msg(struct qeth_ipa_cmd *cmd, int rc,
  512. struct qeth_card *card)
  513. {
  514. char *ipa_name;
  515. int com = cmd->hdr.command;
  516. ipa_name = qeth_get_ipa_cmd_name(com);
  517. if (rc)
  518. QETH_DBF_MESSAGE(2, "IPA: %s(x%X) for %s/%s returned "
  519. "x%X \"%s\"\n",
  520. ipa_name, com, dev_name(&card->gdev->dev),
  521. QETH_CARD_IFNAME(card), rc,
  522. qeth_get_ipa_msg(rc));
  523. else
  524. QETH_DBF_MESSAGE(5, "IPA: %s(x%X) for %s/%s succeeded\n",
  525. ipa_name, com, dev_name(&card->gdev->dev),
  526. QETH_CARD_IFNAME(card));
  527. }
  528. static struct qeth_ipa_cmd *qeth_check_ipa_data(struct qeth_card *card,
  529. struct qeth_cmd_buffer *iob)
  530. {
  531. struct qeth_ipa_cmd *cmd = NULL;
  532. QETH_CARD_TEXT(card, 5, "chkipad");
  533. if (IS_IPA(iob->data)) {
  534. cmd = (struct qeth_ipa_cmd *) PDU_ENCAPSULATION(iob->data);
  535. if (IS_IPA_REPLY(cmd)) {
  536. if (cmd->hdr.command != IPA_CMD_SETCCID &&
  537. cmd->hdr.command != IPA_CMD_DELCCID &&
  538. cmd->hdr.command != IPA_CMD_MODCCID &&
  539. cmd->hdr.command != IPA_CMD_SET_DIAG_ASS)
  540. qeth_issue_ipa_msg(cmd,
  541. cmd->hdr.return_code, card);
  542. return cmd;
  543. } else {
  544. switch (cmd->hdr.command) {
  545. case IPA_CMD_STOPLAN:
  546. if (cmd->hdr.return_code ==
  547. IPA_RC_VEPA_TO_VEB_TRANSITION) {
  548. dev_err(&card->gdev->dev,
  549. "Interface %s is down because the "
  550. "adjacent port is no longer in "
  551. "reflective relay mode\n",
  552. QETH_CARD_IFNAME(card));
  553. qeth_close_dev(card);
  554. } else {
  555. dev_warn(&card->gdev->dev,
  556. "The link for interface %s on CHPID"
  557. " 0x%X failed\n",
  558. QETH_CARD_IFNAME(card),
  559. card->info.chpid);
  560. qeth_issue_ipa_msg(cmd,
  561. cmd->hdr.return_code, card);
  562. }
  563. card->lan_online = 0;
  564. if (card->dev && netif_carrier_ok(card->dev))
  565. netif_carrier_off(card->dev);
  566. return NULL;
  567. case IPA_CMD_STARTLAN:
  568. dev_info(&card->gdev->dev,
  569. "The link for %s on CHPID 0x%X has"
  570. " been restored\n",
  571. QETH_CARD_IFNAME(card),
  572. card->info.chpid);
  573. netif_carrier_on(card->dev);
  574. card->lan_online = 1;
  575. if (card->info.hwtrap)
  576. card->info.hwtrap = 2;
  577. qeth_schedule_recovery(card);
  578. return NULL;
  579. case IPA_CMD_SETBRIDGEPORT_IQD:
  580. case IPA_CMD_SETBRIDGEPORT_OSA:
  581. case IPA_CMD_ADDRESS_CHANGE_NOTIF:
  582. if (card->discipline->control_event_handler
  583. (card, cmd))
  584. return cmd;
  585. else
  586. return NULL;
  587. case IPA_CMD_MODCCID:
  588. return cmd;
  589. case IPA_CMD_REGISTER_LOCAL_ADDR:
  590. QETH_CARD_TEXT(card, 3, "irla");
  591. break;
  592. case IPA_CMD_UNREGISTER_LOCAL_ADDR:
  593. QETH_CARD_TEXT(card, 3, "urla");
  594. break;
  595. default:
  596. QETH_DBF_MESSAGE(2, "Received data is IPA "
  597. "but not a reply!\n");
  598. break;
  599. }
  600. }
  601. }
  602. return cmd;
  603. }
  604. void qeth_clear_ipacmd_list(struct qeth_card *card)
  605. {
  606. struct qeth_reply *reply, *r;
  607. unsigned long flags;
  608. QETH_CARD_TEXT(card, 4, "clipalst");
  609. spin_lock_irqsave(&card->lock, flags);
  610. list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
  611. qeth_get_reply(reply);
  612. reply->rc = -EIO;
  613. atomic_inc(&reply->received);
  614. list_del_init(&reply->list);
  615. wake_up(&reply->wait_q);
  616. qeth_put_reply(reply);
  617. }
  618. spin_unlock_irqrestore(&card->lock, flags);
  619. atomic_set(&card->write.irq_pending, 0);
  620. }
  621. EXPORT_SYMBOL_GPL(qeth_clear_ipacmd_list);
  622. static int qeth_check_idx_response(struct qeth_card *card,
  623. unsigned char *buffer)
  624. {
  625. if (!buffer)
  626. return 0;
  627. QETH_DBF_HEX(CTRL, 2, buffer, QETH_DBF_CTRL_LEN);
  628. if ((buffer[2] & 0xc0) == 0xc0) {
  629. QETH_DBF_MESSAGE(2, "received an IDX TERMINATE "
  630. "with cause code 0x%02x%s\n",
  631. buffer[4],
  632. ((buffer[4] == 0x22) ?
  633. " -- try another portname" : ""));
  634. QETH_CARD_TEXT(card, 2, "ckidxres");
  635. QETH_CARD_TEXT(card, 2, " idxterm");
  636. QETH_CARD_TEXT_(card, 2, " rc%d", -EIO);
  637. if (buffer[4] == 0xf6) {
  638. dev_err(&card->gdev->dev,
  639. "The qeth device is not configured "
  640. "for the OSI layer required by z/VM\n");
  641. return -EPERM;
  642. }
  643. return -EIO;
  644. }
  645. return 0;
  646. }
  647. static struct qeth_card *CARD_FROM_CDEV(struct ccw_device *cdev)
  648. {
  649. struct qeth_card *card = dev_get_drvdata(&((struct ccwgroup_device *)
  650. dev_get_drvdata(&cdev->dev))->dev);
  651. return card;
  652. }
  653. static void qeth_setup_ccw(struct qeth_channel *channel, unsigned char *iob,
  654. __u32 len)
  655. {
  656. struct qeth_card *card;
  657. card = CARD_FROM_CDEV(channel->ccwdev);
  658. QETH_CARD_TEXT(card, 4, "setupccw");
  659. if (channel == &card->read)
  660. memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1));
  661. else
  662. memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1));
  663. channel->ccw.count = len;
  664. channel->ccw.cda = (__u32) __pa(iob);
  665. }
  666. static struct qeth_cmd_buffer *__qeth_get_buffer(struct qeth_channel *channel)
  667. {
  668. __u8 index;
  669. QETH_CARD_TEXT(CARD_FROM_CDEV(channel->ccwdev), 6, "getbuff");
  670. index = channel->io_buf_no;
  671. do {
  672. if (channel->iob[index].state == BUF_STATE_FREE) {
  673. channel->iob[index].state = BUF_STATE_LOCKED;
  674. channel->io_buf_no = (channel->io_buf_no + 1) %
  675. QETH_CMD_BUFFER_NO;
  676. memset(channel->iob[index].data, 0, QETH_BUFSIZE);
  677. return channel->iob + index;
  678. }
  679. index = (index + 1) % QETH_CMD_BUFFER_NO;
  680. } while (index != channel->io_buf_no);
  681. return NULL;
  682. }
  683. void qeth_release_buffer(struct qeth_channel *channel,
  684. struct qeth_cmd_buffer *iob)
  685. {
  686. unsigned long flags;
  687. QETH_CARD_TEXT(CARD_FROM_CDEV(channel->ccwdev), 6, "relbuff");
  688. spin_lock_irqsave(&channel->iob_lock, flags);
  689. memset(iob->data, 0, QETH_BUFSIZE);
  690. iob->state = BUF_STATE_FREE;
  691. iob->callback = qeth_send_control_data_cb;
  692. iob->rc = 0;
  693. spin_unlock_irqrestore(&channel->iob_lock, flags);
  694. wake_up(&channel->wait_q);
  695. }
  696. EXPORT_SYMBOL_GPL(qeth_release_buffer);
  697. static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *channel)
  698. {
  699. struct qeth_cmd_buffer *buffer = NULL;
  700. unsigned long flags;
  701. spin_lock_irqsave(&channel->iob_lock, flags);
  702. buffer = __qeth_get_buffer(channel);
  703. spin_unlock_irqrestore(&channel->iob_lock, flags);
  704. return buffer;
  705. }
  706. struct qeth_cmd_buffer *qeth_wait_for_buffer(struct qeth_channel *channel)
  707. {
  708. struct qeth_cmd_buffer *buffer;
  709. wait_event(channel->wait_q,
  710. ((buffer = qeth_get_buffer(channel)) != NULL));
  711. return buffer;
  712. }
  713. EXPORT_SYMBOL_GPL(qeth_wait_for_buffer);
  714. void qeth_clear_cmd_buffers(struct qeth_channel *channel)
  715. {
  716. int cnt;
  717. for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
  718. qeth_release_buffer(channel, &channel->iob[cnt]);
  719. channel->buf_no = 0;
  720. channel->io_buf_no = 0;
  721. }
  722. EXPORT_SYMBOL_GPL(qeth_clear_cmd_buffers);
  723. static void qeth_send_control_data_cb(struct qeth_channel *channel,
  724. struct qeth_cmd_buffer *iob)
  725. {
  726. struct qeth_card *card;
  727. struct qeth_reply *reply, *r;
  728. struct qeth_ipa_cmd *cmd;
  729. unsigned long flags;
  730. int keep_reply;
  731. int rc = 0;
  732. card = CARD_FROM_CDEV(channel->ccwdev);
  733. QETH_CARD_TEXT(card, 4, "sndctlcb");
  734. rc = qeth_check_idx_response(card, iob->data);
  735. switch (rc) {
  736. case 0:
  737. break;
  738. case -EIO:
  739. qeth_clear_ipacmd_list(card);
  740. qeth_schedule_recovery(card);
  741. /* fall through */
  742. default:
  743. goto out;
  744. }
  745. cmd = qeth_check_ipa_data(card, iob);
  746. if ((cmd == NULL) && (card->state != CARD_STATE_DOWN))
  747. goto out;
  748. /*in case of OSN : check if cmd is set */
  749. if (card->info.type == QETH_CARD_TYPE_OSN &&
  750. cmd &&
  751. cmd->hdr.command != IPA_CMD_STARTLAN &&
  752. card->osn_info.assist_cb != NULL) {
  753. card->osn_info.assist_cb(card->dev, cmd);
  754. goto out;
  755. }
  756. spin_lock_irqsave(&card->lock, flags);
  757. list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
  758. if ((reply->seqno == QETH_IDX_COMMAND_SEQNO) ||
  759. ((cmd) && (reply->seqno == cmd->hdr.seqno))) {
  760. qeth_get_reply(reply);
  761. list_del_init(&reply->list);
  762. spin_unlock_irqrestore(&card->lock, flags);
  763. keep_reply = 0;
  764. if (reply->callback != NULL) {
  765. if (cmd) {
  766. reply->offset = (__u16)((char *)cmd -
  767. (char *)iob->data);
  768. keep_reply = reply->callback(card,
  769. reply,
  770. (unsigned long)cmd);
  771. } else
  772. keep_reply = reply->callback(card,
  773. reply,
  774. (unsigned long)iob);
  775. }
  776. if (cmd)
  777. reply->rc = (u16) cmd->hdr.return_code;
  778. else if (iob->rc)
  779. reply->rc = iob->rc;
  780. if (keep_reply) {
  781. spin_lock_irqsave(&card->lock, flags);
  782. list_add_tail(&reply->list,
  783. &card->cmd_waiter_list);
  784. spin_unlock_irqrestore(&card->lock, flags);
  785. } else {
  786. atomic_inc(&reply->received);
  787. wake_up(&reply->wait_q);
  788. }
  789. qeth_put_reply(reply);
  790. goto out;
  791. }
  792. }
  793. spin_unlock_irqrestore(&card->lock, flags);
  794. out:
  795. memcpy(&card->seqno.pdu_hdr_ack,
  796. QETH_PDU_HEADER_SEQ_NO(iob->data),
  797. QETH_SEQ_NO_LENGTH);
  798. qeth_release_buffer(channel, iob);
  799. }
  800. static int qeth_setup_channel(struct qeth_channel *channel)
  801. {
  802. int cnt;
  803. QETH_DBF_TEXT(SETUP, 2, "setupch");
  804. for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++) {
  805. channel->iob[cnt].data =
  806. kzalloc(QETH_BUFSIZE, GFP_DMA|GFP_KERNEL);
  807. if (channel->iob[cnt].data == NULL)
  808. break;
  809. channel->iob[cnt].state = BUF_STATE_FREE;
  810. channel->iob[cnt].channel = channel;
  811. channel->iob[cnt].callback = qeth_send_control_data_cb;
  812. channel->iob[cnt].rc = 0;
  813. }
  814. if (cnt < QETH_CMD_BUFFER_NO) {
  815. while (cnt-- > 0)
  816. kfree(channel->iob[cnt].data);
  817. return -ENOMEM;
  818. }
  819. channel->buf_no = 0;
  820. channel->io_buf_no = 0;
  821. atomic_set(&channel->irq_pending, 0);
  822. spin_lock_init(&channel->iob_lock);
  823. init_waitqueue_head(&channel->wait_q);
  824. return 0;
  825. }
  826. static int qeth_set_thread_start_bit(struct qeth_card *card,
  827. unsigned long thread)
  828. {
  829. unsigned long flags;
  830. spin_lock_irqsave(&card->thread_mask_lock, flags);
  831. if (!(card->thread_allowed_mask & thread) ||
  832. (card->thread_start_mask & thread)) {
  833. spin_unlock_irqrestore(&card->thread_mask_lock, flags);
  834. return -EPERM;
  835. }
  836. card->thread_start_mask |= thread;
  837. spin_unlock_irqrestore(&card->thread_mask_lock, flags);
  838. return 0;
  839. }
  840. void qeth_clear_thread_start_bit(struct qeth_card *card, unsigned long thread)
  841. {
  842. unsigned long flags;
  843. spin_lock_irqsave(&card->thread_mask_lock, flags);
  844. card->thread_start_mask &= ~thread;
  845. spin_unlock_irqrestore(&card->thread_mask_lock, flags);
  846. wake_up(&card->wait_q);
  847. }
  848. EXPORT_SYMBOL_GPL(qeth_clear_thread_start_bit);
  849. void qeth_clear_thread_running_bit(struct qeth_card *card, unsigned long thread)
  850. {
  851. unsigned long flags;
  852. spin_lock_irqsave(&card->thread_mask_lock, flags);
  853. card->thread_running_mask &= ~thread;
  854. spin_unlock_irqrestore(&card->thread_mask_lock, flags);
  855. wake_up(&card->wait_q);
  856. }
  857. EXPORT_SYMBOL_GPL(qeth_clear_thread_running_bit);
  858. static int __qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
  859. {
  860. unsigned long flags;
  861. int rc = 0;
  862. spin_lock_irqsave(&card->thread_mask_lock, flags);
  863. if (card->thread_start_mask & thread) {
  864. if ((card->thread_allowed_mask & thread) &&
  865. !(card->thread_running_mask & thread)) {
  866. rc = 1;
  867. card->thread_start_mask &= ~thread;
  868. card->thread_running_mask |= thread;
  869. } else
  870. rc = -EPERM;
  871. }
  872. spin_unlock_irqrestore(&card->thread_mask_lock, flags);
  873. return rc;
  874. }
  875. int qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
  876. {
  877. int rc = 0;
  878. wait_event(card->wait_q,
  879. (rc = __qeth_do_run_thread(card, thread)) >= 0);
  880. return rc;
  881. }
  882. EXPORT_SYMBOL_GPL(qeth_do_run_thread);
  883. void qeth_schedule_recovery(struct qeth_card *card)
  884. {
  885. QETH_CARD_TEXT(card, 2, "startrec");
  886. if (qeth_set_thread_start_bit(card, QETH_RECOVER_THREAD) == 0)
  887. schedule_work(&card->kernel_thread_starter);
  888. }
  889. EXPORT_SYMBOL_GPL(qeth_schedule_recovery);
  890. static int qeth_get_problem(struct ccw_device *cdev, struct irb *irb)
  891. {
  892. int dstat, cstat;
  893. char *sense;
  894. struct qeth_card *card;
  895. sense = (char *) irb->ecw;
  896. cstat = irb->scsw.cmd.cstat;
  897. dstat = irb->scsw.cmd.dstat;
  898. card = CARD_FROM_CDEV(cdev);
  899. if (cstat & (SCHN_STAT_CHN_CTRL_CHK | SCHN_STAT_INTF_CTRL_CHK |
  900. SCHN_STAT_CHN_DATA_CHK | SCHN_STAT_CHAIN_CHECK |
  901. SCHN_STAT_PROT_CHECK | SCHN_STAT_PROG_CHECK)) {
  902. QETH_CARD_TEXT(card, 2, "CGENCHK");
  903. dev_warn(&cdev->dev, "The qeth device driver "
  904. "failed to recover an error on the device\n");
  905. QETH_DBF_MESSAGE(2, "%s check on device dstat=x%x, cstat=x%x\n",
  906. dev_name(&cdev->dev), dstat, cstat);
  907. print_hex_dump(KERN_WARNING, "qeth: irb ", DUMP_PREFIX_OFFSET,
  908. 16, 1, irb, 64, 1);
  909. return 1;
  910. }
  911. if (dstat & DEV_STAT_UNIT_CHECK) {
  912. if (sense[SENSE_RESETTING_EVENT_BYTE] &
  913. SENSE_RESETTING_EVENT_FLAG) {
  914. QETH_CARD_TEXT(card, 2, "REVIND");
  915. return 1;
  916. }
  917. if (sense[SENSE_COMMAND_REJECT_BYTE] &
  918. SENSE_COMMAND_REJECT_FLAG) {
  919. QETH_CARD_TEXT(card, 2, "CMDREJi");
  920. return 1;
  921. }
  922. if ((sense[2] == 0xaf) && (sense[3] == 0xfe)) {
  923. QETH_CARD_TEXT(card, 2, "AFFE");
  924. return 1;
  925. }
  926. if ((!sense[0]) && (!sense[1]) && (!sense[2]) && (!sense[3])) {
  927. QETH_CARD_TEXT(card, 2, "ZEROSEN");
  928. return 0;
  929. }
  930. QETH_CARD_TEXT(card, 2, "DGENCHK");
  931. return 1;
  932. }
  933. return 0;
  934. }
  935. static long __qeth_check_irb_error(struct ccw_device *cdev,
  936. unsigned long intparm, struct irb *irb)
  937. {
  938. struct qeth_card *card;
  939. card = CARD_FROM_CDEV(cdev);
  940. if (!card || !IS_ERR(irb))
  941. return 0;
  942. switch (PTR_ERR(irb)) {
  943. case -EIO:
  944. QETH_DBF_MESSAGE(2, "%s i/o-error on device\n",
  945. dev_name(&cdev->dev));
  946. QETH_CARD_TEXT(card, 2, "ckirberr");
  947. QETH_CARD_TEXT_(card, 2, " rc%d", -EIO);
  948. break;
  949. case -ETIMEDOUT:
  950. dev_warn(&cdev->dev, "A hardware operation timed out"
  951. " on the device\n");
  952. QETH_CARD_TEXT(card, 2, "ckirberr");
  953. QETH_CARD_TEXT_(card, 2, " rc%d", -ETIMEDOUT);
  954. if (intparm == QETH_RCD_PARM) {
  955. if (card->data.ccwdev == cdev) {
  956. card->data.state = CH_STATE_DOWN;
  957. wake_up(&card->wait_q);
  958. }
  959. }
  960. break;
  961. default:
  962. QETH_DBF_MESSAGE(2, "%s unknown error %ld on device\n",
  963. dev_name(&cdev->dev), PTR_ERR(irb));
  964. QETH_CARD_TEXT(card, 2, "ckirberr");
  965. QETH_CARD_TEXT(card, 2, " rc???");
  966. }
  967. return PTR_ERR(irb);
  968. }
  969. static void qeth_irq(struct ccw_device *cdev, unsigned long intparm,
  970. struct irb *irb)
  971. {
  972. int rc;
  973. int cstat, dstat;
  974. struct qeth_cmd_buffer *buffer;
  975. struct qeth_channel *channel;
  976. struct qeth_card *card;
  977. struct qeth_cmd_buffer *iob;
  978. __u8 index;
  979. if (__qeth_check_irb_error(cdev, intparm, irb))
  980. return;
  981. cstat = irb->scsw.cmd.cstat;
  982. dstat = irb->scsw.cmd.dstat;
  983. card = CARD_FROM_CDEV(cdev);
  984. if (!card)
  985. return;
  986. QETH_CARD_TEXT(card, 5, "irq");
  987. if (card->read.ccwdev == cdev) {
  988. channel = &card->read;
  989. QETH_CARD_TEXT(card, 5, "read");
  990. } else if (card->write.ccwdev == cdev) {
  991. channel = &card->write;
  992. QETH_CARD_TEXT(card, 5, "write");
  993. } else {
  994. channel = &card->data;
  995. QETH_CARD_TEXT(card, 5, "data");
  996. }
  997. atomic_set(&channel->irq_pending, 0);
  998. if (irb->scsw.cmd.fctl & (SCSW_FCTL_CLEAR_FUNC))
  999. channel->state = CH_STATE_STOPPED;
  1000. if (irb->scsw.cmd.fctl & (SCSW_FCTL_HALT_FUNC))
  1001. channel->state = CH_STATE_HALTED;
  1002. /*let's wake up immediately on data channel*/
  1003. if ((channel == &card->data) && (intparm != 0) &&
  1004. (intparm != QETH_RCD_PARM))
  1005. goto out;
  1006. if (intparm == QETH_CLEAR_CHANNEL_PARM) {
  1007. QETH_CARD_TEXT(card, 6, "clrchpar");
  1008. /* we don't have to handle this further */
  1009. intparm = 0;
  1010. }
  1011. if (intparm == QETH_HALT_CHANNEL_PARM) {
  1012. QETH_CARD_TEXT(card, 6, "hltchpar");
  1013. /* we don't have to handle this further */
  1014. intparm = 0;
  1015. }
  1016. if ((dstat & DEV_STAT_UNIT_EXCEP) ||
  1017. (dstat & DEV_STAT_UNIT_CHECK) ||
  1018. (cstat)) {
  1019. if (irb->esw.esw0.erw.cons) {
  1020. dev_warn(&channel->ccwdev->dev,
  1021. "The qeth device driver failed to recover "
  1022. "an error on the device\n");
  1023. QETH_DBF_MESSAGE(2, "%s sense data available. cstat "
  1024. "0x%X dstat 0x%X\n",
  1025. dev_name(&channel->ccwdev->dev), cstat, dstat);
  1026. print_hex_dump(KERN_WARNING, "qeth: irb ",
  1027. DUMP_PREFIX_OFFSET, 16, 1, irb, 32, 1);
  1028. print_hex_dump(KERN_WARNING, "qeth: sense data ",
  1029. DUMP_PREFIX_OFFSET, 16, 1, irb->ecw, 32, 1);
  1030. }
  1031. if (intparm == QETH_RCD_PARM) {
  1032. channel->state = CH_STATE_DOWN;
  1033. goto out;
  1034. }
  1035. rc = qeth_get_problem(cdev, irb);
  1036. if (rc) {
  1037. qeth_clear_ipacmd_list(card);
  1038. qeth_schedule_recovery(card);
  1039. goto out;
  1040. }
  1041. }
  1042. if (intparm == QETH_RCD_PARM) {
  1043. channel->state = CH_STATE_RCD_DONE;
  1044. goto out;
  1045. }
  1046. if (intparm) {
  1047. buffer = (struct qeth_cmd_buffer *) __va((addr_t)intparm);
  1048. buffer->state = BUF_STATE_PROCESSED;
  1049. }
  1050. if (channel == &card->data)
  1051. return;
  1052. if (channel == &card->read &&
  1053. channel->state == CH_STATE_UP)
  1054. qeth_issue_next_read(card);
  1055. iob = channel->iob;
  1056. index = channel->buf_no;
  1057. while (iob[index].state == BUF_STATE_PROCESSED) {
  1058. if (iob[index].callback != NULL)
  1059. iob[index].callback(channel, iob + index);
  1060. index = (index + 1) % QETH_CMD_BUFFER_NO;
  1061. }
  1062. channel->buf_no = index;
  1063. out:
  1064. wake_up(&card->wait_q);
  1065. return;
  1066. }
  1067. static void qeth_notify_skbs(struct qeth_qdio_out_q *q,
  1068. struct qeth_qdio_out_buffer *buf,
  1069. enum iucv_tx_notify notification)
  1070. {
  1071. struct sk_buff *skb;
  1072. if (skb_queue_empty(&buf->skb_list))
  1073. goto out;
  1074. skb = skb_peek(&buf->skb_list);
  1075. while (skb) {
  1076. QETH_CARD_TEXT_(q->card, 5, "skbn%d", notification);
  1077. QETH_CARD_TEXT_(q->card, 5, "%lx", (long) skb);
  1078. if (skb->protocol == ETH_P_AF_IUCV) {
  1079. if (skb->sk) {
  1080. struct iucv_sock *iucv = iucv_sk(skb->sk);
  1081. iucv->sk_txnotify(skb, notification);
  1082. }
  1083. }
  1084. if (skb_queue_is_last(&buf->skb_list, skb))
  1085. skb = NULL;
  1086. else
  1087. skb = skb_queue_next(&buf->skb_list, skb);
  1088. }
  1089. out:
  1090. return;
  1091. }
  1092. static void qeth_release_skbs(struct qeth_qdio_out_buffer *buf)
  1093. {
  1094. struct sk_buff *skb;
  1095. struct iucv_sock *iucv;
  1096. int notify_general_error = 0;
  1097. if (atomic_read(&buf->state) == QETH_QDIO_BUF_PENDING)
  1098. notify_general_error = 1;
  1099. /* release may never happen from within CQ tasklet scope */
  1100. WARN_ON_ONCE(atomic_read(&buf->state) == QETH_QDIO_BUF_IN_CQ);
  1101. skb = skb_dequeue(&buf->skb_list);
  1102. while (skb) {
  1103. QETH_CARD_TEXT(buf->q->card, 5, "skbr");
  1104. QETH_CARD_TEXT_(buf->q->card, 5, "%lx", (long) skb);
  1105. if (notify_general_error && skb->protocol == ETH_P_AF_IUCV) {
  1106. if (skb->sk) {
  1107. iucv = iucv_sk(skb->sk);
  1108. iucv->sk_txnotify(skb, TX_NOTIFY_GENERALERROR);
  1109. }
  1110. }
  1111. atomic_dec(&skb->users);
  1112. dev_kfree_skb_any(skb);
  1113. skb = skb_dequeue(&buf->skb_list);
  1114. }
  1115. }
  1116. static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue,
  1117. struct qeth_qdio_out_buffer *buf,
  1118. enum qeth_qdio_buffer_states newbufstate)
  1119. {
  1120. int i;
  1121. /* is PCI flag set on buffer? */
  1122. if (buf->buffer->element[0].sflags & SBAL_SFLAGS0_PCI_REQ)
  1123. atomic_dec(&queue->set_pci_flags_count);
  1124. if (newbufstate == QETH_QDIO_BUF_EMPTY) {
  1125. qeth_release_skbs(buf);
  1126. }
  1127. for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(queue->card); ++i) {
  1128. if (buf->buffer->element[i].addr && buf->is_header[i])
  1129. kmem_cache_free(qeth_core_header_cache,
  1130. buf->buffer->element[i].addr);
  1131. buf->is_header[i] = 0;
  1132. buf->buffer->element[i].length = 0;
  1133. buf->buffer->element[i].addr = NULL;
  1134. buf->buffer->element[i].eflags = 0;
  1135. buf->buffer->element[i].sflags = 0;
  1136. }
  1137. buf->buffer->element[15].eflags = 0;
  1138. buf->buffer->element[15].sflags = 0;
  1139. buf->next_element_to_fill = 0;
  1140. atomic_set(&buf->state, newbufstate);
  1141. }
  1142. static void qeth_clear_outq_buffers(struct qeth_qdio_out_q *q, int free)
  1143. {
  1144. int j;
  1145. for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
  1146. if (!q->bufs[j])
  1147. continue;
  1148. qeth_cleanup_handled_pending(q, j, 1);
  1149. qeth_clear_output_buffer(q, q->bufs[j], QETH_QDIO_BUF_EMPTY);
  1150. if (free) {
  1151. kmem_cache_free(qeth_qdio_outbuf_cache, q->bufs[j]);
  1152. q->bufs[j] = NULL;
  1153. }
  1154. }
  1155. }
  1156. void qeth_clear_qdio_buffers(struct qeth_card *card)
  1157. {
  1158. int i;
  1159. QETH_CARD_TEXT(card, 2, "clearqdbf");
  1160. /* clear outbound buffers to free skbs */
  1161. for (i = 0; i < card->qdio.no_out_queues; ++i) {
  1162. if (card->qdio.out_qs[i]) {
  1163. qeth_clear_outq_buffers(card->qdio.out_qs[i], 0);
  1164. }
  1165. }
  1166. }
  1167. EXPORT_SYMBOL_GPL(qeth_clear_qdio_buffers);
  1168. static void qeth_free_buffer_pool(struct qeth_card *card)
  1169. {
  1170. struct qeth_buffer_pool_entry *pool_entry, *tmp;
  1171. int i = 0;
  1172. list_for_each_entry_safe(pool_entry, tmp,
  1173. &card->qdio.init_pool.entry_list, init_list){
  1174. for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i)
  1175. free_page((unsigned long)pool_entry->elements[i]);
  1176. list_del(&pool_entry->init_list);
  1177. kfree(pool_entry);
  1178. }
  1179. }
  1180. static void qeth_clean_channel(struct qeth_channel *channel)
  1181. {
  1182. int cnt;
  1183. QETH_DBF_TEXT(SETUP, 2, "freech");
  1184. for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
  1185. kfree(channel->iob[cnt].data);
  1186. }
  1187. static void qeth_set_single_write_queues(struct qeth_card *card)
  1188. {
  1189. if ((atomic_read(&card->qdio.state) != QETH_QDIO_UNINITIALIZED) &&
  1190. (card->qdio.no_out_queues == 4))
  1191. qeth_free_qdio_buffers(card);
  1192. card->qdio.no_out_queues = 1;
  1193. if (card->qdio.default_out_queue != 0)
  1194. dev_info(&card->gdev->dev, "Priority Queueing not supported\n");
  1195. card->qdio.default_out_queue = 0;
  1196. }
  1197. static void qeth_set_multiple_write_queues(struct qeth_card *card)
  1198. {
  1199. if ((atomic_read(&card->qdio.state) != QETH_QDIO_UNINITIALIZED) &&
  1200. (card->qdio.no_out_queues == 1)) {
  1201. qeth_free_qdio_buffers(card);
  1202. card->qdio.default_out_queue = 2;
  1203. }
  1204. card->qdio.no_out_queues = 4;
  1205. }
  1206. static void qeth_update_from_chp_desc(struct qeth_card *card)
  1207. {
  1208. struct ccw_device *ccwdev;
  1209. struct channel_path_desc *chp_dsc;
  1210. QETH_DBF_TEXT(SETUP, 2, "chp_desc");
  1211. ccwdev = card->data.ccwdev;
  1212. chp_dsc = ccw_device_get_chp_desc(ccwdev, 0);
  1213. if (!chp_dsc)
  1214. goto out;
  1215. card->info.func_level = 0x4100 + chp_dsc->desc;
  1216. if (card->info.type == QETH_CARD_TYPE_IQD)
  1217. goto out;
  1218. /* CHPP field bit 6 == 1 -> single queue */
  1219. if ((chp_dsc->chpp & 0x02) == 0x02)
  1220. qeth_set_single_write_queues(card);
  1221. else
  1222. qeth_set_multiple_write_queues(card);
  1223. out:
  1224. kfree(chp_dsc);
  1225. QETH_DBF_TEXT_(SETUP, 2, "nr:%x", card->qdio.no_out_queues);
  1226. QETH_DBF_TEXT_(SETUP, 2, "lvl:%02x", card->info.func_level);
  1227. }
  1228. static void qeth_init_qdio_info(struct qeth_card *card)
  1229. {
  1230. QETH_DBF_TEXT(SETUP, 4, "intqdinf");
  1231. atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
  1232. /* inbound */
  1233. card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
  1234. if (card->info.type == QETH_CARD_TYPE_IQD)
  1235. card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_HSDEFAULT;
  1236. else
  1237. card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_DEFAULT;
  1238. card->qdio.in_buf_pool.buf_count = card->qdio.init_pool.buf_count;
  1239. INIT_LIST_HEAD(&card->qdio.in_buf_pool.entry_list);
  1240. INIT_LIST_HEAD(&card->qdio.init_pool.entry_list);
  1241. }
  1242. static void qeth_set_intial_options(struct qeth_card *card)
  1243. {
  1244. card->options.route4.type = NO_ROUTER;
  1245. card->options.route6.type = NO_ROUTER;
  1246. card->options.fake_broadcast = 0;
  1247. card->options.add_hhlen = DEFAULT_ADD_HHLEN;
  1248. card->options.performance_stats = 0;
  1249. card->options.rx_sg_cb = QETH_RX_SG_CB;
  1250. card->options.isolation = ISOLATION_MODE_NONE;
  1251. card->options.cq = QETH_CQ_DISABLED;
  1252. }
  1253. static int qeth_do_start_thread(struct qeth_card *card, unsigned long thread)
  1254. {
  1255. unsigned long flags;
  1256. int rc = 0;
  1257. spin_lock_irqsave(&card->thread_mask_lock, flags);
  1258. QETH_CARD_TEXT_(card, 4, " %02x%02x%02x",
  1259. (u8) card->thread_start_mask,
  1260. (u8) card->thread_allowed_mask,
  1261. (u8) card->thread_running_mask);
  1262. rc = (card->thread_start_mask & thread);
  1263. spin_unlock_irqrestore(&card->thread_mask_lock, flags);
  1264. return rc;
  1265. }
  1266. static void qeth_start_kernel_thread(struct work_struct *work)
  1267. {
  1268. struct task_struct *ts;
  1269. struct qeth_card *card = container_of(work, struct qeth_card,
  1270. kernel_thread_starter);
  1271. QETH_CARD_TEXT(card , 2, "strthrd");
  1272. if (card->read.state != CH_STATE_UP &&
  1273. card->write.state != CH_STATE_UP)
  1274. return;
  1275. if (qeth_do_start_thread(card, QETH_RECOVER_THREAD)) {
  1276. ts = kthread_run(card->discipline->recover, (void *)card,
  1277. "qeth_recover");
  1278. if (IS_ERR(ts)) {
  1279. qeth_clear_thread_start_bit(card, QETH_RECOVER_THREAD);
  1280. qeth_clear_thread_running_bit(card,
  1281. QETH_RECOVER_THREAD);
  1282. }
  1283. }
  1284. }
  1285. static void qeth_buffer_reclaim_work(struct work_struct *);
  1286. static int qeth_setup_card(struct qeth_card *card)
  1287. {
  1288. QETH_DBF_TEXT(SETUP, 2, "setupcrd");
  1289. QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
  1290. card->read.state = CH_STATE_DOWN;
  1291. card->write.state = CH_STATE_DOWN;
  1292. card->data.state = CH_STATE_DOWN;
  1293. card->state = CARD_STATE_DOWN;
  1294. card->lan_online = 0;
  1295. card->read_or_write_problem = 0;
  1296. card->dev = NULL;
  1297. spin_lock_init(&card->vlanlock);
  1298. spin_lock_init(&card->mclock);
  1299. spin_lock_init(&card->lock);
  1300. spin_lock_init(&card->ip_lock);
  1301. spin_lock_init(&card->thread_mask_lock);
  1302. mutex_init(&card->conf_mutex);
  1303. mutex_init(&card->discipline_mutex);
  1304. card->thread_start_mask = 0;
  1305. card->thread_allowed_mask = 0;
  1306. card->thread_running_mask = 0;
  1307. INIT_WORK(&card->kernel_thread_starter, qeth_start_kernel_thread);
  1308. INIT_LIST_HEAD(&card->ip_list);
  1309. INIT_LIST_HEAD(card->ip_tbd_list);
  1310. INIT_LIST_HEAD(&card->cmd_waiter_list);
  1311. init_waitqueue_head(&card->wait_q);
  1312. /* initial options */
  1313. qeth_set_intial_options(card);
  1314. /* IP address takeover */
  1315. INIT_LIST_HEAD(&card->ipato.entries);
  1316. card->ipato.enabled = 0;
  1317. card->ipato.invert4 = 0;
  1318. card->ipato.invert6 = 0;
  1319. /* init QDIO stuff */
  1320. qeth_init_qdio_info(card);
  1321. INIT_DELAYED_WORK(&card->buffer_reclaim_work, qeth_buffer_reclaim_work);
  1322. INIT_WORK(&card->close_dev_work, qeth_close_dev_handler);
  1323. return 0;
  1324. }
  1325. static void qeth_core_sl_print(struct seq_file *m, struct service_level *slr)
  1326. {
  1327. struct qeth_card *card = container_of(slr, struct qeth_card,
  1328. qeth_service_level);
  1329. if (card->info.mcl_level[0])
  1330. seq_printf(m, "qeth: %s firmware level %s\n",
  1331. CARD_BUS_ID(card), card->info.mcl_level);
  1332. }
  1333. static struct qeth_card *qeth_alloc_card(void)
  1334. {
  1335. struct qeth_card *card;
  1336. QETH_DBF_TEXT(SETUP, 2, "alloccrd");
  1337. card = kzalloc(sizeof(struct qeth_card), GFP_DMA|GFP_KERNEL);
  1338. if (!card)
  1339. goto out;
  1340. QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
  1341. card->ip_tbd_list = kzalloc(sizeof(struct list_head), GFP_KERNEL);
  1342. if (!card->ip_tbd_list) {
  1343. QETH_DBF_TEXT(SETUP, 0, "iptbdnom");
  1344. goto out_card;
  1345. }
  1346. if (qeth_setup_channel(&card->read))
  1347. goto out_ip;
  1348. if (qeth_setup_channel(&card->write))
  1349. goto out_channel;
  1350. card->options.layer2 = -1;
  1351. card->qeth_service_level.seq_print = qeth_core_sl_print;
  1352. register_service_level(&card->qeth_service_level);
  1353. return card;
  1354. out_channel:
  1355. qeth_clean_channel(&card->read);
  1356. out_ip:
  1357. kfree(card->ip_tbd_list);
  1358. out_card:
  1359. kfree(card);
  1360. out:
  1361. return NULL;
  1362. }
  1363. static int qeth_determine_card_type(struct qeth_card *card)
  1364. {
  1365. int i = 0;
  1366. QETH_DBF_TEXT(SETUP, 2, "detcdtyp");
  1367. card->qdio.do_prio_queueing = QETH_PRIOQ_DEFAULT;
  1368. card->qdio.default_out_queue = QETH_DEFAULT_QUEUE;
  1369. while (known_devices[i][QETH_DEV_MODEL_IND]) {
  1370. if ((CARD_RDEV(card)->id.dev_type ==
  1371. known_devices[i][QETH_DEV_TYPE_IND]) &&
  1372. (CARD_RDEV(card)->id.dev_model ==
  1373. known_devices[i][QETH_DEV_MODEL_IND])) {
  1374. card->info.type = known_devices[i][QETH_DEV_MODEL_IND];
  1375. card->qdio.no_out_queues =
  1376. known_devices[i][QETH_QUEUE_NO_IND];
  1377. card->qdio.no_in_queues = 1;
  1378. card->info.is_multicast_different =
  1379. known_devices[i][QETH_MULTICAST_IND];
  1380. qeth_update_from_chp_desc(card);
  1381. return 0;
  1382. }
  1383. i++;
  1384. }
  1385. card->info.type = QETH_CARD_TYPE_UNKNOWN;
  1386. dev_err(&card->gdev->dev, "The adapter hardware is of an "
  1387. "unknown type\n");
  1388. return -ENOENT;
  1389. }
  1390. static int qeth_clear_channel(struct qeth_channel *channel)
  1391. {
  1392. unsigned long flags;
  1393. struct qeth_card *card;
  1394. int rc;
  1395. card = CARD_FROM_CDEV(channel->ccwdev);
  1396. QETH_CARD_TEXT(card, 3, "clearch");
  1397. spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
  1398. rc = ccw_device_clear(channel->ccwdev, QETH_CLEAR_CHANNEL_PARM);
  1399. spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
  1400. if (rc)
  1401. return rc;
  1402. rc = wait_event_interruptible_timeout(card->wait_q,
  1403. channel->state == CH_STATE_STOPPED, QETH_TIMEOUT);
  1404. if (rc == -ERESTARTSYS)
  1405. return rc;
  1406. if (channel->state != CH_STATE_STOPPED)
  1407. return -ETIME;
  1408. channel->state = CH_STATE_DOWN;
  1409. return 0;
  1410. }
  1411. static int qeth_halt_channel(struct qeth_channel *channel)
  1412. {
  1413. unsigned long flags;
  1414. struct qeth_card *card;
  1415. int rc;
  1416. card = CARD_FROM_CDEV(channel->ccwdev);
  1417. QETH_CARD_TEXT(card, 3, "haltch");
  1418. spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
  1419. rc = ccw_device_halt(channel->ccwdev, QETH_HALT_CHANNEL_PARM);
  1420. spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
  1421. if (rc)
  1422. return rc;
  1423. rc = wait_event_interruptible_timeout(card->wait_q,
  1424. channel->state == CH_STATE_HALTED, QETH_TIMEOUT);
  1425. if (rc == -ERESTARTSYS)
  1426. return rc;
  1427. if (channel->state != CH_STATE_HALTED)
  1428. return -ETIME;
  1429. return 0;
  1430. }
  1431. static int qeth_halt_channels(struct qeth_card *card)
  1432. {
  1433. int rc1 = 0, rc2 = 0, rc3 = 0;
  1434. QETH_CARD_TEXT(card, 3, "haltchs");
  1435. rc1 = qeth_halt_channel(&card->read);
  1436. rc2 = qeth_halt_channel(&card->write);
  1437. rc3 = qeth_halt_channel(&card->data);
  1438. if (rc1)
  1439. return rc1;
  1440. if (rc2)
  1441. return rc2;
  1442. return rc3;
  1443. }
  1444. static int qeth_clear_channels(struct qeth_card *card)
  1445. {
  1446. int rc1 = 0, rc2 = 0, rc3 = 0;
  1447. QETH_CARD_TEXT(card, 3, "clearchs");
  1448. rc1 = qeth_clear_channel(&card->read);
  1449. rc2 = qeth_clear_channel(&card->write);
  1450. rc3 = qeth_clear_channel(&card->data);
  1451. if (rc1)
  1452. return rc1;
  1453. if (rc2)
  1454. return rc2;
  1455. return rc3;
  1456. }
  1457. static int qeth_clear_halt_card(struct qeth_card *card, int halt)
  1458. {
  1459. int rc = 0;
  1460. QETH_CARD_TEXT(card, 3, "clhacrd");
  1461. if (halt)
  1462. rc = qeth_halt_channels(card);
  1463. if (rc)
  1464. return rc;
  1465. return qeth_clear_channels(card);
  1466. }
  1467. int qeth_qdio_clear_card(struct qeth_card *card, int use_halt)
  1468. {
  1469. int rc = 0;
  1470. QETH_CARD_TEXT(card, 3, "qdioclr");
  1471. switch (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ESTABLISHED,
  1472. QETH_QDIO_CLEANING)) {
  1473. case QETH_QDIO_ESTABLISHED:
  1474. if (card->info.type == QETH_CARD_TYPE_IQD)
  1475. rc = qdio_shutdown(CARD_DDEV(card),
  1476. QDIO_FLAG_CLEANUP_USING_HALT);
  1477. else
  1478. rc = qdio_shutdown(CARD_DDEV(card),
  1479. QDIO_FLAG_CLEANUP_USING_CLEAR);
  1480. if (rc)
  1481. QETH_CARD_TEXT_(card, 3, "1err%d", rc);
  1482. atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
  1483. break;
  1484. case QETH_QDIO_CLEANING:
  1485. return rc;
  1486. default:
  1487. break;
  1488. }
  1489. rc = qeth_clear_halt_card(card, use_halt);
  1490. if (rc)
  1491. QETH_CARD_TEXT_(card, 3, "2err%d", rc);
  1492. card->state = CARD_STATE_DOWN;
  1493. return rc;
  1494. }
  1495. EXPORT_SYMBOL_GPL(qeth_qdio_clear_card);
  1496. static int qeth_read_conf_data(struct qeth_card *card, void **buffer,
  1497. int *length)
  1498. {
  1499. struct ciw *ciw;
  1500. char *rcd_buf;
  1501. int ret;
  1502. struct qeth_channel *channel = &card->data;
  1503. unsigned long flags;
  1504. /*
  1505. * scan for RCD command in extended SenseID data
  1506. */
  1507. ciw = ccw_device_get_ciw(channel->ccwdev, CIW_TYPE_RCD);
  1508. if (!ciw || ciw->cmd == 0)
  1509. return -EOPNOTSUPP;
  1510. rcd_buf = kzalloc(ciw->count, GFP_KERNEL | GFP_DMA);
  1511. if (!rcd_buf)
  1512. return -ENOMEM;
  1513. channel->ccw.cmd_code = ciw->cmd;
  1514. channel->ccw.cda = (__u32) __pa(rcd_buf);
  1515. channel->ccw.count = ciw->count;
  1516. channel->ccw.flags = CCW_FLAG_SLI;
  1517. channel->state = CH_STATE_RCD;
  1518. spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
  1519. ret = ccw_device_start_timeout(channel->ccwdev, &channel->ccw,
  1520. QETH_RCD_PARM, LPM_ANYPATH, 0,
  1521. QETH_RCD_TIMEOUT);
  1522. spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
  1523. if (!ret)
  1524. wait_event(card->wait_q,
  1525. (channel->state == CH_STATE_RCD_DONE ||
  1526. channel->state == CH_STATE_DOWN));
  1527. if (channel->state == CH_STATE_DOWN)
  1528. ret = -EIO;
  1529. else
  1530. channel->state = CH_STATE_DOWN;
  1531. if (ret) {
  1532. kfree(rcd_buf);
  1533. *buffer = NULL;
  1534. *length = 0;
  1535. } else {
  1536. *length = ciw->count;
  1537. *buffer = rcd_buf;
  1538. }
  1539. return ret;
  1540. }
  1541. static void qeth_configure_unitaddr(struct qeth_card *card, char *prcd)
  1542. {
  1543. QETH_DBF_TEXT(SETUP, 2, "cfgunit");
  1544. card->info.chpid = prcd[30];
  1545. card->info.unit_addr2 = prcd[31];
  1546. card->info.cula = prcd[63];
  1547. card->info.guestlan = ((prcd[0x10] == _ascebc['V']) &&
  1548. (prcd[0x11] == _ascebc['M']));
  1549. }
  1550. static void qeth_configure_blkt_default(struct qeth_card *card, char *prcd)
  1551. {
  1552. QETH_DBF_TEXT(SETUP, 2, "cfgblkt");
  1553. if (prcd[74] == 0xF0 && prcd[75] == 0xF0 &&
  1554. prcd[76] >= 0xF1 && prcd[76] <= 0xF4) {
  1555. card->info.blkt.time_total = 0;
  1556. card->info.blkt.inter_packet = 0;
  1557. card->info.blkt.inter_packet_jumbo = 0;
  1558. } else {
  1559. card->info.blkt.time_total = 250;
  1560. card->info.blkt.inter_packet = 5;
  1561. card->info.blkt.inter_packet_jumbo = 15;
  1562. }
  1563. }
  1564. static void qeth_init_tokens(struct qeth_card *card)
  1565. {
  1566. card->token.issuer_rm_w = 0x00010103UL;
  1567. card->token.cm_filter_w = 0x00010108UL;
  1568. card->token.cm_connection_w = 0x0001010aUL;
  1569. card->token.ulp_filter_w = 0x0001010bUL;
  1570. card->token.ulp_connection_w = 0x0001010dUL;
  1571. }
  1572. static void qeth_init_func_level(struct qeth_card *card)
  1573. {
  1574. switch (card->info.type) {
  1575. case QETH_CARD_TYPE_IQD:
  1576. card->info.func_level = QETH_IDX_FUNC_LEVEL_IQD;
  1577. break;
  1578. case QETH_CARD_TYPE_OSD:
  1579. case QETH_CARD_TYPE_OSN:
  1580. card->info.func_level = QETH_IDX_FUNC_LEVEL_OSD;
  1581. break;
  1582. default:
  1583. break;
  1584. }
  1585. }
  1586. static int qeth_idx_activate_get_answer(struct qeth_channel *channel,
  1587. void (*idx_reply_cb)(struct qeth_channel *,
  1588. struct qeth_cmd_buffer *))
  1589. {
  1590. struct qeth_cmd_buffer *iob;
  1591. unsigned long flags;
  1592. int rc;
  1593. struct qeth_card *card;
  1594. QETH_DBF_TEXT(SETUP, 2, "idxanswr");
  1595. card = CARD_FROM_CDEV(channel->ccwdev);
  1596. iob = qeth_get_buffer(channel);
  1597. if (!iob)
  1598. return -ENOMEM;
  1599. iob->callback = idx_reply_cb;
  1600. memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1));
  1601. channel->ccw.count = QETH_BUFSIZE;
  1602. channel->ccw.cda = (__u32) __pa(iob->data);
  1603. wait_event(card->wait_q,
  1604. atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
  1605. QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
  1606. spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
  1607. rc = ccw_device_start(channel->ccwdev,
  1608. &channel->ccw, (addr_t) iob, 0, 0);
  1609. spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
  1610. if (rc) {
  1611. QETH_DBF_MESSAGE(2, "Error2 in activating channel rc=%d\n", rc);
  1612. QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
  1613. atomic_set(&channel->irq_pending, 0);
  1614. wake_up(&card->wait_q);
  1615. return rc;
  1616. }
  1617. rc = wait_event_interruptible_timeout(card->wait_q,
  1618. channel->state == CH_STATE_UP, QETH_TIMEOUT);
  1619. if (rc == -ERESTARTSYS)
  1620. return rc;
  1621. if (channel->state != CH_STATE_UP) {
  1622. rc = -ETIME;
  1623. QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
  1624. qeth_clear_cmd_buffers(channel);
  1625. } else
  1626. rc = 0;
  1627. return rc;
  1628. }
  1629. static int qeth_idx_activate_channel(struct qeth_channel *channel,
  1630. void (*idx_reply_cb)(struct qeth_channel *,
  1631. struct qeth_cmd_buffer *))
  1632. {
  1633. struct qeth_card *card;
  1634. struct qeth_cmd_buffer *iob;
  1635. unsigned long flags;
  1636. __u16 temp;
  1637. __u8 tmp;
  1638. int rc;
  1639. struct ccw_dev_id temp_devid;
  1640. card = CARD_FROM_CDEV(channel->ccwdev);
  1641. QETH_DBF_TEXT(SETUP, 2, "idxactch");
  1642. iob = qeth_get_buffer(channel);
  1643. if (!iob)
  1644. return -ENOMEM;
  1645. iob->callback = idx_reply_cb;
  1646. memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1));
  1647. channel->ccw.count = IDX_ACTIVATE_SIZE;
  1648. channel->ccw.cda = (__u32) __pa(iob->data);
  1649. if (channel == &card->write) {
  1650. memcpy(iob->data, IDX_ACTIVATE_WRITE, IDX_ACTIVATE_SIZE);
  1651. memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
  1652. &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
  1653. card->seqno.trans_hdr++;
  1654. } else {
  1655. memcpy(iob->data, IDX_ACTIVATE_READ, IDX_ACTIVATE_SIZE);
  1656. memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
  1657. &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
  1658. }
  1659. tmp = ((__u8)card->info.portno) | 0x80;
  1660. memcpy(QETH_IDX_ACT_PNO(iob->data), &tmp, 1);
  1661. memcpy(QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
  1662. &card->token.issuer_rm_w, QETH_MPC_TOKEN_LENGTH);
  1663. memcpy(QETH_IDX_ACT_FUNC_LEVEL(iob->data),
  1664. &card->info.func_level, sizeof(__u16));
  1665. ccw_device_get_id(CARD_DDEV(card), &temp_devid);
  1666. memcpy(QETH_IDX_ACT_QDIO_DEV_CUA(iob->data), &temp_devid.devno, 2);
  1667. temp = (card->info.cula << 8) + card->info.unit_addr2;
  1668. memcpy(QETH_IDX_ACT_QDIO_DEV_REALADDR(iob->data), &temp, 2);
  1669. wait_event(card->wait_q,
  1670. atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
  1671. QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
  1672. spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
  1673. rc = ccw_device_start(channel->ccwdev,
  1674. &channel->ccw, (addr_t) iob, 0, 0);
  1675. spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
  1676. if (rc) {
  1677. QETH_DBF_MESSAGE(2, "Error1 in activating channel. rc=%d\n",
  1678. rc);
  1679. QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
  1680. atomic_set(&channel->irq_pending, 0);
  1681. wake_up(&card->wait_q);
  1682. return rc;
  1683. }
  1684. rc = wait_event_interruptible_timeout(card->wait_q,
  1685. channel->state == CH_STATE_ACTIVATING, QETH_TIMEOUT);
  1686. if (rc == -ERESTARTSYS)
  1687. return rc;
  1688. if (channel->state != CH_STATE_ACTIVATING) {
  1689. dev_warn(&channel->ccwdev->dev, "The qeth device driver"
  1690. " failed to recover an error on the device\n");
  1691. QETH_DBF_MESSAGE(2, "%s IDX activate timed out\n",
  1692. dev_name(&channel->ccwdev->dev));
  1693. QETH_DBF_TEXT_(SETUP, 2, "2err%d", -ETIME);
  1694. qeth_clear_cmd_buffers(channel);
  1695. return -ETIME;
  1696. }
  1697. return qeth_idx_activate_get_answer(channel, idx_reply_cb);
  1698. }
  1699. static int qeth_peer_func_level(int level)
  1700. {
  1701. if ((level & 0xff) == 8)
  1702. return (level & 0xff) + 0x400;
  1703. if (((level >> 8) & 3) == 1)
  1704. return (level & 0xff) + 0x200;
  1705. return level;
  1706. }
  1707. static void qeth_idx_write_cb(struct qeth_channel *channel,
  1708. struct qeth_cmd_buffer *iob)
  1709. {
  1710. struct qeth_card *card;
  1711. __u16 temp;
  1712. QETH_DBF_TEXT(SETUP , 2, "idxwrcb");
  1713. if (channel->state == CH_STATE_DOWN) {
  1714. channel->state = CH_STATE_ACTIVATING;
  1715. goto out;
  1716. }
  1717. card = CARD_FROM_CDEV(channel->ccwdev);
  1718. if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
  1719. if (QETH_IDX_ACT_CAUSE_CODE(iob->data) == QETH_IDX_ACT_ERR_EXCL)
  1720. dev_err(&card->write.ccwdev->dev,
  1721. "The adapter is used exclusively by another "
  1722. "host\n");
  1723. else
  1724. QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel:"
  1725. " negative reply\n",
  1726. dev_name(&card->write.ccwdev->dev));
  1727. goto out;
  1728. }
  1729. memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
  1730. if ((temp & ~0x0100) != qeth_peer_func_level(card->info.func_level)) {
  1731. QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel: "
  1732. "function level mismatch (sent: 0x%x, received: "
  1733. "0x%x)\n", dev_name(&card->write.ccwdev->dev),
  1734. card->info.func_level, temp);
  1735. goto out;
  1736. }
  1737. channel->state = CH_STATE_UP;
  1738. out:
  1739. qeth_release_buffer(channel, iob);
  1740. }
  1741. static void qeth_idx_read_cb(struct qeth_channel *channel,
  1742. struct qeth_cmd_buffer *iob)
  1743. {
  1744. struct qeth_card *card;
  1745. __u16 temp;
  1746. QETH_DBF_TEXT(SETUP , 2, "idxrdcb");
  1747. if (channel->state == CH_STATE_DOWN) {
  1748. channel->state = CH_STATE_ACTIVATING;
  1749. goto out;
  1750. }
  1751. card = CARD_FROM_CDEV(channel->ccwdev);
  1752. if (qeth_check_idx_response(card, iob->data))
  1753. goto out;
  1754. if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
  1755. switch (QETH_IDX_ACT_CAUSE_CODE(iob->data)) {
  1756. case QETH_IDX_ACT_ERR_EXCL:
  1757. dev_err(&card->write.ccwdev->dev,
  1758. "The adapter is used exclusively by another "
  1759. "host\n");
  1760. break;
  1761. case QETH_IDX_ACT_ERR_AUTH:
  1762. case QETH_IDX_ACT_ERR_AUTH_USER:
  1763. dev_err(&card->read.ccwdev->dev,
  1764. "Setting the device online failed because of "
  1765. "insufficient authorization\n");
  1766. break;
  1767. default:
  1768. QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel:"
  1769. " negative reply\n",
  1770. dev_name(&card->read.ccwdev->dev));
  1771. }
  1772. QETH_CARD_TEXT_(card, 2, "idxread%c",
  1773. QETH_IDX_ACT_CAUSE_CODE(iob->data));
  1774. goto out;
  1775. }
  1776. /**
  1777. * * temporary fix for microcode bug
  1778. * * to revert it,replace OR by AND
  1779. * */
  1780. if ((!QETH_IDX_NO_PORTNAME_REQUIRED(iob->data)) ||
  1781. (card->info.type == QETH_CARD_TYPE_OSD))
  1782. card->info.portname_required = 1;
  1783. memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
  1784. if (temp != qeth_peer_func_level(card->info.func_level)) {
  1785. QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel: function "
  1786. "level mismatch (sent: 0x%x, received: 0x%x)\n",
  1787. dev_name(&card->read.ccwdev->dev),
  1788. card->info.func_level, temp);
  1789. goto out;
  1790. }
  1791. memcpy(&card->token.issuer_rm_r,
  1792. QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
  1793. QETH_MPC_TOKEN_LENGTH);
  1794. memcpy(&card->info.mcl_level[0],
  1795. QETH_IDX_REPLY_LEVEL(iob->data), QETH_MCL_LENGTH);
  1796. channel->state = CH_STATE_UP;
  1797. out:
  1798. qeth_release_buffer(channel, iob);
  1799. }
  1800. void qeth_prepare_control_data(struct qeth_card *card, int len,
  1801. struct qeth_cmd_buffer *iob)
  1802. {
  1803. qeth_setup_ccw(&card->write, iob->data, len);
  1804. iob->callback = qeth_release_buffer;
  1805. memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
  1806. &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
  1807. card->seqno.trans_hdr++;
  1808. memcpy(QETH_PDU_HEADER_SEQ_NO(iob->data),
  1809. &card->seqno.pdu_hdr, QETH_SEQ_NO_LENGTH);
  1810. card->seqno.pdu_hdr++;
  1811. memcpy(QETH_PDU_HEADER_ACK_SEQ_NO(iob->data),
  1812. &card->seqno.pdu_hdr_ack, QETH_SEQ_NO_LENGTH);
  1813. QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN);
  1814. }
  1815. EXPORT_SYMBOL_GPL(qeth_prepare_control_data);
  1816. /**
  1817. * qeth_send_control_data() - send control command to the card
  1818. * @card: qeth_card structure pointer
  1819. * @len: size of the command buffer
  1820. * @iob: qeth_cmd_buffer pointer
  1821. * @reply_cb: callback function pointer
  1822. * @cb_card: pointer to the qeth_card structure
  1823. * @cb_reply: pointer to the qeth_reply structure
  1824. * @cb_cmd: pointer to the original iob for non-IPA
  1825. * commands, or to the qeth_ipa_cmd structure
  1826. * for the IPA commands.
  1827. * @reply_param: private pointer passed to the callback
  1828. *
  1829. * Returns the value of the `return_code' field of the response
  1830. * block returned from the hardware, or other error indication.
  1831. * Value of zero indicates successful execution of the command.
  1832. *
  1833. * Callback function gets called one or more times, with cb_cmd
  1834. * pointing to the response returned by the hardware. Callback
  1835. * function must return non-zero if more reply blocks are expected,
  1836. * and zero if the last or only reply block is received. Callback
  1837. * function can get the value of the reply_param pointer from the
  1838. * field 'param' of the structure qeth_reply.
  1839. */
  1840. int qeth_send_control_data(struct qeth_card *card, int len,
  1841. struct qeth_cmd_buffer *iob,
  1842. int (*reply_cb)(struct qeth_card *cb_card,
  1843. struct qeth_reply *cb_reply,
  1844. unsigned long cb_cmd),
  1845. void *reply_param)
  1846. {
  1847. int rc;
  1848. unsigned long flags;
  1849. struct qeth_reply *reply = NULL;
  1850. unsigned long timeout, event_timeout;
  1851. struct qeth_ipa_cmd *cmd;
  1852. QETH_CARD_TEXT(card, 2, "sendctl");
  1853. if (card->read_or_write_problem) {
  1854. qeth_release_buffer(iob->channel, iob);
  1855. return -EIO;
  1856. }
  1857. reply = qeth_alloc_reply(card);
  1858. if (!reply) {
  1859. return -ENOMEM;
  1860. }
  1861. reply->callback = reply_cb;
  1862. reply->param = reply_param;
  1863. if (card->state == CARD_STATE_DOWN)
  1864. reply->seqno = QETH_IDX_COMMAND_SEQNO;
  1865. else
  1866. reply->seqno = card->seqno.ipa++;
  1867. init_waitqueue_head(&reply->wait_q);
  1868. spin_lock_irqsave(&card->lock, flags);
  1869. list_add_tail(&reply->list, &card->cmd_waiter_list);
  1870. spin_unlock_irqrestore(&card->lock, flags);
  1871. QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN);
  1872. while (atomic_cmpxchg(&card->write.irq_pending, 0, 1)) ;
  1873. qeth_prepare_control_data(card, len, iob);
  1874. if (IS_IPA(iob->data))
  1875. event_timeout = QETH_IPA_TIMEOUT;
  1876. else
  1877. event_timeout = QETH_TIMEOUT;
  1878. timeout = jiffies + event_timeout;
  1879. QETH_CARD_TEXT(card, 6, "noirqpnd");
  1880. spin_lock_irqsave(get_ccwdev_lock(card->write.ccwdev), flags);
  1881. rc = ccw_device_start(card->write.ccwdev, &card->write.ccw,
  1882. (addr_t) iob, 0, 0);
  1883. spin_unlock_irqrestore(get_ccwdev_lock(card->write.ccwdev), flags);
  1884. if (rc) {
  1885. QETH_DBF_MESSAGE(2, "%s qeth_send_control_data: "
  1886. "ccw_device_start rc = %i\n",
  1887. dev_name(&card->write.ccwdev->dev), rc);
  1888. QETH_CARD_TEXT_(card, 2, " err%d", rc);
  1889. spin_lock_irqsave(&card->lock, flags);
  1890. list_del_init(&reply->list);
  1891. qeth_put_reply(reply);
  1892. spin_unlock_irqrestore(&card->lock, flags);
  1893. qeth_release_buffer(iob->channel, iob);
  1894. atomic_set(&card->write.irq_pending, 0);
  1895. wake_up(&card->wait_q);
  1896. return rc;
  1897. }
  1898. /* we have only one long running ipassist, since we can ensure
  1899. process context of this command we can sleep */
  1900. cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
  1901. if ((cmd->hdr.command == IPA_CMD_SETIP) &&
  1902. (cmd->hdr.prot_version == QETH_PROT_IPV4)) {
  1903. if (!wait_event_timeout(reply->wait_q,
  1904. atomic_read(&reply->received), event_timeout))
  1905. goto time_err;
  1906. } else {
  1907. while (!atomic_read(&reply->received)) {
  1908. if (time_after(jiffies, timeout))
  1909. goto time_err;
  1910. cpu_relax();
  1911. }
  1912. }
  1913. if (reply->rc == -EIO)
  1914. goto error;
  1915. rc = reply->rc;
  1916. qeth_put_reply(reply);
  1917. return rc;
  1918. time_err:
  1919. reply->rc = -ETIME;
  1920. spin_lock_irqsave(&reply->card->lock, flags);
  1921. list_del_init(&reply->list);
  1922. spin_unlock_irqrestore(&reply->card->lock, flags);
  1923. atomic_inc(&reply->received);
  1924. error:
  1925. atomic_set(&card->write.irq_pending, 0);
  1926. qeth_release_buffer(iob->channel, iob);
  1927. card->write.buf_no = (card->write.buf_no + 1) % QETH_CMD_BUFFER_NO;
  1928. rc = reply->rc;
  1929. qeth_put_reply(reply);
  1930. return rc;
  1931. }
  1932. EXPORT_SYMBOL_GPL(qeth_send_control_data);
  1933. static int qeth_cm_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
  1934. unsigned long data)
  1935. {
  1936. struct qeth_cmd_buffer *iob;
  1937. QETH_DBF_TEXT(SETUP, 2, "cmenblcb");
  1938. iob = (struct qeth_cmd_buffer *) data;
  1939. memcpy(&card->token.cm_filter_r,
  1940. QETH_CM_ENABLE_RESP_FILTER_TOKEN(iob->data),
  1941. QETH_MPC_TOKEN_LENGTH);
  1942. QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
  1943. return 0;
  1944. }
  1945. static int qeth_cm_enable(struct qeth_card *card)
  1946. {
  1947. int rc;
  1948. struct qeth_cmd_buffer *iob;
  1949. QETH_DBF_TEXT(SETUP, 2, "cmenable");
  1950. iob = qeth_wait_for_buffer(&card->write);
  1951. memcpy(iob->data, CM_ENABLE, CM_ENABLE_SIZE);
  1952. memcpy(QETH_CM_ENABLE_ISSUER_RM_TOKEN(iob->data),
  1953. &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
  1954. memcpy(QETH_CM_ENABLE_FILTER_TOKEN(iob->data),
  1955. &card->token.cm_filter_w, QETH_MPC_TOKEN_LENGTH);
  1956. rc = qeth_send_control_data(card, CM_ENABLE_SIZE, iob,
  1957. qeth_cm_enable_cb, NULL);
  1958. return rc;
  1959. }
  1960. static int qeth_cm_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
  1961. unsigned long data)
  1962. {
  1963. struct qeth_cmd_buffer *iob;
  1964. QETH_DBF_TEXT(SETUP, 2, "cmsetpcb");
  1965. iob = (struct qeth_cmd_buffer *) data;
  1966. memcpy(&card->token.cm_connection_r,
  1967. QETH_CM_SETUP_RESP_DEST_ADDR(iob->data),
  1968. QETH_MPC_TOKEN_LENGTH);
  1969. QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
  1970. return 0;
  1971. }
  1972. static int qeth_cm_setup(struct qeth_card *card)
  1973. {
  1974. int rc;
  1975. struct qeth_cmd_buffer *iob;
  1976. QETH_DBF_TEXT(SETUP, 2, "cmsetup");
  1977. iob = qeth_wait_for_buffer(&card->write);
  1978. memcpy(iob->data, CM_SETUP, CM_SETUP_SIZE);
  1979. memcpy(QETH_CM_SETUP_DEST_ADDR(iob->data),
  1980. &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
  1981. memcpy(QETH_CM_SETUP_CONNECTION_TOKEN(iob->data),
  1982. &card->token.cm_connection_w, QETH_MPC_TOKEN_LENGTH);
  1983. memcpy(QETH_CM_SETUP_FILTER_TOKEN(iob->data),
  1984. &card->token.cm_filter_r, QETH_MPC_TOKEN_LENGTH);
  1985. rc = qeth_send_control_data(card, CM_SETUP_SIZE, iob,
  1986. qeth_cm_setup_cb, NULL);
  1987. return rc;
  1988. }
  1989. static inline int qeth_get_initial_mtu_for_card(struct qeth_card *card)
  1990. {
  1991. switch (card->info.type) {
  1992. case QETH_CARD_TYPE_UNKNOWN:
  1993. return 1500;
  1994. case QETH_CARD_TYPE_IQD:
  1995. return card->info.max_mtu;
  1996. case QETH_CARD_TYPE_OSD:
  1997. switch (card->info.link_type) {
  1998. case QETH_LINK_TYPE_HSTR:
  1999. case QETH_LINK_TYPE_LANE_TR:
  2000. return 2000;
  2001. default:
  2002. return card->options.layer2 ? 1500 : 1492;
  2003. }
  2004. case QETH_CARD_TYPE_OSM:
  2005. case QETH_CARD_TYPE_OSX:
  2006. return card->options.layer2 ? 1500 : 1492;
  2007. default:
  2008. return 1500;
  2009. }
  2010. }
  2011. static inline int qeth_get_mtu_outof_framesize(int framesize)
  2012. {
  2013. switch (framesize) {
  2014. case 0x4000:
  2015. return 8192;
  2016. case 0x6000:
  2017. return 16384;
  2018. case 0xa000:
  2019. return 32768;
  2020. case 0xffff:
  2021. return 57344;
  2022. default:
  2023. return 0;
  2024. }
  2025. }
  2026. static inline int qeth_mtu_is_valid(struct qeth_card *card, int mtu)
  2027. {
  2028. switch (card->info.type) {
  2029. case QETH_CARD_TYPE_OSD:
  2030. case QETH_CARD_TYPE_OSM:
  2031. case QETH_CARD_TYPE_OSX:
  2032. case QETH_CARD_TYPE_IQD:
  2033. return ((mtu >= 576) &&
  2034. (mtu <= card->info.max_mtu));
  2035. case QETH_CARD_TYPE_OSN:
  2036. case QETH_CARD_TYPE_UNKNOWN:
  2037. default:
  2038. return 1;
  2039. }
  2040. }
  2041. static int qeth_ulp_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
  2042. unsigned long data)
  2043. {
  2044. __u16 mtu, framesize;
  2045. __u16 len;
  2046. __u8 link_type;
  2047. struct qeth_cmd_buffer *iob;
  2048. QETH_DBF_TEXT(SETUP, 2, "ulpenacb");
  2049. iob = (struct qeth_cmd_buffer *) data;
  2050. memcpy(&card->token.ulp_filter_r,
  2051. QETH_ULP_ENABLE_RESP_FILTER_TOKEN(iob->data),
  2052. QETH_MPC_TOKEN_LENGTH);
  2053. if (card->info.type == QETH_CARD_TYPE_IQD) {
  2054. memcpy(&framesize, QETH_ULP_ENABLE_RESP_MAX_MTU(iob->data), 2);
  2055. mtu = qeth_get_mtu_outof_framesize(framesize);
  2056. if (!mtu) {
  2057. iob->rc = -EINVAL;
  2058. QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
  2059. return 0;
  2060. }
  2061. if (card->info.initial_mtu && (card->info.initial_mtu != mtu)) {
  2062. /* frame size has changed */
  2063. if (card->dev &&
  2064. ((card->dev->mtu == card->info.initial_mtu) ||
  2065. (card->dev->mtu > mtu)))
  2066. card->dev->mtu = mtu;
  2067. qeth_free_qdio_buffers(card);
  2068. }
  2069. card->info.initial_mtu = mtu;
  2070. card->info.max_mtu = mtu;
  2071. card->qdio.in_buf_size = mtu + 2 * PAGE_SIZE;
  2072. } else {
  2073. card->info.max_mtu = *(__u16 *)QETH_ULP_ENABLE_RESP_MAX_MTU(
  2074. iob->data);
  2075. card->info.initial_mtu = min(card->info.max_mtu,
  2076. qeth_get_initial_mtu_for_card(card));
  2077. card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
  2078. }
  2079. memcpy(&len, QETH_ULP_ENABLE_RESP_DIFINFO_LEN(iob->data), 2);
  2080. if (len >= QETH_MPC_DIFINFO_LEN_INDICATES_LINK_TYPE) {
  2081. memcpy(&link_type,
  2082. QETH_ULP_ENABLE_RESP_LINK_TYPE(iob->data), 1);
  2083. card->info.link_type = link_type;
  2084. } else
  2085. card->info.link_type = 0;
  2086. QETH_DBF_TEXT_(SETUP, 2, "link%d", card->info.link_type);
  2087. QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
  2088. return 0;
  2089. }
  2090. static int qeth_ulp_enable(struct qeth_card *card)
  2091. {
  2092. int rc;
  2093. char prot_type;
  2094. struct qeth_cmd_buffer *iob;
  2095. /*FIXME: trace view callbacks*/
  2096. QETH_DBF_TEXT(SETUP, 2, "ulpenabl");
  2097. iob = qeth_wait_for_buffer(&card->write);
  2098. memcpy(iob->data, ULP_ENABLE, ULP_ENABLE_SIZE);
  2099. *(QETH_ULP_ENABLE_LINKNUM(iob->data)) =
  2100. (__u8) card->info.portno;
  2101. if (card->options.layer2)
  2102. if (card->info.type == QETH_CARD_TYPE_OSN)
  2103. prot_type = QETH_PROT_OSN2;
  2104. else
  2105. prot_type = QETH_PROT_LAYER2;
  2106. else
  2107. prot_type = QETH_PROT_TCPIP;
  2108. memcpy(QETH_ULP_ENABLE_PROT_TYPE(iob->data), &prot_type, 1);
  2109. memcpy(QETH_ULP_ENABLE_DEST_ADDR(iob->data),
  2110. &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
  2111. memcpy(QETH_ULP_ENABLE_FILTER_TOKEN(iob->data),
  2112. &card->token.ulp_filter_w, QETH_MPC_TOKEN_LENGTH);
  2113. memcpy(QETH_ULP_ENABLE_PORTNAME_AND_LL(iob->data),
  2114. card->info.portname, 9);
  2115. rc = qeth_send_control_data(card, ULP_ENABLE_SIZE, iob,
  2116. qeth_ulp_enable_cb, NULL);
  2117. return rc;
  2118. }
  2119. static int qeth_ulp_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
  2120. unsigned long data)
  2121. {
  2122. struct qeth_cmd_buffer *iob;
  2123. QETH_DBF_TEXT(SETUP, 2, "ulpstpcb");
  2124. iob = (struct qeth_cmd_buffer *) data;
  2125. memcpy(&card->token.ulp_connection_r,
  2126. QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data),
  2127. QETH_MPC_TOKEN_LENGTH);
  2128. if (!strncmp("00S", QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data),
  2129. 3)) {
  2130. QETH_DBF_TEXT(SETUP, 2, "olmlimit");
  2131. dev_err(&card->gdev->dev, "A connection could not be "
  2132. "established because of an OLM limit\n");
  2133. iob->rc = -EMLINK;
  2134. }
  2135. QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
  2136. return 0;
  2137. }
  2138. static int qeth_ulp_setup(struct qeth_card *card)
  2139. {
  2140. int rc;
  2141. __u16 temp;
  2142. struct qeth_cmd_buffer *iob;
  2143. struct ccw_dev_id dev_id;
  2144. QETH_DBF_TEXT(SETUP, 2, "ulpsetup");
  2145. iob = qeth_wait_for_buffer(&card->write);
  2146. memcpy(iob->data, ULP_SETUP, ULP_SETUP_SIZE);
  2147. memcpy(QETH_ULP_SETUP_DEST_ADDR(iob->data),
  2148. &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
  2149. memcpy(QETH_ULP_SETUP_CONNECTION_TOKEN(iob->data),
  2150. &card->token.ulp_connection_w, QETH_MPC_TOKEN_LENGTH);
  2151. memcpy(QETH_ULP_SETUP_FILTER_TOKEN(iob->data),
  2152. &card->token.ulp_filter_r, QETH_MPC_TOKEN_LENGTH);
  2153. ccw_device_get_id(CARD_DDEV(card), &dev_id);
  2154. memcpy(QETH_ULP_SETUP_CUA(iob->data), &dev_id.devno, 2);
  2155. temp = (card->info.cula << 8) + card->info.unit_addr2;
  2156. memcpy(QETH_ULP_SETUP_REAL_DEVADDR(iob->data), &temp, 2);
  2157. rc = qeth_send_control_data(card, ULP_SETUP_SIZE, iob,
  2158. qeth_ulp_setup_cb, NULL);
  2159. return rc;
  2160. }
  2161. static int qeth_init_qdio_out_buf(struct qeth_qdio_out_q *q, int bidx)
  2162. {
  2163. int rc;
  2164. struct qeth_qdio_out_buffer *newbuf;
  2165. rc = 0;
  2166. newbuf = kmem_cache_zalloc(qeth_qdio_outbuf_cache, GFP_ATOMIC);
  2167. if (!newbuf) {
  2168. rc = -ENOMEM;
  2169. goto out;
  2170. }
  2171. newbuf->buffer = q->qdio_bufs[bidx];
  2172. skb_queue_head_init(&newbuf->skb_list);
  2173. lockdep_set_class(&newbuf->skb_list.lock, &qdio_out_skb_queue_key);
  2174. newbuf->q = q;
  2175. newbuf->aob = NULL;
  2176. newbuf->next_pending = q->bufs[bidx];
  2177. atomic_set(&newbuf->state, QETH_QDIO_BUF_EMPTY);
  2178. q->bufs[bidx] = newbuf;
  2179. if (q->bufstates) {
  2180. q->bufstates[bidx].user = newbuf;
  2181. QETH_CARD_TEXT_(q->card, 2, "nbs%d", bidx);
  2182. QETH_CARD_TEXT_(q->card, 2, "%lx", (long) newbuf);
  2183. QETH_CARD_TEXT_(q->card, 2, "%lx",
  2184. (long) newbuf->next_pending);
  2185. }
  2186. out:
  2187. return rc;
  2188. }
  2189. static void qeth_free_qdio_out_buf(struct qeth_qdio_out_q *q)
  2190. {
  2191. if (!q)
  2192. return;
  2193. qdio_free_buffers(q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q);
  2194. kfree(q);
  2195. }
  2196. static struct qeth_qdio_out_q *qeth_alloc_qdio_out_buf(void)
  2197. {
  2198. struct qeth_qdio_out_q *q = kzalloc(sizeof(*q), GFP_KERNEL);
  2199. if (!q)
  2200. return NULL;
  2201. if (qdio_alloc_buffers(q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q)) {
  2202. kfree(q);
  2203. return NULL;
  2204. }
  2205. return q;
  2206. }
  2207. static int qeth_alloc_qdio_buffers(struct qeth_card *card)
  2208. {
  2209. int i, j;
  2210. QETH_DBF_TEXT(SETUP, 2, "allcqdbf");
  2211. if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED,
  2212. QETH_QDIO_ALLOCATED) != QETH_QDIO_UNINITIALIZED)
  2213. return 0;
  2214. QETH_DBF_TEXT(SETUP, 2, "inq");
  2215. card->qdio.in_q = qeth_alloc_qdio_queue();
  2216. if (!card->qdio.in_q)
  2217. goto out_nomem;
  2218. /* inbound buffer pool */
  2219. if (qeth_alloc_buffer_pool(card))
  2220. goto out_freeinq;
  2221. /* outbound */
  2222. card->qdio.out_qs =
  2223. kzalloc(card->qdio.no_out_queues *
  2224. sizeof(struct qeth_qdio_out_q *), GFP_KERNEL);
  2225. if (!card->qdio.out_qs)
  2226. goto out_freepool;
  2227. for (i = 0; i < card->qdio.no_out_queues; ++i) {
  2228. card->qdio.out_qs[i] = qeth_alloc_qdio_out_buf();
  2229. if (!card->qdio.out_qs[i])
  2230. goto out_freeoutq;
  2231. QETH_DBF_TEXT_(SETUP, 2, "outq %i", i);
  2232. QETH_DBF_HEX(SETUP, 2, &card->qdio.out_qs[i], sizeof(void *));
  2233. card->qdio.out_qs[i]->queue_no = i;
  2234. /* give outbound qeth_qdio_buffers their qdio_buffers */
  2235. for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
  2236. WARN_ON(card->qdio.out_qs[i]->bufs[j] != NULL);
  2237. if (qeth_init_qdio_out_buf(card->qdio.out_qs[i], j))
  2238. goto out_freeoutqbufs;
  2239. }
  2240. }
  2241. /* completion */
  2242. if (qeth_alloc_cq(card))
  2243. goto out_freeoutq;
  2244. return 0;
  2245. out_freeoutqbufs:
  2246. while (j > 0) {
  2247. --j;
  2248. kmem_cache_free(qeth_qdio_outbuf_cache,
  2249. card->qdio.out_qs[i]->bufs[j]);
  2250. card->qdio.out_qs[i]->bufs[j] = NULL;
  2251. }
  2252. out_freeoutq:
  2253. while (i > 0) {
  2254. qeth_free_qdio_out_buf(card->qdio.out_qs[--i]);
  2255. qeth_clear_outq_buffers(card->qdio.out_qs[i], 1);
  2256. }
  2257. kfree(card->qdio.out_qs);
  2258. card->qdio.out_qs = NULL;
  2259. out_freepool:
  2260. qeth_free_buffer_pool(card);
  2261. out_freeinq:
  2262. qeth_free_qdio_queue(card->qdio.in_q);
  2263. card->qdio.in_q = NULL;
  2264. out_nomem:
  2265. atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
  2266. return -ENOMEM;
  2267. }
  2268. static void qeth_free_qdio_buffers(struct qeth_card *card)
  2269. {
  2270. int i, j;
  2271. if (atomic_xchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED) ==
  2272. QETH_QDIO_UNINITIALIZED)
  2273. return;
  2274. qeth_free_cq(card);
  2275. cancel_delayed_work_sync(&card->buffer_reclaim_work);
  2276. for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
  2277. if (card->qdio.in_q->bufs[j].rx_skb)
  2278. dev_kfree_skb_any(card->qdio.in_q->bufs[j].rx_skb);
  2279. }
  2280. qeth_free_qdio_queue(card->qdio.in_q);
  2281. card->qdio.in_q = NULL;
  2282. /* inbound buffer pool */
  2283. qeth_free_buffer_pool(card);
  2284. /* free outbound qdio_qs */
  2285. if (card->qdio.out_qs) {
  2286. for (i = 0; i < card->qdio.no_out_queues; ++i) {
  2287. qeth_clear_outq_buffers(card->qdio.out_qs[i], 1);
  2288. qeth_free_qdio_out_buf(card->qdio.out_qs[i]);
  2289. }
  2290. kfree(card->qdio.out_qs);
  2291. card->qdio.out_qs = NULL;
  2292. }
  2293. }
  2294. static void qeth_create_qib_param_field(struct qeth_card *card,
  2295. char *param_field)
  2296. {
  2297. param_field[0] = _ascebc['P'];
  2298. param_field[1] = _ascebc['C'];
  2299. param_field[2] = _ascebc['I'];
  2300. param_field[3] = _ascebc['T'];
  2301. *((unsigned int *) (&param_field[4])) = QETH_PCI_THRESHOLD_A(card);
  2302. *((unsigned int *) (&param_field[8])) = QETH_PCI_THRESHOLD_B(card);
  2303. *((unsigned int *) (&param_field[12])) = QETH_PCI_TIMER_VALUE(card);
  2304. }
  2305. static void qeth_create_qib_param_field_blkt(struct qeth_card *card,
  2306. char *param_field)
  2307. {
  2308. param_field[16] = _ascebc['B'];
  2309. param_field[17] = _ascebc['L'];
  2310. param_field[18] = _ascebc['K'];
  2311. param_field[19] = _ascebc['T'];
  2312. *((unsigned int *) (&param_field[20])) = card->info.blkt.time_total;
  2313. *((unsigned int *) (&param_field[24])) = card->info.blkt.inter_packet;
  2314. *((unsigned int *) (&param_field[28])) =
  2315. card->info.blkt.inter_packet_jumbo;
  2316. }
  2317. static int qeth_qdio_activate(struct qeth_card *card)
  2318. {
  2319. QETH_DBF_TEXT(SETUP, 3, "qdioact");
  2320. return qdio_activate(CARD_DDEV(card));
  2321. }
  2322. static int qeth_dm_act(struct qeth_card *card)
  2323. {
  2324. int rc;
  2325. struct qeth_cmd_buffer *iob;
  2326. QETH_DBF_TEXT(SETUP, 2, "dmact");
  2327. iob = qeth_wait_for_buffer(&card->write);
  2328. memcpy(iob->data, DM_ACT, DM_ACT_SIZE);
  2329. memcpy(QETH_DM_ACT_DEST_ADDR(iob->data),
  2330. &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
  2331. memcpy(QETH_DM_ACT_CONNECTION_TOKEN(iob->data),
  2332. &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
  2333. rc = qeth_send_control_data(card, DM_ACT_SIZE, iob, NULL, NULL);
  2334. return rc;
  2335. }
  2336. static int qeth_mpc_initialize(struct qeth_card *card)
  2337. {
  2338. int rc;
  2339. QETH_DBF_TEXT(SETUP, 2, "mpcinit");
  2340. rc = qeth_issue_next_read(card);
  2341. if (rc) {
  2342. QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
  2343. return rc;
  2344. }
  2345. rc = qeth_cm_enable(card);
  2346. if (rc) {
  2347. QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
  2348. goto out_qdio;
  2349. }
  2350. rc = qeth_cm_setup(card);
  2351. if (rc) {
  2352. QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
  2353. goto out_qdio;
  2354. }
  2355. rc = qeth_ulp_enable(card);
  2356. if (rc) {
  2357. QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
  2358. goto out_qdio;
  2359. }
  2360. rc = qeth_ulp_setup(card);
  2361. if (rc) {
  2362. QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
  2363. goto out_qdio;
  2364. }
  2365. rc = qeth_alloc_qdio_buffers(card);
  2366. if (rc) {
  2367. QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
  2368. goto out_qdio;
  2369. }
  2370. rc = qeth_qdio_establish(card);
  2371. if (rc) {
  2372. QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
  2373. qeth_free_qdio_buffers(card);
  2374. goto out_qdio;
  2375. }
  2376. rc = qeth_qdio_activate(card);
  2377. if (rc) {
  2378. QETH_DBF_TEXT_(SETUP, 2, "7err%d", rc);
  2379. goto out_qdio;
  2380. }
  2381. rc = qeth_dm_act(card);
  2382. if (rc) {
  2383. QETH_DBF_TEXT_(SETUP, 2, "8err%d", rc);
  2384. goto out_qdio;
  2385. }
  2386. return 0;
  2387. out_qdio:
  2388. qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
  2389. qdio_free(CARD_DDEV(card));
  2390. return rc;
  2391. }
  2392. static void qeth_print_status_with_portname(struct qeth_card *card)
  2393. {
  2394. char dbf_text[15];
  2395. int i;
  2396. sprintf(dbf_text, "%s", card->info.portname + 1);
  2397. for (i = 0; i < 8; i++)
  2398. dbf_text[i] =
  2399. (char) _ebcasc[(__u8) dbf_text[i]];
  2400. dbf_text[8] = 0;
  2401. dev_info(&card->gdev->dev, "Device is a%s card%s%s%s\n"
  2402. "with link type %s (portname: %s)\n",
  2403. qeth_get_cardname(card),
  2404. (card->info.mcl_level[0]) ? " (level: " : "",
  2405. (card->info.mcl_level[0]) ? card->info.mcl_level : "",
  2406. (card->info.mcl_level[0]) ? ")" : "",
  2407. qeth_get_cardname_short(card),
  2408. dbf_text);
  2409. }
  2410. static void qeth_print_status_no_portname(struct qeth_card *card)
  2411. {
  2412. if (card->info.portname[0])
  2413. dev_info(&card->gdev->dev, "Device is a%s "
  2414. "card%s%s%s\nwith link type %s "
  2415. "(no portname needed by interface).\n",
  2416. qeth_get_cardname(card),
  2417. (card->info.mcl_level[0]) ? " (level: " : "",
  2418. (card->info.mcl_level[0]) ? card->info.mcl_level : "",
  2419. (card->info.mcl_level[0]) ? ")" : "",
  2420. qeth_get_cardname_short(card));
  2421. else
  2422. dev_info(&card->gdev->dev, "Device is a%s "
  2423. "card%s%s%s\nwith link type %s.\n",
  2424. qeth_get_cardname(card),
  2425. (card->info.mcl_level[0]) ? " (level: " : "",
  2426. (card->info.mcl_level[0]) ? card->info.mcl_level : "",
  2427. (card->info.mcl_level[0]) ? ")" : "",
  2428. qeth_get_cardname_short(card));
  2429. }
  2430. void qeth_print_status_message(struct qeth_card *card)
  2431. {
  2432. switch (card->info.type) {
  2433. case QETH_CARD_TYPE_OSD:
  2434. case QETH_CARD_TYPE_OSM:
  2435. case QETH_CARD_TYPE_OSX:
  2436. /* VM will use a non-zero first character
  2437. * to indicate a HiperSockets like reporting
  2438. * of the level OSA sets the first character to zero
  2439. * */
  2440. if (!card->info.mcl_level[0]) {
  2441. sprintf(card->info.mcl_level, "%02x%02x",
  2442. card->info.mcl_level[2],
  2443. card->info.mcl_level[3]);
  2444. card->info.mcl_level[QETH_MCL_LENGTH] = 0;
  2445. break;
  2446. }
  2447. /* fallthrough */
  2448. case QETH_CARD_TYPE_IQD:
  2449. if ((card->info.guestlan) ||
  2450. (card->info.mcl_level[0] & 0x80)) {
  2451. card->info.mcl_level[0] = (char) _ebcasc[(__u8)
  2452. card->info.mcl_level[0]];
  2453. card->info.mcl_level[1] = (char) _ebcasc[(__u8)
  2454. card->info.mcl_level[1]];
  2455. card->info.mcl_level[2] = (char) _ebcasc[(__u8)
  2456. card->info.mcl_level[2]];
  2457. card->info.mcl_level[3] = (char) _ebcasc[(__u8)
  2458. card->info.mcl_level[3]];
  2459. card->info.mcl_level[QETH_MCL_LENGTH] = 0;
  2460. }
  2461. break;
  2462. default:
  2463. memset(&card->info.mcl_level[0], 0, QETH_MCL_LENGTH + 1);
  2464. }
  2465. if (card->info.portname_required)
  2466. qeth_print_status_with_portname(card);
  2467. else
  2468. qeth_print_status_no_portname(card);
  2469. }
  2470. EXPORT_SYMBOL_GPL(qeth_print_status_message);
  2471. static void qeth_initialize_working_pool_list(struct qeth_card *card)
  2472. {
  2473. struct qeth_buffer_pool_entry *entry;
  2474. QETH_CARD_TEXT(card, 5, "inwrklst");
  2475. list_for_each_entry(entry,
  2476. &card->qdio.init_pool.entry_list, init_list) {
  2477. qeth_put_buffer_pool_entry(card, entry);
  2478. }
  2479. }
  2480. static inline struct qeth_buffer_pool_entry *qeth_find_free_buffer_pool_entry(
  2481. struct qeth_card *card)
  2482. {
  2483. struct list_head *plh;
  2484. struct qeth_buffer_pool_entry *entry;
  2485. int i, free;
  2486. struct page *page;
  2487. if (list_empty(&card->qdio.in_buf_pool.entry_list))
  2488. return NULL;
  2489. list_for_each(plh, &card->qdio.in_buf_pool.entry_list) {
  2490. entry = list_entry(plh, struct qeth_buffer_pool_entry, list);
  2491. free = 1;
  2492. for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
  2493. if (page_count(virt_to_page(entry->elements[i])) > 1) {
  2494. free = 0;
  2495. break;
  2496. }
  2497. }
  2498. if (free) {
  2499. list_del_init(&entry->list);
  2500. return entry;
  2501. }
  2502. }
  2503. /* no free buffer in pool so take first one and swap pages */
  2504. entry = list_entry(card->qdio.in_buf_pool.entry_list.next,
  2505. struct qeth_buffer_pool_entry, list);
  2506. for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
  2507. if (page_count(virt_to_page(entry->elements[i])) > 1) {
  2508. page = alloc_page(GFP_ATOMIC);
  2509. if (!page) {
  2510. return NULL;
  2511. } else {
  2512. free_page((unsigned long)entry->elements[i]);
  2513. entry->elements[i] = page_address(page);
  2514. if (card->options.performance_stats)
  2515. card->perf_stats.sg_alloc_page_rx++;
  2516. }
  2517. }
  2518. }
  2519. list_del_init(&entry->list);
  2520. return entry;
  2521. }
  2522. static int qeth_init_input_buffer(struct qeth_card *card,
  2523. struct qeth_qdio_buffer *buf)
  2524. {
  2525. struct qeth_buffer_pool_entry *pool_entry;
  2526. int i;
  2527. if ((card->options.cq == QETH_CQ_ENABLED) && (!buf->rx_skb)) {
  2528. buf->rx_skb = dev_alloc_skb(QETH_RX_PULL_LEN + ETH_HLEN);
  2529. if (!buf->rx_skb)
  2530. return 1;
  2531. }
  2532. pool_entry = qeth_find_free_buffer_pool_entry(card);
  2533. if (!pool_entry)
  2534. return 1;
  2535. /*
  2536. * since the buffer is accessed only from the input_tasklet
  2537. * there shouldn't be a need to synchronize; also, since we use
  2538. * the QETH_IN_BUF_REQUEUE_THRESHOLD we should never run out off
  2539. * buffers
  2540. */
  2541. buf->pool_entry = pool_entry;
  2542. for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
  2543. buf->buffer->element[i].length = PAGE_SIZE;
  2544. buf->buffer->element[i].addr = pool_entry->elements[i];
  2545. if (i == QETH_MAX_BUFFER_ELEMENTS(card) - 1)
  2546. buf->buffer->element[i].eflags = SBAL_EFLAGS_LAST_ENTRY;
  2547. else
  2548. buf->buffer->element[i].eflags = 0;
  2549. buf->buffer->element[i].sflags = 0;
  2550. }
  2551. return 0;
  2552. }
  2553. int qeth_init_qdio_queues(struct qeth_card *card)
  2554. {
  2555. int i, j;
  2556. int rc;
  2557. QETH_DBF_TEXT(SETUP, 2, "initqdqs");
  2558. /* inbound queue */
  2559. qdio_reset_buffers(card->qdio.in_q->qdio_bufs,
  2560. QDIO_MAX_BUFFERS_PER_Q);
  2561. qeth_initialize_working_pool_list(card);
  2562. /*give only as many buffers to hardware as we have buffer pool entries*/
  2563. for (i = 0; i < card->qdio.in_buf_pool.buf_count - 1; ++i)
  2564. qeth_init_input_buffer(card, &card->qdio.in_q->bufs[i]);
  2565. card->qdio.in_q->next_buf_to_init =
  2566. card->qdio.in_buf_pool.buf_count - 1;
  2567. rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0, 0,
  2568. card->qdio.in_buf_pool.buf_count - 1);
  2569. if (rc) {
  2570. QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
  2571. return rc;
  2572. }
  2573. /* completion */
  2574. rc = qeth_cq_init(card);
  2575. if (rc) {
  2576. return rc;
  2577. }
  2578. /* outbound queue */
  2579. for (i = 0; i < card->qdio.no_out_queues; ++i) {
  2580. qdio_reset_buffers(card->qdio.out_qs[i]->qdio_bufs,
  2581. QDIO_MAX_BUFFERS_PER_Q);
  2582. for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
  2583. qeth_clear_output_buffer(card->qdio.out_qs[i],
  2584. card->qdio.out_qs[i]->bufs[j],
  2585. QETH_QDIO_BUF_EMPTY);
  2586. }
  2587. card->qdio.out_qs[i]->card = card;
  2588. card->qdio.out_qs[i]->next_buf_to_fill = 0;
  2589. card->qdio.out_qs[i]->do_pack = 0;
  2590. atomic_set(&card->qdio.out_qs[i]->used_buffers, 0);
  2591. atomic_set(&card->qdio.out_qs[i]->set_pci_flags_count, 0);
  2592. atomic_set(&card->qdio.out_qs[i]->state,
  2593. QETH_OUT_Q_UNLOCKED);
  2594. }
  2595. return 0;
  2596. }
  2597. EXPORT_SYMBOL_GPL(qeth_init_qdio_queues);
  2598. static inline __u8 qeth_get_ipa_adp_type(enum qeth_link_types link_type)
  2599. {
  2600. switch (link_type) {
  2601. case QETH_LINK_TYPE_HSTR:
  2602. return 2;
  2603. default:
  2604. return 1;
  2605. }
  2606. }
  2607. static void qeth_fill_ipacmd_header(struct qeth_card *card,
  2608. struct qeth_ipa_cmd *cmd, __u8 command,
  2609. enum qeth_prot_versions prot)
  2610. {
  2611. memset(cmd, 0, sizeof(struct qeth_ipa_cmd));
  2612. cmd->hdr.command = command;
  2613. cmd->hdr.initiator = IPA_CMD_INITIATOR_HOST;
  2614. cmd->hdr.seqno = card->seqno.ipa;
  2615. cmd->hdr.adapter_type = qeth_get_ipa_adp_type(card->info.link_type);
  2616. cmd->hdr.rel_adapter_no = (__u8) card->info.portno;
  2617. if (card->options.layer2)
  2618. cmd->hdr.prim_version_no = 2;
  2619. else
  2620. cmd->hdr.prim_version_no = 1;
  2621. cmd->hdr.param_count = 1;
  2622. cmd->hdr.prot_version = prot;
  2623. cmd->hdr.ipa_supported = 0;
  2624. cmd->hdr.ipa_enabled = 0;
  2625. }
  2626. struct qeth_cmd_buffer *qeth_get_ipacmd_buffer(struct qeth_card *card,
  2627. enum qeth_ipa_cmds ipacmd, enum qeth_prot_versions prot)
  2628. {
  2629. struct qeth_cmd_buffer *iob;
  2630. struct qeth_ipa_cmd *cmd;
  2631. iob = qeth_get_buffer(&card->write);
  2632. if (iob) {
  2633. cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
  2634. qeth_fill_ipacmd_header(card, cmd, ipacmd, prot);
  2635. } else {
  2636. dev_warn(&card->gdev->dev,
  2637. "The qeth driver ran out of channel command buffers\n");
  2638. QETH_DBF_MESSAGE(1, "%s The qeth driver ran out of channel command buffers",
  2639. dev_name(&card->gdev->dev));
  2640. }
  2641. return iob;
  2642. }
  2643. EXPORT_SYMBOL_GPL(qeth_get_ipacmd_buffer);
  2644. void qeth_prepare_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
  2645. char prot_type)
  2646. {
  2647. memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
  2648. memcpy(QETH_IPA_CMD_PROT_TYPE(iob->data), &prot_type, 1);
  2649. memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
  2650. &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
  2651. }
  2652. EXPORT_SYMBOL_GPL(qeth_prepare_ipa_cmd);
  2653. /**
  2654. * qeth_send_ipa_cmd() - send an IPA command
  2655. *
  2656. * See qeth_send_control_data() for explanation of the arguments.
  2657. */
  2658. int qeth_send_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
  2659. int (*reply_cb)(struct qeth_card *, struct qeth_reply*,
  2660. unsigned long),
  2661. void *reply_param)
  2662. {
  2663. int rc;
  2664. char prot_type;
  2665. QETH_CARD_TEXT(card, 4, "sendipa");
  2666. if (card->options.layer2)
  2667. if (card->info.type == QETH_CARD_TYPE_OSN)
  2668. prot_type = QETH_PROT_OSN2;
  2669. else
  2670. prot_type = QETH_PROT_LAYER2;
  2671. else
  2672. prot_type = QETH_PROT_TCPIP;
  2673. qeth_prepare_ipa_cmd(card, iob, prot_type);
  2674. rc = qeth_send_control_data(card, IPA_CMD_LENGTH,
  2675. iob, reply_cb, reply_param);
  2676. if (rc == -ETIME) {
  2677. qeth_clear_ipacmd_list(card);
  2678. qeth_schedule_recovery(card);
  2679. }
  2680. return rc;
  2681. }
  2682. EXPORT_SYMBOL_GPL(qeth_send_ipa_cmd);
  2683. int qeth_send_startlan(struct qeth_card *card)
  2684. {
  2685. int rc;
  2686. struct qeth_cmd_buffer *iob;
  2687. QETH_DBF_TEXT(SETUP, 2, "strtlan");
  2688. iob = qeth_get_ipacmd_buffer(card, IPA_CMD_STARTLAN, 0);
  2689. if (!iob)
  2690. return -ENOMEM;
  2691. rc = qeth_send_ipa_cmd(card, iob, NULL, NULL);
  2692. return rc;
  2693. }
  2694. EXPORT_SYMBOL_GPL(qeth_send_startlan);
  2695. static int qeth_default_setadapterparms_cb(struct qeth_card *card,
  2696. struct qeth_reply *reply, unsigned long data)
  2697. {
  2698. struct qeth_ipa_cmd *cmd;
  2699. QETH_CARD_TEXT(card, 4, "defadpcb");
  2700. cmd = (struct qeth_ipa_cmd *) data;
  2701. if (cmd->hdr.return_code == 0)
  2702. cmd->hdr.return_code =
  2703. cmd->data.setadapterparms.hdr.return_code;
  2704. return 0;
  2705. }
  2706. static int qeth_query_setadapterparms_cb(struct qeth_card *card,
  2707. struct qeth_reply *reply, unsigned long data)
  2708. {
  2709. struct qeth_ipa_cmd *cmd;
  2710. QETH_CARD_TEXT(card, 3, "quyadpcb");
  2711. cmd = (struct qeth_ipa_cmd *) data;
  2712. if (cmd->data.setadapterparms.data.query_cmds_supp.lan_type & 0x7f) {
  2713. card->info.link_type =
  2714. cmd->data.setadapterparms.data.query_cmds_supp.lan_type;
  2715. QETH_DBF_TEXT_(SETUP, 2, "lnk %d", card->info.link_type);
  2716. }
  2717. card->options.adp.supported_funcs =
  2718. cmd->data.setadapterparms.data.query_cmds_supp.supported_cmds;
  2719. return qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd);
  2720. }
  2721. static struct qeth_cmd_buffer *qeth_get_adapter_cmd(struct qeth_card *card,
  2722. __u32 command, __u32 cmdlen)
  2723. {
  2724. struct qeth_cmd_buffer *iob;
  2725. struct qeth_ipa_cmd *cmd;
  2726. iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SETADAPTERPARMS,
  2727. QETH_PROT_IPV4);
  2728. if (iob) {
  2729. cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
  2730. cmd->data.setadapterparms.hdr.cmdlength = cmdlen;
  2731. cmd->data.setadapterparms.hdr.command_code = command;
  2732. cmd->data.setadapterparms.hdr.used_total = 1;
  2733. cmd->data.setadapterparms.hdr.seq_no = 1;
  2734. }
  2735. return iob;
  2736. }
  2737. int qeth_query_setadapterparms(struct qeth_card *card)
  2738. {
  2739. int rc;
  2740. struct qeth_cmd_buffer *iob;
  2741. QETH_CARD_TEXT(card, 3, "queryadp");
  2742. iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_COMMANDS_SUPPORTED,
  2743. sizeof(struct qeth_ipacmd_setadpparms));
  2744. if (!iob)
  2745. return -ENOMEM;
  2746. rc = qeth_send_ipa_cmd(card, iob, qeth_query_setadapterparms_cb, NULL);
  2747. return rc;
  2748. }
  2749. EXPORT_SYMBOL_GPL(qeth_query_setadapterparms);
  2750. static int qeth_query_ipassists_cb(struct qeth_card *card,
  2751. struct qeth_reply *reply, unsigned long data)
  2752. {
  2753. struct qeth_ipa_cmd *cmd;
  2754. QETH_DBF_TEXT(SETUP, 2, "qipasscb");
  2755. cmd = (struct qeth_ipa_cmd *) data;
  2756. switch (cmd->hdr.return_code) {
  2757. case IPA_RC_NOTSUPP:
  2758. case IPA_RC_L2_UNSUPPORTED_CMD:
  2759. QETH_DBF_TEXT(SETUP, 2, "ipaunsup");
  2760. card->options.ipa4.supported_funcs |= IPA_SETADAPTERPARMS;
  2761. card->options.ipa6.supported_funcs |= IPA_SETADAPTERPARMS;
  2762. return -0;
  2763. default:
  2764. if (cmd->hdr.return_code) {
  2765. QETH_DBF_MESSAGE(1, "%s IPA_CMD_QIPASSIST: Unhandled "
  2766. "rc=%d\n",
  2767. dev_name(&card->gdev->dev),
  2768. cmd->hdr.return_code);
  2769. return 0;
  2770. }
  2771. }
  2772. if (cmd->hdr.prot_version == QETH_PROT_IPV4) {
  2773. card->options.ipa4.supported_funcs = cmd->hdr.ipa_supported;
  2774. card->options.ipa4.enabled_funcs = cmd->hdr.ipa_enabled;
  2775. } else if (cmd->hdr.prot_version == QETH_PROT_IPV6) {
  2776. card->options.ipa6.supported_funcs = cmd->hdr.ipa_supported;
  2777. card->options.ipa6.enabled_funcs = cmd->hdr.ipa_enabled;
  2778. } else
  2779. QETH_DBF_MESSAGE(1, "%s IPA_CMD_QIPASSIST: Flawed LIC detected"
  2780. "\n", dev_name(&card->gdev->dev));
  2781. return 0;
  2782. }
  2783. int qeth_query_ipassists(struct qeth_card *card, enum qeth_prot_versions prot)
  2784. {
  2785. int rc;
  2786. struct qeth_cmd_buffer *iob;
  2787. QETH_DBF_TEXT_(SETUP, 2, "qipassi%i", prot);
  2788. iob = qeth_get_ipacmd_buffer(card, IPA_CMD_QIPASSIST, prot);
  2789. if (!iob)
  2790. return -ENOMEM;
  2791. rc = qeth_send_ipa_cmd(card, iob, qeth_query_ipassists_cb, NULL);
  2792. return rc;
  2793. }
  2794. EXPORT_SYMBOL_GPL(qeth_query_ipassists);
  2795. static int qeth_query_switch_attributes_cb(struct qeth_card *card,
  2796. struct qeth_reply *reply, unsigned long data)
  2797. {
  2798. struct qeth_ipa_cmd *cmd;
  2799. struct qeth_switch_info *sw_info;
  2800. struct qeth_query_switch_attributes *attrs;
  2801. QETH_CARD_TEXT(card, 2, "qswiatcb");
  2802. cmd = (struct qeth_ipa_cmd *) data;
  2803. sw_info = (struct qeth_switch_info *)reply->param;
  2804. if (cmd->data.setadapterparms.hdr.return_code == 0) {
  2805. attrs = &cmd->data.setadapterparms.data.query_switch_attributes;
  2806. sw_info->capabilities = attrs->capabilities;
  2807. sw_info->settings = attrs->settings;
  2808. QETH_CARD_TEXT_(card, 2, "%04x%04x", sw_info->capabilities,
  2809. sw_info->settings);
  2810. }
  2811. qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
  2812. return 0;
  2813. }
  2814. int qeth_query_switch_attributes(struct qeth_card *card,
  2815. struct qeth_switch_info *sw_info)
  2816. {
  2817. struct qeth_cmd_buffer *iob;
  2818. QETH_CARD_TEXT(card, 2, "qswiattr");
  2819. if (!qeth_adp_supported(card, IPA_SETADP_QUERY_SWITCH_ATTRIBUTES))
  2820. return -EOPNOTSUPP;
  2821. if (!netif_carrier_ok(card->dev))
  2822. return -ENOMEDIUM;
  2823. iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_SWITCH_ATTRIBUTES,
  2824. sizeof(struct qeth_ipacmd_setadpparms_hdr));
  2825. if (!iob)
  2826. return -ENOMEM;
  2827. return qeth_send_ipa_cmd(card, iob,
  2828. qeth_query_switch_attributes_cb, sw_info);
  2829. }
  2830. EXPORT_SYMBOL_GPL(qeth_query_switch_attributes);
  2831. static int qeth_query_setdiagass_cb(struct qeth_card *card,
  2832. struct qeth_reply *reply, unsigned long data)
  2833. {
  2834. struct qeth_ipa_cmd *cmd;
  2835. __u16 rc;
  2836. cmd = (struct qeth_ipa_cmd *)data;
  2837. rc = cmd->hdr.return_code;
  2838. if (rc)
  2839. QETH_CARD_TEXT_(card, 2, "diagq:%x", rc);
  2840. else
  2841. card->info.diagass_support = cmd->data.diagass.ext;
  2842. return 0;
  2843. }
  2844. static int qeth_query_setdiagass(struct qeth_card *card)
  2845. {
  2846. struct qeth_cmd_buffer *iob;
  2847. struct qeth_ipa_cmd *cmd;
  2848. QETH_DBF_TEXT(SETUP, 2, "qdiagass");
  2849. iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SET_DIAG_ASS, 0);
  2850. if (!iob)
  2851. return -ENOMEM;
  2852. cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
  2853. cmd->data.diagass.subcmd_len = 16;
  2854. cmd->data.diagass.subcmd = QETH_DIAGS_CMD_QUERY;
  2855. return qeth_send_ipa_cmd(card, iob, qeth_query_setdiagass_cb, NULL);
  2856. }
  2857. static void qeth_get_trap_id(struct qeth_card *card, struct qeth_trap_id *tid)
  2858. {
  2859. unsigned long info = get_zeroed_page(GFP_KERNEL);
  2860. struct sysinfo_2_2_2 *info222 = (struct sysinfo_2_2_2 *)info;
  2861. struct sysinfo_3_2_2 *info322 = (struct sysinfo_3_2_2 *)info;
  2862. struct ccw_dev_id ccwid;
  2863. int level;
  2864. tid->chpid = card->info.chpid;
  2865. ccw_device_get_id(CARD_RDEV(card), &ccwid);
  2866. tid->ssid = ccwid.ssid;
  2867. tid->devno = ccwid.devno;
  2868. if (!info)
  2869. return;
  2870. level = stsi(NULL, 0, 0, 0);
  2871. if ((level >= 2) && (stsi(info222, 2, 2, 2) == 0))
  2872. tid->lparnr = info222->lpar_number;
  2873. if ((level >= 3) && (stsi(info322, 3, 2, 2) == 0)) {
  2874. EBCASC(info322->vm[0].name, sizeof(info322->vm[0].name));
  2875. memcpy(tid->vmname, info322->vm[0].name, sizeof(tid->vmname));
  2876. }
  2877. free_page(info);
  2878. return;
  2879. }
  2880. static int qeth_hw_trap_cb(struct qeth_card *card,
  2881. struct qeth_reply *reply, unsigned long data)
  2882. {
  2883. struct qeth_ipa_cmd *cmd;
  2884. __u16 rc;
  2885. cmd = (struct qeth_ipa_cmd *)data;
  2886. rc = cmd->hdr.return_code;
  2887. if (rc)
  2888. QETH_CARD_TEXT_(card, 2, "trapc:%x", rc);
  2889. return 0;
  2890. }
  2891. int qeth_hw_trap(struct qeth_card *card, enum qeth_diags_trap_action action)
  2892. {
  2893. struct qeth_cmd_buffer *iob;
  2894. struct qeth_ipa_cmd *cmd;
  2895. QETH_DBF_TEXT(SETUP, 2, "diagtrap");
  2896. iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SET_DIAG_ASS, 0);
  2897. if (!iob)
  2898. return -ENOMEM;
  2899. cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
  2900. cmd->data.diagass.subcmd_len = 80;
  2901. cmd->data.diagass.subcmd = QETH_DIAGS_CMD_TRAP;
  2902. cmd->data.diagass.type = 1;
  2903. cmd->data.diagass.action = action;
  2904. switch (action) {
  2905. case QETH_DIAGS_TRAP_ARM:
  2906. cmd->data.diagass.options = 0x0003;
  2907. cmd->data.diagass.ext = 0x00010000 +
  2908. sizeof(struct qeth_trap_id);
  2909. qeth_get_trap_id(card,
  2910. (struct qeth_trap_id *)cmd->data.diagass.cdata);
  2911. break;
  2912. case QETH_DIAGS_TRAP_DISARM:
  2913. cmd->data.diagass.options = 0x0001;
  2914. break;
  2915. case QETH_DIAGS_TRAP_CAPTURE:
  2916. break;
  2917. }
  2918. return qeth_send_ipa_cmd(card, iob, qeth_hw_trap_cb, NULL);
  2919. }
  2920. EXPORT_SYMBOL_GPL(qeth_hw_trap);
  2921. int qeth_check_qdio_errors(struct qeth_card *card, struct qdio_buffer *buf,
  2922. unsigned int qdio_error, const char *dbftext)
  2923. {
  2924. if (qdio_error) {
  2925. QETH_CARD_TEXT(card, 2, dbftext);
  2926. QETH_CARD_TEXT_(card, 2, " F15=%02X",
  2927. buf->element[15].sflags);
  2928. QETH_CARD_TEXT_(card, 2, " F14=%02X",
  2929. buf->element[14].sflags);
  2930. QETH_CARD_TEXT_(card, 2, " qerr=%X", qdio_error);
  2931. if ((buf->element[15].sflags) == 0x12) {
  2932. card->stats.rx_dropped++;
  2933. return 0;
  2934. } else
  2935. return 1;
  2936. }
  2937. return 0;
  2938. }
  2939. EXPORT_SYMBOL_GPL(qeth_check_qdio_errors);
  2940. static void qeth_buffer_reclaim_work(struct work_struct *work)
  2941. {
  2942. struct qeth_card *card = container_of(work, struct qeth_card,
  2943. buffer_reclaim_work.work);
  2944. QETH_CARD_TEXT_(card, 2, "brw:%x", card->reclaim_index);
  2945. qeth_queue_input_buffer(card, card->reclaim_index);
  2946. }
  2947. void qeth_queue_input_buffer(struct qeth_card *card, int index)
  2948. {
  2949. struct qeth_qdio_q *queue = card->qdio.in_q;
  2950. struct list_head *lh;
  2951. int count;
  2952. int i;
  2953. int rc;
  2954. int newcount = 0;
  2955. count = (index < queue->next_buf_to_init)?
  2956. card->qdio.in_buf_pool.buf_count -
  2957. (queue->next_buf_to_init - index) :
  2958. card->qdio.in_buf_pool.buf_count -
  2959. (queue->next_buf_to_init + QDIO_MAX_BUFFERS_PER_Q - index);
  2960. /* only requeue at a certain threshold to avoid SIGAs */
  2961. if (count >= QETH_IN_BUF_REQUEUE_THRESHOLD(card)) {
  2962. for (i = queue->next_buf_to_init;
  2963. i < queue->next_buf_to_init + count; ++i) {
  2964. if (qeth_init_input_buffer(card,
  2965. &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q])) {
  2966. break;
  2967. } else {
  2968. newcount++;
  2969. }
  2970. }
  2971. if (newcount < count) {
  2972. /* we are in memory shortage so we switch back to
  2973. traditional skb allocation and drop packages */
  2974. atomic_set(&card->force_alloc_skb, 3);
  2975. count = newcount;
  2976. } else {
  2977. atomic_add_unless(&card->force_alloc_skb, -1, 0);
  2978. }
  2979. if (!count) {
  2980. i = 0;
  2981. list_for_each(lh, &card->qdio.in_buf_pool.entry_list)
  2982. i++;
  2983. if (i == card->qdio.in_buf_pool.buf_count) {
  2984. QETH_CARD_TEXT(card, 2, "qsarbw");
  2985. card->reclaim_index = index;
  2986. schedule_delayed_work(
  2987. &card->buffer_reclaim_work,
  2988. QETH_RECLAIM_WORK_TIME);
  2989. }
  2990. return;
  2991. }
  2992. /*
  2993. * according to old code it should be avoided to requeue all
  2994. * 128 buffers in order to benefit from PCI avoidance.
  2995. * this function keeps at least one buffer (the buffer at
  2996. * 'index') un-requeued -> this buffer is the first buffer that
  2997. * will be requeued the next time
  2998. */
  2999. if (card->options.performance_stats) {
  3000. card->perf_stats.inbound_do_qdio_cnt++;
  3001. card->perf_stats.inbound_do_qdio_start_time =
  3002. qeth_get_micros();
  3003. }
  3004. rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0,
  3005. queue->next_buf_to_init, count);
  3006. if (card->options.performance_stats)
  3007. card->perf_stats.inbound_do_qdio_time +=
  3008. qeth_get_micros() -
  3009. card->perf_stats.inbound_do_qdio_start_time;
  3010. if (rc) {
  3011. QETH_CARD_TEXT(card, 2, "qinberr");
  3012. }
  3013. queue->next_buf_to_init = (queue->next_buf_to_init + count) %
  3014. QDIO_MAX_BUFFERS_PER_Q;
  3015. }
  3016. }
  3017. EXPORT_SYMBOL_GPL(qeth_queue_input_buffer);
  3018. static int qeth_handle_send_error(struct qeth_card *card,
  3019. struct qeth_qdio_out_buffer *buffer, unsigned int qdio_err)
  3020. {
  3021. int sbalf15 = buffer->buffer->element[15].sflags;
  3022. QETH_CARD_TEXT(card, 6, "hdsnderr");
  3023. if (card->info.type == QETH_CARD_TYPE_IQD) {
  3024. if (sbalf15 == 0) {
  3025. qdio_err = 0;
  3026. } else {
  3027. qdio_err = 1;
  3028. }
  3029. }
  3030. qeth_check_qdio_errors(card, buffer->buffer, qdio_err, "qouterr");
  3031. if (!qdio_err)
  3032. return QETH_SEND_ERROR_NONE;
  3033. if ((sbalf15 >= 15) && (sbalf15 <= 31))
  3034. return QETH_SEND_ERROR_RETRY;
  3035. QETH_CARD_TEXT(card, 1, "lnkfail");
  3036. QETH_CARD_TEXT_(card, 1, "%04x %02x",
  3037. (u16)qdio_err, (u8)sbalf15);
  3038. return QETH_SEND_ERROR_LINK_FAILURE;
  3039. }
  3040. /*
  3041. * Switched to packing state if the number of used buffers on a queue
  3042. * reaches a certain limit.
  3043. */
  3044. static void qeth_switch_to_packing_if_needed(struct qeth_qdio_out_q *queue)
  3045. {
  3046. if (!queue->do_pack) {
  3047. if (atomic_read(&queue->used_buffers)
  3048. >= QETH_HIGH_WATERMARK_PACK){
  3049. /* switch non-PACKING -> PACKING */
  3050. QETH_CARD_TEXT(queue->card, 6, "np->pack");
  3051. if (queue->card->options.performance_stats)
  3052. queue->card->perf_stats.sc_dp_p++;
  3053. queue->do_pack = 1;
  3054. }
  3055. }
  3056. }
  3057. /*
  3058. * Switches from packing to non-packing mode. If there is a packing
  3059. * buffer on the queue this buffer will be prepared to be flushed.
  3060. * In that case 1 is returned to inform the caller. If no buffer
  3061. * has to be flushed, zero is returned.
  3062. */
  3063. static int qeth_switch_to_nonpacking_if_needed(struct qeth_qdio_out_q *queue)
  3064. {
  3065. struct qeth_qdio_out_buffer *buffer;
  3066. int flush_count = 0;
  3067. if (queue->do_pack) {
  3068. if (atomic_read(&queue->used_buffers)
  3069. <= QETH_LOW_WATERMARK_PACK) {
  3070. /* switch PACKING -> non-PACKING */
  3071. QETH_CARD_TEXT(queue->card, 6, "pack->np");
  3072. if (queue->card->options.performance_stats)
  3073. queue->card->perf_stats.sc_p_dp++;
  3074. queue->do_pack = 0;
  3075. /* flush packing buffers */
  3076. buffer = queue->bufs[queue->next_buf_to_fill];
  3077. if ((atomic_read(&buffer->state) ==
  3078. QETH_QDIO_BUF_EMPTY) &&
  3079. (buffer->next_element_to_fill > 0)) {
  3080. atomic_set(&buffer->state,
  3081. QETH_QDIO_BUF_PRIMED);
  3082. flush_count++;
  3083. queue->next_buf_to_fill =
  3084. (queue->next_buf_to_fill + 1) %
  3085. QDIO_MAX_BUFFERS_PER_Q;
  3086. }
  3087. }
  3088. }
  3089. return flush_count;
  3090. }
  3091. /*
  3092. * Called to flush a packing buffer if no more pci flags are on the queue.
  3093. * Checks if there is a packing buffer and prepares it to be flushed.
  3094. * In that case returns 1, otherwise zero.
  3095. */
  3096. static int qeth_flush_buffers_on_no_pci(struct qeth_qdio_out_q *queue)
  3097. {
  3098. struct qeth_qdio_out_buffer *buffer;
  3099. buffer = queue->bufs[queue->next_buf_to_fill];
  3100. if ((atomic_read(&buffer->state) == QETH_QDIO_BUF_EMPTY) &&
  3101. (buffer->next_element_to_fill > 0)) {
  3102. /* it's a packing buffer */
  3103. atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED);
  3104. queue->next_buf_to_fill =
  3105. (queue->next_buf_to_fill + 1) % QDIO_MAX_BUFFERS_PER_Q;
  3106. return 1;
  3107. }
  3108. return 0;
  3109. }
  3110. static void qeth_flush_buffers(struct qeth_qdio_out_q *queue, int index,
  3111. int count)
  3112. {
  3113. struct qeth_qdio_out_buffer *buf;
  3114. int rc;
  3115. int i;
  3116. unsigned int qdio_flags;
  3117. for (i = index; i < index + count; ++i) {
  3118. int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
  3119. buf = queue->bufs[bidx];
  3120. buf->buffer->element[buf->next_element_to_fill - 1].eflags |=
  3121. SBAL_EFLAGS_LAST_ENTRY;
  3122. if (queue->bufstates)
  3123. queue->bufstates[bidx].user = buf;
  3124. if (queue->card->info.type == QETH_CARD_TYPE_IQD)
  3125. continue;
  3126. if (!queue->do_pack) {
  3127. if ((atomic_read(&queue->used_buffers) >=
  3128. (QETH_HIGH_WATERMARK_PACK -
  3129. QETH_WATERMARK_PACK_FUZZ)) &&
  3130. !atomic_read(&queue->set_pci_flags_count)) {
  3131. /* it's likely that we'll go to packing
  3132. * mode soon */
  3133. atomic_inc(&queue->set_pci_flags_count);
  3134. buf->buffer->element[0].sflags |= SBAL_SFLAGS0_PCI_REQ;
  3135. }
  3136. } else {
  3137. if (!atomic_read(&queue->set_pci_flags_count)) {
  3138. /*
  3139. * there's no outstanding PCI any more, so we
  3140. * have to request a PCI to be sure the the PCI
  3141. * will wake at some time in the future then we
  3142. * can flush packed buffers that might still be
  3143. * hanging around, which can happen if no
  3144. * further send was requested by the stack
  3145. */
  3146. atomic_inc(&queue->set_pci_flags_count);
  3147. buf->buffer->element[0].sflags |= SBAL_SFLAGS0_PCI_REQ;
  3148. }
  3149. }
  3150. }
  3151. queue->card->dev->trans_start = jiffies;
  3152. if (queue->card->options.performance_stats) {
  3153. queue->card->perf_stats.outbound_do_qdio_cnt++;
  3154. queue->card->perf_stats.outbound_do_qdio_start_time =
  3155. qeth_get_micros();
  3156. }
  3157. qdio_flags = QDIO_FLAG_SYNC_OUTPUT;
  3158. if (atomic_read(&queue->set_pci_flags_count))
  3159. qdio_flags |= QDIO_FLAG_PCI_OUT;
  3160. rc = do_QDIO(CARD_DDEV(queue->card), qdio_flags,
  3161. queue->queue_no, index, count);
  3162. if (queue->card->options.performance_stats)
  3163. queue->card->perf_stats.outbound_do_qdio_time +=
  3164. qeth_get_micros() -
  3165. queue->card->perf_stats.outbound_do_qdio_start_time;
  3166. atomic_add(count, &queue->used_buffers);
  3167. if (rc) {
  3168. queue->card->stats.tx_errors += count;
  3169. /* ignore temporary SIGA errors without busy condition */
  3170. if (rc == -ENOBUFS)
  3171. return;
  3172. QETH_CARD_TEXT(queue->card, 2, "flushbuf");
  3173. QETH_CARD_TEXT_(queue->card, 2, " q%d", queue->queue_no);
  3174. QETH_CARD_TEXT_(queue->card, 2, " idx%d", index);
  3175. QETH_CARD_TEXT_(queue->card, 2, " c%d", count);
  3176. QETH_CARD_TEXT_(queue->card, 2, " err%d", rc);
  3177. /* this must not happen under normal circumstances. if it
  3178. * happens something is really wrong -> recover */
  3179. qeth_schedule_recovery(queue->card);
  3180. return;
  3181. }
  3182. if (queue->card->options.performance_stats)
  3183. queue->card->perf_stats.bufs_sent += count;
  3184. }
  3185. static void qeth_check_outbound_queue(struct qeth_qdio_out_q *queue)
  3186. {
  3187. int index;
  3188. int flush_cnt = 0;
  3189. int q_was_packing = 0;
  3190. /*
  3191. * check if weed have to switch to non-packing mode or if
  3192. * we have to get a pci flag out on the queue
  3193. */
  3194. if ((atomic_read(&queue->used_buffers) <= QETH_LOW_WATERMARK_PACK) ||
  3195. !atomic_read(&queue->set_pci_flags_count)) {
  3196. if (atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH) ==
  3197. QETH_OUT_Q_UNLOCKED) {
  3198. /*
  3199. * If we get in here, there was no action in
  3200. * do_send_packet. So, we check if there is a
  3201. * packing buffer to be flushed here.
  3202. */
  3203. netif_stop_queue(queue->card->dev);
  3204. index = queue->next_buf_to_fill;
  3205. q_was_packing = queue->do_pack;
  3206. /* queue->do_pack may change */
  3207. barrier();
  3208. flush_cnt += qeth_switch_to_nonpacking_if_needed(queue);
  3209. if (!flush_cnt &&
  3210. !atomic_read(&queue->set_pci_flags_count))
  3211. flush_cnt +=
  3212. qeth_flush_buffers_on_no_pci(queue);
  3213. if (queue->card->options.performance_stats &&
  3214. q_was_packing)
  3215. queue->card->perf_stats.bufs_sent_pack +=
  3216. flush_cnt;
  3217. if (flush_cnt)
  3218. qeth_flush_buffers(queue, index, flush_cnt);
  3219. atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
  3220. }
  3221. }
  3222. }
  3223. void qeth_qdio_start_poll(struct ccw_device *ccwdev, int queue,
  3224. unsigned long card_ptr)
  3225. {
  3226. struct qeth_card *card = (struct qeth_card *)card_ptr;
  3227. if (card->dev && (card->dev->flags & IFF_UP))
  3228. napi_schedule(&card->napi);
  3229. }
  3230. EXPORT_SYMBOL_GPL(qeth_qdio_start_poll);
  3231. int qeth_configure_cq(struct qeth_card *card, enum qeth_cq cq)
  3232. {
  3233. int rc;
  3234. if (card->options.cq == QETH_CQ_NOTAVAILABLE) {
  3235. rc = -1;
  3236. goto out;
  3237. } else {
  3238. if (card->options.cq == cq) {
  3239. rc = 0;
  3240. goto out;
  3241. }
  3242. if (card->state != CARD_STATE_DOWN &&
  3243. card->state != CARD_STATE_RECOVER) {
  3244. rc = -1;
  3245. goto out;
  3246. }
  3247. qeth_free_qdio_buffers(card);
  3248. card->options.cq = cq;
  3249. rc = 0;
  3250. }
  3251. out:
  3252. return rc;
  3253. }
  3254. EXPORT_SYMBOL_GPL(qeth_configure_cq);
  3255. static void qeth_qdio_cq_handler(struct qeth_card *card,
  3256. unsigned int qdio_err,
  3257. unsigned int queue, int first_element, int count) {
  3258. struct qeth_qdio_q *cq = card->qdio.c_q;
  3259. int i;
  3260. int rc;
  3261. if (!qeth_is_cq(card, queue))
  3262. goto out;
  3263. QETH_CARD_TEXT_(card, 5, "qcqhe%d", first_element);
  3264. QETH_CARD_TEXT_(card, 5, "qcqhc%d", count);
  3265. QETH_CARD_TEXT_(card, 5, "qcqherr%d", qdio_err);
  3266. if (qdio_err) {
  3267. netif_stop_queue(card->dev);
  3268. qeth_schedule_recovery(card);
  3269. goto out;
  3270. }
  3271. if (card->options.performance_stats) {
  3272. card->perf_stats.cq_cnt++;
  3273. card->perf_stats.cq_start_time = qeth_get_micros();
  3274. }
  3275. for (i = first_element; i < first_element + count; ++i) {
  3276. int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
  3277. struct qdio_buffer *buffer = cq->qdio_bufs[bidx];
  3278. int e;
  3279. e = 0;
  3280. while (buffer->element[e].addr) {
  3281. unsigned long phys_aob_addr;
  3282. phys_aob_addr = (unsigned long) buffer->element[e].addr;
  3283. qeth_qdio_handle_aob(card, phys_aob_addr);
  3284. buffer->element[e].addr = NULL;
  3285. buffer->element[e].eflags = 0;
  3286. buffer->element[e].sflags = 0;
  3287. buffer->element[e].length = 0;
  3288. ++e;
  3289. }
  3290. buffer->element[15].eflags = 0;
  3291. buffer->element[15].sflags = 0;
  3292. }
  3293. rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, queue,
  3294. card->qdio.c_q->next_buf_to_init,
  3295. count);
  3296. if (rc) {
  3297. dev_warn(&card->gdev->dev,
  3298. "QDIO reported an error, rc=%i\n", rc);
  3299. QETH_CARD_TEXT(card, 2, "qcqherr");
  3300. }
  3301. card->qdio.c_q->next_buf_to_init = (card->qdio.c_q->next_buf_to_init
  3302. + count) % QDIO_MAX_BUFFERS_PER_Q;
  3303. netif_wake_queue(card->dev);
  3304. if (card->options.performance_stats) {
  3305. int delta_t = qeth_get_micros();
  3306. delta_t -= card->perf_stats.cq_start_time;
  3307. card->perf_stats.cq_time += delta_t;
  3308. }
  3309. out:
  3310. return;
  3311. }
  3312. void qeth_qdio_input_handler(struct ccw_device *ccwdev, unsigned int qdio_err,
  3313. unsigned int queue, int first_elem, int count,
  3314. unsigned long card_ptr)
  3315. {
  3316. struct qeth_card *card = (struct qeth_card *)card_ptr;
  3317. QETH_CARD_TEXT_(card, 2, "qihq%d", queue);
  3318. QETH_CARD_TEXT_(card, 2, "qiec%d", qdio_err);
  3319. if (qeth_is_cq(card, queue))
  3320. qeth_qdio_cq_handler(card, qdio_err, queue, first_elem, count);
  3321. else if (qdio_err)
  3322. qeth_schedule_recovery(card);
  3323. }
  3324. EXPORT_SYMBOL_GPL(qeth_qdio_input_handler);
  3325. void qeth_qdio_output_handler(struct ccw_device *ccwdev,
  3326. unsigned int qdio_error, int __queue, int first_element,
  3327. int count, unsigned long card_ptr)
  3328. {
  3329. struct qeth_card *card = (struct qeth_card *) card_ptr;
  3330. struct qeth_qdio_out_q *queue = card->qdio.out_qs[__queue];
  3331. struct qeth_qdio_out_buffer *buffer;
  3332. int i;
  3333. QETH_CARD_TEXT(card, 6, "qdouhdl");
  3334. if (qdio_error & QDIO_ERROR_FATAL) {
  3335. QETH_CARD_TEXT(card, 2, "achkcond");
  3336. netif_stop_queue(card->dev);
  3337. qeth_schedule_recovery(card);
  3338. return;
  3339. }
  3340. if (card->options.performance_stats) {
  3341. card->perf_stats.outbound_handler_cnt++;
  3342. card->perf_stats.outbound_handler_start_time =
  3343. qeth_get_micros();
  3344. }
  3345. for (i = first_element; i < (first_element + count); ++i) {
  3346. int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
  3347. buffer = queue->bufs[bidx];
  3348. qeth_handle_send_error(card, buffer, qdio_error);
  3349. if (queue->bufstates &&
  3350. (queue->bufstates[bidx].flags &
  3351. QDIO_OUTBUF_STATE_FLAG_PENDING) != 0) {
  3352. WARN_ON_ONCE(card->options.cq != QETH_CQ_ENABLED);
  3353. if (atomic_cmpxchg(&buffer->state,
  3354. QETH_QDIO_BUF_PRIMED,
  3355. QETH_QDIO_BUF_PENDING) ==
  3356. QETH_QDIO_BUF_PRIMED) {
  3357. qeth_notify_skbs(queue, buffer,
  3358. TX_NOTIFY_PENDING);
  3359. }
  3360. buffer->aob = queue->bufstates[bidx].aob;
  3361. QETH_CARD_TEXT_(queue->card, 5, "pel%d", bidx);
  3362. QETH_CARD_TEXT(queue->card, 5, "aob");
  3363. QETH_CARD_TEXT_(queue->card, 5, "%lx",
  3364. virt_to_phys(buffer->aob));
  3365. if (qeth_init_qdio_out_buf(queue, bidx)) {
  3366. QETH_CARD_TEXT(card, 2, "outofbuf");
  3367. qeth_schedule_recovery(card);
  3368. }
  3369. } else {
  3370. if (card->options.cq == QETH_CQ_ENABLED) {
  3371. enum iucv_tx_notify n;
  3372. n = qeth_compute_cq_notification(
  3373. buffer->buffer->element[15].sflags, 0);
  3374. qeth_notify_skbs(queue, buffer, n);
  3375. }
  3376. qeth_clear_output_buffer(queue, buffer,
  3377. QETH_QDIO_BUF_EMPTY);
  3378. }
  3379. qeth_cleanup_handled_pending(queue, bidx, 0);
  3380. }
  3381. atomic_sub(count, &queue->used_buffers);
  3382. /* check if we need to do something on this outbound queue */
  3383. if (card->info.type != QETH_CARD_TYPE_IQD)
  3384. qeth_check_outbound_queue(queue);
  3385. netif_wake_queue(queue->card->dev);
  3386. if (card->options.performance_stats)
  3387. card->perf_stats.outbound_handler_time += qeth_get_micros() -
  3388. card->perf_stats.outbound_handler_start_time;
  3389. }
  3390. EXPORT_SYMBOL_GPL(qeth_qdio_output_handler);
  3391. /**
  3392. * Note: Function assumes that we have 4 outbound queues.
  3393. */
  3394. int qeth_get_priority_queue(struct qeth_card *card, struct sk_buff *skb,
  3395. int ipv, int cast_type)
  3396. {
  3397. __be16 *tci;
  3398. u8 tos;
  3399. if (cast_type && card->info.is_multicast_different)
  3400. return card->info.is_multicast_different &
  3401. (card->qdio.no_out_queues - 1);
  3402. switch (card->qdio.do_prio_queueing) {
  3403. case QETH_PRIO_Q_ING_TOS:
  3404. case QETH_PRIO_Q_ING_PREC:
  3405. switch (ipv) {
  3406. case 4:
  3407. tos = ipv4_get_dsfield(ip_hdr(skb));
  3408. break;
  3409. case 6:
  3410. tos = ipv6_get_dsfield(ipv6_hdr(skb));
  3411. break;
  3412. default:
  3413. return card->qdio.default_out_queue;
  3414. }
  3415. if (card->qdio.do_prio_queueing == QETH_PRIO_Q_ING_PREC)
  3416. return ~tos >> 6 & 3;
  3417. if (tos & IPTOS_MINCOST)
  3418. return 3;
  3419. if (tos & IPTOS_RELIABILITY)
  3420. return 2;
  3421. if (tos & IPTOS_THROUGHPUT)
  3422. return 1;
  3423. if (tos & IPTOS_LOWDELAY)
  3424. return 0;
  3425. break;
  3426. case QETH_PRIO_Q_ING_SKB:
  3427. if (skb->priority > 5)
  3428. return 0;
  3429. return ~skb->priority >> 1 & 3;
  3430. case QETH_PRIO_Q_ING_VLAN:
  3431. tci = &((struct ethhdr *)skb->data)->h_proto;
  3432. if (*tci == ETH_P_8021Q)
  3433. return ~*(tci + 1) >> (VLAN_PRIO_SHIFT + 1) & 3;
  3434. break;
  3435. default:
  3436. break;
  3437. }
  3438. return card->qdio.default_out_queue;
  3439. }
  3440. EXPORT_SYMBOL_GPL(qeth_get_priority_queue);
  3441. int qeth_get_elements_for_frags(struct sk_buff *skb)
  3442. {
  3443. int cnt, length, e, elements = 0;
  3444. struct skb_frag_struct *frag;
  3445. char *data;
  3446. for (cnt = 0; cnt < skb_shinfo(skb)->nr_frags; cnt++) {
  3447. frag = &skb_shinfo(skb)->frags[cnt];
  3448. data = (char *)page_to_phys(skb_frag_page(frag)) +
  3449. frag->page_offset;
  3450. length = frag->size;
  3451. e = PFN_UP((unsigned long)data + length - 1) -
  3452. PFN_DOWN((unsigned long)data);
  3453. elements += e;
  3454. }
  3455. return elements;
  3456. }
  3457. EXPORT_SYMBOL_GPL(qeth_get_elements_for_frags);
  3458. int qeth_get_elements_no(struct qeth_card *card,
  3459. struct sk_buff *skb, int elems)
  3460. {
  3461. int dlen = skb->len - skb->data_len;
  3462. int elements_needed = PFN_UP((unsigned long)skb->data + dlen - 1) -
  3463. PFN_DOWN((unsigned long)skb->data);
  3464. elements_needed += qeth_get_elements_for_frags(skb);
  3465. if ((elements_needed + elems) > QETH_MAX_BUFFER_ELEMENTS(card)) {
  3466. QETH_DBF_MESSAGE(2, "Invalid size of IP packet "
  3467. "(Number=%d / Length=%d). Discarded.\n",
  3468. (elements_needed+elems), skb->len);
  3469. return 0;
  3470. }
  3471. return elements_needed;
  3472. }
  3473. EXPORT_SYMBOL_GPL(qeth_get_elements_no);
  3474. int qeth_hdr_chk_and_bounce(struct sk_buff *skb, struct qeth_hdr **hdr, int len)
  3475. {
  3476. int hroom, inpage, rest;
  3477. if (((unsigned long)skb->data & PAGE_MASK) !=
  3478. (((unsigned long)skb->data + len - 1) & PAGE_MASK)) {
  3479. hroom = skb_headroom(skb);
  3480. inpage = PAGE_SIZE - ((unsigned long) skb->data % PAGE_SIZE);
  3481. rest = len - inpage;
  3482. if (rest > hroom)
  3483. return 1;
  3484. memmove(skb->data - rest, skb->data, skb->len - skb->data_len);
  3485. skb->data -= rest;
  3486. skb->tail -= rest;
  3487. *hdr = (struct qeth_hdr *)skb->data;
  3488. QETH_DBF_MESSAGE(2, "skb bounce len: %d rest: %d\n", len, rest);
  3489. }
  3490. return 0;
  3491. }
  3492. EXPORT_SYMBOL_GPL(qeth_hdr_chk_and_bounce);
  3493. static inline void __qeth_fill_buffer(struct sk_buff *skb,
  3494. struct qdio_buffer *buffer, int is_tso, int *next_element_to_fill,
  3495. int offset)
  3496. {
  3497. int length = skb->len - skb->data_len;
  3498. int length_here;
  3499. int element;
  3500. char *data;
  3501. int first_lap, cnt;
  3502. struct skb_frag_struct *frag;
  3503. element = *next_element_to_fill;
  3504. data = skb->data;
  3505. first_lap = (is_tso == 0 ? 1 : 0);
  3506. if (offset >= 0) {
  3507. data = skb->data + offset;
  3508. length -= offset;
  3509. first_lap = 0;
  3510. }
  3511. while (length > 0) {
  3512. /* length_here is the remaining amount of data in this page */
  3513. length_here = PAGE_SIZE - ((unsigned long) data % PAGE_SIZE);
  3514. if (length < length_here)
  3515. length_here = length;
  3516. buffer->element[element].addr = data;
  3517. buffer->element[element].length = length_here;
  3518. length -= length_here;
  3519. if (!length) {
  3520. if (first_lap)
  3521. if (skb_shinfo(skb)->nr_frags)
  3522. buffer->element[element].eflags =
  3523. SBAL_EFLAGS_FIRST_FRAG;
  3524. else
  3525. buffer->element[element].eflags = 0;
  3526. else
  3527. buffer->element[element].eflags =
  3528. SBAL_EFLAGS_MIDDLE_FRAG;
  3529. } else {
  3530. if (first_lap)
  3531. buffer->element[element].eflags =
  3532. SBAL_EFLAGS_FIRST_FRAG;
  3533. else
  3534. buffer->element[element].eflags =
  3535. SBAL_EFLAGS_MIDDLE_FRAG;
  3536. }
  3537. data += length_here;
  3538. element++;
  3539. first_lap = 0;
  3540. }
  3541. for (cnt = 0; cnt < skb_shinfo(skb)->nr_frags; cnt++) {
  3542. frag = &skb_shinfo(skb)->frags[cnt];
  3543. data = (char *)page_to_phys(skb_frag_page(frag)) +
  3544. frag->page_offset;
  3545. length = frag->size;
  3546. while (length > 0) {
  3547. length_here = PAGE_SIZE -
  3548. ((unsigned long) data % PAGE_SIZE);
  3549. if (length < length_here)
  3550. length_here = length;
  3551. buffer->element[element].addr = data;
  3552. buffer->element[element].length = length_here;
  3553. buffer->element[element].eflags =
  3554. SBAL_EFLAGS_MIDDLE_FRAG;
  3555. length -= length_here;
  3556. data += length_here;
  3557. element++;
  3558. }
  3559. }
  3560. if (buffer->element[element - 1].eflags)
  3561. buffer->element[element - 1].eflags = SBAL_EFLAGS_LAST_FRAG;
  3562. *next_element_to_fill = element;
  3563. }
  3564. static inline int qeth_fill_buffer(struct qeth_qdio_out_q *queue,
  3565. struct qeth_qdio_out_buffer *buf, struct sk_buff *skb,
  3566. struct qeth_hdr *hdr, int offset, int hd_len)
  3567. {
  3568. struct qdio_buffer *buffer;
  3569. int flush_cnt = 0, hdr_len, large_send = 0;
  3570. buffer = buf->buffer;
  3571. atomic_inc(&skb->users);
  3572. skb_queue_tail(&buf->skb_list, skb);
  3573. /*check first on TSO ....*/
  3574. if (hdr->hdr.l3.id == QETH_HEADER_TYPE_TSO) {
  3575. int element = buf->next_element_to_fill;
  3576. hdr_len = sizeof(struct qeth_hdr_tso) +
  3577. ((struct qeth_hdr_tso *)hdr)->ext.dg_hdr_len;
  3578. /*fill first buffer entry only with header information */
  3579. buffer->element[element].addr = skb->data;
  3580. buffer->element[element].length = hdr_len;
  3581. buffer->element[element].eflags = SBAL_EFLAGS_FIRST_FRAG;
  3582. buf->next_element_to_fill++;
  3583. skb->data += hdr_len;
  3584. skb->len -= hdr_len;
  3585. large_send = 1;
  3586. }
  3587. if (offset >= 0) {
  3588. int element = buf->next_element_to_fill;
  3589. buffer->element[element].addr = hdr;
  3590. buffer->element[element].length = sizeof(struct qeth_hdr) +
  3591. hd_len;
  3592. buffer->element[element].eflags = SBAL_EFLAGS_FIRST_FRAG;
  3593. buf->is_header[element] = 1;
  3594. buf->next_element_to_fill++;
  3595. }
  3596. __qeth_fill_buffer(skb, buffer, large_send,
  3597. (int *)&buf->next_element_to_fill, offset);
  3598. if (!queue->do_pack) {
  3599. QETH_CARD_TEXT(queue->card, 6, "fillbfnp");
  3600. /* set state to PRIMED -> will be flushed */
  3601. atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
  3602. flush_cnt = 1;
  3603. } else {
  3604. QETH_CARD_TEXT(queue->card, 6, "fillbfpa");
  3605. if (queue->card->options.performance_stats)
  3606. queue->card->perf_stats.skbs_sent_pack++;
  3607. if (buf->next_element_to_fill >=
  3608. QETH_MAX_BUFFER_ELEMENTS(queue->card)) {
  3609. /*
  3610. * packed buffer if full -> set state PRIMED
  3611. * -> will be flushed
  3612. */
  3613. atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
  3614. flush_cnt = 1;
  3615. }
  3616. }
  3617. return flush_cnt;
  3618. }
  3619. int qeth_do_send_packet_fast(struct qeth_card *card,
  3620. struct qeth_qdio_out_q *queue, struct sk_buff *skb,
  3621. struct qeth_hdr *hdr, int elements_needed,
  3622. int offset, int hd_len)
  3623. {
  3624. struct qeth_qdio_out_buffer *buffer;
  3625. int index;
  3626. /* spin until we get the queue ... */
  3627. while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED,
  3628. QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED);
  3629. /* ... now we've got the queue */
  3630. index = queue->next_buf_to_fill;
  3631. buffer = queue->bufs[queue->next_buf_to_fill];
  3632. /*
  3633. * check if buffer is empty to make sure that we do not 'overtake'
  3634. * ourselves and try to fill a buffer that is already primed
  3635. */
  3636. if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY)
  3637. goto out;
  3638. queue->next_buf_to_fill = (queue->next_buf_to_fill + 1) %
  3639. QDIO_MAX_BUFFERS_PER_Q;
  3640. atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
  3641. qeth_fill_buffer(queue, buffer, skb, hdr, offset, hd_len);
  3642. qeth_flush_buffers(queue, index, 1);
  3643. return 0;
  3644. out:
  3645. atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
  3646. return -EBUSY;
  3647. }
  3648. EXPORT_SYMBOL_GPL(qeth_do_send_packet_fast);
  3649. int qeth_do_send_packet(struct qeth_card *card, struct qeth_qdio_out_q *queue,
  3650. struct sk_buff *skb, struct qeth_hdr *hdr,
  3651. int elements_needed)
  3652. {
  3653. struct qeth_qdio_out_buffer *buffer;
  3654. int start_index;
  3655. int flush_count = 0;
  3656. int do_pack = 0;
  3657. int tmp;
  3658. int rc = 0;
  3659. /* spin until we get the queue ... */
  3660. while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED,
  3661. QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED);
  3662. start_index = queue->next_buf_to_fill;
  3663. buffer = queue->bufs[queue->next_buf_to_fill];
  3664. /*
  3665. * check if buffer is empty to make sure that we do not 'overtake'
  3666. * ourselves and try to fill a buffer that is already primed
  3667. */
  3668. if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY) {
  3669. atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
  3670. return -EBUSY;
  3671. }
  3672. /* check if we need to switch packing state of this queue */
  3673. qeth_switch_to_packing_if_needed(queue);
  3674. if (queue->do_pack) {
  3675. do_pack = 1;
  3676. /* does packet fit in current buffer? */
  3677. if ((QETH_MAX_BUFFER_ELEMENTS(card) -
  3678. buffer->next_element_to_fill) < elements_needed) {
  3679. /* ... no -> set state PRIMED */
  3680. atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED);
  3681. flush_count++;
  3682. queue->next_buf_to_fill =
  3683. (queue->next_buf_to_fill + 1) %
  3684. QDIO_MAX_BUFFERS_PER_Q;
  3685. buffer = queue->bufs[queue->next_buf_to_fill];
  3686. /* we did a step forward, so check buffer state
  3687. * again */
  3688. if (atomic_read(&buffer->state) !=
  3689. QETH_QDIO_BUF_EMPTY) {
  3690. qeth_flush_buffers(queue, start_index,
  3691. flush_count);
  3692. atomic_set(&queue->state,
  3693. QETH_OUT_Q_UNLOCKED);
  3694. return -EBUSY;
  3695. }
  3696. }
  3697. }
  3698. tmp = qeth_fill_buffer(queue, buffer, skb, hdr, -1, 0);
  3699. queue->next_buf_to_fill = (queue->next_buf_to_fill + tmp) %
  3700. QDIO_MAX_BUFFERS_PER_Q;
  3701. flush_count += tmp;
  3702. if (flush_count)
  3703. qeth_flush_buffers(queue, start_index, flush_count);
  3704. else if (!atomic_read(&queue->set_pci_flags_count))
  3705. atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH);
  3706. /*
  3707. * queue->state will go from LOCKED -> UNLOCKED or from
  3708. * LOCKED_FLUSH -> LOCKED if output_handler wanted to 'notify' us
  3709. * (switch packing state or flush buffer to get another pci flag out).
  3710. * In that case we will enter this loop
  3711. */
  3712. while (atomic_dec_return(&queue->state)) {
  3713. flush_count = 0;
  3714. start_index = queue->next_buf_to_fill;
  3715. /* check if we can go back to non-packing state */
  3716. flush_count += qeth_switch_to_nonpacking_if_needed(queue);
  3717. /*
  3718. * check if we need to flush a packing buffer to get a pci
  3719. * flag out on the queue
  3720. */
  3721. if (!flush_count && !atomic_read(&queue->set_pci_flags_count))
  3722. flush_count += qeth_flush_buffers_on_no_pci(queue);
  3723. if (flush_count)
  3724. qeth_flush_buffers(queue, start_index, flush_count);
  3725. }
  3726. /* at this point the queue is UNLOCKED again */
  3727. if (queue->card->options.performance_stats && do_pack)
  3728. queue->card->perf_stats.bufs_sent_pack += flush_count;
  3729. return rc;
  3730. }
  3731. EXPORT_SYMBOL_GPL(qeth_do_send_packet);
  3732. static int qeth_setadp_promisc_mode_cb(struct qeth_card *card,
  3733. struct qeth_reply *reply, unsigned long data)
  3734. {
  3735. struct qeth_ipa_cmd *cmd;
  3736. struct qeth_ipacmd_setadpparms *setparms;
  3737. QETH_CARD_TEXT(card, 4, "prmadpcb");
  3738. cmd = (struct qeth_ipa_cmd *) data;
  3739. setparms = &(cmd->data.setadapterparms);
  3740. qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd);
  3741. if (cmd->hdr.return_code) {
  3742. QETH_CARD_TEXT_(card, 4, "prmrc%x", cmd->hdr.return_code);
  3743. setparms->data.mode = SET_PROMISC_MODE_OFF;
  3744. }
  3745. card->info.promisc_mode = setparms->data.mode;
  3746. return 0;
  3747. }
  3748. void qeth_setadp_promisc_mode(struct qeth_card *card)
  3749. {
  3750. enum qeth_ipa_promisc_modes mode;
  3751. struct net_device *dev = card->dev;
  3752. struct qeth_cmd_buffer *iob;
  3753. struct qeth_ipa_cmd *cmd;
  3754. QETH_CARD_TEXT(card, 4, "setprom");
  3755. if (((dev->flags & IFF_PROMISC) &&
  3756. (card->info.promisc_mode == SET_PROMISC_MODE_ON)) ||
  3757. (!(dev->flags & IFF_PROMISC) &&
  3758. (card->info.promisc_mode == SET_PROMISC_MODE_OFF)))
  3759. return;
  3760. mode = SET_PROMISC_MODE_OFF;
  3761. if (dev->flags & IFF_PROMISC)
  3762. mode = SET_PROMISC_MODE_ON;
  3763. QETH_CARD_TEXT_(card, 4, "mode:%x", mode);
  3764. iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_PROMISC_MODE,
  3765. sizeof(struct qeth_ipacmd_setadpparms_hdr) + 8);
  3766. if (!iob)
  3767. return;
  3768. cmd = (struct qeth_ipa_cmd *)(iob->data + IPA_PDU_HEADER_SIZE);
  3769. cmd->data.setadapterparms.data.mode = mode;
  3770. qeth_send_ipa_cmd(card, iob, qeth_setadp_promisc_mode_cb, NULL);
  3771. }
  3772. EXPORT_SYMBOL_GPL(qeth_setadp_promisc_mode);
  3773. int qeth_change_mtu(struct net_device *dev, int new_mtu)
  3774. {
  3775. struct qeth_card *card;
  3776. char dbf_text[15];
  3777. card = dev->ml_priv;
  3778. QETH_CARD_TEXT(card, 4, "chgmtu");
  3779. sprintf(dbf_text, "%8x", new_mtu);
  3780. QETH_CARD_TEXT(card, 4, dbf_text);
  3781. if (new_mtu < 64)
  3782. return -EINVAL;
  3783. if (new_mtu > 65535)
  3784. return -EINVAL;
  3785. if ((!qeth_is_supported(card, IPA_IP_FRAGMENTATION)) &&
  3786. (!qeth_mtu_is_valid(card, new_mtu)))
  3787. return -EINVAL;
  3788. dev->mtu = new_mtu;
  3789. return 0;
  3790. }
  3791. EXPORT_SYMBOL_GPL(qeth_change_mtu);
  3792. struct net_device_stats *qeth_get_stats(struct net_device *dev)
  3793. {
  3794. struct qeth_card *card;
  3795. card = dev->ml_priv;
  3796. QETH_CARD_TEXT(card, 5, "getstat");
  3797. return &card->stats;
  3798. }
  3799. EXPORT_SYMBOL_GPL(qeth_get_stats);
  3800. static int qeth_setadpparms_change_macaddr_cb(struct qeth_card *card,
  3801. struct qeth_reply *reply, unsigned long data)
  3802. {
  3803. struct qeth_ipa_cmd *cmd;
  3804. QETH_CARD_TEXT(card, 4, "chgmaccb");
  3805. cmd = (struct qeth_ipa_cmd *) data;
  3806. if (!card->options.layer2 ||
  3807. !(card->info.mac_bits & QETH_LAYER2_MAC_READ)) {
  3808. memcpy(card->dev->dev_addr,
  3809. &cmd->data.setadapterparms.data.change_addr.addr,
  3810. OSA_ADDR_LEN);
  3811. card->info.mac_bits |= QETH_LAYER2_MAC_READ;
  3812. }
  3813. qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
  3814. return 0;
  3815. }
  3816. int qeth_setadpparms_change_macaddr(struct qeth_card *card)
  3817. {
  3818. int rc;
  3819. struct qeth_cmd_buffer *iob;
  3820. struct qeth_ipa_cmd *cmd;
  3821. QETH_CARD_TEXT(card, 4, "chgmac");
  3822. iob = qeth_get_adapter_cmd(card, IPA_SETADP_ALTER_MAC_ADDRESS,
  3823. sizeof(struct qeth_ipacmd_setadpparms_hdr) +
  3824. sizeof(struct qeth_change_addr));
  3825. if (!iob)
  3826. return -ENOMEM;
  3827. cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
  3828. cmd->data.setadapterparms.data.change_addr.cmd = CHANGE_ADDR_READ_MAC;
  3829. cmd->data.setadapterparms.data.change_addr.addr_size = OSA_ADDR_LEN;
  3830. memcpy(&cmd->data.setadapterparms.data.change_addr.addr,
  3831. card->dev->dev_addr, OSA_ADDR_LEN);
  3832. rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_change_macaddr_cb,
  3833. NULL);
  3834. return rc;
  3835. }
  3836. EXPORT_SYMBOL_GPL(qeth_setadpparms_change_macaddr);
  3837. static int qeth_setadpparms_set_access_ctrl_cb(struct qeth_card *card,
  3838. struct qeth_reply *reply, unsigned long data)
  3839. {
  3840. struct qeth_ipa_cmd *cmd;
  3841. struct qeth_set_access_ctrl *access_ctrl_req;
  3842. int fallback = *(int *)reply->param;
  3843. QETH_CARD_TEXT(card, 4, "setaccb");
  3844. cmd = (struct qeth_ipa_cmd *) data;
  3845. access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl;
  3846. QETH_DBF_TEXT_(SETUP, 2, "setaccb");
  3847. QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name);
  3848. QETH_DBF_TEXT_(SETUP, 2, "rc=%d",
  3849. cmd->data.setadapterparms.hdr.return_code);
  3850. if (cmd->data.setadapterparms.hdr.return_code !=
  3851. SET_ACCESS_CTRL_RC_SUCCESS)
  3852. QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_CTRL(%s,%d)==%d\n",
  3853. card->gdev->dev.kobj.name,
  3854. access_ctrl_req->subcmd_code,
  3855. cmd->data.setadapterparms.hdr.return_code);
  3856. switch (cmd->data.setadapterparms.hdr.return_code) {
  3857. case SET_ACCESS_CTRL_RC_SUCCESS:
  3858. if (card->options.isolation == ISOLATION_MODE_NONE) {
  3859. dev_info(&card->gdev->dev,
  3860. "QDIO data connection isolation is deactivated\n");
  3861. } else {
  3862. dev_info(&card->gdev->dev,
  3863. "QDIO data connection isolation is activated\n");
  3864. }
  3865. break;
  3866. case SET_ACCESS_CTRL_RC_ALREADY_NOT_ISOLATED:
  3867. QETH_DBF_MESSAGE(2, "%s QDIO data connection isolation already "
  3868. "deactivated\n", dev_name(&card->gdev->dev));
  3869. if (fallback)
  3870. card->options.isolation = card->options.prev_isolation;
  3871. break;
  3872. case SET_ACCESS_CTRL_RC_ALREADY_ISOLATED:
  3873. QETH_DBF_MESSAGE(2, "%s QDIO data connection isolation already"
  3874. " activated\n", dev_name(&card->gdev->dev));
  3875. if (fallback)
  3876. card->options.isolation = card->options.prev_isolation;
  3877. break;
  3878. case SET_ACCESS_CTRL_RC_NOT_SUPPORTED:
  3879. dev_err(&card->gdev->dev, "Adapter does not "
  3880. "support QDIO data connection isolation\n");
  3881. break;
  3882. case SET_ACCESS_CTRL_RC_NONE_SHARED_ADAPTER:
  3883. dev_err(&card->gdev->dev,
  3884. "Adapter is dedicated. "
  3885. "QDIO data connection isolation not supported\n");
  3886. if (fallback)
  3887. card->options.isolation = card->options.prev_isolation;
  3888. break;
  3889. case SET_ACCESS_CTRL_RC_ACTIVE_CHECKSUM_OFF:
  3890. dev_err(&card->gdev->dev,
  3891. "TSO does not permit QDIO data connection isolation\n");
  3892. if (fallback)
  3893. card->options.isolation = card->options.prev_isolation;
  3894. break;
  3895. case SET_ACCESS_CTRL_RC_REFLREL_UNSUPPORTED:
  3896. dev_err(&card->gdev->dev, "The adjacent switch port does not "
  3897. "support reflective relay mode\n");
  3898. if (fallback)
  3899. card->options.isolation = card->options.prev_isolation;
  3900. break;
  3901. case SET_ACCESS_CTRL_RC_REFLREL_FAILED:
  3902. dev_err(&card->gdev->dev, "The reflective relay mode cannot be "
  3903. "enabled at the adjacent switch port");
  3904. if (fallback)
  3905. card->options.isolation = card->options.prev_isolation;
  3906. break;
  3907. case SET_ACCESS_CTRL_RC_REFLREL_DEACT_FAILED:
  3908. dev_warn(&card->gdev->dev, "Turning off reflective relay mode "
  3909. "at the adjacent switch failed\n");
  3910. break;
  3911. default:
  3912. /* this should never happen */
  3913. if (fallback)
  3914. card->options.isolation = card->options.prev_isolation;
  3915. break;
  3916. }
  3917. qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
  3918. return 0;
  3919. }
  3920. static int qeth_setadpparms_set_access_ctrl(struct qeth_card *card,
  3921. enum qeth_ipa_isolation_modes isolation, int fallback)
  3922. {
  3923. int rc;
  3924. struct qeth_cmd_buffer *iob;
  3925. struct qeth_ipa_cmd *cmd;
  3926. struct qeth_set_access_ctrl *access_ctrl_req;
  3927. QETH_CARD_TEXT(card, 4, "setacctl");
  3928. QETH_DBF_TEXT_(SETUP, 2, "setacctl");
  3929. QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name);
  3930. iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_ACCESS_CONTROL,
  3931. sizeof(struct qeth_ipacmd_setadpparms_hdr) +
  3932. sizeof(struct qeth_set_access_ctrl));
  3933. if (!iob)
  3934. return -ENOMEM;
  3935. cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
  3936. access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl;
  3937. access_ctrl_req->subcmd_code = isolation;
  3938. rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_set_access_ctrl_cb,
  3939. &fallback);
  3940. QETH_DBF_TEXT_(SETUP, 2, "rc=%d", rc);
  3941. return rc;
  3942. }
  3943. int qeth_set_access_ctrl_online(struct qeth_card *card, int fallback)
  3944. {
  3945. int rc = 0;
  3946. QETH_CARD_TEXT(card, 4, "setactlo");
  3947. if ((card->info.type == QETH_CARD_TYPE_OSD ||
  3948. card->info.type == QETH_CARD_TYPE_OSX) &&
  3949. qeth_adp_supported(card, IPA_SETADP_SET_ACCESS_CONTROL)) {
  3950. rc = qeth_setadpparms_set_access_ctrl(card,
  3951. card->options.isolation, fallback);
  3952. if (rc) {
  3953. QETH_DBF_MESSAGE(3,
  3954. "IPA(SET_ACCESS_CTRL,%s,%d) sent failed\n",
  3955. card->gdev->dev.kobj.name,
  3956. rc);
  3957. rc = -EOPNOTSUPP;
  3958. }
  3959. } else if (card->options.isolation != ISOLATION_MODE_NONE) {
  3960. card->options.isolation = ISOLATION_MODE_NONE;
  3961. dev_err(&card->gdev->dev, "Adapter does not "
  3962. "support QDIO data connection isolation\n");
  3963. rc = -EOPNOTSUPP;
  3964. }
  3965. return rc;
  3966. }
  3967. EXPORT_SYMBOL_GPL(qeth_set_access_ctrl_online);
  3968. void qeth_tx_timeout(struct net_device *dev)
  3969. {
  3970. struct qeth_card *card;
  3971. card = dev->ml_priv;
  3972. QETH_CARD_TEXT(card, 4, "txtimeo");
  3973. card->stats.tx_errors++;
  3974. qeth_schedule_recovery(card);
  3975. }
  3976. EXPORT_SYMBOL_GPL(qeth_tx_timeout);
  3977. int qeth_mdio_read(struct net_device *dev, int phy_id, int regnum)
  3978. {
  3979. struct qeth_card *card = dev->ml_priv;
  3980. int rc = 0;
  3981. switch (regnum) {
  3982. case MII_BMCR: /* Basic mode control register */
  3983. rc = BMCR_FULLDPLX;
  3984. if ((card->info.link_type != QETH_LINK_TYPE_GBIT_ETH) &&
  3985. (card->info.link_type != QETH_LINK_TYPE_OSN) &&
  3986. (card->info.link_type != QETH_LINK_TYPE_10GBIT_ETH))
  3987. rc |= BMCR_SPEED100;
  3988. break;
  3989. case MII_BMSR: /* Basic mode status register */
  3990. rc = BMSR_ERCAP | BMSR_ANEGCOMPLETE | BMSR_LSTATUS |
  3991. BMSR_10HALF | BMSR_10FULL | BMSR_100HALF | BMSR_100FULL |
  3992. BMSR_100BASE4;
  3993. break;
  3994. case MII_PHYSID1: /* PHYS ID 1 */
  3995. rc = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 8) |
  3996. dev->dev_addr[2];
  3997. rc = (rc >> 5) & 0xFFFF;
  3998. break;
  3999. case MII_PHYSID2: /* PHYS ID 2 */
  4000. rc = (dev->dev_addr[2] << 10) & 0xFFFF;
  4001. break;
  4002. case MII_ADVERTISE: /* Advertisement control reg */
  4003. rc = ADVERTISE_ALL;
  4004. break;
  4005. case MII_LPA: /* Link partner ability reg */
  4006. rc = LPA_10HALF | LPA_10FULL | LPA_100HALF | LPA_100FULL |
  4007. LPA_100BASE4 | LPA_LPACK;
  4008. break;
  4009. case MII_EXPANSION: /* Expansion register */
  4010. break;
  4011. case MII_DCOUNTER: /* disconnect counter */
  4012. break;
  4013. case MII_FCSCOUNTER: /* false carrier counter */
  4014. break;
  4015. case MII_NWAYTEST: /* N-way auto-neg test register */
  4016. break;
  4017. case MII_RERRCOUNTER: /* rx error counter */
  4018. rc = card->stats.rx_errors;
  4019. break;
  4020. case MII_SREVISION: /* silicon revision */
  4021. break;
  4022. case MII_RESV1: /* reserved 1 */
  4023. break;
  4024. case MII_LBRERROR: /* loopback, rx, bypass error */
  4025. break;
  4026. case MII_PHYADDR: /* physical address */
  4027. break;
  4028. case MII_RESV2: /* reserved 2 */
  4029. break;
  4030. case MII_TPISTATUS: /* TPI status for 10mbps */
  4031. break;
  4032. case MII_NCONFIG: /* network interface config */
  4033. break;
  4034. default:
  4035. break;
  4036. }
  4037. return rc;
  4038. }
  4039. EXPORT_SYMBOL_GPL(qeth_mdio_read);
  4040. static int qeth_send_ipa_snmp_cmd(struct qeth_card *card,
  4041. struct qeth_cmd_buffer *iob, int len,
  4042. int (*reply_cb)(struct qeth_card *, struct qeth_reply *,
  4043. unsigned long),
  4044. void *reply_param)
  4045. {
  4046. u16 s1, s2;
  4047. QETH_CARD_TEXT(card, 4, "sendsnmp");
  4048. memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
  4049. memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
  4050. &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
  4051. /* adjust PDU length fields in IPA_PDU_HEADER */
  4052. s1 = (u32) IPA_PDU_HEADER_SIZE + len;
  4053. s2 = (u32) len;
  4054. memcpy(QETH_IPA_PDU_LEN_TOTAL(iob->data), &s1, 2);
  4055. memcpy(QETH_IPA_PDU_LEN_PDU1(iob->data), &s2, 2);
  4056. memcpy(QETH_IPA_PDU_LEN_PDU2(iob->data), &s2, 2);
  4057. memcpy(QETH_IPA_PDU_LEN_PDU3(iob->data), &s2, 2);
  4058. return qeth_send_control_data(card, IPA_PDU_HEADER_SIZE + len, iob,
  4059. reply_cb, reply_param);
  4060. }
  4061. static int qeth_snmp_command_cb(struct qeth_card *card,
  4062. struct qeth_reply *reply, unsigned long sdata)
  4063. {
  4064. struct qeth_ipa_cmd *cmd;
  4065. struct qeth_arp_query_info *qinfo;
  4066. struct qeth_snmp_cmd *snmp;
  4067. unsigned char *data;
  4068. __u16 data_len;
  4069. QETH_CARD_TEXT(card, 3, "snpcmdcb");
  4070. cmd = (struct qeth_ipa_cmd *) sdata;
  4071. data = (unsigned char *)((char *)cmd - reply->offset);
  4072. qinfo = (struct qeth_arp_query_info *) reply->param;
  4073. snmp = &cmd->data.setadapterparms.data.snmp;
  4074. if (cmd->hdr.return_code) {
  4075. QETH_CARD_TEXT_(card, 4, "scer1%x", cmd->hdr.return_code);
  4076. return 0;
  4077. }
  4078. if (cmd->data.setadapterparms.hdr.return_code) {
  4079. cmd->hdr.return_code =
  4080. cmd->data.setadapterparms.hdr.return_code;
  4081. QETH_CARD_TEXT_(card, 4, "scer2%x", cmd->hdr.return_code);
  4082. return 0;
  4083. }
  4084. data_len = *((__u16 *)QETH_IPA_PDU_LEN_PDU1(data));
  4085. if (cmd->data.setadapterparms.hdr.seq_no == 1)
  4086. data_len -= (__u16)((char *)&snmp->data - (char *)cmd);
  4087. else
  4088. data_len -= (__u16)((char *)&snmp->request - (char *)cmd);
  4089. /* check if there is enough room in userspace */
  4090. if ((qinfo->udata_len - qinfo->udata_offset) < data_len) {
  4091. QETH_CARD_TEXT_(card, 4, "scer3%i", -ENOMEM);
  4092. cmd->hdr.return_code = IPA_RC_ENOMEM;
  4093. return 0;
  4094. }
  4095. QETH_CARD_TEXT_(card, 4, "snore%i",
  4096. cmd->data.setadapterparms.hdr.used_total);
  4097. QETH_CARD_TEXT_(card, 4, "sseqn%i",
  4098. cmd->data.setadapterparms.hdr.seq_no);
  4099. /*copy entries to user buffer*/
  4100. if (cmd->data.setadapterparms.hdr.seq_no == 1) {
  4101. memcpy(qinfo->udata + qinfo->udata_offset,
  4102. (char *)snmp,
  4103. data_len + offsetof(struct qeth_snmp_cmd, data));
  4104. qinfo->udata_offset += offsetof(struct qeth_snmp_cmd, data);
  4105. } else {
  4106. memcpy(qinfo->udata + qinfo->udata_offset,
  4107. (char *)&snmp->request, data_len);
  4108. }
  4109. qinfo->udata_offset += data_len;
  4110. /* check if all replies received ... */
  4111. QETH_CARD_TEXT_(card, 4, "srtot%i",
  4112. cmd->data.setadapterparms.hdr.used_total);
  4113. QETH_CARD_TEXT_(card, 4, "srseq%i",
  4114. cmd->data.setadapterparms.hdr.seq_no);
  4115. if (cmd->data.setadapterparms.hdr.seq_no <
  4116. cmd->data.setadapterparms.hdr.used_total)
  4117. return 1;
  4118. return 0;
  4119. }
  4120. int qeth_snmp_command(struct qeth_card *card, char __user *udata)
  4121. {
  4122. struct qeth_cmd_buffer *iob;
  4123. struct qeth_ipa_cmd *cmd;
  4124. struct qeth_snmp_ureq *ureq;
  4125. unsigned int req_len;
  4126. struct qeth_arp_query_info qinfo = {0, };
  4127. int rc = 0;
  4128. QETH_CARD_TEXT(card, 3, "snmpcmd");
  4129. if (card->info.guestlan)
  4130. return -EOPNOTSUPP;
  4131. if ((!qeth_adp_supported(card, IPA_SETADP_SET_SNMP_CONTROL)) &&
  4132. (!card->options.layer2)) {
  4133. return -EOPNOTSUPP;
  4134. }
  4135. /* skip 4 bytes (data_len struct member) to get req_len */
  4136. if (copy_from_user(&req_len, udata + sizeof(int), sizeof(int)))
  4137. return -EFAULT;
  4138. if (req_len > (QETH_BUFSIZE - IPA_PDU_HEADER_SIZE -
  4139. sizeof(struct qeth_ipacmd_hdr) -
  4140. sizeof(struct qeth_ipacmd_setadpparms_hdr)))
  4141. return -EINVAL;
  4142. ureq = memdup_user(udata, req_len + sizeof(struct qeth_snmp_ureq_hdr));
  4143. if (IS_ERR(ureq)) {
  4144. QETH_CARD_TEXT(card, 2, "snmpnome");
  4145. return PTR_ERR(ureq);
  4146. }
  4147. qinfo.udata_len = ureq->hdr.data_len;
  4148. qinfo.udata = kzalloc(qinfo.udata_len, GFP_KERNEL);
  4149. if (!qinfo.udata) {
  4150. kfree(ureq);
  4151. return -ENOMEM;
  4152. }
  4153. qinfo.udata_offset = sizeof(struct qeth_snmp_ureq_hdr);
  4154. iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_SNMP_CONTROL,
  4155. QETH_SNMP_SETADP_CMDLENGTH + req_len);
  4156. if (!iob) {
  4157. rc = -ENOMEM;
  4158. goto out;
  4159. }
  4160. cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
  4161. memcpy(&cmd->data.setadapterparms.data.snmp, &ureq->cmd, req_len);
  4162. rc = qeth_send_ipa_snmp_cmd(card, iob, QETH_SETADP_BASE_LEN + req_len,
  4163. qeth_snmp_command_cb, (void *)&qinfo);
  4164. if (rc)
  4165. QETH_DBF_MESSAGE(2, "SNMP command failed on %s: (0x%x)\n",
  4166. QETH_CARD_IFNAME(card), rc);
  4167. else {
  4168. if (copy_to_user(udata, qinfo.udata, qinfo.udata_len))
  4169. rc = -EFAULT;
  4170. }
  4171. out:
  4172. kfree(ureq);
  4173. kfree(qinfo.udata);
  4174. return rc;
  4175. }
  4176. EXPORT_SYMBOL_GPL(qeth_snmp_command);
  4177. static int qeth_setadpparms_query_oat_cb(struct qeth_card *card,
  4178. struct qeth_reply *reply, unsigned long data)
  4179. {
  4180. struct qeth_ipa_cmd *cmd;
  4181. struct qeth_qoat_priv *priv;
  4182. char *resdata;
  4183. int resdatalen;
  4184. QETH_CARD_TEXT(card, 3, "qoatcb");
  4185. cmd = (struct qeth_ipa_cmd *)data;
  4186. priv = (struct qeth_qoat_priv *)reply->param;
  4187. resdatalen = cmd->data.setadapterparms.hdr.cmdlength;
  4188. resdata = (char *)data + 28;
  4189. if (resdatalen > (priv->buffer_len - priv->response_len)) {
  4190. cmd->hdr.return_code = IPA_RC_FFFF;
  4191. return 0;
  4192. }
  4193. memcpy((priv->buffer + priv->response_len), resdata,
  4194. resdatalen);
  4195. priv->response_len += resdatalen;
  4196. if (cmd->data.setadapterparms.hdr.seq_no <
  4197. cmd->data.setadapterparms.hdr.used_total)
  4198. return 1;
  4199. return 0;
  4200. }
  4201. int qeth_query_oat_command(struct qeth_card *card, char __user *udata)
  4202. {
  4203. int rc = 0;
  4204. struct qeth_cmd_buffer *iob;
  4205. struct qeth_ipa_cmd *cmd;
  4206. struct qeth_query_oat *oat_req;
  4207. struct qeth_query_oat_data oat_data;
  4208. struct qeth_qoat_priv priv;
  4209. void __user *tmp;
  4210. QETH_CARD_TEXT(card, 3, "qoatcmd");
  4211. if (!qeth_adp_supported(card, IPA_SETADP_QUERY_OAT)) {
  4212. rc = -EOPNOTSUPP;
  4213. goto out;
  4214. }
  4215. if (copy_from_user(&oat_data, udata,
  4216. sizeof(struct qeth_query_oat_data))) {
  4217. rc = -EFAULT;
  4218. goto out;
  4219. }
  4220. priv.buffer_len = oat_data.buffer_len;
  4221. priv.response_len = 0;
  4222. priv.buffer = kzalloc(oat_data.buffer_len, GFP_KERNEL);
  4223. if (!priv.buffer) {
  4224. rc = -ENOMEM;
  4225. goto out;
  4226. }
  4227. iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_OAT,
  4228. sizeof(struct qeth_ipacmd_setadpparms_hdr) +
  4229. sizeof(struct qeth_query_oat));
  4230. if (!iob) {
  4231. rc = -ENOMEM;
  4232. goto out_free;
  4233. }
  4234. cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
  4235. oat_req = &cmd->data.setadapterparms.data.query_oat;
  4236. oat_req->subcmd_code = oat_data.command;
  4237. rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_query_oat_cb,
  4238. &priv);
  4239. if (!rc) {
  4240. if (is_compat_task())
  4241. tmp = compat_ptr(oat_data.ptr);
  4242. else
  4243. tmp = (void __user *)(unsigned long)oat_data.ptr;
  4244. if (copy_to_user(tmp, priv.buffer,
  4245. priv.response_len)) {
  4246. rc = -EFAULT;
  4247. goto out_free;
  4248. }
  4249. oat_data.response_len = priv.response_len;
  4250. if (copy_to_user(udata, &oat_data,
  4251. sizeof(struct qeth_query_oat_data)))
  4252. rc = -EFAULT;
  4253. } else
  4254. if (rc == IPA_RC_FFFF)
  4255. rc = -EFAULT;
  4256. out_free:
  4257. kfree(priv.buffer);
  4258. out:
  4259. return rc;
  4260. }
  4261. EXPORT_SYMBOL_GPL(qeth_query_oat_command);
  4262. static int qeth_query_card_info_cb(struct qeth_card *card,
  4263. struct qeth_reply *reply, unsigned long data)
  4264. {
  4265. struct qeth_ipa_cmd *cmd;
  4266. struct qeth_query_card_info *card_info;
  4267. struct carrier_info *carrier_info;
  4268. QETH_CARD_TEXT(card, 2, "qcrdincb");
  4269. carrier_info = (struct carrier_info *)reply->param;
  4270. cmd = (struct qeth_ipa_cmd *)data;
  4271. card_info = &cmd->data.setadapterparms.data.card_info;
  4272. if (cmd->data.setadapterparms.hdr.return_code == 0) {
  4273. carrier_info->card_type = card_info->card_type;
  4274. carrier_info->port_mode = card_info->port_mode;
  4275. carrier_info->port_speed = card_info->port_speed;
  4276. }
  4277. qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
  4278. return 0;
  4279. }
  4280. static int qeth_query_card_info(struct qeth_card *card,
  4281. struct carrier_info *carrier_info)
  4282. {
  4283. struct qeth_cmd_buffer *iob;
  4284. QETH_CARD_TEXT(card, 2, "qcrdinfo");
  4285. if (!qeth_adp_supported(card, IPA_SETADP_QUERY_CARD_INFO))
  4286. return -EOPNOTSUPP;
  4287. iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_CARD_INFO,
  4288. sizeof(struct qeth_ipacmd_setadpparms_hdr));
  4289. if (!iob)
  4290. return -ENOMEM;
  4291. return qeth_send_ipa_cmd(card, iob, qeth_query_card_info_cb,
  4292. (void *)carrier_info);
  4293. }
  4294. static inline int qeth_get_qdio_q_format(struct qeth_card *card)
  4295. {
  4296. switch (card->info.type) {
  4297. case QETH_CARD_TYPE_IQD:
  4298. return 2;
  4299. default:
  4300. return 0;
  4301. }
  4302. }
  4303. static void qeth_determine_capabilities(struct qeth_card *card)
  4304. {
  4305. int rc;
  4306. int length;
  4307. char *prcd;
  4308. struct ccw_device *ddev;
  4309. int ddev_offline = 0;
  4310. QETH_DBF_TEXT(SETUP, 2, "detcapab");
  4311. ddev = CARD_DDEV(card);
  4312. if (!ddev->online) {
  4313. ddev_offline = 1;
  4314. rc = ccw_device_set_online(ddev);
  4315. if (rc) {
  4316. QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
  4317. goto out;
  4318. }
  4319. }
  4320. rc = qeth_read_conf_data(card, (void **) &prcd, &length);
  4321. if (rc) {
  4322. QETH_DBF_MESSAGE(2, "%s qeth_read_conf_data returned %i\n",
  4323. dev_name(&card->gdev->dev), rc);
  4324. QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
  4325. goto out_offline;
  4326. }
  4327. qeth_configure_unitaddr(card, prcd);
  4328. if (ddev_offline)
  4329. qeth_configure_blkt_default(card, prcd);
  4330. kfree(prcd);
  4331. rc = qdio_get_ssqd_desc(ddev, &card->ssqd);
  4332. if (rc)
  4333. QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
  4334. QETH_DBF_TEXT_(SETUP, 2, "qfmt%d", card->ssqd.qfmt);
  4335. QETH_DBF_TEXT_(SETUP, 2, "%d", card->ssqd.qdioac1);
  4336. QETH_DBF_TEXT_(SETUP, 2, "%d", card->ssqd.qdioac3);
  4337. QETH_DBF_TEXT_(SETUP, 2, "icnt%d", card->ssqd.icnt);
  4338. if (!((card->ssqd.qfmt != QDIO_IQDIO_QFMT) ||
  4339. ((card->ssqd.qdioac1 & CHSC_AC1_INITIATE_INPUTQ) == 0) ||
  4340. ((card->ssqd.qdioac3 & CHSC_AC3_FORMAT2_CQ_AVAILABLE) == 0))) {
  4341. dev_info(&card->gdev->dev,
  4342. "Completion Queueing supported\n");
  4343. } else {
  4344. card->options.cq = QETH_CQ_NOTAVAILABLE;
  4345. }
  4346. out_offline:
  4347. if (ddev_offline == 1)
  4348. ccw_device_set_offline(ddev);
  4349. out:
  4350. return;
  4351. }
  4352. static inline void qeth_qdio_establish_cq(struct qeth_card *card,
  4353. struct qdio_buffer **in_sbal_ptrs,
  4354. void (**queue_start_poll) (struct ccw_device *, int, unsigned long)) {
  4355. int i;
  4356. if (card->options.cq == QETH_CQ_ENABLED) {
  4357. int offset = QDIO_MAX_BUFFERS_PER_Q *
  4358. (card->qdio.no_in_queues - 1);
  4359. i = QDIO_MAX_BUFFERS_PER_Q * (card->qdio.no_in_queues - 1);
  4360. for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) {
  4361. in_sbal_ptrs[offset + i] = (struct qdio_buffer *)
  4362. virt_to_phys(card->qdio.c_q->bufs[i].buffer);
  4363. }
  4364. queue_start_poll[card->qdio.no_in_queues - 1] = NULL;
  4365. }
  4366. }
  4367. static int qeth_qdio_establish(struct qeth_card *card)
  4368. {
  4369. struct qdio_initialize init_data;
  4370. char *qib_param_field;
  4371. struct qdio_buffer **in_sbal_ptrs;
  4372. void (**queue_start_poll) (struct ccw_device *, int, unsigned long);
  4373. struct qdio_buffer **out_sbal_ptrs;
  4374. int i, j, k;
  4375. int rc = 0;
  4376. QETH_DBF_TEXT(SETUP, 2, "qdioest");
  4377. qib_param_field = kzalloc(QDIO_MAX_BUFFERS_PER_Q * sizeof(char),
  4378. GFP_KERNEL);
  4379. if (!qib_param_field) {
  4380. rc = -ENOMEM;
  4381. goto out_free_nothing;
  4382. }
  4383. qeth_create_qib_param_field(card, qib_param_field);
  4384. qeth_create_qib_param_field_blkt(card, qib_param_field);
  4385. in_sbal_ptrs = kzalloc(card->qdio.no_in_queues *
  4386. QDIO_MAX_BUFFERS_PER_Q * sizeof(void *),
  4387. GFP_KERNEL);
  4388. if (!in_sbal_ptrs) {
  4389. rc = -ENOMEM;
  4390. goto out_free_qib_param;
  4391. }
  4392. for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) {
  4393. in_sbal_ptrs[i] = (struct qdio_buffer *)
  4394. virt_to_phys(card->qdio.in_q->bufs[i].buffer);
  4395. }
  4396. queue_start_poll = kzalloc(sizeof(void *) * card->qdio.no_in_queues,
  4397. GFP_KERNEL);
  4398. if (!queue_start_poll) {
  4399. rc = -ENOMEM;
  4400. goto out_free_in_sbals;
  4401. }
  4402. for (i = 0; i < card->qdio.no_in_queues; ++i)
  4403. queue_start_poll[i] = card->discipline->start_poll;
  4404. qeth_qdio_establish_cq(card, in_sbal_ptrs, queue_start_poll);
  4405. out_sbal_ptrs =
  4406. kzalloc(card->qdio.no_out_queues * QDIO_MAX_BUFFERS_PER_Q *
  4407. sizeof(void *), GFP_KERNEL);
  4408. if (!out_sbal_ptrs) {
  4409. rc = -ENOMEM;
  4410. goto out_free_queue_start_poll;
  4411. }
  4412. for (i = 0, k = 0; i < card->qdio.no_out_queues; ++i)
  4413. for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j, ++k) {
  4414. out_sbal_ptrs[k] = (struct qdio_buffer *)virt_to_phys(
  4415. card->qdio.out_qs[i]->bufs[j]->buffer);
  4416. }
  4417. memset(&init_data, 0, sizeof(struct qdio_initialize));
  4418. init_data.cdev = CARD_DDEV(card);
  4419. init_data.q_format = qeth_get_qdio_q_format(card);
  4420. init_data.qib_param_field_format = 0;
  4421. init_data.qib_param_field = qib_param_field;
  4422. init_data.no_input_qs = card->qdio.no_in_queues;
  4423. init_data.no_output_qs = card->qdio.no_out_queues;
  4424. init_data.input_handler = card->discipline->input_handler;
  4425. init_data.output_handler = card->discipline->output_handler;
  4426. init_data.queue_start_poll_array = queue_start_poll;
  4427. init_data.int_parm = (unsigned long) card;
  4428. init_data.input_sbal_addr_array = (void **) in_sbal_ptrs;
  4429. init_data.output_sbal_addr_array = (void **) out_sbal_ptrs;
  4430. init_data.output_sbal_state_array = card->qdio.out_bufstates;
  4431. init_data.scan_threshold =
  4432. (card->info.type == QETH_CARD_TYPE_IQD) ? 1 : 32;
  4433. if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ALLOCATED,
  4434. QETH_QDIO_ESTABLISHED) == QETH_QDIO_ALLOCATED) {
  4435. rc = qdio_allocate(&init_data);
  4436. if (rc) {
  4437. atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
  4438. goto out;
  4439. }
  4440. rc = qdio_establish(&init_data);
  4441. if (rc) {
  4442. atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
  4443. qdio_free(CARD_DDEV(card));
  4444. }
  4445. }
  4446. switch (card->options.cq) {
  4447. case QETH_CQ_ENABLED:
  4448. dev_info(&card->gdev->dev, "Completion Queue support enabled");
  4449. break;
  4450. case QETH_CQ_DISABLED:
  4451. dev_info(&card->gdev->dev, "Completion Queue support disabled");
  4452. break;
  4453. default:
  4454. break;
  4455. }
  4456. out:
  4457. kfree(out_sbal_ptrs);
  4458. out_free_queue_start_poll:
  4459. kfree(queue_start_poll);
  4460. out_free_in_sbals:
  4461. kfree(in_sbal_ptrs);
  4462. out_free_qib_param:
  4463. kfree(qib_param_field);
  4464. out_free_nothing:
  4465. return rc;
  4466. }
  4467. static void qeth_core_free_card(struct qeth_card *card)
  4468. {
  4469. QETH_DBF_TEXT(SETUP, 2, "freecrd");
  4470. QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
  4471. qeth_clean_channel(&card->read);
  4472. qeth_clean_channel(&card->write);
  4473. if (card->dev)
  4474. free_netdev(card->dev);
  4475. kfree(card->ip_tbd_list);
  4476. qeth_free_qdio_buffers(card);
  4477. unregister_service_level(&card->qeth_service_level);
  4478. kfree(card);
  4479. }
  4480. void qeth_trace_features(struct qeth_card *card)
  4481. {
  4482. QETH_CARD_TEXT(card, 2, "features");
  4483. QETH_CARD_TEXT_(card, 2, "%x", card->options.ipa4.supported_funcs);
  4484. QETH_CARD_TEXT_(card, 2, "%x", card->options.ipa4.enabled_funcs);
  4485. QETH_CARD_TEXT_(card, 2, "%x", card->options.ipa6.supported_funcs);
  4486. QETH_CARD_TEXT_(card, 2, "%x", card->options.ipa6.enabled_funcs);
  4487. QETH_CARD_TEXT_(card, 2, "%x", card->options.adp.supported_funcs);
  4488. QETH_CARD_TEXT_(card, 2, "%x", card->options.adp.enabled_funcs);
  4489. QETH_CARD_TEXT_(card, 2, "%x", card->info.diagass_support);
  4490. }
  4491. EXPORT_SYMBOL_GPL(qeth_trace_features);
  4492. static struct ccw_device_id qeth_ids[] = {
  4493. {CCW_DEVICE_DEVTYPE(0x1731, 0x01, 0x1732, 0x01),
  4494. .driver_info = QETH_CARD_TYPE_OSD},
  4495. {CCW_DEVICE_DEVTYPE(0x1731, 0x05, 0x1732, 0x05),
  4496. .driver_info = QETH_CARD_TYPE_IQD},
  4497. {CCW_DEVICE_DEVTYPE(0x1731, 0x06, 0x1732, 0x06),
  4498. .driver_info = QETH_CARD_TYPE_OSN},
  4499. {CCW_DEVICE_DEVTYPE(0x1731, 0x02, 0x1732, 0x03),
  4500. .driver_info = QETH_CARD_TYPE_OSM},
  4501. {CCW_DEVICE_DEVTYPE(0x1731, 0x02, 0x1732, 0x02),
  4502. .driver_info = QETH_CARD_TYPE_OSX},
  4503. {},
  4504. };
  4505. MODULE_DEVICE_TABLE(ccw, qeth_ids);
  4506. static struct ccw_driver qeth_ccw_driver = {
  4507. .driver = {
  4508. .owner = THIS_MODULE,
  4509. .name = "qeth",
  4510. },
  4511. .ids = qeth_ids,
  4512. .probe = ccwgroup_probe_ccwdev,
  4513. .remove = ccwgroup_remove_ccwdev,
  4514. };
  4515. int qeth_core_hardsetup_card(struct qeth_card *card)
  4516. {
  4517. int retries = 3;
  4518. int rc;
  4519. QETH_DBF_TEXT(SETUP, 2, "hrdsetup");
  4520. atomic_set(&card->force_alloc_skb, 0);
  4521. qeth_update_from_chp_desc(card);
  4522. retry:
  4523. if (retries < 3)
  4524. QETH_DBF_MESSAGE(2, "%s Retrying to do IDX activates.\n",
  4525. dev_name(&card->gdev->dev));
  4526. rc = qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
  4527. ccw_device_set_offline(CARD_DDEV(card));
  4528. ccw_device_set_offline(CARD_WDEV(card));
  4529. ccw_device_set_offline(CARD_RDEV(card));
  4530. qdio_free(CARD_DDEV(card));
  4531. rc = ccw_device_set_online(CARD_RDEV(card));
  4532. if (rc)
  4533. goto retriable;
  4534. rc = ccw_device_set_online(CARD_WDEV(card));
  4535. if (rc)
  4536. goto retriable;
  4537. rc = ccw_device_set_online(CARD_DDEV(card));
  4538. if (rc)
  4539. goto retriable;
  4540. retriable:
  4541. if (rc == -ERESTARTSYS) {
  4542. QETH_DBF_TEXT(SETUP, 2, "break1");
  4543. return rc;
  4544. } else if (rc) {
  4545. QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
  4546. if (--retries < 0)
  4547. goto out;
  4548. else
  4549. goto retry;
  4550. }
  4551. qeth_determine_capabilities(card);
  4552. qeth_init_tokens(card);
  4553. qeth_init_func_level(card);
  4554. rc = qeth_idx_activate_channel(&card->read, qeth_idx_read_cb);
  4555. if (rc == -ERESTARTSYS) {
  4556. QETH_DBF_TEXT(SETUP, 2, "break2");
  4557. return rc;
  4558. } else if (rc) {
  4559. QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
  4560. if (--retries < 0)
  4561. goto out;
  4562. else
  4563. goto retry;
  4564. }
  4565. rc = qeth_idx_activate_channel(&card->write, qeth_idx_write_cb);
  4566. if (rc == -ERESTARTSYS) {
  4567. QETH_DBF_TEXT(SETUP, 2, "break3");
  4568. return rc;
  4569. } else if (rc) {
  4570. QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
  4571. if (--retries < 0)
  4572. goto out;
  4573. else
  4574. goto retry;
  4575. }
  4576. card->read_or_write_problem = 0;
  4577. rc = qeth_mpc_initialize(card);
  4578. if (rc) {
  4579. QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
  4580. goto out;
  4581. }
  4582. card->options.ipa4.supported_funcs = 0;
  4583. card->options.adp.supported_funcs = 0;
  4584. card->options.sbp.supported_funcs = 0;
  4585. card->info.diagass_support = 0;
  4586. rc = qeth_query_ipassists(card, QETH_PROT_IPV4);
  4587. if (rc == -ENOMEM)
  4588. goto out;
  4589. if (qeth_is_supported(card, IPA_SETADAPTERPARMS)) {
  4590. rc = qeth_query_setadapterparms(card);
  4591. if (rc < 0) {
  4592. QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
  4593. goto out;
  4594. }
  4595. }
  4596. if (qeth_adp_supported(card, IPA_SETADP_SET_DIAG_ASSIST)) {
  4597. rc = qeth_query_setdiagass(card);
  4598. if (rc < 0) {
  4599. QETH_DBF_TEXT_(SETUP, 2, "7err%d", rc);
  4600. goto out;
  4601. }
  4602. }
  4603. return 0;
  4604. out:
  4605. dev_warn(&card->gdev->dev, "The qeth device driver failed to recover "
  4606. "an error on the device\n");
  4607. QETH_DBF_MESSAGE(2, "%s Initialization in hardsetup failed! rc=%d\n",
  4608. dev_name(&card->gdev->dev), rc);
  4609. return rc;
  4610. }
  4611. EXPORT_SYMBOL_GPL(qeth_core_hardsetup_card);
  4612. static inline int qeth_create_skb_frag(struct qeth_qdio_buffer *qethbuffer,
  4613. struct qdio_buffer_element *element,
  4614. struct sk_buff **pskb, int offset, int *pfrag, int data_len)
  4615. {
  4616. struct page *page = virt_to_page(element->addr);
  4617. if (*pskb == NULL) {
  4618. if (qethbuffer->rx_skb) {
  4619. /* only if qeth_card.options.cq == QETH_CQ_ENABLED */
  4620. *pskb = qethbuffer->rx_skb;
  4621. qethbuffer->rx_skb = NULL;
  4622. } else {
  4623. *pskb = dev_alloc_skb(QETH_RX_PULL_LEN + ETH_HLEN);
  4624. if (!(*pskb))
  4625. return -ENOMEM;
  4626. }
  4627. skb_reserve(*pskb, ETH_HLEN);
  4628. if (data_len <= QETH_RX_PULL_LEN) {
  4629. memcpy(skb_put(*pskb, data_len), element->addr + offset,
  4630. data_len);
  4631. } else {
  4632. get_page(page);
  4633. memcpy(skb_put(*pskb, QETH_RX_PULL_LEN),
  4634. element->addr + offset, QETH_RX_PULL_LEN);
  4635. skb_fill_page_desc(*pskb, *pfrag, page,
  4636. offset + QETH_RX_PULL_LEN,
  4637. data_len - QETH_RX_PULL_LEN);
  4638. (*pskb)->data_len += data_len - QETH_RX_PULL_LEN;
  4639. (*pskb)->len += data_len - QETH_RX_PULL_LEN;
  4640. (*pskb)->truesize += data_len - QETH_RX_PULL_LEN;
  4641. (*pfrag)++;
  4642. }
  4643. } else {
  4644. get_page(page);
  4645. skb_fill_page_desc(*pskb, *pfrag, page, offset, data_len);
  4646. (*pskb)->data_len += data_len;
  4647. (*pskb)->len += data_len;
  4648. (*pskb)->truesize += data_len;
  4649. (*pfrag)++;
  4650. }
  4651. return 0;
  4652. }
  4653. static inline int qeth_is_last_sbale(struct qdio_buffer_element *sbale)
  4654. {
  4655. return (sbale->eflags & SBAL_EFLAGS_LAST_ENTRY);
  4656. }
  4657. struct sk_buff *qeth_core_get_next_skb(struct qeth_card *card,
  4658. struct qeth_qdio_buffer *qethbuffer,
  4659. struct qdio_buffer_element **__element, int *__offset,
  4660. struct qeth_hdr **hdr)
  4661. {
  4662. struct qdio_buffer_element *element = *__element;
  4663. struct qdio_buffer *buffer = qethbuffer->buffer;
  4664. int offset = *__offset;
  4665. struct sk_buff *skb = NULL;
  4666. int skb_len = 0;
  4667. void *data_ptr;
  4668. int data_len;
  4669. int headroom = 0;
  4670. int use_rx_sg = 0;
  4671. int frag = 0;
  4672. /* qeth_hdr must not cross element boundaries */
  4673. if (element->length < offset + sizeof(struct qeth_hdr)) {
  4674. if (qeth_is_last_sbale(element))
  4675. return NULL;
  4676. element++;
  4677. offset = 0;
  4678. if (element->length < sizeof(struct qeth_hdr))
  4679. return NULL;
  4680. }
  4681. *hdr = element->addr + offset;
  4682. offset += sizeof(struct qeth_hdr);
  4683. switch ((*hdr)->hdr.l2.id) {
  4684. case QETH_HEADER_TYPE_LAYER2:
  4685. skb_len = (*hdr)->hdr.l2.pkt_length;
  4686. break;
  4687. case QETH_HEADER_TYPE_LAYER3:
  4688. skb_len = (*hdr)->hdr.l3.length;
  4689. headroom = ETH_HLEN;
  4690. break;
  4691. case QETH_HEADER_TYPE_OSN:
  4692. skb_len = (*hdr)->hdr.osn.pdu_length;
  4693. headroom = sizeof(struct qeth_hdr);
  4694. break;
  4695. default:
  4696. break;
  4697. }
  4698. if (!skb_len)
  4699. return NULL;
  4700. if (((skb_len >= card->options.rx_sg_cb) &&
  4701. (!(card->info.type == QETH_CARD_TYPE_OSN)) &&
  4702. (!atomic_read(&card->force_alloc_skb))) ||
  4703. (card->options.cq == QETH_CQ_ENABLED)) {
  4704. use_rx_sg = 1;
  4705. } else {
  4706. skb = dev_alloc_skb(skb_len + headroom);
  4707. if (!skb)
  4708. goto no_mem;
  4709. if (headroom)
  4710. skb_reserve(skb, headroom);
  4711. }
  4712. data_ptr = element->addr + offset;
  4713. while (skb_len) {
  4714. data_len = min(skb_len, (int)(element->length - offset));
  4715. if (data_len) {
  4716. if (use_rx_sg) {
  4717. if (qeth_create_skb_frag(qethbuffer, element,
  4718. &skb, offset, &frag, data_len))
  4719. goto no_mem;
  4720. } else {
  4721. memcpy(skb_put(skb, data_len), data_ptr,
  4722. data_len);
  4723. }
  4724. }
  4725. skb_len -= data_len;
  4726. if (skb_len) {
  4727. if (qeth_is_last_sbale(element)) {
  4728. QETH_CARD_TEXT(card, 4, "unexeob");
  4729. QETH_CARD_HEX(card, 2, buffer, sizeof(void *));
  4730. dev_kfree_skb_any(skb);
  4731. card->stats.rx_errors++;
  4732. return NULL;
  4733. }
  4734. element++;
  4735. offset = 0;
  4736. data_ptr = element->addr;
  4737. } else {
  4738. offset += data_len;
  4739. }
  4740. }
  4741. *__element = element;
  4742. *__offset = offset;
  4743. if (use_rx_sg && card->options.performance_stats) {
  4744. card->perf_stats.sg_skbs_rx++;
  4745. card->perf_stats.sg_frags_rx += skb_shinfo(skb)->nr_frags;
  4746. }
  4747. return skb;
  4748. no_mem:
  4749. if (net_ratelimit()) {
  4750. QETH_CARD_TEXT(card, 2, "noskbmem");
  4751. }
  4752. card->stats.rx_dropped++;
  4753. return NULL;
  4754. }
  4755. EXPORT_SYMBOL_GPL(qeth_core_get_next_skb);
  4756. static void qeth_unregister_dbf_views(void)
  4757. {
  4758. int x;
  4759. for (x = 0; x < QETH_DBF_INFOS; x++) {
  4760. debug_unregister(qeth_dbf[x].id);
  4761. qeth_dbf[x].id = NULL;
  4762. }
  4763. }
  4764. void qeth_dbf_longtext(debug_info_t *id, int level, char *fmt, ...)
  4765. {
  4766. char dbf_txt_buf[32];
  4767. va_list args;
  4768. if (!debug_level_enabled(id, level))
  4769. return;
  4770. va_start(args, fmt);
  4771. vsnprintf(dbf_txt_buf, sizeof(dbf_txt_buf), fmt, args);
  4772. va_end(args);
  4773. debug_text_event(id, level, dbf_txt_buf);
  4774. }
  4775. EXPORT_SYMBOL_GPL(qeth_dbf_longtext);
  4776. static int qeth_register_dbf_views(void)
  4777. {
  4778. int ret;
  4779. int x;
  4780. for (x = 0; x < QETH_DBF_INFOS; x++) {
  4781. /* register the areas */
  4782. qeth_dbf[x].id = debug_register(qeth_dbf[x].name,
  4783. qeth_dbf[x].pages,
  4784. qeth_dbf[x].areas,
  4785. qeth_dbf[x].len);
  4786. if (qeth_dbf[x].id == NULL) {
  4787. qeth_unregister_dbf_views();
  4788. return -ENOMEM;
  4789. }
  4790. /* register a view */
  4791. ret = debug_register_view(qeth_dbf[x].id, qeth_dbf[x].view);
  4792. if (ret) {
  4793. qeth_unregister_dbf_views();
  4794. return ret;
  4795. }
  4796. /* set a passing level */
  4797. debug_set_level(qeth_dbf[x].id, qeth_dbf[x].level);
  4798. }
  4799. return 0;
  4800. }
  4801. int qeth_core_load_discipline(struct qeth_card *card,
  4802. enum qeth_discipline_id discipline)
  4803. {
  4804. int rc = 0;
  4805. mutex_lock(&qeth_mod_mutex);
  4806. switch (discipline) {
  4807. case QETH_DISCIPLINE_LAYER3:
  4808. card->discipline = try_then_request_module(
  4809. symbol_get(qeth_l3_discipline), "qeth_l3");
  4810. break;
  4811. case QETH_DISCIPLINE_LAYER2:
  4812. card->discipline = try_then_request_module(
  4813. symbol_get(qeth_l2_discipline), "qeth_l2");
  4814. break;
  4815. }
  4816. if (!card->discipline) {
  4817. dev_err(&card->gdev->dev, "There is no kernel module to "
  4818. "support discipline %d\n", discipline);
  4819. rc = -EINVAL;
  4820. }
  4821. mutex_unlock(&qeth_mod_mutex);
  4822. return rc;
  4823. }
  4824. void qeth_core_free_discipline(struct qeth_card *card)
  4825. {
  4826. if (card->options.layer2)
  4827. symbol_put(qeth_l2_discipline);
  4828. else
  4829. symbol_put(qeth_l3_discipline);
  4830. card->discipline = NULL;
  4831. }
  4832. static const struct device_type qeth_generic_devtype = {
  4833. .name = "qeth_generic",
  4834. .groups = qeth_generic_attr_groups,
  4835. };
  4836. static const struct device_type qeth_osn_devtype = {
  4837. .name = "qeth_osn",
  4838. .groups = qeth_osn_attr_groups,
  4839. };
  4840. #define DBF_NAME_LEN 20
  4841. struct qeth_dbf_entry {
  4842. char dbf_name[DBF_NAME_LEN];
  4843. debug_info_t *dbf_info;
  4844. struct list_head dbf_list;
  4845. };
  4846. static LIST_HEAD(qeth_dbf_list);
  4847. static DEFINE_MUTEX(qeth_dbf_list_mutex);
  4848. static debug_info_t *qeth_get_dbf_entry(char *name)
  4849. {
  4850. struct qeth_dbf_entry *entry;
  4851. debug_info_t *rc = NULL;
  4852. mutex_lock(&qeth_dbf_list_mutex);
  4853. list_for_each_entry(entry, &qeth_dbf_list, dbf_list) {
  4854. if (strcmp(entry->dbf_name, name) == 0) {
  4855. rc = entry->dbf_info;
  4856. break;
  4857. }
  4858. }
  4859. mutex_unlock(&qeth_dbf_list_mutex);
  4860. return rc;
  4861. }
  4862. static int qeth_add_dbf_entry(struct qeth_card *card, char *name)
  4863. {
  4864. struct qeth_dbf_entry *new_entry;
  4865. card->debug = debug_register(name, 2, 1, 8);
  4866. if (!card->debug) {
  4867. QETH_DBF_TEXT_(SETUP, 2, "%s", "qcdbf");
  4868. goto err;
  4869. }
  4870. if (debug_register_view(card->debug, &debug_hex_ascii_view))
  4871. goto err_dbg;
  4872. new_entry = kzalloc(sizeof(struct qeth_dbf_entry), GFP_KERNEL);
  4873. if (!new_entry)
  4874. goto err_dbg;
  4875. strncpy(new_entry->dbf_name, name, DBF_NAME_LEN);
  4876. new_entry->dbf_info = card->debug;
  4877. mutex_lock(&qeth_dbf_list_mutex);
  4878. list_add(&new_entry->dbf_list, &qeth_dbf_list);
  4879. mutex_unlock(&qeth_dbf_list_mutex);
  4880. return 0;
  4881. err_dbg:
  4882. debug_unregister(card->debug);
  4883. err:
  4884. return -ENOMEM;
  4885. }
  4886. static void qeth_clear_dbf_list(void)
  4887. {
  4888. struct qeth_dbf_entry *entry, *tmp;
  4889. mutex_lock(&qeth_dbf_list_mutex);
  4890. list_for_each_entry_safe(entry, tmp, &qeth_dbf_list, dbf_list) {
  4891. list_del(&entry->dbf_list);
  4892. debug_unregister(entry->dbf_info);
  4893. kfree(entry);
  4894. }
  4895. mutex_unlock(&qeth_dbf_list_mutex);
  4896. }
  4897. static int qeth_core_probe_device(struct ccwgroup_device *gdev)
  4898. {
  4899. struct qeth_card *card;
  4900. struct device *dev;
  4901. int rc;
  4902. unsigned long flags;
  4903. char dbf_name[DBF_NAME_LEN];
  4904. QETH_DBF_TEXT(SETUP, 2, "probedev");
  4905. dev = &gdev->dev;
  4906. if (!get_device(dev))
  4907. return -ENODEV;
  4908. QETH_DBF_TEXT_(SETUP, 2, "%s", dev_name(&gdev->dev));
  4909. card = qeth_alloc_card();
  4910. if (!card) {
  4911. QETH_DBF_TEXT_(SETUP, 2, "1err%d", -ENOMEM);
  4912. rc = -ENOMEM;
  4913. goto err_dev;
  4914. }
  4915. snprintf(dbf_name, sizeof(dbf_name), "qeth_card_%s",
  4916. dev_name(&gdev->dev));
  4917. card->debug = qeth_get_dbf_entry(dbf_name);
  4918. if (!card->debug) {
  4919. rc = qeth_add_dbf_entry(card, dbf_name);
  4920. if (rc)
  4921. goto err_card;
  4922. }
  4923. card->read.ccwdev = gdev->cdev[0];
  4924. card->write.ccwdev = gdev->cdev[1];
  4925. card->data.ccwdev = gdev->cdev[2];
  4926. dev_set_drvdata(&gdev->dev, card);
  4927. card->gdev = gdev;
  4928. gdev->cdev[0]->handler = qeth_irq;
  4929. gdev->cdev[1]->handler = qeth_irq;
  4930. gdev->cdev[2]->handler = qeth_irq;
  4931. rc = qeth_determine_card_type(card);
  4932. if (rc) {
  4933. QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
  4934. goto err_card;
  4935. }
  4936. rc = qeth_setup_card(card);
  4937. if (rc) {
  4938. QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
  4939. goto err_card;
  4940. }
  4941. if (card->info.type == QETH_CARD_TYPE_OSN)
  4942. gdev->dev.type = &qeth_osn_devtype;
  4943. else
  4944. gdev->dev.type = &qeth_generic_devtype;
  4945. switch (card->info.type) {
  4946. case QETH_CARD_TYPE_OSN:
  4947. case QETH_CARD_TYPE_OSM:
  4948. rc = qeth_core_load_discipline(card, QETH_DISCIPLINE_LAYER2);
  4949. if (rc)
  4950. goto err_card;
  4951. rc = card->discipline->setup(card->gdev);
  4952. if (rc)
  4953. goto err_disc;
  4954. case QETH_CARD_TYPE_OSD:
  4955. case QETH_CARD_TYPE_OSX:
  4956. default:
  4957. break;
  4958. }
  4959. write_lock_irqsave(&qeth_core_card_list.rwlock, flags);
  4960. list_add_tail(&card->list, &qeth_core_card_list.list);
  4961. write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags);
  4962. qeth_determine_capabilities(card);
  4963. return 0;
  4964. err_disc:
  4965. qeth_core_free_discipline(card);
  4966. err_card:
  4967. qeth_core_free_card(card);
  4968. err_dev:
  4969. put_device(dev);
  4970. return rc;
  4971. }
  4972. static void qeth_core_remove_device(struct ccwgroup_device *gdev)
  4973. {
  4974. unsigned long flags;
  4975. struct qeth_card *card = dev_get_drvdata(&gdev->dev);
  4976. QETH_DBF_TEXT(SETUP, 2, "removedv");
  4977. if (card->discipline) {
  4978. card->discipline->remove(gdev);
  4979. qeth_core_free_discipline(card);
  4980. }
  4981. write_lock_irqsave(&qeth_core_card_list.rwlock, flags);
  4982. list_del(&card->list);
  4983. write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags);
  4984. qeth_core_free_card(card);
  4985. dev_set_drvdata(&gdev->dev, NULL);
  4986. put_device(&gdev->dev);
  4987. return;
  4988. }
  4989. static int qeth_core_set_online(struct ccwgroup_device *gdev)
  4990. {
  4991. struct qeth_card *card = dev_get_drvdata(&gdev->dev);
  4992. int rc = 0;
  4993. int def_discipline;
  4994. if (!card->discipline) {
  4995. if (card->info.type == QETH_CARD_TYPE_IQD)
  4996. def_discipline = QETH_DISCIPLINE_LAYER3;
  4997. else
  4998. def_discipline = QETH_DISCIPLINE_LAYER2;
  4999. rc = qeth_core_load_discipline(card, def_discipline);
  5000. if (rc)
  5001. goto err;
  5002. rc = card->discipline->setup(card->gdev);
  5003. if (rc)
  5004. goto err;
  5005. }
  5006. rc = card->discipline->set_online(gdev);
  5007. err:
  5008. return rc;
  5009. }
  5010. static int qeth_core_set_offline(struct ccwgroup_device *gdev)
  5011. {
  5012. struct qeth_card *card = dev_get_drvdata(&gdev->dev);
  5013. return card->discipline->set_offline(gdev);
  5014. }
  5015. static void qeth_core_shutdown(struct ccwgroup_device *gdev)
  5016. {
  5017. struct qeth_card *card = dev_get_drvdata(&gdev->dev);
  5018. if (card->discipline && card->discipline->shutdown)
  5019. card->discipline->shutdown(gdev);
  5020. }
  5021. static int qeth_core_prepare(struct ccwgroup_device *gdev)
  5022. {
  5023. struct qeth_card *card = dev_get_drvdata(&gdev->dev);
  5024. if (card->discipline && card->discipline->prepare)
  5025. return card->discipline->prepare(gdev);
  5026. return 0;
  5027. }
  5028. static void qeth_core_complete(struct ccwgroup_device *gdev)
  5029. {
  5030. struct qeth_card *card = dev_get_drvdata(&gdev->dev);
  5031. if (card->discipline && card->discipline->complete)
  5032. card->discipline->complete(gdev);
  5033. }
  5034. static int qeth_core_freeze(struct ccwgroup_device *gdev)
  5035. {
  5036. struct qeth_card *card = dev_get_drvdata(&gdev->dev);
  5037. if (card->discipline && card->discipline->freeze)
  5038. return card->discipline->freeze(gdev);
  5039. return 0;
  5040. }
  5041. static int qeth_core_thaw(struct ccwgroup_device *gdev)
  5042. {
  5043. struct qeth_card *card = dev_get_drvdata(&gdev->dev);
  5044. if (card->discipline && card->discipline->thaw)
  5045. return card->discipline->thaw(gdev);
  5046. return 0;
  5047. }
  5048. static int qeth_core_restore(struct ccwgroup_device *gdev)
  5049. {
  5050. struct qeth_card *card = dev_get_drvdata(&gdev->dev);
  5051. if (card->discipline && card->discipline->restore)
  5052. return card->discipline->restore(gdev);
  5053. return 0;
  5054. }
  5055. static struct ccwgroup_driver qeth_core_ccwgroup_driver = {
  5056. .driver = {
  5057. .owner = THIS_MODULE,
  5058. .name = "qeth",
  5059. },
  5060. .setup = qeth_core_probe_device,
  5061. .remove = qeth_core_remove_device,
  5062. .set_online = qeth_core_set_online,
  5063. .set_offline = qeth_core_set_offline,
  5064. .shutdown = qeth_core_shutdown,
  5065. .prepare = qeth_core_prepare,
  5066. .complete = qeth_core_complete,
  5067. .freeze = qeth_core_freeze,
  5068. .thaw = qeth_core_thaw,
  5069. .restore = qeth_core_restore,
  5070. };
  5071. static ssize_t qeth_core_driver_group_store(struct device_driver *ddrv,
  5072. const char *buf, size_t count)
  5073. {
  5074. int err;
  5075. err = ccwgroup_create_dev(qeth_core_root_dev,
  5076. &qeth_core_ccwgroup_driver, 3, buf);
  5077. return err ? err : count;
  5078. }
  5079. static DRIVER_ATTR(group, 0200, NULL, qeth_core_driver_group_store);
  5080. static struct attribute *qeth_drv_attrs[] = {
  5081. &driver_attr_group.attr,
  5082. NULL,
  5083. };
  5084. static struct attribute_group qeth_drv_attr_group = {
  5085. .attrs = qeth_drv_attrs,
  5086. };
  5087. static const struct attribute_group *qeth_drv_attr_groups[] = {
  5088. &qeth_drv_attr_group,
  5089. NULL,
  5090. };
  5091. static struct {
  5092. const char str[ETH_GSTRING_LEN];
  5093. } qeth_ethtool_stats_keys[] = {
  5094. /* 0 */{"rx skbs"},
  5095. {"rx buffers"},
  5096. {"tx skbs"},
  5097. {"tx buffers"},
  5098. {"tx skbs no packing"},
  5099. {"tx buffers no packing"},
  5100. {"tx skbs packing"},
  5101. {"tx buffers packing"},
  5102. {"tx sg skbs"},
  5103. {"tx sg frags"},
  5104. /* 10 */{"rx sg skbs"},
  5105. {"rx sg frags"},
  5106. {"rx sg page allocs"},
  5107. {"tx large kbytes"},
  5108. {"tx large count"},
  5109. {"tx pk state ch n->p"},
  5110. {"tx pk state ch p->n"},
  5111. {"tx pk watermark low"},
  5112. {"tx pk watermark high"},
  5113. {"queue 0 buffer usage"},
  5114. /* 20 */{"queue 1 buffer usage"},
  5115. {"queue 2 buffer usage"},
  5116. {"queue 3 buffer usage"},
  5117. {"rx poll time"},
  5118. {"rx poll count"},
  5119. {"rx do_QDIO time"},
  5120. {"rx do_QDIO count"},
  5121. {"tx handler time"},
  5122. {"tx handler count"},
  5123. {"tx time"},
  5124. /* 30 */{"tx count"},
  5125. {"tx do_QDIO time"},
  5126. {"tx do_QDIO count"},
  5127. {"tx csum"},
  5128. {"tx lin"},
  5129. {"cq handler count"},
  5130. {"cq handler time"}
  5131. };
  5132. int qeth_core_get_sset_count(struct net_device *dev, int stringset)
  5133. {
  5134. switch (stringset) {
  5135. case ETH_SS_STATS:
  5136. return (sizeof(qeth_ethtool_stats_keys) / ETH_GSTRING_LEN);
  5137. default:
  5138. return -EINVAL;
  5139. }
  5140. }
  5141. EXPORT_SYMBOL_GPL(qeth_core_get_sset_count);
  5142. void qeth_core_get_ethtool_stats(struct net_device *dev,
  5143. struct ethtool_stats *stats, u64 *data)
  5144. {
  5145. struct qeth_card *card = dev->ml_priv;
  5146. data[0] = card->stats.rx_packets -
  5147. card->perf_stats.initial_rx_packets;
  5148. data[1] = card->perf_stats.bufs_rec;
  5149. data[2] = card->stats.tx_packets -
  5150. card->perf_stats.initial_tx_packets;
  5151. data[3] = card->perf_stats.bufs_sent;
  5152. data[4] = card->stats.tx_packets - card->perf_stats.initial_tx_packets
  5153. - card->perf_stats.skbs_sent_pack;
  5154. data[5] = card->perf_stats.bufs_sent - card->perf_stats.bufs_sent_pack;
  5155. data[6] = card->perf_stats.skbs_sent_pack;
  5156. data[7] = card->perf_stats.bufs_sent_pack;
  5157. data[8] = card->perf_stats.sg_skbs_sent;
  5158. data[9] = card->perf_stats.sg_frags_sent;
  5159. data[10] = card->perf_stats.sg_skbs_rx;
  5160. data[11] = card->perf_stats.sg_frags_rx;
  5161. data[12] = card->perf_stats.sg_alloc_page_rx;
  5162. data[13] = (card->perf_stats.large_send_bytes >> 10);
  5163. data[14] = card->perf_stats.large_send_cnt;
  5164. data[15] = card->perf_stats.sc_dp_p;
  5165. data[16] = card->perf_stats.sc_p_dp;
  5166. data[17] = QETH_LOW_WATERMARK_PACK;
  5167. data[18] = QETH_HIGH_WATERMARK_PACK;
  5168. data[19] = atomic_read(&card->qdio.out_qs[0]->used_buffers);
  5169. data[20] = (card->qdio.no_out_queues > 1) ?
  5170. atomic_read(&card->qdio.out_qs[1]->used_buffers) : 0;
  5171. data[21] = (card->qdio.no_out_queues > 2) ?
  5172. atomic_read(&card->qdio.out_qs[2]->used_buffers) : 0;
  5173. data[22] = (card->qdio.no_out_queues > 3) ?
  5174. atomic_read(&card->qdio.out_qs[3]->used_buffers) : 0;
  5175. data[23] = card->perf_stats.inbound_time;
  5176. data[24] = card->perf_stats.inbound_cnt;
  5177. data[25] = card->perf_stats.inbound_do_qdio_time;
  5178. data[26] = card->perf_stats.inbound_do_qdio_cnt;
  5179. data[27] = card->perf_stats.outbound_handler_time;
  5180. data[28] = card->perf_stats.outbound_handler_cnt;
  5181. data[29] = card->perf_stats.outbound_time;
  5182. data[30] = card->perf_stats.outbound_cnt;
  5183. data[31] = card->perf_stats.outbound_do_qdio_time;
  5184. data[32] = card->perf_stats.outbound_do_qdio_cnt;
  5185. data[33] = card->perf_stats.tx_csum;
  5186. data[34] = card->perf_stats.tx_lin;
  5187. data[35] = card->perf_stats.cq_cnt;
  5188. data[36] = card->perf_stats.cq_time;
  5189. }
  5190. EXPORT_SYMBOL_GPL(qeth_core_get_ethtool_stats);
  5191. void qeth_core_get_strings(struct net_device *dev, u32 stringset, u8 *data)
  5192. {
  5193. switch (stringset) {
  5194. case ETH_SS_STATS:
  5195. memcpy(data, &qeth_ethtool_stats_keys,
  5196. sizeof(qeth_ethtool_stats_keys));
  5197. break;
  5198. default:
  5199. WARN_ON(1);
  5200. break;
  5201. }
  5202. }
  5203. EXPORT_SYMBOL_GPL(qeth_core_get_strings);
  5204. void qeth_core_get_drvinfo(struct net_device *dev,
  5205. struct ethtool_drvinfo *info)
  5206. {
  5207. struct qeth_card *card = dev->ml_priv;
  5208. strlcpy(info->driver, card->options.layer2 ? "qeth_l2" : "qeth_l3",
  5209. sizeof(info->driver));
  5210. strlcpy(info->version, "1.0", sizeof(info->version));
  5211. strlcpy(info->fw_version, card->info.mcl_level,
  5212. sizeof(info->fw_version));
  5213. snprintf(info->bus_info, sizeof(info->bus_info), "%s/%s/%s",
  5214. CARD_RDEV_ID(card), CARD_WDEV_ID(card), CARD_DDEV_ID(card));
  5215. }
  5216. EXPORT_SYMBOL_GPL(qeth_core_get_drvinfo);
  5217. /* Helper function to fill 'advertizing' and 'supported' which are the same. */
  5218. /* Autoneg and full-duplex are supported and advertized uncondionally. */
  5219. /* Always advertize and support all speeds up to specified, and only one */
  5220. /* specified port type. */
  5221. static void qeth_set_ecmd_adv_sup(struct ethtool_cmd *ecmd,
  5222. int maxspeed, int porttype)
  5223. {
  5224. int port_sup, port_adv, spd_sup, spd_adv;
  5225. switch (porttype) {
  5226. case PORT_TP:
  5227. port_sup = SUPPORTED_TP;
  5228. port_adv = ADVERTISED_TP;
  5229. break;
  5230. case PORT_FIBRE:
  5231. port_sup = SUPPORTED_FIBRE;
  5232. port_adv = ADVERTISED_FIBRE;
  5233. break;
  5234. default:
  5235. port_sup = SUPPORTED_TP;
  5236. port_adv = ADVERTISED_TP;
  5237. WARN_ON_ONCE(1);
  5238. }
  5239. /* "Fallthrough" case'es ordered from high to low result in setting */
  5240. /* flags cumulatively, starting from the specified speed and down to */
  5241. /* the lowest possible. */
  5242. spd_sup = 0;
  5243. spd_adv = 0;
  5244. switch (maxspeed) {
  5245. case SPEED_10000:
  5246. spd_sup |= SUPPORTED_10000baseT_Full;
  5247. spd_adv |= ADVERTISED_10000baseT_Full;
  5248. case SPEED_1000:
  5249. spd_sup |= SUPPORTED_1000baseT_Half | SUPPORTED_1000baseT_Full;
  5250. spd_adv |= ADVERTISED_1000baseT_Half |
  5251. ADVERTISED_1000baseT_Full;
  5252. case SPEED_100:
  5253. spd_sup |= SUPPORTED_100baseT_Half | SUPPORTED_100baseT_Full;
  5254. spd_adv |= ADVERTISED_100baseT_Half | ADVERTISED_100baseT_Full;
  5255. case SPEED_10:
  5256. spd_sup |= SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full;
  5257. spd_adv |= ADVERTISED_10baseT_Half | ADVERTISED_10baseT_Full;
  5258. break;
  5259. default:
  5260. spd_sup = SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full;
  5261. spd_adv = ADVERTISED_10baseT_Half | ADVERTISED_10baseT_Full;
  5262. WARN_ON_ONCE(1);
  5263. }
  5264. ecmd->advertising = ADVERTISED_Autoneg | port_adv | spd_adv;
  5265. ecmd->supported = SUPPORTED_Autoneg | port_sup | spd_sup;
  5266. }
  5267. int qeth_core_ethtool_get_settings(struct net_device *netdev,
  5268. struct ethtool_cmd *ecmd)
  5269. {
  5270. struct qeth_card *card = netdev->ml_priv;
  5271. enum qeth_link_types link_type;
  5272. struct carrier_info carrier_info;
  5273. int rc;
  5274. u32 speed;
  5275. if ((card->info.type == QETH_CARD_TYPE_IQD) || (card->info.guestlan))
  5276. link_type = QETH_LINK_TYPE_10GBIT_ETH;
  5277. else
  5278. link_type = card->info.link_type;
  5279. ecmd->transceiver = XCVR_INTERNAL;
  5280. ecmd->duplex = DUPLEX_FULL;
  5281. ecmd->autoneg = AUTONEG_ENABLE;
  5282. switch (link_type) {
  5283. case QETH_LINK_TYPE_FAST_ETH:
  5284. case QETH_LINK_TYPE_LANE_ETH100:
  5285. qeth_set_ecmd_adv_sup(ecmd, SPEED_100, PORT_TP);
  5286. speed = SPEED_100;
  5287. ecmd->port = PORT_TP;
  5288. break;
  5289. case QETH_LINK_TYPE_GBIT_ETH:
  5290. case QETH_LINK_TYPE_LANE_ETH1000:
  5291. qeth_set_ecmd_adv_sup(ecmd, SPEED_1000, PORT_FIBRE);
  5292. speed = SPEED_1000;
  5293. ecmd->port = PORT_FIBRE;
  5294. break;
  5295. case QETH_LINK_TYPE_10GBIT_ETH:
  5296. qeth_set_ecmd_adv_sup(ecmd, SPEED_10000, PORT_FIBRE);
  5297. speed = SPEED_10000;
  5298. ecmd->port = PORT_FIBRE;
  5299. break;
  5300. default:
  5301. qeth_set_ecmd_adv_sup(ecmd, SPEED_10, PORT_TP);
  5302. speed = SPEED_10;
  5303. ecmd->port = PORT_TP;
  5304. }
  5305. ethtool_cmd_speed_set(ecmd, speed);
  5306. /* Check if we can obtain more accurate information. */
  5307. /* If QUERY_CARD_INFO command is not supported or fails, */
  5308. /* just return the heuristics that was filled above. */
  5309. if (!qeth_card_hw_is_reachable(card))
  5310. return -ENODEV;
  5311. rc = qeth_query_card_info(card, &carrier_info);
  5312. if (rc == -EOPNOTSUPP) /* for old hardware, return heuristic */
  5313. return 0;
  5314. if (rc) /* report error from the hardware operation */
  5315. return rc;
  5316. /* on success, fill in the information got from the hardware */
  5317. netdev_dbg(netdev,
  5318. "card info: card_type=0x%02x, port_mode=0x%04x, port_speed=0x%08x\n",
  5319. carrier_info.card_type,
  5320. carrier_info.port_mode,
  5321. carrier_info.port_speed);
  5322. /* Update attributes for which we've obtained more authoritative */
  5323. /* information, leave the rest the way they where filled above. */
  5324. switch (carrier_info.card_type) {
  5325. case CARD_INFO_TYPE_1G_COPPER_A:
  5326. case CARD_INFO_TYPE_1G_COPPER_B:
  5327. qeth_set_ecmd_adv_sup(ecmd, SPEED_1000, PORT_TP);
  5328. ecmd->port = PORT_TP;
  5329. break;
  5330. case CARD_INFO_TYPE_1G_FIBRE_A:
  5331. case CARD_INFO_TYPE_1G_FIBRE_B:
  5332. qeth_set_ecmd_adv_sup(ecmd, SPEED_1000, PORT_FIBRE);
  5333. ecmd->port = PORT_FIBRE;
  5334. break;
  5335. case CARD_INFO_TYPE_10G_FIBRE_A:
  5336. case CARD_INFO_TYPE_10G_FIBRE_B:
  5337. qeth_set_ecmd_adv_sup(ecmd, SPEED_10000, PORT_FIBRE);
  5338. ecmd->port = PORT_FIBRE;
  5339. break;
  5340. }
  5341. switch (carrier_info.port_mode) {
  5342. case CARD_INFO_PORTM_FULLDUPLEX:
  5343. ecmd->duplex = DUPLEX_FULL;
  5344. break;
  5345. case CARD_INFO_PORTM_HALFDUPLEX:
  5346. ecmd->duplex = DUPLEX_HALF;
  5347. break;
  5348. }
  5349. switch (carrier_info.port_speed) {
  5350. case CARD_INFO_PORTS_10M:
  5351. speed = SPEED_10;
  5352. break;
  5353. case CARD_INFO_PORTS_100M:
  5354. speed = SPEED_100;
  5355. break;
  5356. case CARD_INFO_PORTS_1G:
  5357. speed = SPEED_1000;
  5358. break;
  5359. case CARD_INFO_PORTS_10G:
  5360. speed = SPEED_10000;
  5361. break;
  5362. }
  5363. ethtool_cmd_speed_set(ecmd, speed);
  5364. return 0;
  5365. }
  5366. EXPORT_SYMBOL_GPL(qeth_core_ethtool_get_settings);
  5367. static int __init qeth_core_init(void)
  5368. {
  5369. int rc;
  5370. pr_info("loading core functions\n");
  5371. INIT_LIST_HEAD(&qeth_core_card_list.list);
  5372. INIT_LIST_HEAD(&qeth_dbf_list);
  5373. rwlock_init(&qeth_core_card_list.rwlock);
  5374. mutex_init(&qeth_mod_mutex);
  5375. qeth_wq = create_singlethread_workqueue("qeth_wq");
  5376. rc = qeth_register_dbf_views();
  5377. if (rc)
  5378. goto out_err;
  5379. qeth_core_root_dev = root_device_register("qeth");
  5380. rc = PTR_ERR_OR_ZERO(qeth_core_root_dev);
  5381. if (rc)
  5382. goto register_err;
  5383. qeth_core_header_cache = kmem_cache_create("qeth_hdr",
  5384. sizeof(struct qeth_hdr) + ETH_HLEN, 64, 0, NULL);
  5385. if (!qeth_core_header_cache) {
  5386. rc = -ENOMEM;
  5387. goto slab_err;
  5388. }
  5389. qeth_qdio_outbuf_cache = kmem_cache_create("qeth_buf",
  5390. sizeof(struct qeth_qdio_out_buffer), 0, 0, NULL);
  5391. if (!qeth_qdio_outbuf_cache) {
  5392. rc = -ENOMEM;
  5393. goto cqslab_err;
  5394. }
  5395. rc = ccw_driver_register(&qeth_ccw_driver);
  5396. if (rc)
  5397. goto ccw_err;
  5398. qeth_core_ccwgroup_driver.driver.groups = qeth_drv_attr_groups;
  5399. rc = ccwgroup_driver_register(&qeth_core_ccwgroup_driver);
  5400. if (rc)
  5401. goto ccwgroup_err;
  5402. return 0;
  5403. ccwgroup_err:
  5404. ccw_driver_unregister(&qeth_ccw_driver);
  5405. ccw_err:
  5406. kmem_cache_destroy(qeth_qdio_outbuf_cache);
  5407. cqslab_err:
  5408. kmem_cache_destroy(qeth_core_header_cache);
  5409. slab_err:
  5410. root_device_unregister(qeth_core_root_dev);
  5411. register_err:
  5412. qeth_unregister_dbf_views();
  5413. out_err:
  5414. pr_err("Initializing the qeth device driver failed\n");
  5415. return rc;
  5416. }
  5417. static void __exit qeth_core_exit(void)
  5418. {
  5419. qeth_clear_dbf_list();
  5420. destroy_workqueue(qeth_wq);
  5421. ccwgroup_driver_unregister(&qeth_core_ccwgroup_driver);
  5422. ccw_driver_unregister(&qeth_ccw_driver);
  5423. kmem_cache_destroy(qeth_qdio_outbuf_cache);
  5424. kmem_cache_destroy(qeth_core_header_cache);
  5425. root_device_unregister(qeth_core_root_dev);
  5426. qeth_unregister_dbf_views();
  5427. pr_info("core functions removed\n");
  5428. }
  5429. module_init(qeth_core_init);
  5430. module_exit(qeth_core_exit);
  5431. MODULE_AUTHOR("Frank Blaschka <frank.blaschka@de.ibm.com>");
  5432. MODULE_DESCRIPTION("qeth core functions");
  5433. MODULE_LICENSE("GPL");