qcom_rpm-regulator.c 27 KB

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  1. /*
  2. * Copyright (c) 2014, Sony Mobile Communications AB.
  3. * Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License version 2 and
  7. * only version 2 as published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful,
  10. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. * GNU General Public License for more details.
  13. */
  14. #include <linux/module.h>
  15. #include <linux/platform_device.h>
  16. #include <linux/of.h>
  17. #include <linux/of_device.h>
  18. #include <linux/regulator/driver.h>
  19. #include <linux/regulator/machine.h>
  20. #include <linux/regulator/of_regulator.h>
  21. #include <linux/mfd/qcom_rpm.h>
  22. #include <dt-bindings/mfd/qcom-rpm.h>
  23. #define MAX_REQUEST_LEN 2
  24. struct request_member {
  25. int word;
  26. unsigned int mask;
  27. int shift;
  28. };
  29. struct rpm_reg_parts {
  30. struct request_member mV; /* used if voltage is in mV */
  31. struct request_member uV; /* used if voltage is in uV */
  32. struct request_member ip; /* peak current in mA */
  33. struct request_member pd; /* pull down enable */
  34. struct request_member ia; /* average current in mA */
  35. struct request_member fm; /* force mode */
  36. struct request_member pm; /* power mode */
  37. struct request_member pc; /* pin control */
  38. struct request_member pf; /* pin function */
  39. struct request_member enable_state; /* NCP and switch */
  40. struct request_member comp_mode; /* NCP */
  41. struct request_member freq; /* frequency: NCP and SMPS */
  42. struct request_member freq_clk_src; /* clock source: SMPS */
  43. struct request_member hpm; /* switch: control OCP and SS */
  44. int request_len;
  45. };
  46. #define FORCE_MODE_IS_2_BITS(reg) \
  47. (((reg)->parts->fm.mask >> (reg)->parts->fm.shift) == 3)
  48. struct qcom_rpm_reg {
  49. struct qcom_rpm *rpm;
  50. struct mutex lock;
  51. struct device *dev;
  52. struct regulator_desc desc;
  53. const struct rpm_reg_parts *parts;
  54. int resource;
  55. u32 val[MAX_REQUEST_LEN];
  56. int uV;
  57. int is_enabled;
  58. bool supports_force_mode_auto;
  59. bool supports_force_mode_bypass;
  60. };
  61. static const struct rpm_reg_parts rpm8660_ldo_parts = {
  62. .request_len = 2,
  63. .mV = { 0, 0x00000FFF, 0 },
  64. .ip = { 0, 0x00FFF000, 12 },
  65. .fm = { 0, 0x03000000, 24 },
  66. .pc = { 0, 0x3C000000, 26 },
  67. .pf = { 0, 0xC0000000, 30 },
  68. .pd = { 1, 0x00000001, 0 },
  69. .ia = { 1, 0x00001FFE, 1 },
  70. };
  71. static const struct rpm_reg_parts rpm8660_smps_parts = {
  72. .request_len = 2,
  73. .mV = { 0, 0x00000FFF, 0 },
  74. .ip = { 0, 0x00FFF000, 12 },
  75. .fm = { 0, 0x03000000, 24 },
  76. .pc = { 0, 0x3C000000, 26 },
  77. .pf = { 0, 0xC0000000, 30 },
  78. .pd = { 1, 0x00000001, 0 },
  79. .ia = { 1, 0x00001FFE, 1 },
  80. .freq = { 1, 0x001FE000, 13 },
  81. .freq_clk_src = { 1, 0x00600000, 21 },
  82. };
  83. static const struct rpm_reg_parts rpm8660_switch_parts = {
  84. .request_len = 1,
  85. .enable_state = { 0, 0x00000001, 0 },
  86. .pd = { 0, 0x00000002, 1 },
  87. .pc = { 0, 0x0000003C, 2 },
  88. .pf = { 0, 0x000000C0, 6 },
  89. .hpm = { 0, 0x00000300, 8 },
  90. };
  91. static const struct rpm_reg_parts rpm8660_ncp_parts = {
  92. .request_len = 1,
  93. .mV = { 0, 0x00000FFF, 0 },
  94. .enable_state = { 0, 0x00001000, 12 },
  95. .comp_mode = { 0, 0x00002000, 13 },
  96. .freq = { 0, 0x003FC000, 14 },
  97. };
  98. static const struct rpm_reg_parts rpm8960_ldo_parts = {
  99. .request_len = 2,
  100. .uV = { 0, 0x007FFFFF, 0 },
  101. .pd = { 0, 0x00800000, 23 },
  102. .pc = { 0, 0x0F000000, 24 },
  103. .pf = { 0, 0xF0000000, 28 },
  104. .ip = { 1, 0x000003FF, 0 },
  105. .ia = { 1, 0x000FFC00, 10 },
  106. .fm = { 1, 0x00700000, 20 },
  107. };
  108. static const struct rpm_reg_parts rpm8960_smps_parts = {
  109. .request_len = 2,
  110. .uV = { 0, 0x007FFFFF, 0 },
  111. .pd = { 0, 0x00800000, 23 },
  112. .pc = { 0, 0x0F000000, 24 },
  113. .pf = { 0, 0xF0000000, 28 },
  114. .ip = { 1, 0x000003FF, 0 },
  115. .ia = { 1, 0x000FFC00, 10 },
  116. .fm = { 1, 0x00700000, 20 },
  117. .pm = { 1, 0x00800000, 23 },
  118. .freq = { 1, 0x1F000000, 24 },
  119. .freq_clk_src = { 1, 0x60000000, 29 },
  120. };
  121. static const struct rpm_reg_parts rpm8960_switch_parts = {
  122. .request_len = 1,
  123. .enable_state = { 0, 0x00000001, 0 },
  124. .pd = { 0, 0x00000002, 1 },
  125. .pc = { 0, 0x0000003C, 2 },
  126. .pf = { 0, 0x000003C0, 6 },
  127. .hpm = { 0, 0x00000C00, 10 },
  128. };
  129. static const struct rpm_reg_parts rpm8960_ncp_parts = {
  130. .request_len = 1,
  131. .uV = { 0, 0x007FFFFF, 0 },
  132. .enable_state = { 0, 0x00800000, 23 },
  133. .comp_mode = { 0, 0x01000000, 24 },
  134. .freq = { 0, 0x3E000000, 25 },
  135. };
  136. /*
  137. * Physically available PMIC regulator voltage ranges
  138. */
  139. static const struct regulator_linear_range pldo_ranges[] = {
  140. REGULATOR_LINEAR_RANGE( 750000, 0, 59, 12500),
  141. REGULATOR_LINEAR_RANGE(1500000, 60, 123, 25000),
  142. REGULATOR_LINEAR_RANGE(3100000, 124, 160, 50000),
  143. };
  144. static const struct regulator_linear_range nldo_ranges[] = {
  145. REGULATOR_LINEAR_RANGE( 750000, 0, 63, 12500),
  146. };
  147. static const struct regulator_linear_range nldo1200_ranges[] = {
  148. REGULATOR_LINEAR_RANGE( 375000, 0, 59, 6250),
  149. REGULATOR_LINEAR_RANGE( 750000, 60, 123, 12500),
  150. };
  151. static const struct regulator_linear_range smps_ranges[] = {
  152. REGULATOR_LINEAR_RANGE( 375000, 0, 29, 12500),
  153. REGULATOR_LINEAR_RANGE( 750000, 30, 89, 12500),
  154. REGULATOR_LINEAR_RANGE(1500000, 90, 153, 25000),
  155. };
  156. static const struct regulator_linear_range ftsmps_ranges[] = {
  157. REGULATOR_LINEAR_RANGE( 350000, 0, 6, 50000),
  158. REGULATOR_LINEAR_RANGE( 700000, 7, 63, 12500),
  159. REGULATOR_LINEAR_RANGE(1500000, 64, 100, 50000),
  160. };
  161. static const struct regulator_linear_range smb208_ranges[] = {
  162. REGULATOR_LINEAR_RANGE( 375000, 0, 29, 12500),
  163. REGULATOR_LINEAR_RANGE( 750000, 30, 89, 12500),
  164. REGULATOR_LINEAR_RANGE(1500000, 90, 153, 25000),
  165. REGULATOR_LINEAR_RANGE(3100000, 154, 234, 25000),
  166. };
  167. static const struct regulator_linear_range ncp_ranges[] = {
  168. REGULATOR_LINEAR_RANGE(1500000, 0, 31, 50000),
  169. };
  170. static int rpm_reg_write(struct qcom_rpm_reg *vreg,
  171. const struct request_member *req,
  172. const int value)
  173. {
  174. if (WARN_ON((value << req->shift) & ~req->mask))
  175. return -EINVAL;
  176. vreg->val[req->word] &= ~req->mask;
  177. vreg->val[req->word] |= value << req->shift;
  178. return qcom_rpm_write(vreg->rpm,
  179. QCOM_RPM_ACTIVE_STATE,
  180. vreg->resource,
  181. vreg->val,
  182. vreg->parts->request_len);
  183. }
  184. static int rpm_reg_set_mV_sel(struct regulator_dev *rdev,
  185. unsigned selector)
  186. {
  187. struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
  188. const struct rpm_reg_parts *parts = vreg->parts;
  189. const struct request_member *req = &parts->mV;
  190. int ret = 0;
  191. int uV;
  192. if (req->mask == 0)
  193. return -EINVAL;
  194. uV = regulator_list_voltage_linear_range(rdev, selector);
  195. if (uV < 0)
  196. return uV;
  197. mutex_lock(&vreg->lock);
  198. if (vreg->is_enabled)
  199. ret = rpm_reg_write(vreg, req, uV / 1000);
  200. if (!ret)
  201. vreg->uV = uV;
  202. mutex_unlock(&vreg->lock);
  203. return ret;
  204. }
  205. static int rpm_reg_set_uV_sel(struct regulator_dev *rdev,
  206. unsigned selector)
  207. {
  208. struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
  209. const struct rpm_reg_parts *parts = vreg->parts;
  210. const struct request_member *req = &parts->uV;
  211. int ret = 0;
  212. int uV;
  213. if (req->mask == 0)
  214. return -EINVAL;
  215. uV = regulator_list_voltage_linear_range(rdev, selector);
  216. if (uV < 0)
  217. return uV;
  218. mutex_lock(&vreg->lock);
  219. if (vreg->is_enabled)
  220. ret = rpm_reg_write(vreg, req, uV);
  221. if (!ret)
  222. vreg->uV = uV;
  223. mutex_unlock(&vreg->lock);
  224. return ret;
  225. }
  226. static int rpm_reg_get_voltage(struct regulator_dev *rdev)
  227. {
  228. struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
  229. return vreg->uV;
  230. }
  231. static int rpm_reg_mV_enable(struct regulator_dev *rdev)
  232. {
  233. struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
  234. const struct rpm_reg_parts *parts = vreg->parts;
  235. const struct request_member *req = &parts->mV;
  236. int ret;
  237. if (req->mask == 0)
  238. return -EINVAL;
  239. mutex_lock(&vreg->lock);
  240. ret = rpm_reg_write(vreg, req, vreg->uV / 1000);
  241. if (!ret)
  242. vreg->is_enabled = 1;
  243. mutex_unlock(&vreg->lock);
  244. return ret;
  245. }
  246. static int rpm_reg_uV_enable(struct regulator_dev *rdev)
  247. {
  248. struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
  249. const struct rpm_reg_parts *parts = vreg->parts;
  250. const struct request_member *req = &parts->uV;
  251. int ret;
  252. if (req->mask == 0)
  253. return -EINVAL;
  254. mutex_lock(&vreg->lock);
  255. ret = rpm_reg_write(vreg, req, vreg->uV);
  256. if (!ret)
  257. vreg->is_enabled = 1;
  258. mutex_unlock(&vreg->lock);
  259. return ret;
  260. }
  261. static int rpm_reg_switch_enable(struct regulator_dev *rdev)
  262. {
  263. struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
  264. const struct rpm_reg_parts *parts = vreg->parts;
  265. const struct request_member *req = &parts->enable_state;
  266. int ret;
  267. if (req->mask == 0)
  268. return -EINVAL;
  269. mutex_lock(&vreg->lock);
  270. ret = rpm_reg_write(vreg, req, 1);
  271. if (!ret)
  272. vreg->is_enabled = 1;
  273. mutex_unlock(&vreg->lock);
  274. return ret;
  275. }
  276. static int rpm_reg_mV_disable(struct regulator_dev *rdev)
  277. {
  278. struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
  279. const struct rpm_reg_parts *parts = vreg->parts;
  280. const struct request_member *req = &parts->mV;
  281. int ret;
  282. if (req->mask == 0)
  283. return -EINVAL;
  284. mutex_lock(&vreg->lock);
  285. ret = rpm_reg_write(vreg, req, 0);
  286. if (!ret)
  287. vreg->is_enabled = 0;
  288. mutex_unlock(&vreg->lock);
  289. return ret;
  290. }
  291. static int rpm_reg_uV_disable(struct regulator_dev *rdev)
  292. {
  293. struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
  294. const struct rpm_reg_parts *parts = vreg->parts;
  295. const struct request_member *req = &parts->uV;
  296. int ret;
  297. if (req->mask == 0)
  298. return -EINVAL;
  299. mutex_lock(&vreg->lock);
  300. ret = rpm_reg_write(vreg, req, 0);
  301. if (!ret)
  302. vreg->is_enabled = 0;
  303. mutex_unlock(&vreg->lock);
  304. return ret;
  305. }
  306. static int rpm_reg_switch_disable(struct regulator_dev *rdev)
  307. {
  308. struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
  309. const struct rpm_reg_parts *parts = vreg->parts;
  310. const struct request_member *req = &parts->enable_state;
  311. int ret;
  312. if (req->mask == 0)
  313. return -EINVAL;
  314. mutex_lock(&vreg->lock);
  315. ret = rpm_reg_write(vreg, req, 0);
  316. if (!ret)
  317. vreg->is_enabled = 0;
  318. mutex_unlock(&vreg->lock);
  319. return ret;
  320. }
  321. static int rpm_reg_is_enabled(struct regulator_dev *rdev)
  322. {
  323. struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
  324. return vreg->is_enabled;
  325. }
  326. static int rpm_reg_set_load(struct regulator_dev *rdev, int load_uA)
  327. {
  328. struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
  329. const struct rpm_reg_parts *parts = vreg->parts;
  330. const struct request_member *req = &parts->ia;
  331. int load_mA = load_uA / 1000;
  332. int max_mA = req->mask >> req->shift;
  333. int ret;
  334. if (req->mask == 0)
  335. return -EINVAL;
  336. if (load_mA > max_mA)
  337. load_mA = max_mA;
  338. mutex_lock(&vreg->lock);
  339. ret = rpm_reg_write(vreg, req, load_mA);
  340. mutex_unlock(&vreg->lock);
  341. return ret;
  342. }
  343. static struct regulator_ops uV_ops = {
  344. .list_voltage = regulator_list_voltage_linear_range,
  345. .set_voltage_sel = rpm_reg_set_uV_sel,
  346. .get_voltage = rpm_reg_get_voltage,
  347. .enable = rpm_reg_uV_enable,
  348. .disable = rpm_reg_uV_disable,
  349. .is_enabled = rpm_reg_is_enabled,
  350. .set_load = rpm_reg_set_load,
  351. };
  352. static struct regulator_ops mV_ops = {
  353. .list_voltage = regulator_list_voltage_linear_range,
  354. .set_voltage_sel = rpm_reg_set_mV_sel,
  355. .get_voltage = rpm_reg_get_voltage,
  356. .enable = rpm_reg_mV_enable,
  357. .disable = rpm_reg_mV_disable,
  358. .is_enabled = rpm_reg_is_enabled,
  359. .set_load = rpm_reg_set_load,
  360. };
  361. static struct regulator_ops switch_ops = {
  362. .enable = rpm_reg_switch_enable,
  363. .disable = rpm_reg_switch_disable,
  364. .is_enabled = rpm_reg_is_enabled,
  365. };
  366. /*
  367. * PM8058 regulators
  368. */
  369. static const struct qcom_rpm_reg pm8058_pldo = {
  370. .desc.linear_ranges = pldo_ranges,
  371. .desc.n_linear_ranges = ARRAY_SIZE(pldo_ranges),
  372. .desc.n_voltages = 161,
  373. .desc.ops = &mV_ops,
  374. .parts = &rpm8660_ldo_parts,
  375. .supports_force_mode_auto = false,
  376. .supports_force_mode_bypass = false,
  377. };
  378. static const struct qcom_rpm_reg pm8058_nldo = {
  379. .desc.linear_ranges = nldo_ranges,
  380. .desc.n_linear_ranges = ARRAY_SIZE(nldo_ranges),
  381. .desc.n_voltages = 64,
  382. .desc.ops = &mV_ops,
  383. .parts = &rpm8660_ldo_parts,
  384. .supports_force_mode_auto = false,
  385. .supports_force_mode_bypass = false,
  386. };
  387. static const struct qcom_rpm_reg pm8058_smps = {
  388. .desc.linear_ranges = smps_ranges,
  389. .desc.n_linear_ranges = ARRAY_SIZE(smps_ranges),
  390. .desc.n_voltages = 154,
  391. .desc.ops = &mV_ops,
  392. .parts = &rpm8660_smps_parts,
  393. .supports_force_mode_auto = false,
  394. .supports_force_mode_bypass = false,
  395. };
  396. static const struct qcom_rpm_reg pm8058_ncp = {
  397. .desc.linear_ranges = ncp_ranges,
  398. .desc.n_linear_ranges = ARRAY_SIZE(ncp_ranges),
  399. .desc.n_voltages = 32,
  400. .desc.ops = &mV_ops,
  401. .parts = &rpm8660_ncp_parts,
  402. };
  403. static const struct qcom_rpm_reg pm8058_switch = {
  404. .desc.ops = &switch_ops,
  405. .parts = &rpm8660_switch_parts,
  406. };
  407. /*
  408. * PM8901 regulators
  409. */
  410. static const struct qcom_rpm_reg pm8901_pldo = {
  411. .desc.linear_ranges = pldo_ranges,
  412. .desc.n_linear_ranges = ARRAY_SIZE(pldo_ranges),
  413. .desc.n_voltages = 161,
  414. .desc.ops = &mV_ops,
  415. .parts = &rpm8660_ldo_parts,
  416. .supports_force_mode_auto = false,
  417. .supports_force_mode_bypass = true,
  418. };
  419. static const struct qcom_rpm_reg pm8901_nldo = {
  420. .desc.linear_ranges = nldo_ranges,
  421. .desc.n_linear_ranges = ARRAY_SIZE(nldo_ranges),
  422. .desc.n_voltages = 64,
  423. .desc.ops = &mV_ops,
  424. .parts = &rpm8660_ldo_parts,
  425. .supports_force_mode_auto = false,
  426. .supports_force_mode_bypass = true,
  427. };
  428. static const struct qcom_rpm_reg pm8901_ftsmps = {
  429. .desc.linear_ranges = ftsmps_ranges,
  430. .desc.n_linear_ranges = ARRAY_SIZE(ftsmps_ranges),
  431. .desc.n_voltages = 101,
  432. .desc.ops = &mV_ops,
  433. .parts = &rpm8660_smps_parts,
  434. .supports_force_mode_auto = true,
  435. .supports_force_mode_bypass = false,
  436. };
  437. static const struct qcom_rpm_reg pm8901_switch = {
  438. .desc.ops = &switch_ops,
  439. .parts = &rpm8660_switch_parts,
  440. };
  441. /*
  442. * PM8921 regulators
  443. */
  444. static const struct qcom_rpm_reg pm8921_pldo = {
  445. .desc.linear_ranges = pldo_ranges,
  446. .desc.n_linear_ranges = ARRAY_SIZE(pldo_ranges),
  447. .desc.n_voltages = 161,
  448. .desc.ops = &uV_ops,
  449. .parts = &rpm8960_ldo_parts,
  450. .supports_force_mode_auto = false,
  451. .supports_force_mode_bypass = true,
  452. };
  453. static const struct qcom_rpm_reg pm8921_nldo = {
  454. .desc.linear_ranges = nldo_ranges,
  455. .desc.n_linear_ranges = ARRAY_SIZE(nldo_ranges),
  456. .desc.n_voltages = 64,
  457. .desc.ops = &uV_ops,
  458. .parts = &rpm8960_ldo_parts,
  459. .supports_force_mode_auto = false,
  460. .supports_force_mode_bypass = true,
  461. };
  462. static const struct qcom_rpm_reg pm8921_nldo1200 = {
  463. .desc.linear_ranges = nldo1200_ranges,
  464. .desc.n_linear_ranges = ARRAY_SIZE(nldo1200_ranges),
  465. .desc.n_voltages = 124,
  466. .desc.ops = &uV_ops,
  467. .parts = &rpm8960_ldo_parts,
  468. .supports_force_mode_auto = false,
  469. .supports_force_mode_bypass = true,
  470. };
  471. static const struct qcom_rpm_reg pm8921_smps = {
  472. .desc.linear_ranges = smps_ranges,
  473. .desc.n_linear_ranges = ARRAY_SIZE(smps_ranges),
  474. .desc.n_voltages = 154,
  475. .desc.ops = &uV_ops,
  476. .parts = &rpm8960_smps_parts,
  477. .supports_force_mode_auto = true,
  478. .supports_force_mode_bypass = false,
  479. };
  480. static const struct qcom_rpm_reg pm8921_ftsmps = {
  481. .desc.linear_ranges = ftsmps_ranges,
  482. .desc.n_linear_ranges = ARRAY_SIZE(ftsmps_ranges),
  483. .desc.n_voltages = 101,
  484. .desc.ops = &uV_ops,
  485. .parts = &rpm8960_smps_parts,
  486. .supports_force_mode_auto = true,
  487. .supports_force_mode_bypass = false,
  488. };
  489. static const struct qcom_rpm_reg pm8921_ncp = {
  490. .desc.linear_ranges = ncp_ranges,
  491. .desc.n_linear_ranges = ARRAY_SIZE(ncp_ranges),
  492. .desc.n_voltages = 32,
  493. .desc.ops = &uV_ops,
  494. .parts = &rpm8960_ncp_parts,
  495. };
  496. static const struct qcom_rpm_reg pm8921_switch = {
  497. .desc.ops = &switch_ops,
  498. .parts = &rpm8960_switch_parts,
  499. };
  500. static const struct qcom_rpm_reg smb208_smps = {
  501. .desc.linear_ranges = smb208_ranges,
  502. .desc.n_linear_ranges = ARRAY_SIZE(smb208_ranges),
  503. .desc.n_voltages = 235,
  504. .desc.ops = &uV_ops,
  505. .parts = &rpm8960_smps_parts,
  506. .supports_force_mode_auto = false,
  507. .supports_force_mode_bypass = false,
  508. };
  509. static int rpm_reg_set(struct qcom_rpm_reg *vreg,
  510. const struct request_member *req,
  511. const int value)
  512. {
  513. if (req->mask == 0 || (value << req->shift) & ~req->mask)
  514. return -EINVAL;
  515. vreg->val[req->word] &= ~req->mask;
  516. vreg->val[req->word] |= value << req->shift;
  517. return 0;
  518. }
  519. static int rpm_reg_of_parse_freq(struct device *dev,
  520. struct device_node *node,
  521. struct qcom_rpm_reg *vreg)
  522. {
  523. static const int freq_table[] = {
  524. 19200000, 9600000, 6400000, 4800000, 3840000, 3200000, 2740000,
  525. 2400000, 2130000, 1920000, 1750000, 1600000, 1480000, 1370000,
  526. 1280000, 1200000,
  527. };
  528. const char *key;
  529. u32 freq;
  530. int ret;
  531. int i;
  532. key = "qcom,switch-mode-frequency";
  533. ret = of_property_read_u32(node, key, &freq);
  534. if (ret) {
  535. dev_err(dev, "regulator requires %s property\n", key);
  536. return -EINVAL;
  537. }
  538. for (i = 0; i < ARRAY_SIZE(freq_table); i++) {
  539. if (freq == freq_table[i]) {
  540. rpm_reg_set(vreg, &vreg->parts->freq, i + 1);
  541. return 0;
  542. }
  543. }
  544. dev_err(dev, "invalid frequency %d\n", freq);
  545. return -EINVAL;
  546. }
  547. static int rpm_reg_of_parse(struct device_node *node,
  548. const struct regulator_desc *desc,
  549. struct regulator_config *config)
  550. {
  551. struct qcom_rpm_reg *vreg = config->driver_data;
  552. struct device *dev = config->dev;
  553. const char *key;
  554. u32 force_mode;
  555. bool pwm;
  556. u32 val;
  557. int ret;
  558. key = "bias-pull-down";
  559. if (of_property_read_bool(node, key)) {
  560. ret = rpm_reg_set(vreg, &vreg->parts->pd, 1);
  561. if (ret) {
  562. dev_err(dev, "%s is invalid", key);
  563. return ret;
  564. }
  565. }
  566. if (vreg->parts->freq.mask) {
  567. ret = rpm_reg_of_parse_freq(dev, node, vreg);
  568. if (ret < 0)
  569. return ret;
  570. }
  571. if (vreg->parts->pm.mask) {
  572. key = "qcom,power-mode-hysteretic";
  573. pwm = !of_property_read_bool(node, key);
  574. ret = rpm_reg_set(vreg, &vreg->parts->pm, pwm);
  575. if (ret) {
  576. dev_err(dev, "failed to set power mode\n");
  577. return ret;
  578. }
  579. }
  580. if (vreg->parts->fm.mask) {
  581. force_mode = -1;
  582. key = "qcom,force-mode";
  583. ret = of_property_read_u32(node, key, &val);
  584. if (ret == -EINVAL) {
  585. val = QCOM_RPM_FORCE_MODE_NONE;
  586. } else if (ret < 0) {
  587. dev_err(dev, "failed to read %s\n", key);
  588. return ret;
  589. }
  590. /*
  591. * If force-mode is encoded as 2 bits then the
  592. * possible register values are:
  593. * NONE, LPM, HPM
  594. * otherwise:
  595. * NONE, LPM, AUTO, HPM, BYPASS
  596. */
  597. switch (val) {
  598. case QCOM_RPM_FORCE_MODE_NONE:
  599. force_mode = 0;
  600. break;
  601. case QCOM_RPM_FORCE_MODE_LPM:
  602. force_mode = 1;
  603. break;
  604. case QCOM_RPM_FORCE_MODE_HPM:
  605. if (FORCE_MODE_IS_2_BITS(vreg))
  606. force_mode = 2;
  607. else
  608. force_mode = 3;
  609. break;
  610. case QCOM_RPM_FORCE_MODE_AUTO:
  611. if (vreg->supports_force_mode_auto)
  612. force_mode = 2;
  613. break;
  614. case QCOM_RPM_FORCE_MODE_BYPASS:
  615. if (vreg->supports_force_mode_bypass)
  616. force_mode = 4;
  617. break;
  618. }
  619. if (force_mode == -1) {
  620. dev_err(dev, "invalid force mode\n");
  621. return -EINVAL;
  622. }
  623. ret = rpm_reg_set(vreg, &vreg->parts->fm, force_mode);
  624. if (ret) {
  625. dev_err(dev, "failed to set force mode\n");
  626. return ret;
  627. }
  628. }
  629. return 0;
  630. }
  631. struct rpm_regulator_data {
  632. const char *name;
  633. int resource;
  634. const struct qcom_rpm_reg *template;
  635. const char *supply;
  636. };
  637. static const struct rpm_regulator_data rpm_pm8058_regulators[] = {
  638. { "l0", QCOM_RPM_PM8058_LDO0, &pm8058_nldo, "vdd_l0_l1_lvs" },
  639. { "l1", QCOM_RPM_PM8058_LDO1, &pm8058_nldo, "vdd_l0_l1_lvs" },
  640. { "l2", QCOM_RPM_PM8058_LDO2, &pm8058_pldo, "vdd_l2_l11_l12" },
  641. { "l3", QCOM_RPM_PM8058_LDO3, &pm8058_pldo, "vdd_l3_l4_l5" },
  642. { "l4", QCOM_RPM_PM8058_LDO4, &pm8058_pldo, "vdd_l3_l4_l5" },
  643. { "l5", QCOM_RPM_PM8058_LDO5, &pm8058_pldo, "vdd_l3_l4_l5" },
  644. { "l6", QCOM_RPM_PM8058_LDO6, &pm8058_pldo, "vdd_l6_l7" },
  645. { "l7", QCOM_RPM_PM8058_LDO7, &pm8058_pldo, "vdd_l6_l7" },
  646. { "l8", QCOM_RPM_PM8058_LDO8, &pm8058_pldo, "vdd_l8" },
  647. { "l9", QCOM_RPM_PM8058_LDO9, &pm8058_pldo, "vdd_l9" },
  648. { "l10", QCOM_RPM_PM8058_LDO10, &pm8058_pldo, "vdd_l10" },
  649. { "l11", QCOM_RPM_PM8058_LDO11, &pm8058_pldo, "vdd_l2_l11_l12" },
  650. { "l12", QCOM_RPM_PM8058_LDO12, &pm8058_pldo, "vdd_l2_l11_l12" },
  651. { "l13", QCOM_RPM_PM8058_LDO13, &pm8058_pldo, "vdd_l13_l16" },
  652. { "l14", QCOM_RPM_PM8058_LDO14, &pm8058_pldo, "vdd_l14_l15" },
  653. { "l15", QCOM_RPM_PM8058_LDO15, &pm8058_pldo, "vdd_l14_l15" },
  654. { "l16", QCOM_RPM_PM8058_LDO16, &pm8058_pldo, "vdd_l13_l16" },
  655. { "l17", QCOM_RPM_PM8058_LDO17, &pm8058_pldo, "vdd_l17_l18" },
  656. { "l18", QCOM_RPM_PM8058_LDO18, &pm8058_pldo, "vdd_l17_l18" },
  657. { "l19", QCOM_RPM_PM8058_LDO19, &pm8058_pldo, "vdd_l19_l20" },
  658. { "l20", QCOM_RPM_PM8058_LDO20, &pm8058_pldo, "vdd_l19_l20" },
  659. { "l21", QCOM_RPM_PM8058_LDO21, &pm8058_nldo, "vdd_l21" },
  660. { "l22", QCOM_RPM_PM8058_LDO22, &pm8058_nldo, "vdd_l22" },
  661. { "l23", QCOM_RPM_PM8058_LDO23, &pm8058_nldo, "vdd_l23_l24_l25" },
  662. { "l24", QCOM_RPM_PM8058_LDO24, &pm8058_nldo, "vdd_l23_l24_l25" },
  663. { "l25", QCOM_RPM_PM8058_LDO25, &pm8058_nldo, "vdd_l23_l24_l25" },
  664. { "s0", QCOM_RPM_PM8058_SMPS0, &pm8058_smps, "vdd_s0" },
  665. { "s1", QCOM_RPM_PM8058_SMPS1, &pm8058_smps, "vdd_s1" },
  666. { "s2", QCOM_RPM_PM8058_SMPS2, &pm8058_smps, "vdd_s2" },
  667. { "s3", QCOM_RPM_PM8058_SMPS3, &pm8058_smps, "vdd_s3" },
  668. { "s4", QCOM_RPM_PM8058_SMPS4, &pm8058_smps, "vdd_s4" },
  669. { "lvs0", QCOM_RPM_PM8058_LVS0, &pm8058_switch, "vdd_l0_l1_lvs" },
  670. { "lvs1", QCOM_RPM_PM8058_LVS1, &pm8058_switch, "vdd_l0_l1_lvs" },
  671. { "ncp", QCOM_RPM_PM8058_NCP, &pm8058_ncp, "vdd_ncp" },
  672. { }
  673. };
  674. static const struct rpm_regulator_data rpm_pm8901_regulators[] = {
  675. { "l0", QCOM_RPM_PM8901_LDO0, &pm8901_nldo, "vdd_l0" },
  676. { "l1", QCOM_RPM_PM8901_LDO1, &pm8901_pldo, "vdd_l1" },
  677. { "l2", QCOM_RPM_PM8901_LDO2, &pm8901_pldo, "vdd_l2" },
  678. { "l3", QCOM_RPM_PM8901_LDO3, &pm8901_pldo, "vdd_l3" },
  679. { "l4", QCOM_RPM_PM8901_LDO4, &pm8901_pldo, "vdd_l4" },
  680. { "l5", QCOM_RPM_PM8901_LDO5, &pm8901_pldo, "vdd_l5" },
  681. { "l6", QCOM_RPM_PM8901_LDO6, &pm8901_pldo, "vdd_l6" },
  682. { "s0", QCOM_RPM_PM8901_SMPS0, &pm8901_ftsmps, "vdd_s0" },
  683. { "s1", QCOM_RPM_PM8901_SMPS1, &pm8901_ftsmps, "vdd_s1" },
  684. { "s2", QCOM_RPM_PM8901_SMPS2, &pm8901_ftsmps, "vdd_s2" },
  685. { "s3", QCOM_RPM_PM8901_SMPS3, &pm8901_ftsmps, "vdd_s3" },
  686. { "s4", QCOM_RPM_PM8901_SMPS4, &pm8901_ftsmps, "vdd_s4" },
  687. { "lvs0", QCOM_RPM_PM8901_LVS0, &pm8901_switch, "lvs0_in" },
  688. { "lvs1", QCOM_RPM_PM8901_LVS1, &pm8901_switch, "lvs1_in" },
  689. { "lvs2", QCOM_RPM_PM8901_LVS2, &pm8901_switch, "lvs2_in" },
  690. { "lvs3", QCOM_RPM_PM8901_LVS3, &pm8901_switch, "lvs3_in" },
  691. { "mvs", QCOM_RPM_PM8901_MVS, &pm8901_switch, "mvs_in" },
  692. { }
  693. };
  694. static const struct rpm_regulator_data rpm_pm8921_regulators[] = {
  695. { "s1", QCOM_RPM_PM8921_SMPS1, &pm8921_smps, "vdd_s1" },
  696. { "s2", QCOM_RPM_PM8921_SMPS2, &pm8921_smps, "vdd_s2" },
  697. { "s3", QCOM_RPM_PM8921_SMPS3, &pm8921_smps },
  698. { "s4", QCOM_RPM_PM8921_SMPS4, &pm8921_smps, "vdd_s4" },
  699. { "s7", QCOM_RPM_PM8921_SMPS7, &pm8921_smps, "vdd_s7" },
  700. { "s8", QCOM_RPM_PM8921_SMPS8, &pm8921_smps, "vdd_s8" },
  701. { "l1", QCOM_RPM_PM8921_LDO1, &pm8921_nldo, "vdd_l1_l2_l12_l18" },
  702. { "l2", QCOM_RPM_PM8921_LDO2, &pm8921_nldo, "vdd_l1_l2_l12_l18" },
  703. { "l3", QCOM_RPM_PM8921_LDO3, &pm8921_pldo, "vdd_l3_l15_l17" },
  704. { "l4", QCOM_RPM_PM8921_LDO4, &pm8921_pldo, "vdd_l4_l14" },
  705. { "l5", QCOM_RPM_PM8921_LDO5, &pm8921_pldo, "vdd_l5_l8_l16" },
  706. { "l6", QCOM_RPM_PM8921_LDO6, &pm8921_pldo, "vdd_l6_l7" },
  707. { "l7", QCOM_RPM_PM8921_LDO7, &pm8921_pldo, "vdd_l6_l7" },
  708. { "l8", QCOM_RPM_PM8921_LDO8, &pm8921_pldo, "vdd_l5_l8_l16" },
  709. { "l9", QCOM_RPM_PM8921_LDO9, &pm8921_pldo, "vdd_l9_l11" },
  710. { "l10", QCOM_RPM_PM8921_LDO10, &pm8921_pldo, "vdd_l10_l22" },
  711. { "l11", QCOM_RPM_PM8921_LDO11, &pm8921_pldo, "vdd_l9_l11" },
  712. { "l12", QCOM_RPM_PM8921_LDO12, &pm8921_nldo, "vdd_l1_l2_l12_l18" },
  713. { "l14", QCOM_RPM_PM8921_LDO14, &pm8921_pldo, "vdd_l4_l14" },
  714. { "l15", QCOM_RPM_PM8921_LDO15, &pm8921_pldo, "vdd_l3_l15_l17" },
  715. { "l16", QCOM_RPM_PM8921_LDO16, &pm8921_pldo, "vdd_l5_l8_l16" },
  716. { "l17", QCOM_RPM_PM8921_LDO17, &pm8921_pldo, "vdd_l3_l15_l17" },
  717. { "l18", QCOM_RPM_PM8921_LDO18, &pm8921_nldo, "vdd_l1_l2_l12_l18" },
  718. { "l21", QCOM_RPM_PM8921_LDO21, &pm8921_pldo, "vdd_l21_l23_l29" },
  719. { "l22", QCOM_RPM_PM8921_LDO22, &pm8921_pldo, "vdd_l10_l22" },
  720. { "l23", QCOM_RPM_PM8921_LDO23, &pm8921_pldo, "vdd_l21_l23_l29" },
  721. { "l24", QCOM_RPM_PM8921_LDO24, &pm8921_nldo1200, "vdd_l24" },
  722. { "l25", QCOM_RPM_PM8921_LDO25, &pm8921_nldo1200, "vdd_l25" },
  723. { "l26", QCOM_RPM_PM8921_LDO26, &pm8921_nldo1200, "vdd_l26" },
  724. { "l27", QCOM_RPM_PM8921_LDO27, &pm8921_nldo1200, "vdd_l27" },
  725. { "l28", QCOM_RPM_PM8921_LDO28, &pm8921_nldo1200, "vdd_l28" },
  726. { "l29", QCOM_RPM_PM8921_LDO29, &pm8921_pldo, "vdd_l21_l23_l29" },
  727. { "lvs1", QCOM_RPM_PM8921_LVS1, &pm8921_switch, "vin_lvs1_3_6" },
  728. { "lvs2", QCOM_RPM_PM8921_LVS2, &pm8921_switch, "vin_lvs2" },
  729. { "lvs3", QCOM_RPM_PM8921_LVS3, &pm8921_switch, "vin_lvs1_3_6" },
  730. { "lvs4", QCOM_RPM_PM8921_LVS4, &pm8921_switch, "vin_lvs4_5_7" },
  731. { "lvs5", QCOM_RPM_PM8921_LVS5, &pm8921_switch, "vin_lvs4_5_7" },
  732. { "lvs6", QCOM_RPM_PM8921_LVS6, &pm8921_switch, "vin_lvs1_3_6" },
  733. { "lvs7", QCOM_RPM_PM8921_LVS7, &pm8921_switch, "vin_lvs4_5_7" },
  734. { "usb-switch", QCOM_RPM_USB_OTG_SWITCH, &pm8921_switch, "vin_5vs" },
  735. { "hdmi-switch", QCOM_RPM_HDMI_SWITCH, &pm8921_switch, "vin_5vs" },
  736. { "ncp", QCOM_RPM_PM8921_NCP, &pm8921_ncp, "vdd_ncp" },
  737. { }
  738. };
  739. static const struct of_device_id rpm_of_match[] = {
  740. { .compatible = "qcom,rpm-pm8058-regulators", .data = &rpm_pm8058_regulators },
  741. { .compatible = "qcom,rpm-pm8901-regulators", .data = &rpm_pm8901_regulators },
  742. { .compatible = "qcom,rpm-pm8921-regulators", .data = &rpm_pm8921_regulators },
  743. { }
  744. };
  745. MODULE_DEVICE_TABLE(of, rpm_of_match);
  746. static int rpm_reg_probe(struct platform_device *pdev)
  747. {
  748. const struct rpm_regulator_data *reg;
  749. const struct of_device_id *match;
  750. struct regulator_config config = { };
  751. struct regulator_dev *rdev;
  752. struct qcom_rpm_reg *vreg;
  753. struct qcom_rpm *rpm;
  754. rpm = dev_get_drvdata(pdev->dev.parent);
  755. if (!rpm) {
  756. dev_err(&pdev->dev, "unable to retrieve handle to rpm\n");
  757. return -ENODEV;
  758. }
  759. match = of_match_device(rpm_of_match, &pdev->dev);
  760. for (reg = match->data; reg->name; reg++) {
  761. vreg = devm_kmalloc(&pdev->dev, sizeof(*vreg), GFP_KERNEL);
  762. if (!vreg)
  763. return -ENOMEM;
  764. memcpy(vreg, reg->template, sizeof(*vreg));
  765. mutex_init(&vreg->lock);
  766. vreg->dev = &pdev->dev;
  767. vreg->resource = reg->resource;
  768. vreg->rpm = rpm;
  769. vreg->desc.id = -1;
  770. vreg->desc.owner = THIS_MODULE;
  771. vreg->desc.type = REGULATOR_VOLTAGE;
  772. vreg->desc.name = reg->name;
  773. vreg->desc.supply_name = reg->supply;
  774. vreg->desc.of_match = reg->name;
  775. vreg->desc.of_parse_cb = rpm_reg_of_parse;
  776. config.dev = &pdev->dev;
  777. config.driver_data = vreg;
  778. rdev = devm_regulator_register(&pdev->dev, &vreg->desc, &config);
  779. if (IS_ERR(rdev)) {
  780. dev_err(&pdev->dev, "failed to register %s\n", reg->name);
  781. return PTR_ERR(rdev);
  782. }
  783. }
  784. return 0;
  785. }
  786. static struct platform_driver rpm_reg_driver = {
  787. .probe = rpm_reg_probe,
  788. .driver = {
  789. .name = "qcom_rpm_reg",
  790. .of_match_table = of_match_ptr(rpm_of_match),
  791. },
  792. };
  793. static int __init rpm_reg_init(void)
  794. {
  795. return platform_driver_register(&rpm_reg_driver);
  796. }
  797. subsys_initcall(rpm_reg_init);
  798. static void __exit rpm_reg_exit(void)
  799. {
  800. platform_driver_unregister(&rpm_reg_driver);
  801. }
  802. module_exit(rpm_reg_exit)
  803. MODULE_DESCRIPTION("Qualcomm RPM regulator driver");
  804. MODULE_LICENSE("GPL v2");