da9211-regulator.h 8.5 KB

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  1. /*
  2. * da9211-regulator.h - Regulator definitions for DA9211/DA9213/DA9215
  3. * Copyright (C) 2015 Dialog Semiconductor Ltd.
  4. *
  5. * This program is free software; you can redistribute it and/or
  6. * modify it under the terms of the GNU General Public License
  7. * as published by the Free Software Foundation; either version 2
  8. * of the License, or (at your option) any later version.
  9. *
  10. * This program is distributed in the hope that it will be useful,
  11. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. */
  15. #ifndef __DA9211_REGISTERS_H__
  16. #define __DA9211_REGISTERS_H__
  17. /* Page selection */
  18. #define DA9211_REG_PAGE_CON 0x00
  19. /* System Control and Event Registers */
  20. #define DA9211_REG_STATUS_A 0x50
  21. #define DA9211_REG_STATUS_B 0x51
  22. #define DA9211_REG_EVENT_A 0x52
  23. #define DA9211_REG_EVENT_B 0x53
  24. #define DA9211_REG_MASK_A 0x54
  25. #define DA9211_REG_MASK_B 0x55
  26. #define DA9211_REG_CONTROL_A 0x56
  27. /* GPIO Control Registers */
  28. #define DA9211_REG_GPIO_0_1 0x58
  29. #define DA9211_REG_GPIO_2_3 0x59
  30. #define DA9211_REG_GPIO_4 0x5A
  31. /* Regulator Registers */
  32. #define DA9211_REG_BUCKA_CONT 0x5D
  33. #define DA9211_REG_BUCKB_CONT 0x5E
  34. #define DA9211_REG_BUCK_ILIM 0xD0
  35. #define DA9211_REG_BUCKA_CONF 0xD1
  36. #define DA9211_REG_BUCKB_CONF 0xD2
  37. #define DA9211_REG_BUCK_CONF 0xD3
  38. #define DA9211_REG_VBACKA_MAX 0xD5
  39. #define DA9211_REG_VBACKB_MAX 0xD6
  40. #define DA9211_REG_VBUCKA_A 0xD7
  41. #define DA9211_REG_VBUCKA_B 0xD8
  42. #define DA9211_REG_VBUCKB_A 0xD9
  43. #define DA9211_REG_VBUCKB_B 0xDA
  44. /* I2C Interface Settings */
  45. #define DA9211_REG_INTERFACE 0x105
  46. /* BUCK Phase Selection*/
  47. #define DA9211_REG_CONFIG_E 0x147
  48. /* Device ID */
  49. #define DA9211_REG_DEVICE_ID 0x201
  50. /*
  51. * Registers bits
  52. */
  53. /* DA9211_REG_PAGE_CON (addr=0x00) */
  54. #define DA9211_REG_PAGE_SHIFT 1
  55. #define DA9211_REG_PAGE_MASK 0x06
  56. /* On I2C registers 0x00 - 0xFF */
  57. #define DA9211_REG_PAGE0 0
  58. /* On I2C registers 0x100 - 0x1FF */
  59. #define DA9211_REG_PAGE2 2
  60. #define DA9211_PAGE_WRITE_MODE 0x00
  61. #define DA9211_REPEAT_WRITE_MODE 0x40
  62. #define DA9211_PAGE_REVERT 0x80
  63. /* DA9211_REG_STATUS_A (addr=0x50) */
  64. #define DA9211_GPI0 0x01
  65. #define DA9211_GPI1 0x02
  66. #define DA9211_GPI2 0x04
  67. #define DA9211_GPI3 0x08
  68. #define DA9211_GPI4 0x10
  69. /* DA9211_REG_EVENT_A (addr=0x52) */
  70. #define DA9211_E_GPI0 0x01
  71. #define DA9211_E_GPI1 0x02
  72. #define DA9211_E_GPI2 0x04
  73. #define DA9211_E_GPI3 0x08
  74. #define DA9211_E_GPI4 0x10
  75. #define DA9211_E_UVLO_IO 0x40
  76. /* DA9211_REG_EVENT_B (addr=0x53) */
  77. #define DA9211_E_PWRGOOD_A 0x01
  78. #define DA9211_E_PWRGOOD_B 0x02
  79. #define DA9211_E_TEMP_WARN 0x04
  80. #define DA9211_E_TEMP_CRIT 0x08
  81. #define DA9211_E_OV_CURR_A 0x10
  82. #define DA9211_E_OV_CURR_B 0x20
  83. /* DA9211_REG_MASK_A (addr=0x54) */
  84. #define DA9211_M_GPI0 0x01
  85. #define DA9211_M_GPI1 0x02
  86. #define DA9211_M_GPI2 0x04
  87. #define DA9211_M_GPI3 0x08
  88. #define DA9211_M_GPI4 0x10
  89. #define DA9211_M_UVLO_IO 0x40
  90. /* DA9211_REG_MASK_B (addr=0x55) */
  91. #define DA9211_M_PWRGOOD_A 0x01
  92. #define DA9211_M_PWRGOOD_B 0x02
  93. #define DA9211_M_TEMP_WARN 0x04
  94. #define DA9211_M_TEMP_CRIT 0x08
  95. #define DA9211_M_OV_CURR_A 0x10
  96. #define DA9211_M_OV_CURR_B 0x20
  97. /* DA9211_REG_CONTROL_A (addr=0x56) */
  98. #define DA9211_DEBOUNCING_SHIFT 0
  99. #define DA9211_DEBOUNCING_MASK 0x07
  100. #define DA9211_SLEW_RATE_SHIFT 3
  101. #define DA9211_SLEW_RATE_A_MASK 0x18
  102. #define DA9211_SLEW_RATE_B_SHIFT 5
  103. #define DA9211_SLEW_RATE_B_MASK 0x60
  104. #define DA9211_V_LOCK 0x80
  105. /* DA9211_REG_GPIO_0_1 (addr=0x58) */
  106. #define DA9211_GPIO0_PIN_SHIFT 0
  107. #define DA9211_GPIO0_PIN_MASK 0x03
  108. #define DA9211_GPIO0_PIN_GPI 0x00
  109. #define DA9211_GPIO0_PIN_GPO_OD 0x02
  110. #define DA9211_GPIO0_PIN_GPO 0x03
  111. #define DA9211_GPIO0_TYPE 0x04
  112. #define DA9211_GPIO0_TYPE_GPI 0x00
  113. #define DA9211_GPIO0_TYPE_GPO 0x04
  114. #define DA9211_GPIO0_MODE 0x08
  115. #define DA9211_GPIO1_PIN_SHIFT 4
  116. #define DA9211_GPIO1_PIN_MASK 0x30
  117. #define DA9211_GPIO1_PIN_GPI 0x00
  118. #define DA9211_GPIO1_PIN_VERROR 0x10
  119. #define DA9211_GPIO1_PIN_GPO_OD 0x20
  120. #define DA9211_GPIO1_PIN_GPO 0x30
  121. #define DA9211_GPIO1_TYPE_SHIFT 0x40
  122. #define DA9211_GPIO1_TYPE_GPI 0x00
  123. #define DA9211_GPIO1_TYPE_GPO 0x40
  124. #define DA9211_GPIO1_MODE 0x80
  125. /* DA9211_REG_GPIO_2_3 (addr=0x59) */
  126. #define DA9211_GPIO2_PIN_SHIFT 0
  127. #define DA9211_GPIO2_PIN_MASK 0x03
  128. #define DA9211_GPIO2_PIN_GPI 0x00
  129. #define DA9211_GPIO5_PIN_BUCK_CLK 0x10
  130. #define DA9211_GPIO2_PIN_GPO_OD 0x02
  131. #define DA9211_GPIO2_PIN_GPO 0x03
  132. #define DA9211_GPIO2_TYPE 0x04
  133. #define DA9211_GPIO2_TYPE_GPI 0x00
  134. #define DA9211_GPIO2_TYPE_GPO 0x04
  135. #define DA9211_GPIO2_MODE 0x08
  136. #define DA9211_GPIO3_PIN_SHIFT 4
  137. #define DA9211_GPIO3_PIN_MASK 0x30
  138. #define DA9211_GPIO3_PIN_GPI 0x00
  139. #define DA9211_GPIO3_PIN_IERROR 0x10
  140. #define DA9211_GPIO3_PIN_GPO_OD 0x20
  141. #define DA9211_GPIO3_PIN_GPO 0x30
  142. #define DA9211_GPIO3_TYPE_SHIFT 0x40
  143. #define DA9211_GPIO3_TYPE_GPI 0x00
  144. #define DA9211_GPIO3_TYPE_GPO 0x40
  145. #define DA9211_GPIO3_MODE 0x80
  146. /* DA9211_REG_GPIO_4 (addr=0x5A) */
  147. #define DA9211_GPIO4_PIN_SHIFT 0
  148. #define DA9211_GPIO4_PIN_MASK 0x03
  149. #define DA9211_GPIO4_PIN_GPI 0x00
  150. #define DA9211_GPIO4_PIN_GPO_OD 0x02
  151. #define DA9211_GPIO4_PIN_GPO 0x03
  152. #define DA9211_GPIO4_TYPE 0x04
  153. #define DA9211_GPIO4_TYPE_GPI 0x00
  154. #define DA9211_GPIO4_TYPE_GPO 0x04
  155. #define DA9211_GPIO4_MODE 0x08
  156. /* DA9211_REG_BUCKA_CONT (addr=0x5D) */
  157. #define DA9211_BUCKA_EN 0x01
  158. #define DA9211_BUCKA_GPI_SHIFT 1
  159. #define DA9211_BUCKA_GPI_MASK 0x06
  160. #define DA9211_BUCKA_GPI_OFF 0x00
  161. #define DA9211_BUCKA_GPI_GPIO0 0x02
  162. #define DA9211_BUCKA_GPI_GPIO1 0x04
  163. #define DA9211_BUCKA_GPI_GPIO3 0x06
  164. #define DA9211_BUCKA_PD_DIS 0x08
  165. #define DA9211_VBUCKA_SEL 0x10
  166. #define DA9211_VBUCKA_SEL_A 0x00
  167. #define DA9211_VBUCKA_SEL_B 0x10
  168. #define DA9211_VBUCKA_GPI_SHIFT 5
  169. #define DA9211_VBUCKA_GPI_MASK 0x60
  170. #define DA9211_VBUCKA_GPI_OFF 0x00
  171. #define DA9211_VBUCKA_GPI_GPIO1 0x20
  172. #define DA9211_VBUCKA_GPI_GPIO2 0x40
  173. #define DA9211_VBUCKA_GPI_GPIO4 0x60
  174. /* DA9211_REG_BUCKB_CONT (addr=0x5E) */
  175. #define DA9211_BUCKB_EN 0x01
  176. #define DA9211_BUCKB_GPI_SHIFT 1
  177. #define DA9211_BUCKB_GPI_MASK 0x06
  178. #define DA9211_BUCKB_GPI_OFF 0x00
  179. #define DA9211_BUCKB_GPI_GPIO0 0x02
  180. #define DA9211_BUCKB_GPI_GPIO1 0x04
  181. #define DA9211_BUCKB_GPI_GPIO3 0x06
  182. #define DA9211_BUCKB_PD_DIS 0x08
  183. #define DA9211_VBUCKB_SEL 0x10
  184. #define DA9211_VBUCKB_SEL_A 0x00
  185. #define DA9211_VBUCKB_SEL_B 0x10
  186. #define DA9211_VBUCKB_GPI_SHIFT 5
  187. #define DA9211_VBUCKB_GPI_MASK 0x60
  188. #define DA9211_VBUCKB_GPI_OFF 0x00
  189. #define DA9211_VBUCKB_GPI_GPIO1 0x20
  190. #define DA9211_VBUCKB_GPI_GPIO2 0x40
  191. #define DA9211_VBUCKB_GPI_GPIO4 0x60
  192. /* DA9211_REG_BUCK_ILIM (addr=0xD0) */
  193. #define DA9211_BUCKA_ILIM_SHIFT 0
  194. #define DA9211_BUCKA_ILIM_MASK 0x0F
  195. #define DA9211_BUCKB_ILIM_SHIFT 4
  196. #define DA9211_BUCKB_ILIM_MASK 0xF0
  197. /* DA9211_REG_BUCKA_CONF (addr=0xD1) */
  198. #define DA9211_BUCKA_MODE_SHIFT 0
  199. #define DA9211_BUCKA_MODE_MASK 0x03
  200. #define DA9211_BUCKA_MODE_MANUAL 0x00
  201. #define DA9211_BUCKA_MODE_SLEEP 0x01
  202. #define DA9211_BUCKA_MODE_SYNC 0x02
  203. #define DA9211_BUCKA_MODE_AUTO 0x03
  204. #define DA9211_BUCKA_UP_CTRL_SHIFT 2
  205. #define DA9211_BUCKA_UP_CTRL_MASK 0x1C
  206. #define DA9211_BUCKA_DOWN_CTRL_SHIFT 5
  207. #define DA9211_BUCKA_DOWN_CTRL_MASK 0xE0
  208. /* DA9211_REG_BUCKB_CONF (addr=0xD2) */
  209. #define DA9211_BUCKB_MODE_SHIFT 0
  210. #define DA9211_BUCKB_MODE_MASK 0x03
  211. #define DA9211_BUCKB_MODE_MANUAL 0x00
  212. #define DA9211_BUCKB_MODE_SLEEP 0x01
  213. #define DA9211_BUCKB_MODE_SYNC 0x02
  214. #define DA9211_BUCKB_MODE_AUTO 0x03
  215. #define DA9211_BUCKB_UP_CTRL_SHIFT 2
  216. #define DA9211_BUCKB_UP_CTRL_MASK 0x1C
  217. #define DA9211_BUCKB_DOWN_CTRL_SHIFT 5
  218. #define DA9211_BUCKB_DOWN_CTRL_MASK 0xE0
  219. /* DA9211_REG_BUCK_CONF (addr=0xD3) */
  220. #define DA9211_PHASE_SEL_A_SHIFT 0
  221. #define DA9211_PHASE_SEL_A_MASK 0x03
  222. #define DA9211_PHASE_SEL_B_SHIFT 2
  223. #define DA9211_PHASE_SEL_B_MASK 0x04
  224. #define DA9211_PH_SH_EN_A_SHIFT 3
  225. #define DA9211_PH_SH_EN_A_MASK 0x08
  226. #define DA9211_PH_SH_EN_B_SHIFT 4
  227. #define DA9211_PH_SH_EN_B_MASK 0x10
  228. /* DA9211_REG_VBUCKA_MAX (addr=0xD5) */
  229. #define DA9211_VBUCKA_BASE_SHIFT 0
  230. #define DA9211_VBUCKA_BASE_MASK 0x7F
  231. /* DA9211_REG_VBUCKB_MAX (addr=0xD6) */
  232. #define DA9211_VBUCKB_BASE_SHIFT 0
  233. #define DA9211_VBUCKB_BASE_MASK 0x7F
  234. /* DA9211_REG_VBUCKA/B_A/B (addr=0xD7/0xD8/0xD9/0xDA) */
  235. #define DA9211_VBUCK_SHIFT 0
  236. #define DA9211_VBUCK_MASK 0x7F
  237. #define DA9211_VBUCK_BIAS 0
  238. #define DA9211_BUCK_SL 0x80
  239. /* DA9211_REG_INTERFACE (addr=0x105) */
  240. #define DA9211_IF_BASE_ADDR_SHIFT 4
  241. #define DA9211_IF_BASE_ADDR_MASK 0xF0
  242. /* DA9211_REG_CONFIG_E (addr=0x147) */
  243. #define DA9211_SLAVE_SEL 0x40
  244. #endif /* __DA9211_REGISTERS_H__ */