iov.c 18 KB

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  1. /*
  2. * drivers/pci/iov.c
  3. *
  4. * Copyright (C) 2009 Intel Corporation, Yu Zhao <yu.zhao@intel.com>
  5. *
  6. * PCI Express I/O Virtualization (IOV) support.
  7. * Single Root IOV 1.0
  8. * Address Translation Service 1.0
  9. */
  10. #include <linux/pci.h>
  11. #include <linux/slab.h>
  12. #include <linux/mutex.h>
  13. #include <linux/export.h>
  14. #include <linux/string.h>
  15. #include <linux/delay.h>
  16. #include <linux/pci-ats.h>
  17. #include "pci.h"
  18. #define VIRTFN_ID_LEN 16
  19. int pci_iov_virtfn_bus(struct pci_dev *dev, int vf_id)
  20. {
  21. if (!dev->is_physfn)
  22. return -EINVAL;
  23. return dev->bus->number + ((dev->devfn + dev->sriov->offset +
  24. dev->sriov->stride * vf_id) >> 8);
  25. }
  26. int pci_iov_virtfn_devfn(struct pci_dev *dev, int vf_id)
  27. {
  28. if (!dev->is_physfn)
  29. return -EINVAL;
  30. return (dev->devfn + dev->sriov->offset +
  31. dev->sriov->stride * vf_id) & 0xff;
  32. }
  33. /*
  34. * Per SR-IOV spec sec 3.3.10 and 3.3.11, First VF Offset and VF Stride may
  35. * change when NumVFs changes.
  36. *
  37. * Update iov->offset and iov->stride when NumVFs is written.
  38. */
  39. static inline void pci_iov_set_numvfs(struct pci_dev *dev, int nr_virtfn)
  40. {
  41. struct pci_sriov *iov = dev->sriov;
  42. pci_write_config_word(dev, iov->pos + PCI_SRIOV_NUM_VF, nr_virtfn);
  43. pci_read_config_word(dev, iov->pos + PCI_SRIOV_VF_OFFSET, &iov->offset);
  44. pci_read_config_word(dev, iov->pos + PCI_SRIOV_VF_STRIDE, &iov->stride);
  45. }
  46. /*
  47. * The PF consumes one bus number. NumVFs, First VF Offset, and VF Stride
  48. * determine how many additional bus numbers will be consumed by VFs.
  49. *
  50. * Iterate over all valid NumVFs and calculate the maximum number of bus
  51. * numbers that could ever be required.
  52. */
  53. static inline u8 virtfn_max_buses(struct pci_dev *dev)
  54. {
  55. struct pci_sriov *iov = dev->sriov;
  56. int nr_virtfn;
  57. u8 max = 0;
  58. int busnr;
  59. for (nr_virtfn = 1; nr_virtfn <= iov->total_VFs; nr_virtfn++) {
  60. pci_iov_set_numvfs(dev, nr_virtfn);
  61. busnr = pci_iov_virtfn_bus(dev, nr_virtfn - 1);
  62. if (busnr > max)
  63. max = busnr;
  64. }
  65. return max;
  66. }
  67. static struct pci_bus *virtfn_add_bus(struct pci_bus *bus, int busnr)
  68. {
  69. struct pci_bus *child;
  70. if (bus->number == busnr)
  71. return bus;
  72. child = pci_find_bus(pci_domain_nr(bus), busnr);
  73. if (child)
  74. return child;
  75. child = pci_add_new_bus(bus, NULL, busnr);
  76. if (!child)
  77. return NULL;
  78. pci_bus_insert_busn_res(child, busnr, busnr);
  79. return child;
  80. }
  81. static void virtfn_remove_bus(struct pci_bus *physbus, struct pci_bus *virtbus)
  82. {
  83. if (physbus != virtbus && list_empty(&virtbus->devices))
  84. pci_remove_bus(virtbus);
  85. }
  86. resource_size_t pci_iov_resource_size(struct pci_dev *dev, int resno)
  87. {
  88. if (!dev->is_physfn)
  89. return 0;
  90. return dev->sriov->barsz[resno - PCI_IOV_RESOURCES];
  91. }
  92. static int virtfn_add(struct pci_dev *dev, int id, int reset)
  93. {
  94. int i;
  95. int rc = -ENOMEM;
  96. u64 size;
  97. char buf[VIRTFN_ID_LEN];
  98. struct pci_dev *virtfn;
  99. struct resource *res;
  100. struct pci_sriov *iov = dev->sriov;
  101. struct pci_bus *bus;
  102. mutex_lock(&iov->dev->sriov->lock);
  103. bus = virtfn_add_bus(dev->bus, pci_iov_virtfn_bus(dev, id));
  104. if (!bus)
  105. goto failed;
  106. virtfn = pci_alloc_dev(bus);
  107. if (!virtfn)
  108. goto failed0;
  109. virtfn->devfn = pci_iov_virtfn_devfn(dev, id);
  110. virtfn->vendor = dev->vendor;
  111. pci_read_config_word(dev, iov->pos + PCI_SRIOV_VF_DID, &virtfn->device);
  112. pci_setup_device(virtfn);
  113. virtfn->dev.parent = dev->dev.parent;
  114. virtfn->physfn = pci_dev_get(dev);
  115. virtfn->is_virtfn = 1;
  116. virtfn->multifunction = 0;
  117. for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {
  118. res = &dev->resource[i + PCI_IOV_RESOURCES];
  119. if (!res->parent)
  120. continue;
  121. virtfn->resource[i].name = pci_name(virtfn);
  122. virtfn->resource[i].flags = res->flags;
  123. size = pci_iov_resource_size(dev, i + PCI_IOV_RESOURCES);
  124. virtfn->resource[i].start = res->start + size * id;
  125. virtfn->resource[i].end = virtfn->resource[i].start + size - 1;
  126. rc = request_resource(res, &virtfn->resource[i]);
  127. BUG_ON(rc);
  128. }
  129. if (reset)
  130. __pci_reset_function(virtfn);
  131. pci_device_add(virtfn, virtfn->bus);
  132. mutex_unlock(&iov->dev->sriov->lock);
  133. pci_bus_add_device(virtfn);
  134. sprintf(buf, "virtfn%u", id);
  135. rc = sysfs_create_link(&dev->dev.kobj, &virtfn->dev.kobj, buf);
  136. if (rc)
  137. goto failed1;
  138. rc = sysfs_create_link(&virtfn->dev.kobj, &dev->dev.kobj, "physfn");
  139. if (rc)
  140. goto failed2;
  141. kobject_uevent(&virtfn->dev.kobj, KOBJ_CHANGE);
  142. return 0;
  143. failed2:
  144. sysfs_remove_link(&dev->dev.kobj, buf);
  145. failed1:
  146. pci_dev_put(dev);
  147. mutex_lock(&iov->dev->sriov->lock);
  148. pci_stop_and_remove_bus_device(virtfn);
  149. failed0:
  150. virtfn_remove_bus(dev->bus, bus);
  151. failed:
  152. mutex_unlock(&iov->dev->sriov->lock);
  153. return rc;
  154. }
  155. static void virtfn_remove(struct pci_dev *dev, int id, int reset)
  156. {
  157. char buf[VIRTFN_ID_LEN];
  158. struct pci_dev *virtfn;
  159. struct pci_sriov *iov = dev->sriov;
  160. virtfn = pci_get_domain_bus_and_slot(pci_domain_nr(dev->bus),
  161. pci_iov_virtfn_bus(dev, id),
  162. pci_iov_virtfn_devfn(dev, id));
  163. if (!virtfn)
  164. return;
  165. if (reset) {
  166. device_release_driver(&virtfn->dev);
  167. __pci_reset_function(virtfn);
  168. }
  169. sprintf(buf, "virtfn%u", id);
  170. sysfs_remove_link(&dev->dev.kobj, buf);
  171. /*
  172. * pci_stop_dev() could have been called for this virtfn already,
  173. * so the directory for the virtfn may have been removed before.
  174. * Double check to avoid spurious sysfs warnings.
  175. */
  176. if (virtfn->dev.kobj.sd)
  177. sysfs_remove_link(&virtfn->dev.kobj, "physfn");
  178. mutex_lock(&iov->dev->sriov->lock);
  179. pci_stop_and_remove_bus_device(virtfn);
  180. virtfn_remove_bus(dev->bus, virtfn->bus);
  181. mutex_unlock(&iov->dev->sriov->lock);
  182. /* balance pci_get_domain_bus_and_slot() */
  183. pci_dev_put(virtfn);
  184. pci_dev_put(dev);
  185. }
  186. int __weak pcibios_sriov_enable(struct pci_dev *pdev, u16 num_vfs)
  187. {
  188. return 0;
  189. }
  190. static int sriov_enable(struct pci_dev *dev, int nr_virtfn)
  191. {
  192. int rc;
  193. int i, j;
  194. int nres;
  195. u16 offset, stride, initial;
  196. struct resource *res;
  197. struct pci_dev *pdev;
  198. struct pci_sriov *iov = dev->sriov;
  199. int bars = 0;
  200. int bus;
  201. int retval;
  202. if (!nr_virtfn)
  203. return 0;
  204. if (iov->num_VFs)
  205. return -EINVAL;
  206. pci_read_config_word(dev, iov->pos + PCI_SRIOV_INITIAL_VF, &initial);
  207. if (initial > iov->total_VFs ||
  208. (!(iov->cap & PCI_SRIOV_CAP_VFM) && (initial != iov->total_VFs)))
  209. return -EIO;
  210. if (nr_virtfn < 0 || nr_virtfn > iov->total_VFs ||
  211. (!(iov->cap & PCI_SRIOV_CAP_VFM) && (nr_virtfn > initial)))
  212. return -EINVAL;
  213. pci_read_config_word(dev, iov->pos + PCI_SRIOV_VF_OFFSET, &offset);
  214. pci_read_config_word(dev, iov->pos + PCI_SRIOV_VF_STRIDE, &stride);
  215. if (!offset || (nr_virtfn > 1 && !stride))
  216. return -EIO;
  217. nres = 0;
  218. for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {
  219. bars |= (1 << (i + PCI_IOV_RESOURCES));
  220. res = &dev->resource[i + PCI_IOV_RESOURCES];
  221. if (res->parent)
  222. nres++;
  223. }
  224. if (nres != iov->nres) {
  225. dev_err(&dev->dev, "not enough MMIO resources for SR-IOV\n");
  226. return -ENOMEM;
  227. }
  228. iov->offset = offset;
  229. iov->stride = stride;
  230. bus = pci_iov_virtfn_bus(dev, nr_virtfn - 1);
  231. if (bus > dev->bus->busn_res.end) {
  232. dev_err(&dev->dev, "can't enable %d VFs (bus %02x out of range of %pR)\n",
  233. nr_virtfn, bus, &dev->bus->busn_res);
  234. return -ENOMEM;
  235. }
  236. if (pci_enable_resources(dev, bars)) {
  237. dev_err(&dev->dev, "SR-IOV: IOV BARS not allocated\n");
  238. return -ENOMEM;
  239. }
  240. if (iov->link != dev->devfn) {
  241. pdev = pci_get_slot(dev->bus, iov->link);
  242. if (!pdev)
  243. return -ENODEV;
  244. if (!pdev->is_physfn) {
  245. pci_dev_put(pdev);
  246. return -ENOSYS;
  247. }
  248. rc = sysfs_create_link(&dev->dev.kobj,
  249. &pdev->dev.kobj, "dep_link");
  250. pci_dev_put(pdev);
  251. if (rc)
  252. return rc;
  253. }
  254. pci_iov_set_numvfs(dev, nr_virtfn);
  255. iov->ctrl |= PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE;
  256. pci_cfg_access_lock(dev);
  257. pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
  258. msleep(100);
  259. pci_cfg_access_unlock(dev);
  260. iov->initial_VFs = initial;
  261. if (nr_virtfn < initial)
  262. initial = nr_virtfn;
  263. if ((retval = pcibios_sriov_enable(dev, initial))) {
  264. dev_err(&dev->dev, "failure %d from pcibios_sriov_enable()\n",
  265. retval);
  266. return retval;
  267. }
  268. for (i = 0; i < initial; i++) {
  269. rc = virtfn_add(dev, i, 0);
  270. if (rc)
  271. goto failed;
  272. }
  273. kobject_uevent(&dev->dev.kobj, KOBJ_CHANGE);
  274. iov->num_VFs = nr_virtfn;
  275. return 0;
  276. failed:
  277. for (j = 0; j < i; j++)
  278. virtfn_remove(dev, j, 0);
  279. iov->ctrl &= ~(PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE);
  280. pci_cfg_access_lock(dev);
  281. pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
  282. pci_iov_set_numvfs(dev, 0);
  283. ssleep(1);
  284. pci_cfg_access_unlock(dev);
  285. if (iov->link != dev->devfn)
  286. sysfs_remove_link(&dev->dev.kobj, "dep_link");
  287. return rc;
  288. }
  289. int __weak pcibios_sriov_disable(struct pci_dev *pdev)
  290. {
  291. return 0;
  292. }
  293. static void sriov_disable(struct pci_dev *dev)
  294. {
  295. int i;
  296. struct pci_sriov *iov = dev->sriov;
  297. if (!iov->num_VFs)
  298. return;
  299. for (i = 0; i < iov->num_VFs; i++)
  300. virtfn_remove(dev, i, 0);
  301. pcibios_sriov_disable(dev);
  302. iov->ctrl &= ~(PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE);
  303. pci_cfg_access_lock(dev);
  304. pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
  305. ssleep(1);
  306. pci_cfg_access_unlock(dev);
  307. if (iov->link != dev->devfn)
  308. sysfs_remove_link(&dev->dev.kobj, "dep_link");
  309. iov->num_VFs = 0;
  310. pci_iov_set_numvfs(dev, 0);
  311. }
  312. static int sriov_init(struct pci_dev *dev, int pos)
  313. {
  314. int i, bar64;
  315. int rc;
  316. int nres;
  317. u32 pgsz;
  318. u16 ctrl, total, offset, stride;
  319. struct pci_sriov *iov;
  320. struct resource *res;
  321. struct pci_dev *pdev;
  322. if (pci_pcie_type(dev) != PCI_EXP_TYPE_RC_END &&
  323. pci_pcie_type(dev) != PCI_EXP_TYPE_ENDPOINT)
  324. return -ENODEV;
  325. pci_read_config_word(dev, pos + PCI_SRIOV_CTRL, &ctrl);
  326. if (ctrl & PCI_SRIOV_CTRL_VFE) {
  327. pci_write_config_word(dev, pos + PCI_SRIOV_CTRL, 0);
  328. ssleep(1);
  329. }
  330. pci_read_config_word(dev, pos + PCI_SRIOV_TOTAL_VF, &total);
  331. if (!total)
  332. return 0;
  333. ctrl = 0;
  334. list_for_each_entry(pdev, &dev->bus->devices, bus_list)
  335. if (pdev->is_physfn)
  336. goto found;
  337. pdev = NULL;
  338. if (pci_ari_enabled(dev->bus))
  339. ctrl |= PCI_SRIOV_CTRL_ARI;
  340. found:
  341. pci_write_config_word(dev, pos + PCI_SRIOV_CTRL, ctrl);
  342. pci_write_config_word(dev, pos + PCI_SRIOV_NUM_VF, 0);
  343. pci_read_config_word(dev, pos + PCI_SRIOV_VF_OFFSET, &offset);
  344. pci_read_config_word(dev, pos + PCI_SRIOV_VF_STRIDE, &stride);
  345. if (!offset || (total > 1 && !stride))
  346. return -EIO;
  347. pci_read_config_dword(dev, pos + PCI_SRIOV_SUP_PGSIZE, &pgsz);
  348. i = PAGE_SHIFT > 12 ? PAGE_SHIFT - 12 : 0;
  349. pgsz &= ~((1 << i) - 1);
  350. if (!pgsz)
  351. return -EIO;
  352. pgsz &= ~(pgsz - 1);
  353. pci_write_config_dword(dev, pos + PCI_SRIOV_SYS_PGSIZE, pgsz);
  354. iov = kzalloc(sizeof(*iov), GFP_KERNEL);
  355. if (!iov)
  356. return -ENOMEM;
  357. nres = 0;
  358. for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {
  359. res = &dev->resource[i + PCI_IOV_RESOURCES];
  360. bar64 = __pci_read_base(dev, pci_bar_unknown, res,
  361. pos + PCI_SRIOV_BAR + i * 4);
  362. if (!res->flags)
  363. continue;
  364. if (resource_size(res) & (PAGE_SIZE - 1)) {
  365. rc = -EIO;
  366. goto failed;
  367. }
  368. iov->barsz[i] = resource_size(res);
  369. res->end = res->start + resource_size(res) * total - 1;
  370. dev_info(&dev->dev, "VF(n) BAR%d space: %pR (contains BAR%d for %d VFs)\n",
  371. i, res, i, total);
  372. i += bar64;
  373. nres++;
  374. }
  375. iov->pos = pos;
  376. iov->nres = nres;
  377. iov->ctrl = ctrl;
  378. iov->total_VFs = total;
  379. iov->offset = offset;
  380. iov->stride = stride;
  381. iov->pgsz = pgsz;
  382. iov->self = dev;
  383. pci_read_config_dword(dev, pos + PCI_SRIOV_CAP, &iov->cap);
  384. pci_read_config_byte(dev, pos + PCI_SRIOV_FUNC_LINK, &iov->link);
  385. if (pci_pcie_type(dev) == PCI_EXP_TYPE_RC_END)
  386. iov->link = PCI_DEVFN(PCI_SLOT(dev->devfn), iov->link);
  387. if (pdev)
  388. iov->dev = pci_dev_get(pdev);
  389. else
  390. iov->dev = dev;
  391. mutex_init(&iov->lock);
  392. dev->sriov = iov;
  393. dev->is_physfn = 1;
  394. iov->max_VF_buses = virtfn_max_buses(dev);
  395. return 0;
  396. failed:
  397. for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {
  398. res = &dev->resource[i + PCI_IOV_RESOURCES];
  399. res->flags = 0;
  400. }
  401. kfree(iov);
  402. return rc;
  403. }
  404. static void sriov_release(struct pci_dev *dev)
  405. {
  406. BUG_ON(dev->sriov->num_VFs);
  407. if (dev != dev->sriov->dev)
  408. pci_dev_put(dev->sriov->dev);
  409. mutex_destroy(&dev->sriov->lock);
  410. kfree(dev->sriov);
  411. dev->sriov = NULL;
  412. }
  413. static void sriov_restore_state(struct pci_dev *dev)
  414. {
  415. int i;
  416. u16 ctrl;
  417. struct pci_sriov *iov = dev->sriov;
  418. pci_read_config_word(dev, iov->pos + PCI_SRIOV_CTRL, &ctrl);
  419. if (ctrl & PCI_SRIOV_CTRL_VFE)
  420. return;
  421. for (i = PCI_IOV_RESOURCES; i <= PCI_IOV_RESOURCE_END; i++)
  422. pci_update_resource(dev, i);
  423. pci_write_config_dword(dev, iov->pos + PCI_SRIOV_SYS_PGSIZE, iov->pgsz);
  424. pci_iov_set_numvfs(dev, iov->num_VFs);
  425. pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
  426. if (iov->ctrl & PCI_SRIOV_CTRL_VFE)
  427. msleep(100);
  428. }
  429. /**
  430. * pci_iov_init - initialize the IOV capability
  431. * @dev: the PCI device
  432. *
  433. * Returns 0 on success, or negative on failure.
  434. */
  435. int pci_iov_init(struct pci_dev *dev)
  436. {
  437. int pos;
  438. if (!pci_is_pcie(dev))
  439. return -ENODEV;
  440. pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_SRIOV);
  441. if (pos)
  442. return sriov_init(dev, pos);
  443. return -ENODEV;
  444. }
  445. /**
  446. * pci_iov_release - release resources used by the IOV capability
  447. * @dev: the PCI device
  448. */
  449. void pci_iov_release(struct pci_dev *dev)
  450. {
  451. if (dev->is_physfn)
  452. sriov_release(dev);
  453. }
  454. /**
  455. * pci_iov_resource_bar - get position of the SR-IOV BAR
  456. * @dev: the PCI device
  457. * @resno: the resource number
  458. *
  459. * Returns position of the BAR encapsulated in the SR-IOV capability.
  460. */
  461. int pci_iov_resource_bar(struct pci_dev *dev, int resno)
  462. {
  463. if (resno < PCI_IOV_RESOURCES || resno > PCI_IOV_RESOURCE_END)
  464. return 0;
  465. BUG_ON(!dev->is_physfn);
  466. return dev->sriov->pos + PCI_SRIOV_BAR +
  467. 4 * (resno - PCI_IOV_RESOURCES);
  468. }
  469. resource_size_t __weak pcibios_iov_resource_alignment(struct pci_dev *dev,
  470. int resno)
  471. {
  472. return pci_iov_resource_size(dev, resno);
  473. }
  474. /**
  475. * pci_sriov_resource_alignment - get resource alignment for VF BAR
  476. * @dev: the PCI device
  477. * @resno: the resource number
  478. *
  479. * Returns the alignment of the VF BAR found in the SR-IOV capability.
  480. * This is not the same as the resource size which is defined as
  481. * the VF BAR size multiplied by the number of VFs. The alignment
  482. * is just the VF BAR size.
  483. */
  484. resource_size_t pci_sriov_resource_alignment(struct pci_dev *dev, int resno)
  485. {
  486. return pcibios_iov_resource_alignment(dev, resno);
  487. }
  488. /**
  489. * pci_restore_iov_state - restore the state of the IOV capability
  490. * @dev: the PCI device
  491. */
  492. void pci_restore_iov_state(struct pci_dev *dev)
  493. {
  494. if (dev->is_physfn)
  495. sriov_restore_state(dev);
  496. }
  497. /**
  498. * pci_iov_bus_range - find bus range used by Virtual Function
  499. * @bus: the PCI bus
  500. *
  501. * Returns max number of buses (exclude current one) used by Virtual
  502. * Functions.
  503. */
  504. int pci_iov_bus_range(struct pci_bus *bus)
  505. {
  506. int max = 0;
  507. struct pci_dev *dev;
  508. list_for_each_entry(dev, &bus->devices, bus_list) {
  509. if (!dev->is_physfn)
  510. continue;
  511. if (dev->sriov->max_VF_buses > max)
  512. max = dev->sriov->max_VF_buses;
  513. }
  514. return max ? max - bus->number : 0;
  515. }
  516. /**
  517. * pci_enable_sriov - enable the SR-IOV capability
  518. * @dev: the PCI device
  519. * @nr_virtfn: number of virtual functions to enable
  520. *
  521. * Returns 0 on success, or negative on failure.
  522. */
  523. int pci_enable_sriov(struct pci_dev *dev, int nr_virtfn)
  524. {
  525. might_sleep();
  526. if (!dev->is_physfn)
  527. return -ENOSYS;
  528. return sriov_enable(dev, nr_virtfn);
  529. }
  530. EXPORT_SYMBOL_GPL(pci_enable_sriov);
  531. /**
  532. * pci_disable_sriov - disable the SR-IOV capability
  533. * @dev: the PCI device
  534. */
  535. void pci_disable_sriov(struct pci_dev *dev)
  536. {
  537. might_sleep();
  538. if (!dev->is_physfn)
  539. return;
  540. sriov_disable(dev);
  541. }
  542. EXPORT_SYMBOL_GPL(pci_disable_sriov);
  543. /**
  544. * pci_num_vf - return number of VFs associated with a PF device_release_driver
  545. * @dev: the PCI device
  546. *
  547. * Returns number of VFs, or 0 if SR-IOV is not enabled.
  548. */
  549. int pci_num_vf(struct pci_dev *dev)
  550. {
  551. if (!dev->is_physfn)
  552. return 0;
  553. return dev->sriov->num_VFs;
  554. }
  555. EXPORT_SYMBOL_GPL(pci_num_vf);
  556. /**
  557. * pci_vfs_assigned - returns number of VFs are assigned to a guest
  558. * @dev: the PCI device
  559. *
  560. * Returns number of VFs belonging to this device that are assigned to a guest.
  561. * If device is not a physical function returns 0.
  562. */
  563. int pci_vfs_assigned(struct pci_dev *dev)
  564. {
  565. struct pci_dev *vfdev;
  566. unsigned int vfs_assigned = 0;
  567. unsigned short dev_id;
  568. /* only search if we are a PF */
  569. if (!dev->is_physfn)
  570. return 0;
  571. /*
  572. * determine the device ID for the VFs, the vendor ID will be the
  573. * same as the PF so there is no need to check for that one
  574. */
  575. pci_read_config_word(dev, dev->sriov->pos + PCI_SRIOV_VF_DID, &dev_id);
  576. /* loop through all the VFs to see if we own any that are assigned */
  577. vfdev = pci_get_device(dev->vendor, dev_id, NULL);
  578. while (vfdev) {
  579. /*
  580. * It is considered assigned if it is a virtual function with
  581. * our dev as the physical function and the assigned bit is set
  582. */
  583. if (vfdev->is_virtfn && (vfdev->physfn == dev) &&
  584. pci_is_dev_assigned(vfdev))
  585. vfs_assigned++;
  586. vfdev = pci_get_device(dev->vendor, dev_id, vfdev);
  587. }
  588. return vfs_assigned;
  589. }
  590. EXPORT_SYMBOL_GPL(pci_vfs_assigned);
  591. /**
  592. * pci_sriov_set_totalvfs -- reduce the TotalVFs available
  593. * @dev: the PCI PF device
  594. * @numvfs: number that should be used for TotalVFs supported
  595. *
  596. * Should be called from PF driver's probe routine with
  597. * device's mutex held.
  598. *
  599. * Returns 0 if PF is an SRIOV-capable device and
  600. * value of numvfs valid. If not a PF return -ENOSYS;
  601. * if numvfs is invalid return -EINVAL;
  602. * if VFs already enabled, return -EBUSY.
  603. */
  604. int pci_sriov_set_totalvfs(struct pci_dev *dev, u16 numvfs)
  605. {
  606. if (!dev->is_physfn)
  607. return -ENOSYS;
  608. if (numvfs > dev->sriov->total_VFs)
  609. return -EINVAL;
  610. /* Shouldn't change if VFs already enabled */
  611. if (dev->sriov->ctrl & PCI_SRIOV_CTRL_VFE)
  612. return -EBUSY;
  613. else
  614. dev->sriov->driver_max_VFs = numvfs;
  615. return 0;
  616. }
  617. EXPORT_SYMBOL_GPL(pci_sriov_set_totalvfs);
  618. /**
  619. * pci_sriov_get_totalvfs -- get total VFs supported on this device
  620. * @dev: the PCI PF device
  621. *
  622. * For a PCIe device with SRIOV support, return the PCIe
  623. * SRIOV capability value of TotalVFs or the value of driver_max_VFs
  624. * if the driver reduced it. Otherwise 0.
  625. */
  626. int pci_sriov_get_totalvfs(struct pci_dev *dev)
  627. {
  628. if (!dev->is_physfn)
  629. return 0;
  630. if (dev->sriov->driver_max_VFs)
  631. return dev->sriov->driver_max_VFs;
  632. return dev->sriov->total_VFs;
  633. }
  634. EXPORT_SYMBOL_GPL(pci_sriov_get_totalvfs);