pci-host-generic.c 7.4 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290
  1. /*
  2. * Simple, generic PCI host controller driver targetting firmware-initialised
  3. * systems and virtual machines (e.g. the PCI emulation provided by kvmtool).
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License version 2 as
  7. * published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful,
  10. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. * GNU General Public License for more details.
  13. *
  14. * You should have received a copy of the GNU General Public License
  15. * along with this program. If not, see <http://www.gnu.org/licenses/>.
  16. *
  17. * Copyright (C) 2014 ARM Limited
  18. *
  19. * Author: Will Deacon <will.deacon@arm.com>
  20. */
  21. #include <linux/kernel.h>
  22. #include <linux/module.h>
  23. #include <linux/of_address.h>
  24. #include <linux/of_pci.h>
  25. #include <linux/platform_device.h>
  26. struct gen_pci_cfg_bus_ops {
  27. u32 bus_shift;
  28. void __iomem *(*map_bus)(struct pci_bus *, unsigned int, int);
  29. };
  30. struct gen_pci_cfg_windows {
  31. struct resource res;
  32. struct resource *bus_range;
  33. void __iomem **win;
  34. const struct gen_pci_cfg_bus_ops *ops;
  35. };
  36. /*
  37. * ARM pcibios functions expect the ARM struct pci_sys_data as the PCI
  38. * sysdata. Add pci_sys_data as the first element in struct gen_pci so
  39. * that when we use a gen_pci pointer as sysdata, it is also a pointer to
  40. * a struct pci_sys_data.
  41. */
  42. struct gen_pci {
  43. #ifdef CONFIG_ARM
  44. struct pci_sys_data sys;
  45. #endif
  46. struct pci_host_bridge host;
  47. struct gen_pci_cfg_windows cfg;
  48. struct list_head resources;
  49. };
  50. static void __iomem *gen_pci_map_cfg_bus_cam(struct pci_bus *bus,
  51. unsigned int devfn,
  52. int where)
  53. {
  54. struct gen_pci *pci = bus->sysdata;
  55. resource_size_t idx = bus->number - pci->cfg.bus_range->start;
  56. return pci->cfg.win[idx] + ((devfn << 8) | where);
  57. }
  58. static struct gen_pci_cfg_bus_ops gen_pci_cfg_cam_bus_ops = {
  59. .bus_shift = 16,
  60. .map_bus = gen_pci_map_cfg_bus_cam,
  61. };
  62. static void __iomem *gen_pci_map_cfg_bus_ecam(struct pci_bus *bus,
  63. unsigned int devfn,
  64. int where)
  65. {
  66. struct gen_pci *pci = bus->sysdata;
  67. resource_size_t idx = bus->number - pci->cfg.bus_range->start;
  68. return pci->cfg.win[idx] + ((devfn << 12) | where);
  69. }
  70. static struct gen_pci_cfg_bus_ops gen_pci_cfg_ecam_bus_ops = {
  71. .bus_shift = 20,
  72. .map_bus = gen_pci_map_cfg_bus_ecam,
  73. };
  74. static struct pci_ops gen_pci_ops = {
  75. .read = pci_generic_config_read,
  76. .write = pci_generic_config_write,
  77. };
  78. static const struct of_device_id gen_pci_of_match[] = {
  79. { .compatible = "pci-host-cam-generic",
  80. .data = &gen_pci_cfg_cam_bus_ops },
  81. { .compatible = "pci-host-ecam-generic",
  82. .data = &gen_pci_cfg_ecam_bus_ops },
  83. { },
  84. };
  85. MODULE_DEVICE_TABLE(of, gen_pci_of_match);
  86. static void gen_pci_release_of_pci_ranges(struct gen_pci *pci)
  87. {
  88. pci_free_resource_list(&pci->resources);
  89. }
  90. static int gen_pci_parse_request_of_pci_ranges(struct gen_pci *pci)
  91. {
  92. int err, res_valid = 0;
  93. struct device *dev = pci->host.dev.parent;
  94. struct device_node *np = dev->of_node;
  95. resource_size_t iobase;
  96. struct resource_entry *win;
  97. err = of_pci_get_host_bridge_resources(np, 0, 0xff, &pci->resources,
  98. &iobase);
  99. if (err)
  100. return err;
  101. resource_list_for_each_entry(win, &pci->resources) {
  102. struct resource *parent, *res = win->res;
  103. switch (resource_type(res)) {
  104. case IORESOURCE_IO:
  105. parent = &ioport_resource;
  106. err = pci_remap_iospace(res, iobase);
  107. if (err) {
  108. dev_warn(dev, "error %d: failed to map resource %pR\n",
  109. err, res);
  110. continue;
  111. }
  112. break;
  113. case IORESOURCE_MEM:
  114. parent = &iomem_resource;
  115. res_valid |= !(res->flags & IORESOURCE_PREFETCH);
  116. break;
  117. case IORESOURCE_BUS:
  118. pci->cfg.bus_range = res;
  119. default:
  120. continue;
  121. }
  122. err = devm_request_resource(dev, parent, res);
  123. if (err)
  124. goto out_release_res;
  125. }
  126. if (!res_valid) {
  127. dev_err(dev, "non-prefetchable memory resource required\n");
  128. err = -EINVAL;
  129. goto out_release_res;
  130. }
  131. return 0;
  132. out_release_res:
  133. gen_pci_release_of_pci_ranges(pci);
  134. return err;
  135. }
  136. static int gen_pci_parse_map_cfg_windows(struct gen_pci *pci)
  137. {
  138. int err;
  139. u8 bus_max;
  140. resource_size_t busn;
  141. struct resource *bus_range;
  142. struct device *dev = pci->host.dev.parent;
  143. struct device_node *np = dev->of_node;
  144. err = of_address_to_resource(np, 0, &pci->cfg.res);
  145. if (err) {
  146. dev_err(dev, "missing \"reg\" property\n");
  147. return err;
  148. }
  149. /* Limit the bus-range to fit within reg */
  150. bus_max = pci->cfg.bus_range->start +
  151. (resource_size(&pci->cfg.res) >> pci->cfg.ops->bus_shift) - 1;
  152. pci->cfg.bus_range->end = min_t(resource_size_t,
  153. pci->cfg.bus_range->end, bus_max);
  154. pci->cfg.win = devm_kcalloc(dev, resource_size(pci->cfg.bus_range),
  155. sizeof(*pci->cfg.win), GFP_KERNEL);
  156. if (!pci->cfg.win)
  157. return -ENOMEM;
  158. /* Map our Configuration Space windows */
  159. if (!devm_request_mem_region(dev, pci->cfg.res.start,
  160. resource_size(&pci->cfg.res),
  161. "Configuration Space"))
  162. return -ENOMEM;
  163. bus_range = pci->cfg.bus_range;
  164. for (busn = bus_range->start; busn <= bus_range->end; ++busn) {
  165. u32 idx = busn - bus_range->start;
  166. u32 sz = 1 << pci->cfg.ops->bus_shift;
  167. pci->cfg.win[idx] = devm_ioremap(dev,
  168. pci->cfg.res.start + busn * sz,
  169. sz);
  170. if (!pci->cfg.win[idx])
  171. return -ENOMEM;
  172. }
  173. return 0;
  174. }
  175. static int gen_pci_probe(struct platform_device *pdev)
  176. {
  177. int err;
  178. const char *type;
  179. const struct of_device_id *of_id;
  180. const int *prop;
  181. struct device *dev = &pdev->dev;
  182. struct device_node *np = dev->of_node;
  183. struct gen_pci *pci = devm_kzalloc(dev, sizeof(*pci), GFP_KERNEL);
  184. struct pci_bus *bus, *child;
  185. if (!pci)
  186. return -ENOMEM;
  187. type = of_get_property(np, "device_type", NULL);
  188. if (!type || strcmp(type, "pci")) {
  189. dev_err(dev, "invalid \"device_type\" %s\n", type);
  190. return -EINVAL;
  191. }
  192. prop = of_get_property(of_chosen, "linux,pci-probe-only", NULL);
  193. if (prop) {
  194. if (*prop)
  195. pci_add_flags(PCI_PROBE_ONLY);
  196. else
  197. pci_clear_flags(PCI_PROBE_ONLY);
  198. }
  199. of_id = of_match_node(gen_pci_of_match, np);
  200. pci->cfg.ops = of_id->data;
  201. gen_pci_ops.map_bus = pci->cfg.ops->map_bus;
  202. pci->host.dev.parent = dev;
  203. INIT_LIST_HEAD(&pci->host.windows);
  204. INIT_LIST_HEAD(&pci->resources);
  205. /* Parse our PCI ranges and request their resources */
  206. err = gen_pci_parse_request_of_pci_ranges(pci);
  207. if (err)
  208. return err;
  209. /* Parse and map our Configuration Space windows */
  210. err = gen_pci_parse_map_cfg_windows(pci);
  211. if (err) {
  212. gen_pci_release_of_pci_ranges(pci);
  213. return err;
  214. }
  215. /* Do not reassign resources if probe only */
  216. if (!pci_has_flag(PCI_PROBE_ONLY))
  217. pci_add_flags(PCI_REASSIGN_ALL_RSRC | PCI_REASSIGN_ALL_BUS);
  218. bus = pci_scan_root_bus(dev, 0, &gen_pci_ops, pci, &pci->resources);
  219. if (!bus) {
  220. dev_err(dev, "Scanning rootbus failed");
  221. return -ENODEV;
  222. }
  223. pci_fixup_irqs(pci_common_swizzle, of_irq_parse_and_map_pci);
  224. if (!pci_has_flag(PCI_PROBE_ONLY)) {
  225. pci_bus_size_bridges(bus);
  226. pci_bus_assign_resources(bus);
  227. list_for_each_entry(child, &bus->children, node)
  228. pcie_bus_configure_settings(child);
  229. }
  230. pci_bus_add_devices(bus);
  231. return 0;
  232. }
  233. static struct platform_driver gen_pci_driver = {
  234. .driver = {
  235. .name = "pci-host-generic",
  236. .of_match_table = gen_pci_of_match,
  237. },
  238. .probe = gen_pci_probe,
  239. };
  240. module_platform_driver(gen_pci_driver);
  241. MODULE_DESCRIPTION("Generic PCI host driver");
  242. MODULE_AUTHOR("Will Deacon <will.deacon@arm.com>");
  243. MODULE_LICENSE("GPL v2");