dm.c 46 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2009-2012 Realtek Corporation.
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of version 2 of the GNU General Public License as
  7. * published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. *
  14. * You should have received a copy of the GNU General Public License along with
  15. * this program; if not, write to the Free Software Foundation, Inc.,
  16. * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  17. *
  18. * The full GNU General Public License is included in this distribution in the
  19. * file called LICENSE.
  20. *
  21. * Contact Information:
  22. * wlanfae <wlanfae@realtek.com>
  23. * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
  24. * Hsinchu 300, Taiwan.
  25. *
  26. * Larry Finger <Larry.Finger@lwfinger.net>
  27. *
  28. *****************************************************************************/
  29. #include "../wifi.h"
  30. #include "../base.h"
  31. #include "../core.h"
  32. #include "reg.h"
  33. #include "def.h"
  34. #include "phy.h"
  35. #include "dm.h"
  36. #include "fw.h"
  37. #define UNDEC_SM_PWDB entry_min_undec_sm_pwdb
  38. static const u32 ofdmswing_table[OFDM_TABLE_SIZE_92D] = {
  39. 0x7f8001fe, /* 0, +6.0dB */
  40. 0x788001e2, /* 1, +5.5dB */
  41. 0x71c001c7, /* 2, +5.0dB */
  42. 0x6b8001ae, /* 3, +4.5dB */
  43. 0x65400195, /* 4, +4.0dB */
  44. 0x5fc0017f, /* 5, +3.5dB */
  45. 0x5a400169, /* 6, +3.0dB */
  46. 0x55400155, /* 7, +2.5dB */
  47. 0x50800142, /* 8, +2.0dB */
  48. 0x4c000130, /* 9, +1.5dB */
  49. 0x47c0011f, /* 10, +1.0dB */
  50. 0x43c0010f, /* 11, +0.5dB */
  51. 0x40000100, /* 12, +0dB */
  52. 0x3c8000f2, /* 13, -0.5dB */
  53. 0x390000e4, /* 14, -1.0dB */
  54. 0x35c000d7, /* 15, -1.5dB */
  55. 0x32c000cb, /* 16, -2.0dB */
  56. 0x300000c0, /* 17, -2.5dB */
  57. 0x2d4000b5, /* 18, -3.0dB */
  58. 0x2ac000ab, /* 19, -3.5dB */
  59. 0x288000a2, /* 20, -4.0dB */
  60. 0x26000098, /* 21, -4.5dB */
  61. 0x24000090, /* 22, -5.0dB */
  62. 0x22000088, /* 23, -5.5dB */
  63. 0x20000080, /* 24, -6.0dB */
  64. 0x1e400079, /* 25, -6.5dB */
  65. 0x1c800072, /* 26, -7.0dB */
  66. 0x1b00006c, /* 27. -7.5dB */
  67. 0x19800066, /* 28, -8.0dB */
  68. 0x18000060, /* 29, -8.5dB */
  69. 0x16c0005b, /* 30, -9.0dB */
  70. 0x15800056, /* 31, -9.5dB */
  71. 0x14400051, /* 32, -10.0dB */
  72. 0x1300004c, /* 33, -10.5dB */
  73. 0x12000048, /* 34, -11.0dB */
  74. 0x11000044, /* 35, -11.5dB */
  75. 0x10000040, /* 36, -12.0dB */
  76. 0x0f00003c, /* 37, -12.5dB */
  77. 0x0e400039, /* 38, -13.0dB */
  78. 0x0d800036, /* 39, -13.5dB */
  79. 0x0cc00033, /* 40, -14.0dB */
  80. 0x0c000030, /* 41, -14.5dB */
  81. 0x0b40002d, /* 42, -15.0dB */
  82. };
  83. static const u8 cckswing_table_ch1ch13[CCK_TABLE_SIZE][8] = {
  84. {0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04}, /* 0, +0dB */
  85. {0x33, 0x32, 0x2b, 0x23, 0x1a, 0x11, 0x08, 0x04}, /* 1, -0.5dB */
  86. {0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x03}, /* 2, -1.0dB */
  87. {0x2d, 0x2d, 0x27, 0x1f, 0x18, 0x0f, 0x08, 0x03}, /* 3, -1.5dB */
  88. {0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03}, /* 4, -2.0dB */
  89. {0x28, 0x28, 0x22, 0x1c, 0x15, 0x0d, 0x07, 0x03}, /* 5, -2.5dB */
  90. {0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03}, /* 6, -3.0dB */
  91. {0x24, 0x23, 0x1f, 0x19, 0x13, 0x0c, 0x06, 0x03}, /* 7, -3.5dB */
  92. {0x22, 0x21, 0x1d, 0x18, 0x11, 0x0b, 0x06, 0x02}, /* 8, -4.0dB */
  93. {0x20, 0x20, 0x1b, 0x16, 0x11, 0x08, 0x05, 0x02}, /* 9, -4.5dB */
  94. {0x1f, 0x1e, 0x1a, 0x15, 0x10, 0x0a, 0x05, 0x02}, /* 10, -5.0dB */
  95. {0x1d, 0x1c, 0x18, 0x14, 0x0f, 0x0a, 0x05, 0x02}, /* 11, -5.5dB */
  96. {0x1b, 0x1a, 0x17, 0x13, 0x0e, 0x09, 0x04, 0x02}, /* 12, -6.0dB */
  97. {0x1a, 0x19, 0x16, 0x12, 0x0d, 0x09, 0x04, 0x02}, /* 13, -6.5dB */
  98. {0x18, 0x17, 0x15, 0x11, 0x0c, 0x08, 0x04, 0x02}, /* 14, -7.0dB */
  99. {0x17, 0x16, 0x13, 0x10, 0x0c, 0x08, 0x04, 0x02}, /* 15, -7.5dB */
  100. {0x16, 0x15, 0x12, 0x0f, 0x0b, 0x07, 0x04, 0x01}, /* 16, -8.0dB */
  101. {0x14, 0x14, 0x11, 0x0e, 0x0b, 0x07, 0x03, 0x02}, /* 17, -8.5dB */
  102. {0x13, 0x13, 0x10, 0x0d, 0x0a, 0x06, 0x03, 0x01}, /* 18, -9.0dB */
  103. {0x12, 0x12, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, /* 19, -9.5dB */
  104. {0x11, 0x11, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, /* 20, -10.0dB */
  105. {0x10, 0x10, 0x0e, 0x0b, 0x08, 0x05, 0x03, 0x01}, /* 21, -10.5dB */
  106. {0x0f, 0x0f, 0x0d, 0x0b, 0x08, 0x05, 0x03, 0x01}, /* 22, -11.0dB */
  107. {0x0e, 0x0e, 0x0c, 0x0a, 0x08, 0x05, 0x02, 0x01}, /* 23, -11.5dB */
  108. {0x0d, 0x0d, 0x0c, 0x0a, 0x07, 0x05, 0x02, 0x01}, /* 24, -12.0dB */
  109. {0x0d, 0x0c, 0x0b, 0x09, 0x07, 0x04, 0x02, 0x01}, /* 25, -12.5dB */
  110. {0x0c, 0x0c, 0x0a, 0x09, 0x06, 0x04, 0x02, 0x01}, /* 26, -13.0dB */
  111. {0x0b, 0x0b, 0x0a, 0x08, 0x06, 0x04, 0x02, 0x01}, /* 27, -13.5dB */
  112. {0x0b, 0x0a, 0x09, 0x08, 0x06, 0x04, 0x02, 0x01}, /* 28, -14.0dB */
  113. {0x0a, 0x0a, 0x09, 0x07, 0x05, 0x03, 0x02, 0x01}, /* 29, -14.5dB */
  114. {0x0a, 0x09, 0x08, 0x07, 0x05, 0x03, 0x02, 0x01}, /* 30, -15.0dB */
  115. {0x09, 0x09, 0x08, 0x06, 0x05, 0x03, 0x01, 0x01}, /* 31, -15.5dB */
  116. {0x09, 0x08, 0x07, 0x06, 0x04, 0x03, 0x01, 0x01} /* 32, -16.0dB */
  117. };
  118. static const u8 cckswing_table_ch14[CCK_TABLE_SIZE][8] = {
  119. {0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00}, /* 0, +0dB */
  120. {0x33, 0x32, 0x2b, 0x19, 0x00, 0x00, 0x00, 0x00}, /* 1, -0.5dB */
  121. {0x30, 0x2f, 0x29, 0x18, 0x00, 0x00, 0x00, 0x00}, /* 2, -1.0dB */
  122. {0x2d, 0x2d, 0x17, 0x17, 0x00, 0x00, 0x00, 0x00}, /* 3, -1.5dB */
  123. {0x2b, 0x2a, 0x25, 0x15, 0x00, 0x00, 0x00, 0x00}, /* 4, -2.0dB */
  124. {0x28, 0x28, 0x24, 0x14, 0x00, 0x00, 0x00, 0x00}, /* 5, -2.5dB */
  125. {0x26, 0x25, 0x21, 0x13, 0x00, 0x00, 0x00, 0x00}, /* 6, -3.0dB */
  126. {0x24, 0x23, 0x1f, 0x12, 0x00, 0x00, 0x00, 0x00}, /* 7, -3.5dB */
  127. {0x22, 0x21, 0x1d, 0x11, 0x00, 0x00, 0x00, 0x00}, /* 8, -4.0dB */
  128. {0x20, 0x20, 0x1b, 0x10, 0x00, 0x00, 0x00, 0x00}, /* 9, -4.5dB */
  129. {0x1f, 0x1e, 0x1a, 0x0f, 0x00, 0x00, 0x00, 0x00}, /* 10, -5.0dB */
  130. {0x1d, 0x1c, 0x18, 0x0e, 0x00, 0x00, 0x00, 0x00}, /* 11, -5.5dB */
  131. {0x1b, 0x1a, 0x17, 0x0e, 0x00, 0x00, 0x00, 0x00}, /* 12, -6.0dB */
  132. {0x1a, 0x19, 0x16, 0x0d, 0x00, 0x00, 0x00, 0x00}, /* 13, -6.5dB */
  133. {0x18, 0x17, 0x15, 0x0c, 0x00, 0x00, 0x00, 0x00}, /* 14, -7.0dB */
  134. {0x17, 0x16, 0x13, 0x0b, 0x00, 0x00, 0x00, 0x00}, /* 15, -7.5dB */
  135. {0x16, 0x15, 0x12, 0x0b, 0x00, 0x00, 0x00, 0x00}, /* 16, -8.0dB */
  136. {0x14, 0x14, 0x11, 0x0a, 0x00, 0x00, 0x00, 0x00}, /* 17, -8.5dB */
  137. {0x13, 0x13, 0x10, 0x0a, 0x00, 0x00, 0x00, 0x00}, /* 18, -9.0dB */
  138. {0x12, 0x12, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, /* 19, -9.5dB */
  139. {0x11, 0x11, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, /* 20, -10.0dB */
  140. {0x10, 0x10, 0x0e, 0x08, 0x00, 0x00, 0x00, 0x00}, /* 21, -10.5dB */
  141. {0x0f, 0x0f, 0x0d, 0x08, 0x00, 0x00, 0x00, 0x00}, /* 22, -11.0dB */
  142. {0x0e, 0x0e, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, /* 23, -11.5dB */
  143. {0x0d, 0x0d, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, /* 24, -12.0dB */
  144. {0x0d, 0x0c, 0x0b, 0x06, 0x00, 0x00, 0x00, 0x00}, /* 25, -12.5dB */
  145. {0x0c, 0x0c, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, /* 26, -13.0dB */
  146. {0x0b, 0x0b, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, /* 27, -13.5dB */
  147. {0x0b, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 28, -14.0dB */
  148. {0x0a, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 29, -14.5dB */
  149. {0x0a, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 30, -15.0dB */
  150. {0x09, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 31, -15.5dB */
  151. {0x09, 0x08, 0x07, 0x04, 0x00, 0x00, 0x00, 0x00} /* 32, -16.0dB */
  152. };
  153. static void rtl92d_dm_false_alarm_counter_statistics(struct ieee80211_hw *hw)
  154. {
  155. u32 ret_value;
  156. struct rtl_priv *rtlpriv = rtl_priv(hw);
  157. struct false_alarm_statistics *falsealm_cnt = &(rtlpriv->falsealm_cnt);
  158. unsigned long flag = 0;
  159. /* hold ofdm counter */
  160. rtl_set_bbreg(hw, ROFDM0_LSTF, BIT(31), 1); /* hold page C counter */
  161. rtl_set_bbreg(hw, ROFDM1_LSTF, BIT(31), 1); /*hold page D counter */
  162. ret_value = rtl_get_bbreg(hw, ROFDM0_FRAMESYNC, MASKDWORD);
  163. falsealm_cnt->cnt_fast_fsync_fail = (ret_value & 0xffff);
  164. falsealm_cnt->cnt_sb_search_fail = ((ret_value & 0xffff0000) >> 16);
  165. ret_value = rtl_get_bbreg(hw, ROFDM_PHYCOUNTER1, MASKDWORD);
  166. falsealm_cnt->cnt_parity_fail = ((ret_value & 0xffff0000) >> 16);
  167. ret_value = rtl_get_bbreg(hw, ROFDM_PHYCOUNTER2, MASKDWORD);
  168. falsealm_cnt->cnt_rate_illegal = (ret_value & 0xffff);
  169. falsealm_cnt->cnt_crc8_fail = ((ret_value & 0xffff0000) >> 16);
  170. ret_value = rtl_get_bbreg(hw, ROFDM_PHYCOUNTER3, MASKDWORD);
  171. falsealm_cnt->cnt_mcs_fail = (ret_value & 0xffff);
  172. falsealm_cnt->cnt_ofdm_fail = falsealm_cnt->cnt_parity_fail +
  173. falsealm_cnt->cnt_rate_illegal +
  174. falsealm_cnt->cnt_crc8_fail +
  175. falsealm_cnt->cnt_mcs_fail +
  176. falsealm_cnt->cnt_fast_fsync_fail +
  177. falsealm_cnt->cnt_sb_search_fail;
  178. if (rtlpriv->rtlhal.current_bandtype != BAND_ON_5G) {
  179. /* hold cck counter */
  180. rtl92d_acquire_cckandrw_pagea_ctl(hw, &flag);
  181. ret_value = rtl_get_bbreg(hw, RCCK0_FACOUNTERLOWER, MASKBYTE0);
  182. falsealm_cnt->cnt_cck_fail = ret_value;
  183. ret_value = rtl_get_bbreg(hw, RCCK0_FACOUNTERUPPER, MASKBYTE3);
  184. falsealm_cnt->cnt_cck_fail += (ret_value & 0xff) << 8;
  185. rtl92d_release_cckandrw_pagea_ctl(hw, &flag);
  186. } else {
  187. falsealm_cnt->cnt_cck_fail = 0;
  188. }
  189. /* reset false alarm counter registers */
  190. falsealm_cnt->cnt_all = falsealm_cnt->cnt_fast_fsync_fail +
  191. falsealm_cnt->cnt_sb_search_fail +
  192. falsealm_cnt->cnt_parity_fail +
  193. falsealm_cnt->cnt_rate_illegal +
  194. falsealm_cnt->cnt_crc8_fail +
  195. falsealm_cnt->cnt_mcs_fail +
  196. falsealm_cnt->cnt_cck_fail;
  197. rtl_set_bbreg(hw, ROFDM1_LSTF, 0x08000000, 1);
  198. /* update ofdm counter */
  199. rtl_set_bbreg(hw, ROFDM1_LSTF, 0x08000000, 0);
  200. /* update page C counter */
  201. rtl_set_bbreg(hw, ROFDM0_LSTF, BIT(31), 0);
  202. /* update page D counter */
  203. rtl_set_bbreg(hw, ROFDM1_LSTF, BIT(31), 0);
  204. if (rtlpriv->rtlhal.current_bandtype != BAND_ON_5G) {
  205. /* reset cck counter */
  206. rtl92d_acquire_cckandrw_pagea_ctl(hw, &flag);
  207. rtl_set_bbreg(hw, RCCK0_FALSEALARMREPORT, 0x0000c000, 0);
  208. /* enable cck counter */
  209. rtl_set_bbreg(hw, RCCK0_FALSEALARMREPORT, 0x0000c000, 2);
  210. rtl92d_release_cckandrw_pagea_ctl(hw, &flag);
  211. }
  212. RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD,
  213. "Cnt_Fast_Fsync_fail = %x, Cnt_SB_Search_fail = %x\n",
  214. falsealm_cnt->cnt_fast_fsync_fail,
  215. falsealm_cnt->cnt_sb_search_fail);
  216. RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD,
  217. "Cnt_Parity_Fail = %x, Cnt_Rate_Illegal = %x, Cnt_Crc8_fail = %x, Cnt_Mcs_fail = %x\n",
  218. falsealm_cnt->cnt_parity_fail,
  219. falsealm_cnt->cnt_rate_illegal,
  220. falsealm_cnt->cnt_crc8_fail,
  221. falsealm_cnt->cnt_mcs_fail);
  222. RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD,
  223. "Cnt_Ofdm_fail = %x, Cnt_Cck_fail = %x, Cnt_all = %x\n",
  224. falsealm_cnt->cnt_ofdm_fail,
  225. falsealm_cnt->cnt_cck_fail,
  226. falsealm_cnt->cnt_all);
  227. }
  228. static void rtl92d_dm_find_minimum_rssi(struct ieee80211_hw *hw)
  229. {
  230. struct rtl_priv *rtlpriv = rtl_priv(hw);
  231. struct dig_t *de_digtable = &rtlpriv->dm_digtable;
  232. struct rtl_mac *mac = rtl_mac(rtlpriv);
  233. /* Determine the minimum RSSI */
  234. if ((mac->link_state < MAC80211_LINKED) &&
  235. (rtlpriv->dm.UNDEC_SM_PWDB == 0)) {
  236. de_digtable->min_undec_pwdb_for_dm = 0;
  237. RT_TRACE(rtlpriv, COMP_BB_POWERSAVING, DBG_LOUD,
  238. "Not connected to any\n");
  239. }
  240. if (mac->link_state >= MAC80211_LINKED) {
  241. if (mac->opmode == NL80211_IFTYPE_AP ||
  242. mac->opmode == NL80211_IFTYPE_ADHOC) {
  243. de_digtable->min_undec_pwdb_for_dm =
  244. rtlpriv->dm.UNDEC_SM_PWDB;
  245. RT_TRACE(rtlpriv, COMP_BB_POWERSAVING, DBG_LOUD,
  246. "AP Client PWDB = 0x%lx\n",
  247. rtlpriv->dm.UNDEC_SM_PWDB);
  248. } else {
  249. de_digtable->min_undec_pwdb_for_dm =
  250. rtlpriv->dm.undec_sm_pwdb;
  251. RT_TRACE(rtlpriv, COMP_BB_POWERSAVING, DBG_LOUD,
  252. "STA Default Port PWDB = 0x%x\n",
  253. de_digtable->min_undec_pwdb_for_dm);
  254. }
  255. } else {
  256. de_digtable->min_undec_pwdb_for_dm = rtlpriv->dm.UNDEC_SM_PWDB;
  257. RT_TRACE(rtlpriv, COMP_BB_POWERSAVING, DBG_LOUD,
  258. "AP Ext Port or disconnect PWDB = 0x%x\n",
  259. de_digtable->min_undec_pwdb_for_dm);
  260. }
  261. RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, "MinUndecoratedPWDBForDM =%d\n",
  262. de_digtable->min_undec_pwdb_for_dm);
  263. }
  264. static void rtl92d_dm_cck_packet_detection_thresh(struct ieee80211_hw *hw)
  265. {
  266. struct rtl_priv *rtlpriv = rtl_priv(hw);
  267. struct dig_t *de_digtable = &rtlpriv->dm_digtable;
  268. unsigned long flag = 0;
  269. if (de_digtable->cursta_cstate == DIG_STA_CONNECT) {
  270. if (de_digtable->pre_cck_pd_state == CCK_PD_STAGE_LOWRSSI) {
  271. if (de_digtable->min_undec_pwdb_for_dm <= 25)
  272. de_digtable->cur_cck_pd_state =
  273. CCK_PD_STAGE_LOWRSSI;
  274. else
  275. de_digtable->cur_cck_pd_state =
  276. CCK_PD_STAGE_HIGHRSSI;
  277. } else {
  278. if (de_digtable->min_undec_pwdb_for_dm <= 20)
  279. de_digtable->cur_cck_pd_state =
  280. CCK_PD_STAGE_LOWRSSI;
  281. else
  282. de_digtable->cur_cck_pd_state =
  283. CCK_PD_STAGE_HIGHRSSI;
  284. }
  285. } else {
  286. de_digtable->cur_cck_pd_state = CCK_PD_STAGE_LOWRSSI;
  287. }
  288. if (de_digtable->pre_cck_pd_state != de_digtable->cur_cck_pd_state) {
  289. if (de_digtable->cur_cck_pd_state == CCK_PD_STAGE_LOWRSSI) {
  290. rtl92d_acquire_cckandrw_pagea_ctl(hw, &flag);
  291. rtl_set_bbreg(hw, RCCK0_CCA, MASKBYTE2, 0x83);
  292. rtl92d_release_cckandrw_pagea_ctl(hw, &flag);
  293. } else {
  294. rtl92d_acquire_cckandrw_pagea_ctl(hw, &flag);
  295. rtl_set_bbreg(hw, RCCK0_CCA, MASKBYTE2, 0xcd);
  296. rtl92d_release_cckandrw_pagea_ctl(hw, &flag);
  297. }
  298. de_digtable->pre_cck_pd_state = de_digtable->cur_cck_pd_state;
  299. }
  300. RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, "CurSTAConnectState=%s\n",
  301. de_digtable->cursta_cstate == DIG_STA_CONNECT ?
  302. "DIG_STA_CONNECT " : "DIG_STA_DISCONNECT");
  303. RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, "CCKPDStage=%s\n",
  304. de_digtable->cur_cck_pd_state == CCK_PD_STAGE_LOWRSSI ?
  305. "Low RSSI " : "High RSSI ");
  306. RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, "is92d single phy =%x\n",
  307. IS_92D_SINGLEPHY(rtlpriv->rtlhal.version));
  308. }
  309. void rtl92d_dm_write_dig(struct ieee80211_hw *hw)
  310. {
  311. struct rtl_priv *rtlpriv = rtl_priv(hw);
  312. struct dig_t *de_digtable = &rtlpriv->dm_digtable;
  313. RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD,
  314. "cur_igvalue = 0x%x, pre_igvalue = 0x%x, back_val = %d\n",
  315. de_digtable->cur_igvalue, de_digtable->pre_igvalue,
  316. de_digtable->back_val);
  317. if (de_digtable->dig_enable_flag == false) {
  318. RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, "DIG is disabled\n");
  319. de_digtable->pre_igvalue = 0x17;
  320. return;
  321. }
  322. if (de_digtable->pre_igvalue != de_digtable->cur_igvalue) {
  323. rtl_set_bbreg(hw, ROFDM0_XAAGCCORE1, 0x7f,
  324. de_digtable->cur_igvalue);
  325. rtl_set_bbreg(hw, ROFDM0_XBAGCCORE1, 0x7f,
  326. de_digtable->cur_igvalue);
  327. de_digtable->pre_igvalue = de_digtable->cur_igvalue;
  328. }
  329. }
  330. static void rtl92d_early_mode_enabled(struct rtl_priv *rtlpriv)
  331. {
  332. struct dig_t *de_digtable = &rtlpriv->dm_digtable;
  333. if ((rtlpriv->mac80211.link_state >= MAC80211_LINKED) &&
  334. (rtlpriv->mac80211.vendor == PEER_CISCO)) {
  335. RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, "IOT_PEER = CISCO\n");
  336. if (de_digtable->last_min_undec_pwdb_for_dm >= 50
  337. && de_digtable->min_undec_pwdb_for_dm < 50) {
  338. rtl_write_byte(rtlpriv, REG_EARLY_MODE_CONTROL, 0x00);
  339. RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD,
  340. "Early Mode Off\n");
  341. } else if (de_digtable->last_min_undec_pwdb_for_dm <= 55 &&
  342. de_digtable->min_undec_pwdb_for_dm > 55) {
  343. rtl_write_byte(rtlpriv, REG_EARLY_MODE_CONTROL, 0x0f);
  344. RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD,
  345. "Early Mode On\n");
  346. }
  347. } else if (!(rtl_read_byte(rtlpriv, REG_EARLY_MODE_CONTROL) & 0xf)) {
  348. rtl_write_byte(rtlpriv, REG_EARLY_MODE_CONTROL, 0x0f);
  349. RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, "Early Mode On\n");
  350. }
  351. }
  352. static void rtl92d_dm_dig(struct ieee80211_hw *hw)
  353. {
  354. struct rtl_priv *rtlpriv = rtl_priv(hw);
  355. struct dig_t *de_digtable = &rtlpriv->dm_digtable;
  356. u8 value_igi = de_digtable->cur_igvalue;
  357. struct false_alarm_statistics *falsealm_cnt = &(rtlpriv->falsealm_cnt);
  358. RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, "==>\n");
  359. if (rtlpriv->rtlhal.earlymode_enable) {
  360. rtl92d_early_mode_enabled(rtlpriv);
  361. de_digtable->last_min_undec_pwdb_for_dm =
  362. de_digtable->min_undec_pwdb_for_dm;
  363. }
  364. if (!rtlpriv->dm.dm_initialgain_enable)
  365. return;
  366. /* because we will send data pkt when scanning
  367. * this will cause some ap like gear-3700 wep TP
  368. * lower if we return here, this is the diff of
  369. * mac80211 driver vs ieee80211 driver */
  370. /* if (rtlpriv->mac80211.act_scanning)
  371. * return; */
  372. /* Not STA mode return tmp */
  373. if (rtlpriv->mac80211.opmode != NL80211_IFTYPE_STATION)
  374. return;
  375. RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, "progress\n");
  376. /* Decide the current status and if modify initial gain or not */
  377. if (rtlpriv->mac80211.link_state >= MAC80211_LINKED)
  378. de_digtable->cursta_cstate = DIG_STA_CONNECT;
  379. else
  380. de_digtable->cursta_cstate = DIG_STA_DISCONNECT;
  381. /* adjust initial gain according to false alarm counter */
  382. if (falsealm_cnt->cnt_all < DM_DIG_FA_TH0)
  383. value_igi--;
  384. else if (falsealm_cnt->cnt_all < DM_DIG_FA_TH1)
  385. value_igi += 0;
  386. else if (falsealm_cnt->cnt_all < DM_DIG_FA_TH2)
  387. value_igi++;
  388. else if (falsealm_cnt->cnt_all >= DM_DIG_FA_TH2)
  389. value_igi += 2;
  390. RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD,
  391. "dm_DIG() Before: large_fa_hit=%d, forbidden_igi=%x\n",
  392. de_digtable->large_fa_hit, de_digtable->forbidden_igi);
  393. RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD,
  394. "dm_DIG() Before: Recover_cnt=%d, rx_gain_min=%x\n",
  395. de_digtable->recover_cnt, de_digtable->rx_gain_min);
  396. /* deal with abnormally large false alarm */
  397. if (falsealm_cnt->cnt_all > 10000) {
  398. RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD,
  399. "dm_DIG(): Abnormally false alarm case\n");
  400. de_digtable->large_fa_hit++;
  401. if (de_digtable->forbidden_igi < de_digtable->cur_igvalue) {
  402. de_digtable->forbidden_igi = de_digtable->cur_igvalue;
  403. de_digtable->large_fa_hit = 1;
  404. }
  405. if (de_digtable->large_fa_hit >= 3) {
  406. if ((de_digtable->forbidden_igi + 1) > DM_DIG_MAX)
  407. de_digtable->rx_gain_min = DM_DIG_MAX;
  408. else
  409. de_digtable->rx_gain_min =
  410. (de_digtable->forbidden_igi + 1);
  411. de_digtable->recover_cnt = 3600; /* 3600=2hr */
  412. }
  413. } else {
  414. /* Recovery mechanism for IGI lower bound */
  415. if (de_digtable->recover_cnt != 0) {
  416. de_digtable->recover_cnt--;
  417. } else {
  418. if (de_digtable->large_fa_hit == 0) {
  419. if ((de_digtable->forbidden_igi - 1) <
  420. DM_DIG_FA_LOWER) {
  421. de_digtable->forbidden_igi =
  422. DM_DIG_FA_LOWER;
  423. de_digtable->rx_gain_min =
  424. DM_DIG_FA_LOWER;
  425. } else {
  426. de_digtable->forbidden_igi--;
  427. de_digtable->rx_gain_min =
  428. (de_digtable->forbidden_igi + 1);
  429. }
  430. } else if (de_digtable->large_fa_hit == 3) {
  431. de_digtable->large_fa_hit = 0;
  432. }
  433. }
  434. }
  435. RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD,
  436. "dm_DIG() After: large_fa_hit=%d, forbidden_igi=%x\n",
  437. de_digtable->large_fa_hit, de_digtable->forbidden_igi);
  438. RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD,
  439. "dm_DIG() After: recover_cnt=%d, rx_gain_min=%x\n",
  440. de_digtable->recover_cnt, de_digtable->rx_gain_min);
  441. if (value_igi > DM_DIG_MAX)
  442. value_igi = DM_DIG_MAX;
  443. else if (value_igi < de_digtable->rx_gain_min)
  444. value_igi = de_digtable->rx_gain_min;
  445. de_digtable->cur_igvalue = value_igi;
  446. rtl92d_dm_write_dig(hw);
  447. if (rtlpriv->rtlhal.current_bandtype != BAND_ON_5G)
  448. rtl92d_dm_cck_packet_detection_thresh(hw);
  449. RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, "<<==\n");
  450. }
  451. static void rtl92d_dm_init_dynamic_txpower(struct ieee80211_hw *hw)
  452. {
  453. struct rtl_priv *rtlpriv = rtl_priv(hw);
  454. rtlpriv->dm.dynamic_txpower_enable = true;
  455. rtlpriv->dm.last_dtp_lvl = TXHIGHPWRLEVEL_NORMAL;
  456. rtlpriv->dm.dynamic_txhighpower_lvl = TXHIGHPWRLEVEL_NORMAL;
  457. }
  458. static void rtl92d_dm_dynamic_txpower(struct ieee80211_hw *hw)
  459. {
  460. struct rtl_priv *rtlpriv = rtl_priv(hw);
  461. struct rtl_phy *rtlphy = &(rtlpriv->phy);
  462. struct rtl_hal *rtlhal = rtl_hal(rtlpriv);
  463. struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
  464. long undec_sm_pwdb;
  465. if ((!rtlpriv->dm.dynamic_txpower_enable)
  466. || rtlpriv->dm.dm_flag & HAL_DM_HIPWR_DISABLE) {
  467. rtlpriv->dm.dynamic_txhighpower_lvl = TXHIGHPWRLEVEL_NORMAL;
  468. return;
  469. }
  470. if ((mac->link_state < MAC80211_LINKED) &&
  471. (rtlpriv->dm.UNDEC_SM_PWDB == 0)) {
  472. RT_TRACE(rtlpriv, COMP_POWER, DBG_TRACE,
  473. "Not connected to any\n");
  474. rtlpriv->dm.dynamic_txhighpower_lvl = TXHIGHPWRLEVEL_NORMAL;
  475. rtlpriv->dm.last_dtp_lvl = TXHIGHPWRLEVEL_NORMAL;
  476. return;
  477. }
  478. if (mac->link_state >= MAC80211_LINKED) {
  479. if (mac->opmode == NL80211_IFTYPE_ADHOC) {
  480. undec_sm_pwdb =
  481. rtlpriv->dm.UNDEC_SM_PWDB;
  482. RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
  483. "IBSS Client PWDB = 0x%lx\n",
  484. undec_sm_pwdb);
  485. } else {
  486. undec_sm_pwdb =
  487. rtlpriv->dm.undec_sm_pwdb;
  488. RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
  489. "STA Default Port PWDB = 0x%lx\n",
  490. undec_sm_pwdb);
  491. }
  492. } else {
  493. undec_sm_pwdb =
  494. rtlpriv->dm.UNDEC_SM_PWDB;
  495. RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
  496. "AP Ext Port PWDB = 0x%lx\n",
  497. undec_sm_pwdb);
  498. }
  499. if (rtlhal->current_bandtype == BAND_ON_5G) {
  500. if (undec_sm_pwdb >= 0x33) {
  501. rtlpriv->dm.dynamic_txhighpower_lvl =
  502. TXHIGHPWRLEVEL_LEVEL2;
  503. RT_TRACE(rtlpriv, COMP_HIPWR, DBG_LOUD,
  504. "5G:TxHighPwrLevel_Level2 (TxPwr=0x0)\n");
  505. } else if ((undec_sm_pwdb < 0x33)
  506. && (undec_sm_pwdb >= 0x2b)) {
  507. rtlpriv->dm.dynamic_txhighpower_lvl =
  508. TXHIGHPWRLEVEL_LEVEL1;
  509. RT_TRACE(rtlpriv, COMP_HIPWR, DBG_LOUD,
  510. "5G:TxHighPwrLevel_Level1 (TxPwr=0x10)\n");
  511. } else if (undec_sm_pwdb < 0x2b) {
  512. rtlpriv->dm.dynamic_txhighpower_lvl =
  513. TXHIGHPWRLEVEL_NORMAL;
  514. RT_TRACE(rtlpriv, COMP_HIPWR, DBG_LOUD,
  515. "5G:TxHighPwrLevel_Normal\n");
  516. }
  517. } else {
  518. if (undec_sm_pwdb >=
  519. TX_POWER_NEAR_FIELD_THRESH_LVL2) {
  520. rtlpriv->dm.dynamic_txhighpower_lvl =
  521. TXHIGHPWRLEVEL_LEVEL2;
  522. RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
  523. "TXHIGHPWRLEVEL_LEVEL1 (TxPwr=0x0)\n");
  524. } else
  525. if ((undec_sm_pwdb <
  526. (TX_POWER_NEAR_FIELD_THRESH_LVL2 - 3))
  527. && (undec_sm_pwdb >=
  528. TX_POWER_NEAR_FIELD_THRESH_LVL1)) {
  529. rtlpriv->dm.dynamic_txhighpower_lvl =
  530. TXHIGHPWRLEVEL_LEVEL1;
  531. RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
  532. "TXHIGHPWRLEVEL_LEVEL1 (TxPwr=0x10)\n");
  533. } else if (undec_sm_pwdb <
  534. (TX_POWER_NEAR_FIELD_THRESH_LVL1 - 5)) {
  535. rtlpriv->dm.dynamic_txhighpower_lvl =
  536. TXHIGHPWRLEVEL_NORMAL;
  537. RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
  538. "TXHIGHPWRLEVEL_NORMAL\n");
  539. }
  540. }
  541. if ((rtlpriv->dm.dynamic_txhighpower_lvl != rtlpriv->dm.last_dtp_lvl)) {
  542. RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
  543. "PHY_SetTxPowerLevel8192S() Channel = %d\n",
  544. rtlphy->current_channel);
  545. rtl92d_phy_set_txpower_level(hw, rtlphy->current_channel);
  546. }
  547. rtlpriv->dm.last_dtp_lvl = rtlpriv->dm.dynamic_txhighpower_lvl;
  548. }
  549. static void rtl92d_dm_pwdb_monitor(struct ieee80211_hw *hw)
  550. {
  551. struct rtl_priv *rtlpriv = rtl_priv(hw);
  552. /* AP & ADHOC & MESH will return tmp */
  553. if (rtlpriv->mac80211.opmode != NL80211_IFTYPE_STATION)
  554. return;
  555. /* Indicate Rx signal strength to FW. */
  556. if (rtlpriv->dm.useramask) {
  557. u32 temp = rtlpriv->dm.undec_sm_pwdb;
  558. temp <<= 16;
  559. temp |= 0x100;
  560. /* fw v12 cmdid 5:use max macid ,for nic ,
  561. * default macid is 0 ,max macid is 1 */
  562. rtl92d_fill_h2c_cmd(hw, H2C_RSSI_REPORT, 3, (u8 *) (&temp));
  563. } else {
  564. rtl_write_byte(rtlpriv, 0x4fe,
  565. (u8) rtlpriv->dm.undec_sm_pwdb);
  566. }
  567. }
  568. void rtl92d_dm_init_edca_turbo(struct ieee80211_hw *hw)
  569. {
  570. struct rtl_priv *rtlpriv = rtl_priv(hw);
  571. rtlpriv->dm.current_turbo_edca = false;
  572. rtlpriv->dm.is_any_nonbepkts = false;
  573. rtlpriv->dm.is_cur_rdlstate = false;
  574. }
  575. static void rtl92d_dm_check_edca_turbo(struct ieee80211_hw *hw)
  576. {
  577. struct rtl_priv *rtlpriv = rtl_priv(hw);
  578. struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
  579. static u64 last_txok_cnt;
  580. static u64 last_rxok_cnt;
  581. u64 cur_txok_cnt;
  582. u64 cur_rxok_cnt;
  583. u32 edca_be_ul = 0x5ea42b;
  584. u32 edca_be_dl = 0x5ea42b;
  585. if (mac->link_state != MAC80211_LINKED) {
  586. rtlpriv->dm.current_turbo_edca = false;
  587. goto exit;
  588. }
  589. /* Enable BEQ TxOP limit configuration in wireless G-mode. */
  590. /* To check whether we shall force turn on TXOP configuration. */
  591. if ((!rtlpriv->dm.disable_framebursting) &&
  592. (rtlpriv->sec.pairwise_enc_algorithm == WEP40_ENCRYPTION ||
  593. rtlpriv->sec.pairwise_enc_algorithm == WEP104_ENCRYPTION ||
  594. rtlpriv->sec.pairwise_enc_algorithm == TKIP_ENCRYPTION)) {
  595. /* Force TxOP limit to 0x005e for UL. */
  596. if (!(edca_be_ul & 0xffff0000))
  597. edca_be_ul |= 0x005e0000;
  598. /* Force TxOP limit to 0x005e for DL. */
  599. if (!(edca_be_dl & 0xffff0000))
  600. edca_be_dl |= 0x005e0000;
  601. }
  602. if ((!rtlpriv->dm.is_any_nonbepkts) &&
  603. (!rtlpriv->dm.disable_framebursting)) {
  604. cur_txok_cnt = rtlpriv->stats.txbytesunicast - last_txok_cnt;
  605. cur_rxok_cnt = rtlpriv->stats.rxbytesunicast - last_rxok_cnt;
  606. if (cur_rxok_cnt > 4 * cur_txok_cnt) {
  607. if (!rtlpriv->dm.is_cur_rdlstate ||
  608. !rtlpriv->dm.current_turbo_edca) {
  609. rtl_write_dword(rtlpriv, REG_EDCA_BE_PARAM,
  610. edca_be_dl);
  611. rtlpriv->dm.is_cur_rdlstate = true;
  612. }
  613. } else {
  614. if (rtlpriv->dm.is_cur_rdlstate ||
  615. !rtlpriv->dm.current_turbo_edca) {
  616. rtl_write_dword(rtlpriv, REG_EDCA_BE_PARAM,
  617. edca_be_ul);
  618. rtlpriv->dm.is_cur_rdlstate = false;
  619. }
  620. }
  621. rtlpriv->dm.current_turbo_edca = true;
  622. } else {
  623. if (rtlpriv->dm.current_turbo_edca) {
  624. u8 tmp = AC0_BE;
  625. rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_AC_PARAM,
  626. &tmp);
  627. rtlpriv->dm.current_turbo_edca = false;
  628. }
  629. }
  630. exit:
  631. rtlpriv->dm.is_any_nonbepkts = false;
  632. last_txok_cnt = rtlpriv->stats.txbytesunicast;
  633. last_rxok_cnt = rtlpriv->stats.rxbytesunicast;
  634. }
  635. static void rtl92d_dm_rxgain_tracking_thermalmeter(struct ieee80211_hw *hw)
  636. {
  637. struct rtl_priv *rtlpriv = rtl_priv(hw);
  638. u8 index_mapping[RX_INDEX_MAPPING_NUM] = {
  639. 0x0f, 0x0f, 0x0d, 0x0c, 0x0b,
  640. 0x0a, 0x09, 0x08, 0x07, 0x06,
  641. 0x05, 0x04, 0x04, 0x03, 0x02
  642. };
  643. int i;
  644. u32 u4tmp;
  645. u4tmp = (index_mapping[(rtlpriv->efuse.eeprom_thermalmeter -
  646. rtlpriv->dm.thermalvalue_rxgain)]) << 12;
  647. RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
  648. "===> Rx Gain %x\n", u4tmp);
  649. for (i = RF90_PATH_A; i < rtlpriv->phy.num_total_rfpath; i++)
  650. rtl_set_rfreg(hw, i, 0x3C, RFREG_OFFSET_MASK,
  651. (rtlpriv->phy.reg_rf3c[i] & (~(0xF000))) | u4tmp);
  652. }
  653. static void rtl92d_bandtype_2_4G(struct ieee80211_hw *hw, long *temp_cckg,
  654. u8 *cck_index_old)
  655. {
  656. struct rtl_priv *rtlpriv = rtl_priv(hw);
  657. int i;
  658. unsigned long flag = 0;
  659. long temp_cck;
  660. /* Query CCK default setting From 0xa24 */
  661. rtl92d_acquire_cckandrw_pagea_ctl(hw, &flag);
  662. temp_cck = rtl_get_bbreg(hw, RCCK0_TXFILTER2,
  663. MASKDWORD) & MASKCCK;
  664. rtl92d_release_cckandrw_pagea_ctl(hw, &flag);
  665. for (i = 0; i < CCK_TABLE_LENGTH; i++) {
  666. if (rtlpriv->dm.cck_inch14) {
  667. if (!memcmp((void *)&temp_cck,
  668. (void *)&cckswing_table_ch14[i][2], 4)) {
  669. *cck_index_old = (u8) i;
  670. RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
  671. "Initial reg0x%x = 0x%lx, cck_index=0x%x, ch 14 %d\n",
  672. RCCK0_TXFILTER2, temp_cck,
  673. *cck_index_old,
  674. rtlpriv->dm.cck_inch14);
  675. break;
  676. }
  677. } else {
  678. if (!memcmp((void *) &temp_cck,
  679. &cckswing_table_ch1ch13[i][2], 4)) {
  680. *cck_index_old = (u8) i;
  681. RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
  682. "Initial reg0x%x = 0x%lx, cck_index = 0x%x, ch14 %d\n",
  683. RCCK0_TXFILTER2, temp_cck,
  684. *cck_index_old,
  685. rtlpriv->dm.cck_inch14);
  686. break;
  687. }
  688. }
  689. }
  690. *temp_cckg = temp_cck;
  691. }
  692. static void rtl92d_bandtype_5G(struct rtl_hal *rtlhal, u8 *ofdm_index,
  693. bool *internal_pa, u8 thermalvalue, u8 delta,
  694. u8 rf, struct rtl_efuse *rtlefuse,
  695. struct rtl_priv *rtlpriv, struct rtl_phy *rtlphy,
  696. u8 index_mapping[5][INDEX_MAPPING_NUM],
  697. u8 index_mapping_pa[8][INDEX_MAPPING_NUM])
  698. {
  699. int i;
  700. u8 index;
  701. u8 offset = 0;
  702. for (i = 0; i < rf; i++) {
  703. if (rtlhal->macphymode == DUALMAC_DUALPHY &&
  704. rtlhal->interfaceindex == 1) /* MAC 1 5G */
  705. *internal_pa = rtlefuse->internal_pa_5g[1];
  706. else
  707. *internal_pa = rtlefuse->internal_pa_5g[i];
  708. if (*internal_pa) {
  709. if (rtlhal->interfaceindex == 1 || i == rf)
  710. offset = 4;
  711. else
  712. offset = 0;
  713. if (rtlphy->current_channel >= 100 &&
  714. rtlphy->current_channel <= 165)
  715. offset += 2;
  716. } else {
  717. if (rtlhal->interfaceindex == 1 || i == rf)
  718. offset = 2;
  719. else
  720. offset = 0;
  721. }
  722. if (thermalvalue > rtlefuse->eeprom_thermalmeter)
  723. offset++;
  724. if (*internal_pa) {
  725. if (delta > INDEX_MAPPING_NUM - 1)
  726. index = index_mapping_pa[offset]
  727. [INDEX_MAPPING_NUM - 1];
  728. else
  729. index =
  730. index_mapping_pa[offset][delta];
  731. } else {
  732. if (delta > INDEX_MAPPING_NUM - 1)
  733. index =
  734. index_mapping[offset][INDEX_MAPPING_NUM - 1];
  735. else
  736. index = index_mapping[offset][delta];
  737. }
  738. if (thermalvalue > rtlefuse->eeprom_thermalmeter) {
  739. if (*internal_pa && thermalvalue > 0x12) {
  740. ofdm_index[i] = rtlpriv->dm.ofdm_index[i] -
  741. ((delta / 2) * 3 + (delta % 2));
  742. } else {
  743. ofdm_index[i] -= index;
  744. }
  745. } else {
  746. ofdm_index[i] += index;
  747. }
  748. }
  749. }
  750. static void rtl92d_dm_txpower_tracking_callback_thermalmeter(
  751. struct ieee80211_hw *hw)
  752. {
  753. struct rtl_priv *rtlpriv = rtl_priv(hw);
  754. struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
  755. struct rtl_phy *rtlphy = &(rtlpriv->phy);
  756. struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
  757. u8 thermalvalue, delta, delta_lck, delta_iqk, delta_rxgain;
  758. u8 offset, thermalvalue_avg_count = 0;
  759. u32 thermalvalue_avg = 0;
  760. bool internal_pa = false;
  761. long ele_a = 0, ele_d, temp_cck, val_x, value32;
  762. long val_y, ele_c = 0;
  763. u8 ofdm_index[3];
  764. s8 cck_index = 0;
  765. u8 ofdm_index_old[3] = {0, 0, 0};
  766. s8 cck_index_old = 0;
  767. u8 index;
  768. int i;
  769. bool is2t = IS_92D_SINGLEPHY(rtlhal->version);
  770. u8 ofdm_min_index = 6, ofdm_min_index_internal_pa = 3, rf;
  771. u8 indexforchannel =
  772. rtl92d_get_rightchnlplace_for_iqk(rtlphy->current_channel);
  773. u8 index_mapping[5][INDEX_MAPPING_NUM] = {
  774. /* 5G, path A/MAC 0, decrease power */
  775. {0, 1, 3, 6, 8, 9, 11, 13, 14, 16, 17, 18, 18},
  776. /* 5G, path A/MAC 0, increase power */
  777. {0, 2, 4, 5, 7, 10, 12, 14, 16, 18, 18, 18, 18},
  778. /* 5G, path B/MAC 1, decrease power */
  779. {0, 2, 3, 6, 8, 9, 11, 13, 14, 16, 17, 18, 18},
  780. /* 5G, path B/MAC 1, increase power */
  781. {0, 2, 4, 5, 7, 10, 13, 16, 16, 18, 18, 18, 18},
  782. /* 2.4G, for decreas power */
  783. {0, 1, 2, 3, 4, 5, 6, 7, 7, 8, 9, 10, 10},
  784. };
  785. u8 index_mapping_internal_pa[8][INDEX_MAPPING_NUM] = {
  786. /* 5G, path A/MAC 0, ch36-64, decrease power */
  787. {0, 1, 2, 4, 6, 7, 9, 11, 12, 14, 15, 16, 16},
  788. /* 5G, path A/MAC 0, ch36-64, increase power */
  789. {0, 2, 4, 5, 7, 10, 12, 14, 16, 18, 18, 18, 18},
  790. /* 5G, path A/MAC 0, ch100-165, decrease power */
  791. {0, 1, 2, 3, 5, 6, 8, 10, 11, 13, 14, 15, 15},
  792. /* 5G, path A/MAC 0, ch100-165, increase power */
  793. {0, 2, 4, 5, 7, 10, 12, 14, 16, 18, 18, 18, 18},
  794. /* 5G, path B/MAC 1, ch36-64, decrease power */
  795. {0, 1, 2, 4, 6, 7, 9, 11, 12, 14, 15, 16, 16},
  796. /* 5G, path B/MAC 1, ch36-64, increase power */
  797. {0, 2, 4, 5, 7, 10, 13, 16, 16, 18, 18, 18, 18},
  798. /* 5G, path B/MAC 1, ch100-165, decrease power */
  799. {0, 1, 2, 3, 5, 6, 8, 9, 10, 12, 13, 14, 14},
  800. /* 5G, path B/MAC 1, ch100-165, increase power */
  801. {0, 2, 4, 5, 7, 10, 13, 16, 16, 18, 18, 18, 18},
  802. };
  803. rtlpriv->dm.txpower_trackinginit = true;
  804. RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD, "\n");
  805. thermalvalue = (u8) rtl_get_rfreg(hw, RF90_PATH_A, RF_T_METER, 0xf800);
  806. RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
  807. "Readback Thermal Meter = 0x%x pre thermal meter 0x%x eeprom_thermalmeter 0x%x\n",
  808. thermalvalue,
  809. rtlpriv->dm.thermalvalue, rtlefuse->eeprom_thermalmeter);
  810. rtl92d_phy_ap_calibrate(hw, (thermalvalue -
  811. rtlefuse->eeprom_thermalmeter));
  812. if (is2t)
  813. rf = 2;
  814. else
  815. rf = 1;
  816. if (thermalvalue) {
  817. ele_d = rtl_get_bbreg(hw, ROFDM0_XATxIQIMBALANCE,
  818. MASKDWORD) & MASKOFDM_D;
  819. for (i = 0; i < OFDM_TABLE_SIZE_92D; i++) {
  820. if (ele_d == (ofdmswing_table[i] & MASKOFDM_D)) {
  821. ofdm_index_old[0] = (u8) i;
  822. RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
  823. "Initial pathA ele_d reg0x%x = 0x%lx, ofdm_index=0x%x\n",
  824. ROFDM0_XATxIQIMBALANCE,
  825. ele_d, ofdm_index_old[0]);
  826. break;
  827. }
  828. }
  829. if (is2t) {
  830. ele_d = rtl_get_bbreg(hw, ROFDM0_XBTxIQIMBALANCE,
  831. MASKDWORD) & MASKOFDM_D;
  832. for (i = 0; i < OFDM_TABLE_SIZE_92D; i++) {
  833. if (ele_d ==
  834. (ofdmswing_table[i] & MASKOFDM_D)) {
  835. ofdm_index_old[1] = (u8) i;
  836. RT_TRACE(rtlpriv, COMP_POWER_TRACKING,
  837. DBG_LOUD,
  838. "Initial pathB ele_d reg 0x%x = 0x%lx, ofdm_index = 0x%x\n",
  839. ROFDM0_XBTxIQIMBALANCE, ele_d,
  840. ofdm_index_old[1]);
  841. break;
  842. }
  843. }
  844. }
  845. if (rtlhal->current_bandtype == BAND_ON_2_4G) {
  846. rtl92d_bandtype_2_4G(hw, &temp_cck, &cck_index_old);
  847. } else {
  848. temp_cck = 0x090e1317;
  849. cck_index_old = 12;
  850. }
  851. if (!rtlpriv->dm.thermalvalue) {
  852. rtlpriv->dm.thermalvalue =
  853. rtlefuse->eeprom_thermalmeter;
  854. rtlpriv->dm.thermalvalue_lck = thermalvalue;
  855. rtlpriv->dm.thermalvalue_iqk = thermalvalue;
  856. rtlpriv->dm.thermalvalue_rxgain =
  857. rtlefuse->eeprom_thermalmeter;
  858. for (i = 0; i < rf; i++)
  859. rtlpriv->dm.ofdm_index[i] = ofdm_index_old[i];
  860. rtlpriv->dm.cck_index = cck_index_old;
  861. }
  862. if (rtlhal->reloadtxpowerindex) {
  863. for (i = 0; i < rf; i++)
  864. rtlpriv->dm.ofdm_index[i] = ofdm_index_old[i];
  865. rtlpriv->dm.cck_index = cck_index_old;
  866. RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
  867. "reload ofdm index for band switch\n");
  868. }
  869. rtlpriv->dm.thermalvalue_avg
  870. [rtlpriv->dm.thermalvalue_avg_index] = thermalvalue;
  871. rtlpriv->dm.thermalvalue_avg_index++;
  872. if (rtlpriv->dm.thermalvalue_avg_index == AVG_THERMAL_NUM)
  873. rtlpriv->dm.thermalvalue_avg_index = 0;
  874. for (i = 0; i < AVG_THERMAL_NUM; i++) {
  875. if (rtlpriv->dm.thermalvalue_avg[i]) {
  876. thermalvalue_avg +=
  877. rtlpriv->dm.thermalvalue_avg[i];
  878. thermalvalue_avg_count++;
  879. }
  880. }
  881. if (thermalvalue_avg_count)
  882. thermalvalue = (u8) (thermalvalue_avg /
  883. thermalvalue_avg_count);
  884. if (rtlhal->reloadtxpowerindex) {
  885. delta = (thermalvalue > rtlefuse->eeprom_thermalmeter) ?
  886. (thermalvalue - rtlefuse->eeprom_thermalmeter) :
  887. (rtlefuse->eeprom_thermalmeter - thermalvalue);
  888. rtlhal->reloadtxpowerindex = false;
  889. rtlpriv->dm.done_txpower = false;
  890. } else if (rtlpriv->dm.done_txpower) {
  891. delta = (thermalvalue > rtlpriv->dm.thermalvalue) ?
  892. (thermalvalue - rtlpriv->dm.thermalvalue) :
  893. (rtlpriv->dm.thermalvalue - thermalvalue);
  894. } else {
  895. delta = (thermalvalue > rtlefuse->eeprom_thermalmeter) ?
  896. (thermalvalue - rtlefuse->eeprom_thermalmeter) :
  897. (rtlefuse->eeprom_thermalmeter - thermalvalue);
  898. }
  899. delta_lck = (thermalvalue > rtlpriv->dm.thermalvalue_lck) ?
  900. (thermalvalue - rtlpriv->dm.thermalvalue_lck) :
  901. (rtlpriv->dm.thermalvalue_lck - thermalvalue);
  902. delta_iqk = (thermalvalue > rtlpriv->dm.thermalvalue_iqk) ?
  903. (thermalvalue - rtlpriv->dm.thermalvalue_iqk) :
  904. (rtlpriv->dm.thermalvalue_iqk - thermalvalue);
  905. delta_rxgain =
  906. (thermalvalue > rtlpriv->dm.thermalvalue_rxgain) ?
  907. (thermalvalue - rtlpriv->dm.thermalvalue_rxgain) :
  908. (rtlpriv->dm.thermalvalue_rxgain - thermalvalue);
  909. RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
  910. "Readback Thermal Meter = 0x%x pre thermal meter 0x%x eeprom_thermalmeter 0x%x delta 0x%x delta_lck 0x%x delta_iqk 0x%x\n",
  911. thermalvalue, rtlpriv->dm.thermalvalue,
  912. rtlefuse->eeprom_thermalmeter, delta, delta_lck,
  913. delta_iqk);
  914. if ((delta_lck > rtlefuse->delta_lck) &&
  915. (rtlefuse->delta_lck != 0)) {
  916. rtlpriv->dm.thermalvalue_lck = thermalvalue;
  917. rtl92d_phy_lc_calibrate(hw);
  918. }
  919. if (delta > 0 && rtlpriv->dm.txpower_track_control) {
  920. rtlpriv->dm.done_txpower = true;
  921. delta = (thermalvalue > rtlefuse->eeprom_thermalmeter) ?
  922. (thermalvalue - rtlefuse->eeprom_thermalmeter) :
  923. (rtlefuse->eeprom_thermalmeter - thermalvalue);
  924. if (rtlhal->current_bandtype == BAND_ON_2_4G) {
  925. offset = 4;
  926. if (delta > INDEX_MAPPING_NUM - 1)
  927. index = index_mapping[offset]
  928. [INDEX_MAPPING_NUM - 1];
  929. else
  930. index = index_mapping[offset][delta];
  931. if (thermalvalue > rtlpriv->dm.thermalvalue) {
  932. for (i = 0; i < rf; i++)
  933. ofdm_index[i] -= delta;
  934. cck_index -= delta;
  935. } else {
  936. for (i = 0; i < rf; i++)
  937. ofdm_index[i] += index;
  938. cck_index += index;
  939. }
  940. } else if (rtlhal->current_bandtype == BAND_ON_5G) {
  941. rtl92d_bandtype_5G(rtlhal, ofdm_index,
  942. &internal_pa, thermalvalue,
  943. delta, rf, rtlefuse, rtlpriv,
  944. rtlphy, index_mapping,
  945. index_mapping_internal_pa);
  946. }
  947. if (is2t) {
  948. RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
  949. "temp OFDM_A_index=0x%x, OFDM_B_index = 0x%x,cck_index=0x%x\n",
  950. rtlpriv->dm.ofdm_index[0],
  951. rtlpriv->dm.ofdm_index[1],
  952. rtlpriv->dm.cck_index);
  953. } else {
  954. RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
  955. "temp OFDM_A_index=0x%x,cck_index = 0x%x\n",
  956. rtlpriv->dm.ofdm_index[0],
  957. rtlpriv->dm.cck_index);
  958. }
  959. for (i = 0; i < rf; i++) {
  960. if (ofdm_index[i] > OFDM_TABLE_SIZE_92D - 1)
  961. ofdm_index[i] = OFDM_TABLE_SIZE_92D - 1;
  962. else if (ofdm_index[i] < ofdm_min_index)
  963. ofdm_index[i] = ofdm_min_index;
  964. }
  965. if (rtlhal->current_bandtype == BAND_ON_2_4G) {
  966. if (cck_index > CCK_TABLE_SIZE - 1) {
  967. cck_index = CCK_TABLE_SIZE - 1;
  968. } else if (internal_pa ||
  969. rtlhal->current_bandtype ==
  970. BAND_ON_2_4G) {
  971. if (ofdm_index[i] <
  972. ofdm_min_index_internal_pa)
  973. ofdm_index[i] =
  974. ofdm_min_index_internal_pa;
  975. } else if (cck_index < 0) {
  976. cck_index = 0;
  977. }
  978. }
  979. if (is2t) {
  980. RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
  981. "new OFDM_A_index=0x%x, OFDM_B_index = 0x%x, cck_index=0x%x\n",
  982. ofdm_index[0], ofdm_index[1],
  983. cck_index);
  984. } else {
  985. RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
  986. "new OFDM_A_index=0x%x,cck_index = 0x%x\n",
  987. ofdm_index[0], cck_index);
  988. }
  989. ele_d = (ofdmswing_table[(u8) ofdm_index[0]] &
  990. 0xFFC00000) >> 22;
  991. val_x = rtlphy->iqk_matrix
  992. [indexforchannel].value[0][0];
  993. val_y = rtlphy->iqk_matrix
  994. [indexforchannel].value[0][1];
  995. if (val_x != 0) {
  996. if ((val_x & 0x00000200) != 0)
  997. val_x = val_x | 0xFFFFFC00;
  998. ele_a =
  999. ((val_x * ele_d) >> 8) & 0x000003FF;
  1000. /* new element C = element D x Y */
  1001. if ((val_y & 0x00000200) != 0)
  1002. val_y = val_y | 0xFFFFFC00;
  1003. ele_c = ((val_y * ele_d) >> 8) & 0x000003FF;
  1004. /* wirte new elements A, C, D to regC80 and
  1005. * regC94, element B is always 0 */
  1006. value32 = (ele_d << 22) | ((ele_c & 0x3F) <<
  1007. 16) | ele_a;
  1008. rtl_set_bbreg(hw, ROFDM0_XATxIQIMBALANCE,
  1009. MASKDWORD, value32);
  1010. value32 = (ele_c & 0x000003C0) >> 6;
  1011. rtl_set_bbreg(hw, ROFDM0_XCTxAFE, MASKH4BITS,
  1012. value32);
  1013. value32 = ((val_x * ele_d) >> 7) & 0x01;
  1014. rtl_set_bbreg(hw, ROFDM0_ECCATHRESHOLD, BIT(24),
  1015. value32);
  1016. } else {
  1017. rtl_set_bbreg(hw, ROFDM0_XATxIQIMBALANCE,
  1018. MASKDWORD,
  1019. ofdmswing_table
  1020. [(u8)ofdm_index[0]]);
  1021. rtl_set_bbreg(hw, ROFDM0_XCTxAFE, MASKH4BITS,
  1022. 0x00);
  1023. rtl_set_bbreg(hw, ROFDM0_ECCATHRESHOLD,
  1024. BIT(24), 0x00);
  1025. }
  1026. RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
  1027. "TxPwrTracking for interface %d path A: X = 0x%lx, Y = 0x%lx ele_A = 0x%lx ele_C = 0x%lx ele_D = 0x%lx 0xe94 = 0x%lx 0xe9c = 0x%lx\n",
  1028. rtlhal->interfaceindex,
  1029. val_x, val_y, ele_a, ele_c, ele_d,
  1030. val_x, val_y);
  1031. if (cck_index >= CCK_TABLE_SIZE)
  1032. cck_index = CCK_TABLE_SIZE - 1;
  1033. if (cck_index < 0)
  1034. cck_index = 0;
  1035. if (rtlhal->current_bandtype == BAND_ON_2_4G) {
  1036. /* Adjust CCK according to IQK result */
  1037. if (!rtlpriv->dm.cck_inch14) {
  1038. rtl_write_byte(rtlpriv, 0xa22,
  1039. cckswing_table_ch1ch13
  1040. [(u8)cck_index][0]);
  1041. rtl_write_byte(rtlpriv, 0xa23,
  1042. cckswing_table_ch1ch13
  1043. [(u8)cck_index][1]);
  1044. rtl_write_byte(rtlpriv, 0xa24,
  1045. cckswing_table_ch1ch13
  1046. [(u8)cck_index][2]);
  1047. rtl_write_byte(rtlpriv, 0xa25,
  1048. cckswing_table_ch1ch13
  1049. [(u8)cck_index][3]);
  1050. rtl_write_byte(rtlpriv, 0xa26,
  1051. cckswing_table_ch1ch13
  1052. [(u8)cck_index][4]);
  1053. rtl_write_byte(rtlpriv, 0xa27,
  1054. cckswing_table_ch1ch13
  1055. [(u8)cck_index][5]);
  1056. rtl_write_byte(rtlpriv, 0xa28,
  1057. cckswing_table_ch1ch13
  1058. [(u8)cck_index][6]);
  1059. rtl_write_byte(rtlpriv, 0xa29,
  1060. cckswing_table_ch1ch13
  1061. [(u8)cck_index][7]);
  1062. } else {
  1063. rtl_write_byte(rtlpriv, 0xa22,
  1064. cckswing_table_ch14
  1065. [(u8)cck_index][0]);
  1066. rtl_write_byte(rtlpriv, 0xa23,
  1067. cckswing_table_ch14
  1068. [(u8)cck_index][1]);
  1069. rtl_write_byte(rtlpriv, 0xa24,
  1070. cckswing_table_ch14
  1071. [(u8)cck_index][2]);
  1072. rtl_write_byte(rtlpriv, 0xa25,
  1073. cckswing_table_ch14
  1074. [(u8)cck_index][3]);
  1075. rtl_write_byte(rtlpriv, 0xa26,
  1076. cckswing_table_ch14
  1077. [(u8)cck_index][4]);
  1078. rtl_write_byte(rtlpriv, 0xa27,
  1079. cckswing_table_ch14
  1080. [(u8)cck_index][5]);
  1081. rtl_write_byte(rtlpriv, 0xa28,
  1082. cckswing_table_ch14
  1083. [(u8)cck_index][6]);
  1084. rtl_write_byte(rtlpriv, 0xa29,
  1085. cckswing_table_ch14
  1086. [(u8)cck_index][7]);
  1087. }
  1088. }
  1089. if (is2t) {
  1090. ele_d = (ofdmswing_table[(u8) ofdm_index[1]] &
  1091. 0xFFC00000) >> 22;
  1092. val_x = rtlphy->iqk_matrix
  1093. [indexforchannel].value[0][4];
  1094. val_y = rtlphy->iqk_matrix
  1095. [indexforchannel].value[0][5];
  1096. if (val_x != 0) {
  1097. if ((val_x & 0x00000200) != 0)
  1098. /* consider minus */
  1099. val_x = val_x | 0xFFFFFC00;
  1100. ele_a = ((val_x * ele_d) >> 8) &
  1101. 0x000003FF;
  1102. /* new element C = element D x Y */
  1103. if ((val_y & 0x00000200) != 0)
  1104. val_y =
  1105. val_y | 0xFFFFFC00;
  1106. ele_c =
  1107. ((val_y *
  1108. ele_d) >> 8) & 0x00003FF;
  1109. /* write new elements A, C, D to regC88
  1110. * and regC9C, element B is always 0
  1111. */
  1112. value32 = (ele_d << 22) |
  1113. ((ele_c & 0x3F) << 16) |
  1114. ele_a;
  1115. rtl_set_bbreg(hw,
  1116. ROFDM0_XBTxIQIMBALANCE,
  1117. MASKDWORD, value32);
  1118. value32 = (ele_c & 0x000003C0) >> 6;
  1119. rtl_set_bbreg(hw, ROFDM0_XDTxAFE,
  1120. MASKH4BITS, value32);
  1121. value32 = ((val_x * ele_d) >> 7) & 0x01;
  1122. rtl_set_bbreg(hw, ROFDM0_ECCATHRESHOLD,
  1123. BIT(28), value32);
  1124. } else {
  1125. rtl_set_bbreg(hw,
  1126. ROFDM0_XBTxIQIMBALANCE,
  1127. MASKDWORD,
  1128. ofdmswing_table
  1129. [(u8) ofdm_index[1]]);
  1130. rtl_set_bbreg(hw, ROFDM0_XDTxAFE,
  1131. MASKH4BITS, 0x00);
  1132. rtl_set_bbreg(hw, ROFDM0_ECCATHRESHOLD,
  1133. BIT(28), 0x00);
  1134. }
  1135. RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
  1136. "TxPwrTracking path B: X = 0x%lx, Y = 0x%lx ele_A = 0x%lx ele_C = 0x%lx ele_D = 0x%lx 0xeb4 = 0x%lx 0xebc = 0x%lx\n",
  1137. val_x, val_y, ele_a, ele_c,
  1138. ele_d, val_x, val_y);
  1139. }
  1140. RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
  1141. "TxPwrTracking 0xc80 = 0x%x, 0xc94 = 0x%x RF 0x24 = 0x%x\n",
  1142. rtl_get_bbreg(hw, 0xc80, MASKDWORD),
  1143. rtl_get_bbreg(hw, 0xc94, MASKDWORD),
  1144. rtl_get_rfreg(hw, RF90_PATH_A, 0x24,
  1145. RFREG_OFFSET_MASK));
  1146. }
  1147. if ((delta_iqk > rtlefuse->delta_iqk) &&
  1148. (rtlefuse->delta_iqk != 0)) {
  1149. rtl92d_phy_reset_iqk_result(hw);
  1150. rtlpriv->dm.thermalvalue_iqk = thermalvalue;
  1151. rtl92d_phy_iq_calibrate(hw);
  1152. }
  1153. if (delta_rxgain > 0 && rtlhal->current_bandtype == BAND_ON_5G
  1154. && thermalvalue <= rtlefuse->eeprom_thermalmeter) {
  1155. rtlpriv->dm.thermalvalue_rxgain = thermalvalue;
  1156. rtl92d_dm_rxgain_tracking_thermalmeter(hw);
  1157. }
  1158. if (rtlpriv->dm.txpower_track_control)
  1159. rtlpriv->dm.thermalvalue = thermalvalue;
  1160. }
  1161. RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD, "<===\n");
  1162. }
  1163. static void rtl92d_dm_initialize_txpower_tracking(struct ieee80211_hw *hw)
  1164. {
  1165. struct rtl_priv *rtlpriv = rtl_priv(hw);
  1166. rtlpriv->dm.txpower_tracking = true;
  1167. rtlpriv->dm.txpower_trackinginit = false;
  1168. rtlpriv->dm.txpower_track_control = true;
  1169. RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
  1170. "pMgntInfo->txpower_tracking = %d\n",
  1171. rtlpriv->dm.txpower_tracking);
  1172. }
  1173. void rtl92d_dm_check_txpower_tracking_thermal_meter(struct ieee80211_hw *hw)
  1174. {
  1175. struct rtl_priv *rtlpriv = rtl_priv(hw);
  1176. if (!rtlpriv->dm.txpower_tracking)
  1177. return;
  1178. if (!rtlpriv->dm.tm_trigger) {
  1179. rtl_set_rfreg(hw, RF90_PATH_A, RF_T_METER, BIT(17) |
  1180. BIT(16), 0x03);
  1181. RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
  1182. "Trigger 92S Thermal Meter!!\n");
  1183. rtlpriv->dm.tm_trigger = 1;
  1184. return;
  1185. } else {
  1186. RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
  1187. "Schedule TxPowerTracking direct call!!\n");
  1188. rtl92d_dm_txpower_tracking_callback_thermalmeter(hw);
  1189. rtlpriv->dm.tm_trigger = 0;
  1190. }
  1191. }
  1192. void rtl92d_dm_init_rate_adaptive_mask(struct ieee80211_hw *hw)
  1193. {
  1194. struct rtl_priv *rtlpriv = rtl_priv(hw);
  1195. struct rate_adaptive *ra = &(rtlpriv->ra);
  1196. ra->ratr_state = DM_RATR_STA_INIT;
  1197. ra->pre_ratr_state = DM_RATR_STA_INIT;
  1198. if (rtlpriv->dm.dm_type == DM_TYPE_BYDRIVER)
  1199. rtlpriv->dm.useramask = true;
  1200. else
  1201. rtlpriv->dm.useramask = false;
  1202. }
  1203. void rtl92d_dm_init(struct ieee80211_hw *hw)
  1204. {
  1205. struct rtl_priv *rtlpriv = rtl_priv(hw);
  1206. rtlpriv->dm.dm_type = DM_TYPE_BYDRIVER;
  1207. rtl_dm_diginit(hw, 0x20);
  1208. rtlpriv->dm_digtable.rx_gain_max = DM_DIG_FA_UPPER;
  1209. rtlpriv->dm_digtable.rx_gain_min = DM_DIG_FA_LOWER;
  1210. rtl92d_dm_init_dynamic_txpower(hw);
  1211. rtl92d_dm_init_edca_turbo(hw);
  1212. rtl92d_dm_init_rate_adaptive_mask(hw);
  1213. rtl92d_dm_initialize_txpower_tracking(hw);
  1214. }
  1215. void rtl92d_dm_watchdog(struct ieee80211_hw *hw)
  1216. {
  1217. struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
  1218. bool fw_current_inpsmode = false;
  1219. bool fwps_awake = true;
  1220. /* 1. RF is OFF. (No need to do DM.)
  1221. * 2. Fw is under power saving mode for FwLPS.
  1222. * (Prevent from SW/FW I/O racing.)
  1223. * 3. IPS workitem is scheduled. (Prevent from IPS sequence
  1224. * to be swapped with DM.
  1225. * 4. RFChangeInProgress is TRUE.
  1226. * (Prevent from broken by IPS/HW/SW Rf off.) */
  1227. if ((ppsc->rfpwr_state == ERFON) && ((!fw_current_inpsmode) &&
  1228. fwps_awake) && (!ppsc->rfchange_inprogress)) {
  1229. rtl92d_dm_pwdb_monitor(hw);
  1230. rtl92d_dm_false_alarm_counter_statistics(hw);
  1231. rtl92d_dm_find_minimum_rssi(hw);
  1232. rtl92d_dm_dig(hw);
  1233. /* rtl92d_dm_dynamic_bb_powersaving(hw); */
  1234. rtl92d_dm_dynamic_txpower(hw);
  1235. /* rtl92d_dm_check_txpower_tracking_thermal_meter(hw); */
  1236. /* rtl92d_dm_refresh_rate_adaptive_mask(hw); */
  1237. /* rtl92d_dm_interrupt_migration(hw); */
  1238. rtl92d_dm_check_edca_turbo(hw);
  1239. }
  1240. }