trx.c 24 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2009-2013 Realtek Corporation.
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of version 2 of the GNU General Public License as
  7. * published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. *
  14. * The full GNU General Public License is included in this distribution in the
  15. * file called LICENSE.
  16. *
  17. * Contact Information:
  18. * wlanfae <wlanfae@realtek.com>
  19. * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
  20. * Hsinchu 300, Taiwan.
  21. *
  22. * Larry Finger <Larry.Finger@lwfinger.net>
  23. *
  24. *****************************************************************************/
  25. #include "../wifi.h"
  26. #include "../pci.h"
  27. #include "../base.h"
  28. #include "../stats.h"
  29. #include "reg.h"
  30. #include "def.h"
  31. #include "phy.h"
  32. #include "trx.h"
  33. #include "led.h"
  34. #include "dm.h"
  35. #include "phy.h"
  36. static u8 _rtl88ee_map_hwqueue_to_fwqueue(struct sk_buff *skb, u8 hw_queue)
  37. {
  38. __le16 fc = rtl_get_fc(skb);
  39. if (unlikely(ieee80211_is_beacon(fc)))
  40. return QSLT_BEACON;
  41. if (ieee80211_is_mgmt(fc) || ieee80211_is_ctl(fc))
  42. return QSLT_MGNT;
  43. return skb->priority;
  44. }
  45. static void _rtl88ee_query_rxphystatus(struct ieee80211_hw *hw,
  46. struct rtl_stats *pstatus, u8 *pdesc,
  47. struct rx_fwinfo_88e *p_drvinfo,
  48. bool bpacket_match_bssid,
  49. bool bpacket_toself, bool packet_beacon)
  50. {
  51. struct rtl_priv *rtlpriv = rtl_priv(hw);
  52. struct rtl_ps_ctl *ppsc = rtl_psc(rtlpriv);
  53. struct phy_sts_cck_8192s_t *cck_buf;
  54. struct phy_status_rpt *phystrpt =
  55. (struct phy_status_rpt *)p_drvinfo;
  56. struct rtl_dm *rtldm = rtl_dm(rtl_priv(hw));
  57. char rx_pwr_all = 0, rx_pwr[4];
  58. u8 rf_rx_num = 0, evm, pwdb_all;
  59. u8 i, max_spatial_stream;
  60. u32 rssi, total_rssi = 0;
  61. bool is_cck = pstatus->is_cck;
  62. u8 lan_idx, vga_idx;
  63. /* Record it for next packet processing */
  64. pstatus->packet_matchbssid = bpacket_match_bssid;
  65. pstatus->packet_toself = bpacket_toself;
  66. pstatus->packet_beacon = packet_beacon;
  67. pstatus->rx_mimo_signalquality[0] = -1;
  68. pstatus->rx_mimo_signalquality[1] = -1;
  69. if (is_cck) {
  70. u8 cck_highpwr;
  71. u8 cck_agc_rpt;
  72. /* CCK Driver info Structure is not the same as OFDM packet. */
  73. cck_buf = (struct phy_sts_cck_8192s_t *)p_drvinfo;
  74. cck_agc_rpt = cck_buf->cck_agc_rpt;
  75. /* (1)Hardware does not provide RSSI for CCK
  76. * (2)PWDB, Average PWDB cacluated by
  77. * hardware (for rate adaptive)
  78. */
  79. if (ppsc->rfpwr_state == ERFON)
  80. cck_highpwr =
  81. (u8)rtl_get_bbreg(hw, RFPGA0_XA_HSSIPARAMETER2,
  82. BIT(9));
  83. else
  84. cck_highpwr = false;
  85. lan_idx = ((cck_agc_rpt & 0xE0) >> 5);
  86. vga_idx = (cck_agc_rpt & 0x1f);
  87. switch (lan_idx) {
  88. case 7:
  89. if (vga_idx <= 27)
  90. /*VGA_idx = 27~2*/
  91. rx_pwr_all = -100 + 2*(27-vga_idx);
  92. else
  93. rx_pwr_all = -100;
  94. break;
  95. case 6:
  96. /*VGA_idx = 2~0*/
  97. rx_pwr_all = -48 + 2*(2-vga_idx);
  98. break;
  99. case 5:
  100. /*VGA_idx = 7~5*/
  101. rx_pwr_all = -42 + 2*(7-vga_idx);
  102. break;
  103. case 4:
  104. /*VGA_idx = 7~4*/
  105. rx_pwr_all = -36 + 2*(7-vga_idx);
  106. break;
  107. case 3:
  108. /*VGA_idx = 7~0*/
  109. rx_pwr_all = -24 + 2*(7-vga_idx);
  110. break;
  111. case 2:
  112. if (cck_highpwr)
  113. /*VGA_idx = 5~0*/
  114. rx_pwr_all = -12 + 2*(5-vga_idx);
  115. else
  116. rx_pwr_all = -6 + 2*(5-vga_idx);
  117. break;
  118. case 1:
  119. rx_pwr_all = 8-2*vga_idx;
  120. break;
  121. case 0:
  122. rx_pwr_all = 14-2*vga_idx;
  123. break;
  124. default:
  125. break;
  126. }
  127. rx_pwr_all += 6;
  128. pwdb_all = rtl_query_rxpwrpercentage(rx_pwr_all);
  129. /* CCK gain is smaller than OFDM/MCS gain, */
  130. /* so we add gain diff by experiences, the val is 6 */
  131. pwdb_all += 6;
  132. if (pwdb_all > 100)
  133. pwdb_all = 100;
  134. /* modify the offset to make the same
  135. * gain index with OFDM.
  136. */
  137. if (pwdb_all > 34 && pwdb_all <= 42)
  138. pwdb_all -= 2;
  139. else if (pwdb_all > 26 && pwdb_all <= 34)
  140. pwdb_all -= 6;
  141. else if (pwdb_all > 14 && pwdb_all <= 26)
  142. pwdb_all -= 8;
  143. else if (pwdb_all > 4 && pwdb_all <= 14)
  144. pwdb_all -= 4;
  145. if (!cck_highpwr) {
  146. if (pwdb_all >= 80)
  147. pwdb_all = ((pwdb_all-80)<<1) +
  148. ((pwdb_all-80)>>1) + 80;
  149. else if ((pwdb_all <= 78) && (pwdb_all >= 20))
  150. pwdb_all += 3;
  151. if (pwdb_all > 100)
  152. pwdb_all = 100;
  153. }
  154. pstatus->rx_pwdb_all = pwdb_all;
  155. pstatus->recvsignalpower = rx_pwr_all;
  156. /* (3) Get Signal Quality (EVM) */
  157. if (bpacket_match_bssid) {
  158. u8 sq;
  159. if (pstatus->rx_pwdb_all > 40)
  160. sq = 100;
  161. else {
  162. sq = cck_buf->sq_rpt;
  163. if (sq > 64)
  164. sq = 0;
  165. else if (sq < 20)
  166. sq = 100;
  167. else
  168. sq = ((64 - sq) * 100) / 44;
  169. }
  170. pstatus->signalquality = sq;
  171. pstatus->rx_mimo_signalquality[0] = sq;
  172. pstatus->rx_mimo_signalquality[1] = -1;
  173. }
  174. } else {
  175. rtlpriv->dm.rfpath_rxenable[0] =
  176. rtlpriv->dm.rfpath_rxenable[1] = true;
  177. /* (1)Get RSSI for HT rate */
  178. for (i = RF90_PATH_A; i < RF6052_MAX_PATH; i++) {
  179. /* we will judge RF RX path now. */
  180. if (rtlpriv->dm.rfpath_rxenable[i])
  181. rf_rx_num++;
  182. rx_pwr[i] = ((p_drvinfo->gain_trsw[i] &
  183. 0x3f) * 2) - 110;
  184. /* Translate DBM to percentage. */
  185. rssi = rtl_query_rxpwrpercentage(rx_pwr[i]);
  186. total_rssi += rssi;
  187. /* Get Rx snr value in DB */
  188. rtlpriv->stats.rx_snr_db[i] =
  189. (long)(p_drvinfo->rxsnr[i] / 2);
  190. /* Record Signal Strength for next packet */
  191. if (bpacket_match_bssid)
  192. pstatus->rx_mimo_signalstrength[i] = (u8)rssi;
  193. }
  194. /* (2)PWDB, Average PWDB cacluated by
  195. * hardware (for rate adaptive)
  196. */
  197. rx_pwr_all = ((p_drvinfo->pwdb_all >> 1) & 0x7f) - 110;
  198. pwdb_all = rtl_query_rxpwrpercentage(rx_pwr_all);
  199. pstatus->rx_pwdb_all = pwdb_all;
  200. pstatus->rxpower = rx_pwr_all;
  201. pstatus->recvsignalpower = rx_pwr_all;
  202. /* (3)EVM of HT rate */
  203. if (pstatus->is_ht && pstatus->rate >= DESC92C_RATEMCS8 &&
  204. pstatus->rate <= DESC92C_RATEMCS15)
  205. max_spatial_stream = 2;
  206. else
  207. max_spatial_stream = 1;
  208. for (i = 0; i < max_spatial_stream; i++) {
  209. evm = rtl_evm_db_to_percentage(p_drvinfo->rxevm[i]);
  210. if (bpacket_match_bssid) {
  211. /* Fill value in RFD, Get the first
  212. * spatial stream onlyi
  213. */
  214. if (i == 0)
  215. pstatus->signalquality =
  216. (u8)(evm & 0xff);
  217. pstatus->rx_mimo_signalquality[i] =
  218. (u8)(evm & 0xff);
  219. }
  220. }
  221. }
  222. /* UI BSS List signal strength(in percentage),
  223. * make it good looking, from 0~100.
  224. */
  225. if (is_cck)
  226. pstatus->signalstrength = (u8)(rtl_signal_scale_mapping(hw,
  227. pwdb_all));
  228. else if (rf_rx_num != 0)
  229. pstatus->signalstrength = (u8)(rtl_signal_scale_mapping(hw,
  230. total_rssi /= rf_rx_num));
  231. /*HW antenna diversity*/
  232. rtldm->fat_table.antsel_rx_keep_0 = phystrpt->ant_sel;
  233. rtldm->fat_table.antsel_rx_keep_1 = phystrpt->ant_sel_b;
  234. rtldm->fat_table.antsel_rx_keep_2 = phystrpt->antsel_rx_keep_2;
  235. }
  236. static void _rtl88ee_smart_antenna(struct ieee80211_hw *hw,
  237. struct rtl_stats *pstatus)
  238. {
  239. struct rtl_dm *rtldm = rtl_dm(rtl_priv(hw));
  240. struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
  241. u8 antsel_tr_mux;
  242. struct fast_ant_training *pfat_table = &rtldm->fat_table;
  243. if (rtlefuse->antenna_div_type == CG_TRX_SMART_ANTDIV) {
  244. if (pfat_table->fat_state == FAT_TRAINING_STATE) {
  245. if (pstatus->packet_toself) {
  246. antsel_tr_mux =
  247. (pfat_table->antsel_rx_keep_2 << 2) |
  248. (pfat_table->antsel_rx_keep_1 << 1) |
  249. pfat_table->antsel_rx_keep_0;
  250. pfat_table->ant_sum[antsel_tr_mux] +=
  251. pstatus->rx_pwdb_all;
  252. pfat_table->ant_cnt[antsel_tr_mux]++;
  253. }
  254. }
  255. } else if ((rtlefuse->antenna_div_type == CG_TRX_HW_ANTDIV) ||
  256. (rtlefuse->antenna_div_type == CGCS_RX_HW_ANTDIV)) {
  257. if (pstatus->packet_toself || pstatus->packet_matchbssid) {
  258. antsel_tr_mux = (pfat_table->antsel_rx_keep_2 << 2) |
  259. (pfat_table->antsel_rx_keep_1 << 1) |
  260. pfat_table->antsel_rx_keep_0;
  261. rtl88e_dm_ant_sel_statistics(hw, antsel_tr_mux, 0,
  262. pstatus->rx_pwdb_all);
  263. }
  264. }
  265. }
  266. static void _rtl88ee_translate_rx_signal_stuff(struct ieee80211_hw *hw,
  267. struct sk_buff *skb,
  268. struct rtl_stats *pstatus,
  269. u8 *pdesc,
  270. struct rx_fwinfo_88e *p_drvinfo)
  271. {
  272. struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
  273. struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
  274. struct ieee80211_hdr *hdr;
  275. u8 *tmp_buf;
  276. u8 *praddr;
  277. u8 *psaddr;
  278. __le16 fc;
  279. bool packet_matchbssid, packet_toself, packet_beacon;
  280. tmp_buf = skb->data + pstatus->rx_drvinfo_size + pstatus->rx_bufshift;
  281. hdr = (struct ieee80211_hdr *)tmp_buf;
  282. fc = hdr->frame_control;
  283. praddr = hdr->addr1;
  284. psaddr = ieee80211_get_SA(hdr);
  285. memcpy(pstatus->psaddr, psaddr, ETH_ALEN);
  286. packet_matchbssid = ((!ieee80211_is_ctl(fc)) &&
  287. (ether_addr_equal(mac->bssid, ieee80211_has_tods(fc) ?
  288. hdr->addr1 : ieee80211_has_fromds(fc) ?
  289. hdr->addr2 : hdr->addr3)) &&
  290. (!pstatus->hwerror) &&
  291. (!pstatus->crc) && (!pstatus->icv));
  292. packet_toself = packet_matchbssid &&
  293. (ether_addr_equal(praddr, rtlefuse->dev_addr));
  294. if (ieee80211_is_beacon(hdr->frame_control))
  295. packet_beacon = true;
  296. else
  297. packet_beacon = false;
  298. _rtl88ee_query_rxphystatus(hw, pstatus, pdesc, p_drvinfo,
  299. packet_matchbssid, packet_toself,
  300. packet_beacon);
  301. _rtl88ee_smart_antenna(hw, pstatus);
  302. rtl_process_phyinfo(hw, tmp_buf, pstatus);
  303. }
  304. static void _rtl88ee_insert_emcontent(struct rtl_tcb_desc *ptcb_desc,
  305. u8 *virtualaddress)
  306. {
  307. u32 dwtmp = 0;
  308. memset(virtualaddress, 0, 8);
  309. SET_EARLYMODE_PKTNUM(virtualaddress, ptcb_desc->empkt_num);
  310. if (ptcb_desc->empkt_num == 1) {
  311. dwtmp = ptcb_desc->empkt_len[0];
  312. } else {
  313. dwtmp = ptcb_desc->empkt_len[0];
  314. dwtmp += ((dwtmp%4) ? (4-dwtmp%4) : 0)+4;
  315. dwtmp += ptcb_desc->empkt_len[1];
  316. }
  317. SET_EARLYMODE_LEN0(virtualaddress, dwtmp);
  318. if (ptcb_desc->empkt_num <= 3) {
  319. dwtmp = ptcb_desc->empkt_len[2];
  320. } else {
  321. dwtmp = ptcb_desc->empkt_len[2];
  322. dwtmp += ((dwtmp%4) ? (4-dwtmp%4) : 0)+4;
  323. dwtmp += ptcb_desc->empkt_len[3];
  324. }
  325. SET_EARLYMODE_LEN1(virtualaddress, dwtmp);
  326. if (ptcb_desc->empkt_num <= 5) {
  327. dwtmp = ptcb_desc->empkt_len[4];
  328. } else {
  329. dwtmp = ptcb_desc->empkt_len[4];
  330. dwtmp += ((dwtmp%4) ? (4-dwtmp%4) : 0)+4;
  331. dwtmp += ptcb_desc->empkt_len[5];
  332. }
  333. SET_EARLYMODE_LEN2_1(virtualaddress, dwtmp & 0xF);
  334. SET_EARLYMODE_LEN2_2(virtualaddress, dwtmp >> 4);
  335. if (ptcb_desc->empkt_num <= 7) {
  336. dwtmp = ptcb_desc->empkt_len[6];
  337. } else {
  338. dwtmp = ptcb_desc->empkt_len[6];
  339. dwtmp += ((dwtmp%4) ? (4-dwtmp%4) : 0)+4;
  340. dwtmp += ptcb_desc->empkt_len[7];
  341. }
  342. SET_EARLYMODE_LEN3(virtualaddress, dwtmp);
  343. if (ptcb_desc->empkt_num <= 9) {
  344. dwtmp = ptcb_desc->empkt_len[8];
  345. } else {
  346. dwtmp = ptcb_desc->empkt_len[8];
  347. dwtmp += ((dwtmp%4) ? (4-dwtmp%4) : 0)+4;
  348. dwtmp += ptcb_desc->empkt_len[9];
  349. }
  350. SET_EARLYMODE_LEN4(virtualaddress, dwtmp);
  351. }
  352. bool rtl88ee_rx_query_desc(struct ieee80211_hw *hw,
  353. struct rtl_stats *status,
  354. struct ieee80211_rx_status *rx_status,
  355. u8 *pdesc, struct sk_buff *skb)
  356. {
  357. struct rtl_priv *rtlpriv = rtl_priv(hw);
  358. struct rx_fwinfo_88e *p_drvinfo;
  359. struct ieee80211_hdr *hdr;
  360. u32 phystatus = GET_RX_DESC_PHYST(pdesc);
  361. status->packet_report_type = (u8)GET_RX_STATUS_DESC_RPT_SEL(pdesc);
  362. if (status->packet_report_type == TX_REPORT2)
  363. status->length = (u16)GET_RX_RPT2_DESC_PKT_LEN(pdesc);
  364. else
  365. status->length = (u16)GET_RX_DESC_PKT_LEN(pdesc);
  366. status->rx_drvinfo_size = (u8)GET_RX_DESC_DRV_INFO_SIZE(pdesc) *
  367. RX_DRV_INFO_SIZE_UNIT;
  368. status->rx_bufshift = (u8)(GET_RX_DESC_SHIFT(pdesc) & 0x03);
  369. status->icv = (u16)GET_RX_DESC_ICV(pdesc);
  370. status->crc = (u16)GET_RX_DESC_CRC32(pdesc);
  371. status->hwerror = (status->crc | status->icv);
  372. status->decrypted = !GET_RX_DESC_SWDEC(pdesc);
  373. status->rate = (u8)GET_RX_DESC_RXMCS(pdesc);
  374. status->shortpreamble = (u16)GET_RX_DESC_SPLCP(pdesc);
  375. status->isampdu = (bool) (GET_RX_DESC_PAGGR(pdesc) == 1);
  376. status->isfirst_ampdu = (bool)((GET_RX_DESC_PAGGR(pdesc) == 1) &&
  377. (GET_RX_DESC_FAGGR(pdesc) == 1));
  378. if (status->packet_report_type == NORMAL_RX)
  379. status->timestamp_low = GET_RX_DESC_TSFL(pdesc);
  380. status->rx_is40Mhzpacket = (bool) GET_RX_DESC_BW(pdesc);
  381. status->is_ht = (bool)GET_RX_DESC_RXHT(pdesc);
  382. status->is_cck = RTL8188_RX_HAL_IS_CCK_RATE(status->rate);
  383. status->macid = GET_RX_DESC_MACID(pdesc);
  384. if (GET_RX_STATUS_DESC_MAGIC_MATCH(pdesc))
  385. status->wake_match = BIT(2);
  386. else if (GET_RX_STATUS_DESC_MAGIC_MATCH(pdesc))
  387. status->wake_match = BIT(1);
  388. else if (GET_RX_STATUS_DESC_UNICAST_MATCH(pdesc))
  389. status->wake_match = BIT(0);
  390. else
  391. status->wake_match = 0;
  392. if (status->wake_match)
  393. RT_TRACE(rtlpriv, COMP_RXDESC, DBG_LOUD,
  394. "GGGGGGGGGGGGGet Wakeup Packet!! WakeMatch=%d\n",
  395. status->wake_match);
  396. rx_status->freq = hw->conf.chandef.chan->center_freq;
  397. rx_status->band = hw->conf.chandef.chan->band;
  398. hdr = (struct ieee80211_hdr *)(skb->data + status->rx_drvinfo_size
  399. + status->rx_bufshift);
  400. if (status->crc)
  401. rx_status->flag |= RX_FLAG_FAILED_FCS_CRC;
  402. if (status->rx_is40Mhzpacket)
  403. rx_status->flag |= RX_FLAG_40MHZ;
  404. if (status->is_ht)
  405. rx_status->flag |= RX_FLAG_HT;
  406. rx_status->flag |= RX_FLAG_MACTIME_START;
  407. /* hw will set status->decrypted true, if it finds the
  408. * frame is open data frame or mgmt frame.
  409. * So hw will not decryption robust managment frame
  410. * for IEEE80211w but still set status->decrypted
  411. * true, so here we should set it back to undecrypted
  412. * for IEEE80211w frame, and mac80211 sw will help
  413. * to decrypt it
  414. */
  415. if (status->decrypted) {
  416. if ((!_ieee80211_is_robust_mgmt_frame(hdr)) &&
  417. (ieee80211_has_protected(hdr->frame_control)))
  418. rx_status->flag |= RX_FLAG_DECRYPTED;
  419. else
  420. rx_status->flag &= ~RX_FLAG_DECRYPTED;
  421. }
  422. /* rate_idx: index of data rate into band's
  423. * supported rates or MCS index if HT rates
  424. * are use (RX_FLAG_HT)
  425. * Notice: this is diff with windows define
  426. */
  427. rx_status->rate_idx = rtlwifi_rate_mapping(hw, status->is_ht,
  428. false, status->rate);
  429. rx_status->mactime = status->timestamp_low;
  430. if (phystatus == true) {
  431. p_drvinfo = (struct rx_fwinfo_88e *)(skb->data +
  432. status->rx_bufshift);
  433. _rtl88ee_translate_rx_signal_stuff(hw,
  434. skb, status, pdesc,
  435. p_drvinfo);
  436. }
  437. rx_status->signal = status->recvsignalpower + 10;
  438. if (status->packet_report_type == TX_REPORT2) {
  439. status->macid_valid_entry[0] =
  440. GET_RX_RPT2_DESC_MACID_VALID_1(pdesc);
  441. status->macid_valid_entry[1] =
  442. GET_RX_RPT2_DESC_MACID_VALID_2(pdesc);
  443. }
  444. return true;
  445. }
  446. void rtl88ee_tx_fill_desc(struct ieee80211_hw *hw,
  447. struct ieee80211_hdr *hdr, u8 *pdesc_tx,
  448. u8 *txbd, struct ieee80211_tx_info *info,
  449. struct ieee80211_sta *sta,
  450. struct sk_buff *skb,
  451. u8 hw_queue, struct rtl_tcb_desc *ptcb_desc)
  452. {
  453. struct rtl_priv *rtlpriv = rtl_priv(hw);
  454. struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
  455. struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
  456. struct rtl_hal *rtlhal = rtl_hal(rtlpriv);
  457. u8 *pdesc = (u8 *)pdesc_tx;
  458. u16 seq_number;
  459. __le16 fc = hdr->frame_control;
  460. unsigned int buf_len = 0;
  461. unsigned int skb_len = skb->len;
  462. u8 fw_qsel = _rtl88ee_map_hwqueue_to_fwqueue(skb, hw_queue);
  463. bool firstseg = ((hdr->seq_ctrl &
  464. cpu_to_le16(IEEE80211_SCTL_FRAG)) == 0);
  465. bool lastseg = ((hdr->frame_control &
  466. cpu_to_le16(IEEE80211_FCTL_MOREFRAGS)) == 0);
  467. dma_addr_t mapping;
  468. u8 bw_40 = 0;
  469. u8 short_gi = 0;
  470. if (mac->opmode == NL80211_IFTYPE_STATION) {
  471. bw_40 = mac->bw_40;
  472. } else if (mac->opmode == NL80211_IFTYPE_AP ||
  473. mac->opmode == NL80211_IFTYPE_ADHOC) {
  474. if (sta)
  475. bw_40 = sta->ht_cap.cap &
  476. IEEE80211_HT_CAP_SUP_WIDTH_20_40;
  477. }
  478. seq_number = (le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_SEQ) >> 4;
  479. rtl_get_tcb_desc(hw, info, sta, skb, ptcb_desc);
  480. /* reserve 8 byte for AMPDU early mode */
  481. if (rtlhal->earlymode_enable) {
  482. skb_push(skb, EM_HDR_LEN);
  483. memset(skb->data, 0, EM_HDR_LEN);
  484. }
  485. buf_len = skb->len;
  486. mapping = pci_map_single(rtlpci->pdev, skb->data, skb->len,
  487. PCI_DMA_TODEVICE);
  488. if (pci_dma_mapping_error(rtlpci->pdev, mapping)) {
  489. RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE,
  490. "DMA mapping error");
  491. return;
  492. }
  493. CLEAR_PCI_TX_DESC_CONTENT(pdesc, sizeof(struct tx_desc_88e));
  494. if (ieee80211_is_nullfunc(fc) || ieee80211_is_ctl(fc)) {
  495. firstseg = true;
  496. lastseg = true;
  497. }
  498. if (firstseg) {
  499. if (rtlhal->earlymode_enable) {
  500. SET_TX_DESC_PKT_OFFSET(pdesc, 1);
  501. SET_TX_DESC_OFFSET(pdesc, USB_HWDESC_HEADER_LEN +
  502. EM_HDR_LEN);
  503. if (ptcb_desc->empkt_num) {
  504. RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE,
  505. "Insert 8 byte.pTcb->EMPktNum:%d\n",
  506. ptcb_desc->empkt_num);
  507. _rtl88ee_insert_emcontent(ptcb_desc,
  508. (u8 *)(skb->data));
  509. }
  510. } else {
  511. SET_TX_DESC_OFFSET(pdesc, USB_HWDESC_HEADER_LEN);
  512. }
  513. ptcb_desc->use_driver_rate = true;
  514. SET_TX_DESC_TX_RATE(pdesc, ptcb_desc->hw_rate);
  515. if (ptcb_desc->hw_rate > DESC92C_RATEMCS0)
  516. short_gi = (ptcb_desc->use_shortgi) ? 1 : 0;
  517. else
  518. short_gi = (ptcb_desc->use_shortpreamble) ? 1 : 0;
  519. SET_TX_DESC_DATA_SHORTGI(pdesc, short_gi);
  520. if (info->flags & IEEE80211_TX_CTL_AMPDU) {
  521. SET_TX_DESC_AGG_ENABLE(pdesc, 1);
  522. SET_TX_DESC_MAX_AGG_NUM(pdesc, 0x14);
  523. }
  524. SET_TX_DESC_SEQ(pdesc, seq_number);
  525. SET_TX_DESC_RTS_ENABLE(pdesc, ((ptcb_desc->rts_enable &&
  526. !ptcb_desc->cts_enable) ? 1 : 0));
  527. SET_TX_DESC_HW_RTS_ENABLE(pdesc, 0);
  528. SET_TX_DESC_CTS2SELF(pdesc, ((ptcb_desc->cts_enable) ? 1 : 0));
  529. SET_TX_DESC_RTS_STBC(pdesc, ((ptcb_desc->rts_stbc) ? 1 : 0));
  530. SET_TX_DESC_RTS_RATE(pdesc, ptcb_desc->rts_rate);
  531. SET_TX_DESC_RTS_BW(pdesc, 0);
  532. SET_TX_DESC_RTS_SC(pdesc, ptcb_desc->rts_sc);
  533. SET_TX_DESC_RTS_SHORT(pdesc,
  534. ((ptcb_desc->rts_rate <= DESC92C_RATE54M) ?
  535. (ptcb_desc->rts_use_shortpreamble ? 1 : 0) :
  536. (ptcb_desc->rts_use_shortgi ? 1 : 0)));
  537. if (ptcb_desc->tx_enable_sw_calc_duration)
  538. SET_TX_DESC_NAV_USE_HDR(pdesc, 1);
  539. if (bw_40) {
  540. if (ptcb_desc->packet_bw == HT_CHANNEL_WIDTH_20_40) {
  541. SET_TX_DESC_DATA_BW(pdesc, 1);
  542. SET_TX_DESC_TX_SUB_CARRIER(pdesc, 3);
  543. } else {
  544. SET_TX_DESC_DATA_BW(pdesc, 0);
  545. SET_TX_DESC_TX_SUB_CARRIER(pdesc,
  546. mac->cur_40_prime_sc);
  547. }
  548. } else {
  549. SET_TX_DESC_DATA_BW(pdesc, 0);
  550. SET_TX_DESC_TX_SUB_CARRIER(pdesc, 0);
  551. }
  552. SET_TX_DESC_LINIP(pdesc, 0);
  553. SET_TX_DESC_PKT_SIZE(pdesc, (u16)skb_len);
  554. if (sta) {
  555. u8 ampdu_density = sta->ht_cap.ampdu_density;
  556. SET_TX_DESC_AMPDU_DENSITY(pdesc, ampdu_density);
  557. }
  558. if (info->control.hw_key) {
  559. struct ieee80211_key_conf *keyconf;
  560. keyconf = info->control.hw_key;
  561. switch (keyconf->cipher) {
  562. case WLAN_CIPHER_SUITE_WEP40:
  563. case WLAN_CIPHER_SUITE_WEP104:
  564. case WLAN_CIPHER_SUITE_TKIP:
  565. SET_TX_DESC_SEC_TYPE(pdesc, 0x1);
  566. break;
  567. case WLAN_CIPHER_SUITE_CCMP:
  568. SET_TX_DESC_SEC_TYPE(pdesc, 0x3);
  569. break;
  570. default:
  571. SET_TX_DESC_SEC_TYPE(pdesc, 0x0);
  572. break;
  573. }
  574. }
  575. SET_TX_DESC_QUEUE_SEL(pdesc, fw_qsel);
  576. SET_TX_DESC_DATA_RATE_FB_LIMIT(pdesc, 0x1F);
  577. SET_TX_DESC_RTS_RATE_FB_LIMIT(pdesc, 0xF);
  578. SET_TX_DESC_DISABLE_FB(pdesc, ptcb_desc->disable_ratefallback ?
  579. 1 : 0);
  580. SET_TX_DESC_USE_RATE(pdesc, ptcb_desc->use_driver_rate ? 1 : 0);
  581. /*SET_TX_DESC_PWR_STATUS(pdesc, pwr_status);*/
  582. /* Set TxRate and RTSRate in TxDesc */
  583. /* This prevent Tx initial rate of new-coming packets */
  584. /* from being overwritten by retried packet rate.*/
  585. if (!ptcb_desc->use_driver_rate) {
  586. /*SET_TX_DESC_RTS_RATE(pdesc, 0x08); */
  587. /* SET_TX_DESC_TX_RATE(pdesc, 0x0b); */
  588. }
  589. if (ieee80211_is_data_qos(fc)) {
  590. if (mac->rdg_en) {
  591. RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE,
  592. "Enable RDG function.\n");
  593. SET_TX_DESC_RDG_ENABLE(pdesc, 1);
  594. SET_TX_DESC_HTC(pdesc, 1);
  595. }
  596. }
  597. }
  598. SET_TX_DESC_FIRST_SEG(pdesc, (firstseg ? 1 : 0));
  599. SET_TX_DESC_LAST_SEG(pdesc, (lastseg ? 1 : 0));
  600. SET_TX_DESC_TX_BUFFER_SIZE(pdesc, (u16)buf_len);
  601. SET_TX_DESC_TX_BUFFER_ADDRESS(pdesc, mapping);
  602. if (rtlpriv->dm.useramask) {
  603. SET_TX_DESC_RATE_ID(pdesc, ptcb_desc->ratr_index);
  604. SET_TX_DESC_MACID(pdesc, ptcb_desc->mac_id);
  605. } else {
  606. SET_TX_DESC_RATE_ID(pdesc, 0xC + ptcb_desc->ratr_index);
  607. SET_TX_DESC_MACID(pdesc, ptcb_desc->ratr_index);
  608. }
  609. if (ieee80211_is_data_qos(fc))
  610. SET_TX_DESC_QOS(pdesc, 1);
  611. if (!ieee80211_is_data_qos(fc))
  612. SET_TX_DESC_HWSEQ_EN(pdesc, 1);
  613. SET_TX_DESC_MORE_FRAG(pdesc, (lastseg ? 0 : 1));
  614. if (is_multicast_ether_addr(ieee80211_get_DA(hdr)) ||
  615. is_broadcast_ether_addr(ieee80211_get_DA(hdr))) {
  616. SET_TX_DESC_BMC(pdesc, 1);
  617. }
  618. rtl88e_dm_set_tx_ant_by_tx_info(hw, pdesc, ptcb_desc->mac_id);
  619. RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE, "\n");
  620. }
  621. void rtl88ee_tx_fill_cmddesc(struct ieee80211_hw *hw,
  622. u8 *pdesc, bool firstseg,
  623. bool lastseg, struct sk_buff *skb)
  624. {
  625. struct rtl_priv *rtlpriv = rtl_priv(hw);
  626. struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
  627. u8 fw_queue = QSLT_BEACON;
  628. dma_addr_t mapping = pci_map_single(rtlpci->pdev,
  629. skb->data, skb->len,
  630. PCI_DMA_TODEVICE);
  631. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)(skb->data);
  632. __le16 fc = hdr->frame_control;
  633. if (pci_dma_mapping_error(rtlpci->pdev, mapping)) {
  634. RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE,
  635. "DMA mapping error");
  636. return;
  637. }
  638. CLEAR_PCI_TX_DESC_CONTENT(pdesc, TX_DESC_SIZE);
  639. if (firstseg)
  640. SET_TX_DESC_OFFSET(pdesc, USB_HWDESC_HEADER_LEN);
  641. SET_TX_DESC_TX_RATE(pdesc, DESC92C_RATE1M);
  642. SET_TX_DESC_SEQ(pdesc, 0);
  643. SET_TX_DESC_LINIP(pdesc, 0);
  644. SET_TX_DESC_QUEUE_SEL(pdesc, fw_queue);
  645. SET_TX_DESC_FIRST_SEG(pdesc, 1);
  646. SET_TX_DESC_LAST_SEG(pdesc, 1);
  647. SET_TX_DESC_TX_BUFFER_SIZE(pdesc, (u16)(skb->len));
  648. SET_TX_DESC_TX_BUFFER_ADDRESS(pdesc, mapping);
  649. SET_TX_DESC_RATE_ID(pdesc, 7);
  650. SET_TX_DESC_MACID(pdesc, 0);
  651. SET_TX_DESC_OWN(pdesc, 1);
  652. SET_TX_DESC_PKT_SIZE(pdesc, (u16)(skb->len));
  653. SET_TX_DESC_FIRST_SEG(pdesc, 1);
  654. SET_TX_DESC_LAST_SEG(pdesc, 1);
  655. SET_TX_DESC_OFFSET(pdesc, 0x20);
  656. SET_TX_DESC_USE_RATE(pdesc, 1);
  657. if (!ieee80211_is_data_qos(fc))
  658. SET_TX_DESC_HWSEQ_EN(pdesc, 1);
  659. RT_PRINT_DATA(rtlpriv, COMP_CMD, DBG_LOUD,
  660. "H2C Tx Cmd Content\n",
  661. pdesc, TX_DESC_SIZE);
  662. }
  663. void rtl88ee_set_desc(struct ieee80211_hw *hw, u8 *pdesc,
  664. bool istx, u8 desc_name, u8 *val)
  665. {
  666. if (istx == true) {
  667. switch (desc_name) {
  668. case HW_DESC_OWN:
  669. SET_TX_DESC_OWN(pdesc, 1);
  670. break;
  671. case HW_DESC_TX_NEXTDESC_ADDR:
  672. SET_TX_DESC_NEXT_DESC_ADDRESS(pdesc, *(u32 *)val);
  673. break;
  674. default:
  675. RT_ASSERT(false, "ERR txdesc :%d not process\n",
  676. desc_name);
  677. break;
  678. }
  679. } else {
  680. switch (desc_name) {
  681. case HW_DESC_RXOWN:
  682. SET_RX_DESC_OWN(pdesc, 1);
  683. break;
  684. case HW_DESC_RXBUFF_ADDR:
  685. SET_RX_DESC_BUFF_ADDR(pdesc, *(u32 *)val);
  686. break;
  687. case HW_DESC_RXPKT_LEN:
  688. SET_RX_DESC_PKT_LEN(pdesc, *(u32 *)val);
  689. break;
  690. case HW_DESC_RXERO:
  691. SET_RX_DESC_EOR(pdesc, 1);
  692. break;
  693. default:
  694. RT_ASSERT(false, "ERR rxdesc :%d not process\n",
  695. desc_name);
  696. break;
  697. }
  698. }
  699. }
  700. u32 rtl88ee_get_desc(u8 *pdesc, bool istx, u8 desc_name)
  701. {
  702. u32 ret = 0;
  703. if (istx == true) {
  704. switch (desc_name) {
  705. case HW_DESC_OWN:
  706. ret = GET_TX_DESC_OWN(pdesc);
  707. break;
  708. case HW_DESC_TXBUFF_ADDR:
  709. ret = GET_TX_DESC_TX_BUFFER_ADDRESS(pdesc);
  710. break;
  711. default:
  712. RT_ASSERT(false, "ERR txdesc :%d not process\n",
  713. desc_name);
  714. break;
  715. }
  716. } else {
  717. switch (desc_name) {
  718. case HW_DESC_OWN:
  719. ret = GET_RX_DESC_OWN(pdesc);
  720. break;
  721. case HW_DESC_RXPKT_LEN:
  722. ret = GET_RX_DESC_PKT_LEN(pdesc);
  723. break;
  724. case HW_DESC_RXBUFF_ADDR:
  725. ret = GET_RX_DESC_BUFF_ADDR(pdesc);
  726. break;
  727. default:
  728. RT_ASSERT(false, "ERR rxdesc :%d not process\n",
  729. desc_name);
  730. break;
  731. }
  732. }
  733. return ret;
  734. }
  735. bool rtl88ee_is_tx_desc_closed(struct ieee80211_hw *hw, u8 hw_queue, u16 index)
  736. {
  737. struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
  738. struct rtl8192_tx_ring *ring = &rtlpci->tx_ring[hw_queue];
  739. u8 *entry = (u8 *)(&ring->desc[ring->idx]);
  740. u8 own = (u8)rtl88ee_get_desc(entry, true, HW_DESC_OWN);
  741. /*beacon packet will only use the first
  742. *descriptor defautly,and the own may not
  743. *be cleared by the hardware
  744. */
  745. if (own)
  746. return false;
  747. return true;
  748. }
  749. void rtl88ee_tx_polling(struct ieee80211_hw *hw, u8 hw_queue)
  750. {
  751. struct rtl_priv *rtlpriv = rtl_priv(hw);
  752. if (hw_queue == BEACON_QUEUE) {
  753. rtl_write_word(rtlpriv, REG_PCIE_CTRL_REG, BIT(4));
  754. } else {
  755. rtl_write_word(rtlpriv, REG_PCIE_CTRL_REG,
  756. BIT(0) << (hw_queue));
  757. }
  758. }
  759. u32 rtl88ee_rx_command_packet(struct ieee80211_hw *hw,
  760. struct rtl_stats status,
  761. struct sk_buff *skb)
  762. {
  763. return 0;
  764. }