fw.c 24 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2009-2013 Realtek Corporation.
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of version 2 of the GNU General Public License as
  7. * published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. *
  14. * The full GNU General Public License is included in this distribution in the
  15. * file called LICENSE.
  16. *
  17. * Contact Information:
  18. * wlanfae <wlanfae@realtek.com>
  19. * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
  20. * Hsinchu 300, Taiwan.
  21. *
  22. * Larry Finger <Larry.Finger@lwfinger.net>
  23. *
  24. *****************************************************************************/
  25. #include "../wifi.h"
  26. #include "../pci.h"
  27. #include "../base.h"
  28. #include "../core.h"
  29. #include "reg.h"
  30. #include "def.h"
  31. #include "fw.h"
  32. static void _rtl88e_enable_fw_download(struct ieee80211_hw *hw, bool enable)
  33. {
  34. struct rtl_priv *rtlpriv = rtl_priv(hw);
  35. u8 tmp;
  36. if (enable) {
  37. tmp = rtl_read_byte(rtlpriv, REG_SYS_FUNC_EN + 1);
  38. rtl_write_byte(rtlpriv, REG_SYS_FUNC_EN + 1, tmp | 0x04);
  39. tmp = rtl_read_byte(rtlpriv, REG_MCUFWDL);
  40. rtl_write_byte(rtlpriv, REG_MCUFWDL, tmp | 0x01);
  41. tmp = rtl_read_byte(rtlpriv, REG_MCUFWDL + 2);
  42. rtl_write_byte(rtlpriv, REG_MCUFWDL + 2, tmp & 0xf7);
  43. } else {
  44. tmp = rtl_read_byte(rtlpriv, REG_MCUFWDL);
  45. rtl_write_byte(rtlpriv, REG_MCUFWDL, tmp & 0xfe);
  46. rtl_write_byte(rtlpriv, REG_MCUFWDL + 1, 0x00);
  47. }
  48. }
  49. static void _rtl88e_fw_block_write(struct ieee80211_hw *hw,
  50. const u8 *buffer, u32 size)
  51. {
  52. struct rtl_priv *rtlpriv = rtl_priv(hw);
  53. u32 blocksize = sizeof(u32);
  54. u8 *bufferptr = (u8 *)buffer;
  55. u32 *pu4BytePtr = (u32 *)buffer;
  56. u32 i, offset, blockcount, remainsize;
  57. blockcount = size / blocksize;
  58. remainsize = size % blocksize;
  59. for (i = 0; i < blockcount; i++) {
  60. offset = i * blocksize;
  61. rtl_write_dword(rtlpriv, (FW_8192C_START_ADDRESS + offset),
  62. *(pu4BytePtr + i));
  63. }
  64. if (remainsize) {
  65. offset = blockcount * blocksize;
  66. bufferptr += offset;
  67. for (i = 0; i < remainsize; i++) {
  68. rtl_write_byte(rtlpriv, (FW_8192C_START_ADDRESS +
  69. offset + i), *(bufferptr + i));
  70. }
  71. }
  72. }
  73. static void _rtl88e_fw_page_write(struct ieee80211_hw *hw,
  74. u32 page, const u8 *buffer, u32 size)
  75. {
  76. struct rtl_priv *rtlpriv = rtl_priv(hw);
  77. u8 value8;
  78. u8 u8page = (u8) (page & 0x07);
  79. value8 = (rtl_read_byte(rtlpriv, REG_MCUFWDL + 2) & 0xF8) | u8page;
  80. rtl_write_byte(rtlpriv, (REG_MCUFWDL + 2), value8);
  81. _rtl88e_fw_block_write(hw, buffer, size);
  82. }
  83. static void _rtl88e_fill_dummy(u8 *pfwbuf, u32 *pfwlen)
  84. {
  85. u32 fwlen = *pfwlen;
  86. u8 remain = (u8) (fwlen % 4);
  87. remain = (remain == 0) ? 0 : (4 - remain);
  88. while (remain > 0) {
  89. pfwbuf[fwlen] = 0;
  90. fwlen++;
  91. remain--;
  92. }
  93. *pfwlen = fwlen;
  94. }
  95. static void _rtl88e_write_fw(struct ieee80211_hw *hw,
  96. enum version_8188e version, u8 *buffer, u32 size)
  97. {
  98. struct rtl_priv *rtlpriv = rtl_priv(hw);
  99. u8 *bufferptr = (u8 *)buffer;
  100. u32 pagenums, remainsize;
  101. u32 page, offset;
  102. RT_TRACE(rtlpriv, COMP_FW, DBG_LOUD, "FW size is %d bytes,\n", size);
  103. _rtl88e_fill_dummy(bufferptr, &size);
  104. pagenums = size / FW_8192C_PAGE_SIZE;
  105. remainsize = size % FW_8192C_PAGE_SIZE;
  106. if (pagenums > 8) {
  107. RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
  108. "Page numbers should not greater then 8\n");
  109. }
  110. for (page = 0; page < pagenums; page++) {
  111. offset = page * FW_8192C_PAGE_SIZE;
  112. _rtl88e_fw_page_write(hw, page, (bufferptr + offset),
  113. FW_8192C_PAGE_SIZE);
  114. }
  115. if (remainsize) {
  116. offset = pagenums * FW_8192C_PAGE_SIZE;
  117. page = pagenums;
  118. _rtl88e_fw_page_write(hw, page, (bufferptr + offset),
  119. remainsize);
  120. }
  121. }
  122. static int _rtl88e_fw_free_to_go(struct ieee80211_hw *hw)
  123. {
  124. struct rtl_priv *rtlpriv = rtl_priv(hw);
  125. int err = -EIO;
  126. u32 counter = 0;
  127. u32 value32;
  128. do {
  129. value32 = rtl_read_dword(rtlpriv, REG_MCUFWDL);
  130. } while ((counter++ < FW_8192C_POLLING_TIMEOUT_COUNT) &&
  131. (!(value32 & FWDL_CHKSUM_RPT)));
  132. if (counter >= FW_8192C_POLLING_TIMEOUT_COUNT) {
  133. RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
  134. "chksum report faill ! REG_MCUFWDL:0x%08x .\n",
  135. value32);
  136. goto exit;
  137. }
  138. RT_TRACE(rtlpriv, COMP_FW, DBG_TRACE,
  139. "Checksum report OK ! REG_MCUFWDL:0x%08x .\n", value32);
  140. value32 = rtl_read_dword(rtlpriv, REG_MCUFWDL);
  141. value32 |= MCUFWDL_RDY;
  142. value32 &= ~WINTINI_RDY;
  143. rtl_write_dword(rtlpriv, REG_MCUFWDL, value32);
  144. rtl88e_firmware_selfreset(hw);
  145. counter = 0;
  146. do {
  147. value32 = rtl_read_dword(rtlpriv, REG_MCUFWDL);
  148. if (value32 & WINTINI_RDY) {
  149. RT_TRACE(rtlpriv, COMP_FW, DBG_TRACE,
  150. "Polling FW ready success!! REG_MCUFWDL:0x%08x.\n",
  151. value32);
  152. err = 0;
  153. goto exit;
  154. }
  155. udelay(FW_8192C_POLLING_DELAY);
  156. } while (counter++ < FW_8192C_POLLING_TIMEOUT_COUNT);
  157. RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
  158. "Polling FW ready fail!! REG_MCUFWDL:0x%08x .\n", value32);
  159. exit:
  160. return err;
  161. }
  162. int rtl88e_download_fw(struct ieee80211_hw *hw,
  163. bool buse_wake_on_wlan_fw)
  164. {
  165. struct rtl_priv *rtlpriv = rtl_priv(hw);
  166. struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
  167. struct rtlwifi_firmware_header *pfwheader;
  168. u8 *pfwdata;
  169. u32 fwsize;
  170. int err;
  171. enum version_8188e version = rtlhal->version;
  172. if (!rtlhal->pfirmware)
  173. return 1;
  174. pfwheader = (struct rtlwifi_firmware_header *)rtlhal->pfirmware;
  175. pfwdata = rtlhal->pfirmware;
  176. fwsize = rtlhal->fwsize;
  177. RT_TRACE(rtlpriv, COMP_FW, DBG_DMESG,
  178. "normal Firmware SIZE %d\n", fwsize);
  179. if (IS_FW_HEADER_EXIST(pfwheader)) {
  180. RT_TRACE(rtlpriv, COMP_FW, DBG_DMESG,
  181. "Firmware Version(%d), Signature(%#x), Size(%d)\n",
  182. pfwheader->version, pfwheader->signature,
  183. (int)sizeof(struct rtlwifi_firmware_header));
  184. pfwdata = pfwdata + sizeof(struct rtlwifi_firmware_header);
  185. fwsize = fwsize - sizeof(struct rtlwifi_firmware_header);
  186. }
  187. if (rtl_read_byte(rtlpriv, REG_MCUFWDL) & BIT(7)) {
  188. rtl_write_byte(rtlpriv, REG_MCUFWDL, 0);
  189. rtl88e_firmware_selfreset(hw);
  190. }
  191. _rtl88e_enable_fw_download(hw, true);
  192. _rtl88e_write_fw(hw, version, pfwdata, fwsize);
  193. _rtl88e_enable_fw_download(hw, false);
  194. err = _rtl88e_fw_free_to_go(hw);
  195. if (err) {
  196. RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
  197. "Firmware is not ready to run!\n");
  198. } else {
  199. RT_TRACE(rtlpriv, COMP_FW, DBG_LOUD,
  200. "Firmware is ready to run!\n");
  201. }
  202. return 0;
  203. }
  204. static bool _rtl88e_check_fw_read_last_h2c(struct ieee80211_hw *hw, u8 boxnum)
  205. {
  206. struct rtl_priv *rtlpriv = rtl_priv(hw);
  207. u8 val_hmetfr;
  208. val_hmetfr = rtl_read_byte(rtlpriv, REG_HMETFR);
  209. if (((val_hmetfr >> boxnum) & BIT(0)) == 0)
  210. return true;
  211. return false;
  212. }
  213. static void _rtl88e_fill_h2c_command(struct ieee80211_hw *hw,
  214. u8 element_id, u32 cmd_len,
  215. u8 *cmd_b)
  216. {
  217. struct rtl_priv *rtlpriv = rtl_priv(hw);
  218. struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
  219. u8 boxnum;
  220. u16 box_reg = 0, box_extreg = 0;
  221. u8 u1b_tmp;
  222. bool isfw_read = false;
  223. u8 buf_index = 0;
  224. bool write_sucess = false;
  225. u8 wait_h2c_limmit = 100;
  226. u8 wait_writeh2c_limit = 100;
  227. u8 boxcontent[4], boxextcontent[4];
  228. u32 h2c_waitcounter = 0;
  229. unsigned long flag;
  230. u8 idx;
  231. RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD, "come in\n");
  232. while (true) {
  233. spin_lock_irqsave(&rtlpriv->locks.h2c_lock, flag);
  234. if (rtlhal->h2c_setinprogress) {
  235. RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD,
  236. "H2C set in progress! Wait to set..element_id(%d).\n",
  237. element_id);
  238. while (rtlhal->h2c_setinprogress) {
  239. spin_unlock_irqrestore(&rtlpriv->locks.h2c_lock,
  240. flag);
  241. h2c_waitcounter++;
  242. RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD,
  243. "Wait 100 us (%d times)...\n",
  244. h2c_waitcounter);
  245. udelay(100);
  246. if (h2c_waitcounter > 1000)
  247. return;
  248. spin_lock_irqsave(&rtlpriv->locks.h2c_lock,
  249. flag);
  250. }
  251. spin_unlock_irqrestore(&rtlpriv->locks.h2c_lock, flag);
  252. } else {
  253. rtlhal->h2c_setinprogress = true;
  254. spin_unlock_irqrestore(&rtlpriv->locks.h2c_lock, flag);
  255. break;
  256. }
  257. }
  258. while (!write_sucess) {
  259. wait_writeh2c_limit--;
  260. if (wait_writeh2c_limit == 0) {
  261. RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
  262. "Write H2C fail because no trigger for FW INT!\n");
  263. break;
  264. }
  265. boxnum = rtlhal->last_hmeboxnum;
  266. switch (boxnum) {
  267. case 0:
  268. box_reg = REG_HMEBOX_0;
  269. box_extreg = REG_HMEBOX_EXT_0;
  270. break;
  271. case 1:
  272. box_reg = REG_HMEBOX_1;
  273. box_extreg = REG_HMEBOX_EXT_1;
  274. break;
  275. case 2:
  276. box_reg = REG_HMEBOX_2;
  277. box_extreg = REG_HMEBOX_EXT_2;
  278. break;
  279. case 3:
  280. box_reg = REG_HMEBOX_3;
  281. box_extreg = REG_HMEBOX_EXT_3;
  282. break;
  283. default:
  284. RT_TRACE(rtlpriv, COMP_ERR, DBG_LOUD,
  285. "switch case not process\n");
  286. break;
  287. }
  288. isfw_read = _rtl88e_check_fw_read_last_h2c(hw, boxnum);
  289. while (!isfw_read) {
  290. wait_h2c_limmit--;
  291. if (wait_h2c_limmit == 0) {
  292. RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD,
  293. "Waiting too long for FW read clear HMEBox(%d)!\n",
  294. boxnum);
  295. break;
  296. }
  297. udelay(10);
  298. isfw_read = _rtl88e_check_fw_read_last_h2c(hw, boxnum);
  299. u1b_tmp = rtl_read_byte(rtlpriv, 0x130);
  300. RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD,
  301. "Waiting for FW read clear HMEBox(%d)!!! 0x130 = %2x\n",
  302. boxnum, u1b_tmp);
  303. }
  304. if (!isfw_read) {
  305. RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD,
  306. "Write H2C register BOX[%d] fail!!!!! Fw do not read.\n",
  307. boxnum);
  308. break;
  309. }
  310. memset(boxcontent, 0, sizeof(boxcontent));
  311. memset(boxextcontent, 0, sizeof(boxextcontent));
  312. boxcontent[0] = element_id;
  313. RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD,
  314. "Write element_id box_reg(%4x) = %2x\n",
  315. box_reg, element_id);
  316. switch (cmd_len) {
  317. case 1:
  318. case 2:
  319. case 3:
  320. /*boxcontent[0] &= ~(BIT(7));*/
  321. memcpy((u8 *)(boxcontent) + 1,
  322. cmd_b + buf_index, cmd_len);
  323. for (idx = 0; idx < 4; idx++) {
  324. rtl_write_byte(rtlpriv, box_reg + idx,
  325. boxcontent[idx]);
  326. }
  327. break;
  328. case 4:
  329. case 5:
  330. case 6:
  331. case 7:
  332. /*boxcontent[0] |= (BIT(7));*/
  333. memcpy((u8 *)(boxextcontent),
  334. cmd_b + buf_index+3, cmd_len-3);
  335. memcpy((u8 *)(boxcontent) + 1,
  336. cmd_b + buf_index, 3);
  337. for (idx = 0; idx < 2; idx++) {
  338. rtl_write_byte(rtlpriv, box_extreg + idx,
  339. boxextcontent[idx]);
  340. }
  341. for (idx = 0; idx < 4; idx++) {
  342. rtl_write_byte(rtlpriv, box_reg + idx,
  343. boxcontent[idx]);
  344. }
  345. break;
  346. default:
  347. RT_TRACE(rtlpriv, COMP_ERR, DBG_LOUD,
  348. "switch case not process\n");
  349. break;
  350. }
  351. write_sucess = true;
  352. rtlhal->last_hmeboxnum = boxnum + 1;
  353. if (rtlhal->last_hmeboxnum == 4)
  354. rtlhal->last_hmeboxnum = 0;
  355. RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD,
  356. "pHalData->last_hmeboxnum = %d\n",
  357. rtlhal->last_hmeboxnum);
  358. }
  359. spin_lock_irqsave(&rtlpriv->locks.h2c_lock, flag);
  360. rtlhal->h2c_setinprogress = false;
  361. spin_unlock_irqrestore(&rtlpriv->locks.h2c_lock, flag);
  362. RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD, "go out\n");
  363. }
  364. void rtl88e_fill_h2c_cmd(struct ieee80211_hw *hw,
  365. u8 element_id, u32 cmd_len, u8 *cmdbuffer)
  366. {
  367. struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
  368. u32 tmp_cmdbuf[2];
  369. if (!rtlhal->fw_ready) {
  370. RT_ASSERT(false,
  371. "return H2C cmd because of Fw download fail!!!\n");
  372. return;
  373. }
  374. memset(tmp_cmdbuf, 0, 8);
  375. memcpy(tmp_cmdbuf, cmdbuffer, cmd_len);
  376. _rtl88e_fill_h2c_command(hw, element_id, cmd_len, (u8 *)&tmp_cmdbuf);
  377. return;
  378. }
  379. void rtl88e_firmware_selfreset(struct ieee80211_hw *hw)
  380. {
  381. u8 u1b_tmp;
  382. struct rtl_priv *rtlpriv = rtl_priv(hw);
  383. u1b_tmp = rtl_read_byte(rtlpriv, REG_SYS_FUNC_EN+1);
  384. rtl_write_byte(rtlpriv, REG_SYS_FUNC_EN+1, (u1b_tmp & (~BIT(2))));
  385. rtl_write_byte(rtlpriv, REG_SYS_FUNC_EN+1, (u1b_tmp | BIT(2)));
  386. RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
  387. "8051Reset88E(): 8051 reset success\n");
  388. }
  389. void rtl88e_set_fw_pwrmode_cmd(struct ieee80211_hw *hw, u8 mode)
  390. {
  391. struct rtl_priv *rtlpriv = rtl_priv(hw);
  392. u8 u1_h2c_set_pwrmode[H2C_88E_PWEMODE_LENGTH] = { 0 };
  393. struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
  394. u8 rlbm, power_state = 0;
  395. RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD, "FW LPS mode = %d\n", mode);
  396. SET_H2CCMD_PWRMODE_PARM_MODE(u1_h2c_set_pwrmode, ((mode) ? 1 : 0));
  397. rlbm = 0;/*YJ, temp, 120316. FW now not support RLBM=2.*/
  398. SET_H2CCMD_PWRMODE_PARM_RLBM(u1_h2c_set_pwrmode, rlbm);
  399. SET_H2CCMD_PWRMODE_PARM_SMART_PS(u1_h2c_set_pwrmode,
  400. (rtlpriv->mac80211.p2p) ? ppsc->smart_ps : 1);
  401. SET_H2CCMD_PWRMODE_PARM_AWAKE_INTERVAL(u1_h2c_set_pwrmode,
  402. ppsc->reg_max_lps_awakeintvl);
  403. SET_H2CCMD_PWRMODE_PARM_ALL_QUEUE_UAPSD(u1_h2c_set_pwrmode, 0);
  404. if (mode == FW_PS_ACTIVE_MODE)
  405. power_state |= FW_PWR_STATE_ACTIVE;
  406. else
  407. power_state |= FW_PWR_STATE_RF_OFF;
  408. SET_H2CCMD_PWRMODE_PARM_PWR_STATE(u1_h2c_set_pwrmode, power_state);
  409. RT_PRINT_DATA(rtlpriv, COMP_CMD, DBG_DMESG,
  410. "rtl92c_set_fw_pwrmode(): u1_h2c_set_pwrmode\n",
  411. u1_h2c_set_pwrmode, H2C_88E_PWEMODE_LENGTH);
  412. rtl88e_fill_h2c_cmd(hw, H2C_88E_SETPWRMODE,
  413. H2C_88E_PWEMODE_LENGTH, u1_h2c_set_pwrmode);
  414. }
  415. void rtl88e_set_fw_joinbss_report_cmd(struct ieee80211_hw *hw, u8 mstatus)
  416. {
  417. u8 u1_joinbssrpt_parm[1] = { 0 };
  418. SET_H2CCMD_JOINBSSRPT_PARM_OPMODE(u1_joinbssrpt_parm, mstatus);
  419. rtl88e_fill_h2c_cmd(hw, H2C_88E_JOINBSSRPT, 1, u1_joinbssrpt_parm);
  420. }
  421. void rtl88e_set_fw_ap_off_load_cmd(struct ieee80211_hw *hw,
  422. u8 ap_offload_enable)
  423. {
  424. struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
  425. u8 u1_apoffload_parm[H2C_88E_AP_OFFLOAD_LENGTH] = { 0 };
  426. SET_H2CCMD_AP_OFFLOAD_ON(u1_apoffload_parm, ap_offload_enable);
  427. SET_H2CCMD_AP_OFFLOAD_HIDDEN(u1_apoffload_parm, mac->hiddenssid);
  428. SET_H2CCMD_AP_OFFLOAD_DENYANY(u1_apoffload_parm, 0);
  429. rtl88e_fill_h2c_cmd(hw, H2C_88E_AP_OFFLOAD,
  430. H2C_88E_AP_OFFLOAD_LENGTH, u1_apoffload_parm);
  431. }
  432. #define BEACON_PG 0 /* ->1 */
  433. #define PSPOLL_PG 2
  434. #define NULL_PG 3
  435. #define PROBERSP_PG 4 /* ->5 */
  436. #define TOTAL_RESERVED_PKT_LEN 768
  437. static u8 reserved_page_packet[TOTAL_RESERVED_PKT_LEN] = {
  438. /* page 0 beacon */
  439. 0x80, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF,
  440. 0xFF, 0xFF, 0x00, 0xE0, 0x4C, 0x76, 0x00, 0x42,
  441. 0x00, 0x40, 0x10, 0x10, 0x00, 0x03, 0x50, 0x08,
  442. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  443. 0x64, 0x00, 0x00, 0x04, 0x00, 0x0C, 0x6C, 0x69,
  444. 0x6E, 0x6B, 0x73, 0x79, 0x73, 0x5F, 0x77, 0x6C,
  445. 0x61, 0x6E, 0x01, 0x04, 0x82, 0x84, 0x8B, 0x96,
  446. 0x03, 0x01, 0x01, 0x06, 0x02, 0x00, 0x00, 0x2A,
  447. 0x01, 0x00, 0x32, 0x08, 0x24, 0x30, 0x48, 0x6C,
  448. 0x0C, 0x12, 0x18, 0x60, 0x2D, 0x1A, 0x6C, 0x18,
  449. 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  450. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  451. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  452. 0x3D, 0x00, 0xDD, 0x06, 0x00, 0xE0, 0x4C, 0x02,
  453. 0x01, 0x70, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  454. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  455. /* page 1 beacon */
  456. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  457. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  458. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  459. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  460. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  461. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  462. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  463. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  464. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  465. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  466. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  467. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  468. 0x10, 0x00, 0x20, 0x8C, 0x00, 0x12, 0x10, 0x00,
  469. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  470. 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  471. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  472. /* page 2 ps-poll */
  473. 0xA4, 0x10, 0x01, 0xC0, 0x00, 0x40, 0x10, 0x10,
  474. 0x00, 0x03, 0x00, 0xE0, 0x4C, 0x76, 0x00, 0x42,
  475. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  476. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  477. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  478. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  479. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  480. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  481. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  482. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  483. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  484. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  485. 0x18, 0x00, 0x20, 0x8C, 0x00, 0x12, 0x00, 0x00,
  486. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80,
  487. 0x80, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  488. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  489. /* page 3 null */
  490. 0x48, 0x01, 0x00, 0x00, 0x00, 0x40, 0x10, 0x10,
  491. 0x00, 0x03, 0x00, 0xE0, 0x4C, 0x76, 0x00, 0x42,
  492. 0x00, 0x40, 0x10, 0x10, 0x00, 0x03, 0x00, 0x00,
  493. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  494. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  495. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  496. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  497. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  498. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  499. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  500. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  501. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  502. 0x72, 0x00, 0x20, 0x8C, 0x00, 0x12, 0x00, 0x00,
  503. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80,
  504. 0x80, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  505. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  506. /* page 4 probe_resp */
  507. 0x50, 0x00, 0x00, 0x00, 0x00, 0x40, 0x10, 0x10,
  508. 0x00, 0x03, 0x00, 0xE0, 0x4C, 0x76, 0x00, 0x42,
  509. 0x00, 0x40, 0x10, 0x10, 0x00, 0x03, 0x00, 0x00,
  510. 0x9E, 0x46, 0x15, 0x32, 0x27, 0xF2, 0x2D, 0x00,
  511. 0x64, 0x00, 0x00, 0x04, 0x00, 0x0C, 0x6C, 0x69,
  512. 0x6E, 0x6B, 0x73, 0x79, 0x73, 0x5F, 0x77, 0x6C,
  513. 0x61, 0x6E, 0x01, 0x04, 0x82, 0x84, 0x8B, 0x96,
  514. 0x03, 0x01, 0x01, 0x06, 0x02, 0x00, 0x00, 0x2A,
  515. 0x01, 0x00, 0x32, 0x08, 0x24, 0x30, 0x48, 0x6C,
  516. 0x0C, 0x12, 0x18, 0x60, 0x2D, 0x1A, 0x6C, 0x18,
  517. 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  518. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  519. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  520. 0x3D, 0x00, 0xDD, 0x06, 0x00, 0xE0, 0x4C, 0x02,
  521. 0x01, 0x70, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  522. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  523. /* page 5 probe_resp */
  524. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  525. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  526. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  527. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  528. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  529. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  530. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  531. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  532. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  533. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  534. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  535. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  536. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  537. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  538. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  539. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  540. };
  541. void rtl88e_set_fw_rsvdpagepkt(struct ieee80211_hw *hw, bool b_dl_finished)
  542. {
  543. struct rtl_priv *rtlpriv = rtl_priv(hw);
  544. struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
  545. struct sk_buff *skb = NULL;
  546. u32 totalpacketlen;
  547. bool rtstatus;
  548. u8 u1rsvdpageloc[5] = { 0 };
  549. bool b_dlok = false;
  550. u8 *beacon;
  551. u8 *p_pspoll;
  552. u8 *nullfunc;
  553. u8 *p_probersp;
  554. /*---------------------------------------------------------
  555. * (1) beacon
  556. *---------------------------------------------------------
  557. */
  558. beacon = &reserved_page_packet[BEACON_PG * 128];
  559. SET_80211_HDR_ADDRESS2(beacon, mac->mac_addr);
  560. SET_80211_HDR_ADDRESS3(beacon, mac->bssid);
  561. /*-------------------------------------------------------
  562. * (2) ps-poll
  563. *--------------------------------------------------------
  564. */
  565. p_pspoll = &reserved_page_packet[PSPOLL_PG * 128];
  566. SET_80211_PS_POLL_AID(p_pspoll, (mac->assoc_id | 0xc000));
  567. SET_80211_PS_POLL_BSSID(p_pspoll, mac->bssid);
  568. SET_80211_PS_POLL_TA(p_pspoll, mac->mac_addr);
  569. SET_H2CCMD_RSVDPAGE_LOC_PSPOLL(u1rsvdpageloc, PSPOLL_PG);
  570. /*--------------------------------------------------------
  571. * (3) null data
  572. *---------------------------------------------------------
  573. */
  574. nullfunc = &reserved_page_packet[NULL_PG * 128];
  575. SET_80211_HDR_ADDRESS1(nullfunc, mac->bssid);
  576. SET_80211_HDR_ADDRESS2(nullfunc, mac->mac_addr);
  577. SET_80211_HDR_ADDRESS3(nullfunc, mac->bssid);
  578. SET_H2CCMD_RSVDPAGE_LOC_NULL_DATA(u1rsvdpageloc, NULL_PG);
  579. /*---------------------------------------------------------
  580. * (4) probe response
  581. *----------------------------------------------------------
  582. */
  583. p_probersp = &reserved_page_packet[PROBERSP_PG * 128];
  584. SET_80211_HDR_ADDRESS1(p_probersp, mac->bssid);
  585. SET_80211_HDR_ADDRESS2(p_probersp, mac->mac_addr);
  586. SET_80211_HDR_ADDRESS3(p_probersp, mac->bssid);
  587. SET_H2CCMD_RSVDPAGE_LOC_PROBE_RSP(u1rsvdpageloc, PROBERSP_PG);
  588. totalpacketlen = TOTAL_RESERVED_PKT_LEN;
  589. RT_PRINT_DATA(rtlpriv, COMP_CMD, DBG_LOUD,
  590. "rtl88e_set_fw_rsvdpagepkt(): HW_VAR_SET_TX_CMD: ALL\n",
  591. &reserved_page_packet[0], totalpacketlen);
  592. RT_PRINT_DATA(rtlpriv, COMP_CMD, DBG_DMESG,
  593. "rtl88e_set_fw_rsvdpagepkt(): HW_VAR_SET_TX_CMD: ALL\n",
  594. u1rsvdpageloc, 3);
  595. skb = dev_alloc_skb(totalpacketlen);
  596. memcpy(skb_put(skb, totalpacketlen),
  597. &reserved_page_packet, totalpacketlen);
  598. rtstatus = rtl_cmd_send_packet(hw, skb);
  599. if (rtstatus)
  600. b_dlok = true;
  601. if (b_dlok) {
  602. RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
  603. "Set RSVD page location to Fw.\n");
  604. RT_PRINT_DATA(rtlpriv, COMP_CMD, DBG_DMESG,
  605. "H2C_RSVDPAGE:\n", u1rsvdpageloc, 3);
  606. rtl88e_fill_h2c_cmd(hw, H2C_88E_RSVDPAGE,
  607. sizeof(u1rsvdpageloc), u1rsvdpageloc);
  608. } else
  609. RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
  610. "Set RSVD page location to Fw FAIL!!!!!!.\n");
  611. }
  612. /*Should check FW support p2p or not.*/
  613. static void rtl88e_set_p2p_ctw_period_cmd(struct ieee80211_hw *hw, u8 ctwindow)
  614. {
  615. u8 u1_ctwindow_period[1] = { ctwindow};
  616. rtl88e_fill_h2c_cmd(hw, H2C_88E_P2P_PS_CTW_CMD, 1, u1_ctwindow_period);
  617. }
  618. void rtl88e_set_p2p_ps_offload_cmd(struct ieee80211_hw *hw, u8 p2p_ps_state)
  619. {
  620. struct rtl_priv *rtlpriv = rtl_priv(hw);
  621. struct rtl_ps_ctl *rtlps = rtl_psc(rtl_priv(hw));
  622. struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
  623. struct rtl_p2p_ps_info *p2pinfo = &(rtlps->p2p_ps_info);
  624. struct p2p_ps_offload_t *p2p_ps_offload = &rtlhal->p2p_ps_offload;
  625. u8 i;
  626. u16 ctwindow;
  627. u32 start_time, tsf_low;
  628. switch (p2p_ps_state) {
  629. case P2P_PS_DISABLE:
  630. RT_TRACE(rtlpriv, COMP_FW, DBG_LOUD, "P2P_PS_DISABLE\n");
  631. memset(p2p_ps_offload, 0, sizeof(*p2p_ps_offload));
  632. break;
  633. case P2P_PS_ENABLE:
  634. RT_TRACE(rtlpriv, COMP_FW, DBG_LOUD, "P2P_PS_ENABLE\n");
  635. /* update CTWindow value. */
  636. if (p2pinfo->ctwindow > 0) {
  637. p2p_ps_offload->ctwindow_en = 1;
  638. ctwindow = p2pinfo->ctwindow;
  639. rtl88e_set_p2p_ctw_period_cmd(hw, ctwindow);
  640. }
  641. /* hw only support 2 set of NoA */
  642. for (i = 0 ; i < p2pinfo->noa_num; i++) {
  643. /* To control the register setting for which NOA*/
  644. rtl_write_byte(rtlpriv, 0x5cf, (i << 4));
  645. if (i == 0)
  646. p2p_ps_offload->noa0_en = 1;
  647. else
  648. p2p_ps_offload->noa1_en = 1;
  649. /* config P2P NoA Descriptor Register */
  650. rtl_write_dword(rtlpriv, 0x5E0,
  651. p2pinfo->noa_duration[i]);
  652. rtl_write_dword(rtlpriv, 0x5E4,
  653. p2pinfo->noa_interval[i]);
  654. /*Get Current TSF value */
  655. tsf_low = rtl_read_dword(rtlpriv, REG_TSFTR);
  656. start_time = p2pinfo->noa_start_time[i];
  657. if (p2pinfo->noa_count_type[i] != 1) {
  658. while (start_time <= (tsf_low+(50*1024))) {
  659. start_time += p2pinfo->noa_interval[i];
  660. if (p2pinfo->noa_count_type[i] != 255)
  661. p2pinfo->noa_count_type[i]--;
  662. }
  663. }
  664. rtl_write_dword(rtlpriv, 0x5E8, start_time);
  665. rtl_write_dword(rtlpriv, 0x5EC,
  666. p2pinfo->noa_count_type[i]);
  667. }
  668. if ((p2pinfo->opp_ps == 1) || (p2pinfo->noa_num > 0)) {
  669. /* rst p2p circuit */
  670. rtl_write_byte(rtlpriv, REG_DUAL_TSF_RST, BIT(4));
  671. p2p_ps_offload->offload_en = 1;
  672. if (P2P_ROLE_GO == rtlpriv->mac80211.p2p) {
  673. p2p_ps_offload->role = 1;
  674. p2p_ps_offload->allstasleep = -1;
  675. } else {
  676. p2p_ps_offload->role = 0;
  677. }
  678. p2p_ps_offload->discovery = 0;
  679. }
  680. break;
  681. case P2P_PS_SCAN:
  682. RT_TRACE(rtlpriv, COMP_FW, DBG_LOUD, "P2P_PS_SCAN\n");
  683. p2p_ps_offload->discovery = 1;
  684. break;
  685. case P2P_PS_SCAN_DONE:
  686. RT_TRACE(rtlpriv, COMP_FW, DBG_LOUD, "P2P_PS_SCAN_DONE\n");
  687. p2p_ps_offload->discovery = 0;
  688. p2pinfo->p2p_ps_state = P2P_PS_ENABLE;
  689. break;
  690. default:
  691. break;
  692. }
  693. rtl88e_fill_h2c_cmd(hw, H2C_88E_P2P_PS_OFFLOAD, 1,
  694. (u8 *)p2p_ps_offload);
  695. }