halbtc8192e2ant.c 122 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2012 Realtek Corporation.
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of version 2 of the GNU General Public License as
  7. * published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. *
  14. * The full GNU General Public License is included in this distribution in the
  15. * file called LICENSE.
  16. *
  17. * Contact Information:
  18. * wlanfae <wlanfae@realtek.com>
  19. * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
  20. * Hsinchu 300, Taiwan.
  21. *
  22. * Larry Finger <Larry.Finger@lwfinger.net>
  23. *
  24. *****************************************************************************/
  25. /**************************************************************
  26. * Description:
  27. *
  28. * This file is for RTL8192E Co-exist mechanism
  29. *
  30. * History
  31. * 2012/11/15 Cosa first check in.
  32. *
  33. **************************************************************/
  34. /**************************************************************
  35. * include files
  36. **************************************************************/
  37. #include "halbt_precomp.h"
  38. /**************************************************************
  39. * Global variables, these are static variables
  40. **************************************************************/
  41. static struct coex_dm_8192e_2ant glcoex_dm_8192e_2ant;
  42. static struct coex_dm_8192e_2ant *coex_dm = &glcoex_dm_8192e_2ant;
  43. static struct coex_sta_8192e_2ant glcoex_sta_8192e_2ant;
  44. static struct coex_sta_8192e_2ant *coex_sta = &glcoex_sta_8192e_2ant;
  45. static const char *const GLBtInfoSrc8192e2Ant[] = {
  46. "BT Info[wifi fw]",
  47. "BT Info[bt rsp]",
  48. "BT Info[bt auto report]",
  49. };
  50. static u32 glcoex_ver_date_8192e_2ant = 20130902;
  51. static u32 glcoex_ver_8192e_2ant = 0x34;
  52. /**************************************************************
  53. * local function proto type if needed
  54. **************************************************************/
  55. /**************************************************************
  56. * local function start with halbtc8192e2ant_
  57. **************************************************************/
  58. static u8 halbtc8192e2ant_btrssi_state(u8 level_num, u8 rssi_thresh,
  59. u8 rssi_thresh1)
  60. {
  61. int btrssi = 0;
  62. u8 btrssi_state = coex_sta->pre_bt_rssi_state;
  63. btrssi = coex_sta->bt_rssi;
  64. if (level_num == 2) {
  65. if ((coex_sta->pre_bt_rssi_state == BTC_RSSI_STATE_LOW) ||
  66. (coex_sta->pre_bt_rssi_state == BTC_RSSI_STATE_STAY_LOW)) {
  67. BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE,
  68. "BT Rssi pre state = LOW\n");
  69. if (btrssi >= (rssi_thresh +
  70. BTC_RSSI_COEX_THRESH_TOL_8192E_2ANT)) {
  71. btrssi_state = BTC_RSSI_STATE_HIGH;
  72. BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE,
  73. "BT Rssi state switch to High\n");
  74. } else {
  75. btrssi_state = BTC_RSSI_STATE_STAY_LOW;
  76. BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE,
  77. "BT Rssi state stay at Low\n");
  78. }
  79. } else {
  80. BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE,
  81. "BT Rssi pre state = HIGH\n");
  82. if (btrssi < rssi_thresh) {
  83. btrssi_state = BTC_RSSI_STATE_LOW;
  84. BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE,
  85. "BT Rssi state switch to Low\n");
  86. } else {
  87. btrssi_state = BTC_RSSI_STATE_STAY_HIGH;
  88. BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE,
  89. "BT Rssi state stay at High\n");
  90. }
  91. }
  92. } else if (level_num == 3) {
  93. if (rssi_thresh > rssi_thresh1) {
  94. BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE,
  95. "BT Rssi thresh error!!\n");
  96. return coex_sta->pre_bt_rssi_state;
  97. }
  98. if ((coex_sta->pre_bt_rssi_state == BTC_RSSI_STATE_LOW) ||
  99. (coex_sta->pre_bt_rssi_state == BTC_RSSI_STATE_STAY_LOW)) {
  100. BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE,
  101. "BT Rssi pre state = LOW\n");
  102. if (btrssi >= (rssi_thresh +
  103. BTC_RSSI_COEX_THRESH_TOL_8192E_2ANT)) {
  104. btrssi_state = BTC_RSSI_STATE_MEDIUM;
  105. BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE,
  106. "BT Rssi state switch to Medium\n");
  107. } else {
  108. btrssi_state = BTC_RSSI_STATE_STAY_LOW;
  109. BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE,
  110. "BT Rssi state stay at Low\n");
  111. }
  112. } else if ((coex_sta->pre_bt_rssi_state ==
  113. BTC_RSSI_STATE_MEDIUM) ||
  114. (coex_sta->pre_bt_rssi_state ==
  115. BTC_RSSI_STATE_STAY_MEDIUM)) {
  116. BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE,
  117. "[BTCoex], BT Rssi pre state = MEDIUM\n");
  118. if (btrssi >= (rssi_thresh1 +
  119. BTC_RSSI_COEX_THRESH_TOL_8192E_2ANT)) {
  120. btrssi_state = BTC_RSSI_STATE_HIGH;
  121. BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE,
  122. "BT Rssi state switch to High\n");
  123. } else if (btrssi < rssi_thresh) {
  124. btrssi_state = BTC_RSSI_STATE_LOW;
  125. BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE,
  126. "BT Rssi state switch to Low\n");
  127. } else {
  128. btrssi_state = BTC_RSSI_STATE_STAY_MEDIUM;
  129. BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE,
  130. "BT Rssi state stay at Medium\n");
  131. }
  132. } else {
  133. BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE,
  134. "BT Rssi pre state = HIGH\n");
  135. if (btrssi < rssi_thresh1) {
  136. btrssi_state = BTC_RSSI_STATE_MEDIUM;
  137. BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE,
  138. "BT Rssi state switch to Medium\n");
  139. } else {
  140. btrssi_state = BTC_RSSI_STATE_STAY_HIGH;
  141. BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_RSSI_STATE,
  142. "BT Rssi state stay at High\n");
  143. }
  144. }
  145. }
  146. coex_sta->pre_bt_rssi_state = btrssi_state;
  147. return btrssi_state;
  148. }
  149. static u8 halbtc8192e2ant_wifirssi_state(struct btc_coexist *btcoexist,
  150. u8 index, u8 level_num, u8 rssi_thresh,
  151. u8 rssi_thresh1)
  152. {
  153. int wifirssi = 0;
  154. u8 wifirssi_state = coex_sta->pre_wifi_rssi_state[index];
  155. btcoexist->btc_get(btcoexist, BTC_GET_S4_WIFI_RSSI, &wifirssi);
  156. if (level_num == 2) {
  157. if ((coex_sta->pre_wifi_rssi_state[index] ==
  158. BTC_RSSI_STATE_LOW) ||
  159. (coex_sta->pre_wifi_rssi_state[index] ==
  160. BTC_RSSI_STATE_STAY_LOW)) {
  161. if (wifirssi >= (rssi_thresh +
  162. BTC_RSSI_COEX_THRESH_TOL_8192E_2ANT)) {
  163. wifirssi_state = BTC_RSSI_STATE_HIGH;
  164. BTC_PRINT(BTC_MSG_ALGORITHM,
  165. ALGO_WIFI_RSSI_STATE,
  166. "wifi RSSI state switch to High\n");
  167. } else {
  168. wifirssi_state = BTC_RSSI_STATE_STAY_LOW;
  169. BTC_PRINT(BTC_MSG_ALGORITHM,
  170. ALGO_WIFI_RSSI_STATE,
  171. "wifi RSSI state stay at Low\n");
  172. }
  173. } else {
  174. if (wifirssi < rssi_thresh) {
  175. wifirssi_state = BTC_RSSI_STATE_LOW;
  176. BTC_PRINT(BTC_MSG_ALGORITHM,
  177. ALGO_WIFI_RSSI_STATE,
  178. "wifi RSSI state switch to Low\n");
  179. } else {
  180. wifirssi_state = BTC_RSSI_STATE_STAY_HIGH;
  181. BTC_PRINT(BTC_MSG_ALGORITHM,
  182. ALGO_WIFI_RSSI_STATE,
  183. "wifi RSSI state stay at High\n");
  184. }
  185. }
  186. } else if (level_num == 3) {
  187. if (rssi_thresh > rssi_thresh1) {
  188. BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_WIFI_RSSI_STATE,
  189. "wifi RSSI thresh error!!\n");
  190. return coex_sta->pre_wifi_rssi_state[index];
  191. }
  192. if ((coex_sta->pre_wifi_rssi_state[index] ==
  193. BTC_RSSI_STATE_LOW) ||
  194. (coex_sta->pre_wifi_rssi_state[index] ==
  195. BTC_RSSI_STATE_STAY_LOW)) {
  196. if (wifirssi >= (rssi_thresh +
  197. BTC_RSSI_COEX_THRESH_TOL_8192E_2ANT)) {
  198. wifirssi_state = BTC_RSSI_STATE_MEDIUM;
  199. BTC_PRINT(BTC_MSG_ALGORITHM,
  200. ALGO_WIFI_RSSI_STATE,
  201. "wifi RSSI state switch to Medium\n");
  202. } else {
  203. wifirssi_state = BTC_RSSI_STATE_STAY_LOW;
  204. BTC_PRINT(BTC_MSG_ALGORITHM,
  205. ALGO_WIFI_RSSI_STATE,
  206. "wifi RSSI state stay at Low\n");
  207. }
  208. } else if ((coex_sta->pre_wifi_rssi_state[index] ==
  209. BTC_RSSI_STATE_MEDIUM) ||
  210. (coex_sta->pre_wifi_rssi_state[index] ==
  211. BTC_RSSI_STATE_STAY_MEDIUM)) {
  212. if (wifirssi >= (rssi_thresh1 +
  213. BTC_RSSI_COEX_THRESH_TOL_8192E_2ANT)) {
  214. wifirssi_state = BTC_RSSI_STATE_HIGH;
  215. BTC_PRINT(BTC_MSG_ALGORITHM,
  216. ALGO_WIFI_RSSI_STATE,
  217. "wifi RSSI state switch to High\n");
  218. } else if (wifirssi < rssi_thresh) {
  219. wifirssi_state = BTC_RSSI_STATE_LOW;
  220. BTC_PRINT(BTC_MSG_ALGORITHM,
  221. ALGO_WIFI_RSSI_STATE,
  222. "wifi RSSI state switch to Low\n");
  223. } else {
  224. wifirssi_state = BTC_RSSI_STATE_STAY_MEDIUM;
  225. BTC_PRINT(BTC_MSG_ALGORITHM,
  226. ALGO_WIFI_RSSI_STATE,
  227. "wifi RSSI state stay at Medium\n");
  228. }
  229. } else {
  230. if (wifirssi < rssi_thresh1) {
  231. wifirssi_state = BTC_RSSI_STATE_MEDIUM;
  232. BTC_PRINT(BTC_MSG_ALGORITHM,
  233. ALGO_WIFI_RSSI_STATE,
  234. "wifi RSSI state switch to Medium\n");
  235. } else {
  236. wifirssi_state = BTC_RSSI_STATE_STAY_HIGH;
  237. BTC_PRINT(BTC_MSG_ALGORITHM,
  238. ALGO_WIFI_RSSI_STATE,
  239. "wifi RSSI state stay at High\n");
  240. }
  241. }
  242. }
  243. coex_sta->pre_wifi_rssi_state[index] = wifirssi_state;
  244. return wifirssi_state;
  245. }
  246. static void btc8192e2ant_monitor_bt_enable_dis(struct btc_coexist *btcoexist)
  247. {
  248. static bool pre_bt_disabled;
  249. static u32 bt_disable_cnt;
  250. bool bt_active = true, bt_disabled = false;
  251. /* This function check if bt is disabled */
  252. if (coex_sta->high_priority_tx == 0 &&
  253. coex_sta->high_priority_rx == 0 &&
  254. coex_sta->low_priority_tx == 0 &&
  255. coex_sta->low_priority_rx == 0)
  256. bt_active = false;
  257. if (coex_sta->high_priority_tx == 0xffff &&
  258. coex_sta->high_priority_rx == 0xffff &&
  259. coex_sta->low_priority_tx == 0xffff &&
  260. coex_sta->low_priority_rx == 0xffff)
  261. bt_active = false;
  262. if (bt_active) {
  263. bt_disable_cnt = 0;
  264. bt_disabled = false;
  265. btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_DISABLE,
  266. &bt_disabled);
  267. BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_MONITOR,
  268. "[BTCoex], BT is enabled !!\n");
  269. } else {
  270. bt_disable_cnt++;
  271. BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_MONITOR,
  272. "[BTCoex], bt all counters = 0, %d times!!\n",
  273. bt_disable_cnt);
  274. if (bt_disable_cnt >= 2) {
  275. bt_disabled = true;
  276. btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_DISABLE,
  277. &bt_disabled);
  278. BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_MONITOR,
  279. "[BTCoex], BT is disabled !!\n");
  280. }
  281. }
  282. if (pre_bt_disabled != bt_disabled) {
  283. BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_MONITOR,
  284. "[BTCoex], BT is from %s to %s!!\n",
  285. (pre_bt_disabled ? "disabled" : "enabled"),
  286. (bt_disabled ? "disabled" : "enabled"));
  287. pre_bt_disabled = bt_disabled;
  288. }
  289. }
  290. static u32 halbtc8192e2ant_decidera_mask(struct btc_coexist *btcoexist,
  291. u8 sstype, u32 ra_masktype)
  292. {
  293. u32 disra_mask = 0x0;
  294. switch (ra_masktype) {
  295. case 0: /* normal mode */
  296. if (sstype == 2)
  297. disra_mask = 0x0; /* enable 2ss */
  298. else
  299. disra_mask = 0xfff00000;/* disable 2ss */
  300. break;
  301. case 1: /* disable cck 1/2 */
  302. if (sstype == 2)
  303. disra_mask = 0x00000003;/* enable 2ss */
  304. else
  305. disra_mask = 0xfff00003;/* disable 2ss */
  306. break;
  307. case 2: /* disable cck 1/2/5.5, ofdm 6/9/12/18/24, mcs 0/1/2/3/4 */
  308. if (sstype == 2)
  309. disra_mask = 0x0001f1f7;/* enable 2ss */
  310. else
  311. disra_mask = 0xfff1f1f7;/* disable 2ss */
  312. break;
  313. default:
  314. break;
  315. }
  316. return disra_mask;
  317. }
  318. static void halbtc8192e2ant_Updatera_mask(struct btc_coexist *btcoexist,
  319. bool force_exec, u32 dis_ratemask)
  320. {
  321. coex_dm->curra_mask = dis_ratemask;
  322. if (force_exec || (coex_dm->prera_mask != coex_dm->curra_mask))
  323. btcoexist->btc_set(btcoexist, BTC_SET_ACT_UPDATE_ra_mask,
  324. &coex_dm->curra_mask);
  325. coex_dm->prera_mask = coex_dm->curra_mask;
  326. }
  327. static void btc8192e2ant_autorate_fallback_retry(struct btc_coexist *btcoexist,
  328. bool force_exec, u8 type)
  329. {
  330. bool wifi_under_bmode = false;
  331. coex_dm->cur_arfrtype = type;
  332. if (force_exec || (coex_dm->pre_arfrtype != coex_dm->cur_arfrtype)) {
  333. switch (coex_dm->cur_arfrtype) {
  334. case 0: /* normal mode */
  335. btcoexist->btc_write_4byte(btcoexist, 0x430,
  336. coex_dm->backup_arfr_cnt1);
  337. btcoexist->btc_write_4byte(btcoexist, 0x434,
  338. coex_dm->backup_arfr_cnt2);
  339. break;
  340. case 1:
  341. btcoexist->btc_get(btcoexist,
  342. BTC_GET_BL_WIFI_UNDER_B_MODE,
  343. &wifi_under_bmode);
  344. if (wifi_under_bmode) {
  345. btcoexist->btc_write_4byte(btcoexist, 0x430,
  346. 0x0);
  347. btcoexist->btc_write_4byte(btcoexist, 0x434,
  348. 0x01010101);
  349. } else {
  350. btcoexist->btc_write_4byte(btcoexist, 0x430,
  351. 0x0);
  352. btcoexist->btc_write_4byte(btcoexist, 0x434,
  353. 0x04030201);
  354. }
  355. break;
  356. default:
  357. break;
  358. }
  359. }
  360. coex_dm->pre_arfrtype = coex_dm->cur_arfrtype;
  361. }
  362. static void halbtc8192e2ant_retrylimit(struct btc_coexist *btcoexist,
  363. bool force_exec, u8 type)
  364. {
  365. coex_dm->cur_retrylimit_type = type;
  366. if (force_exec || (coex_dm->pre_retrylimit_type !=
  367. coex_dm->cur_retrylimit_type)) {
  368. switch (coex_dm->cur_retrylimit_type) {
  369. case 0: /* normal mode */
  370. btcoexist->btc_write_2byte(btcoexist, 0x42a,
  371. coex_dm->backup_retrylimit);
  372. break;
  373. case 1: /* retry limit = 8 */
  374. btcoexist->btc_write_2byte(btcoexist, 0x42a,
  375. 0x0808);
  376. break;
  377. default:
  378. break;
  379. }
  380. }
  381. coex_dm->pre_retrylimit_type = coex_dm->cur_retrylimit_type;
  382. }
  383. static void halbtc8192e2ant_ampdu_maxtime(struct btc_coexist *btcoexist,
  384. bool force_exec, u8 type)
  385. {
  386. coex_dm->cur_ampdutime_type = type;
  387. if (force_exec || (coex_dm->pre_ampdutime_type !=
  388. coex_dm->cur_ampdutime_type)) {
  389. switch (coex_dm->cur_ampdutime_type) {
  390. case 0: /* normal mode */
  391. btcoexist->btc_write_1byte(btcoexist, 0x456,
  392. coex_dm->backup_ampdu_maxtime);
  393. break;
  394. case 1: /* AMPDU timw = 0x38 * 32us */
  395. btcoexist->btc_write_1byte(btcoexist, 0x456, 0x38);
  396. break;
  397. default:
  398. break;
  399. }
  400. }
  401. coex_dm->pre_ampdutime_type = coex_dm->cur_ampdutime_type;
  402. }
  403. static void halbtc8192e2ant_limited_tx(struct btc_coexist *btcoexist,
  404. bool force_exec, u8 ra_masktype,
  405. u8 arfr_type, u8 retrylimit_type,
  406. u8 ampdutime_type)
  407. {
  408. u32 disra_mask = 0x0;
  409. coex_dm->curra_masktype = ra_masktype;
  410. disra_mask = halbtc8192e2ant_decidera_mask(btcoexist,
  411. coex_dm->cur_sstype,
  412. ra_masktype);
  413. halbtc8192e2ant_Updatera_mask(btcoexist, force_exec, disra_mask);
  414. btc8192e2ant_autorate_fallback_retry(btcoexist, force_exec, arfr_type);
  415. halbtc8192e2ant_retrylimit(btcoexist, force_exec, retrylimit_type);
  416. halbtc8192e2ant_ampdu_maxtime(btcoexist, force_exec, ampdutime_type);
  417. }
  418. static void halbtc8192e2ant_limited_rx(struct btc_coexist *btcoexist,
  419. bool force_exec, bool rej_ap_agg_pkt,
  420. bool bt_ctrl_agg_buf_size,
  421. u8 agg_buf_size)
  422. {
  423. bool reject_rx_agg = rej_ap_agg_pkt;
  424. bool bt_ctrl_rx_agg_size = bt_ctrl_agg_buf_size;
  425. u8 rx_agg_size = agg_buf_size;
  426. /*********************************************
  427. * Rx Aggregation related setting
  428. *********************************************/
  429. btcoexist->btc_set(btcoexist, BTC_SET_BL_TO_REJ_AP_AGG_PKT,
  430. &reject_rx_agg);
  431. /* decide BT control aggregation buf size or not */
  432. btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_CTRL_AGG_SIZE,
  433. &bt_ctrl_rx_agg_size);
  434. /* aggregation buf size, only work
  435. * when BT control Rx aggregation size.
  436. */
  437. btcoexist->btc_set(btcoexist, BTC_SET_U1_AGG_BUF_SIZE, &rx_agg_size);
  438. /* real update aggregation setting */
  439. btcoexist->btc_set(btcoexist, BTC_SET_ACT_AGGREGATE_CTRL, NULL);
  440. }
  441. static void halbtc8192e2ant_monitor_bt_ctr(struct btc_coexist *btcoexist)
  442. {
  443. u32 reg_hp_txrx, reg_lp_txrx, u32tmp;
  444. u32 reg_hp_tx = 0, reg_hp_rx = 0, reg_lp_tx = 0, reg_lp_rx = 0;
  445. reg_hp_txrx = 0x770;
  446. reg_lp_txrx = 0x774;
  447. u32tmp = btcoexist->btc_read_4byte(btcoexist, reg_hp_txrx);
  448. reg_hp_tx = u32tmp & MASKLWORD;
  449. reg_hp_rx = (u32tmp & MASKHWORD)>>16;
  450. u32tmp = btcoexist->btc_read_4byte(btcoexist, reg_lp_txrx);
  451. reg_lp_tx = u32tmp & MASKLWORD;
  452. reg_lp_rx = (u32tmp & MASKHWORD)>>16;
  453. coex_sta->high_priority_tx = reg_hp_tx;
  454. coex_sta->high_priority_rx = reg_hp_rx;
  455. coex_sta->low_priority_tx = reg_lp_tx;
  456. coex_sta->low_priority_rx = reg_lp_rx;
  457. BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_MONITOR,
  458. "[BTCoex] High Priority Tx/Rx (reg 0x%x) = 0x%x(%d)/0x%x(%d)\n",
  459. reg_hp_txrx, reg_hp_tx, reg_hp_tx, reg_hp_rx, reg_hp_rx);
  460. BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_BT_MONITOR,
  461. "[BTCoex] Low Priority Tx/Rx (reg 0x%x) = 0x%x(%d)/0x%x(%d)\n",
  462. reg_lp_txrx, reg_lp_tx, reg_lp_tx, reg_lp_rx, reg_lp_rx);
  463. /* reset counter */
  464. btcoexist->btc_write_1byte(btcoexist, 0x76e, 0xc);
  465. }
  466. static void halbtc8192e2ant_querybt_info(struct btc_coexist *btcoexist)
  467. {
  468. u8 h2c_parameter[1] = {0};
  469. coex_sta->c2h_bt_info_req_sent = true;
  470. h2c_parameter[0] |= BIT0; /* trigger */
  471. BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_EXEC,
  472. "[BTCoex], Query Bt Info, FW write 0x61 = 0x%x\n",
  473. h2c_parameter[0]);
  474. btcoexist->btc_fill_h2c(btcoexist, 0x61, 1, h2c_parameter);
  475. }
  476. static void halbtc8192e2ant_update_btlink_info(struct btc_coexist *btcoexist)
  477. {
  478. struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
  479. bool bt_hson = false;
  480. btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hson);
  481. bt_link_info->bt_link_exist = coex_sta->bt_link_exist;
  482. bt_link_info->sco_exist = coex_sta->sco_exist;
  483. bt_link_info->a2dp_exist = coex_sta->a2dp_exist;
  484. bt_link_info->pan_exist = coex_sta->pan_exist;
  485. bt_link_info->hid_exist = coex_sta->hid_exist;
  486. /* work around for HS mode. */
  487. if (bt_hson) {
  488. bt_link_info->pan_exist = true;
  489. bt_link_info->bt_link_exist = true;
  490. }
  491. /* check if Sco only */
  492. if (bt_link_info->sco_exist &&
  493. !bt_link_info->a2dp_exist &&
  494. !bt_link_info->pan_exist &&
  495. !bt_link_info->hid_exist)
  496. bt_link_info->sco_only = true;
  497. else
  498. bt_link_info->sco_only = false;
  499. /* check if A2dp only */
  500. if (!bt_link_info->sco_exist &&
  501. bt_link_info->a2dp_exist &&
  502. !bt_link_info->pan_exist &&
  503. !bt_link_info->hid_exist)
  504. bt_link_info->a2dp_only = true;
  505. else
  506. bt_link_info->a2dp_only = false;
  507. /* check if Pan only */
  508. if (!bt_link_info->sco_exist &&
  509. !bt_link_info->a2dp_exist &&
  510. bt_link_info->pan_exist &&
  511. !bt_link_info->hid_exist)
  512. bt_link_info->pan_only = true;
  513. else
  514. bt_link_info->pan_only = false;
  515. /* check if Hid only */
  516. if (!bt_link_info->sco_exist &&
  517. !bt_link_info->a2dp_exist &&
  518. !bt_link_info->pan_exist &&
  519. bt_link_info->hid_exist)
  520. bt_link_info->hid_only = true;
  521. else
  522. bt_link_info->hid_only = false;
  523. }
  524. static u8 halbtc8192e2ant_action_algorithm(struct btc_coexist *btcoexist)
  525. {
  526. struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
  527. struct btc_stack_info *stack_info = &btcoexist->stack_info;
  528. bool bt_hson = false;
  529. u8 algorithm = BT_8192E_2ANT_COEX_ALGO_UNDEFINED;
  530. u8 numdiffprofile = 0;
  531. btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hson);
  532. if (!bt_link_info->bt_link_exist) {
  533. BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
  534. "No BT link exists!!!\n");
  535. return algorithm;
  536. }
  537. if (bt_link_info->sco_exist)
  538. numdiffprofile++;
  539. if (bt_link_info->hid_exist)
  540. numdiffprofile++;
  541. if (bt_link_info->pan_exist)
  542. numdiffprofile++;
  543. if (bt_link_info->a2dp_exist)
  544. numdiffprofile++;
  545. if (numdiffprofile == 1) {
  546. if (bt_link_info->sco_exist) {
  547. BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
  548. "SCO only\n");
  549. algorithm = BT_8192E_2ANT_COEX_ALGO_SCO;
  550. } else {
  551. if (bt_link_info->hid_exist) {
  552. BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
  553. "HID only\n");
  554. algorithm = BT_8192E_2ANT_COEX_ALGO_HID;
  555. } else if (bt_link_info->a2dp_exist) {
  556. BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
  557. "A2DP only\n");
  558. algorithm = BT_8192E_2ANT_COEX_ALGO_A2DP;
  559. } else if (bt_link_info->pan_exist) {
  560. if (bt_hson) {
  561. BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
  562. "PAN(HS) only\n");
  563. algorithm =
  564. BT_8192E_2ANT_COEX_ALGO_PANHS;
  565. } else {
  566. BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
  567. "PAN(EDR) only\n");
  568. algorithm =
  569. BT_8192E_2ANT_COEX_ALGO_PANEDR;
  570. }
  571. }
  572. }
  573. } else if (numdiffprofile == 2) {
  574. if (bt_link_info->sco_exist) {
  575. if (bt_link_info->hid_exist) {
  576. BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
  577. "SCO + HID\n");
  578. algorithm = BT_8192E_2ANT_COEX_ALGO_SCO;
  579. } else if (bt_link_info->a2dp_exist) {
  580. BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
  581. "SCO + A2DP ==> SCO\n");
  582. algorithm = BT_8192E_2ANT_COEX_ALGO_PANEDR_HID;
  583. } else if (bt_link_info->pan_exist) {
  584. if (bt_hson) {
  585. BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
  586. "SCO + PAN(HS)\n");
  587. algorithm = BT_8192E_2ANT_COEX_ALGO_SCO;
  588. } else {
  589. BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
  590. "SCO + PAN(EDR)\n");
  591. algorithm =
  592. BT_8192E_2ANT_COEX_ALGO_SCO_PAN;
  593. }
  594. }
  595. } else {
  596. if (bt_link_info->hid_exist &&
  597. bt_link_info->a2dp_exist) {
  598. if (stack_info->num_of_hid >= 2) {
  599. BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
  600. "HID*2 + A2DP\n");
  601. algorithm =
  602. BT_8192E_2ANT_COEX_ALGO_HID_A2DP_PANEDR;
  603. } else {
  604. BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
  605. "HID + A2DP\n");
  606. algorithm =
  607. BT_8192E_2ANT_COEX_ALGO_HID_A2DP;
  608. }
  609. } else if (bt_link_info->hid_exist &&
  610. bt_link_info->pan_exist) {
  611. if (bt_hson) {
  612. BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
  613. "HID + PAN(HS)\n");
  614. algorithm = BT_8192E_2ANT_COEX_ALGO_HID;
  615. } else {
  616. BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
  617. "HID + PAN(EDR)\n");
  618. algorithm =
  619. BT_8192E_2ANT_COEX_ALGO_PANEDR_HID;
  620. }
  621. } else if (bt_link_info->pan_exist &&
  622. bt_link_info->a2dp_exist) {
  623. if (bt_hson) {
  624. BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
  625. "A2DP + PAN(HS)\n");
  626. algorithm =
  627. BT_8192E_2ANT_COEX_ALGO_A2DP_PANHS;
  628. } else {
  629. BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
  630. "A2DP + PAN(EDR)\n");
  631. algorithm =
  632. BT_8192E_2ANT_COEX_ALGO_PANEDR_A2DP;
  633. }
  634. }
  635. }
  636. } else if (numdiffprofile == 3) {
  637. if (bt_link_info->sco_exist) {
  638. if (bt_link_info->hid_exist &&
  639. bt_link_info->a2dp_exist) {
  640. BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
  641. "SCO + HID + A2DP ==> HID\n");
  642. algorithm = BT_8192E_2ANT_COEX_ALGO_PANEDR_HID;
  643. } else if (bt_link_info->hid_exist &&
  644. bt_link_info->pan_exist) {
  645. if (bt_hson) {
  646. BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
  647. "SCO + HID + PAN(HS)\n");
  648. algorithm = BT_8192E_2ANT_COEX_ALGO_SCO;
  649. } else {
  650. BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
  651. "SCO + HID + PAN(EDR)\n");
  652. algorithm =
  653. BT_8192E_2ANT_COEX_ALGO_SCO_PAN;
  654. }
  655. } else if (bt_link_info->pan_exist &&
  656. bt_link_info->a2dp_exist) {
  657. if (bt_hson) {
  658. BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
  659. "SCO + A2DP + PAN(HS)\n");
  660. algorithm = BT_8192E_2ANT_COEX_ALGO_SCO;
  661. } else {
  662. BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
  663. "SCO + A2DP + PAN(EDR)\n");
  664. algorithm =
  665. BT_8192E_2ANT_COEX_ALGO_PANEDR_HID;
  666. }
  667. }
  668. } else {
  669. if (bt_link_info->hid_exist &&
  670. bt_link_info->pan_exist &&
  671. bt_link_info->a2dp_exist) {
  672. if (bt_hson) {
  673. BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
  674. "HID + A2DP + PAN(HS)\n");
  675. algorithm =
  676. BT_8192E_2ANT_COEX_ALGO_HID_A2DP;
  677. } else {
  678. BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
  679. "HID + A2DP + PAN(EDR)\n");
  680. algorithm =
  681. BT_8192E_2ANT_COEX_ALGO_HID_A2DP_PANEDR;
  682. }
  683. }
  684. }
  685. } else if (numdiffprofile >= 3) {
  686. if (bt_link_info->sco_exist) {
  687. if (bt_link_info->hid_exist &&
  688. bt_link_info->pan_exist &&
  689. bt_link_info->a2dp_exist) {
  690. if (bt_hson) {
  691. BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
  692. "ErrorSCO+HID+A2DP+PAN(HS)\n");
  693. } else {
  694. BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
  695. "SCO+HID+A2DP+PAN(EDR)\n");
  696. algorithm =
  697. BT_8192E_2ANT_COEX_ALGO_PANEDR_HID;
  698. }
  699. }
  700. }
  701. }
  702. return algorithm;
  703. }
  704. static void halbtc8192e2ant_setfw_dac_swinglevel(struct btc_coexist *btcoexist,
  705. u8 dac_swinglvl)
  706. {
  707. u8 h2c_parameter[1] = {0};
  708. /* There are several type of dacswing
  709. * 0x18/ 0x10/ 0xc/ 0x8/ 0x4/ 0x6
  710. */
  711. h2c_parameter[0] = dac_swinglvl;
  712. BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_EXEC,
  713. "[BTCoex], Set Dac Swing Level = 0x%x\n", dac_swinglvl);
  714. BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_EXEC,
  715. "[BTCoex], FW write 0x64 = 0x%x\n", h2c_parameter[0]);
  716. btcoexist->btc_fill_h2c(btcoexist, 0x64, 1, h2c_parameter);
  717. }
  718. static void halbtc8192e2ant_set_fwdec_btpwr(struct btc_coexist *btcoexist,
  719. u8 dec_btpwr_lvl)
  720. {
  721. u8 h2c_parameter[1] = {0};
  722. h2c_parameter[0] = dec_btpwr_lvl;
  723. BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_EXEC,
  724. "[BTCoex] decrease Bt Power level = %d, FW write 0x62 = 0x%x\n",
  725. dec_btpwr_lvl, h2c_parameter[0]);
  726. btcoexist->btc_fill_h2c(btcoexist, 0x62, 1, h2c_parameter);
  727. }
  728. static void halbtc8192e2ant_dec_btpwr(struct btc_coexist *btcoexist,
  729. bool force_exec, u8 dec_btpwr_lvl)
  730. {
  731. BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW,
  732. "[BTCoex], %s Dec BT power level = %d\n",
  733. (force_exec ? "force to" : ""), dec_btpwr_lvl);
  734. coex_dm->cur_dec_bt_pwr = dec_btpwr_lvl;
  735. if (!force_exec) {
  736. BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL,
  737. "[BTCoex], preBtDecPwrLvl=%d, curBtDecPwrLvl=%d\n",
  738. coex_dm->pre_dec_bt_pwr, coex_dm->cur_dec_bt_pwr);
  739. }
  740. halbtc8192e2ant_set_fwdec_btpwr(btcoexist, coex_dm->cur_dec_bt_pwr);
  741. coex_dm->pre_dec_bt_pwr = coex_dm->cur_dec_bt_pwr;
  742. }
  743. static void halbtc8192e2ant_set_bt_autoreport(struct btc_coexist *btcoexist,
  744. bool enable_autoreport)
  745. {
  746. u8 h2c_parameter[1] = {0};
  747. h2c_parameter[0] = 0;
  748. if (enable_autoreport)
  749. h2c_parameter[0] |= BIT0;
  750. BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_EXEC,
  751. "[BTCoex], BT FW auto report : %s, FW write 0x68 = 0x%x\n",
  752. (enable_autoreport ? "Enabled!!" : "Disabled!!"),
  753. h2c_parameter[0]);
  754. btcoexist->btc_fill_h2c(btcoexist, 0x68, 1, h2c_parameter);
  755. }
  756. static void halbtc8192e2ant_bt_autoreport(struct btc_coexist *btcoexist,
  757. bool force_exec,
  758. bool enable_autoreport)
  759. {
  760. BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW,
  761. "[BTCoex], %s BT Auto report = %s\n",
  762. (force_exec ? "force to" : ""),
  763. ((enable_autoreport) ? "Enabled" : "Disabled"));
  764. coex_dm->cur_bt_auto_report = enable_autoreport;
  765. if (!force_exec) {
  766. BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL,
  767. "[BTCoex] bPreBtAutoReport=%d, bCurBtAutoReport=%d\n",
  768. coex_dm->pre_bt_auto_report,
  769. coex_dm->cur_bt_auto_report);
  770. if (coex_dm->pre_bt_auto_report == coex_dm->cur_bt_auto_report)
  771. return;
  772. }
  773. halbtc8192e2ant_set_bt_autoreport(btcoexist,
  774. coex_dm->cur_bt_auto_report);
  775. coex_dm->pre_bt_auto_report = coex_dm->cur_bt_auto_report;
  776. }
  777. static void halbtc8192e2ant_fw_dac_swinglvl(struct btc_coexist *btcoexist,
  778. bool force_exec, u8 fw_dac_swinglvl)
  779. {
  780. BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW,
  781. "[BTCoex], %s set FW Dac Swing level = %d\n",
  782. (force_exec ? "force to" : ""), fw_dac_swinglvl);
  783. coex_dm->cur_fw_dac_swing_lvl = fw_dac_swinglvl;
  784. if (!force_exec) {
  785. BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL,
  786. "[BTCoex] preFwDacSwingLvl=%d, curFwDacSwingLvl=%d\n",
  787. coex_dm->pre_fw_dac_swing_lvl,
  788. coex_dm->cur_fw_dac_swing_lvl);
  789. if (coex_dm->pre_fw_dac_swing_lvl ==
  790. coex_dm->cur_fw_dac_swing_lvl)
  791. return;
  792. }
  793. halbtc8192e2ant_setfw_dac_swinglevel(btcoexist,
  794. coex_dm->cur_fw_dac_swing_lvl);
  795. coex_dm->pre_fw_dac_swing_lvl = coex_dm->cur_fw_dac_swing_lvl;
  796. }
  797. static void btc8192e2ant_set_sw_rf_rx_lpf_corner(struct btc_coexist *btcoexist,
  798. bool rx_rf_shrink_on)
  799. {
  800. if (rx_rf_shrink_on) {
  801. /* Shrink RF Rx LPF corner */
  802. BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC,
  803. "[BTCoex], Shrink RF Rx LPF corner!!\n");
  804. btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1e,
  805. 0xfffff, 0xffffc);
  806. } else {
  807. /* Resume RF Rx LPF corner
  808. * After initialized, we can use coex_dm->btRf0x1eBackup
  809. */
  810. if (btcoexist->initilized) {
  811. BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC,
  812. "[BTCoex], Resume RF Rx LPF corner!!\n");
  813. btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1e,
  814. 0xfffff,
  815. coex_dm->bt_rf0x1e_backup);
  816. }
  817. }
  818. }
  819. static void halbtc8192e2ant_rf_shrink(struct btc_coexist *btcoexist,
  820. bool force_exec, bool rx_rf_shrink_on)
  821. {
  822. BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW,
  823. "[BTCoex], %s turn Rx RF Shrink = %s\n",
  824. (force_exec ? "force to" : ""),
  825. ((rx_rf_shrink_on) ? "ON" : "OFF"));
  826. coex_dm->cur_rf_rx_lpf_shrink = rx_rf_shrink_on;
  827. if (!force_exec) {
  828. BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_DETAIL,
  829. "[BTCoex]bPreRfRxLpfShrink=%d,bCurRfRxLpfShrink=%d\n",
  830. coex_dm->pre_rf_rx_lpf_shrink,
  831. coex_dm->cur_rf_rx_lpf_shrink);
  832. if (coex_dm->pre_rf_rx_lpf_shrink ==
  833. coex_dm->cur_rf_rx_lpf_shrink)
  834. return;
  835. }
  836. btc8192e2ant_set_sw_rf_rx_lpf_corner(btcoexist,
  837. coex_dm->cur_rf_rx_lpf_shrink);
  838. coex_dm->pre_rf_rx_lpf_shrink = coex_dm->cur_rf_rx_lpf_shrink;
  839. }
  840. static void halbtc8192e2ant_set_dac_swingreg(struct btc_coexist *btcoexist,
  841. u32 level)
  842. {
  843. u8 val = (u8)level;
  844. BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC,
  845. "[BTCoex], Write SwDacSwing = 0x%x\n", level);
  846. btcoexist->btc_write_1byte_bitmask(btcoexist, 0x883, 0x3e, val);
  847. }
  848. static void btc8192e2ant_setsw_full_swing(struct btc_coexist *btcoexist,
  849. bool sw_dac_swingon,
  850. u32 sw_dac_swinglvl)
  851. {
  852. if (sw_dac_swingon)
  853. halbtc8192e2ant_set_dac_swingreg(btcoexist, sw_dac_swinglvl);
  854. else
  855. halbtc8192e2ant_set_dac_swingreg(btcoexist, 0x18);
  856. }
  857. static void halbtc8192e2ant_DacSwing(struct btc_coexist *btcoexist,
  858. bool force_exec, bool dac_swingon,
  859. u32 dac_swinglvl)
  860. {
  861. BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW,
  862. "[BTCoex], %s turn DacSwing=%s, dac_swinglvl = 0x%x\n",
  863. (force_exec ? "force to" : ""),
  864. ((dac_swingon) ? "ON" : "OFF"), dac_swinglvl);
  865. coex_dm->cur_dac_swing_on = dac_swingon;
  866. coex_dm->cur_dac_swing_lvl = dac_swinglvl;
  867. if (!force_exec) {
  868. BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_DETAIL,
  869. "[BTCoex], bPreDacSwingOn=%d, preDacSwingLvl = 0x%x, ",
  870. coex_dm->pre_dac_swing_on,
  871. coex_dm->pre_dac_swing_lvl);
  872. BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_DETAIL,
  873. "bCurDacSwingOn=%d, curDacSwingLvl = 0x%x\n",
  874. coex_dm->cur_dac_swing_on,
  875. coex_dm->cur_dac_swing_lvl);
  876. if ((coex_dm->pre_dac_swing_on == coex_dm->cur_dac_swing_on) &&
  877. (coex_dm->pre_dac_swing_lvl == coex_dm->cur_dac_swing_lvl))
  878. return;
  879. }
  880. mdelay(30);
  881. btc8192e2ant_setsw_full_swing(btcoexist, dac_swingon, dac_swinglvl);
  882. coex_dm->pre_dac_swing_on = coex_dm->cur_dac_swing_on;
  883. coex_dm->pre_dac_swing_lvl = coex_dm->cur_dac_swing_lvl;
  884. }
  885. static void halbtc8192e2ant_set_agc_table(struct btc_coexist *btcoexist,
  886. bool agc_table_en)
  887. {
  888. /* BB AGC Gain Table */
  889. if (agc_table_en) {
  890. BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC,
  891. "[BTCoex], BB Agc Table On!\n");
  892. btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x0a1A0001);
  893. btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x091B0001);
  894. btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x081C0001);
  895. btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x071D0001);
  896. btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x061E0001);
  897. btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x051F0001);
  898. } else {
  899. BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC,
  900. "[BTCoex], BB Agc Table Off!\n");
  901. btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xaa1A0001);
  902. btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xa91B0001);
  903. btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xa81C0001);
  904. btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xa71D0001);
  905. btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xa61E0001);
  906. btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xa51F0001);
  907. }
  908. }
  909. static void halbtc8192e2ant_AgcTable(struct btc_coexist *btcoexist,
  910. bool force_exec, bool agc_table_en)
  911. {
  912. BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW,
  913. "[BTCoex], %s %s Agc Table\n",
  914. (force_exec ? "force to" : ""),
  915. ((agc_table_en) ? "Enable" : "Disable"));
  916. coex_dm->cur_agc_table_en = agc_table_en;
  917. if (!force_exec) {
  918. BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_DETAIL,
  919. "[BTCoex], bPreAgcTableEn=%d, bCurAgcTableEn=%d\n",
  920. coex_dm->pre_agc_table_en, coex_dm->cur_agc_table_en);
  921. if (coex_dm->pre_agc_table_en == coex_dm->cur_agc_table_en)
  922. return;
  923. }
  924. halbtc8192e2ant_set_agc_table(btcoexist, agc_table_en);
  925. coex_dm->pre_agc_table_en = coex_dm->cur_agc_table_en;
  926. }
  927. static void halbtc8192e2ant_set_coex_table(struct btc_coexist *btcoexist,
  928. u32 val0x6c0, u32 val0x6c4,
  929. u32 val0x6c8, u8 val0x6cc)
  930. {
  931. BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC,
  932. "[BTCoex], set coex table, set 0x6c0 = 0x%x\n", val0x6c0);
  933. btcoexist->btc_write_4byte(btcoexist, 0x6c0, val0x6c0);
  934. BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC,
  935. "[BTCoex], set coex table, set 0x6c4 = 0x%x\n", val0x6c4);
  936. btcoexist->btc_write_4byte(btcoexist, 0x6c4, val0x6c4);
  937. BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC,
  938. "[BTCoex], set coex table, set 0x6c8 = 0x%x\n", val0x6c8);
  939. btcoexist->btc_write_4byte(btcoexist, 0x6c8, val0x6c8);
  940. BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_EXEC,
  941. "[BTCoex], set coex table, set 0x6cc = 0x%x\n", val0x6cc);
  942. btcoexist->btc_write_1byte(btcoexist, 0x6cc, val0x6cc);
  943. }
  944. static void halbtc8192e2ant_coex_table(struct btc_coexist *btcoexist,
  945. bool force_exec,
  946. u32 val0x6c0, u32 val0x6c4,
  947. u32 val0x6c8, u8 val0x6cc)
  948. {
  949. BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW,
  950. "[BTCoex], %s write Coex Table 0x6c0 = 0x%x, ",
  951. (force_exec ? "force to" : ""), val0x6c0);
  952. BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW,
  953. "0x6c4 = 0x%x, 0x6c8 = 0x%x, 0x6cc = 0x%x\n",
  954. val0x6c4, val0x6c8, val0x6cc);
  955. coex_dm->cur_val0x6c0 = val0x6c0;
  956. coex_dm->cur_val0x6c4 = val0x6c4;
  957. coex_dm->cur_val0x6c8 = val0x6c8;
  958. coex_dm->cur_val0x6cc = val0x6cc;
  959. if (!force_exec) {
  960. BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_DETAIL,
  961. "[BTCoex], preVal0x6c0 = 0x%x, preVal0x6c4 = 0x%x, ",
  962. coex_dm->pre_val0x6c0, coex_dm->pre_val0x6c4);
  963. BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_DETAIL,
  964. "preVal0x6c8 = 0x%x, preVal0x6cc = 0x%x !!\n",
  965. coex_dm->pre_val0x6c8, coex_dm->pre_val0x6cc);
  966. BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_DETAIL,
  967. "[BTCoex], curVal0x6c0 = 0x%x, curVal0x6c4 = 0x%x,\n",
  968. coex_dm->cur_val0x6c0, coex_dm->cur_val0x6c4);
  969. BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_SW_DETAIL,
  970. "curVal0x6c8 = 0x%x, curVal0x6cc = 0x%x !!\n",
  971. coex_dm->cur_val0x6c8, coex_dm->cur_val0x6cc);
  972. if ((coex_dm->pre_val0x6c0 == coex_dm->cur_val0x6c0) &&
  973. (coex_dm->pre_val0x6c4 == coex_dm->cur_val0x6c4) &&
  974. (coex_dm->pre_val0x6c8 == coex_dm->cur_val0x6c8) &&
  975. (coex_dm->pre_val0x6cc == coex_dm->cur_val0x6cc))
  976. return;
  977. }
  978. halbtc8192e2ant_set_coex_table(btcoexist, val0x6c0, val0x6c4,
  979. val0x6c8, val0x6cc);
  980. coex_dm->pre_val0x6c0 = coex_dm->cur_val0x6c0;
  981. coex_dm->pre_val0x6c4 = coex_dm->cur_val0x6c4;
  982. coex_dm->pre_val0x6c8 = coex_dm->cur_val0x6c8;
  983. coex_dm->pre_val0x6cc = coex_dm->cur_val0x6cc;
  984. }
  985. static void btc8192e2ant_coex_tbl_w_type(struct btc_coexist *btcoexist,
  986. bool force_exec, u8 type)
  987. {
  988. switch (type) {
  989. case 0:
  990. halbtc8192e2ant_coex_table(btcoexist, force_exec, 0x55555555,
  991. 0x5a5a5a5a, 0xffffff, 0x3);
  992. break;
  993. case 1:
  994. halbtc8192e2ant_coex_table(btcoexist, force_exec, 0x5a5a5a5a,
  995. 0x5a5a5a5a, 0xffffff, 0x3);
  996. break;
  997. case 2:
  998. halbtc8192e2ant_coex_table(btcoexist, force_exec, 0x55555555,
  999. 0x5ffb5ffb, 0xffffff, 0x3);
  1000. break;
  1001. case 3:
  1002. halbtc8192e2ant_coex_table(btcoexist, force_exec, 0xdfffdfff,
  1003. 0x5fdb5fdb, 0xffffff, 0x3);
  1004. break;
  1005. case 4:
  1006. halbtc8192e2ant_coex_table(btcoexist, force_exec, 0xdfffdfff,
  1007. 0x5ffb5ffb, 0xffffff, 0x3);
  1008. break;
  1009. default:
  1010. break;
  1011. }
  1012. }
  1013. static void halbtc8192e2ant_set_fw_ignore_wlanact(struct btc_coexist *btcoexist,
  1014. bool enable)
  1015. {
  1016. u8 h2c_parameter[1] = {0};
  1017. if (enable)
  1018. h2c_parameter[0] |= BIT0; /* function enable */
  1019. BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_EXEC,
  1020. "[BTCoex]set FW for BT Ignore Wlan_Act, FW write 0x63 = 0x%x\n",
  1021. h2c_parameter[0]);
  1022. btcoexist->btc_fill_h2c(btcoexist, 0x63, 1, h2c_parameter);
  1023. }
  1024. static void halbtc8192e2ant_IgnoreWlanAct(struct btc_coexist *btcoexist,
  1025. bool force_exec, bool enable)
  1026. {
  1027. BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW,
  1028. "[BTCoex], %s turn Ignore WlanAct %s\n",
  1029. (force_exec ? "force to" : ""), (enable ? "ON" : "OFF"));
  1030. coex_dm->cur_ignore_wlan_act = enable;
  1031. if (!force_exec) {
  1032. BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL,
  1033. "[BTCoex], bPreIgnoreWlanAct = %d ",
  1034. coex_dm->pre_ignore_wlan_act);
  1035. BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL,
  1036. "bCurIgnoreWlanAct = %d!!\n",
  1037. coex_dm->cur_ignore_wlan_act);
  1038. if (coex_dm->pre_ignore_wlan_act ==
  1039. coex_dm->cur_ignore_wlan_act)
  1040. return;
  1041. }
  1042. halbtc8192e2ant_set_fw_ignore_wlanact(btcoexist, enable);
  1043. coex_dm->pre_ignore_wlan_act = coex_dm->cur_ignore_wlan_act;
  1044. }
  1045. static void halbtc8192e2ant_SetFwPstdma(struct btc_coexist *btcoexist, u8 byte1,
  1046. u8 byte2, u8 byte3, u8 byte4, u8 byte5)
  1047. {
  1048. u8 h2c_parameter[5] = {0};
  1049. h2c_parameter[0] = byte1;
  1050. h2c_parameter[1] = byte2;
  1051. h2c_parameter[2] = byte3;
  1052. h2c_parameter[3] = byte4;
  1053. h2c_parameter[4] = byte5;
  1054. coex_dm->ps_tdma_para[0] = byte1;
  1055. coex_dm->ps_tdma_para[1] = byte2;
  1056. coex_dm->ps_tdma_para[2] = byte3;
  1057. coex_dm->ps_tdma_para[3] = byte4;
  1058. coex_dm->ps_tdma_para[4] = byte5;
  1059. BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_EXEC,
  1060. "[BTCoex], FW write 0x60(5bytes) = 0x%x%08x\n",
  1061. h2c_parameter[0],
  1062. h2c_parameter[1] << 24 | h2c_parameter[2] << 16 |
  1063. h2c_parameter[3] << 8 | h2c_parameter[4]);
  1064. btcoexist->btc_fill_h2c(btcoexist, 0x60, 5, h2c_parameter);
  1065. }
  1066. static void btc8192e2ant_sw_mec1(struct btc_coexist *btcoexist,
  1067. bool shrink_rx_lpf, bool low_penalty_ra,
  1068. bool limited_dig, bool btlan_constrain)
  1069. {
  1070. halbtc8192e2ant_rf_shrink(btcoexist, NORMAL_EXEC, shrink_rx_lpf);
  1071. }
  1072. static void btc8192e2ant_sw_mec2(struct btc_coexist *btcoexist,
  1073. bool agc_table_shift, bool adc_backoff,
  1074. bool sw_dac_swing, u32 dac_swinglvl)
  1075. {
  1076. halbtc8192e2ant_AgcTable(btcoexist, NORMAL_EXEC, agc_table_shift);
  1077. halbtc8192e2ant_DacSwing(btcoexist, NORMAL_EXEC, sw_dac_swing,
  1078. dac_swinglvl);
  1079. }
  1080. static void halbtc8192e2ant_ps_tdma(struct btc_coexist *btcoexist,
  1081. bool force_exec, bool turn_on, u8 type)
  1082. {
  1083. BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW,
  1084. "[BTCoex], %s turn %s PS TDMA, type=%d\n",
  1085. (force_exec ? "force to" : ""),
  1086. (turn_on ? "ON" : "OFF"), type);
  1087. coex_dm->cur_ps_tdma_on = turn_on;
  1088. coex_dm->cur_ps_tdma = type;
  1089. if (!force_exec) {
  1090. BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL,
  1091. "[BTCoex], bPrePsTdmaOn = %d, bCurPsTdmaOn = %d!!\n",
  1092. coex_dm->pre_ps_tdma_on, coex_dm->cur_ps_tdma_on);
  1093. BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL,
  1094. "[BTCoex], prePsTdma = %d, curPsTdma = %d!!\n",
  1095. coex_dm->pre_ps_tdma, coex_dm->cur_ps_tdma);
  1096. if ((coex_dm->pre_ps_tdma_on == coex_dm->cur_ps_tdma_on) &&
  1097. (coex_dm->pre_ps_tdma == coex_dm->cur_ps_tdma))
  1098. return;
  1099. }
  1100. if (turn_on) {
  1101. switch (type) {
  1102. case 1:
  1103. default:
  1104. halbtc8192e2ant_SetFwPstdma(btcoexist, 0xe3, 0x1a,
  1105. 0x1a, 0xe1, 0x90);
  1106. break;
  1107. case 2:
  1108. halbtc8192e2ant_SetFwPstdma(btcoexist, 0xe3, 0x12,
  1109. 0x12, 0xe1, 0x90);
  1110. break;
  1111. case 3:
  1112. halbtc8192e2ant_SetFwPstdma(btcoexist, 0xe3, 0x1c,
  1113. 0x3, 0xf1, 0x90);
  1114. break;
  1115. case 4:
  1116. halbtc8192e2ant_SetFwPstdma(btcoexist, 0xe3, 0x10,
  1117. 0x3, 0xf1, 0x90);
  1118. break;
  1119. case 5:
  1120. halbtc8192e2ant_SetFwPstdma(btcoexist, 0xe3, 0x1a,
  1121. 0x1a, 0x60, 0x90);
  1122. break;
  1123. case 6:
  1124. halbtc8192e2ant_SetFwPstdma(btcoexist, 0xe3, 0x12,
  1125. 0x12, 0x60, 0x90);
  1126. break;
  1127. case 7:
  1128. halbtc8192e2ant_SetFwPstdma(btcoexist, 0xe3, 0x1c,
  1129. 0x3, 0x70, 0x90);
  1130. break;
  1131. case 8:
  1132. halbtc8192e2ant_SetFwPstdma(btcoexist, 0xa3, 0x10,
  1133. 0x3, 0x70, 0x90);
  1134. break;
  1135. case 9:
  1136. halbtc8192e2ant_SetFwPstdma(btcoexist, 0xe3, 0x1a,
  1137. 0x1a, 0xe1, 0x10);
  1138. break;
  1139. case 10:
  1140. halbtc8192e2ant_SetFwPstdma(btcoexist, 0xe3, 0x12,
  1141. 0x12, 0xe1, 0x10);
  1142. break;
  1143. case 11:
  1144. halbtc8192e2ant_SetFwPstdma(btcoexist, 0xe3, 0x1c,
  1145. 0x3, 0xf1, 0x10);
  1146. break;
  1147. case 12:
  1148. halbtc8192e2ant_SetFwPstdma(btcoexist, 0xe3, 0x10,
  1149. 0x3, 0xf1, 0x10);
  1150. break;
  1151. case 13:
  1152. halbtc8192e2ant_SetFwPstdma(btcoexist, 0xe3, 0x1a,
  1153. 0x1a, 0xe0, 0x10);
  1154. break;
  1155. case 14:
  1156. halbtc8192e2ant_SetFwPstdma(btcoexist, 0xe3, 0x12,
  1157. 0x12, 0xe0, 0x10);
  1158. break;
  1159. case 15:
  1160. halbtc8192e2ant_SetFwPstdma(btcoexist, 0xe3, 0x1c,
  1161. 0x3, 0xf0, 0x10);
  1162. break;
  1163. case 16:
  1164. halbtc8192e2ant_SetFwPstdma(btcoexist, 0xe3, 0x12,
  1165. 0x3, 0xf0, 0x10);
  1166. break;
  1167. case 17:
  1168. halbtc8192e2ant_SetFwPstdma(btcoexist, 0x61, 0x20,
  1169. 0x03, 0x10, 0x10);
  1170. break;
  1171. case 18:
  1172. halbtc8192e2ant_SetFwPstdma(btcoexist, 0xe3, 0x5,
  1173. 0x5, 0xe1, 0x90);
  1174. break;
  1175. case 19:
  1176. halbtc8192e2ant_SetFwPstdma(btcoexist, 0xe3, 0x25,
  1177. 0x25, 0xe1, 0x90);
  1178. break;
  1179. case 20:
  1180. halbtc8192e2ant_SetFwPstdma(btcoexist, 0xe3, 0x25,
  1181. 0x25, 0x60, 0x90);
  1182. break;
  1183. case 21:
  1184. halbtc8192e2ant_SetFwPstdma(btcoexist, 0xe3, 0x15,
  1185. 0x03, 0x70, 0x90);
  1186. break;
  1187. case 71:
  1188. halbtc8192e2ant_SetFwPstdma(btcoexist, 0xe3, 0x1a,
  1189. 0x1a, 0xe1, 0x90);
  1190. break;
  1191. }
  1192. } else {
  1193. /* disable PS tdma */
  1194. switch (type) {
  1195. default:
  1196. case 0:
  1197. halbtc8192e2ant_SetFwPstdma(btcoexist, 0x8, 0x0, 0x0,
  1198. 0x0, 0x0);
  1199. btcoexist->btc_write_1byte(btcoexist, 0x92c, 0x4);
  1200. break;
  1201. case 1:
  1202. halbtc8192e2ant_SetFwPstdma(btcoexist, 0x0, 0x0, 0x0,
  1203. 0x8, 0x0);
  1204. mdelay(5);
  1205. btcoexist->btc_write_1byte(btcoexist, 0x92c, 0x20);
  1206. break;
  1207. }
  1208. }
  1209. /* update pre state */
  1210. coex_dm->pre_ps_tdma_on = coex_dm->cur_ps_tdma_on;
  1211. coex_dm->pre_ps_tdma = coex_dm->cur_ps_tdma;
  1212. }
  1213. static void halbtc8192e2ant_set_switch_sstype(struct btc_coexist *btcoexist,
  1214. u8 sstype)
  1215. {
  1216. u8 mimops = BTC_MIMO_PS_DYNAMIC;
  1217. u32 disra_mask = 0x0;
  1218. BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
  1219. "[BTCoex], REAL set SS Type = %d\n", sstype);
  1220. disra_mask = halbtc8192e2ant_decidera_mask(btcoexist, sstype,
  1221. coex_dm->curra_masktype);
  1222. halbtc8192e2ant_Updatera_mask(btcoexist, FORCE_EXEC, disra_mask);
  1223. if (sstype == 1) {
  1224. halbtc8192e2ant_ps_tdma(btcoexist, FORCE_EXEC, false, 1);
  1225. /* switch ofdm path */
  1226. btcoexist->btc_write_1byte(btcoexist, 0xc04, 0x11);
  1227. btcoexist->btc_write_1byte(btcoexist, 0xd04, 0x1);
  1228. btcoexist->btc_write_4byte(btcoexist, 0x90c, 0x81111111);
  1229. /* switch cck patch */
  1230. btcoexist->btc_write_1byte_bitmask(btcoexist, 0xe77, 0x4, 0x1);
  1231. btcoexist->btc_write_1byte(btcoexist, 0xa07, 0x81);
  1232. mimops = BTC_MIMO_PS_STATIC;
  1233. } else if (sstype == 2) {
  1234. halbtc8192e2ant_ps_tdma(btcoexist, FORCE_EXEC, false, 0);
  1235. btcoexist->btc_write_1byte(btcoexist, 0xc04, 0x33);
  1236. btcoexist->btc_write_1byte(btcoexist, 0xd04, 0x3);
  1237. btcoexist->btc_write_4byte(btcoexist, 0x90c, 0x81121313);
  1238. btcoexist->btc_write_1byte_bitmask(btcoexist, 0xe77, 0x4, 0x0);
  1239. btcoexist->btc_write_1byte(btcoexist, 0xa07, 0x41);
  1240. mimops = BTC_MIMO_PS_DYNAMIC;
  1241. }
  1242. /* set rx 1ss or 2ss */
  1243. btcoexist->btc_set(btcoexist, BTC_SET_ACT_SEND_MIMO_PS, &mimops);
  1244. }
  1245. static void halbtc8192e2ant_switch_sstype(struct btc_coexist *btcoexist,
  1246. bool force_exec, u8 new_sstype)
  1247. {
  1248. BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
  1249. "[BTCoex], %s Switch SS Type = %d\n",
  1250. (force_exec ? "force to" : ""), new_sstype);
  1251. coex_dm->cur_sstype = new_sstype;
  1252. if (!force_exec) {
  1253. if (coex_dm->pre_sstype == coex_dm->cur_sstype)
  1254. return;
  1255. }
  1256. halbtc8192e2ant_set_switch_sstype(btcoexist, coex_dm->cur_sstype);
  1257. coex_dm->pre_sstype = coex_dm->cur_sstype;
  1258. }
  1259. static void halbtc8192e2ant_coex_alloff(struct btc_coexist *btcoexist)
  1260. {
  1261. /* fw all off */
  1262. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1);
  1263. halbtc8192e2ant_fw_dac_swinglvl(btcoexist, NORMAL_EXEC, 6);
  1264. halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 0);
  1265. /* sw all off */
  1266. btc8192e2ant_sw_mec1(btcoexist, false, false, false, false);
  1267. btc8192e2ant_sw_mec2(btcoexist, false, false, false, 0x18);
  1268. /* hw all off */
  1269. btc8192e2ant_coex_tbl_w_type(btcoexist, NORMAL_EXEC, 0);
  1270. }
  1271. static void halbtc8192e2ant_init_coex_dm(struct btc_coexist *btcoexist)
  1272. {
  1273. /* force to reset coex mechanism */
  1274. halbtc8192e2ant_ps_tdma(btcoexist, FORCE_EXEC, false, 1);
  1275. halbtc8192e2ant_fw_dac_swinglvl(btcoexist, FORCE_EXEC, 6);
  1276. halbtc8192e2ant_dec_btpwr(btcoexist, FORCE_EXEC, 0);
  1277. btc8192e2ant_coex_tbl_w_type(btcoexist, FORCE_EXEC, 0);
  1278. halbtc8192e2ant_switch_sstype(btcoexist, FORCE_EXEC, 2);
  1279. btc8192e2ant_sw_mec1(btcoexist, false, false, false, false);
  1280. btc8192e2ant_sw_mec2(btcoexist, false, false, false, 0x18);
  1281. }
  1282. static void halbtc8192e2ant_action_bt_inquiry(struct btc_coexist *btcoexist)
  1283. {
  1284. bool low_pwr_disable = true;
  1285. btcoexist->btc_set(btcoexist, BTC_SET_ACT_DISABLE_LOW_POWER,
  1286. &low_pwr_disable);
  1287. halbtc8192e2ant_switch_sstype(btcoexist, NORMAL_EXEC, 1);
  1288. btc8192e2ant_coex_tbl_w_type(btcoexist, NORMAL_EXEC, 2);
  1289. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 3);
  1290. halbtc8192e2ant_fw_dac_swinglvl(btcoexist, NORMAL_EXEC, 6);
  1291. halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 0);
  1292. btc8192e2ant_sw_mec1(btcoexist, false, false, false, false);
  1293. btc8192e2ant_sw_mec2(btcoexist, false, false, false, 0x18);
  1294. }
  1295. static bool halbtc8192e2ant_is_common_action(struct btc_coexist *btcoexist)
  1296. {
  1297. struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
  1298. bool common = false, wifi_connected = false, wifi_busy = false;
  1299. bool bt_hson = false, low_pwr_disable = false;
  1300. btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hson);
  1301. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED,
  1302. &wifi_connected);
  1303. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
  1304. if (bt_link_info->sco_exist || bt_link_info->hid_exist)
  1305. halbtc8192e2ant_limited_tx(btcoexist, NORMAL_EXEC, 1, 0, 0, 0);
  1306. else
  1307. halbtc8192e2ant_limited_tx(btcoexist, NORMAL_EXEC, 0, 0, 0, 0);
  1308. if (!wifi_connected) {
  1309. low_pwr_disable = false;
  1310. btcoexist->btc_set(btcoexist, BTC_SET_ACT_DISABLE_LOW_POWER,
  1311. &low_pwr_disable);
  1312. BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
  1313. "[BTCoex], Wifi non-connected idle!!\n");
  1314. if ((BT_8192E_2ANT_BT_STATUS_NON_CONNECTED_IDLE ==
  1315. coex_dm->bt_status) ||
  1316. (BT_8192E_2ANT_BT_STATUS_CONNECTED_IDLE ==
  1317. coex_dm->bt_status)) {
  1318. halbtc8192e2ant_switch_sstype(btcoexist,
  1319. NORMAL_EXEC, 2);
  1320. btc8192e2ant_coex_tbl_w_type(btcoexist,
  1321. NORMAL_EXEC, 1);
  1322. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  1323. false, 0);
  1324. } else {
  1325. halbtc8192e2ant_switch_sstype(btcoexist,
  1326. NORMAL_EXEC, 1);
  1327. btc8192e2ant_coex_tbl_w_type(btcoexist,
  1328. NORMAL_EXEC, 0);
  1329. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  1330. false, 1);
  1331. }
  1332. halbtc8192e2ant_fw_dac_swinglvl(btcoexist, NORMAL_EXEC, 6);
  1333. halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 0);
  1334. btc8192e2ant_sw_mec1(btcoexist, false, false, false, false);
  1335. btc8192e2ant_sw_mec2(btcoexist, false, false, false, 0x18);
  1336. common = true;
  1337. } else {
  1338. if (BT_8192E_2ANT_BT_STATUS_NON_CONNECTED_IDLE ==
  1339. coex_dm->bt_status) {
  1340. low_pwr_disable = false;
  1341. btcoexist->btc_set(btcoexist,
  1342. BTC_SET_ACT_DISABLE_LOW_POWER,
  1343. &low_pwr_disable);
  1344. BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
  1345. "Wifi connected + BT non connected-idle!!\n");
  1346. halbtc8192e2ant_switch_sstype(btcoexist,
  1347. NORMAL_EXEC, 2);
  1348. btc8192e2ant_coex_tbl_w_type(btcoexist,
  1349. NORMAL_EXEC, 1);
  1350. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  1351. false, 0);
  1352. halbtc8192e2ant_fw_dac_swinglvl(btcoexist,
  1353. NORMAL_EXEC, 6);
  1354. halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 0);
  1355. btc8192e2ant_sw_mec1(btcoexist, false, false,
  1356. false, false);
  1357. btc8192e2ant_sw_mec2(btcoexist, false, false,
  1358. false, 0x18);
  1359. common = true;
  1360. } else if (BT_8192E_2ANT_BT_STATUS_CONNECTED_IDLE ==
  1361. coex_dm->bt_status) {
  1362. low_pwr_disable = true;
  1363. btcoexist->btc_set(btcoexist,
  1364. BTC_SET_ACT_DISABLE_LOW_POWER,
  1365. &low_pwr_disable);
  1366. if (bt_hson)
  1367. return false;
  1368. BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
  1369. "Wifi connected + BT connected-idle!!\n");
  1370. halbtc8192e2ant_switch_sstype(btcoexist,
  1371. NORMAL_EXEC, 2);
  1372. btc8192e2ant_coex_tbl_w_type(btcoexist,
  1373. NORMAL_EXEC, 1);
  1374. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  1375. false, 0);
  1376. halbtc8192e2ant_fw_dac_swinglvl(btcoexist,
  1377. NORMAL_EXEC, 6);
  1378. halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 0);
  1379. btc8192e2ant_sw_mec1(btcoexist, true, false,
  1380. false, false);
  1381. btc8192e2ant_sw_mec2(btcoexist, false, false,
  1382. false, 0x18);
  1383. common = true;
  1384. } else {
  1385. low_pwr_disable = true;
  1386. btcoexist->btc_set(btcoexist,
  1387. BTC_SET_ACT_DISABLE_LOW_POWER,
  1388. &low_pwr_disable);
  1389. if (wifi_busy) {
  1390. BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
  1391. "Wifi Connected-Busy + BT Busy!!\n");
  1392. common = false;
  1393. } else {
  1394. BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
  1395. "Wifi Connected-Idle + BT Busy!!\n");
  1396. halbtc8192e2ant_switch_sstype(btcoexist,
  1397. NORMAL_EXEC, 1);
  1398. btc8192e2ant_coex_tbl_w_type(btcoexist,
  1399. NORMAL_EXEC, 2);
  1400. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  1401. true, 21);
  1402. halbtc8192e2ant_fw_dac_swinglvl(btcoexist,
  1403. NORMAL_EXEC, 6);
  1404. halbtc8192e2ant_dec_btpwr(btcoexist,
  1405. NORMAL_EXEC, 0);
  1406. btc8192e2ant_sw_mec1(btcoexist, false,
  1407. false, false, false);
  1408. btc8192e2ant_sw_mec2(btcoexist, false,
  1409. false, false, 0x18);
  1410. common = true;
  1411. }
  1412. }
  1413. }
  1414. return common;
  1415. }
  1416. static void btc8192e_int1(struct btc_coexist *btcoexist, bool tx_pause,
  1417. int result)
  1418. {
  1419. if (tx_pause) {
  1420. BTC_PRINT(BTC_MSG_ALGORITHM,
  1421. ALGO_TRACE_FW_DETAIL,
  1422. "[BTCoex], TxPause = 1\n");
  1423. if (coex_dm->cur_ps_tdma == 71) {
  1424. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  1425. true, 5);
  1426. coex_dm->tdma_adj_type = 5;
  1427. } else if (coex_dm->cur_ps_tdma == 1) {
  1428. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  1429. true, 5);
  1430. coex_dm->tdma_adj_type = 5;
  1431. } else if (coex_dm->cur_ps_tdma == 2) {
  1432. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  1433. true, 6);
  1434. coex_dm->tdma_adj_type = 6;
  1435. } else if (coex_dm->cur_ps_tdma == 3) {
  1436. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  1437. true, 7);
  1438. coex_dm->tdma_adj_type = 7;
  1439. } else if (coex_dm->cur_ps_tdma == 4) {
  1440. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  1441. true, 8);
  1442. coex_dm->tdma_adj_type = 8;
  1443. }
  1444. if (coex_dm->cur_ps_tdma == 9) {
  1445. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  1446. true, 13);
  1447. coex_dm->tdma_adj_type = 13;
  1448. } else if (coex_dm->cur_ps_tdma == 10) {
  1449. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  1450. true, 14);
  1451. coex_dm->tdma_adj_type = 14;
  1452. } else if (coex_dm->cur_ps_tdma == 11) {
  1453. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  1454. true, 15);
  1455. coex_dm->tdma_adj_type = 15;
  1456. } else if (coex_dm->cur_ps_tdma == 12) {
  1457. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  1458. true, 16);
  1459. coex_dm->tdma_adj_type = 16;
  1460. }
  1461. if (result == -1) {
  1462. if (coex_dm->cur_ps_tdma == 5) {
  1463. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  1464. true, 6);
  1465. coex_dm->tdma_adj_type = 6;
  1466. } else if (coex_dm->cur_ps_tdma == 6) {
  1467. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  1468. true, 7);
  1469. coex_dm->tdma_adj_type = 7;
  1470. } else if (coex_dm->cur_ps_tdma == 7) {
  1471. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  1472. true, 8);
  1473. coex_dm->tdma_adj_type = 8;
  1474. } else if (coex_dm->cur_ps_tdma == 13) {
  1475. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  1476. true, 14);
  1477. coex_dm->tdma_adj_type = 14;
  1478. } else if (coex_dm->cur_ps_tdma == 14) {
  1479. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  1480. true, 15);
  1481. coex_dm->tdma_adj_type = 15;
  1482. } else if (coex_dm->cur_ps_tdma == 15) {
  1483. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  1484. true, 16);
  1485. coex_dm->tdma_adj_type = 16;
  1486. }
  1487. } else if (result == 1) {
  1488. if (coex_dm->cur_ps_tdma == 8) {
  1489. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  1490. true, 7);
  1491. coex_dm->tdma_adj_type = 7;
  1492. } else if (coex_dm->cur_ps_tdma == 7) {
  1493. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  1494. true, 6);
  1495. coex_dm->tdma_adj_type = 6;
  1496. } else if (coex_dm->cur_ps_tdma == 6) {
  1497. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  1498. true, 5);
  1499. coex_dm->tdma_adj_type = 5;
  1500. } else if (coex_dm->cur_ps_tdma == 16) {
  1501. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  1502. true, 15);
  1503. coex_dm->tdma_adj_type = 15;
  1504. } else if (coex_dm->cur_ps_tdma == 15) {
  1505. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  1506. true, 14);
  1507. coex_dm->tdma_adj_type = 14;
  1508. } else if (coex_dm->cur_ps_tdma == 14) {
  1509. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  1510. true, 13);
  1511. coex_dm->tdma_adj_type = 13;
  1512. }
  1513. }
  1514. } else {
  1515. BTC_PRINT(BTC_MSG_ALGORITHM,
  1516. ALGO_TRACE_FW_DETAIL,
  1517. "[BTCoex], TxPause = 0\n");
  1518. if (coex_dm->cur_ps_tdma == 5) {
  1519. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  1520. true, 71);
  1521. coex_dm->tdma_adj_type = 71;
  1522. } else if (coex_dm->cur_ps_tdma == 6) {
  1523. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  1524. true, 2);
  1525. coex_dm->tdma_adj_type = 2;
  1526. } else if (coex_dm->cur_ps_tdma == 7) {
  1527. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  1528. true, 3);
  1529. coex_dm->tdma_adj_type = 3;
  1530. } else if (coex_dm->cur_ps_tdma == 8) {
  1531. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  1532. true, 4);
  1533. coex_dm->tdma_adj_type = 4;
  1534. }
  1535. if (coex_dm->cur_ps_tdma == 13) {
  1536. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  1537. true, 9);
  1538. coex_dm->tdma_adj_type = 9;
  1539. } else if (coex_dm->cur_ps_tdma == 14) {
  1540. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  1541. true, 10);
  1542. coex_dm->tdma_adj_type = 10;
  1543. } else if (coex_dm->cur_ps_tdma == 15) {
  1544. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  1545. true, 11);
  1546. coex_dm->tdma_adj_type = 11;
  1547. } else if (coex_dm->cur_ps_tdma == 16) {
  1548. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  1549. true, 12);
  1550. coex_dm->tdma_adj_type = 12;
  1551. }
  1552. if (result == -1) {
  1553. if (coex_dm->cur_ps_tdma == 71) {
  1554. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  1555. true, 1);
  1556. coex_dm->tdma_adj_type = 1;
  1557. } else if (coex_dm->cur_ps_tdma == 1) {
  1558. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  1559. true, 2);
  1560. coex_dm->tdma_adj_type = 2;
  1561. } else if (coex_dm->cur_ps_tdma == 2) {
  1562. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  1563. true, 3);
  1564. coex_dm->tdma_adj_type = 3;
  1565. } else if (coex_dm->cur_ps_tdma == 3) {
  1566. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  1567. true, 4);
  1568. coex_dm->tdma_adj_type = 4;
  1569. } else if (coex_dm->cur_ps_tdma == 9) {
  1570. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  1571. true, 10);
  1572. coex_dm->tdma_adj_type = 10;
  1573. } else if (coex_dm->cur_ps_tdma == 10) {
  1574. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  1575. true, 11);
  1576. coex_dm->tdma_adj_type = 11;
  1577. } else if (coex_dm->cur_ps_tdma == 11) {
  1578. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  1579. true, 12);
  1580. coex_dm->tdma_adj_type = 12;
  1581. }
  1582. } else if (result == 1) {
  1583. if (coex_dm->cur_ps_tdma == 4) {
  1584. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  1585. true, 3);
  1586. coex_dm->tdma_adj_type = 3;
  1587. } else if (coex_dm->cur_ps_tdma == 3) {
  1588. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  1589. true, 2);
  1590. coex_dm->tdma_adj_type = 2;
  1591. } else if (coex_dm->cur_ps_tdma == 2) {
  1592. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  1593. true, 1);
  1594. coex_dm->tdma_adj_type = 1;
  1595. } else if (coex_dm->cur_ps_tdma == 1) {
  1596. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  1597. true, 71);
  1598. coex_dm->tdma_adj_type = 71;
  1599. } else if (coex_dm->cur_ps_tdma == 12) {
  1600. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  1601. true, 11);
  1602. coex_dm->tdma_adj_type = 11;
  1603. } else if (coex_dm->cur_ps_tdma == 11) {
  1604. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  1605. true, 10);
  1606. coex_dm->tdma_adj_type = 10;
  1607. } else if (coex_dm->cur_ps_tdma == 10) {
  1608. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  1609. true, 9);
  1610. coex_dm->tdma_adj_type = 9;
  1611. }
  1612. }
  1613. }
  1614. }
  1615. static void btc8192e_int2(struct btc_coexist *btcoexist, bool tx_pause,
  1616. int result)
  1617. {
  1618. if (tx_pause) {
  1619. BTC_PRINT(BTC_MSG_ALGORITHM,
  1620. ALGO_TRACE_FW_DETAIL,
  1621. "[BTCoex], TxPause = 1\n");
  1622. if (coex_dm->cur_ps_tdma == 1) {
  1623. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  1624. true, 6);
  1625. coex_dm->tdma_adj_type = 6;
  1626. } else if (coex_dm->cur_ps_tdma == 2) {
  1627. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  1628. true, 6);
  1629. coex_dm->tdma_adj_type = 6;
  1630. } else if (coex_dm->cur_ps_tdma == 3) {
  1631. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  1632. true, 7);
  1633. coex_dm->tdma_adj_type = 7;
  1634. } else if (coex_dm->cur_ps_tdma == 4) {
  1635. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  1636. true, 8);
  1637. coex_dm->tdma_adj_type = 8;
  1638. }
  1639. if (coex_dm->cur_ps_tdma == 9) {
  1640. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  1641. true, 14);
  1642. coex_dm->tdma_adj_type = 14;
  1643. } else if (coex_dm->cur_ps_tdma == 10) {
  1644. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  1645. true, 14);
  1646. coex_dm->tdma_adj_type = 14;
  1647. } else if (coex_dm->cur_ps_tdma == 11) {
  1648. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  1649. true, 15);
  1650. coex_dm->tdma_adj_type = 15;
  1651. } else if (coex_dm->cur_ps_tdma == 12) {
  1652. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  1653. true, 16);
  1654. coex_dm->tdma_adj_type = 16;
  1655. }
  1656. if (result == -1) {
  1657. if (coex_dm->cur_ps_tdma == 5) {
  1658. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  1659. true, 6);
  1660. coex_dm->tdma_adj_type = 6;
  1661. } else if (coex_dm->cur_ps_tdma == 6) {
  1662. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  1663. true, 7);
  1664. coex_dm->tdma_adj_type = 7;
  1665. } else if (coex_dm->cur_ps_tdma == 7) {
  1666. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  1667. true, 8);
  1668. coex_dm->tdma_adj_type = 8;
  1669. } else if (coex_dm->cur_ps_tdma == 13) {
  1670. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  1671. true, 14);
  1672. coex_dm->tdma_adj_type = 14;
  1673. } else if (coex_dm->cur_ps_tdma == 14) {
  1674. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  1675. true, 15);
  1676. coex_dm->tdma_adj_type = 15;
  1677. } else if (coex_dm->cur_ps_tdma == 15) {
  1678. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  1679. true, 16);
  1680. coex_dm->tdma_adj_type = 16;
  1681. }
  1682. } else if (result == 1) {
  1683. if (coex_dm->cur_ps_tdma == 8) {
  1684. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  1685. true, 7);
  1686. coex_dm->tdma_adj_type = 7;
  1687. } else if (coex_dm->cur_ps_tdma == 7) {
  1688. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  1689. true, 6);
  1690. coex_dm->tdma_adj_type = 6;
  1691. } else if (coex_dm->cur_ps_tdma == 6) {
  1692. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  1693. true, 6);
  1694. coex_dm->tdma_adj_type = 6;
  1695. } else if (coex_dm->cur_ps_tdma == 16) {
  1696. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  1697. true, 15);
  1698. coex_dm->tdma_adj_type = 15;
  1699. } else if (coex_dm->cur_ps_tdma == 15) {
  1700. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  1701. true, 14);
  1702. coex_dm->tdma_adj_type = 14;
  1703. } else if (coex_dm->cur_ps_tdma == 14) {
  1704. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  1705. true, 14);
  1706. coex_dm->tdma_adj_type = 14;
  1707. }
  1708. }
  1709. } else {
  1710. BTC_PRINT(BTC_MSG_ALGORITHM,
  1711. ALGO_TRACE_FW_DETAIL,
  1712. "[BTCoex], TxPause = 0\n");
  1713. if (coex_dm->cur_ps_tdma == 5) {
  1714. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  1715. true, 2);
  1716. coex_dm->tdma_adj_type = 2;
  1717. } else if (coex_dm->cur_ps_tdma == 6) {
  1718. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  1719. true, 2);
  1720. coex_dm->tdma_adj_type = 2;
  1721. } else if (coex_dm->cur_ps_tdma == 7) {
  1722. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  1723. true, 3);
  1724. coex_dm->tdma_adj_type = 3;
  1725. } else if (coex_dm->cur_ps_tdma == 8) {
  1726. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  1727. true, 4);
  1728. coex_dm->tdma_adj_type = 4;
  1729. }
  1730. if (coex_dm->cur_ps_tdma == 13) {
  1731. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  1732. true, 10);
  1733. coex_dm->tdma_adj_type = 10;
  1734. } else if (coex_dm->cur_ps_tdma == 14) {
  1735. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  1736. true, 10);
  1737. coex_dm->tdma_adj_type = 10;
  1738. } else if (coex_dm->cur_ps_tdma == 15) {
  1739. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  1740. true, 11);
  1741. coex_dm->tdma_adj_type = 11;
  1742. } else if (coex_dm->cur_ps_tdma == 16) {
  1743. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  1744. true, 12);
  1745. coex_dm->tdma_adj_type = 12;
  1746. }
  1747. if (result == -1) {
  1748. if (coex_dm->cur_ps_tdma == 1) {
  1749. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  1750. true, 2);
  1751. coex_dm->tdma_adj_type = 2;
  1752. } else if (coex_dm->cur_ps_tdma == 2) {
  1753. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  1754. true, 3);
  1755. coex_dm->tdma_adj_type = 3;
  1756. } else if (coex_dm->cur_ps_tdma == 3) {
  1757. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  1758. true, 4);
  1759. coex_dm->tdma_adj_type = 4;
  1760. } else if (coex_dm->cur_ps_tdma == 9) {
  1761. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  1762. true, 10);
  1763. coex_dm->tdma_adj_type = 10;
  1764. } else if (coex_dm->cur_ps_tdma == 10) {
  1765. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  1766. true, 11);
  1767. coex_dm->tdma_adj_type = 11;
  1768. } else if (coex_dm->cur_ps_tdma == 11) {
  1769. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  1770. true, 12);
  1771. coex_dm->tdma_adj_type = 12;
  1772. }
  1773. } else if (result == 1) {
  1774. if (coex_dm->cur_ps_tdma == 4) {
  1775. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  1776. true, 3);
  1777. coex_dm->tdma_adj_type = 3;
  1778. } else if (coex_dm->cur_ps_tdma == 3) {
  1779. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  1780. true, 2);
  1781. coex_dm->tdma_adj_type = 2;
  1782. } else if (coex_dm->cur_ps_tdma == 2) {
  1783. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  1784. true, 2);
  1785. coex_dm->tdma_adj_type = 2;
  1786. } else if (coex_dm->cur_ps_tdma == 12) {
  1787. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  1788. true, 11);
  1789. coex_dm->tdma_adj_type = 11;
  1790. } else if (coex_dm->cur_ps_tdma == 11) {
  1791. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  1792. true, 10);
  1793. coex_dm->tdma_adj_type = 10;
  1794. } else if (coex_dm->cur_ps_tdma == 10) {
  1795. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  1796. true, 10);
  1797. coex_dm->tdma_adj_type = 10;
  1798. }
  1799. }
  1800. }
  1801. }
  1802. static void btc8192e_int3(struct btc_coexist *btcoexist, bool tx_pause,
  1803. int result)
  1804. {
  1805. if (tx_pause) {
  1806. BTC_PRINT(BTC_MSG_ALGORITHM,
  1807. ALGO_TRACE_FW_DETAIL,
  1808. "[BTCoex], TxPause = 1\n");
  1809. if (coex_dm->cur_ps_tdma == 1) {
  1810. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  1811. true, 7);
  1812. coex_dm->tdma_adj_type = 7;
  1813. } else if (coex_dm->cur_ps_tdma == 2) {
  1814. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  1815. true, 7);
  1816. coex_dm->tdma_adj_type = 7;
  1817. } else if (coex_dm->cur_ps_tdma == 3) {
  1818. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  1819. true, 7);
  1820. coex_dm->tdma_adj_type = 7;
  1821. } else if (coex_dm->cur_ps_tdma == 4) {
  1822. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  1823. true, 8);
  1824. coex_dm->tdma_adj_type = 8;
  1825. }
  1826. if (coex_dm->cur_ps_tdma == 9) {
  1827. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  1828. true, 15);
  1829. coex_dm->tdma_adj_type = 15;
  1830. } else if (coex_dm->cur_ps_tdma == 10) {
  1831. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  1832. true, 15);
  1833. coex_dm->tdma_adj_type = 15;
  1834. } else if (coex_dm->cur_ps_tdma == 11) {
  1835. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  1836. true, 15);
  1837. coex_dm->tdma_adj_type = 15;
  1838. } else if (coex_dm->cur_ps_tdma == 12) {
  1839. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  1840. true, 16);
  1841. coex_dm->tdma_adj_type = 16;
  1842. }
  1843. if (result == -1) {
  1844. if (coex_dm->cur_ps_tdma == 5) {
  1845. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  1846. true, 7);
  1847. coex_dm->tdma_adj_type = 7;
  1848. } else if (coex_dm->cur_ps_tdma == 6) {
  1849. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  1850. true, 7);
  1851. coex_dm->tdma_adj_type = 7;
  1852. } else if (coex_dm->cur_ps_tdma == 7) {
  1853. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  1854. true, 8);
  1855. coex_dm->tdma_adj_type = 8;
  1856. } else if (coex_dm->cur_ps_tdma == 13) {
  1857. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  1858. true, 15);
  1859. coex_dm->tdma_adj_type = 15;
  1860. } else if (coex_dm->cur_ps_tdma == 14) {
  1861. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  1862. true, 15);
  1863. coex_dm->tdma_adj_type = 15;
  1864. } else if (coex_dm->cur_ps_tdma == 15) {
  1865. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  1866. true, 16);
  1867. coex_dm->tdma_adj_type = 16;
  1868. }
  1869. } else if (result == 1) {
  1870. if (coex_dm->cur_ps_tdma == 8) {
  1871. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  1872. true, 7);
  1873. coex_dm->tdma_adj_type = 7;
  1874. } else if (coex_dm->cur_ps_tdma == 7) {
  1875. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  1876. true, 7);
  1877. coex_dm->tdma_adj_type = 7;
  1878. } else if (coex_dm->cur_ps_tdma == 6) {
  1879. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  1880. true, 7);
  1881. coex_dm->tdma_adj_type = 7;
  1882. } else if (coex_dm->cur_ps_tdma == 16) {
  1883. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  1884. true, 15);
  1885. coex_dm->tdma_adj_type = 15;
  1886. } else if (coex_dm->cur_ps_tdma == 15) {
  1887. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  1888. true, 15);
  1889. coex_dm->tdma_adj_type = 15;
  1890. } else if (coex_dm->cur_ps_tdma == 14) {
  1891. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  1892. true, 15);
  1893. coex_dm->tdma_adj_type = 15;
  1894. }
  1895. }
  1896. } else {
  1897. BTC_PRINT(BTC_MSG_ALGORITHM,
  1898. ALGO_TRACE_FW_DETAIL,
  1899. "[BTCoex], TxPause = 0\n");
  1900. if (coex_dm->cur_ps_tdma == 5) {
  1901. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  1902. true, 3);
  1903. coex_dm->tdma_adj_type = 3;
  1904. } else if (coex_dm->cur_ps_tdma == 6) {
  1905. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  1906. true, 3);
  1907. coex_dm->tdma_adj_type = 3;
  1908. } else if (coex_dm->cur_ps_tdma == 7) {
  1909. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  1910. true, 3);
  1911. coex_dm->tdma_adj_type = 3;
  1912. } else if (coex_dm->cur_ps_tdma == 8) {
  1913. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  1914. true, 4);
  1915. coex_dm->tdma_adj_type = 4;
  1916. }
  1917. if (coex_dm->cur_ps_tdma == 13) {
  1918. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  1919. true, 11);
  1920. coex_dm->tdma_adj_type = 11;
  1921. } else if (coex_dm->cur_ps_tdma == 14) {
  1922. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  1923. true, 11);
  1924. coex_dm->tdma_adj_type = 11;
  1925. } else if (coex_dm->cur_ps_tdma == 15) {
  1926. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  1927. true, 11);
  1928. coex_dm->tdma_adj_type = 11;
  1929. } else if (coex_dm->cur_ps_tdma == 16) {
  1930. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  1931. true, 12);
  1932. coex_dm->tdma_adj_type = 12;
  1933. }
  1934. if (result == -1) {
  1935. if (coex_dm->cur_ps_tdma == 1) {
  1936. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  1937. true, 3);
  1938. coex_dm->tdma_adj_type = 3;
  1939. } else if (coex_dm->cur_ps_tdma == 2) {
  1940. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  1941. true, 3);
  1942. coex_dm->tdma_adj_type = 3;
  1943. } else if (coex_dm->cur_ps_tdma == 3) {
  1944. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  1945. true, 4);
  1946. coex_dm->tdma_adj_type = 4;
  1947. } else if (coex_dm->cur_ps_tdma == 9) {
  1948. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  1949. true, 11);
  1950. coex_dm->tdma_adj_type = 11;
  1951. } else if (coex_dm->cur_ps_tdma == 10) {
  1952. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  1953. true, 11);
  1954. coex_dm->tdma_adj_type = 11;
  1955. } else if (coex_dm->cur_ps_tdma == 11) {
  1956. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  1957. true, 12);
  1958. coex_dm->tdma_adj_type = 12;
  1959. }
  1960. } else if (result == 1) {
  1961. if (coex_dm->cur_ps_tdma == 4) {
  1962. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  1963. true, 3);
  1964. coex_dm->tdma_adj_type = 3;
  1965. } else if (coex_dm->cur_ps_tdma == 3) {
  1966. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  1967. true, 3);
  1968. coex_dm->tdma_adj_type = 3;
  1969. } else if (coex_dm->cur_ps_tdma == 2) {
  1970. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  1971. true, 3);
  1972. coex_dm->tdma_adj_type = 3;
  1973. } else if (coex_dm->cur_ps_tdma == 12) {
  1974. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  1975. true, 11);
  1976. coex_dm->tdma_adj_type = 11;
  1977. } else if (coex_dm->cur_ps_tdma == 11) {
  1978. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  1979. true, 11);
  1980. coex_dm->tdma_adj_type = 11;
  1981. } else if (coex_dm->cur_ps_tdma == 10) {
  1982. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  1983. true, 11);
  1984. coex_dm->tdma_adj_type = 11;
  1985. }
  1986. }
  1987. }
  1988. }
  1989. static void halbtc8192e2ant_tdma_duration_adjust(struct btc_coexist *btcoexist,
  1990. bool sco_hid, bool tx_pause,
  1991. u8 max_interval)
  1992. {
  1993. static int up, dn, m, n, wait_cnt;
  1994. /* 0: no change, +1: increase WiFi duration,
  1995. * -1: decrease WiFi duration
  1996. */
  1997. int result;
  1998. u8 retry_cnt = 0;
  1999. BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW,
  2000. "[BTCoex], TdmaDurationAdjust()\n");
  2001. if (!coex_dm->auto_tdma_adjust) {
  2002. coex_dm->auto_tdma_adjust = true;
  2003. BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL,
  2004. "[BTCoex], first run TdmaDurationAdjust()!!\n");
  2005. if (sco_hid) {
  2006. if (tx_pause) {
  2007. if (max_interval == 1) {
  2008. halbtc8192e2ant_ps_tdma(btcoexist,
  2009. NORMAL_EXEC,
  2010. true, 13);
  2011. coex_dm->tdma_adj_type = 13;
  2012. } else if (max_interval == 2) {
  2013. halbtc8192e2ant_ps_tdma(btcoexist,
  2014. NORMAL_EXEC,
  2015. true, 14);
  2016. coex_dm->tdma_adj_type = 14;
  2017. } else if (max_interval == 3) {
  2018. halbtc8192e2ant_ps_tdma(btcoexist,
  2019. NORMAL_EXEC,
  2020. true, 15);
  2021. coex_dm->tdma_adj_type = 15;
  2022. } else {
  2023. halbtc8192e2ant_ps_tdma(btcoexist,
  2024. NORMAL_EXEC,
  2025. true, 15);
  2026. coex_dm->tdma_adj_type = 15;
  2027. }
  2028. } else {
  2029. if (max_interval == 1) {
  2030. halbtc8192e2ant_ps_tdma(btcoexist,
  2031. NORMAL_EXEC,
  2032. true, 9);
  2033. coex_dm->tdma_adj_type = 9;
  2034. } else if (max_interval == 2) {
  2035. halbtc8192e2ant_ps_tdma(btcoexist,
  2036. NORMAL_EXEC,
  2037. true, 10);
  2038. coex_dm->tdma_adj_type = 10;
  2039. } else if (max_interval == 3) {
  2040. halbtc8192e2ant_ps_tdma(btcoexist,
  2041. NORMAL_EXEC,
  2042. true, 11);
  2043. coex_dm->tdma_adj_type = 11;
  2044. } else {
  2045. halbtc8192e2ant_ps_tdma(btcoexist,
  2046. NORMAL_EXEC,
  2047. true, 11);
  2048. coex_dm->tdma_adj_type = 11;
  2049. }
  2050. }
  2051. } else {
  2052. if (tx_pause) {
  2053. if (max_interval == 1) {
  2054. halbtc8192e2ant_ps_tdma(btcoexist,
  2055. NORMAL_EXEC,
  2056. true, 5);
  2057. coex_dm->tdma_adj_type = 5;
  2058. } else if (max_interval == 2) {
  2059. halbtc8192e2ant_ps_tdma(btcoexist,
  2060. NORMAL_EXEC,
  2061. true, 6);
  2062. coex_dm->tdma_adj_type = 6;
  2063. } else if (max_interval == 3) {
  2064. halbtc8192e2ant_ps_tdma(btcoexist,
  2065. NORMAL_EXEC,
  2066. true, 7);
  2067. coex_dm->tdma_adj_type = 7;
  2068. } else {
  2069. halbtc8192e2ant_ps_tdma(btcoexist,
  2070. NORMAL_EXEC,
  2071. true, 7);
  2072. coex_dm->tdma_adj_type = 7;
  2073. }
  2074. } else {
  2075. if (max_interval == 1) {
  2076. halbtc8192e2ant_ps_tdma(btcoexist,
  2077. NORMAL_EXEC,
  2078. true, 1);
  2079. coex_dm->tdma_adj_type = 1;
  2080. } else if (max_interval == 2) {
  2081. halbtc8192e2ant_ps_tdma(btcoexist,
  2082. NORMAL_EXEC,
  2083. true, 2);
  2084. coex_dm->tdma_adj_type = 2;
  2085. } else if (max_interval == 3) {
  2086. halbtc8192e2ant_ps_tdma(btcoexist,
  2087. NORMAL_EXEC,
  2088. true, 3);
  2089. coex_dm->tdma_adj_type = 3;
  2090. } else {
  2091. halbtc8192e2ant_ps_tdma(btcoexist,
  2092. NORMAL_EXEC,
  2093. true, 3);
  2094. coex_dm->tdma_adj_type = 3;
  2095. }
  2096. }
  2097. }
  2098. up = 0;
  2099. dn = 0;
  2100. m = 1;
  2101. n = 3;
  2102. result = 0;
  2103. wait_cnt = 0;
  2104. } else {
  2105. /* accquire the BT TRx retry count from BT_Info byte2 */
  2106. retry_cnt = coex_sta->bt_retry_cnt;
  2107. BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL,
  2108. "[BTCoex], retry_cnt = %d\n", retry_cnt);
  2109. BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL,
  2110. "[BTCoex], up=%d, dn=%d, m=%d, n=%d, wait_cnt=%d\n",
  2111. up, dn, m, n, wait_cnt);
  2112. result = 0;
  2113. wait_cnt++;
  2114. /* no retry in the last 2-second duration */
  2115. if (retry_cnt == 0) {
  2116. up++;
  2117. dn--;
  2118. if (dn <= 0)
  2119. dn = 0;
  2120. if (up >= n) {
  2121. wait_cnt = 0;
  2122. n = 3;
  2123. up = 0;
  2124. dn = 0;
  2125. result = 1;
  2126. BTC_PRINT(BTC_MSG_ALGORITHM,
  2127. ALGO_TRACE_FW_DETAIL,
  2128. "[BTCoex]Increase wifi duration!!\n");
  2129. }
  2130. } else if (retry_cnt <= 3) {
  2131. up--;
  2132. dn++;
  2133. if (up <= 0)
  2134. up = 0;
  2135. if (dn == 2) {
  2136. if (wait_cnt <= 2)
  2137. m++;
  2138. else
  2139. m = 1;
  2140. if (m >= 20)
  2141. m = 20;
  2142. n = 3 * m;
  2143. up = 0;
  2144. dn = 0;
  2145. wait_cnt = 0;
  2146. result = -1;
  2147. BTC_PRINT(BTC_MSG_ALGORITHM,
  2148. ALGO_TRACE_FW_DETAIL,
  2149. "Reduce wifi duration for retry<3\n");
  2150. }
  2151. } else {
  2152. if (wait_cnt == 1)
  2153. m++;
  2154. else
  2155. m = 1;
  2156. if (m >= 20)
  2157. m = 20;
  2158. n = 3*m;
  2159. up = 0;
  2160. dn = 0;
  2161. wait_cnt = 0;
  2162. result = -1;
  2163. BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL,
  2164. "Decrease wifi duration for retryCounter>3!!\n");
  2165. }
  2166. BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL,
  2167. "[BTCoex], max Interval = %d\n", max_interval);
  2168. if (max_interval == 1)
  2169. btc8192e_int1(btcoexist, tx_pause, result);
  2170. else if (max_interval == 2)
  2171. btc8192e_int2(btcoexist, tx_pause, result);
  2172. else if (max_interval == 3)
  2173. btc8192e_int3(btcoexist, tx_pause, result);
  2174. }
  2175. /* if current PsTdma not match with
  2176. * the recorded one (when scan, dhcp...),
  2177. * then we have to adjust it back to the previous record one.
  2178. */
  2179. if (coex_dm->cur_ps_tdma != coex_dm->tdma_adj_type) {
  2180. bool scan = false, link = false, roam = false;
  2181. BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL,
  2182. "[BTCoex], PsTdma type dismatch!!!, ");
  2183. BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_DETAIL,
  2184. "curPsTdma=%d, recordPsTdma=%d\n",
  2185. coex_dm->cur_ps_tdma, coex_dm->tdma_adj_type);
  2186. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_SCAN, &scan);
  2187. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_LINK, &link);
  2188. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_ROAM, &roam);
  2189. if (!scan && !link && !roam)
  2190. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  2191. true,
  2192. coex_dm->tdma_adj_type);
  2193. else
  2194. BTC_PRINT(BTC_MSG_ALGORITHM,
  2195. ALGO_TRACE_FW_DETAIL,
  2196. "[BTCoex], roaming/link/scan is under progress, will adjust next time!!!\n");
  2197. }
  2198. }
  2199. /* SCO only or SCO+PAN(HS) */
  2200. static void halbtc8192e2ant_action_sco(struct btc_coexist *btcoexist)
  2201. {
  2202. u8 wifirssi_state, btrssi_state = BTC_RSSI_STATE_STAY_LOW;
  2203. u32 wifi_bw;
  2204. wifirssi_state = halbtc8192e2ant_wifirssi_state(btcoexist, 0, 2, 15, 0);
  2205. halbtc8192e2ant_switch_sstype(btcoexist, NORMAL_EXEC, 1);
  2206. halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
  2207. halbtc8192e2ant_fw_dac_swinglvl(btcoexist, NORMAL_EXEC, 6);
  2208. btc8192e2ant_coex_tbl_w_type(btcoexist, NORMAL_EXEC, 4);
  2209. btrssi_state = halbtc8192e2ant_btrssi_state(3, 34, 42);
  2210. if ((btrssi_state == BTC_RSSI_STATE_LOW) ||
  2211. (btrssi_state == BTC_RSSI_STATE_STAY_LOW)) {
  2212. halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 0);
  2213. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 13);
  2214. } else if ((btrssi_state == BTC_RSSI_STATE_MEDIUM) ||
  2215. (btrssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) {
  2216. halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 2);
  2217. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 9);
  2218. } else if ((btrssi_state == BTC_RSSI_STATE_HIGH) ||
  2219. (btrssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
  2220. halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 4);
  2221. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 9);
  2222. }
  2223. btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
  2224. /* sw mechanism */
  2225. if (BTC_WIFI_BW_HT40 == wifi_bw) {
  2226. if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
  2227. (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
  2228. btc8192e2ant_sw_mec1(btcoexist, true, true,
  2229. false, false);
  2230. btc8192e2ant_sw_mec2(btcoexist, true, false,
  2231. false, 0x6);
  2232. } else {
  2233. btc8192e2ant_sw_mec1(btcoexist, true, true,
  2234. false, false);
  2235. btc8192e2ant_sw_mec2(btcoexist, false, false,
  2236. false, 0x6);
  2237. }
  2238. } else {
  2239. if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
  2240. (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
  2241. btc8192e2ant_sw_mec1(btcoexist, false, true,
  2242. false, false);
  2243. btc8192e2ant_sw_mec2(btcoexist, true, false,
  2244. false, 0x6);
  2245. } else {
  2246. btc8192e2ant_sw_mec1(btcoexist, false, true,
  2247. false, false);
  2248. btc8192e2ant_sw_mec2(btcoexist, false, false,
  2249. false, 0x6);
  2250. }
  2251. }
  2252. }
  2253. static void halbtc8192e2ant_action_sco_pan(struct btc_coexist *btcoexist)
  2254. {
  2255. u8 wifirssi_state, btrssi_state = BTC_RSSI_STATE_STAY_LOW;
  2256. u32 wifi_bw;
  2257. wifirssi_state = halbtc8192e2ant_wifirssi_state(btcoexist, 0, 2, 15, 0);
  2258. halbtc8192e2ant_switch_sstype(btcoexist, NORMAL_EXEC, 1);
  2259. halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
  2260. halbtc8192e2ant_fw_dac_swinglvl(btcoexist, NORMAL_EXEC, 6);
  2261. btc8192e2ant_coex_tbl_w_type(btcoexist, NORMAL_EXEC, 4);
  2262. btrssi_state = halbtc8192e2ant_btrssi_state(3, 34, 42);
  2263. if ((btrssi_state == BTC_RSSI_STATE_LOW) ||
  2264. (btrssi_state == BTC_RSSI_STATE_STAY_LOW)) {
  2265. halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 0);
  2266. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 14);
  2267. } else if ((btrssi_state == BTC_RSSI_STATE_MEDIUM) ||
  2268. (btrssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) {
  2269. halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 2);
  2270. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 10);
  2271. } else if ((btrssi_state == BTC_RSSI_STATE_HIGH) ||
  2272. (btrssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
  2273. halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 4);
  2274. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 10);
  2275. }
  2276. btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
  2277. /* sw mechanism */
  2278. if (BTC_WIFI_BW_HT40 == wifi_bw) {
  2279. if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
  2280. (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
  2281. btc8192e2ant_sw_mec1(btcoexist, true, true,
  2282. false, false);
  2283. btc8192e2ant_sw_mec2(btcoexist, true, false,
  2284. false, 0x6);
  2285. } else {
  2286. btc8192e2ant_sw_mec1(btcoexist, true, true,
  2287. false, false);
  2288. btc8192e2ant_sw_mec2(btcoexist, false, false,
  2289. false, 0x6);
  2290. }
  2291. } else {
  2292. if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
  2293. (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
  2294. btc8192e2ant_sw_mec1(btcoexist, false, true,
  2295. false, false);
  2296. btc8192e2ant_sw_mec2(btcoexist, true, false,
  2297. false, 0x6);
  2298. } else {
  2299. btc8192e2ant_sw_mec1(btcoexist, false, true,
  2300. false, false);
  2301. btc8192e2ant_sw_mec2(btcoexist, false, false,
  2302. false, 0x6);
  2303. }
  2304. }
  2305. }
  2306. static void halbtc8192e2ant_action_hid(struct btc_coexist *btcoexist)
  2307. {
  2308. u8 wifirssi_state, btrssi_state = BTC_RSSI_STATE_HIGH;
  2309. u32 wifi_bw;
  2310. wifirssi_state = halbtc8192e2ant_wifirssi_state(btcoexist, 0, 2, 15, 0);
  2311. btrssi_state = halbtc8192e2ant_btrssi_state(3, 34, 42);
  2312. halbtc8192e2ant_switch_sstype(btcoexist, NORMAL_EXEC, 1);
  2313. halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
  2314. halbtc8192e2ant_fw_dac_swinglvl(btcoexist, NORMAL_EXEC, 6);
  2315. btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
  2316. btc8192e2ant_coex_tbl_w_type(btcoexist, NORMAL_EXEC, 3);
  2317. if ((btrssi_state == BTC_RSSI_STATE_LOW) ||
  2318. (btrssi_state == BTC_RSSI_STATE_STAY_LOW)) {
  2319. halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 0);
  2320. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 13);
  2321. } else if ((btrssi_state == BTC_RSSI_STATE_MEDIUM) ||
  2322. (btrssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) {
  2323. halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 2);
  2324. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 9);
  2325. } else if ((btrssi_state == BTC_RSSI_STATE_HIGH) ||
  2326. (btrssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
  2327. halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 4);
  2328. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 9);
  2329. }
  2330. /* sw mechanism */
  2331. if (BTC_WIFI_BW_HT40 == wifi_bw) {
  2332. if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
  2333. (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
  2334. btc8192e2ant_sw_mec1(btcoexist, true, true,
  2335. false, false);
  2336. btc8192e2ant_sw_mec2(btcoexist, true, false,
  2337. false, 0x18);
  2338. } else {
  2339. btc8192e2ant_sw_mec1(btcoexist, true, true,
  2340. false, false);
  2341. btc8192e2ant_sw_mec2(btcoexist, false, false,
  2342. false, 0x18);
  2343. }
  2344. } else {
  2345. if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
  2346. (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
  2347. btc8192e2ant_sw_mec1(btcoexist, false, true,
  2348. false, false);
  2349. btc8192e2ant_sw_mec2(btcoexist, true, false,
  2350. false, 0x18);
  2351. } else {
  2352. btc8192e2ant_sw_mec1(btcoexist, false, true,
  2353. false, false);
  2354. btc8192e2ant_sw_mec2(btcoexist, false, false,
  2355. false, 0x18);
  2356. }
  2357. }
  2358. }
  2359. /* A2DP only / PAN(EDR) only/ A2DP+PAN(HS) */
  2360. static void halbtc8192e2ant_action_a2dp(struct btc_coexist *btcoexist)
  2361. {
  2362. u8 wifirssi_state, btrssi_state = BTC_RSSI_STATE_HIGH;
  2363. u32 wifi_bw;
  2364. bool long_dist = false;
  2365. wifirssi_state = halbtc8192e2ant_wifirssi_state(btcoexist, 0, 2, 15, 0);
  2366. btrssi_state = halbtc8192e2ant_btrssi_state(3, 34, 42);
  2367. if ((btrssi_state == BTC_RSSI_STATE_LOW ||
  2368. btrssi_state == BTC_RSSI_STATE_STAY_LOW) &&
  2369. (wifirssi_state == BTC_RSSI_STATE_LOW ||
  2370. wifirssi_state == BTC_RSSI_STATE_STAY_LOW)) {
  2371. BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
  2372. "[BTCoex], A2dp, wifi/bt rssi both LOW!!\n");
  2373. long_dist = true;
  2374. }
  2375. if (long_dist) {
  2376. halbtc8192e2ant_switch_sstype(btcoexist, NORMAL_EXEC, 2);
  2377. halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, true,
  2378. 0x4);
  2379. } else {
  2380. halbtc8192e2ant_switch_sstype(btcoexist, NORMAL_EXEC, 1);
  2381. halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false,
  2382. 0x8);
  2383. }
  2384. halbtc8192e2ant_fw_dac_swinglvl(btcoexist, NORMAL_EXEC, 6);
  2385. if (long_dist)
  2386. btc8192e2ant_coex_tbl_w_type(btcoexist, NORMAL_EXEC, 0);
  2387. else
  2388. btc8192e2ant_coex_tbl_w_type(btcoexist, NORMAL_EXEC, 2);
  2389. if (long_dist) {
  2390. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 17);
  2391. coex_dm->auto_tdma_adjust = false;
  2392. halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 0);
  2393. } else {
  2394. if ((btrssi_state == BTC_RSSI_STATE_LOW) ||
  2395. (btrssi_state == BTC_RSSI_STATE_STAY_LOW)) {
  2396. halbtc8192e2ant_tdma_duration_adjust(btcoexist, false,
  2397. true, 1);
  2398. halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 0);
  2399. } else if ((btrssi_state == BTC_RSSI_STATE_MEDIUM) ||
  2400. (btrssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) {
  2401. halbtc8192e2ant_tdma_duration_adjust(btcoexist, false,
  2402. false, 1);
  2403. halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 2);
  2404. } else if ((btrssi_state == BTC_RSSI_STATE_HIGH) ||
  2405. (btrssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
  2406. halbtc8192e2ant_tdma_duration_adjust(btcoexist, false,
  2407. false, 1);
  2408. halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 4);
  2409. }
  2410. }
  2411. /* sw mechanism */
  2412. btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
  2413. if (BTC_WIFI_BW_HT40 == wifi_bw) {
  2414. if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
  2415. (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
  2416. btc8192e2ant_sw_mec1(btcoexist, true, false,
  2417. false, false);
  2418. btc8192e2ant_sw_mec2(btcoexist, true, false,
  2419. false, 0x18);
  2420. } else {
  2421. btc8192e2ant_sw_mec1(btcoexist, true, false,
  2422. false, false);
  2423. btc8192e2ant_sw_mec2(btcoexist, false, false,
  2424. false, 0x18);
  2425. }
  2426. } else {
  2427. if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
  2428. (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
  2429. btc8192e2ant_sw_mec1(btcoexist, false, false,
  2430. false, false);
  2431. btc8192e2ant_sw_mec2(btcoexist, true, false,
  2432. false, 0x18);
  2433. } else {
  2434. btc8192e2ant_sw_mec1(btcoexist, false, false,
  2435. false, false);
  2436. btc8192e2ant_sw_mec2(btcoexist, false, false,
  2437. false, 0x18);
  2438. }
  2439. }
  2440. }
  2441. static void halbtc8192e2ant_action_a2dp_pan_hs(struct btc_coexist *btcoexist)
  2442. {
  2443. u8 wifirssi_state, btrssi_state = BTC_RSSI_STATE_HIGH;
  2444. u32 wifi_bw;
  2445. wifirssi_state = halbtc8192e2ant_wifirssi_state(btcoexist, 0, 2, 15, 0);
  2446. btrssi_state = halbtc8192e2ant_btrssi_state(3, 34, 42);
  2447. halbtc8192e2ant_switch_sstype(btcoexist, NORMAL_EXEC, 1);
  2448. halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
  2449. halbtc8192e2ant_fw_dac_swinglvl(btcoexist, NORMAL_EXEC, 6);
  2450. btc8192e2ant_coex_tbl_w_type(btcoexist, NORMAL_EXEC, 2);
  2451. if ((btrssi_state == BTC_RSSI_STATE_LOW) ||
  2452. (btrssi_state == BTC_RSSI_STATE_STAY_LOW)) {
  2453. halbtc8192e2ant_tdma_duration_adjust(btcoexist, false, true, 2);
  2454. halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 0);
  2455. } else if ((btrssi_state == BTC_RSSI_STATE_MEDIUM) ||
  2456. (btrssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) {
  2457. halbtc8192e2ant_tdma_duration_adjust(btcoexist, false,
  2458. false, 2);
  2459. halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 2);
  2460. } else if ((btrssi_state == BTC_RSSI_STATE_HIGH) ||
  2461. (btrssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
  2462. halbtc8192e2ant_tdma_duration_adjust(btcoexist, false,
  2463. false, 2);
  2464. halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 4);
  2465. }
  2466. /* sw mechanism */
  2467. btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
  2468. if (BTC_WIFI_BW_HT40 == wifi_bw) {
  2469. if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
  2470. (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
  2471. btc8192e2ant_sw_mec1(btcoexist, true, false,
  2472. false, false);
  2473. btc8192e2ant_sw_mec2(btcoexist, true, false,
  2474. true, 0x6);
  2475. } else {
  2476. btc8192e2ant_sw_mec1(btcoexist, true, false,
  2477. false, false);
  2478. btc8192e2ant_sw_mec2(btcoexist, false, false,
  2479. true, 0x6);
  2480. }
  2481. } else {
  2482. if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
  2483. (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
  2484. btc8192e2ant_sw_mec1(btcoexist, false, false,
  2485. false, false);
  2486. btc8192e2ant_sw_mec2(btcoexist, true, false,
  2487. true, 0x6);
  2488. } else {
  2489. btc8192e2ant_sw_mec1(btcoexist, false, false,
  2490. false, false);
  2491. btc8192e2ant_sw_mec2(btcoexist, false, false,
  2492. true, 0x6);
  2493. }
  2494. }
  2495. }
  2496. static void halbtc8192e2ant_action_pan_edr(struct btc_coexist *btcoexist)
  2497. {
  2498. u8 wifirssi_state, btrssi_state = BTC_RSSI_STATE_HIGH;
  2499. u32 wifi_bw;
  2500. wifirssi_state = halbtc8192e2ant_wifirssi_state(btcoexist, 0, 2, 15, 0);
  2501. btrssi_state = halbtc8192e2ant_btrssi_state(3, 34, 42);
  2502. halbtc8192e2ant_switch_sstype(btcoexist, NORMAL_EXEC, 1);
  2503. halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
  2504. halbtc8192e2ant_fw_dac_swinglvl(btcoexist, NORMAL_EXEC, 6);
  2505. btc8192e2ant_coex_tbl_w_type(btcoexist, NORMAL_EXEC, 2);
  2506. if ((btrssi_state == BTC_RSSI_STATE_LOW) ||
  2507. (btrssi_state == BTC_RSSI_STATE_STAY_LOW)) {
  2508. halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 0);
  2509. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 5);
  2510. } else if ((btrssi_state == BTC_RSSI_STATE_MEDIUM) ||
  2511. (btrssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) {
  2512. halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 2);
  2513. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 1);
  2514. } else if ((btrssi_state == BTC_RSSI_STATE_HIGH) ||
  2515. (btrssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
  2516. halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 4);
  2517. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 1);
  2518. }
  2519. /* sw mechanism */
  2520. btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
  2521. if (BTC_WIFI_BW_HT40 == wifi_bw) {
  2522. if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
  2523. (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
  2524. btc8192e2ant_sw_mec1(btcoexist, true, false,
  2525. false, false);
  2526. btc8192e2ant_sw_mec2(btcoexist, true, false,
  2527. false, 0x18);
  2528. } else {
  2529. btc8192e2ant_sw_mec1(btcoexist, true, false,
  2530. false, false);
  2531. btc8192e2ant_sw_mec2(btcoexist, false, false,
  2532. false, 0x18);
  2533. }
  2534. } else {
  2535. if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
  2536. (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
  2537. btc8192e2ant_sw_mec1(btcoexist, false, false,
  2538. false, false);
  2539. btc8192e2ant_sw_mec2(btcoexist, true, false,
  2540. false, 0x18);
  2541. } else {
  2542. btc8192e2ant_sw_mec1(btcoexist, false, false,
  2543. false, false);
  2544. btc8192e2ant_sw_mec2(btcoexist, false, false,
  2545. false, 0x18);
  2546. }
  2547. }
  2548. }
  2549. /* PAN(HS) only */
  2550. static void halbtc8192e2ant_action_pan_hs(struct btc_coexist *btcoexist)
  2551. {
  2552. u8 wifirssi_state, btrssi_state = BTC_RSSI_STATE_HIGH;
  2553. u32 wifi_bw;
  2554. wifirssi_state = halbtc8192e2ant_wifirssi_state(btcoexist, 0, 2, 15, 0);
  2555. btrssi_state = halbtc8192e2ant_btrssi_state(3, 34, 42);
  2556. halbtc8192e2ant_switch_sstype(btcoexist, NORMAL_EXEC, 1);
  2557. halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
  2558. halbtc8192e2ant_fw_dac_swinglvl(btcoexist, NORMAL_EXEC, 6);
  2559. btc8192e2ant_coex_tbl_w_type(btcoexist, NORMAL_EXEC, 2);
  2560. if ((btrssi_state == BTC_RSSI_STATE_LOW) ||
  2561. (btrssi_state == BTC_RSSI_STATE_STAY_LOW)) {
  2562. halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 0);
  2563. } else if ((btrssi_state == BTC_RSSI_STATE_MEDIUM) ||
  2564. (btrssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) {
  2565. halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 2);
  2566. } else if ((btrssi_state == BTC_RSSI_STATE_HIGH) ||
  2567. (btrssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
  2568. halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 4);
  2569. }
  2570. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1);
  2571. btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
  2572. if (BTC_WIFI_BW_HT40 == wifi_bw) {
  2573. if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
  2574. (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
  2575. btc8192e2ant_sw_mec1(btcoexist, true, false,
  2576. false, false);
  2577. btc8192e2ant_sw_mec2(btcoexist, true, false,
  2578. false, 0x18);
  2579. } else {
  2580. btc8192e2ant_sw_mec1(btcoexist, true, false,
  2581. false, false);
  2582. btc8192e2ant_sw_mec2(btcoexist, false, false,
  2583. false, 0x18);
  2584. }
  2585. } else {
  2586. if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
  2587. (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
  2588. btc8192e2ant_sw_mec1(btcoexist, false, false,
  2589. false, false);
  2590. btc8192e2ant_sw_mec2(btcoexist, true, false,
  2591. false, 0x18);
  2592. } else {
  2593. btc8192e2ant_sw_mec1(btcoexist, false, false,
  2594. false, false);
  2595. btc8192e2ant_sw_mec2(btcoexist, false, false,
  2596. false, 0x18);
  2597. }
  2598. }
  2599. }
  2600. /* PAN(EDR)+A2DP */
  2601. static void halbtc8192e2ant_action_pan_edr_a2dp(struct btc_coexist *btcoexist)
  2602. {
  2603. u8 wifirssi_state, btrssi_state = BTC_RSSI_STATE_HIGH;
  2604. u32 wifi_bw;
  2605. wifirssi_state = halbtc8192e2ant_wifirssi_state(btcoexist, 0, 2, 15, 0);
  2606. btrssi_state = halbtc8192e2ant_btrssi_state(3, 34, 42);
  2607. halbtc8192e2ant_switch_sstype(btcoexist, NORMAL_EXEC, 1);
  2608. halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
  2609. halbtc8192e2ant_fw_dac_swinglvl(btcoexist, NORMAL_EXEC, 6);
  2610. btc8192e2ant_coex_tbl_w_type(btcoexist, NORMAL_EXEC, 2);
  2611. btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
  2612. if ((btrssi_state == BTC_RSSI_STATE_LOW) ||
  2613. (btrssi_state == BTC_RSSI_STATE_STAY_LOW)) {
  2614. halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 0);
  2615. halbtc8192e2ant_tdma_duration_adjust(btcoexist, false, true, 3);
  2616. } else if ((btrssi_state == BTC_RSSI_STATE_MEDIUM) ||
  2617. (btrssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) {
  2618. halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 2);
  2619. halbtc8192e2ant_tdma_duration_adjust(btcoexist, false,
  2620. false, 3);
  2621. } else if ((btrssi_state == BTC_RSSI_STATE_HIGH) ||
  2622. (btrssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
  2623. halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 4);
  2624. halbtc8192e2ant_tdma_duration_adjust(btcoexist, false,
  2625. false, 3);
  2626. }
  2627. /* sw mechanism */
  2628. if (BTC_WIFI_BW_HT40 == wifi_bw) {
  2629. if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
  2630. (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
  2631. btc8192e2ant_sw_mec1(btcoexist, true, false,
  2632. false, false);
  2633. btc8192e2ant_sw_mec2(btcoexist, true, false,
  2634. false, 0x18);
  2635. } else {
  2636. btc8192e2ant_sw_mec1(btcoexist, true, false,
  2637. false, false);
  2638. btc8192e2ant_sw_mec2(btcoexist, false, false,
  2639. false, 0x18);
  2640. }
  2641. } else {
  2642. if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
  2643. (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
  2644. btc8192e2ant_sw_mec1(btcoexist, false, false,
  2645. false, false);
  2646. btc8192e2ant_sw_mec2(btcoexist, true, false,
  2647. false, 0x18);
  2648. } else {
  2649. btc8192e2ant_sw_mec1(btcoexist, false, false,
  2650. false, false);
  2651. btc8192e2ant_sw_mec2(btcoexist, false, false,
  2652. false, 0x18);
  2653. }
  2654. }
  2655. }
  2656. static void halbtc8192e2ant_action_pan_edr_hid(struct btc_coexist *btcoexist)
  2657. {
  2658. u8 wifirssi_state, btrssi_state = BTC_RSSI_STATE_HIGH;
  2659. u32 wifi_bw;
  2660. wifirssi_state = halbtc8192e2ant_wifirssi_state(btcoexist, 0, 2, 15, 0);
  2661. btrssi_state = halbtc8192e2ant_btrssi_state(3, 34, 42);
  2662. btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
  2663. halbtc8192e2ant_switch_sstype(btcoexist, NORMAL_EXEC, 1);
  2664. halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
  2665. halbtc8192e2ant_fw_dac_swinglvl(btcoexist, NORMAL_EXEC, 6);
  2666. btc8192e2ant_coex_tbl_w_type(btcoexist, NORMAL_EXEC, 3);
  2667. if ((btrssi_state == BTC_RSSI_STATE_LOW) ||
  2668. (btrssi_state == BTC_RSSI_STATE_STAY_LOW)) {
  2669. halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 0);
  2670. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 14);
  2671. } else if ((btrssi_state == BTC_RSSI_STATE_MEDIUM) ||
  2672. (btrssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) {
  2673. halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 2);
  2674. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  2675. true, 10);
  2676. } else if ((btrssi_state == BTC_RSSI_STATE_HIGH) ||
  2677. (btrssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
  2678. halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 4);
  2679. halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
  2680. true, 10);
  2681. }
  2682. /* sw mechanism */
  2683. if (BTC_WIFI_BW_HT40 == wifi_bw) {
  2684. if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
  2685. (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
  2686. btc8192e2ant_sw_mec1(btcoexist, true, true,
  2687. false, false);
  2688. btc8192e2ant_sw_mec2(btcoexist, true, false,
  2689. false, 0x18);
  2690. } else {
  2691. btc8192e2ant_sw_mec1(btcoexist, true, true,
  2692. false, false);
  2693. btc8192e2ant_sw_mec2(btcoexist, false, false,
  2694. false, 0x18);
  2695. }
  2696. } else {
  2697. if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
  2698. (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
  2699. btc8192e2ant_sw_mec1(btcoexist, false, true,
  2700. false, false);
  2701. btc8192e2ant_sw_mec2(btcoexist, true, false,
  2702. false, 0x18);
  2703. } else {
  2704. btc8192e2ant_sw_mec1(btcoexist, false, true,
  2705. false, false);
  2706. btc8192e2ant_sw_mec2(btcoexist, false, false,
  2707. false, 0x18);
  2708. }
  2709. }
  2710. }
  2711. /* HID+A2DP+PAN(EDR) */
  2712. static void btc8192e2ant_action_hid_a2dp_pan_edr(struct btc_coexist *btcoexist)
  2713. {
  2714. u8 wifirssi_state, btrssi_state = BTC_RSSI_STATE_HIGH;
  2715. u32 wifi_bw;
  2716. wifirssi_state = halbtc8192e2ant_wifirssi_state(btcoexist, 0, 2, 15, 0);
  2717. btrssi_state = halbtc8192e2ant_btrssi_state(3, 34, 42);
  2718. halbtc8192e2ant_switch_sstype(btcoexist, NORMAL_EXEC, 1);
  2719. halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
  2720. halbtc8192e2ant_fw_dac_swinglvl(btcoexist, NORMAL_EXEC, 6);
  2721. btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
  2722. btc8192e2ant_coex_tbl_w_type(btcoexist, NORMAL_EXEC, 3);
  2723. if ((btrssi_state == BTC_RSSI_STATE_LOW) ||
  2724. (btrssi_state == BTC_RSSI_STATE_STAY_LOW)) {
  2725. halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 0);
  2726. halbtc8192e2ant_tdma_duration_adjust(btcoexist, true, true, 3);
  2727. } else if ((btrssi_state == BTC_RSSI_STATE_MEDIUM) ||
  2728. (btrssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) {
  2729. halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 2);
  2730. halbtc8192e2ant_tdma_duration_adjust(btcoexist, true, false, 3);
  2731. } else if ((btrssi_state == BTC_RSSI_STATE_HIGH) ||
  2732. (btrssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
  2733. halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 4);
  2734. halbtc8192e2ant_tdma_duration_adjust(btcoexist, true, false, 3);
  2735. }
  2736. /* sw mechanism */
  2737. if (BTC_WIFI_BW_HT40 == wifi_bw) {
  2738. if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
  2739. (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
  2740. btc8192e2ant_sw_mec1(btcoexist, true, true,
  2741. false, false);
  2742. btc8192e2ant_sw_mec2(btcoexist, true, false,
  2743. false, 0x18);
  2744. } else {
  2745. btc8192e2ant_sw_mec1(btcoexist, true, true,
  2746. false, false);
  2747. btc8192e2ant_sw_mec2(btcoexist, false, false,
  2748. false, 0x18);
  2749. }
  2750. } else {
  2751. if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
  2752. (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
  2753. btc8192e2ant_sw_mec1(btcoexist, false, true,
  2754. false, false);
  2755. btc8192e2ant_sw_mec2(btcoexist, true, false,
  2756. false, 0x18);
  2757. } else {
  2758. btc8192e2ant_sw_mec1(btcoexist, false, true,
  2759. false, false);
  2760. btc8192e2ant_sw_mec2(btcoexist, false, false,
  2761. false, 0x18);
  2762. }
  2763. }
  2764. }
  2765. static void halbtc8192e2ant_action_hid_a2dp(struct btc_coexist *btcoexist)
  2766. {
  2767. u8 wifirssi_state, btrssi_state = BTC_RSSI_STATE_HIGH;
  2768. u32 wifi_bw;
  2769. wifirssi_state = halbtc8192e2ant_wifirssi_state(btcoexist, 0, 2, 15, 0);
  2770. btrssi_state = halbtc8192e2ant_btrssi_state(3, 34, 42);
  2771. halbtc8192e2ant_switch_sstype(btcoexist, NORMAL_EXEC, 1);
  2772. halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
  2773. btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
  2774. btc8192e2ant_coex_tbl_w_type(btcoexist, NORMAL_EXEC, 3);
  2775. if ((btrssi_state == BTC_RSSI_STATE_LOW) ||
  2776. (btrssi_state == BTC_RSSI_STATE_STAY_LOW)) {
  2777. halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 0);
  2778. halbtc8192e2ant_tdma_duration_adjust(btcoexist, true, true, 2);
  2779. } else if ((btrssi_state == BTC_RSSI_STATE_MEDIUM) ||
  2780. (btrssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) {
  2781. halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 2);
  2782. halbtc8192e2ant_tdma_duration_adjust(btcoexist, true, false, 2);
  2783. } else if ((btrssi_state == BTC_RSSI_STATE_HIGH) ||
  2784. (btrssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
  2785. halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 4);
  2786. halbtc8192e2ant_tdma_duration_adjust(btcoexist, true, false, 2);
  2787. }
  2788. /* sw mechanism */
  2789. if (BTC_WIFI_BW_HT40 == wifi_bw) {
  2790. if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
  2791. (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
  2792. btc8192e2ant_sw_mec1(btcoexist, true, true,
  2793. false, false);
  2794. btc8192e2ant_sw_mec2(btcoexist, true, false,
  2795. false, 0x18);
  2796. } else {
  2797. btc8192e2ant_sw_mec1(btcoexist, true, true,
  2798. false, false);
  2799. btc8192e2ant_sw_mec2(btcoexist, false, false,
  2800. false, 0x18);
  2801. }
  2802. } else {
  2803. if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
  2804. (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
  2805. btc8192e2ant_sw_mec1(btcoexist, false, true,
  2806. false, false);
  2807. btc8192e2ant_sw_mec2(btcoexist, true, false,
  2808. false, 0x18);
  2809. } else {
  2810. btc8192e2ant_sw_mec1(btcoexist, false, true,
  2811. false, false);
  2812. btc8192e2ant_sw_mec2(btcoexist, false, false,
  2813. false, 0x18);
  2814. }
  2815. }
  2816. }
  2817. static void halbtc8192e2ant_run_coexist_mechanism(struct btc_coexist *btcoexist)
  2818. {
  2819. u8 algorithm = 0;
  2820. BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
  2821. "[BTCoex], RunCoexistMechanism()===>\n");
  2822. if (btcoexist->manual_control) {
  2823. BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
  2824. "[BTCoex], return for Manual CTRL <===\n");
  2825. return;
  2826. }
  2827. if (coex_sta->under_ips) {
  2828. BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
  2829. "[BTCoex], wifi is under IPS !!!\n");
  2830. return;
  2831. }
  2832. algorithm = halbtc8192e2ant_action_algorithm(btcoexist);
  2833. if (coex_sta->c2h_bt_inquiry_page &&
  2834. (BT_8192E_2ANT_COEX_ALGO_PANHS != algorithm)) {
  2835. BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
  2836. "[BTCoex], BT is under inquiry/page scan !!\n");
  2837. halbtc8192e2ant_action_bt_inquiry(btcoexist);
  2838. return;
  2839. }
  2840. coex_dm->cur_algorithm = algorithm;
  2841. BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
  2842. "[BTCoex], Algorithm = %d\n", coex_dm->cur_algorithm);
  2843. if (halbtc8192e2ant_is_common_action(btcoexist)) {
  2844. BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
  2845. "[BTCoex], Action 2-Ant common.\n");
  2846. coex_dm->auto_tdma_adjust = false;
  2847. } else {
  2848. if (coex_dm->cur_algorithm != coex_dm->pre_algorithm) {
  2849. BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
  2850. "[BTCoex] preAlgorithm=%d, curAlgorithm=%d\n",
  2851. coex_dm->pre_algorithm,
  2852. coex_dm->cur_algorithm);
  2853. coex_dm->auto_tdma_adjust = false;
  2854. }
  2855. switch (coex_dm->cur_algorithm) {
  2856. case BT_8192E_2ANT_COEX_ALGO_SCO:
  2857. BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
  2858. "Action 2-Ant, algorithm = SCO.\n");
  2859. halbtc8192e2ant_action_sco(btcoexist);
  2860. break;
  2861. case BT_8192E_2ANT_COEX_ALGO_SCO_PAN:
  2862. BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
  2863. "Action 2-Ant, algorithm = SCO+PAN(EDR).\n");
  2864. halbtc8192e2ant_action_sco_pan(btcoexist);
  2865. break;
  2866. case BT_8192E_2ANT_COEX_ALGO_HID:
  2867. BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
  2868. "Action 2-Ant, algorithm = HID.\n");
  2869. halbtc8192e2ant_action_hid(btcoexist);
  2870. break;
  2871. case BT_8192E_2ANT_COEX_ALGO_A2DP:
  2872. BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
  2873. "Action 2-Ant, algorithm = A2DP.\n");
  2874. halbtc8192e2ant_action_a2dp(btcoexist);
  2875. break;
  2876. case BT_8192E_2ANT_COEX_ALGO_A2DP_PANHS:
  2877. BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
  2878. "Action 2-Ant, algorithm = A2DP+PAN(HS).\n");
  2879. halbtc8192e2ant_action_a2dp_pan_hs(btcoexist);
  2880. break;
  2881. case BT_8192E_2ANT_COEX_ALGO_PANEDR:
  2882. BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
  2883. "Action 2-Ant, algorithm = PAN(EDR).\n");
  2884. halbtc8192e2ant_action_pan_edr(btcoexist);
  2885. break;
  2886. case BT_8192E_2ANT_COEX_ALGO_PANHS:
  2887. BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
  2888. "Action 2-Ant, algorithm = HS mode.\n");
  2889. halbtc8192e2ant_action_pan_hs(btcoexist);
  2890. break;
  2891. case BT_8192E_2ANT_COEX_ALGO_PANEDR_A2DP:
  2892. BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
  2893. "Action 2-Ant, algorithm = PAN+A2DP.\n");
  2894. halbtc8192e2ant_action_pan_edr_a2dp(btcoexist);
  2895. break;
  2896. case BT_8192E_2ANT_COEX_ALGO_PANEDR_HID:
  2897. BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
  2898. "Action 2-Ant, algorithm = PAN(EDR)+HID.\n");
  2899. halbtc8192e2ant_action_pan_edr_hid(btcoexist);
  2900. break;
  2901. case BT_8192E_2ANT_COEX_ALGO_HID_A2DP_PANEDR:
  2902. BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
  2903. "Action 2-Ant, algorithm = HID+A2DP+PAN.\n");
  2904. btc8192e2ant_action_hid_a2dp_pan_edr(btcoexist);
  2905. break;
  2906. case BT_8192E_2ANT_COEX_ALGO_HID_A2DP:
  2907. BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
  2908. "Action 2-Ant, algorithm = HID+A2DP.\n");
  2909. halbtc8192e2ant_action_hid_a2dp(btcoexist);
  2910. break;
  2911. default:
  2912. BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
  2913. "Action 2-Ant, algorithm = unknown!!\n");
  2914. /* halbtc8192e2ant_coex_alloff(btcoexist); */
  2915. break;
  2916. }
  2917. coex_dm->pre_algorithm = coex_dm->cur_algorithm;
  2918. }
  2919. }
  2920. static void halbtc8192e2ant_init_hwconfig(struct btc_coexist *btcoexist,
  2921. bool backup)
  2922. {
  2923. u16 u16tmp = 0;
  2924. u8 u8tmp = 0;
  2925. BTC_PRINT(BTC_MSG_INTERFACE, INTF_INIT,
  2926. "[BTCoex], 2Ant Init HW Config!!\n");
  2927. if (backup) {
  2928. /* backup rf 0x1e value */
  2929. coex_dm->bt_rf0x1e_backup =
  2930. btcoexist->btc_get_rf_reg(btcoexist, BTC_RF_A,
  2931. 0x1e, 0xfffff);
  2932. coex_dm->backup_arfr_cnt1 = btcoexist->btc_read_4byte(btcoexist,
  2933. 0x430);
  2934. coex_dm->backup_arfr_cnt2 = btcoexist->btc_read_4byte(btcoexist,
  2935. 0x434);
  2936. coex_dm->backup_retrylimit = btcoexist->btc_read_2byte(
  2937. btcoexist,
  2938. 0x42a);
  2939. coex_dm->backup_ampdu_maxtime = btcoexist->btc_read_1byte(
  2940. btcoexist,
  2941. 0x456);
  2942. }
  2943. /* antenna sw ctrl to bt */
  2944. btcoexist->btc_write_1byte(btcoexist, 0x4f, 0x6);
  2945. btcoexist->btc_write_1byte(btcoexist, 0x944, 0x24);
  2946. btcoexist->btc_write_4byte(btcoexist, 0x930, 0x700700);
  2947. btcoexist->btc_write_1byte(btcoexist, 0x92c, 0x20);
  2948. if (btcoexist->chip_interface == BTC_INTF_USB)
  2949. btcoexist->btc_write_4byte(btcoexist, 0x64, 0x30430004);
  2950. else
  2951. btcoexist->btc_write_4byte(btcoexist, 0x64, 0x30030004);
  2952. btc8192e2ant_coex_tbl_w_type(btcoexist, FORCE_EXEC, 0);
  2953. /* antenna switch control parameter */
  2954. btcoexist->btc_write_4byte(btcoexist, 0x858, 0x55555555);
  2955. /* coex parameters */
  2956. btcoexist->btc_write_1byte(btcoexist, 0x778, 0x3);
  2957. /* 0x790[5:0] = 0x5 */
  2958. u8tmp = btcoexist->btc_read_1byte(btcoexist, 0x790);
  2959. u8tmp &= 0xc0;
  2960. u8tmp |= 0x5;
  2961. btcoexist->btc_write_1byte(btcoexist, 0x790, u8tmp);
  2962. /* enable counter statistics */
  2963. btcoexist->btc_write_1byte(btcoexist, 0x76e, 0x4);
  2964. /* enable PTA */
  2965. btcoexist->btc_write_1byte(btcoexist, 0x40, 0x20);
  2966. /* enable mailbox interface */
  2967. u16tmp = btcoexist->btc_read_2byte(btcoexist, 0x40);
  2968. u16tmp |= BIT9;
  2969. btcoexist->btc_write_2byte(btcoexist, 0x40, u16tmp);
  2970. /* enable PTA I2C mailbox */
  2971. u8tmp = btcoexist->btc_read_1byte(btcoexist, 0x101);
  2972. u8tmp |= BIT4;
  2973. btcoexist->btc_write_1byte(btcoexist, 0x101, u8tmp);
  2974. /* enable bt clock when wifi is disabled. */
  2975. u8tmp = btcoexist->btc_read_1byte(btcoexist, 0x93);
  2976. u8tmp |= BIT0;
  2977. btcoexist->btc_write_1byte(btcoexist, 0x93, u8tmp);
  2978. /* enable bt clock when suspend. */
  2979. u8tmp = btcoexist->btc_read_1byte(btcoexist, 0x7);
  2980. u8tmp |= BIT0;
  2981. btcoexist->btc_write_1byte(btcoexist, 0x7, u8tmp);
  2982. }
  2983. /*************************************************************
  2984. * work around function start with wa_halbtc8192e2ant_
  2985. *************************************************************/
  2986. /************************************************************
  2987. * extern function start with EXhalbtc8192e2ant_
  2988. ************************************************************/
  2989. void ex_halbtc8192e2ant_init_hwconfig(struct btc_coexist *btcoexist)
  2990. {
  2991. halbtc8192e2ant_init_hwconfig(btcoexist, true);
  2992. }
  2993. void ex_halbtc8192e2ant_init_coex_dm(struct btc_coexist *btcoexist)
  2994. {
  2995. BTC_PRINT(BTC_MSG_INTERFACE, INTF_INIT,
  2996. "[BTCoex], Coex Mechanism Init!!\n");
  2997. halbtc8192e2ant_init_coex_dm(btcoexist);
  2998. }
  2999. void ex_halbtc8192e2ant_display_coex_info(struct btc_coexist *btcoexist)
  3000. {
  3001. struct btc_board_info *board_info = &btcoexist->board_info;
  3002. struct btc_stack_info *stack_info = &btcoexist->stack_info;
  3003. struct rtl_priv *rtlpriv = btcoexist->adapter;
  3004. u8 u8tmp[4], i, bt_info_ext, ps_tdma_case = 0;
  3005. u16 u16tmp[4];
  3006. u32 u32tmp[4];
  3007. bool roam = false, scan = false, link = false, wifi_under_5g = false;
  3008. bool bt_hson = false, wifi_busy = false;
  3009. int wifirssi = 0, bt_hs_rssi = 0;
  3010. u32 wifi_bw, wifi_traffic_dir;
  3011. u8 wifi_dot11_chnl, wifi_hs_chnl;
  3012. u32 fw_ver = 0, bt_patch_ver = 0;
  3013. RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
  3014. "\r\n ============[BT Coexist info]============");
  3015. if (btcoexist->manual_control) {
  3016. RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
  3017. "\r\n ===========[Under Manual Control]===========");
  3018. RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
  3019. "\r\n ==========================================");
  3020. }
  3021. if (!board_info->bt_exist) {
  3022. RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n BT not exists !!!");
  3023. return;
  3024. }
  3025. RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
  3026. "\r\n %-35s = %d/ %d ", "Ant PG number/ Ant mechanism:",
  3027. board_info->pg_ant_num, board_info->btdm_ant_num);
  3028. RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s = %s / %d",
  3029. "BT stack/ hci ext ver",
  3030. ((stack_info->profile_notified) ? "Yes" : "No"),
  3031. stack_info->hci_version);
  3032. btcoexist->btc_get(btcoexist, BTC_GET_U4_BT_PATCH_VER, &bt_patch_ver);
  3033. btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_FW_VER, &fw_ver);
  3034. RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
  3035. "\r\n %-35s = %d_%d/ 0x%x/ 0x%x(%d)",
  3036. "CoexVer/ FwVer/ PatchVer",
  3037. glcoex_ver_date_8192e_2ant, glcoex_ver_8192e_2ant,
  3038. fw_ver, bt_patch_ver, bt_patch_ver);
  3039. btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hson);
  3040. btcoexist->btc_get(btcoexist, BTC_GET_U1_WIFI_DOT11_CHNL,
  3041. &wifi_dot11_chnl);
  3042. btcoexist->btc_get(btcoexist, BTC_GET_U1_WIFI_HS_CHNL, &wifi_hs_chnl);
  3043. RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s = %d / %d(%d)",
  3044. "Dot11 channel / HsMode(HsChnl)",
  3045. wifi_dot11_chnl, bt_hson, wifi_hs_chnl);
  3046. RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s = %02x %02x %02x ",
  3047. "H2C Wifi inform bt chnl Info", coex_dm->wifi_chnl_info[0],
  3048. coex_dm->wifi_chnl_info[1], coex_dm->wifi_chnl_info[2]);
  3049. btcoexist->btc_get(btcoexist, BTC_GET_S4_WIFI_RSSI, &wifirssi);
  3050. btcoexist->btc_get(btcoexist, BTC_GET_S4_HS_RSSI, &bt_hs_rssi);
  3051. RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s = %d/ %d",
  3052. "Wifi rssi/ HS rssi", wifirssi, bt_hs_rssi);
  3053. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_SCAN, &scan);
  3054. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_LINK, &link);
  3055. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_ROAM, &roam);
  3056. RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s = %d/ %d/ %d ",
  3057. "Wifi link/ roam/ scan", link, roam, scan);
  3058. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_UNDER_5G, &wifi_under_5g);
  3059. btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
  3060. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
  3061. btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_TRAFFIC_DIRECTION,
  3062. &wifi_traffic_dir);
  3063. RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s = %s / %s/ %s ",
  3064. "Wifi status", (wifi_under_5g ? "5G" : "2.4G"),
  3065. ((BTC_WIFI_BW_LEGACY == wifi_bw) ? "Legacy" :
  3066. (((BTC_WIFI_BW_HT40 == wifi_bw) ? "HT40" : "HT20"))),
  3067. ((!wifi_busy) ? "idle" :
  3068. ((BTC_WIFI_TRAFFIC_TX == wifi_traffic_dir) ?
  3069. "uplink" : "downlink")));
  3070. RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s = [%s/ %d/ %d] ",
  3071. "BT [status/ rssi/ retryCnt]",
  3072. ((btcoexist->bt_info.bt_disabled) ? ("disabled") :
  3073. ((coex_sta->c2h_bt_inquiry_page) ?
  3074. ("inquiry/page scan") :
  3075. ((BT_8192E_2ANT_BT_STATUS_NON_CONNECTED_IDLE ==
  3076. coex_dm->bt_status) ? "non-connected idle" :
  3077. ((BT_8192E_2ANT_BT_STATUS_CONNECTED_IDLE ==
  3078. coex_dm->bt_status) ? "connected-idle" : "busy")))),
  3079. coex_sta->bt_rssi, coex_sta->bt_retry_cnt);
  3080. RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s = %d / %d / %d / %d",
  3081. "SCO/HID/PAN/A2DP", stack_info->sco_exist,
  3082. stack_info->hid_exist, stack_info->pan_exist,
  3083. stack_info->a2dp_exist);
  3084. btcoexist->btc_disp_dbg_msg(btcoexist, BTC_DBG_DISP_BT_LINK_INFO);
  3085. bt_info_ext = coex_sta->bt_info_ext;
  3086. RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s = %s",
  3087. "BT Info A2DP rate",
  3088. (bt_info_ext&BIT0) ? "Basic rate" : "EDR rate");
  3089. for (i = 0; i < BT_INFO_SRC_8192E_2ANT_MAX; i++) {
  3090. if (coex_sta->bt_info_c2h_cnt[i]) {
  3091. RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
  3092. "\r\n %-35s = %02x %02x %02x %02x ",
  3093. GLBtInfoSrc8192e2Ant[i],
  3094. coex_sta->bt_info_c2h[i][0],
  3095. coex_sta->bt_info_c2h[i][1],
  3096. coex_sta->bt_info_c2h[i][2],
  3097. coex_sta->bt_info_c2h[i][3]);
  3098. RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
  3099. "%02x %02x %02x(%d)",
  3100. coex_sta->bt_info_c2h[i][4],
  3101. coex_sta->bt_info_c2h[i][5],
  3102. coex_sta->bt_info_c2h[i][6],
  3103. coex_sta->bt_info_c2h_cnt[i]);
  3104. }
  3105. }
  3106. RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s = %s/%s",
  3107. "PS state, IPS/LPS",
  3108. ((coex_sta->under_ips ? "IPS ON" : "IPS OFF")),
  3109. ((coex_sta->under_lps ? "LPS ON" : "LPS OFF")));
  3110. btcoexist->btc_disp_dbg_msg(btcoexist, BTC_DBG_DISP_FW_PWR_MODE_CMD);
  3111. RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s = 0x%x ", "SS Type",
  3112. coex_dm->cur_sstype);
  3113. /* Sw mechanism */
  3114. RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s",
  3115. "============[Sw mechanism]============");
  3116. RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s = %d/ %d/ %d ",
  3117. "SM1[ShRf/ LpRA/ LimDig]", coex_dm->cur_rf_rx_lpf_shrink,
  3118. coex_dm->cur_low_penalty_ra, coex_dm->limited_dig);
  3119. RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s = %d/ %d/ %d(0x%x) ",
  3120. "SM2[AgcT/ AdcB/ SwDacSwing(lvl)]",
  3121. coex_dm->cur_agc_table_en, coex_dm->cur_adc_back_off,
  3122. coex_dm->cur_dac_swing_on, coex_dm->cur_dac_swing_lvl);
  3123. RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s = 0x%x ", "Rate Mask",
  3124. btcoexist->bt_info.ra_mask);
  3125. /* Fw mechanism */
  3126. RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s",
  3127. "============[Fw mechanism]============");
  3128. ps_tdma_case = coex_dm->cur_ps_tdma;
  3129. RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
  3130. "\r\n %-35s = %02x %02x %02x %02x %02x case-%d (auto:%d)",
  3131. "PS TDMA", coex_dm->ps_tdma_para[0],
  3132. coex_dm->ps_tdma_para[1], coex_dm->ps_tdma_para[2],
  3133. coex_dm->ps_tdma_para[3], coex_dm->ps_tdma_para[4],
  3134. ps_tdma_case, coex_dm->auto_tdma_adjust);
  3135. RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s = %d/ %d ",
  3136. "DecBtPwr/ IgnWlanAct",
  3137. coex_dm->cur_dec_bt_pwr, coex_dm->cur_ignore_wlan_act);
  3138. /* Hw setting */
  3139. RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s",
  3140. "============[Hw setting]============");
  3141. RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s = 0x%x",
  3142. "RF-A, 0x1e initVal", coex_dm->bt_rf0x1e_backup);
  3143. RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s = 0x%x/0x%x/0x%x/0x%x",
  3144. "backup ARFR1/ARFR2/RL/AMaxTime", coex_dm->backup_arfr_cnt1,
  3145. coex_dm->backup_arfr_cnt2, coex_dm->backup_retrylimit,
  3146. coex_dm->backup_ampdu_maxtime);
  3147. u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x430);
  3148. u32tmp[1] = btcoexist->btc_read_4byte(btcoexist, 0x434);
  3149. u16tmp[0] = btcoexist->btc_read_2byte(btcoexist, 0x42a);
  3150. u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x456);
  3151. RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s = 0x%x/0x%x/0x%x/0x%x",
  3152. "0x430/0x434/0x42a/0x456",
  3153. u32tmp[0], u32tmp[1], u16tmp[0], u8tmp[0]);
  3154. u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0xc04);
  3155. u32tmp[1] = btcoexist->btc_read_4byte(btcoexist, 0xd04);
  3156. u32tmp[2] = btcoexist->btc_read_4byte(btcoexist, 0x90c);
  3157. RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s = 0x%x/ 0x%x/ 0x%x",
  3158. "0xc04/ 0xd04/ 0x90c", u32tmp[0], u32tmp[1], u32tmp[2]);
  3159. u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x778);
  3160. RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s = 0x%x", "0x778",
  3161. u8tmp[0]);
  3162. u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x92c);
  3163. u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x930);
  3164. RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s = 0x%x/ 0x%x",
  3165. "0x92c/ 0x930", (u8tmp[0]), u32tmp[0]);
  3166. u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x40);
  3167. u8tmp[1] = btcoexist->btc_read_1byte(btcoexist, 0x4f);
  3168. RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s = 0x%x/ 0x%x",
  3169. "0x40/ 0x4f", u8tmp[0], u8tmp[1]);
  3170. u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x550);
  3171. u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x522);
  3172. RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s = 0x%x/ 0x%x",
  3173. "0x550(bcn ctrl)/0x522", u32tmp[0], u8tmp[0]);
  3174. u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0xc50);
  3175. RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s = 0x%x", "0xc50(dig)",
  3176. u32tmp[0]);
  3177. u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x6c0);
  3178. u32tmp[1] = btcoexist->btc_read_4byte(btcoexist, 0x6c4);
  3179. u32tmp[2] = btcoexist->btc_read_4byte(btcoexist, 0x6c8);
  3180. u8tmp[0] = btcoexist->btc_read_1byte(btcoexist, 0x6cc);
  3181. RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
  3182. "\r\n %-35s = 0x%x/ 0x%x/ 0x%x/ 0x%x",
  3183. "0x6c0/0x6c4/0x6c8/0x6cc(coexTable)",
  3184. u32tmp[0], u32tmp[1], u32tmp[2], u8tmp[0]);
  3185. RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s = %d/ %d",
  3186. "0x770(hp rx[31:16]/tx[15:0])",
  3187. coex_sta->high_priority_rx, coex_sta->high_priority_tx);
  3188. RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s = %d/ %d",
  3189. "0x774(lp rx[31:16]/tx[15:0])",
  3190. coex_sta->low_priority_rx, coex_sta->low_priority_tx);
  3191. #if (BT_AUTO_REPORT_ONLY_8192E_2ANT == 1)
  3192. halbtc8192e2ant_monitor_bt_ctr(btcoexist);
  3193. #endif
  3194. btcoexist->btc_disp_dbg_msg(btcoexist, BTC_DBG_DISP_COEX_STATISTICS);
  3195. }
  3196. void ex_halbtc8192e2ant_ips_notify(struct btc_coexist *btcoexist, u8 type)
  3197. {
  3198. if (BTC_IPS_ENTER == type) {
  3199. BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY,
  3200. "[BTCoex], IPS ENTER notify\n");
  3201. coex_sta->under_ips = true;
  3202. halbtc8192e2ant_coex_alloff(btcoexist);
  3203. } else if (BTC_IPS_LEAVE == type) {
  3204. BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY,
  3205. "[BTCoex], IPS LEAVE notify\n");
  3206. coex_sta->under_ips = false;
  3207. }
  3208. }
  3209. void ex_halbtc8192e2ant_lps_notify(struct btc_coexist *btcoexist, u8 type)
  3210. {
  3211. if (BTC_LPS_ENABLE == type) {
  3212. BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY,
  3213. "[BTCoex], LPS ENABLE notify\n");
  3214. coex_sta->under_lps = true;
  3215. } else if (BTC_LPS_DISABLE == type) {
  3216. BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY,
  3217. "[BTCoex], LPS DISABLE notify\n");
  3218. coex_sta->under_lps = false;
  3219. }
  3220. }
  3221. void ex_halbtc8192e2ant_scan_notify(struct btc_coexist *btcoexist, u8 type)
  3222. {
  3223. if (BTC_SCAN_START == type)
  3224. BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY,
  3225. "[BTCoex], SCAN START notify\n");
  3226. else if (BTC_SCAN_FINISH == type)
  3227. BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY,
  3228. "[BTCoex], SCAN FINISH notify\n");
  3229. }
  3230. void ex_halbtc8192e2ant_connect_notify(struct btc_coexist *btcoexist, u8 type)
  3231. {
  3232. if (BTC_ASSOCIATE_START == type)
  3233. BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY,
  3234. "[BTCoex], CONNECT START notify\n");
  3235. else if (BTC_ASSOCIATE_FINISH == type)
  3236. BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY,
  3237. "[BTCoex], CONNECT FINISH notify\n");
  3238. }
  3239. void ex_halbtc8192e2ant_media_status_notify(struct btc_coexist *btcoexist,
  3240. u8 type)
  3241. {
  3242. u8 h2c_parameter[3] = {0};
  3243. u32 wifi_bw;
  3244. u8 wifi_center_chnl;
  3245. if (btcoexist->manual_control ||
  3246. btcoexist->stop_coex_dm ||
  3247. btcoexist->bt_info.bt_disabled)
  3248. return;
  3249. if (BTC_MEDIA_CONNECT == type)
  3250. BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY,
  3251. "[BTCoex], MEDIA connect notify\n");
  3252. else
  3253. BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY,
  3254. "[BTCoex], MEDIA disconnect notify\n");
  3255. /* only 2.4G we need to inform bt the chnl mask */
  3256. btcoexist->btc_get(btcoexist, BTC_GET_U1_WIFI_CENTRAL_CHNL,
  3257. &wifi_center_chnl);
  3258. if ((BTC_MEDIA_CONNECT == type) &&
  3259. (wifi_center_chnl <= 14)) {
  3260. h2c_parameter[0] = 0x1;
  3261. h2c_parameter[1] = wifi_center_chnl;
  3262. btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
  3263. if (BTC_WIFI_BW_HT40 == wifi_bw)
  3264. h2c_parameter[2] = 0x30;
  3265. else
  3266. h2c_parameter[2] = 0x20;
  3267. }
  3268. coex_dm->wifi_chnl_info[0] = h2c_parameter[0];
  3269. coex_dm->wifi_chnl_info[1] = h2c_parameter[1];
  3270. coex_dm->wifi_chnl_info[2] = h2c_parameter[2];
  3271. BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE_FW_EXEC,
  3272. "[BTCoex], FW write 0x66 = 0x%x\n",
  3273. h2c_parameter[0] << 16 | h2c_parameter[1] << 8 |
  3274. h2c_parameter[2]);
  3275. btcoexist->btc_fill_h2c(btcoexist, 0x66, 3, h2c_parameter);
  3276. }
  3277. void ex_halbtc8192e2ant_special_packet_notify(struct btc_coexist *btcoexist,
  3278. u8 type)
  3279. {
  3280. if (type == BTC_PACKET_DHCP)
  3281. BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY,
  3282. "[BTCoex], DHCP Packet notify\n");
  3283. }
  3284. void ex_halbtc8192e2ant_bt_info_notify(struct btc_coexist *btcoexist,
  3285. u8 *tmp_buf, u8 length)
  3286. {
  3287. u8 bt_info = 0;
  3288. u8 i, rsp_source = 0;
  3289. bool bt_busy = false, limited_dig = false;
  3290. bool wifi_connected = false;
  3291. coex_sta->c2h_bt_info_req_sent = false;
  3292. rsp_source = tmp_buf[0] & 0xf;
  3293. if (rsp_source >= BT_INFO_SRC_8192E_2ANT_MAX)
  3294. rsp_source = BT_INFO_SRC_8192E_2ANT_WIFI_FW;
  3295. coex_sta->bt_info_c2h_cnt[rsp_source]++;
  3296. BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY,
  3297. "[BTCoex], Bt info[%d], length=%d, hex data = [",
  3298. rsp_source, length);
  3299. for (i = 0; i < length; i++) {
  3300. coex_sta->bt_info_c2h[rsp_source][i] = tmp_buf[i];
  3301. if (i == 1)
  3302. bt_info = tmp_buf[i];
  3303. if (i == length-1)
  3304. BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY,
  3305. "0x%02x]\n", tmp_buf[i]);
  3306. else
  3307. BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY,
  3308. "0x%02x, ", tmp_buf[i]);
  3309. }
  3310. if (BT_INFO_SRC_8192E_2ANT_WIFI_FW != rsp_source) {
  3311. coex_sta->bt_retry_cnt = /* [3:0] */
  3312. coex_sta->bt_info_c2h[rsp_source][2] & 0xf;
  3313. coex_sta->bt_rssi =
  3314. coex_sta->bt_info_c2h[rsp_source][3] * 2 + 10;
  3315. coex_sta->bt_info_ext =
  3316. coex_sta->bt_info_c2h[rsp_source][4];
  3317. /* Here we need to resend some wifi info to BT
  3318. * because bt is reset and loss of the info.
  3319. */
  3320. if ((coex_sta->bt_info_ext & BIT1)) {
  3321. BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
  3322. "bit1, send wifi BW&Chnl to BT!!\n");
  3323. btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED,
  3324. &wifi_connected);
  3325. if (wifi_connected)
  3326. ex_halbtc8192e2ant_media_status_notify(
  3327. btcoexist,
  3328. BTC_MEDIA_CONNECT);
  3329. else
  3330. ex_halbtc8192e2ant_media_status_notify(
  3331. btcoexist,
  3332. BTC_MEDIA_DISCONNECT);
  3333. }
  3334. if ((coex_sta->bt_info_ext & BIT3)) {
  3335. if (!btcoexist->manual_control &&
  3336. !btcoexist->stop_coex_dm) {
  3337. BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
  3338. "bit3, BT NOT ignore Wlan active!\n");
  3339. halbtc8192e2ant_IgnoreWlanAct(btcoexist,
  3340. FORCE_EXEC,
  3341. false);
  3342. }
  3343. } else {
  3344. /* BT already NOT ignore Wlan active,
  3345. * do nothing here.
  3346. */
  3347. }
  3348. #if (BT_AUTO_REPORT_ONLY_8192E_2ANT == 0)
  3349. if ((coex_sta->bt_info_ext & BIT4)) {
  3350. /* BT auto report already enabled, do nothing */
  3351. } else {
  3352. halbtc8192e2ant_bt_autoreport(btcoexist, FORCE_EXEC,
  3353. true);
  3354. }
  3355. #endif
  3356. }
  3357. /* check BIT2 first ==> check if bt is under inquiry or page scan */
  3358. if (bt_info & BT_INFO_8192E_2ANT_B_INQ_PAGE)
  3359. coex_sta->c2h_bt_inquiry_page = true;
  3360. else
  3361. coex_sta->c2h_bt_inquiry_page = false;
  3362. /* set link exist status */
  3363. if (!(bt_info&BT_INFO_8192E_2ANT_B_CONNECTION)) {
  3364. coex_sta->bt_link_exist = false;
  3365. coex_sta->pan_exist = false;
  3366. coex_sta->a2dp_exist = false;
  3367. coex_sta->hid_exist = false;
  3368. coex_sta->sco_exist = false;
  3369. } else {/* connection exists */
  3370. coex_sta->bt_link_exist = true;
  3371. if (bt_info & BT_INFO_8192E_2ANT_B_FTP)
  3372. coex_sta->pan_exist = true;
  3373. else
  3374. coex_sta->pan_exist = false;
  3375. if (bt_info & BT_INFO_8192E_2ANT_B_A2DP)
  3376. coex_sta->a2dp_exist = true;
  3377. else
  3378. coex_sta->a2dp_exist = false;
  3379. if (bt_info & BT_INFO_8192E_2ANT_B_HID)
  3380. coex_sta->hid_exist = true;
  3381. else
  3382. coex_sta->hid_exist = false;
  3383. if (bt_info & BT_INFO_8192E_2ANT_B_SCO_ESCO)
  3384. coex_sta->sco_exist = true;
  3385. else
  3386. coex_sta->sco_exist = false;
  3387. }
  3388. halbtc8192e2ant_update_btlink_info(btcoexist);
  3389. if (!(bt_info&BT_INFO_8192E_2ANT_B_CONNECTION)) {
  3390. coex_dm->bt_status = BT_8192E_2ANT_BT_STATUS_NON_CONNECTED_IDLE;
  3391. BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
  3392. "[BTCoex], BT Non-Connected idle!!!\n");
  3393. } else if (bt_info == BT_INFO_8192E_2ANT_B_CONNECTION) {
  3394. coex_dm->bt_status = BT_8192E_2ANT_BT_STATUS_CONNECTED_IDLE;
  3395. BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
  3396. "[BTCoex], bt_infoNotify(), BT Connected-idle!!!\n");
  3397. } else if ((bt_info&BT_INFO_8192E_2ANT_B_SCO_ESCO) ||
  3398. (bt_info&BT_INFO_8192E_2ANT_B_SCO_BUSY)) {
  3399. coex_dm->bt_status = BT_8192E_2ANT_BT_STATUS_SCO_BUSY;
  3400. BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
  3401. "[BTCoex], bt_infoNotify(), BT SCO busy!!!\n");
  3402. } else if (bt_info&BT_INFO_8192E_2ANT_B_ACL_BUSY) {
  3403. coex_dm->bt_status = BT_8192E_2ANT_BT_STATUS_ACL_BUSY;
  3404. BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
  3405. "[BTCoex], bt_infoNotify(), BT ACL busy!!!\n");
  3406. } else {
  3407. coex_dm->bt_status = BT_8192E_2ANT_BT_STATUS_MAX;
  3408. BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
  3409. "[BTCoex]bt_infoNotify(), BT Non-Defined state!!!\n");
  3410. }
  3411. if ((BT_8192E_2ANT_BT_STATUS_ACL_BUSY == coex_dm->bt_status) ||
  3412. (BT_8192E_2ANT_BT_STATUS_SCO_BUSY == coex_dm->bt_status) ||
  3413. (BT_8192E_2ANT_BT_STATUS_ACL_SCO_BUSY == coex_dm->bt_status)) {
  3414. bt_busy = true;
  3415. limited_dig = true;
  3416. } else {
  3417. bt_busy = false;
  3418. limited_dig = false;
  3419. }
  3420. btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_TRAFFIC_BUSY, &bt_busy);
  3421. coex_dm->limited_dig = limited_dig;
  3422. btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_LIMITED_DIG, &limited_dig);
  3423. halbtc8192e2ant_run_coexist_mechanism(btcoexist);
  3424. }
  3425. void ex_halbtc8192e2ant_stack_operation_notify(struct btc_coexist *btcoexist,
  3426. u8 type)
  3427. {
  3428. }
  3429. void ex_halbtc8192e2ant_halt_notify(struct btc_coexist *btcoexist)
  3430. {
  3431. BTC_PRINT(BTC_MSG_INTERFACE, INTF_NOTIFY, "[BTCoex], Halt notify\n");
  3432. halbtc8192e2ant_IgnoreWlanAct(btcoexist, FORCE_EXEC, true);
  3433. ex_halbtc8192e2ant_media_status_notify(btcoexist, BTC_MEDIA_DISCONNECT);
  3434. }
  3435. void ex_halbtc8192e2ant_periodical(struct btc_coexist *btcoexist)
  3436. {
  3437. static u8 dis_ver_info_cnt;
  3438. u32 fw_ver = 0, bt_patch_ver = 0;
  3439. struct btc_board_info *board_info = &btcoexist->board_info;
  3440. struct btc_stack_info *stack_info = &btcoexist->stack_info;
  3441. BTC_PRINT(BTC_MSG_ALGORITHM, ALGO_TRACE,
  3442. "=======================Periodical=======================\n");
  3443. if (dis_ver_info_cnt <= 5) {
  3444. dis_ver_info_cnt += 1;
  3445. BTC_PRINT(BTC_MSG_INTERFACE, INTF_INIT,
  3446. "************************************************\n");
  3447. BTC_PRINT(BTC_MSG_INTERFACE, INTF_INIT,
  3448. "Ant PG Num/ Ant Mech/ Ant Pos = %d/ %d/ %d\n",
  3449. board_info->pg_ant_num, board_info->btdm_ant_num,
  3450. board_info->btdm_ant_pos);
  3451. BTC_PRINT(BTC_MSG_INTERFACE, INTF_INIT,
  3452. "BT stack/ hci ext ver = %s / %d\n",
  3453. ((stack_info->profile_notified) ? "Yes" : "No"),
  3454. stack_info->hci_version);
  3455. btcoexist->btc_get(btcoexist, BTC_GET_U4_BT_PATCH_VER,
  3456. &bt_patch_ver);
  3457. btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_FW_VER, &fw_ver);
  3458. BTC_PRINT(BTC_MSG_INTERFACE, INTF_INIT,
  3459. "CoexVer/ FwVer/ PatchVer = %d_%x/ 0x%x/ 0x%x(%d)\n",
  3460. glcoex_ver_date_8192e_2ant, glcoex_ver_8192e_2ant,
  3461. fw_ver, bt_patch_ver, bt_patch_ver);
  3462. BTC_PRINT(BTC_MSG_INTERFACE, INTF_INIT,
  3463. "************************************************\n");
  3464. }
  3465. #if (BT_AUTO_REPORT_ONLY_8192E_2ANT == 0)
  3466. halbtc8192e2ant_querybt_info(btcoexist);
  3467. halbtc8192e2ant_monitor_bt_ctr(btcoexist);
  3468. btc8192e2ant_monitor_bt_enable_dis(btcoexist);
  3469. #else
  3470. if (halbtc8192e2ant_iswifi_status_changed(btcoexist) ||
  3471. coex_dm->auto_tdma_adjust)
  3472. halbtc8192e2ant_run_coexist_mechanism(btcoexist);
  3473. #endif
  3474. }