dev.c 49 KB

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  1. /*
  2. * Linux device driver for RTL8187
  3. *
  4. * Copyright 2007 Michael Wu <flamingice@sourmilk.net>
  5. * Copyright 2007 Andrea Merello <andrea.merello@gmail.com>
  6. *
  7. * Based on the r8187 driver, which is:
  8. * Copyright 2005 Andrea Merello <andrea.merello@gmail.com>, et al.
  9. *
  10. * The driver was extended to the RTL8187B in 2008 by:
  11. * Herton Ronaldo Krzesinski <herton@mandriva.com.br>
  12. * Hin-Tak Leung <htl10@users.sourceforge.net>
  13. * Larry Finger <Larry.Finger@lwfinger.net>
  14. *
  15. * Magic delays and register offsets below are taken from the original
  16. * r8187 driver sources. Thanks to Realtek for their support!
  17. *
  18. * This program is free software; you can redistribute it and/or modify
  19. * it under the terms of the GNU General Public License version 2 as
  20. * published by the Free Software Foundation.
  21. */
  22. #include <linux/usb.h>
  23. #include <linux/slab.h>
  24. #include <linux/delay.h>
  25. #include <linux/etherdevice.h>
  26. #include <linux/eeprom_93cx6.h>
  27. #include <linux/module.h>
  28. #include <net/mac80211.h>
  29. #include "rtl8187.h"
  30. #include "rtl8225.h"
  31. #ifdef CONFIG_RTL8187_LEDS
  32. #include "leds.h"
  33. #endif
  34. #include "rfkill.h"
  35. MODULE_AUTHOR("Michael Wu <flamingice@sourmilk.net>");
  36. MODULE_AUTHOR("Andrea Merello <andrea.merello@gmail.com>");
  37. MODULE_AUTHOR("Herton Ronaldo Krzesinski <herton@mandriva.com.br>");
  38. MODULE_AUTHOR("Hin-Tak Leung <htl10@users.sourceforge.net>");
  39. MODULE_AUTHOR("Larry Finger <Larry.Finger@lwfinger.net>");
  40. MODULE_DESCRIPTION("RTL8187/RTL8187B USB wireless driver");
  41. MODULE_LICENSE("GPL");
  42. static struct usb_device_id rtl8187_table[] = {
  43. /* Asus */
  44. {USB_DEVICE(0x0b05, 0x171d), .driver_info = DEVICE_RTL8187},
  45. /* Belkin */
  46. {USB_DEVICE(0x050d, 0x705e), .driver_info = DEVICE_RTL8187B},
  47. /* Realtek */
  48. {USB_DEVICE(0x0bda, 0x8187), .driver_info = DEVICE_RTL8187},
  49. {USB_DEVICE(0x0bda, 0x8189), .driver_info = DEVICE_RTL8187B},
  50. {USB_DEVICE(0x0bda, 0x8197), .driver_info = DEVICE_RTL8187B},
  51. {USB_DEVICE(0x0bda, 0x8198), .driver_info = DEVICE_RTL8187B},
  52. /* Surecom */
  53. {USB_DEVICE(0x0769, 0x11F2), .driver_info = DEVICE_RTL8187},
  54. /* Logitech */
  55. {USB_DEVICE(0x0789, 0x010C), .driver_info = DEVICE_RTL8187},
  56. /* Netgear */
  57. {USB_DEVICE(0x0846, 0x6100), .driver_info = DEVICE_RTL8187},
  58. {USB_DEVICE(0x0846, 0x6a00), .driver_info = DEVICE_RTL8187},
  59. {USB_DEVICE(0x0846, 0x4260), .driver_info = DEVICE_RTL8187B},
  60. /* HP */
  61. {USB_DEVICE(0x03f0, 0xca02), .driver_info = DEVICE_RTL8187},
  62. /* Sitecom */
  63. {USB_DEVICE(0x0df6, 0x000d), .driver_info = DEVICE_RTL8187},
  64. {USB_DEVICE(0x0df6, 0x0028), .driver_info = DEVICE_RTL8187B},
  65. {USB_DEVICE(0x0df6, 0x0029), .driver_info = DEVICE_RTL8187B},
  66. /* Sphairon Access Systems GmbH */
  67. {USB_DEVICE(0x114B, 0x0150), .driver_info = DEVICE_RTL8187},
  68. /* Dick Smith Electronics */
  69. {USB_DEVICE(0x1371, 0x9401), .driver_info = DEVICE_RTL8187},
  70. /* Abocom */
  71. {USB_DEVICE(0x13d1, 0xabe6), .driver_info = DEVICE_RTL8187},
  72. /* Qcom */
  73. {USB_DEVICE(0x18E8, 0x6232), .driver_info = DEVICE_RTL8187},
  74. /* AirLive */
  75. {USB_DEVICE(0x1b75, 0x8187), .driver_info = DEVICE_RTL8187},
  76. /* Linksys */
  77. {USB_DEVICE(0x1737, 0x0073), .driver_info = DEVICE_RTL8187B},
  78. {}
  79. };
  80. MODULE_DEVICE_TABLE(usb, rtl8187_table);
  81. static const struct ieee80211_rate rtl818x_rates[] = {
  82. { .bitrate = 10, .hw_value = 0, },
  83. { .bitrate = 20, .hw_value = 1, },
  84. { .bitrate = 55, .hw_value = 2, },
  85. { .bitrate = 110, .hw_value = 3, },
  86. { .bitrate = 60, .hw_value = 4, },
  87. { .bitrate = 90, .hw_value = 5, },
  88. { .bitrate = 120, .hw_value = 6, },
  89. { .bitrate = 180, .hw_value = 7, },
  90. { .bitrate = 240, .hw_value = 8, },
  91. { .bitrate = 360, .hw_value = 9, },
  92. { .bitrate = 480, .hw_value = 10, },
  93. { .bitrate = 540, .hw_value = 11, },
  94. };
  95. static const struct ieee80211_channel rtl818x_channels[] = {
  96. { .center_freq = 2412 },
  97. { .center_freq = 2417 },
  98. { .center_freq = 2422 },
  99. { .center_freq = 2427 },
  100. { .center_freq = 2432 },
  101. { .center_freq = 2437 },
  102. { .center_freq = 2442 },
  103. { .center_freq = 2447 },
  104. { .center_freq = 2452 },
  105. { .center_freq = 2457 },
  106. { .center_freq = 2462 },
  107. { .center_freq = 2467 },
  108. { .center_freq = 2472 },
  109. { .center_freq = 2484 },
  110. };
  111. static void rtl8187_iowrite_async_cb(struct urb *urb)
  112. {
  113. kfree(urb->context);
  114. }
  115. static void rtl8187_iowrite_async(struct rtl8187_priv *priv, __le16 addr,
  116. void *data, u16 len)
  117. {
  118. struct usb_ctrlrequest *dr;
  119. struct urb *urb;
  120. struct rtl8187_async_write_data {
  121. u8 data[4];
  122. struct usb_ctrlrequest dr;
  123. } *buf;
  124. int rc;
  125. buf = kmalloc(sizeof(*buf), GFP_ATOMIC);
  126. if (!buf)
  127. return;
  128. urb = usb_alloc_urb(0, GFP_ATOMIC);
  129. if (!urb) {
  130. kfree(buf);
  131. return;
  132. }
  133. dr = &buf->dr;
  134. dr->bRequestType = RTL8187_REQT_WRITE;
  135. dr->bRequest = RTL8187_REQ_SET_REG;
  136. dr->wValue = addr;
  137. dr->wIndex = 0;
  138. dr->wLength = cpu_to_le16(len);
  139. memcpy(buf, data, len);
  140. usb_fill_control_urb(urb, priv->udev, usb_sndctrlpipe(priv->udev, 0),
  141. (unsigned char *)dr, buf, len,
  142. rtl8187_iowrite_async_cb, buf);
  143. usb_anchor_urb(urb, &priv->anchored);
  144. rc = usb_submit_urb(urb, GFP_ATOMIC);
  145. if (rc < 0) {
  146. kfree(buf);
  147. usb_unanchor_urb(urb);
  148. }
  149. usb_free_urb(urb);
  150. }
  151. static inline void rtl818x_iowrite32_async(struct rtl8187_priv *priv,
  152. __le32 *addr, u32 val)
  153. {
  154. __le32 buf = cpu_to_le32(val);
  155. rtl8187_iowrite_async(priv, cpu_to_le16((unsigned long)addr),
  156. &buf, sizeof(buf));
  157. }
  158. void rtl8187_write_phy(struct ieee80211_hw *dev, u8 addr, u32 data)
  159. {
  160. struct rtl8187_priv *priv = dev->priv;
  161. data <<= 8;
  162. data |= addr | 0x80;
  163. rtl818x_iowrite8(priv, &priv->map->PHY[3], (data >> 24) & 0xFF);
  164. rtl818x_iowrite8(priv, &priv->map->PHY[2], (data >> 16) & 0xFF);
  165. rtl818x_iowrite8(priv, &priv->map->PHY[1], (data >> 8) & 0xFF);
  166. rtl818x_iowrite8(priv, &priv->map->PHY[0], data & 0xFF);
  167. }
  168. static void rtl8187_tx_cb(struct urb *urb)
  169. {
  170. struct sk_buff *skb = (struct sk_buff *)urb->context;
  171. struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
  172. struct ieee80211_hw *hw = info->rate_driver_data[0];
  173. struct rtl8187_priv *priv = hw->priv;
  174. skb_pull(skb, priv->is_rtl8187b ? sizeof(struct rtl8187b_tx_hdr) :
  175. sizeof(struct rtl8187_tx_hdr));
  176. ieee80211_tx_info_clear_status(info);
  177. if (!(urb->status) && !(info->flags & IEEE80211_TX_CTL_NO_ACK)) {
  178. if (priv->is_rtl8187b) {
  179. skb_queue_tail(&priv->b_tx_status.queue, skb);
  180. /* queue is "full", discard last items */
  181. while (skb_queue_len(&priv->b_tx_status.queue) > 5) {
  182. struct sk_buff *old_skb;
  183. dev_dbg(&priv->udev->dev,
  184. "transmit status queue full\n");
  185. old_skb = skb_dequeue(&priv->b_tx_status.queue);
  186. ieee80211_tx_status_irqsafe(hw, old_skb);
  187. }
  188. return;
  189. } else {
  190. info->flags |= IEEE80211_TX_STAT_ACK;
  191. }
  192. }
  193. if (priv->is_rtl8187b)
  194. ieee80211_tx_status_irqsafe(hw, skb);
  195. else {
  196. /* Retry information for the RTI8187 is only available by
  197. * reading a register in the device. We are in interrupt mode
  198. * here, thus queue the skb and finish on a work queue. */
  199. skb_queue_tail(&priv->b_tx_status.queue, skb);
  200. ieee80211_queue_delayed_work(hw, &priv->work, 0);
  201. }
  202. }
  203. static void rtl8187_tx(struct ieee80211_hw *dev,
  204. struct ieee80211_tx_control *control,
  205. struct sk_buff *skb)
  206. {
  207. struct rtl8187_priv *priv = dev->priv;
  208. struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
  209. struct ieee80211_hdr *tx_hdr = (struct ieee80211_hdr *)(skb->data);
  210. unsigned int ep;
  211. void *buf;
  212. struct urb *urb;
  213. __le16 rts_dur = 0;
  214. u32 flags;
  215. int rc;
  216. urb = usb_alloc_urb(0, GFP_ATOMIC);
  217. if (!urb) {
  218. kfree_skb(skb);
  219. return;
  220. }
  221. flags = skb->len;
  222. flags |= RTL818X_TX_DESC_FLAG_NO_ENC;
  223. flags |= ieee80211_get_tx_rate(dev, info)->hw_value << 24;
  224. if (ieee80211_has_morefrags(tx_hdr->frame_control))
  225. flags |= RTL818X_TX_DESC_FLAG_MOREFRAG;
  226. /* HW will perform RTS-CTS when only RTS flags is set.
  227. * HW will perform CTS-to-self when both RTS and CTS flags are set.
  228. * RTS rate and RTS duration will be used also for CTS-to-self.
  229. */
  230. if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_RTS_CTS) {
  231. flags |= RTL818X_TX_DESC_FLAG_RTS;
  232. flags |= ieee80211_get_rts_cts_rate(dev, info)->hw_value << 19;
  233. rts_dur = ieee80211_rts_duration(dev, priv->vif,
  234. skb->len, info);
  235. } else if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
  236. flags |= RTL818X_TX_DESC_FLAG_RTS | RTL818X_TX_DESC_FLAG_CTS;
  237. flags |= ieee80211_get_rts_cts_rate(dev, info)->hw_value << 19;
  238. rts_dur = ieee80211_ctstoself_duration(dev, priv->vif,
  239. skb->len, info);
  240. }
  241. if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
  242. if (info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT)
  243. priv->seqno += 0x10;
  244. tx_hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
  245. tx_hdr->seq_ctrl |= cpu_to_le16(priv->seqno);
  246. }
  247. if (!priv->is_rtl8187b) {
  248. struct rtl8187_tx_hdr *hdr =
  249. (struct rtl8187_tx_hdr *)skb_push(skb, sizeof(*hdr));
  250. hdr->flags = cpu_to_le32(flags);
  251. hdr->len = 0;
  252. hdr->rts_duration = rts_dur;
  253. hdr->retry = cpu_to_le32((info->control.rates[0].count - 1) << 8);
  254. buf = hdr;
  255. ep = 2;
  256. } else {
  257. /* fc needs to be calculated before skb_push() */
  258. unsigned int epmap[4] = { 6, 7, 5, 4 };
  259. u16 fc = le16_to_cpu(tx_hdr->frame_control);
  260. struct rtl8187b_tx_hdr *hdr =
  261. (struct rtl8187b_tx_hdr *)skb_push(skb, sizeof(*hdr));
  262. struct ieee80211_rate *txrate =
  263. ieee80211_get_tx_rate(dev, info);
  264. memset(hdr, 0, sizeof(*hdr));
  265. hdr->flags = cpu_to_le32(flags);
  266. hdr->rts_duration = rts_dur;
  267. hdr->retry = cpu_to_le32((info->control.rates[0].count - 1) << 8);
  268. hdr->tx_duration =
  269. ieee80211_generic_frame_duration(dev, priv->vif,
  270. info->band,
  271. skb->len, txrate);
  272. buf = hdr;
  273. if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT)
  274. ep = 12;
  275. else
  276. ep = epmap[skb_get_queue_mapping(skb)];
  277. }
  278. info->rate_driver_data[0] = dev;
  279. info->rate_driver_data[1] = urb;
  280. usb_fill_bulk_urb(urb, priv->udev, usb_sndbulkpipe(priv->udev, ep),
  281. buf, skb->len, rtl8187_tx_cb, skb);
  282. urb->transfer_flags |= URB_ZERO_PACKET;
  283. usb_anchor_urb(urb, &priv->anchored);
  284. rc = usb_submit_urb(urb, GFP_ATOMIC);
  285. if (rc < 0) {
  286. usb_unanchor_urb(urb);
  287. kfree_skb(skb);
  288. }
  289. usb_free_urb(urb);
  290. }
  291. static void rtl8187_rx_cb(struct urb *urb)
  292. {
  293. struct sk_buff *skb = (struct sk_buff *)urb->context;
  294. struct rtl8187_rx_info *info = (struct rtl8187_rx_info *)skb->cb;
  295. struct ieee80211_hw *dev = info->dev;
  296. struct rtl8187_priv *priv = dev->priv;
  297. struct ieee80211_rx_status rx_status = { 0 };
  298. int rate, signal;
  299. u32 flags;
  300. unsigned long f;
  301. spin_lock_irqsave(&priv->rx_queue.lock, f);
  302. __skb_unlink(skb, &priv->rx_queue);
  303. spin_unlock_irqrestore(&priv->rx_queue.lock, f);
  304. skb_put(skb, urb->actual_length);
  305. if (unlikely(urb->status)) {
  306. dev_kfree_skb_irq(skb);
  307. return;
  308. }
  309. if (!priv->is_rtl8187b) {
  310. struct rtl8187_rx_hdr *hdr =
  311. (typeof(hdr))(skb_tail_pointer(skb) - sizeof(*hdr));
  312. flags = le32_to_cpu(hdr->flags);
  313. /* As with the RTL8187B below, the AGC is used to calculate
  314. * signal strength. In this case, the scaling
  315. * constants are derived from the output of p54usb.
  316. */
  317. signal = -4 - ((27 * hdr->agc) >> 6);
  318. rx_status.antenna = (hdr->signal >> 7) & 1;
  319. rx_status.mactime = le64_to_cpu(hdr->mac_time);
  320. } else {
  321. struct rtl8187b_rx_hdr *hdr =
  322. (typeof(hdr))(skb_tail_pointer(skb) - sizeof(*hdr));
  323. /* The Realtek datasheet for the RTL8187B shows that the RX
  324. * header contains the following quantities: signal quality,
  325. * RSSI, AGC, the received power in dB, and the measured SNR.
  326. * In testing, none of these quantities show qualitative
  327. * agreement with AP signal strength, except for the AGC,
  328. * which is inversely proportional to the strength of the
  329. * signal. In the following, the signal strength
  330. * is derived from the AGC. The arbitrary scaling constants
  331. * are chosen to make the results close to the values obtained
  332. * for a BCM4312 using b43 as the driver. The noise is ignored
  333. * for now.
  334. */
  335. flags = le32_to_cpu(hdr->flags);
  336. signal = 14 - hdr->agc / 2;
  337. rx_status.antenna = (hdr->rssi >> 7) & 1;
  338. rx_status.mactime = le64_to_cpu(hdr->mac_time);
  339. }
  340. rx_status.signal = signal;
  341. priv->signal = signal;
  342. rate = (flags >> 20) & 0xF;
  343. skb_trim(skb, flags & 0x0FFF);
  344. rx_status.rate_idx = rate;
  345. rx_status.freq = dev->conf.chandef.chan->center_freq;
  346. rx_status.band = dev->conf.chandef.chan->band;
  347. rx_status.flag |= RX_FLAG_MACTIME_START;
  348. if (flags & RTL818X_RX_DESC_FLAG_SPLCP)
  349. rx_status.flag |= RX_FLAG_SHORTPRE;
  350. if (flags & RTL818X_RX_DESC_FLAG_CRC32_ERR)
  351. rx_status.flag |= RX_FLAG_FAILED_FCS_CRC;
  352. memcpy(IEEE80211_SKB_RXCB(skb), &rx_status, sizeof(rx_status));
  353. ieee80211_rx_irqsafe(dev, skb);
  354. skb = dev_alloc_skb(RTL8187_MAX_RX);
  355. if (unlikely(!skb)) {
  356. /* TODO check rx queue length and refill *somewhere* */
  357. return;
  358. }
  359. info = (struct rtl8187_rx_info *)skb->cb;
  360. info->urb = urb;
  361. info->dev = dev;
  362. urb->transfer_buffer = skb_tail_pointer(skb);
  363. urb->context = skb;
  364. skb_queue_tail(&priv->rx_queue, skb);
  365. usb_anchor_urb(urb, &priv->anchored);
  366. if (usb_submit_urb(urb, GFP_ATOMIC)) {
  367. usb_unanchor_urb(urb);
  368. skb_unlink(skb, &priv->rx_queue);
  369. dev_kfree_skb_irq(skb);
  370. }
  371. }
  372. static int rtl8187_init_urbs(struct ieee80211_hw *dev)
  373. {
  374. struct rtl8187_priv *priv = dev->priv;
  375. struct urb *entry = NULL;
  376. struct sk_buff *skb;
  377. struct rtl8187_rx_info *info;
  378. int ret = 0;
  379. while (skb_queue_len(&priv->rx_queue) < 32) {
  380. skb = __dev_alloc_skb(RTL8187_MAX_RX, GFP_KERNEL);
  381. if (!skb) {
  382. ret = -ENOMEM;
  383. goto err;
  384. }
  385. entry = usb_alloc_urb(0, GFP_KERNEL);
  386. if (!entry) {
  387. ret = -ENOMEM;
  388. goto err;
  389. }
  390. usb_fill_bulk_urb(entry, priv->udev,
  391. usb_rcvbulkpipe(priv->udev,
  392. priv->is_rtl8187b ? 3 : 1),
  393. skb_tail_pointer(skb),
  394. RTL8187_MAX_RX, rtl8187_rx_cb, skb);
  395. info = (struct rtl8187_rx_info *)skb->cb;
  396. info->urb = entry;
  397. info->dev = dev;
  398. skb_queue_tail(&priv->rx_queue, skb);
  399. usb_anchor_urb(entry, &priv->anchored);
  400. ret = usb_submit_urb(entry, GFP_KERNEL);
  401. usb_put_urb(entry);
  402. if (ret) {
  403. skb_unlink(skb, &priv->rx_queue);
  404. usb_unanchor_urb(entry);
  405. goto err;
  406. }
  407. }
  408. return ret;
  409. err:
  410. kfree_skb(skb);
  411. usb_kill_anchored_urbs(&priv->anchored);
  412. return ret;
  413. }
  414. static void rtl8187b_status_cb(struct urb *urb)
  415. {
  416. struct ieee80211_hw *hw = (struct ieee80211_hw *)urb->context;
  417. struct rtl8187_priv *priv = hw->priv;
  418. u64 val;
  419. unsigned int cmd_type;
  420. if (unlikely(urb->status))
  421. return;
  422. /*
  423. * Read from status buffer:
  424. *
  425. * bits [30:31] = cmd type:
  426. * - 0 indicates tx beacon interrupt
  427. * - 1 indicates tx close descriptor
  428. *
  429. * In the case of tx beacon interrupt:
  430. * [0:9] = Last Beacon CW
  431. * [10:29] = reserved
  432. * [30:31] = 00b
  433. * [32:63] = Last Beacon TSF
  434. *
  435. * If it's tx close descriptor:
  436. * [0:7] = Packet Retry Count
  437. * [8:14] = RTS Retry Count
  438. * [15] = TOK
  439. * [16:27] = Sequence No
  440. * [28] = LS
  441. * [29] = FS
  442. * [30:31] = 01b
  443. * [32:47] = unused (reserved?)
  444. * [48:63] = MAC Used Time
  445. */
  446. val = le64_to_cpu(priv->b_tx_status.buf);
  447. cmd_type = (val >> 30) & 0x3;
  448. if (cmd_type == 1) {
  449. unsigned int pkt_rc, seq_no;
  450. bool tok;
  451. struct sk_buff *skb;
  452. struct ieee80211_hdr *ieee80211hdr;
  453. unsigned long flags;
  454. pkt_rc = val & 0xFF;
  455. tok = val & (1 << 15);
  456. seq_no = (val >> 16) & 0xFFF;
  457. spin_lock_irqsave(&priv->b_tx_status.queue.lock, flags);
  458. skb_queue_reverse_walk(&priv->b_tx_status.queue, skb) {
  459. ieee80211hdr = (struct ieee80211_hdr *)skb->data;
  460. /*
  461. * While testing, it was discovered that the seq_no
  462. * doesn't actually contains the sequence number.
  463. * Instead of returning just the 12 bits of sequence
  464. * number, hardware is returning entire sequence control
  465. * (fragment number plus sequence number) in a 12 bit
  466. * only field overflowing after some time. As a
  467. * workaround, just consider the lower bits, and expect
  468. * it's unlikely we wrongly ack some sent data
  469. */
  470. if ((le16_to_cpu(ieee80211hdr->seq_ctrl)
  471. & 0xFFF) == seq_no)
  472. break;
  473. }
  474. if (skb != (struct sk_buff *) &priv->b_tx_status.queue) {
  475. struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
  476. __skb_unlink(skb, &priv->b_tx_status.queue);
  477. if (tok)
  478. info->flags |= IEEE80211_TX_STAT_ACK;
  479. info->status.rates[0].count = pkt_rc + 1;
  480. ieee80211_tx_status_irqsafe(hw, skb);
  481. }
  482. spin_unlock_irqrestore(&priv->b_tx_status.queue.lock, flags);
  483. }
  484. usb_anchor_urb(urb, &priv->anchored);
  485. if (usb_submit_urb(urb, GFP_ATOMIC))
  486. usb_unanchor_urb(urb);
  487. }
  488. static int rtl8187b_init_status_urb(struct ieee80211_hw *dev)
  489. {
  490. struct rtl8187_priv *priv = dev->priv;
  491. struct urb *entry;
  492. int ret = 0;
  493. entry = usb_alloc_urb(0, GFP_KERNEL);
  494. if (!entry)
  495. return -ENOMEM;
  496. usb_fill_bulk_urb(entry, priv->udev, usb_rcvbulkpipe(priv->udev, 9),
  497. &priv->b_tx_status.buf, sizeof(priv->b_tx_status.buf),
  498. rtl8187b_status_cb, dev);
  499. usb_anchor_urb(entry, &priv->anchored);
  500. ret = usb_submit_urb(entry, GFP_KERNEL);
  501. if (ret)
  502. usb_unanchor_urb(entry);
  503. usb_free_urb(entry);
  504. return ret;
  505. }
  506. static void rtl8187_set_anaparam(struct rtl8187_priv *priv, bool rfon)
  507. {
  508. u32 anaparam, anaparam2;
  509. u8 anaparam3, reg;
  510. if (!priv->is_rtl8187b) {
  511. if (rfon) {
  512. anaparam = RTL8187_RTL8225_ANAPARAM_ON;
  513. anaparam2 = RTL8187_RTL8225_ANAPARAM2_ON;
  514. } else {
  515. anaparam = RTL8187_RTL8225_ANAPARAM_OFF;
  516. anaparam2 = RTL8187_RTL8225_ANAPARAM2_OFF;
  517. }
  518. } else {
  519. if (rfon) {
  520. anaparam = RTL8187B_RTL8225_ANAPARAM_ON;
  521. anaparam2 = RTL8187B_RTL8225_ANAPARAM2_ON;
  522. anaparam3 = RTL8187B_RTL8225_ANAPARAM3_ON;
  523. } else {
  524. anaparam = RTL8187B_RTL8225_ANAPARAM_OFF;
  525. anaparam2 = RTL8187B_RTL8225_ANAPARAM2_OFF;
  526. anaparam3 = RTL8187B_RTL8225_ANAPARAM3_OFF;
  527. }
  528. }
  529. rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
  530. RTL818X_EEPROM_CMD_CONFIG);
  531. reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
  532. reg |= RTL818X_CONFIG3_ANAPARAM_WRITE;
  533. rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg);
  534. rtl818x_iowrite32(priv, &priv->map->ANAPARAM, anaparam);
  535. rtl818x_iowrite32(priv, &priv->map->ANAPARAM2, anaparam2);
  536. if (priv->is_rtl8187b)
  537. rtl818x_iowrite8(priv, &priv->map->ANAPARAM3A, anaparam3);
  538. reg &= ~RTL818X_CONFIG3_ANAPARAM_WRITE;
  539. rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg);
  540. rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
  541. RTL818X_EEPROM_CMD_NORMAL);
  542. }
  543. static int rtl8187_cmd_reset(struct ieee80211_hw *dev)
  544. {
  545. struct rtl8187_priv *priv = dev->priv;
  546. u8 reg;
  547. int i;
  548. reg = rtl818x_ioread8(priv, &priv->map->CMD);
  549. reg &= (1 << 1);
  550. reg |= RTL818X_CMD_RESET;
  551. rtl818x_iowrite8(priv, &priv->map->CMD, reg);
  552. i = 10;
  553. do {
  554. msleep(2);
  555. if (!(rtl818x_ioread8(priv, &priv->map->CMD) &
  556. RTL818X_CMD_RESET))
  557. break;
  558. } while (--i);
  559. if (!i) {
  560. wiphy_err(dev->wiphy, "Reset timeout!\n");
  561. return -ETIMEDOUT;
  562. }
  563. /* reload registers from eeprom */
  564. rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_LOAD);
  565. i = 10;
  566. do {
  567. msleep(4);
  568. if (!(rtl818x_ioread8(priv, &priv->map->EEPROM_CMD) &
  569. RTL818X_EEPROM_CMD_CONFIG))
  570. break;
  571. } while (--i);
  572. if (!i) {
  573. wiphy_err(dev->wiphy, "eeprom reset timeout!\n");
  574. return -ETIMEDOUT;
  575. }
  576. return 0;
  577. }
  578. static int rtl8187_init_hw(struct ieee80211_hw *dev)
  579. {
  580. struct rtl8187_priv *priv = dev->priv;
  581. u8 reg;
  582. int res;
  583. /* reset */
  584. rtl8187_set_anaparam(priv, true);
  585. rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0);
  586. msleep(200);
  587. rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x10);
  588. rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x11);
  589. rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x00);
  590. msleep(200);
  591. res = rtl8187_cmd_reset(dev);
  592. if (res)
  593. return res;
  594. rtl8187_set_anaparam(priv, true);
  595. /* setup card */
  596. rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0);
  597. rtl818x_iowrite8(priv, &priv->map->GPIO0, 0);
  598. rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, (4 << 8));
  599. rtl818x_iowrite8(priv, &priv->map->GPIO0, 1);
  600. rtl818x_iowrite8(priv, &priv->map->GP_ENABLE, 0);
  601. rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
  602. rtl818x_iowrite16(priv, (__le16 *)0xFFF4, 0xFFFF);
  603. reg = rtl818x_ioread8(priv, &priv->map->CONFIG1);
  604. reg &= 0x3F;
  605. reg |= 0x80;
  606. rtl818x_iowrite8(priv, &priv->map->CONFIG1, reg);
  607. rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
  608. rtl818x_iowrite32(priv, &priv->map->INT_TIMEOUT, 0);
  609. rtl818x_iowrite8(priv, &priv->map->WPA_CONF, 0);
  610. rtl818x_iowrite8(priv, &priv->map->RATE_FALLBACK, 0);
  611. // TODO: set RESP_RATE and BRSR properly
  612. rtl818x_iowrite8(priv, &priv->map->RESP_RATE, (8 << 4) | 0);
  613. rtl818x_iowrite16(priv, &priv->map->BRSR, 0x01F3);
  614. /* host_usb_init */
  615. rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0);
  616. rtl818x_iowrite8(priv, &priv->map->GPIO0, 0);
  617. reg = rtl818x_ioread8(priv, (u8 *)0xFE53);
  618. rtl818x_iowrite8(priv, (u8 *)0xFE53, reg | (1 << 7));
  619. rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, (4 << 8));
  620. rtl818x_iowrite8(priv, &priv->map->GPIO0, 0x20);
  621. rtl818x_iowrite8(priv, &priv->map->GP_ENABLE, 0);
  622. rtl818x_iowrite16(priv, &priv->map->RFPinsOutput, 0x80);
  623. rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0x80);
  624. rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x80);
  625. msleep(100);
  626. rtl818x_iowrite32(priv, &priv->map->RF_TIMING, 0x000a8008);
  627. rtl818x_iowrite16(priv, &priv->map->BRSR, 0xFFFF);
  628. rtl818x_iowrite32(priv, &priv->map->RF_PARA, 0x00100044);
  629. rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
  630. RTL818X_EEPROM_CMD_CONFIG);
  631. rtl818x_iowrite8(priv, &priv->map->CONFIG3, 0x44);
  632. rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
  633. RTL818X_EEPROM_CMD_NORMAL);
  634. rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x1FF7);
  635. msleep(100);
  636. priv->rf->init(dev);
  637. rtl818x_iowrite16(priv, &priv->map->BRSR, 0x01F3);
  638. reg = rtl818x_ioread8(priv, &priv->map->PGSELECT) & ~1;
  639. rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg | 1);
  640. rtl818x_iowrite16(priv, (__le16 *)0xFFFE, 0x10);
  641. rtl818x_iowrite8(priv, &priv->map->TALLY_SEL, 0x80);
  642. rtl818x_iowrite8(priv, (u8 *)0xFFFF, 0x60);
  643. rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg);
  644. return 0;
  645. }
  646. static const u8 rtl8187b_reg_table[][3] = {
  647. {0xF0, 0x32, 0}, {0xF1, 0x32, 0}, {0xF2, 0x00, 0}, {0xF3, 0x00, 0},
  648. {0xF4, 0x32, 0}, {0xF5, 0x43, 0}, {0xF6, 0x00, 0}, {0xF7, 0x00, 0},
  649. {0xF8, 0x46, 0}, {0xF9, 0xA4, 0}, {0xFA, 0x00, 0}, {0xFB, 0x00, 0},
  650. {0xFC, 0x96, 0}, {0xFD, 0xA4, 0}, {0xFE, 0x00, 0}, {0xFF, 0x00, 0},
  651. {0x58, 0x4B, 1}, {0x59, 0x00, 1}, {0x5A, 0x4B, 1}, {0x5B, 0x00, 1},
  652. {0x60, 0x4B, 1}, {0x61, 0x09, 1}, {0x62, 0x4B, 1}, {0x63, 0x09, 1},
  653. {0xCE, 0x0F, 1}, {0xCF, 0x00, 1}, {0xF0, 0x4E, 1}, {0xF1, 0x01, 1},
  654. {0xF2, 0x02, 1}, {0xF3, 0x03, 1}, {0xF4, 0x04, 1}, {0xF5, 0x05, 1},
  655. {0xF6, 0x06, 1}, {0xF7, 0x07, 1}, {0xF8, 0x08, 1},
  656. {0x4E, 0x00, 2}, {0x0C, 0x04, 2}, {0x21, 0x61, 2}, {0x22, 0x68, 2},
  657. {0x23, 0x6F, 2}, {0x24, 0x76, 2}, {0x25, 0x7D, 2}, {0x26, 0x84, 2},
  658. {0x27, 0x8D, 2}, {0x4D, 0x08, 2}, {0x50, 0x05, 2}, {0x51, 0xF5, 2},
  659. {0x52, 0x04, 2}, {0x53, 0xA0, 2}, {0x54, 0x1F, 2}, {0x55, 0x23, 2},
  660. {0x56, 0x45, 2}, {0x57, 0x67, 2}, {0x58, 0x08, 2}, {0x59, 0x08, 2},
  661. {0x5A, 0x08, 2}, {0x5B, 0x08, 2}, {0x60, 0x08, 2}, {0x61, 0x08, 2},
  662. {0x62, 0x08, 2}, {0x63, 0x08, 2}, {0x64, 0xCF, 2},
  663. {0x5B, 0x40, 0}, {0x84, 0x88, 0}, {0x85, 0x24, 0}, {0x88, 0x54, 0},
  664. {0x8B, 0xB8, 0}, {0x8C, 0x07, 0}, {0x8D, 0x00, 0}, {0x94, 0x1B, 0},
  665. {0x95, 0x12, 0}, {0x96, 0x00, 0}, {0x97, 0x06, 0}, {0x9D, 0x1A, 0},
  666. {0x9F, 0x10, 0}, {0xB4, 0x22, 0}, {0xBE, 0x80, 0}, {0xDB, 0x00, 0},
  667. {0xEE, 0x00, 0}, {0x4C, 0x00, 2},
  668. {0x9F, 0x00, 3}, {0x8C, 0x01, 0}, {0x8D, 0x10, 0}, {0x8E, 0x08, 0},
  669. {0x8F, 0x00, 0}
  670. };
  671. static int rtl8187b_init_hw(struct ieee80211_hw *dev)
  672. {
  673. struct rtl8187_priv *priv = dev->priv;
  674. int res, i;
  675. u8 reg;
  676. rtl8187_set_anaparam(priv, true);
  677. /* Reset PLL sequence on 8187B. Realtek note: reduces power
  678. * consumption about 30 mA */
  679. rtl818x_iowrite8(priv, (u8 *)0xFF61, 0x10);
  680. reg = rtl818x_ioread8(priv, (u8 *)0xFF62);
  681. rtl818x_iowrite8(priv, (u8 *)0xFF62, reg & ~(1 << 5));
  682. rtl818x_iowrite8(priv, (u8 *)0xFF62, reg | (1 << 5));
  683. res = rtl8187_cmd_reset(dev);
  684. if (res)
  685. return res;
  686. rtl8187_set_anaparam(priv, true);
  687. /* BRSR (Basic Rate Set Register) on 8187B looks to be the same as
  688. * RESP_RATE on 8187L in Realtek sources: each bit should be each
  689. * one of the 12 rates, all are enabled */
  690. rtl818x_iowrite16(priv, (__le16 *)0xFF34, 0x0FFF);
  691. reg = rtl818x_ioread8(priv, &priv->map->CW_CONF);
  692. reg |= RTL818X_CW_CONF_PERPACKET_RETRY;
  693. rtl818x_iowrite8(priv, &priv->map->CW_CONF, reg);
  694. /* Auto Rate Fallback Register (ARFR): 1M-54M setting */
  695. rtl818x_iowrite16_idx(priv, (__le16 *)0xFFE0, 0x0FFF, 1);
  696. rtl818x_iowrite8_idx(priv, (u8 *)0xFFE2, 0x00, 1);
  697. rtl818x_iowrite16_idx(priv, (__le16 *)0xFFD4, 0xFFFF, 1);
  698. rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
  699. RTL818X_EEPROM_CMD_CONFIG);
  700. reg = rtl818x_ioread8(priv, &priv->map->CONFIG1);
  701. rtl818x_iowrite8(priv, &priv->map->CONFIG1, (reg & 0x3F) | 0x80);
  702. rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
  703. RTL818X_EEPROM_CMD_NORMAL);
  704. rtl818x_iowrite8(priv, &priv->map->WPA_CONF, 0);
  705. for (i = 0; i < ARRAY_SIZE(rtl8187b_reg_table); i++) {
  706. rtl818x_iowrite8_idx(priv,
  707. (u8 *)(uintptr_t)
  708. (rtl8187b_reg_table[i][0] | 0xFF00),
  709. rtl8187b_reg_table[i][1],
  710. rtl8187b_reg_table[i][2]);
  711. }
  712. rtl818x_iowrite16(priv, &priv->map->TID_AC_MAP, 0xFA50);
  713. rtl818x_iowrite16(priv, &priv->map->INT_MIG, 0);
  714. rtl818x_iowrite32_idx(priv, (__le32 *)0xFFF0, 0, 1);
  715. rtl818x_iowrite32_idx(priv, (__le32 *)0xFFF4, 0, 1);
  716. rtl818x_iowrite8_idx(priv, (u8 *)0xFFF8, 0, 1);
  717. rtl818x_iowrite32(priv, &priv->map->RF_TIMING, 0x00004001);
  718. /* RFSW_CTRL register */
  719. rtl818x_iowrite16_idx(priv, (__le16 *)0xFF72, 0x569A, 2);
  720. rtl818x_iowrite16(priv, &priv->map->RFPinsOutput, 0x0480);
  721. rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0x2488);
  722. rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x1FFF);
  723. msleep(100);
  724. priv->rf->init(dev);
  725. reg = RTL818X_CMD_TX_ENABLE | RTL818X_CMD_RX_ENABLE;
  726. rtl818x_iowrite8(priv, &priv->map->CMD, reg);
  727. rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0xFFFF);
  728. rtl818x_iowrite8(priv, (u8 *)0xFE41, 0xF4);
  729. rtl818x_iowrite8(priv, (u8 *)0xFE40, 0x00);
  730. rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x00);
  731. rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x01);
  732. rtl818x_iowrite8(priv, (u8 *)0xFE40, 0x0F);
  733. rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x00);
  734. rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x01);
  735. reg = rtl818x_ioread8(priv, (u8 *)0xFFDB);
  736. rtl818x_iowrite8(priv, (u8 *)0xFFDB, reg | (1 << 2));
  737. rtl818x_iowrite16_idx(priv, (__le16 *)0xFF72, 0x59FA, 3);
  738. rtl818x_iowrite16_idx(priv, (__le16 *)0xFF74, 0x59D2, 3);
  739. rtl818x_iowrite16_idx(priv, (__le16 *)0xFF76, 0x59D2, 3);
  740. rtl818x_iowrite16_idx(priv, (__le16 *)0xFF78, 0x19FA, 3);
  741. rtl818x_iowrite16_idx(priv, (__le16 *)0xFF7A, 0x19FA, 3);
  742. rtl818x_iowrite16_idx(priv, (__le16 *)0xFF7C, 0x00D0, 3);
  743. rtl818x_iowrite8(priv, (u8 *)0xFF61, 0);
  744. rtl818x_iowrite8_idx(priv, (u8 *)0xFF80, 0x0F, 1);
  745. rtl818x_iowrite8_idx(priv, (u8 *)0xFF83, 0x03, 1);
  746. rtl818x_iowrite8(priv, (u8 *)0xFFDA, 0x10);
  747. rtl818x_iowrite8_idx(priv, (u8 *)0xFF4D, 0x08, 2);
  748. rtl818x_iowrite32(priv, &priv->map->HSSI_PARA, 0x0600321B);
  749. rtl818x_iowrite16_idx(priv, (__le16 *)0xFFEC, 0x0800, 1);
  750. priv->slot_time = 0x9;
  751. priv->aifsn[0] = 2; /* AIFSN[AC_VO] */
  752. priv->aifsn[1] = 2; /* AIFSN[AC_VI] */
  753. priv->aifsn[2] = 7; /* AIFSN[AC_BK] */
  754. priv->aifsn[3] = 3; /* AIFSN[AC_BE] */
  755. rtl818x_iowrite8(priv, &priv->map->ACM_CONTROL, 0);
  756. /* ENEDCA flag must always be set, transmit issues? */
  757. rtl818x_iowrite8(priv, &priv->map->MSR, RTL818X_MSR_ENEDCA);
  758. return 0;
  759. }
  760. static void rtl8187_work(struct work_struct *work)
  761. {
  762. /* The RTL8187 returns the retry count through register 0xFFFA. In
  763. * addition, it appears to be a cumulative retry count, not the
  764. * value for the current TX packet. When multiple TX entries are
  765. * waiting in the queue, the retry count will be the total for all.
  766. * The "error" may matter for purposes of rate setting, but there is
  767. * no other choice with this hardware.
  768. */
  769. struct rtl8187_priv *priv = container_of(work, struct rtl8187_priv,
  770. work.work);
  771. struct ieee80211_tx_info *info;
  772. struct ieee80211_hw *dev = priv->dev;
  773. static u16 retry;
  774. u16 tmp;
  775. u16 avg_retry;
  776. int length;
  777. mutex_lock(&priv->conf_mutex);
  778. tmp = rtl818x_ioread16(priv, (__le16 *)0xFFFA);
  779. length = skb_queue_len(&priv->b_tx_status.queue);
  780. if (unlikely(!length))
  781. length = 1;
  782. if (unlikely(tmp < retry))
  783. tmp = retry;
  784. avg_retry = (tmp - retry) / length;
  785. while (skb_queue_len(&priv->b_tx_status.queue) > 0) {
  786. struct sk_buff *old_skb;
  787. old_skb = skb_dequeue(&priv->b_tx_status.queue);
  788. info = IEEE80211_SKB_CB(old_skb);
  789. info->status.rates[0].count = avg_retry + 1;
  790. if (info->status.rates[0].count > RETRY_COUNT)
  791. info->flags &= ~IEEE80211_TX_STAT_ACK;
  792. ieee80211_tx_status_irqsafe(dev, old_skb);
  793. }
  794. retry = tmp;
  795. mutex_unlock(&priv->conf_mutex);
  796. }
  797. static int rtl8187_start(struct ieee80211_hw *dev)
  798. {
  799. struct rtl8187_priv *priv = dev->priv;
  800. u32 reg;
  801. int ret;
  802. mutex_lock(&priv->conf_mutex);
  803. ret = (!priv->is_rtl8187b) ? rtl8187_init_hw(dev) :
  804. rtl8187b_init_hw(dev);
  805. if (ret)
  806. goto rtl8187_start_exit;
  807. init_usb_anchor(&priv->anchored);
  808. priv->dev = dev;
  809. if (priv->is_rtl8187b) {
  810. reg = RTL818X_RX_CONF_MGMT |
  811. RTL818X_RX_CONF_DATA |
  812. RTL818X_RX_CONF_BROADCAST |
  813. RTL818X_RX_CONF_NICMAC |
  814. RTL818X_RX_CONF_BSSID |
  815. (7 << 13 /* RX FIFO threshold NONE */) |
  816. (7 << 10 /* MAX RX DMA */) |
  817. RTL818X_RX_CONF_RX_AUTORESETPHY |
  818. RTL818X_RX_CONF_ONLYERLPKT |
  819. RTL818X_RX_CONF_MULTICAST;
  820. priv->rx_conf = reg;
  821. rtl818x_iowrite32(priv, &priv->map->RX_CONF, reg);
  822. reg = rtl818x_ioread8(priv, &priv->map->TX_AGC_CTL);
  823. reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_GAIN;
  824. reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_ANTSEL;
  825. reg &= ~RTL818X_TX_AGC_CTL_FEEDBACK_ANT;
  826. rtl818x_iowrite8(priv, &priv->map->TX_AGC_CTL, reg);
  827. rtl818x_iowrite32(priv, &priv->map->TX_CONF,
  828. RTL818X_TX_CONF_HW_SEQNUM |
  829. RTL818X_TX_CONF_DISREQQSIZE |
  830. (RETRY_COUNT << 8 /* short retry limit */) |
  831. (RETRY_COUNT << 0 /* long retry limit */) |
  832. (7 << 21 /* MAX TX DMA */));
  833. ret = rtl8187_init_urbs(dev);
  834. if (ret)
  835. goto rtl8187_start_exit;
  836. ret = rtl8187b_init_status_urb(dev);
  837. if (ret)
  838. usb_kill_anchored_urbs(&priv->anchored);
  839. goto rtl8187_start_exit;
  840. }
  841. rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0xFFFF);
  842. rtl818x_iowrite32(priv, &priv->map->MAR[0], ~0);
  843. rtl818x_iowrite32(priv, &priv->map->MAR[1], ~0);
  844. ret = rtl8187_init_urbs(dev);
  845. if (ret)
  846. goto rtl8187_start_exit;
  847. reg = RTL818X_RX_CONF_ONLYERLPKT |
  848. RTL818X_RX_CONF_RX_AUTORESETPHY |
  849. RTL818X_RX_CONF_BSSID |
  850. RTL818X_RX_CONF_MGMT |
  851. RTL818X_RX_CONF_DATA |
  852. (7 << 13 /* RX FIFO threshold NONE */) |
  853. (7 << 10 /* MAX RX DMA */) |
  854. RTL818X_RX_CONF_BROADCAST |
  855. RTL818X_RX_CONF_NICMAC;
  856. priv->rx_conf = reg;
  857. rtl818x_iowrite32(priv, &priv->map->RX_CONF, reg);
  858. reg = rtl818x_ioread8(priv, &priv->map->CW_CONF);
  859. reg &= ~RTL818X_CW_CONF_PERPACKET_CW;
  860. reg |= RTL818X_CW_CONF_PERPACKET_RETRY;
  861. rtl818x_iowrite8(priv, &priv->map->CW_CONF, reg);
  862. reg = rtl818x_ioread8(priv, &priv->map->TX_AGC_CTL);
  863. reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_GAIN;
  864. reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_ANTSEL;
  865. reg &= ~RTL818X_TX_AGC_CTL_FEEDBACK_ANT;
  866. rtl818x_iowrite8(priv, &priv->map->TX_AGC_CTL, reg);
  867. reg = RTL818X_TX_CONF_CW_MIN |
  868. (7 << 21 /* MAX TX DMA */) |
  869. RTL818X_TX_CONF_NO_ICV;
  870. rtl818x_iowrite32(priv, &priv->map->TX_CONF, reg);
  871. reg = rtl818x_ioread8(priv, &priv->map->CMD);
  872. reg |= RTL818X_CMD_TX_ENABLE;
  873. reg |= RTL818X_CMD_RX_ENABLE;
  874. rtl818x_iowrite8(priv, &priv->map->CMD, reg);
  875. INIT_DELAYED_WORK(&priv->work, rtl8187_work);
  876. rtl8187_start_exit:
  877. mutex_unlock(&priv->conf_mutex);
  878. return ret;
  879. }
  880. static void rtl8187_stop(struct ieee80211_hw *dev)
  881. {
  882. struct rtl8187_priv *priv = dev->priv;
  883. struct sk_buff *skb;
  884. u32 reg;
  885. mutex_lock(&priv->conf_mutex);
  886. rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0);
  887. reg = rtl818x_ioread8(priv, &priv->map->CMD);
  888. reg &= ~RTL818X_CMD_TX_ENABLE;
  889. reg &= ~RTL818X_CMD_RX_ENABLE;
  890. rtl818x_iowrite8(priv, &priv->map->CMD, reg);
  891. priv->rf->stop(dev);
  892. rtl8187_set_anaparam(priv, false);
  893. rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
  894. reg = rtl818x_ioread8(priv, &priv->map->CONFIG4);
  895. rtl818x_iowrite8(priv, &priv->map->CONFIG4, reg | RTL818X_CONFIG4_VCOOFF);
  896. rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
  897. while ((skb = skb_dequeue(&priv->b_tx_status.queue)))
  898. dev_kfree_skb_any(skb);
  899. usb_kill_anchored_urbs(&priv->anchored);
  900. mutex_unlock(&priv->conf_mutex);
  901. if (!priv->is_rtl8187b)
  902. cancel_delayed_work_sync(&priv->work);
  903. }
  904. static u64 rtl8187_get_tsf(struct ieee80211_hw *dev, struct ieee80211_vif *vif)
  905. {
  906. struct rtl8187_priv *priv = dev->priv;
  907. return rtl818x_ioread32(priv, &priv->map->TSFT[0]) |
  908. (u64)(rtl818x_ioread32(priv, &priv->map->TSFT[1])) << 32;
  909. }
  910. static void rtl8187_beacon_work(struct work_struct *work)
  911. {
  912. struct rtl8187_vif *vif_priv =
  913. container_of(work, struct rtl8187_vif, beacon_work.work);
  914. struct ieee80211_vif *vif =
  915. container_of((void *)vif_priv, struct ieee80211_vif, drv_priv);
  916. struct ieee80211_hw *dev = vif_priv->dev;
  917. struct ieee80211_mgmt *mgmt;
  918. struct sk_buff *skb;
  919. /* don't overflow the tx ring */
  920. if (ieee80211_queue_stopped(dev, 0))
  921. goto resched;
  922. /* grab a fresh beacon */
  923. skb = ieee80211_beacon_get(dev, vif);
  924. if (!skb)
  925. goto resched;
  926. /*
  927. * update beacon timestamp w/ TSF value
  928. * TODO: make hardware update beacon timestamp
  929. */
  930. mgmt = (struct ieee80211_mgmt *)skb->data;
  931. mgmt->u.beacon.timestamp = cpu_to_le64(rtl8187_get_tsf(dev, vif));
  932. /* TODO: use actual beacon queue */
  933. skb_set_queue_mapping(skb, 0);
  934. rtl8187_tx(dev, NULL, skb);
  935. resched:
  936. /*
  937. * schedule next beacon
  938. * TODO: use hardware support for beacon timing
  939. */
  940. schedule_delayed_work(&vif_priv->beacon_work,
  941. usecs_to_jiffies(1024 * vif->bss_conf.beacon_int));
  942. }
  943. static int rtl8187_add_interface(struct ieee80211_hw *dev,
  944. struct ieee80211_vif *vif)
  945. {
  946. struct rtl8187_priv *priv = dev->priv;
  947. struct rtl8187_vif *vif_priv;
  948. int i;
  949. int ret = -EOPNOTSUPP;
  950. mutex_lock(&priv->conf_mutex);
  951. if (priv->vif)
  952. goto exit;
  953. switch (vif->type) {
  954. case NL80211_IFTYPE_STATION:
  955. case NL80211_IFTYPE_ADHOC:
  956. break;
  957. default:
  958. goto exit;
  959. }
  960. ret = 0;
  961. priv->vif = vif;
  962. /* Initialize driver private area */
  963. vif_priv = (struct rtl8187_vif *)&vif->drv_priv;
  964. vif_priv->dev = dev;
  965. INIT_DELAYED_WORK(&vif_priv->beacon_work, rtl8187_beacon_work);
  966. vif_priv->enable_beacon = false;
  967. rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
  968. for (i = 0; i < ETH_ALEN; i++)
  969. rtl818x_iowrite8(priv, &priv->map->MAC[i],
  970. ((u8 *)vif->addr)[i]);
  971. rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
  972. exit:
  973. mutex_unlock(&priv->conf_mutex);
  974. return ret;
  975. }
  976. static void rtl8187_remove_interface(struct ieee80211_hw *dev,
  977. struct ieee80211_vif *vif)
  978. {
  979. struct rtl8187_priv *priv = dev->priv;
  980. mutex_lock(&priv->conf_mutex);
  981. priv->vif = NULL;
  982. mutex_unlock(&priv->conf_mutex);
  983. }
  984. static int rtl8187_config(struct ieee80211_hw *dev, u32 changed)
  985. {
  986. struct rtl8187_priv *priv = dev->priv;
  987. struct ieee80211_conf *conf = &dev->conf;
  988. u32 reg;
  989. mutex_lock(&priv->conf_mutex);
  990. reg = rtl818x_ioread32(priv, &priv->map->TX_CONF);
  991. /* Enable TX loopback on MAC level to avoid TX during channel
  992. * changes, as this has be seen to causes problems and the
  993. * card will stop work until next reset
  994. */
  995. rtl818x_iowrite32(priv, &priv->map->TX_CONF,
  996. reg | RTL818X_TX_CONF_LOOPBACK_MAC);
  997. priv->rf->set_chan(dev, conf);
  998. msleep(10);
  999. rtl818x_iowrite32(priv, &priv->map->TX_CONF, reg);
  1000. rtl818x_iowrite16(priv, &priv->map->ATIM_WND, 2);
  1001. rtl818x_iowrite16(priv, &priv->map->ATIMTR_INTERVAL, 100);
  1002. rtl818x_iowrite16(priv, &priv->map->BEACON_INTERVAL, 100);
  1003. rtl818x_iowrite16(priv, &priv->map->BEACON_INTERVAL_TIME, 100);
  1004. mutex_unlock(&priv->conf_mutex);
  1005. return 0;
  1006. }
  1007. /*
  1008. * With 8187B, AC_*_PARAM clashes with FEMR definition in struct rtl818x_csr for
  1009. * example. Thus we have to use raw values for AC_*_PARAM register addresses.
  1010. */
  1011. static __le32 *rtl8187b_ac_addr[4] = {
  1012. (__le32 *) 0xFFF0, /* AC_VO */
  1013. (__le32 *) 0xFFF4, /* AC_VI */
  1014. (__le32 *) 0xFFFC, /* AC_BK */
  1015. (__le32 *) 0xFFF8, /* AC_BE */
  1016. };
  1017. #define SIFS_TIME 0xa
  1018. static void rtl8187_conf_erp(struct rtl8187_priv *priv, bool use_short_slot,
  1019. bool use_short_preamble)
  1020. {
  1021. if (priv->is_rtl8187b) {
  1022. u8 difs, eifs;
  1023. u16 ack_timeout;
  1024. int queue;
  1025. if (use_short_slot) {
  1026. priv->slot_time = 0x9;
  1027. difs = 0x1c;
  1028. eifs = 0x53;
  1029. } else {
  1030. priv->slot_time = 0x14;
  1031. difs = 0x32;
  1032. eifs = 0x5b;
  1033. }
  1034. rtl818x_iowrite8(priv, &priv->map->SIFS, 0x22);
  1035. rtl818x_iowrite8(priv, &priv->map->SLOT, priv->slot_time);
  1036. rtl818x_iowrite8(priv, &priv->map->DIFS, difs);
  1037. /*
  1038. * BRSR+1 on 8187B is in fact EIFS register
  1039. * Value in units of 4 us
  1040. */
  1041. rtl818x_iowrite8(priv, (u8 *)&priv->map->BRSR + 1, eifs);
  1042. /*
  1043. * For 8187B, CARRIER_SENSE_COUNTER is in fact ack timeout
  1044. * register. In units of 4 us like eifs register
  1045. * ack_timeout = ack duration + plcp + difs + preamble
  1046. */
  1047. ack_timeout = 112 + 48 + difs;
  1048. if (use_short_preamble)
  1049. ack_timeout += 72;
  1050. else
  1051. ack_timeout += 144;
  1052. rtl818x_iowrite8(priv, &priv->map->CARRIER_SENSE_COUNTER,
  1053. DIV_ROUND_UP(ack_timeout, 4));
  1054. for (queue = 0; queue < 4; queue++)
  1055. rtl818x_iowrite8(priv, (u8 *) rtl8187b_ac_addr[queue],
  1056. priv->aifsn[queue] * priv->slot_time +
  1057. SIFS_TIME);
  1058. } else {
  1059. rtl818x_iowrite8(priv, &priv->map->SIFS, 0x22);
  1060. if (use_short_slot) {
  1061. rtl818x_iowrite8(priv, &priv->map->SLOT, 0x9);
  1062. rtl818x_iowrite8(priv, &priv->map->DIFS, 0x14);
  1063. rtl818x_iowrite8(priv, &priv->map->EIFS, 91 - 0x14);
  1064. } else {
  1065. rtl818x_iowrite8(priv, &priv->map->SLOT, 0x14);
  1066. rtl818x_iowrite8(priv, &priv->map->DIFS, 0x24);
  1067. rtl818x_iowrite8(priv, &priv->map->EIFS, 91 - 0x24);
  1068. }
  1069. }
  1070. }
  1071. static void rtl8187_bss_info_changed(struct ieee80211_hw *dev,
  1072. struct ieee80211_vif *vif,
  1073. struct ieee80211_bss_conf *info,
  1074. u32 changed)
  1075. {
  1076. struct rtl8187_priv *priv = dev->priv;
  1077. struct rtl8187_vif *vif_priv;
  1078. int i;
  1079. u8 reg;
  1080. vif_priv = (struct rtl8187_vif *)&vif->drv_priv;
  1081. if (changed & BSS_CHANGED_BSSID) {
  1082. mutex_lock(&priv->conf_mutex);
  1083. for (i = 0; i < ETH_ALEN; i++)
  1084. rtl818x_iowrite8(priv, &priv->map->BSSID[i],
  1085. info->bssid[i]);
  1086. if (priv->is_rtl8187b)
  1087. reg = RTL818X_MSR_ENEDCA;
  1088. else
  1089. reg = 0;
  1090. if (is_valid_ether_addr(info->bssid)) {
  1091. if (vif->type == NL80211_IFTYPE_ADHOC)
  1092. reg |= RTL818X_MSR_ADHOC;
  1093. else
  1094. reg |= RTL818X_MSR_INFRA;
  1095. }
  1096. else
  1097. reg |= RTL818X_MSR_NO_LINK;
  1098. rtl818x_iowrite8(priv, &priv->map->MSR, reg);
  1099. mutex_unlock(&priv->conf_mutex);
  1100. }
  1101. if (changed & (BSS_CHANGED_ERP_SLOT | BSS_CHANGED_ERP_PREAMBLE))
  1102. rtl8187_conf_erp(priv, info->use_short_slot,
  1103. info->use_short_preamble);
  1104. if (changed & BSS_CHANGED_BEACON_ENABLED)
  1105. vif_priv->enable_beacon = info->enable_beacon;
  1106. if (changed & (BSS_CHANGED_BEACON_ENABLED | BSS_CHANGED_BEACON)) {
  1107. cancel_delayed_work_sync(&vif_priv->beacon_work);
  1108. if (vif_priv->enable_beacon)
  1109. schedule_work(&vif_priv->beacon_work.work);
  1110. }
  1111. }
  1112. static u64 rtl8187_prepare_multicast(struct ieee80211_hw *dev,
  1113. struct netdev_hw_addr_list *mc_list)
  1114. {
  1115. return netdev_hw_addr_list_count(mc_list);
  1116. }
  1117. static void rtl8187_configure_filter(struct ieee80211_hw *dev,
  1118. unsigned int changed_flags,
  1119. unsigned int *total_flags,
  1120. u64 multicast)
  1121. {
  1122. struct rtl8187_priv *priv = dev->priv;
  1123. if (changed_flags & FIF_FCSFAIL)
  1124. priv->rx_conf ^= RTL818X_RX_CONF_FCS;
  1125. if (changed_flags & FIF_CONTROL)
  1126. priv->rx_conf ^= RTL818X_RX_CONF_CTRL;
  1127. if (changed_flags & FIF_OTHER_BSS)
  1128. priv->rx_conf ^= RTL818X_RX_CONF_MONITOR;
  1129. if (*total_flags & FIF_ALLMULTI || multicast > 0)
  1130. priv->rx_conf |= RTL818X_RX_CONF_MULTICAST;
  1131. else
  1132. priv->rx_conf &= ~RTL818X_RX_CONF_MULTICAST;
  1133. *total_flags = 0;
  1134. if (priv->rx_conf & RTL818X_RX_CONF_FCS)
  1135. *total_flags |= FIF_FCSFAIL;
  1136. if (priv->rx_conf & RTL818X_RX_CONF_CTRL)
  1137. *total_flags |= FIF_CONTROL;
  1138. if (priv->rx_conf & RTL818X_RX_CONF_MONITOR)
  1139. *total_flags |= FIF_OTHER_BSS;
  1140. if (priv->rx_conf & RTL818X_RX_CONF_MULTICAST)
  1141. *total_flags |= FIF_ALLMULTI;
  1142. rtl818x_iowrite32_async(priv, &priv->map->RX_CONF, priv->rx_conf);
  1143. }
  1144. static int rtl8187_conf_tx(struct ieee80211_hw *dev,
  1145. struct ieee80211_vif *vif, u16 queue,
  1146. const struct ieee80211_tx_queue_params *params)
  1147. {
  1148. struct rtl8187_priv *priv = dev->priv;
  1149. u8 cw_min, cw_max;
  1150. if (queue > 3)
  1151. return -EINVAL;
  1152. cw_min = fls(params->cw_min);
  1153. cw_max = fls(params->cw_max);
  1154. if (priv->is_rtl8187b) {
  1155. priv->aifsn[queue] = params->aifs;
  1156. /*
  1157. * This is the structure of AC_*_PARAM registers in 8187B:
  1158. * - TXOP limit field, bit offset = 16
  1159. * - ECWmax, bit offset = 12
  1160. * - ECWmin, bit offset = 8
  1161. * - AIFS, bit offset = 0
  1162. */
  1163. rtl818x_iowrite32(priv, rtl8187b_ac_addr[queue],
  1164. (params->txop << 16) | (cw_max << 12) |
  1165. (cw_min << 8) | (params->aifs *
  1166. priv->slot_time + SIFS_TIME));
  1167. } else {
  1168. if (queue != 0)
  1169. return -EINVAL;
  1170. rtl818x_iowrite8(priv, &priv->map->CW_VAL,
  1171. cw_min | (cw_max << 4));
  1172. }
  1173. return 0;
  1174. }
  1175. static const struct ieee80211_ops rtl8187_ops = {
  1176. .tx = rtl8187_tx,
  1177. .start = rtl8187_start,
  1178. .stop = rtl8187_stop,
  1179. .add_interface = rtl8187_add_interface,
  1180. .remove_interface = rtl8187_remove_interface,
  1181. .config = rtl8187_config,
  1182. .bss_info_changed = rtl8187_bss_info_changed,
  1183. .prepare_multicast = rtl8187_prepare_multicast,
  1184. .configure_filter = rtl8187_configure_filter,
  1185. .conf_tx = rtl8187_conf_tx,
  1186. .rfkill_poll = rtl8187_rfkill_poll,
  1187. .get_tsf = rtl8187_get_tsf,
  1188. };
  1189. static void rtl8187_eeprom_register_read(struct eeprom_93cx6 *eeprom)
  1190. {
  1191. struct ieee80211_hw *dev = eeprom->data;
  1192. struct rtl8187_priv *priv = dev->priv;
  1193. u8 reg = rtl818x_ioread8(priv, &priv->map->EEPROM_CMD);
  1194. eeprom->reg_data_in = reg & RTL818X_EEPROM_CMD_WRITE;
  1195. eeprom->reg_data_out = reg & RTL818X_EEPROM_CMD_READ;
  1196. eeprom->reg_data_clock = reg & RTL818X_EEPROM_CMD_CK;
  1197. eeprom->reg_chip_select = reg & RTL818X_EEPROM_CMD_CS;
  1198. }
  1199. static void rtl8187_eeprom_register_write(struct eeprom_93cx6 *eeprom)
  1200. {
  1201. struct ieee80211_hw *dev = eeprom->data;
  1202. struct rtl8187_priv *priv = dev->priv;
  1203. u8 reg = RTL818X_EEPROM_CMD_PROGRAM;
  1204. if (eeprom->reg_data_in)
  1205. reg |= RTL818X_EEPROM_CMD_WRITE;
  1206. if (eeprom->reg_data_out)
  1207. reg |= RTL818X_EEPROM_CMD_READ;
  1208. if (eeprom->reg_data_clock)
  1209. reg |= RTL818X_EEPROM_CMD_CK;
  1210. if (eeprom->reg_chip_select)
  1211. reg |= RTL818X_EEPROM_CMD_CS;
  1212. rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, reg);
  1213. udelay(10);
  1214. }
  1215. static int rtl8187_probe(struct usb_interface *intf,
  1216. const struct usb_device_id *id)
  1217. {
  1218. struct usb_device *udev = interface_to_usbdev(intf);
  1219. struct ieee80211_hw *dev;
  1220. struct rtl8187_priv *priv;
  1221. struct eeprom_93cx6 eeprom;
  1222. struct ieee80211_channel *channel;
  1223. const char *chip_name;
  1224. u16 txpwr, reg;
  1225. u16 product_id = le16_to_cpu(udev->descriptor.idProduct);
  1226. int err, i;
  1227. u8 mac_addr[ETH_ALEN];
  1228. dev = ieee80211_alloc_hw(sizeof(*priv), &rtl8187_ops);
  1229. if (!dev) {
  1230. printk(KERN_ERR "rtl8187: ieee80211 alloc failed\n");
  1231. return -ENOMEM;
  1232. }
  1233. priv = dev->priv;
  1234. priv->is_rtl8187b = (id->driver_info == DEVICE_RTL8187B);
  1235. /* allocate "DMA aware" buffer for register accesses */
  1236. priv->io_dmabuf = kmalloc(sizeof(*priv->io_dmabuf), GFP_KERNEL);
  1237. if (!priv->io_dmabuf) {
  1238. err = -ENOMEM;
  1239. goto err_free_dev;
  1240. }
  1241. mutex_init(&priv->io_mutex);
  1242. SET_IEEE80211_DEV(dev, &intf->dev);
  1243. usb_set_intfdata(intf, dev);
  1244. priv->udev = udev;
  1245. usb_get_dev(udev);
  1246. skb_queue_head_init(&priv->rx_queue);
  1247. BUILD_BUG_ON(sizeof(priv->channels) != sizeof(rtl818x_channels));
  1248. BUILD_BUG_ON(sizeof(priv->rates) != sizeof(rtl818x_rates));
  1249. memcpy(priv->channels, rtl818x_channels, sizeof(rtl818x_channels));
  1250. memcpy(priv->rates, rtl818x_rates, sizeof(rtl818x_rates));
  1251. priv->map = (struct rtl818x_csr *)0xFF00;
  1252. priv->band.band = IEEE80211_BAND_2GHZ;
  1253. priv->band.channels = priv->channels;
  1254. priv->band.n_channels = ARRAY_SIZE(rtl818x_channels);
  1255. priv->band.bitrates = priv->rates;
  1256. priv->band.n_bitrates = ARRAY_SIZE(rtl818x_rates);
  1257. dev->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->band;
  1258. ieee80211_hw_set(dev, RX_INCLUDES_FCS);
  1259. ieee80211_hw_set(dev, HOST_BROADCAST_PS_BUFFERING);
  1260. ieee80211_hw_set(dev, SIGNAL_DBM);
  1261. /* Initialize rate-control variables */
  1262. dev->max_rates = 1;
  1263. dev->max_rate_tries = RETRY_COUNT;
  1264. eeprom.data = dev;
  1265. eeprom.register_read = rtl8187_eeprom_register_read;
  1266. eeprom.register_write = rtl8187_eeprom_register_write;
  1267. if (rtl818x_ioread32(priv, &priv->map->RX_CONF) & (1 << 6))
  1268. eeprom.width = PCI_EEPROM_WIDTH_93C66;
  1269. else
  1270. eeprom.width = PCI_EEPROM_WIDTH_93C46;
  1271. rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
  1272. udelay(10);
  1273. eeprom_93cx6_multiread(&eeprom, RTL8187_EEPROM_MAC_ADDR,
  1274. (__le16 __force *)mac_addr, 3);
  1275. if (!is_valid_ether_addr(mac_addr)) {
  1276. printk(KERN_WARNING "rtl8187: Invalid hwaddr! Using randomly "
  1277. "generated MAC address\n");
  1278. eth_random_addr(mac_addr);
  1279. }
  1280. SET_IEEE80211_PERM_ADDR(dev, mac_addr);
  1281. channel = priv->channels;
  1282. for (i = 0; i < 3; i++) {
  1283. eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_1 + i,
  1284. &txpwr);
  1285. (*channel++).hw_value = txpwr & 0xFF;
  1286. (*channel++).hw_value = txpwr >> 8;
  1287. }
  1288. for (i = 0; i < 2; i++) {
  1289. eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_4 + i,
  1290. &txpwr);
  1291. (*channel++).hw_value = txpwr & 0xFF;
  1292. (*channel++).hw_value = txpwr >> 8;
  1293. }
  1294. eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_BASE,
  1295. &priv->txpwr_base);
  1296. reg = rtl818x_ioread8(priv, &priv->map->PGSELECT) & ~1;
  1297. rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg | 1);
  1298. /* 0 means asic B-cut, we should use SW 3 wire
  1299. * bit-by-bit banging for radio. 1 means we can use
  1300. * USB specific request to write radio registers */
  1301. priv->asic_rev = rtl818x_ioread8(priv, (u8 *)0xFFFE) & 0x3;
  1302. rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg);
  1303. rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
  1304. if (!priv->is_rtl8187b) {
  1305. u32 reg32;
  1306. reg32 = rtl818x_ioread32(priv, &priv->map->TX_CONF);
  1307. reg32 &= RTL818X_TX_CONF_HWVER_MASK;
  1308. switch (reg32) {
  1309. case RTL818X_TX_CONF_R8187vD_B:
  1310. /* Some RTL8187B devices have a USB ID of 0x8187
  1311. * detect them here */
  1312. chip_name = "RTL8187BvB(early)";
  1313. priv->is_rtl8187b = 1;
  1314. priv->hw_rev = RTL8187BvB;
  1315. break;
  1316. case RTL818X_TX_CONF_R8187vD:
  1317. chip_name = "RTL8187vD";
  1318. break;
  1319. default:
  1320. chip_name = "RTL8187vB (default)";
  1321. }
  1322. } else {
  1323. /*
  1324. * Force USB request to write radio registers for 8187B, Realtek
  1325. * only uses it in their sources
  1326. */
  1327. /*if (priv->asic_rev == 0) {
  1328. printk(KERN_WARNING "rtl8187: Forcing use of USB "
  1329. "requests to write to radio registers\n");
  1330. priv->asic_rev = 1;
  1331. }*/
  1332. switch (rtl818x_ioread8(priv, (u8 *)0xFFE1)) {
  1333. case RTL818X_R8187B_B:
  1334. chip_name = "RTL8187BvB";
  1335. priv->hw_rev = RTL8187BvB;
  1336. break;
  1337. case RTL818X_R8187B_D:
  1338. chip_name = "RTL8187BvD";
  1339. priv->hw_rev = RTL8187BvD;
  1340. break;
  1341. case RTL818X_R8187B_E:
  1342. chip_name = "RTL8187BvE";
  1343. priv->hw_rev = RTL8187BvE;
  1344. break;
  1345. default:
  1346. chip_name = "RTL8187BvB (default)";
  1347. priv->hw_rev = RTL8187BvB;
  1348. }
  1349. }
  1350. if (!priv->is_rtl8187b) {
  1351. for (i = 0; i < 2; i++) {
  1352. eeprom_93cx6_read(&eeprom,
  1353. RTL8187_EEPROM_TXPWR_CHAN_6 + i,
  1354. &txpwr);
  1355. (*channel++).hw_value = txpwr & 0xFF;
  1356. (*channel++).hw_value = txpwr >> 8;
  1357. }
  1358. } else {
  1359. eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_6,
  1360. &txpwr);
  1361. (*channel++).hw_value = txpwr & 0xFF;
  1362. eeprom_93cx6_read(&eeprom, 0x0A, &txpwr);
  1363. (*channel++).hw_value = txpwr & 0xFF;
  1364. eeprom_93cx6_read(&eeprom, 0x1C, &txpwr);
  1365. (*channel++).hw_value = txpwr & 0xFF;
  1366. (*channel++).hw_value = txpwr >> 8;
  1367. }
  1368. /* Handle the differing rfkill GPIO bit in different models */
  1369. priv->rfkill_mask = RFKILL_MASK_8187_89_97;
  1370. if (product_id == 0x8197 || product_id == 0x8198) {
  1371. eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_SELECT_GPIO, &reg);
  1372. if (reg & 0xFF00)
  1373. priv->rfkill_mask = RFKILL_MASK_8198;
  1374. }
  1375. dev->vif_data_size = sizeof(struct rtl8187_vif);
  1376. dev->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION) |
  1377. BIT(NL80211_IFTYPE_ADHOC) ;
  1378. if ((id->driver_info == DEVICE_RTL8187) && priv->is_rtl8187b)
  1379. printk(KERN_INFO "rtl8187: inconsistency between id with OEM"
  1380. " info!\n");
  1381. priv->rf = rtl8187_detect_rf(dev);
  1382. dev->extra_tx_headroom = (!priv->is_rtl8187b) ?
  1383. sizeof(struct rtl8187_tx_hdr) :
  1384. sizeof(struct rtl8187b_tx_hdr);
  1385. if (!priv->is_rtl8187b)
  1386. dev->queues = 1;
  1387. else
  1388. dev->queues = 4;
  1389. err = ieee80211_register_hw(dev);
  1390. if (err) {
  1391. printk(KERN_ERR "rtl8187: Cannot register device\n");
  1392. goto err_free_dmabuf;
  1393. }
  1394. mutex_init(&priv->conf_mutex);
  1395. skb_queue_head_init(&priv->b_tx_status.queue);
  1396. wiphy_info(dev->wiphy, "hwaddr %pM, %s V%d + %s, rfkill mask %d\n",
  1397. mac_addr, chip_name, priv->asic_rev, priv->rf->name,
  1398. priv->rfkill_mask);
  1399. #ifdef CONFIG_RTL8187_LEDS
  1400. eeprom_93cx6_read(&eeprom, 0x3F, &reg);
  1401. reg &= 0xFF;
  1402. rtl8187_leds_init(dev, reg);
  1403. #endif
  1404. rtl8187_rfkill_init(dev);
  1405. return 0;
  1406. err_free_dmabuf:
  1407. kfree(priv->io_dmabuf);
  1408. usb_set_intfdata(intf, NULL);
  1409. usb_put_dev(udev);
  1410. err_free_dev:
  1411. ieee80211_free_hw(dev);
  1412. return err;
  1413. }
  1414. static void rtl8187_disconnect(struct usb_interface *intf)
  1415. {
  1416. struct ieee80211_hw *dev = usb_get_intfdata(intf);
  1417. struct rtl8187_priv *priv;
  1418. if (!dev)
  1419. return;
  1420. #ifdef CONFIG_RTL8187_LEDS
  1421. rtl8187_leds_exit(dev);
  1422. #endif
  1423. rtl8187_rfkill_exit(dev);
  1424. ieee80211_unregister_hw(dev);
  1425. priv = dev->priv;
  1426. usb_reset_device(priv->udev);
  1427. usb_put_dev(interface_to_usbdev(intf));
  1428. kfree(priv->io_dmabuf);
  1429. ieee80211_free_hw(dev);
  1430. }
  1431. static struct usb_driver rtl8187_driver = {
  1432. .name = KBUILD_MODNAME,
  1433. .id_table = rtl8187_table,
  1434. .probe = rtl8187_probe,
  1435. .disconnect = rtl8187_disconnect,
  1436. .disable_hub_initiated_lpm = 1,
  1437. };
  1438. module_usb_driver(rtl8187_driver);