nvm.c 24 KB

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  1. /******************************************************************************
  2. *
  3. * This file is provided under a dual BSD/GPLv2 license. When using or
  4. * redistributing this file, you may do so under either license.
  5. *
  6. * GPL LICENSE SUMMARY
  7. *
  8. * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
  9. * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
  10. *
  11. * This program is free software; you can redistribute it and/or modify
  12. * it under the terms of version 2 of the GNU General Public License as
  13. * published by the Free Software Foundation.
  14. *
  15. * This program is distributed in the hope that it will be useful, but
  16. * WITHOUT ANY WARRANTY; without even the implied warranty of
  17. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  18. * General Public License for more details.
  19. *
  20. * You should have received a copy of the GNU General Public License
  21. * along with this program; if not, write to the Free Software
  22. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
  23. * USA
  24. *
  25. * The full GNU General Public License is included in this distribution
  26. * in the file called COPYING.
  27. *
  28. * Contact Information:
  29. * Intel Linux Wireless <ilw@linux.intel.com>
  30. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  31. *
  32. * BSD LICENSE
  33. *
  34. * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
  35. * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
  36. * All rights reserved.
  37. *
  38. * Redistribution and use in source and binary forms, with or without
  39. * modification, are permitted provided that the following conditions
  40. * are met:
  41. *
  42. * * Redistributions of source code must retain the above copyright
  43. * notice, this list of conditions and the following disclaimer.
  44. * * Redistributions in binary form must reproduce the above copyright
  45. * notice, this list of conditions and the following disclaimer in
  46. * the documentation and/or other materials provided with the
  47. * distribution.
  48. * * Neither the name Intel Corporation nor the names of its
  49. * contributors may be used to endorse or promote products derived
  50. * from this software without specific prior written permission.
  51. *
  52. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  53. * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  54. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  55. * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  56. * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  57. * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  58. * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  59. * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  60. * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  61. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  62. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  63. *
  64. *****************************************************************************/
  65. #include <linux/firmware.h>
  66. #include <linux/rtnetlink.h>
  67. #include <linux/pci.h>
  68. #include <linux/acpi.h>
  69. #include "iwl-trans.h"
  70. #include "iwl-csr.h"
  71. #include "mvm.h"
  72. #include "iwl-eeprom-parse.h"
  73. #include "iwl-eeprom-read.h"
  74. #include "iwl-nvm-parse.h"
  75. #include "iwl-prph.h"
  76. /* Default NVM size to read */
  77. #define IWL_NVM_DEFAULT_CHUNK_SIZE (2*1024)
  78. #define IWL_MAX_NVM_SECTION_SIZE 0x1b58
  79. #define IWL_MAX_NVM_8000_SECTION_SIZE 0x1ffc
  80. #define NVM_WRITE_OPCODE 1
  81. #define NVM_READ_OPCODE 0
  82. /* load nvm chunk response */
  83. enum {
  84. READ_NVM_CHUNK_SUCCEED = 0,
  85. READ_NVM_CHUNK_NOT_VALID_ADDRESS = 1
  86. };
  87. /*
  88. * prepare the NVM host command w/ the pointers to the nvm buffer
  89. * and send it to fw
  90. */
  91. static int iwl_nvm_write_chunk(struct iwl_mvm *mvm, u16 section,
  92. u16 offset, u16 length, const u8 *data)
  93. {
  94. struct iwl_nvm_access_cmd nvm_access_cmd = {
  95. .offset = cpu_to_le16(offset),
  96. .length = cpu_to_le16(length),
  97. .type = cpu_to_le16(section),
  98. .op_code = NVM_WRITE_OPCODE,
  99. };
  100. struct iwl_host_cmd cmd = {
  101. .id = NVM_ACCESS_CMD,
  102. .len = { sizeof(struct iwl_nvm_access_cmd), length },
  103. .flags = CMD_SEND_IN_RFKILL,
  104. .data = { &nvm_access_cmd, data },
  105. /* data may come from vmalloc, so use _DUP */
  106. .dataflags = { 0, IWL_HCMD_DFL_DUP },
  107. };
  108. return iwl_mvm_send_cmd(mvm, &cmd);
  109. }
  110. static int iwl_nvm_read_chunk(struct iwl_mvm *mvm, u16 section,
  111. u16 offset, u16 length, u8 *data)
  112. {
  113. struct iwl_nvm_access_cmd nvm_access_cmd = {
  114. .offset = cpu_to_le16(offset),
  115. .length = cpu_to_le16(length),
  116. .type = cpu_to_le16(section),
  117. .op_code = NVM_READ_OPCODE,
  118. };
  119. struct iwl_nvm_access_resp *nvm_resp;
  120. struct iwl_rx_packet *pkt;
  121. struct iwl_host_cmd cmd = {
  122. .id = NVM_ACCESS_CMD,
  123. .flags = CMD_WANT_SKB | CMD_SEND_IN_RFKILL,
  124. .data = { &nvm_access_cmd, },
  125. };
  126. int ret, bytes_read, offset_read;
  127. u8 *resp_data;
  128. cmd.len[0] = sizeof(struct iwl_nvm_access_cmd);
  129. ret = iwl_mvm_send_cmd(mvm, &cmd);
  130. if (ret)
  131. return ret;
  132. pkt = cmd.resp_pkt;
  133. /* Extract NVM response */
  134. nvm_resp = (void *)pkt->data;
  135. ret = le16_to_cpu(nvm_resp->status);
  136. bytes_read = le16_to_cpu(nvm_resp->length);
  137. offset_read = le16_to_cpu(nvm_resp->offset);
  138. resp_data = nvm_resp->data;
  139. if (ret) {
  140. if ((offset != 0) &&
  141. (ret == READ_NVM_CHUNK_NOT_VALID_ADDRESS)) {
  142. /*
  143. * meaning of NOT_VALID_ADDRESS:
  144. * driver try to read chunk from address that is
  145. * multiple of 2K and got an error since addr is empty.
  146. * meaning of (offset != 0): driver already
  147. * read valid data from another chunk so this case
  148. * is not an error.
  149. */
  150. IWL_DEBUG_EEPROM(mvm->trans->dev,
  151. "NVM access command failed on offset 0x%x since that section size is multiple 2K\n",
  152. offset);
  153. ret = 0;
  154. } else {
  155. IWL_DEBUG_EEPROM(mvm->trans->dev,
  156. "NVM access command failed with status %d (device: %s)\n",
  157. ret, mvm->cfg->name);
  158. ret = -EIO;
  159. }
  160. goto exit;
  161. }
  162. if (offset_read != offset) {
  163. IWL_ERR(mvm, "NVM ACCESS response with invalid offset %d\n",
  164. offset_read);
  165. ret = -EINVAL;
  166. goto exit;
  167. }
  168. /* Write data to NVM */
  169. memcpy(data + offset, resp_data, bytes_read);
  170. ret = bytes_read;
  171. exit:
  172. iwl_free_resp(&cmd);
  173. return ret;
  174. }
  175. static int iwl_nvm_write_section(struct iwl_mvm *mvm, u16 section,
  176. const u8 *data, u16 length)
  177. {
  178. int offset = 0;
  179. /* copy data in chunks of 2k (and remainder if any) */
  180. while (offset < length) {
  181. int chunk_size, ret;
  182. chunk_size = min(IWL_NVM_DEFAULT_CHUNK_SIZE,
  183. length - offset);
  184. ret = iwl_nvm_write_chunk(mvm, section, offset,
  185. chunk_size, data + offset);
  186. if (ret < 0)
  187. return ret;
  188. offset += chunk_size;
  189. }
  190. return 0;
  191. }
  192. /*
  193. * Reads an NVM section completely.
  194. * NICs prior to 7000 family doesn't have a real NVM, but just read
  195. * section 0 which is the EEPROM. Because the EEPROM reading is unlimited
  196. * by uCode, we need to manually check in this case that we don't
  197. * overflow and try to read more than the EEPROM size.
  198. * For 7000 family NICs, we supply the maximal size we can read, and
  199. * the uCode fills the response with as much data as we can,
  200. * without overflowing, so no check is needed.
  201. */
  202. static int iwl_nvm_read_section(struct iwl_mvm *mvm, u16 section,
  203. u8 *data, u32 size_read)
  204. {
  205. u16 length, offset = 0;
  206. int ret;
  207. /* Set nvm section read length */
  208. length = IWL_NVM_DEFAULT_CHUNK_SIZE;
  209. ret = length;
  210. /* Read the NVM until exhausted (reading less than requested) */
  211. while (ret == length) {
  212. /* Check no memory assumptions fail and cause an overflow */
  213. if ((size_read + offset + length) >
  214. mvm->cfg->base_params->eeprom_size) {
  215. IWL_ERR(mvm, "EEPROM size is too small for NVM\n");
  216. return -ENOBUFS;
  217. }
  218. ret = iwl_nvm_read_chunk(mvm, section, offset, length, data);
  219. if (ret < 0) {
  220. IWL_DEBUG_EEPROM(mvm->trans->dev,
  221. "Cannot read NVM from section %d offset %d, length %d\n",
  222. section, offset, length);
  223. return ret;
  224. }
  225. offset += ret;
  226. }
  227. IWL_DEBUG_EEPROM(mvm->trans->dev,
  228. "NVM section %d read completed\n", section);
  229. return offset;
  230. }
  231. static struct iwl_nvm_data *
  232. iwl_parse_nvm_sections(struct iwl_mvm *mvm)
  233. {
  234. struct iwl_nvm_section *sections = mvm->nvm_sections;
  235. const __le16 *hw, *sw, *calib, *regulatory, *mac_override, *phy_sku;
  236. bool lar_enabled;
  237. u32 mac_addr0, mac_addr1;
  238. /* Checking for required sections */
  239. if (mvm->trans->cfg->device_family != IWL_DEVICE_FAMILY_8000) {
  240. if (!mvm->nvm_sections[NVM_SECTION_TYPE_SW].data ||
  241. !mvm->nvm_sections[mvm->cfg->nvm_hw_section_num].data) {
  242. IWL_ERR(mvm, "Can't parse empty OTP/NVM sections\n");
  243. return NULL;
  244. }
  245. } else {
  246. /* SW and REGULATORY sections are mandatory */
  247. if (!mvm->nvm_sections[NVM_SECTION_TYPE_SW].data ||
  248. !mvm->nvm_sections[NVM_SECTION_TYPE_REGULATORY].data) {
  249. IWL_ERR(mvm,
  250. "Can't parse empty family 8000 OTP/NVM sections\n");
  251. return NULL;
  252. }
  253. /* MAC_OVERRIDE or at least HW section must exist */
  254. if (!mvm->nvm_sections[mvm->cfg->nvm_hw_section_num].data &&
  255. !mvm->nvm_sections[NVM_SECTION_TYPE_MAC_OVERRIDE].data) {
  256. IWL_ERR(mvm,
  257. "Can't parse mac_address, empty sections\n");
  258. return NULL;
  259. }
  260. /* PHY_SKU section is mandatory in B0 */
  261. if (!mvm->nvm_sections[NVM_SECTION_TYPE_PHY_SKU].data) {
  262. IWL_ERR(mvm,
  263. "Can't parse phy_sku in B0, empty sections\n");
  264. return NULL;
  265. }
  266. }
  267. if (WARN_ON(!mvm->cfg))
  268. return NULL;
  269. /* read the mac address from WFMP registers */
  270. mac_addr0 = iwl_trans_read_prph(mvm->trans, WFMP_MAC_ADDR_0);
  271. mac_addr1 = iwl_trans_read_prph(mvm->trans, WFMP_MAC_ADDR_1);
  272. hw = (const __le16 *)sections[mvm->cfg->nvm_hw_section_num].data;
  273. sw = (const __le16 *)sections[NVM_SECTION_TYPE_SW].data;
  274. calib = (const __le16 *)sections[NVM_SECTION_TYPE_CALIBRATION].data;
  275. regulatory = (const __le16 *)sections[NVM_SECTION_TYPE_REGULATORY].data;
  276. mac_override =
  277. (const __le16 *)sections[NVM_SECTION_TYPE_MAC_OVERRIDE].data;
  278. phy_sku = (const __le16 *)sections[NVM_SECTION_TYPE_PHY_SKU].data;
  279. lar_enabled = !iwlwifi_mod_params.lar_disable &&
  280. fw_has_capa(&mvm->fw->ucode_capa,
  281. IWL_UCODE_TLV_CAPA_LAR_SUPPORT);
  282. return iwl_parse_nvm_data(mvm->trans->dev, mvm->cfg, hw, sw, calib,
  283. regulatory, mac_override, phy_sku,
  284. mvm->fw->valid_tx_ant, mvm->fw->valid_rx_ant,
  285. lar_enabled, mac_addr0, mac_addr1);
  286. }
  287. #define MAX_NVM_FILE_LEN 16384
  288. /*
  289. * Reads external NVM from a file into mvm->nvm_sections
  290. *
  291. * HOW TO CREATE THE NVM FILE FORMAT:
  292. * ------------------------------
  293. * 1. create hex file, format:
  294. * 3800 -> header
  295. * 0000 -> header
  296. * 5a40 -> data
  297. *
  298. * rev - 6 bit (word1)
  299. * len - 10 bit (word1)
  300. * id - 4 bit (word2)
  301. * rsv - 12 bit (word2)
  302. *
  303. * 2. flip 8bits with 8 bits per line to get the right NVM file format
  304. *
  305. * 3. create binary file from the hex file
  306. *
  307. * 4. save as "iNVM_xxx.bin" under /lib/firmware
  308. */
  309. static int iwl_mvm_read_external_nvm(struct iwl_mvm *mvm)
  310. {
  311. int ret, section_size;
  312. u16 section_id;
  313. const struct firmware *fw_entry;
  314. const struct {
  315. __le16 word1;
  316. __le16 word2;
  317. u8 data[];
  318. } *file_sec;
  319. const u8 *eof, *temp;
  320. int max_section_size;
  321. const __le32 *dword_buff;
  322. #define NVM_WORD1_LEN(x) (8 * (x & 0x03FF))
  323. #define NVM_WORD2_ID(x) (x >> 12)
  324. #define NVM_WORD2_LEN_FAMILY_8000(x) (2 * ((x & 0xFF) << 8 | x >> 8))
  325. #define NVM_WORD1_ID_FAMILY_8000(x) (x >> 4)
  326. #define NVM_HEADER_0 (0x2A504C54)
  327. #define NVM_HEADER_1 (0x4E564D2A)
  328. #define NVM_HEADER_SIZE (4 * sizeof(u32))
  329. IWL_DEBUG_EEPROM(mvm->trans->dev, "Read from external NVM\n");
  330. /* Maximal size depends on HW family and step */
  331. if (mvm->trans->cfg->device_family != IWL_DEVICE_FAMILY_8000)
  332. max_section_size = IWL_MAX_NVM_SECTION_SIZE;
  333. else
  334. max_section_size = IWL_MAX_NVM_8000_SECTION_SIZE;
  335. /*
  336. * Obtain NVM image via request_firmware. Since we already used
  337. * request_firmware_nowait() for the firmware binary load and only
  338. * get here after that we assume the NVM request can be satisfied
  339. * synchronously.
  340. */
  341. ret = request_firmware(&fw_entry, mvm->nvm_file_name,
  342. mvm->trans->dev);
  343. if (ret) {
  344. IWL_ERR(mvm, "ERROR: %s isn't available %d\n",
  345. mvm->nvm_file_name, ret);
  346. return ret;
  347. }
  348. IWL_INFO(mvm, "Loaded NVM file %s (%zu bytes)\n",
  349. mvm->nvm_file_name, fw_entry->size);
  350. if (fw_entry->size > MAX_NVM_FILE_LEN) {
  351. IWL_ERR(mvm, "NVM file too large\n");
  352. ret = -EINVAL;
  353. goto out;
  354. }
  355. eof = fw_entry->data + fw_entry->size;
  356. dword_buff = (__le32 *)fw_entry->data;
  357. /* some NVM file will contain a header.
  358. * The header is identified by 2 dwords header as follow:
  359. * dword[0] = 0x2A504C54
  360. * dword[1] = 0x4E564D2A
  361. *
  362. * This header must be skipped when providing the NVM data to the FW.
  363. */
  364. if (fw_entry->size > NVM_HEADER_SIZE &&
  365. dword_buff[0] == cpu_to_le32(NVM_HEADER_0) &&
  366. dword_buff[1] == cpu_to_le32(NVM_HEADER_1)) {
  367. file_sec = (void *)(fw_entry->data + NVM_HEADER_SIZE);
  368. IWL_INFO(mvm, "NVM Version %08X\n", le32_to_cpu(dword_buff[2]));
  369. IWL_INFO(mvm, "NVM Manufacturing date %08X\n",
  370. le32_to_cpu(dword_buff[3]));
  371. /* nvm file validation, dword_buff[2] holds the file version */
  372. if ((CSR_HW_REV_STEP(mvm->trans->hw_rev) == SILICON_C_STEP &&
  373. le32_to_cpu(dword_buff[2]) < 0xE4A) ||
  374. (CSR_HW_REV_STEP(mvm->trans->hw_rev) == SILICON_B_STEP &&
  375. le32_to_cpu(dword_buff[2]) >= 0xE4A)) {
  376. ret = -EFAULT;
  377. goto out;
  378. }
  379. } else {
  380. file_sec = (void *)fw_entry->data;
  381. }
  382. while (true) {
  383. if (file_sec->data > eof) {
  384. IWL_ERR(mvm,
  385. "ERROR - NVM file too short for section header\n");
  386. ret = -EINVAL;
  387. break;
  388. }
  389. /* check for EOF marker */
  390. if (!file_sec->word1 && !file_sec->word2) {
  391. ret = 0;
  392. break;
  393. }
  394. if (mvm->trans->cfg->device_family != IWL_DEVICE_FAMILY_8000) {
  395. section_size =
  396. 2 * NVM_WORD1_LEN(le16_to_cpu(file_sec->word1));
  397. section_id = NVM_WORD2_ID(le16_to_cpu(file_sec->word2));
  398. } else {
  399. section_size = 2 * NVM_WORD2_LEN_FAMILY_8000(
  400. le16_to_cpu(file_sec->word2));
  401. section_id = NVM_WORD1_ID_FAMILY_8000(
  402. le16_to_cpu(file_sec->word1));
  403. }
  404. if (section_size > max_section_size) {
  405. IWL_ERR(mvm, "ERROR - section too large (%d)\n",
  406. section_size);
  407. ret = -EINVAL;
  408. break;
  409. }
  410. if (!section_size) {
  411. IWL_ERR(mvm, "ERROR - section empty\n");
  412. ret = -EINVAL;
  413. break;
  414. }
  415. if (file_sec->data + section_size > eof) {
  416. IWL_ERR(mvm,
  417. "ERROR - NVM file too short for section (%d bytes)\n",
  418. section_size);
  419. ret = -EINVAL;
  420. break;
  421. }
  422. if (WARN(section_id >= NVM_MAX_NUM_SECTIONS,
  423. "Invalid NVM section ID %d\n", section_id)) {
  424. ret = -EINVAL;
  425. break;
  426. }
  427. temp = kmemdup(file_sec->data, section_size, GFP_KERNEL);
  428. if (!temp) {
  429. ret = -ENOMEM;
  430. break;
  431. }
  432. mvm->nvm_sections[section_id].data = temp;
  433. mvm->nvm_sections[section_id].length = section_size;
  434. /* advance to the next section */
  435. file_sec = (void *)(file_sec->data + section_size);
  436. }
  437. out:
  438. release_firmware(fw_entry);
  439. return ret;
  440. }
  441. /* Loads the NVM data stored in mvm->nvm_sections into the NIC */
  442. int iwl_mvm_load_nvm_to_nic(struct iwl_mvm *mvm)
  443. {
  444. int i, ret = 0;
  445. struct iwl_nvm_section *sections = mvm->nvm_sections;
  446. IWL_DEBUG_EEPROM(mvm->trans->dev, "'Write to NVM\n");
  447. for (i = 0; i < ARRAY_SIZE(mvm->nvm_sections); i++) {
  448. if (!mvm->nvm_sections[i].data || !mvm->nvm_sections[i].length)
  449. continue;
  450. ret = iwl_nvm_write_section(mvm, i, sections[i].data,
  451. sections[i].length);
  452. if (ret < 0) {
  453. IWL_ERR(mvm, "iwl_mvm_send_cmd failed: %d\n", ret);
  454. break;
  455. }
  456. }
  457. return ret;
  458. }
  459. int iwl_nvm_init(struct iwl_mvm *mvm, bool read_nvm_from_nic)
  460. {
  461. int ret, section;
  462. u32 size_read = 0;
  463. u8 *nvm_buffer, *temp;
  464. const char *nvm_file_B = mvm->cfg->default_nvm_file_B_step;
  465. const char *nvm_file_C = mvm->cfg->default_nvm_file_C_step;
  466. if (WARN_ON_ONCE(mvm->cfg->nvm_hw_section_num >= NVM_MAX_NUM_SECTIONS))
  467. return -EINVAL;
  468. /* load NVM values from nic */
  469. if (read_nvm_from_nic) {
  470. /* Read From FW NVM */
  471. IWL_DEBUG_EEPROM(mvm->trans->dev, "Read from NVM\n");
  472. nvm_buffer = kmalloc(mvm->cfg->base_params->eeprom_size,
  473. GFP_KERNEL);
  474. if (!nvm_buffer)
  475. return -ENOMEM;
  476. for (section = 0; section < NVM_MAX_NUM_SECTIONS; section++) {
  477. /* we override the constness for initial read */
  478. ret = iwl_nvm_read_section(mvm, section, nvm_buffer,
  479. size_read);
  480. if (ret < 0)
  481. continue;
  482. size_read += ret;
  483. temp = kmemdup(nvm_buffer, ret, GFP_KERNEL);
  484. if (!temp) {
  485. ret = -ENOMEM;
  486. break;
  487. }
  488. mvm->nvm_sections[section].data = temp;
  489. mvm->nvm_sections[section].length = ret;
  490. #ifdef CONFIG_IWLWIFI_DEBUGFS
  491. switch (section) {
  492. case NVM_SECTION_TYPE_SW:
  493. mvm->nvm_sw_blob.data = temp;
  494. mvm->nvm_sw_blob.size = ret;
  495. break;
  496. case NVM_SECTION_TYPE_CALIBRATION:
  497. mvm->nvm_calib_blob.data = temp;
  498. mvm->nvm_calib_blob.size = ret;
  499. break;
  500. case NVM_SECTION_TYPE_PRODUCTION:
  501. mvm->nvm_prod_blob.data = temp;
  502. mvm->nvm_prod_blob.size = ret;
  503. break;
  504. default:
  505. if (section == mvm->cfg->nvm_hw_section_num) {
  506. mvm->nvm_hw_blob.data = temp;
  507. mvm->nvm_hw_blob.size = ret;
  508. break;
  509. }
  510. }
  511. #endif
  512. }
  513. if (!size_read)
  514. IWL_ERR(mvm, "OTP is blank\n");
  515. kfree(nvm_buffer);
  516. }
  517. /* Only if PNVM selected in the mod param - load external NVM */
  518. if (mvm->nvm_file_name) {
  519. /* read External NVM file from the mod param */
  520. ret = iwl_mvm_read_external_nvm(mvm);
  521. if (ret) {
  522. /* choose the nvm_file name according to the
  523. * HW step
  524. */
  525. if (CSR_HW_REV_STEP(mvm->trans->hw_rev) ==
  526. SILICON_B_STEP)
  527. mvm->nvm_file_name = nvm_file_B;
  528. else
  529. mvm->nvm_file_name = nvm_file_C;
  530. if (ret == -EFAULT && mvm->nvm_file_name) {
  531. /* in case nvm file was failed try again */
  532. ret = iwl_mvm_read_external_nvm(mvm);
  533. if (ret)
  534. return ret;
  535. } else {
  536. return ret;
  537. }
  538. }
  539. }
  540. /* parse the relevant nvm sections */
  541. mvm->nvm_data = iwl_parse_nvm_sections(mvm);
  542. if (!mvm->nvm_data)
  543. return -ENODATA;
  544. IWL_DEBUG_EEPROM(mvm->trans->dev, "nvm version = %x\n",
  545. mvm->nvm_data->nvm_version);
  546. return 0;
  547. }
  548. struct iwl_mcc_update_resp *
  549. iwl_mvm_update_mcc(struct iwl_mvm *mvm, const char *alpha2,
  550. enum iwl_mcc_source src_id)
  551. {
  552. struct iwl_mcc_update_cmd mcc_update_cmd = {
  553. .mcc = cpu_to_le16(alpha2[0] << 8 | alpha2[1]),
  554. .source_id = (u8)src_id,
  555. };
  556. struct iwl_mcc_update_resp *mcc_resp, *resp_cp = NULL;
  557. struct iwl_rx_packet *pkt;
  558. struct iwl_host_cmd cmd = {
  559. .id = MCC_UPDATE_CMD,
  560. .flags = CMD_WANT_SKB,
  561. .data = { &mcc_update_cmd },
  562. };
  563. int ret;
  564. u32 status;
  565. int resp_len, n_channels;
  566. u16 mcc;
  567. if (WARN_ON_ONCE(!iwl_mvm_is_lar_supported(mvm)))
  568. return ERR_PTR(-EOPNOTSUPP);
  569. cmd.len[0] = sizeof(struct iwl_mcc_update_cmd);
  570. IWL_DEBUG_LAR(mvm, "send MCC update to FW with '%c%c' src = %d\n",
  571. alpha2[0], alpha2[1], src_id);
  572. ret = iwl_mvm_send_cmd(mvm, &cmd);
  573. if (ret)
  574. return ERR_PTR(ret);
  575. pkt = cmd.resp_pkt;
  576. /* Extract MCC response */
  577. mcc_resp = (void *)pkt->data;
  578. status = le32_to_cpu(mcc_resp->status);
  579. mcc = le16_to_cpu(mcc_resp->mcc);
  580. /* W/A for a FW/NVM issue - returns 0x00 for the world domain */
  581. if (mcc == 0) {
  582. mcc = 0x3030; /* "00" - world */
  583. mcc_resp->mcc = cpu_to_le16(mcc);
  584. }
  585. n_channels = __le32_to_cpu(mcc_resp->n_channels);
  586. IWL_DEBUG_LAR(mvm,
  587. "MCC response status: 0x%x. new MCC: 0x%x ('%c%c') change: %d n_chans: %d\n",
  588. status, mcc, mcc >> 8, mcc & 0xff,
  589. !!(status == MCC_RESP_NEW_CHAN_PROFILE), n_channels);
  590. resp_len = sizeof(*mcc_resp) + n_channels * sizeof(__le32);
  591. resp_cp = kmemdup(mcc_resp, resp_len, GFP_KERNEL);
  592. if (!resp_cp) {
  593. ret = -ENOMEM;
  594. goto exit;
  595. }
  596. ret = 0;
  597. exit:
  598. iwl_free_resp(&cmd);
  599. if (ret)
  600. return ERR_PTR(ret);
  601. return resp_cp;
  602. }
  603. #ifdef CONFIG_ACPI
  604. #define WRD_METHOD "WRDD"
  605. #define WRDD_WIFI (0x07)
  606. #define WRDD_WIGIG (0x10)
  607. static u32 iwl_mvm_wrdd_get_mcc(struct iwl_mvm *mvm, union acpi_object *wrdd)
  608. {
  609. union acpi_object *mcc_pkg, *domain_type, *mcc_value;
  610. u32 i;
  611. if (wrdd->type != ACPI_TYPE_PACKAGE ||
  612. wrdd->package.count < 2 ||
  613. wrdd->package.elements[0].type != ACPI_TYPE_INTEGER ||
  614. wrdd->package.elements[0].integer.value != 0) {
  615. IWL_DEBUG_LAR(mvm, "Unsupported wrdd structure\n");
  616. return 0;
  617. }
  618. for (i = 1 ; i < wrdd->package.count ; ++i) {
  619. mcc_pkg = &wrdd->package.elements[i];
  620. if (mcc_pkg->type != ACPI_TYPE_PACKAGE ||
  621. mcc_pkg->package.count < 2 ||
  622. mcc_pkg->package.elements[0].type != ACPI_TYPE_INTEGER ||
  623. mcc_pkg->package.elements[1].type != ACPI_TYPE_INTEGER) {
  624. mcc_pkg = NULL;
  625. continue;
  626. }
  627. domain_type = &mcc_pkg->package.elements[0];
  628. if (domain_type->integer.value == WRDD_WIFI)
  629. break;
  630. mcc_pkg = NULL;
  631. }
  632. if (mcc_pkg) {
  633. mcc_value = &mcc_pkg->package.elements[1];
  634. return mcc_value->integer.value;
  635. }
  636. return 0;
  637. }
  638. static int iwl_mvm_get_bios_mcc(struct iwl_mvm *mvm, char *mcc)
  639. {
  640. acpi_handle root_handle;
  641. acpi_handle handle;
  642. struct acpi_buffer wrdd = {ACPI_ALLOCATE_BUFFER, NULL};
  643. acpi_status status;
  644. u32 mcc_val;
  645. struct pci_dev *pdev = to_pci_dev(mvm->dev);
  646. root_handle = ACPI_HANDLE(&pdev->dev);
  647. if (!root_handle) {
  648. IWL_DEBUG_LAR(mvm,
  649. "Could not retrieve root port ACPI handle\n");
  650. return -ENOENT;
  651. }
  652. /* Get the method's handle */
  653. status = acpi_get_handle(root_handle, (acpi_string)WRD_METHOD, &handle);
  654. if (ACPI_FAILURE(status)) {
  655. IWL_DEBUG_LAR(mvm, "WRD method not found\n");
  656. return -ENOENT;
  657. }
  658. /* Call WRDD with no arguments */
  659. status = acpi_evaluate_object(handle, NULL, NULL, &wrdd);
  660. if (ACPI_FAILURE(status)) {
  661. IWL_DEBUG_LAR(mvm, "WRDC invocation failed (0x%x)\n", status);
  662. return -ENOENT;
  663. }
  664. mcc_val = iwl_mvm_wrdd_get_mcc(mvm, wrdd.pointer);
  665. kfree(wrdd.pointer);
  666. if (!mcc_val)
  667. return -ENOENT;
  668. mcc[0] = (mcc_val >> 8) & 0xff;
  669. mcc[1] = mcc_val & 0xff;
  670. mcc[2] = '\0';
  671. return 0;
  672. }
  673. #else /* CONFIG_ACPI */
  674. static int iwl_mvm_get_bios_mcc(struct iwl_mvm *mvm, char *mcc)
  675. {
  676. return -ENOENT;
  677. }
  678. #endif
  679. int iwl_mvm_init_mcc(struct iwl_mvm *mvm)
  680. {
  681. bool tlv_lar;
  682. bool nvm_lar;
  683. int retval;
  684. struct ieee80211_regdomain *regd;
  685. char mcc[3];
  686. if (mvm->cfg->device_family == IWL_DEVICE_FAMILY_8000) {
  687. tlv_lar = fw_has_capa(&mvm->fw->ucode_capa,
  688. IWL_UCODE_TLV_CAPA_LAR_SUPPORT);
  689. nvm_lar = mvm->nvm_data->lar_enabled;
  690. if (tlv_lar != nvm_lar)
  691. IWL_INFO(mvm,
  692. "Conflict between TLV & NVM regarding enabling LAR (TLV = %s NVM =%s)\n",
  693. tlv_lar ? "enabled" : "disabled",
  694. nvm_lar ? "enabled" : "disabled");
  695. }
  696. if (!iwl_mvm_is_lar_supported(mvm))
  697. return 0;
  698. /*
  699. * try to replay the last set MCC to FW. If it doesn't exist,
  700. * queue an update to cfg80211 to retrieve the default alpha2 from FW.
  701. */
  702. retval = iwl_mvm_init_fw_regd(mvm);
  703. if (retval != -ENOENT)
  704. return retval;
  705. /*
  706. * Driver regulatory hint for initial update, this also informs the
  707. * firmware we support wifi location updates.
  708. * Disallow scans that might crash the FW while the LAR regdomain
  709. * is not set.
  710. */
  711. mvm->lar_regdom_set = false;
  712. regd = iwl_mvm_get_current_regdomain(mvm, NULL);
  713. if (IS_ERR_OR_NULL(regd))
  714. return -EIO;
  715. if (iwl_mvm_is_wifi_mcc_supported(mvm) &&
  716. !iwl_mvm_get_bios_mcc(mvm, mcc)) {
  717. kfree(regd);
  718. regd = iwl_mvm_get_regdomain(mvm->hw->wiphy, mcc,
  719. MCC_SOURCE_BIOS, NULL);
  720. if (IS_ERR_OR_NULL(regd))
  721. return -EIO;
  722. }
  723. retval = regulatory_set_wiphy_regd_sync_rtnl(mvm->hw->wiphy, regd);
  724. kfree(regd);
  725. return retval;
  726. }
  727. void iwl_mvm_rx_chub_update_mcc(struct iwl_mvm *mvm,
  728. struct iwl_rx_cmd_buffer *rxb)
  729. {
  730. struct iwl_rx_packet *pkt = rxb_addr(rxb);
  731. struct iwl_mcc_chub_notif *notif = (void *)pkt->data;
  732. enum iwl_mcc_source src;
  733. char mcc[3];
  734. struct ieee80211_regdomain *regd;
  735. lockdep_assert_held(&mvm->mutex);
  736. if (WARN_ON_ONCE(!iwl_mvm_is_lar_supported(mvm)))
  737. return;
  738. mcc[0] = notif->mcc >> 8;
  739. mcc[1] = notif->mcc & 0xff;
  740. mcc[2] = '\0';
  741. src = notif->source_id;
  742. IWL_DEBUG_LAR(mvm,
  743. "RX: received chub update mcc cmd (mcc '%s' src %d)\n",
  744. mcc, src);
  745. regd = iwl_mvm_get_regdomain(mvm->hw->wiphy, mcc, src, NULL);
  746. if (IS_ERR_OR_NULL(regd))
  747. return;
  748. regulatory_set_wiphy_regd(mvm->hw->wiphy, regd);
  749. kfree(regd);
  750. }