xmit.c 26 KB

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  1. /*
  2. Broadcom B43 wireless driver
  3. Transmission (TX/RX) related functions.
  4. Copyright (C) 2005 Martin Langer <martin-langer@gmx.de>
  5. Copyright (C) 2005 Stefano Brivio <stefano.brivio@polimi.it>
  6. Copyright (C) 2005, 2006 Michael Buesch <m@bues.ch>
  7. Copyright (C) 2005 Danny van Dyk <kugelfang@gentoo.org>
  8. Copyright (C) 2005 Andreas Jaggi <andreas.jaggi@waterwave.ch>
  9. This program is free software; you can redistribute it and/or modify
  10. it under the terms of the GNU General Public License as published by
  11. the Free Software Foundation; either version 2 of the License, or
  12. (at your option) any later version.
  13. This program is distributed in the hope that it will be useful,
  14. but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. GNU General Public License for more details.
  17. You should have received a copy of the GNU General Public License
  18. along with this program; see the file COPYING. If not, write to
  19. the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor,
  20. Boston, MA 02110-1301, USA.
  21. */
  22. #include "xmit.h"
  23. #include "phy_common.h"
  24. #include "dma.h"
  25. #include "pio.h"
  26. static const struct b43_tx_legacy_rate_phy_ctl_entry b43_tx_legacy_rate_phy_ctl[] = {
  27. { B43_CCK_RATE_1MB, 0x0, 0x0 },
  28. { B43_CCK_RATE_2MB, 0x0, 0x1 },
  29. { B43_CCK_RATE_5MB, 0x0, 0x2 },
  30. { B43_CCK_RATE_11MB, 0x0, 0x3 },
  31. { B43_OFDM_RATE_6MB, B43_TXH_PHY1_CRATE_1_2, B43_TXH_PHY1_MODUL_BPSK },
  32. { B43_OFDM_RATE_9MB, B43_TXH_PHY1_CRATE_3_4, B43_TXH_PHY1_MODUL_BPSK },
  33. { B43_OFDM_RATE_12MB, B43_TXH_PHY1_CRATE_1_2, B43_TXH_PHY1_MODUL_QPSK },
  34. { B43_OFDM_RATE_18MB, B43_TXH_PHY1_CRATE_3_4, B43_TXH_PHY1_MODUL_QPSK },
  35. { B43_OFDM_RATE_24MB, B43_TXH_PHY1_CRATE_1_2, B43_TXH_PHY1_MODUL_QAM16 },
  36. { B43_OFDM_RATE_36MB, B43_TXH_PHY1_CRATE_3_4, B43_TXH_PHY1_MODUL_QAM16 },
  37. { B43_OFDM_RATE_48MB, B43_TXH_PHY1_CRATE_2_3, B43_TXH_PHY1_MODUL_QAM64 },
  38. { B43_OFDM_RATE_54MB, B43_TXH_PHY1_CRATE_3_4, B43_TXH_PHY1_MODUL_QAM64 },
  39. };
  40. static const struct b43_tx_legacy_rate_phy_ctl_entry *
  41. b43_tx_legacy_rate_phy_ctl_ent(u8 bitrate)
  42. {
  43. const struct b43_tx_legacy_rate_phy_ctl_entry *e;
  44. unsigned int i;
  45. for (i = 0; i < ARRAY_SIZE(b43_tx_legacy_rate_phy_ctl); i++) {
  46. e = &(b43_tx_legacy_rate_phy_ctl[i]);
  47. if (e->bitrate == bitrate)
  48. return e;
  49. }
  50. B43_WARN_ON(1);
  51. return NULL;
  52. }
  53. /* Extract the bitrate index out of a CCK PLCP header. */
  54. static int b43_plcp_get_bitrate_idx_cck(struct b43_plcp_hdr6 *plcp)
  55. {
  56. switch (plcp->raw[0]) {
  57. case 0x0A:
  58. return 0;
  59. case 0x14:
  60. return 1;
  61. case 0x37:
  62. return 2;
  63. case 0x6E:
  64. return 3;
  65. }
  66. return -1;
  67. }
  68. /* Extract the bitrate index out of an OFDM PLCP header. */
  69. static int b43_plcp_get_bitrate_idx_ofdm(struct b43_plcp_hdr6 *plcp, bool ghz5)
  70. {
  71. /* For 2 GHz band first OFDM rate is at index 4, see main.c */
  72. int base = ghz5 ? 0 : 4;
  73. switch (plcp->raw[0] & 0xF) {
  74. case 0xB:
  75. return base + 0;
  76. case 0xF:
  77. return base + 1;
  78. case 0xA:
  79. return base + 2;
  80. case 0xE:
  81. return base + 3;
  82. case 0x9:
  83. return base + 4;
  84. case 0xD:
  85. return base + 5;
  86. case 0x8:
  87. return base + 6;
  88. case 0xC:
  89. return base + 7;
  90. }
  91. return -1;
  92. }
  93. u8 b43_plcp_get_ratecode_cck(const u8 bitrate)
  94. {
  95. switch (bitrate) {
  96. case B43_CCK_RATE_1MB:
  97. return 0x0A;
  98. case B43_CCK_RATE_2MB:
  99. return 0x14;
  100. case B43_CCK_RATE_5MB:
  101. return 0x37;
  102. case B43_CCK_RATE_11MB:
  103. return 0x6E;
  104. }
  105. B43_WARN_ON(1);
  106. return 0;
  107. }
  108. u8 b43_plcp_get_ratecode_ofdm(const u8 bitrate)
  109. {
  110. switch (bitrate) {
  111. case B43_OFDM_RATE_6MB:
  112. return 0xB;
  113. case B43_OFDM_RATE_9MB:
  114. return 0xF;
  115. case B43_OFDM_RATE_12MB:
  116. return 0xA;
  117. case B43_OFDM_RATE_18MB:
  118. return 0xE;
  119. case B43_OFDM_RATE_24MB:
  120. return 0x9;
  121. case B43_OFDM_RATE_36MB:
  122. return 0xD;
  123. case B43_OFDM_RATE_48MB:
  124. return 0x8;
  125. case B43_OFDM_RATE_54MB:
  126. return 0xC;
  127. }
  128. B43_WARN_ON(1);
  129. return 0;
  130. }
  131. void b43_generate_plcp_hdr(struct b43_plcp_hdr4 *plcp,
  132. const u16 octets, const u8 bitrate)
  133. {
  134. __u8 *raw = plcp->raw;
  135. if (b43_is_ofdm_rate(bitrate)) {
  136. u32 d;
  137. d = b43_plcp_get_ratecode_ofdm(bitrate);
  138. B43_WARN_ON(octets & 0xF000);
  139. d |= (octets << 5);
  140. plcp->data = cpu_to_le32(d);
  141. } else {
  142. u32 plen;
  143. plen = octets * 16 / bitrate;
  144. if ((octets * 16 % bitrate) > 0) {
  145. plen++;
  146. if ((bitrate == B43_CCK_RATE_11MB)
  147. && ((octets * 8 % 11) < 4)) {
  148. raw[1] = 0x84;
  149. } else
  150. raw[1] = 0x04;
  151. } else
  152. raw[1] = 0x04;
  153. plcp->data |= cpu_to_le32(plen << 16);
  154. raw[0] = b43_plcp_get_ratecode_cck(bitrate);
  155. }
  156. }
  157. /* TODO: verify if needed for SSLPN or LCN */
  158. static u16 b43_generate_tx_phy_ctl1(struct b43_wldev *dev, u8 bitrate)
  159. {
  160. const struct b43_phy *phy = &dev->phy;
  161. const struct b43_tx_legacy_rate_phy_ctl_entry *e;
  162. u16 control = 0;
  163. u16 bw;
  164. if (phy->type == B43_PHYTYPE_LP)
  165. bw = B43_TXH_PHY1_BW_20;
  166. else /* FIXME */
  167. bw = B43_TXH_PHY1_BW_20;
  168. if (0) { /* FIXME: MIMO */
  169. } else if (b43_is_cck_rate(bitrate) && phy->type != B43_PHYTYPE_LP) {
  170. control = bw;
  171. } else {
  172. control = bw;
  173. e = b43_tx_legacy_rate_phy_ctl_ent(bitrate);
  174. if (e) {
  175. control |= e->coding_rate;
  176. control |= e->modulation;
  177. }
  178. control |= B43_TXH_PHY1_MODE_SISO;
  179. }
  180. return control;
  181. }
  182. static u8 b43_calc_fallback_rate(u8 bitrate)
  183. {
  184. switch (bitrate) {
  185. case B43_CCK_RATE_1MB:
  186. return B43_CCK_RATE_1MB;
  187. case B43_CCK_RATE_2MB:
  188. return B43_CCK_RATE_1MB;
  189. case B43_CCK_RATE_5MB:
  190. return B43_CCK_RATE_2MB;
  191. case B43_CCK_RATE_11MB:
  192. return B43_CCK_RATE_5MB;
  193. case B43_OFDM_RATE_6MB:
  194. return B43_CCK_RATE_5MB;
  195. case B43_OFDM_RATE_9MB:
  196. return B43_OFDM_RATE_6MB;
  197. case B43_OFDM_RATE_12MB:
  198. return B43_OFDM_RATE_9MB;
  199. case B43_OFDM_RATE_18MB:
  200. return B43_OFDM_RATE_12MB;
  201. case B43_OFDM_RATE_24MB:
  202. return B43_OFDM_RATE_18MB;
  203. case B43_OFDM_RATE_36MB:
  204. return B43_OFDM_RATE_24MB;
  205. case B43_OFDM_RATE_48MB:
  206. return B43_OFDM_RATE_36MB;
  207. case B43_OFDM_RATE_54MB:
  208. return B43_OFDM_RATE_48MB;
  209. }
  210. B43_WARN_ON(1);
  211. return 0;
  212. }
  213. /* Generate a TX data header. */
  214. int b43_generate_txhdr(struct b43_wldev *dev,
  215. u8 *_txhdr,
  216. struct sk_buff *skb_frag,
  217. struct ieee80211_tx_info *info,
  218. u16 cookie)
  219. {
  220. const unsigned char *fragment_data = skb_frag->data;
  221. unsigned int fragment_len = skb_frag->len;
  222. struct b43_txhdr *txhdr = (struct b43_txhdr *)_txhdr;
  223. const struct b43_phy *phy = &dev->phy;
  224. const struct ieee80211_hdr *wlhdr =
  225. (const struct ieee80211_hdr *)fragment_data;
  226. int use_encryption = !!info->control.hw_key;
  227. __le16 fctl = wlhdr->frame_control;
  228. struct ieee80211_rate *fbrate;
  229. u8 rate, rate_fb;
  230. int rate_ofdm, rate_fb_ofdm;
  231. unsigned int plcp_fragment_len;
  232. u32 mac_ctl = 0;
  233. u16 phy_ctl = 0;
  234. bool fill_phy_ctl1 = (phy->type == B43_PHYTYPE_LP ||
  235. phy->type == B43_PHYTYPE_N ||
  236. phy->type == B43_PHYTYPE_HT);
  237. u8 extra_ft = 0;
  238. struct ieee80211_rate *txrate;
  239. struct ieee80211_tx_rate *rates;
  240. memset(txhdr, 0, sizeof(*txhdr));
  241. txrate = ieee80211_get_tx_rate(dev->wl->hw, info);
  242. rate = txrate ? txrate->hw_value : B43_CCK_RATE_1MB;
  243. rate_ofdm = b43_is_ofdm_rate(rate);
  244. fbrate = ieee80211_get_alt_retry_rate(dev->wl->hw, info, 0) ? : txrate;
  245. rate_fb = fbrate->hw_value;
  246. rate_fb_ofdm = b43_is_ofdm_rate(rate_fb);
  247. if (rate_ofdm)
  248. txhdr->phy_rate = b43_plcp_get_ratecode_ofdm(rate);
  249. else
  250. txhdr->phy_rate = b43_plcp_get_ratecode_cck(rate);
  251. txhdr->mac_frame_ctl = wlhdr->frame_control;
  252. memcpy(txhdr->tx_receiver, wlhdr->addr1, ETH_ALEN);
  253. /* Calculate duration for fallback rate */
  254. if ((rate_fb == rate) ||
  255. (wlhdr->duration_id & cpu_to_le16(0x8000)) ||
  256. (wlhdr->duration_id == cpu_to_le16(0))) {
  257. /* If the fallback rate equals the normal rate or the
  258. * dur_id field contains an AID, CFP magic or 0,
  259. * use the original dur_id field. */
  260. txhdr->dur_fb = wlhdr->duration_id;
  261. } else {
  262. txhdr->dur_fb = ieee80211_generic_frame_duration(
  263. dev->wl->hw, info->control.vif, info->band,
  264. fragment_len, fbrate);
  265. }
  266. plcp_fragment_len = fragment_len + FCS_LEN;
  267. if (use_encryption) {
  268. u8 key_idx = info->control.hw_key->hw_key_idx;
  269. struct b43_key *key;
  270. int wlhdr_len;
  271. size_t iv_len;
  272. B43_WARN_ON(key_idx >= ARRAY_SIZE(dev->key));
  273. key = &(dev->key[key_idx]);
  274. if (unlikely(!key->keyconf)) {
  275. /* This key is invalid. This might only happen
  276. * in a short timeframe after machine resume before
  277. * we were able to reconfigure keys.
  278. * Drop this packet completely. Do not transmit it
  279. * unencrypted to avoid leaking information. */
  280. return -ENOKEY;
  281. }
  282. /* Hardware appends ICV. */
  283. plcp_fragment_len += info->control.hw_key->icv_len;
  284. key_idx = b43_kidx_to_fw(dev, key_idx);
  285. mac_ctl |= (key_idx << B43_TXH_MAC_KEYIDX_SHIFT) &
  286. B43_TXH_MAC_KEYIDX;
  287. mac_ctl |= (key->algorithm << B43_TXH_MAC_KEYALG_SHIFT) &
  288. B43_TXH_MAC_KEYALG;
  289. wlhdr_len = ieee80211_hdrlen(fctl);
  290. if (key->algorithm == B43_SEC_ALGO_TKIP) {
  291. u16 phase1key[5];
  292. int i;
  293. /* we give the phase1key and iv16 here, the key is stored in
  294. * shm. With that the hardware can do phase 2 and encryption.
  295. */
  296. ieee80211_get_tkip_p1k(info->control.hw_key, skb_frag, phase1key);
  297. /* phase1key is in host endian. Copy to little-endian txhdr->iv. */
  298. for (i = 0; i < 5; i++) {
  299. txhdr->iv[i * 2 + 0] = phase1key[i];
  300. txhdr->iv[i * 2 + 1] = phase1key[i] >> 8;
  301. }
  302. /* iv16 */
  303. memcpy(txhdr->iv + 10, ((u8 *) wlhdr) + wlhdr_len, 3);
  304. } else {
  305. iv_len = min_t(size_t, info->control.hw_key->iv_len,
  306. ARRAY_SIZE(txhdr->iv));
  307. memcpy(txhdr->iv, ((u8 *) wlhdr) + wlhdr_len, iv_len);
  308. }
  309. }
  310. switch (dev->fw.hdr_format) {
  311. case B43_FW_HDR_598:
  312. b43_generate_plcp_hdr((struct b43_plcp_hdr4 *)(&txhdr->format_598.plcp),
  313. plcp_fragment_len, rate);
  314. break;
  315. case B43_FW_HDR_351:
  316. b43_generate_plcp_hdr((struct b43_plcp_hdr4 *)(&txhdr->format_351.plcp),
  317. plcp_fragment_len, rate);
  318. break;
  319. case B43_FW_HDR_410:
  320. b43_generate_plcp_hdr((struct b43_plcp_hdr4 *)(&txhdr->format_410.plcp),
  321. plcp_fragment_len, rate);
  322. break;
  323. }
  324. b43_generate_plcp_hdr((struct b43_plcp_hdr4 *)(&txhdr->plcp_fb),
  325. plcp_fragment_len, rate_fb);
  326. /* Extra Frame Types */
  327. if (rate_fb_ofdm)
  328. extra_ft |= B43_TXH_EFT_FB_OFDM;
  329. else
  330. extra_ft |= B43_TXH_EFT_FB_CCK;
  331. /* Set channel radio code. Note that the micrcode ORs 0x100 to
  332. * this value before comparing it to the value in SHM, if this
  333. * is a 5Ghz packet.
  334. */
  335. txhdr->chan_radio_code = phy->channel;
  336. /* PHY TX Control word */
  337. if (rate_ofdm)
  338. phy_ctl |= B43_TXH_PHY_ENC_OFDM;
  339. else
  340. phy_ctl |= B43_TXH_PHY_ENC_CCK;
  341. if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE)
  342. phy_ctl |= B43_TXH_PHY_SHORTPRMBL;
  343. switch (b43_ieee80211_antenna_sanitize(dev, 0)) {
  344. case 0: /* Default */
  345. phy_ctl |= B43_TXH_PHY_ANT01AUTO;
  346. break;
  347. case 1: /* Antenna 0 */
  348. phy_ctl |= B43_TXH_PHY_ANT0;
  349. break;
  350. case 2: /* Antenna 1 */
  351. phy_ctl |= B43_TXH_PHY_ANT1;
  352. break;
  353. case 3: /* Antenna 2 */
  354. phy_ctl |= B43_TXH_PHY_ANT2;
  355. break;
  356. case 4: /* Antenna 3 */
  357. phy_ctl |= B43_TXH_PHY_ANT3;
  358. break;
  359. default:
  360. B43_WARN_ON(1);
  361. }
  362. rates = info->control.rates;
  363. /* MAC control */
  364. if (!(info->flags & IEEE80211_TX_CTL_NO_ACK))
  365. mac_ctl |= B43_TXH_MAC_ACK;
  366. /* use hardware sequence counter as the non-TID counter */
  367. if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ)
  368. mac_ctl |= B43_TXH_MAC_HWSEQ;
  369. if (info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT)
  370. mac_ctl |= B43_TXH_MAC_STMSDU;
  371. if (!phy->gmode)
  372. mac_ctl |= B43_TXH_MAC_5GHZ;
  373. /* Overwrite rates[0].count to make the retry calculation
  374. * in the tx status easier. need the actual retry limit to
  375. * detect whether the fallback rate was used.
  376. */
  377. if ((rates[0].flags & IEEE80211_TX_RC_USE_RTS_CTS) ||
  378. (rates[0].count <= dev->wl->hw->conf.long_frame_max_tx_count)) {
  379. rates[0].count = dev->wl->hw->conf.long_frame_max_tx_count;
  380. mac_ctl |= B43_TXH_MAC_LONGFRAME;
  381. } else {
  382. rates[0].count = dev->wl->hw->conf.short_frame_max_tx_count;
  383. }
  384. /* Generate the RTS or CTS-to-self frame */
  385. if ((rates[0].flags & IEEE80211_TX_RC_USE_RTS_CTS) ||
  386. (rates[0].flags & IEEE80211_TX_RC_USE_CTS_PROTECT)) {
  387. unsigned int len;
  388. struct ieee80211_hdr *uninitialized_var(hdr);
  389. int rts_rate, rts_rate_fb;
  390. int rts_rate_ofdm, rts_rate_fb_ofdm;
  391. struct b43_plcp_hdr6 *uninitialized_var(plcp);
  392. struct ieee80211_rate *rts_cts_rate;
  393. rts_cts_rate = ieee80211_get_rts_cts_rate(dev->wl->hw, info);
  394. rts_rate = rts_cts_rate ? rts_cts_rate->hw_value : B43_CCK_RATE_1MB;
  395. rts_rate_ofdm = b43_is_ofdm_rate(rts_rate);
  396. rts_rate_fb = b43_calc_fallback_rate(rts_rate);
  397. rts_rate_fb_ofdm = b43_is_ofdm_rate(rts_rate_fb);
  398. if (rates[0].flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
  399. struct ieee80211_cts *uninitialized_var(cts);
  400. switch (dev->fw.hdr_format) {
  401. case B43_FW_HDR_598:
  402. cts = (struct ieee80211_cts *)
  403. (txhdr->format_598.rts_frame);
  404. break;
  405. case B43_FW_HDR_351:
  406. cts = (struct ieee80211_cts *)
  407. (txhdr->format_351.rts_frame);
  408. break;
  409. case B43_FW_HDR_410:
  410. cts = (struct ieee80211_cts *)
  411. (txhdr->format_410.rts_frame);
  412. break;
  413. }
  414. ieee80211_ctstoself_get(dev->wl->hw, info->control.vif,
  415. fragment_data, fragment_len,
  416. info, cts);
  417. mac_ctl |= B43_TXH_MAC_SENDCTS;
  418. len = sizeof(struct ieee80211_cts);
  419. } else {
  420. struct ieee80211_rts *uninitialized_var(rts);
  421. switch (dev->fw.hdr_format) {
  422. case B43_FW_HDR_598:
  423. rts = (struct ieee80211_rts *)
  424. (txhdr->format_598.rts_frame);
  425. break;
  426. case B43_FW_HDR_351:
  427. rts = (struct ieee80211_rts *)
  428. (txhdr->format_351.rts_frame);
  429. break;
  430. case B43_FW_HDR_410:
  431. rts = (struct ieee80211_rts *)
  432. (txhdr->format_410.rts_frame);
  433. break;
  434. }
  435. ieee80211_rts_get(dev->wl->hw, info->control.vif,
  436. fragment_data, fragment_len,
  437. info, rts);
  438. mac_ctl |= B43_TXH_MAC_SENDRTS;
  439. len = sizeof(struct ieee80211_rts);
  440. }
  441. len += FCS_LEN;
  442. /* Generate the PLCP headers for the RTS/CTS frame */
  443. switch (dev->fw.hdr_format) {
  444. case B43_FW_HDR_598:
  445. plcp = &txhdr->format_598.rts_plcp;
  446. break;
  447. case B43_FW_HDR_351:
  448. plcp = &txhdr->format_351.rts_plcp;
  449. break;
  450. case B43_FW_HDR_410:
  451. plcp = &txhdr->format_410.rts_plcp;
  452. break;
  453. }
  454. b43_generate_plcp_hdr((struct b43_plcp_hdr4 *)plcp,
  455. len, rts_rate);
  456. plcp = &txhdr->rts_plcp_fb;
  457. b43_generate_plcp_hdr((struct b43_plcp_hdr4 *)plcp,
  458. len, rts_rate_fb);
  459. switch (dev->fw.hdr_format) {
  460. case B43_FW_HDR_598:
  461. hdr = (struct ieee80211_hdr *)
  462. (&txhdr->format_598.rts_frame);
  463. break;
  464. case B43_FW_HDR_351:
  465. hdr = (struct ieee80211_hdr *)
  466. (&txhdr->format_351.rts_frame);
  467. break;
  468. case B43_FW_HDR_410:
  469. hdr = (struct ieee80211_hdr *)
  470. (&txhdr->format_410.rts_frame);
  471. break;
  472. }
  473. txhdr->rts_dur_fb = hdr->duration_id;
  474. if (rts_rate_ofdm) {
  475. extra_ft |= B43_TXH_EFT_RTS_OFDM;
  476. txhdr->phy_rate_rts =
  477. b43_plcp_get_ratecode_ofdm(rts_rate);
  478. } else {
  479. extra_ft |= B43_TXH_EFT_RTS_CCK;
  480. txhdr->phy_rate_rts =
  481. b43_plcp_get_ratecode_cck(rts_rate);
  482. }
  483. if (rts_rate_fb_ofdm)
  484. extra_ft |= B43_TXH_EFT_RTSFB_OFDM;
  485. else
  486. extra_ft |= B43_TXH_EFT_RTSFB_CCK;
  487. if (rates[0].flags & IEEE80211_TX_RC_USE_RTS_CTS &&
  488. fill_phy_ctl1) {
  489. txhdr->phy_ctl1_rts = cpu_to_le16(
  490. b43_generate_tx_phy_ctl1(dev, rts_rate));
  491. txhdr->phy_ctl1_rts_fb = cpu_to_le16(
  492. b43_generate_tx_phy_ctl1(dev, rts_rate_fb));
  493. }
  494. }
  495. /* Magic cookie */
  496. switch (dev->fw.hdr_format) {
  497. case B43_FW_HDR_598:
  498. txhdr->format_598.cookie = cpu_to_le16(cookie);
  499. break;
  500. case B43_FW_HDR_351:
  501. txhdr->format_351.cookie = cpu_to_le16(cookie);
  502. break;
  503. case B43_FW_HDR_410:
  504. txhdr->format_410.cookie = cpu_to_le16(cookie);
  505. break;
  506. }
  507. if (fill_phy_ctl1) {
  508. txhdr->phy_ctl1 =
  509. cpu_to_le16(b43_generate_tx_phy_ctl1(dev, rate));
  510. txhdr->phy_ctl1_fb =
  511. cpu_to_le16(b43_generate_tx_phy_ctl1(dev, rate_fb));
  512. }
  513. /* Apply the bitfields */
  514. txhdr->mac_ctl = cpu_to_le32(mac_ctl);
  515. txhdr->phy_ctl = cpu_to_le16(phy_ctl);
  516. txhdr->extra_ft = extra_ft;
  517. return 0;
  518. }
  519. static s8 b43_rssi_postprocess(struct b43_wldev *dev,
  520. u8 in_rssi, int ofdm,
  521. int adjust_2053, int adjust_2050)
  522. {
  523. struct b43_phy *phy = &dev->phy;
  524. struct b43_phy_g *gphy = phy->g;
  525. s32 tmp;
  526. switch (phy->radio_ver) {
  527. case 0x2050:
  528. if (ofdm) {
  529. tmp = in_rssi;
  530. if (tmp > 127)
  531. tmp -= 256;
  532. tmp *= 73;
  533. tmp /= 64;
  534. if (adjust_2050)
  535. tmp += 25;
  536. else
  537. tmp -= 3;
  538. } else {
  539. if (dev->dev->bus_sprom->
  540. boardflags_lo & B43_BFL_RSSI) {
  541. if (in_rssi > 63)
  542. in_rssi = 63;
  543. B43_WARN_ON(phy->type != B43_PHYTYPE_G);
  544. tmp = gphy->nrssi_lt[in_rssi];
  545. tmp = 31 - tmp;
  546. tmp *= -131;
  547. tmp /= 128;
  548. tmp -= 57;
  549. } else {
  550. tmp = in_rssi;
  551. tmp = 31 - tmp;
  552. tmp *= -149;
  553. tmp /= 128;
  554. tmp -= 68;
  555. }
  556. if (phy->type == B43_PHYTYPE_G && adjust_2050)
  557. tmp += 25;
  558. }
  559. break;
  560. case 0x2060:
  561. if (in_rssi > 127)
  562. tmp = in_rssi - 256;
  563. else
  564. tmp = in_rssi;
  565. break;
  566. default:
  567. tmp = in_rssi;
  568. tmp -= 11;
  569. tmp *= 103;
  570. tmp /= 64;
  571. if (adjust_2053)
  572. tmp -= 109;
  573. else
  574. tmp -= 83;
  575. }
  576. return (s8) tmp;
  577. }
  578. //TODO
  579. #if 0
  580. static s8 b43_rssinoise_postprocess(struct b43_wldev *dev, u8 in_rssi)
  581. {
  582. struct b43_phy *phy = &dev->phy;
  583. s8 ret;
  584. if (phy->type == B43_PHYTYPE_A) {
  585. //TODO: Incomplete specs.
  586. ret = 0;
  587. } else
  588. ret = b43_rssi_postprocess(dev, in_rssi, 0, 1, 1);
  589. return ret;
  590. }
  591. #endif
  592. void b43_rx(struct b43_wldev *dev, struct sk_buff *skb, const void *_rxhdr)
  593. {
  594. struct ieee80211_rx_status status;
  595. struct b43_plcp_hdr6 *plcp;
  596. struct ieee80211_hdr *wlhdr;
  597. const struct b43_rxhdr_fw4 *rxhdr = _rxhdr;
  598. __le16 fctl;
  599. u16 phystat0, phystat3;
  600. u16 uninitialized_var(chanstat), uninitialized_var(mactime);
  601. u32 uninitialized_var(macstat);
  602. u16 chanid;
  603. u16 phytype;
  604. int padding, rate_idx;
  605. memset(&status, 0, sizeof(status));
  606. /* Get metadata about the frame from the header. */
  607. phystat0 = le16_to_cpu(rxhdr->phy_status0);
  608. phystat3 = le16_to_cpu(rxhdr->phy_status3);
  609. switch (dev->fw.hdr_format) {
  610. case B43_FW_HDR_598:
  611. macstat = le32_to_cpu(rxhdr->format_598.mac_status);
  612. mactime = le16_to_cpu(rxhdr->format_598.mac_time);
  613. chanstat = le16_to_cpu(rxhdr->format_598.channel);
  614. break;
  615. case B43_FW_HDR_410:
  616. case B43_FW_HDR_351:
  617. macstat = le32_to_cpu(rxhdr->format_351.mac_status);
  618. mactime = le16_to_cpu(rxhdr->format_351.mac_time);
  619. chanstat = le16_to_cpu(rxhdr->format_351.channel);
  620. break;
  621. }
  622. phytype = chanstat & B43_RX_CHAN_PHYTYPE;
  623. if (unlikely(macstat & B43_RX_MAC_FCSERR)) {
  624. dev->wl->ieee_stats.dot11FCSErrorCount++;
  625. status.flag |= RX_FLAG_FAILED_FCS_CRC;
  626. }
  627. if (unlikely(phystat0 & (B43_RX_PHYST0_PLCPHCF | B43_RX_PHYST0_PLCPFV)))
  628. status.flag |= RX_FLAG_FAILED_PLCP_CRC;
  629. if (phystat0 & B43_RX_PHYST0_SHORTPRMBL)
  630. status.flag |= RX_FLAG_SHORTPRE;
  631. if (macstat & B43_RX_MAC_DECERR) {
  632. /* Decryption with the given key failed.
  633. * Drop the packet. We also won't be able to decrypt it with
  634. * the key in software. */
  635. goto drop;
  636. }
  637. /* Skip PLCP and padding */
  638. padding = (macstat & B43_RX_MAC_PADDING) ? 2 : 0;
  639. if (unlikely(skb->len < (sizeof(struct b43_plcp_hdr6) + padding))) {
  640. b43dbg(dev->wl, "RX: Packet size underrun (1)\n");
  641. goto drop;
  642. }
  643. plcp = (struct b43_plcp_hdr6 *)(skb->data + padding);
  644. skb_pull(skb, sizeof(struct b43_plcp_hdr6) + padding);
  645. /* The skb contains the Wireless Header + payload data now */
  646. if (unlikely(skb->len < (2 + 2 + 6 /*minimum hdr */ + FCS_LEN))) {
  647. b43dbg(dev->wl, "RX: Packet size underrun (2)\n");
  648. goto drop;
  649. }
  650. wlhdr = (struct ieee80211_hdr *)(skb->data);
  651. fctl = wlhdr->frame_control;
  652. if (macstat & B43_RX_MAC_DEC) {
  653. unsigned int keyidx;
  654. int wlhdr_len;
  655. keyidx = ((macstat & B43_RX_MAC_KEYIDX)
  656. >> B43_RX_MAC_KEYIDX_SHIFT);
  657. /* We must adjust the key index here. We want the "physical"
  658. * key index, but the ucode passed it slightly different.
  659. */
  660. keyidx = b43_kidx_to_raw(dev, keyidx);
  661. B43_WARN_ON(keyidx >= ARRAY_SIZE(dev->key));
  662. if (dev->key[keyidx].algorithm != B43_SEC_ALGO_NONE) {
  663. wlhdr_len = ieee80211_hdrlen(fctl);
  664. if (unlikely(skb->len < (wlhdr_len + 3))) {
  665. b43dbg(dev->wl,
  666. "RX: Packet size underrun (3)\n");
  667. goto drop;
  668. }
  669. status.flag |= RX_FLAG_DECRYPTED;
  670. }
  671. }
  672. /* Link quality statistics */
  673. switch (chanstat & B43_RX_CHAN_PHYTYPE) {
  674. case B43_PHYTYPE_HT:
  675. /* TODO: is max the right choice? */
  676. status.signal = max_t(__s8,
  677. max(rxhdr->phy_ht_power0, rxhdr->phy_ht_power1),
  678. rxhdr->phy_ht_power2);
  679. break;
  680. case B43_PHYTYPE_N:
  681. /* Broadcom has code for min and avg, but always uses max */
  682. if (rxhdr->power0 == 16 || rxhdr->power0 == 32)
  683. status.signal = max(rxhdr->power1, rxhdr->power2);
  684. else
  685. status.signal = max(rxhdr->power0, rxhdr->power1);
  686. break;
  687. case B43_PHYTYPE_A:
  688. case B43_PHYTYPE_B:
  689. case B43_PHYTYPE_G:
  690. case B43_PHYTYPE_LP:
  691. status.signal = b43_rssi_postprocess(dev, rxhdr->jssi,
  692. (phystat0 & B43_RX_PHYST0_OFDM),
  693. (phystat0 & B43_RX_PHYST0_GAINCTL),
  694. (phystat3 & B43_RX_PHYST3_TRSTATE));
  695. break;
  696. }
  697. if (phystat0 & B43_RX_PHYST0_OFDM)
  698. rate_idx = b43_plcp_get_bitrate_idx_ofdm(plcp,
  699. !!(chanstat & B43_RX_CHAN_5GHZ));
  700. else
  701. rate_idx = b43_plcp_get_bitrate_idx_cck(plcp);
  702. if (unlikely(rate_idx == -1)) {
  703. /* PLCP seems to be corrupted.
  704. * Drop the frame, if we are not interested in corrupted frames. */
  705. if (!(dev->wl->filter_flags & FIF_PLCPFAIL))
  706. goto drop;
  707. }
  708. status.rate_idx = rate_idx;
  709. status.antenna = !!(phystat0 & B43_RX_PHYST0_ANT);
  710. /*
  711. * All frames on monitor interfaces and beacons always need a full
  712. * 64-bit timestamp. Monitor interfaces need it for diagnostic
  713. * purposes and beacons for IBSS merging.
  714. * This code assumes we get to process the packet within 16 bits
  715. * of timestamp, i.e. about 65 milliseconds after the PHY received
  716. * the first symbol.
  717. */
  718. if (ieee80211_is_beacon(fctl) || dev->wl->radiotap_enabled) {
  719. u16 low_mactime_now;
  720. b43_tsf_read(dev, &status.mactime);
  721. low_mactime_now = status.mactime;
  722. status.mactime = status.mactime & ~0xFFFFULL;
  723. status.mactime += mactime;
  724. if (low_mactime_now <= mactime)
  725. status.mactime -= 0x10000;
  726. status.flag |= RX_FLAG_MACTIME_START;
  727. }
  728. chanid = (chanstat & B43_RX_CHAN_ID) >> B43_RX_CHAN_ID_SHIFT;
  729. switch (chanstat & B43_RX_CHAN_PHYTYPE) {
  730. case B43_PHYTYPE_A:
  731. status.band = IEEE80211_BAND_5GHZ;
  732. B43_WARN_ON(1);
  733. /* FIXME: We don't really know which value the "chanid" contains.
  734. * So the following assignment might be wrong. */
  735. status.freq =
  736. ieee80211_channel_to_frequency(chanid, status.band);
  737. break;
  738. case B43_PHYTYPE_G:
  739. status.band = IEEE80211_BAND_2GHZ;
  740. /* Somewhere between 478.104 and 508.1084 firmware for G-PHY
  741. * has been modified to be compatible with N-PHY and others.
  742. */
  743. if (dev->fw.rev >= 508)
  744. status.freq = ieee80211_channel_to_frequency(chanid, status.band);
  745. else
  746. status.freq = chanid + 2400;
  747. break;
  748. case B43_PHYTYPE_N:
  749. case B43_PHYTYPE_LP:
  750. case B43_PHYTYPE_HT:
  751. /* chanid is the SHM channel cookie. Which is the plain
  752. * channel number in b43. */
  753. if (chanstat & B43_RX_CHAN_5GHZ)
  754. status.band = IEEE80211_BAND_5GHZ;
  755. else
  756. status.band = IEEE80211_BAND_2GHZ;
  757. status.freq =
  758. ieee80211_channel_to_frequency(chanid, status.band);
  759. break;
  760. default:
  761. B43_WARN_ON(1);
  762. goto drop;
  763. }
  764. memcpy(IEEE80211_SKB_RXCB(skb), &status, sizeof(status));
  765. ieee80211_rx_ni(dev->wl->hw, skb);
  766. #if B43_DEBUG
  767. dev->rx_count++;
  768. #endif
  769. return;
  770. drop:
  771. dev_kfree_skb_any(skb);
  772. }
  773. void b43_handle_txstatus(struct b43_wldev *dev,
  774. const struct b43_txstatus *status)
  775. {
  776. b43_debugfs_log_txstat(dev, status);
  777. if (status->intermediate)
  778. return;
  779. if (status->for_ampdu)
  780. return;
  781. if (!status->acked)
  782. dev->wl->ieee_stats.dot11ACKFailureCount++;
  783. if (status->rts_count) {
  784. if (status->rts_count == 0xF) //FIXME
  785. dev->wl->ieee_stats.dot11RTSFailureCount++;
  786. else
  787. dev->wl->ieee_stats.dot11RTSSuccessCount++;
  788. }
  789. if (b43_using_pio_transfers(dev))
  790. b43_pio_handle_txstatus(dev, status);
  791. else
  792. b43_dma_handle_txstatus(dev, status);
  793. b43_phy_txpower_check(dev, 0);
  794. }
  795. /* Fill out the mac80211 TXstatus report based on the b43-specific
  796. * txstatus report data. This returns a boolean whether the frame was
  797. * successfully transmitted. */
  798. bool b43_fill_txstatus_report(struct b43_wldev *dev,
  799. struct ieee80211_tx_info *report,
  800. const struct b43_txstatus *status)
  801. {
  802. bool frame_success = true;
  803. int retry_limit;
  804. /* preserve the confiured retry limit before clearing the status
  805. * The xmit function has overwritten the rc's value with the actual
  806. * retry limit done by the hardware */
  807. retry_limit = report->status.rates[0].count;
  808. ieee80211_tx_info_clear_status(report);
  809. if (status->acked) {
  810. /* The frame was ACKed. */
  811. report->flags |= IEEE80211_TX_STAT_ACK;
  812. } else {
  813. /* The frame was not ACKed... */
  814. if (!(report->flags & IEEE80211_TX_CTL_NO_ACK)) {
  815. /* ...but we expected an ACK. */
  816. frame_success = false;
  817. }
  818. }
  819. if (status->frame_count == 0) {
  820. /* The frame was not transmitted at all. */
  821. report->status.rates[0].count = 0;
  822. } else if (status->rts_count > dev->wl->hw->conf.short_frame_max_tx_count) {
  823. /*
  824. * If the short retries (RTS, not data frame) have exceeded
  825. * the limit, the hw will not have tried the selected rate,
  826. * but will have used the fallback rate instead.
  827. * Don't let the rate control count attempts for the selected
  828. * rate in this case, otherwise the statistics will be off.
  829. */
  830. report->status.rates[0].count = 0;
  831. report->status.rates[1].count = status->frame_count;
  832. } else {
  833. if (status->frame_count > retry_limit) {
  834. report->status.rates[0].count = retry_limit;
  835. report->status.rates[1].count = status->frame_count -
  836. retry_limit;
  837. } else {
  838. report->status.rates[0].count = status->frame_count;
  839. report->status.rates[1].idx = -1;
  840. }
  841. }
  842. return frame_success;
  843. }
  844. /* Stop any TX operation on the device (suspend the hardware queues) */
  845. void b43_tx_suspend(struct b43_wldev *dev)
  846. {
  847. if (b43_using_pio_transfers(dev))
  848. b43_pio_tx_suspend(dev);
  849. else
  850. b43_dma_tx_suspend(dev);
  851. }
  852. /* Resume any TX operation on the device (resume the hardware queues) */
  853. void b43_tx_resume(struct b43_wldev *dev)
  854. {
  855. if (b43_using_pio_transfers(dev))
  856. b43_pio_tx_resume(dev);
  857. else
  858. b43_dma_tx_resume(dev);
  859. }