at86rf230.c 42 KB

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  1. /*
  2. * AT86RF230/RF231 driver
  3. *
  4. * Copyright (C) 2009-2012 Siemens AG
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2
  8. * as published by the Free Software Foundation.
  9. *
  10. * This program is distributed in the hope that it will be useful,
  11. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. *
  15. * Written by:
  16. * Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>
  17. * Alexander Smirnov <alex.bluesman.smirnov@gmail.com>
  18. * Alexander Aring <aar@pengutronix.de>
  19. */
  20. #include <linux/kernel.h>
  21. #include <linux/module.h>
  22. #include <linux/hrtimer.h>
  23. #include <linux/jiffies.h>
  24. #include <linux/interrupt.h>
  25. #include <linux/irq.h>
  26. #include <linux/gpio.h>
  27. #include <linux/delay.h>
  28. #include <linux/spi/spi.h>
  29. #include <linux/spi/at86rf230.h>
  30. #include <linux/regmap.h>
  31. #include <linux/skbuff.h>
  32. #include <linux/of_gpio.h>
  33. #include <linux/ieee802154.h>
  34. #include <net/mac802154.h>
  35. #include <net/cfg802154.h>
  36. #include "at86rf230.h"
  37. struct at86rf230_local;
  38. /* at86rf2xx chip depend data.
  39. * All timings are in us.
  40. */
  41. struct at86rf2xx_chip_data {
  42. u16 t_sleep_cycle;
  43. u16 t_channel_switch;
  44. u16 t_reset_to_off;
  45. u16 t_off_to_aack;
  46. u16 t_off_to_tx_on;
  47. u16 t_off_to_sleep;
  48. u16 t_sleep_to_off;
  49. u16 t_frame;
  50. u16 t_p_ack;
  51. int rssi_base_val;
  52. int (*set_channel)(struct at86rf230_local *, u8, u8);
  53. int (*set_txpower)(struct at86rf230_local *, s32);
  54. };
  55. #define AT86RF2XX_MAX_BUF (127 + 3)
  56. /* tx retries to access the TX_ON state
  57. * if it's above then force change will be started.
  58. *
  59. * We assume the max_frame_retries (7) value of 802.15.4 here.
  60. */
  61. #define AT86RF2XX_MAX_TX_RETRIES 7
  62. /* We use the recommended 5 minutes timeout to recalibrate */
  63. #define AT86RF2XX_CAL_LOOP_TIMEOUT (5 * 60 * HZ)
  64. struct at86rf230_state_change {
  65. struct at86rf230_local *lp;
  66. int irq;
  67. struct hrtimer timer;
  68. struct spi_message msg;
  69. struct spi_transfer trx;
  70. u8 buf[AT86RF2XX_MAX_BUF];
  71. void (*complete)(void *context);
  72. u8 from_state;
  73. u8 to_state;
  74. bool irq_enable;
  75. };
  76. struct at86rf230_local {
  77. struct spi_device *spi;
  78. struct ieee802154_hw *hw;
  79. struct at86rf2xx_chip_data *data;
  80. struct regmap *regmap;
  81. int slp_tr;
  82. bool sleep;
  83. struct completion state_complete;
  84. struct at86rf230_state_change state;
  85. struct at86rf230_state_change irq;
  86. unsigned long cal_timeout;
  87. bool is_tx;
  88. bool is_tx_from_off;
  89. u8 tx_retry;
  90. struct sk_buff *tx_skb;
  91. struct at86rf230_state_change tx;
  92. };
  93. #define AT86RF2XX_NUMREGS 0x3F
  94. static void
  95. at86rf230_async_state_change(struct at86rf230_local *lp,
  96. struct at86rf230_state_change *ctx,
  97. const u8 state, void (*complete)(void *context),
  98. const bool irq_enable);
  99. static inline void
  100. at86rf230_sleep(struct at86rf230_local *lp)
  101. {
  102. if (gpio_is_valid(lp->slp_tr)) {
  103. gpio_set_value(lp->slp_tr, 1);
  104. usleep_range(lp->data->t_off_to_sleep,
  105. lp->data->t_off_to_sleep + 10);
  106. lp->sleep = true;
  107. }
  108. }
  109. static inline void
  110. at86rf230_awake(struct at86rf230_local *lp)
  111. {
  112. if (gpio_is_valid(lp->slp_tr)) {
  113. gpio_set_value(lp->slp_tr, 0);
  114. usleep_range(lp->data->t_sleep_to_off,
  115. lp->data->t_sleep_to_off + 100);
  116. lp->sleep = false;
  117. }
  118. }
  119. static inline int
  120. __at86rf230_write(struct at86rf230_local *lp,
  121. unsigned int addr, unsigned int data)
  122. {
  123. bool sleep = lp->sleep;
  124. int ret;
  125. /* awake for register setting if sleep */
  126. if (sleep)
  127. at86rf230_awake(lp);
  128. ret = regmap_write(lp->regmap, addr, data);
  129. /* sleep again if was sleeping */
  130. if (sleep)
  131. at86rf230_sleep(lp);
  132. return ret;
  133. }
  134. static inline int
  135. __at86rf230_read(struct at86rf230_local *lp,
  136. unsigned int addr, unsigned int *data)
  137. {
  138. bool sleep = lp->sleep;
  139. int ret;
  140. /* awake for register setting if sleep */
  141. if (sleep)
  142. at86rf230_awake(lp);
  143. ret = regmap_read(lp->regmap, addr, data);
  144. /* sleep again if was sleeping */
  145. if (sleep)
  146. at86rf230_sleep(lp);
  147. return ret;
  148. }
  149. static inline int
  150. at86rf230_read_subreg(struct at86rf230_local *lp,
  151. unsigned int addr, unsigned int mask,
  152. unsigned int shift, unsigned int *data)
  153. {
  154. int rc;
  155. rc = __at86rf230_read(lp, addr, data);
  156. if (!rc)
  157. *data = (*data & mask) >> shift;
  158. return rc;
  159. }
  160. static inline int
  161. at86rf230_write_subreg(struct at86rf230_local *lp,
  162. unsigned int addr, unsigned int mask,
  163. unsigned int shift, unsigned int data)
  164. {
  165. bool sleep = lp->sleep;
  166. int ret;
  167. /* awake for register setting if sleep */
  168. if (sleep)
  169. at86rf230_awake(lp);
  170. ret = regmap_update_bits(lp->regmap, addr, mask, data << shift);
  171. /* sleep again if was sleeping */
  172. if (sleep)
  173. at86rf230_sleep(lp);
  174. return ret;
  175. }
  176. static inline void
  177. at86rf230_slp_tr_rising_edge(struct at86rf230_local *lp)
  178. {
  179. gpio_set_value(lp->slp_tr, 1);
  180. udelay(1);
  181. gpio_set_value(lp->slp_tr, 0);
  182. }
  183. static bool
  184. at86rf230_reg_writeable(struct device *dev, unsigned int reg)
  185. {
  186. switch (reg) {
  187. case RG_TRX_STATE:
  188. case RG_TRX_CTRL_0:
  189. case RG_TRX_CTRL_1:
  190. case RG_PHY_TX_PWR:
  191. case RG_PHY_ED_LEVEL:
  192. case RG_PHY_CC_CCA:
  193. case RG_CCA_THRES:
  194. case RG_RX_CTRL:
  195. case RG_SFD_VALUE:
  196. case RG_TRX_CTRL_2:
  197. case RG_ANT_DIV:
  198. case RG_IRQ_MASK:
  199. case RG_VREG_CTRL:
  200. case RG_BATMON:
  201. case RG_XOSC_CTRL:
  202. case RG_RX_SYN:
  203. case RG_XAH_CTRL_1:
  204. case RG_FTN_CTRL:
  205. case RG_PLL_CF:
  206. case RG_PLL_DCU:
  207. case RG_SHORT_ADDR_0:
  208. case RG_SHORT_ADDR_1:
  209. case RG_PAN_ID_0:
  210. case RG_PAN_ID_1:
  211. case RG_IEEE_ADDR_0:
  212. case RG_IEEE_ADDR_1:
  213. case RG_IEEE_ADDR_2:
  214. case RG_IEEE_ADDR_3:
  215. case RG_IEEE_ADDR_4:
  216. case RG_IEEE_ADDR_5:
  217. case RG_IEEE_ADDR_6:
  218. case RG_IEEE_ADDR_7:
  219. case RG_XAH_CTRL_0:
  220. case RG_CSMA_SEED_0:
  221. case RG_CSMA_SEED_1:
  222. case RG_CSMA_BE:
  223. return true;
  224. default:
  225. return false;
  226. }
  227. }
  228. static bool
  229. at86rf230_reg_readable(struct device *dev, unsigned int reg)
  230. {
  231. bool rc;
  232. /* all writeable are also readable */
  233. rc = at86rf230_reg_writeable(dev, reg);
  234. if (rc)
  235. return rc;
  236. /* readonly regs */
  237. switch (reg) {
  238. case RG_TRX_STATUS:
  239. case RG_PHY_RSSI:
  240. case RG_IRQ_STATUS:
  241. case RG_PART_NUM:
  242. case RG_VERSION_NUM:
  243. case RG_MAN_ID_1:
  244. case RG_MAN_ID_0:
  245. return true;
  246. default:
  247. return false;
  248. }
  249. }
  250. static bool
  251. at86rf230_reg_volatile(struct device *dev, unsigned int reg)
  252. {
  253. /* can be changed during runtime */
  254. switch (reg) {
  255. case RG_TRX_STATUS:
  256. case RG_TRX_STATE:
  257. case RG_PHY_RSSI:
  258. case RG_PHY_ED_LEVEL:
  259. case RG_IRQ_STATUS:
  260. case RG_VREG_CTRL:
  261. case RG_PLL_CF:
  262. case RG_PLL_DCU:
  263. return true;
  264. default:
  265. return false;
  266. }
  267. }
  268. static bool
  269. at86rf230_reg_precious(struct device *dev, unsigned int reg)
  270. {
  271. /* don't clear irq line on read */
  272. switch (reg) {
  273. case RG_IRQ_STATUS:
  274. return true;
  275. default:
  276. return false;
  277. }
  278. }
  279. static const struct regmap_config at86rf230_regmap_spi_config = {
  280. .reg_bits = 8,
  281. .val_bits = 8,
  282. .write_flag_mask = CMD_REG | CMD_WRITE,
  283. .read_flag_mask = CMD_REG,
  284. .cache_type = REGCACHE_RBTREE,
  285. .max_register = AT86RF2XX_NUMREGS,
  286. .writeable_reg = at86rf230_reg_writeable,
  287. .readable_reg = at86rf230_reg_readable,
  288. .volatile_reg = at86rf230_reg_volatile,
  289. .precious_reg = at86rf230_reg_precious,
  290. };
  291. static void
  292. at86rf230_async_error_recover(void *context)
  293. {
  294. struct at86rf230_state_change *ctx = context;
  295. struct at86rf230_local *lp = ctx->lp;
  296. lp->is_tx = 0;
  297. at86rf230_async_state_change(lp, ctx, STATE_RX_AACK_ON, NULL, false);
  298. ieee802154_wake_queue(lp->hw);
  299. }
  300. static inline void
  301. at86rf230_async_error(struct at86rf230_local *lp,
  302. struct at86rf230_state_change *ctx, int rc)
  303. {
  304. dev_err(&lp->spi->dev, "spi_async error %d\n", rc);
  305. at86rf230_async_state_change(lp, ctx, STATE_FORCE_TRX_OFF,
  306. at86rf230_async_error_recover, false);
  307. }
  308. /* Generic function to get some register value in async mode */
  309. static void
  310. at86rf230_async_read_reg(struct at86rf230_local *lp, const u8 reg,
  311. struct at86rf230_state_change *ctx,
  312. void (*complete)(void *context),
  313. const bool irq_enable)
  314. {
  315. int rc;
  316. u8 *tx_buf = ctx->buf;
  317. tx_buf[0] = (reg & CMD_REG_MASK) | CMD_REG;
  318. ctx->msg.complete = complete;
  319. ctx->irq_enable = irq_enable;
  320. rc = spi_async(lp->spi, &ctx->msg);
  321. if (rc) {
  322. if (irq_enable)
  323. enable_irq(ctx->irq);
  324. at86rf230_async_error(lp, ctx, rc);
  325. }
  326. }
  327. static inline u8 at86rf230_state_to_force(u8 state)
  328. {
  329. if (state == STATE_TX_ON)
  330. return STATE_FORCE_TX_ON;
  331. else
  332. return STATE_FORCE_TRX_OFF;
  333. }
  334. static void
  335. at86rf230_async_state_assert(void *context)
  336. {
  337. struct at86rf230_state_change *ctx = context;
  338. struct at86rf230_local *lp = ctx->lp;
  339. const u8 *buf = ctx->buf;
  340. const u8 trx_state = buf[1] & TRX_STATE_MASK;
  341. /* Assert state change */
  342. if (trx_state != ctx->to_state) {
  343. /* Special handling if transceiver state is in
  344. * STATE_BUSY_RX_AACK and a SHR was detected.
  345. */
  346. if (trx_state == STATE_BUSY_RX_AACK) {
  347. /* Undocumented race condition. If we send a state
  348. * change to STATE_RX_AACK_ON the transceiver could
  349. * change his state automatically to STATE_BUSY_RX_AACK
  350. * if a SHR was detected. This is not an error, but we
  351. * can't assert this.
  352. */
  353. if (ctx->to_state == STATE_RX_AACK_ON)
  354. goto done;
  355. /* If we change to STATE_TX_ON without forcing and
  356. * transceiver state is STATE_BUSY_RX_AACK, we wait
  357. * 'tFrame + tPAck' receiving time. In this time the
  358. * PDU should be received. If the transceiver is still
  359. * in STATE_BUSY_RX_AACK, we run a force state change
  360. * to STATE_TX_ON. This is a timeout handling, if the
  361. * transceiver stucks in STATE_BUSY_RX_AACK.
  362. *
  363. * Additional we do several retries to try to get into
  364. * TX_ON state without forcing. If the retries are
  365. * higher or equal than AT86RF2XX_MAX_TX_RETRIES we
  366. * will do a force change.
  367. */
  368. if (ctx->to_state == STATE_TX_ON ||
  369. ctx->to_state == STATE_TRX_OFF) {
  370. u8 state = ctx->to_state;
  371. if (lp->tx_retry >= AT86RF2XX_MAX_TX_RETRIES)
  372. state = at86rf230_state_to_force(state);
  373. lp->tx_retry++;
  374. at86rf230_async_state_change(lp, ctx, state,
  375. ctx->complete,
  376. ctx->irq_enable);
  377. return;
  378. }
  379. }
  380. dev_warn(&lp->spi->dev, "unexcept state change from 0x%02x to 0x%02x. Actual state: 0x%02x\n",
  381. ctx->from_state, ctx->to_state, trx_state);
  382. }
  383. done:
  384. if (ctx->complete)
  385. ctx->complete(context);
  386. }
  387. static enum hrtimer_restart at86rf230_async_state_timer(struct hrtimer *timer)
  388. {
  389. struct at86rf230_state_change *ctx =
  390. container_of(timer, struct at86rf230_state_change, timer);
  391. struct at86rf230_local *lp = ctx->lp;
  392. at86rf230_async_read_reg(lp, RG_TRX_STATUS, ctx,
  393. at86rf230_async_state_assert,
  394. ctx->irq_enable);
  395. return HRTIMER_NORESTART;
  396. }
  397. /* Do state change timing delay. */
  398. static void
  399. at86rf230_async_state_delay(void *context)
  400. {
  401. struct at86rf230_state_change *ctx = context;
  402. struct at86rf230_local *lp = ctx->lp;
  403. struct at86rf2xx_chip_data *c = lp->data;
  404. bool force = false;
  405. ktime_t tim;
  406. /* The force state changes are will show as normal states in the
  407. * state status subregister. We change the to_state to the
  408. * corresponding one and remember if it was a force change, this
  409. * differs if we do a state change from STATE_BUSY_RX_AACK.
  410. */
  411. switch (ctx->to_state) {
  412. case STATE_FORCE_TX_ON:
  413. ctx->to_state = STATE_TX_ON;
  414. force = true;
  415. break;
  416. case STATE_FORCE_TRX_OFF:
  417. ctx->to_state = STATE_TRX_OFF;
  418. force = true;
  419. break;
  420. default:
  421. break;
  422. }
  423. switch (ctx->from_state) {
  424. case STATE_TRX_OFF:
  425. switch (ctx->to_state) {
  426. case STATE_RX_AACK_ON:
  427. tim = ktime_set(0, c->t_off_to_aack * NSEC_PER_USEC);
  428. /* state change from TRX_OFF to RX_AACK_ON to do a
  429. * calibration, we need to reset the timeout for the
  430. * next one.
  431. */
  432. lp->cal_timeout = jiffies + AT86RF2XX_CAL_LOOP_TIMEOUT;
  433. goto change;
  434. case STATE_TX_ARET_ON:
  435. case STATE_TX_ON:
  436. tim = ktime_set(0, c->t_off_to_tx_on * NSEC_PER_USEC);
  437. /* state change from TRX_OFF to TX_ON or ARET_ON to do
  438. * a calibration, we need to reset the timeout for the
  439. * next one.
  440. */
  441. lp->cal_timeout = jiffies + AT86RF2XX_CAL_LOOP_TIMEOUT;
  442. goto change;
  443. default:
  444. break;
  445. }
  446. break;
  447. case STATE_BUSY_RX_AACK:
  448. switch (ctx->to_state) {
  449. case STATE_TRX_OFF:
  450. case STATE_TX_ON:
  451. /* Wait for worst case receiving time if we
  452. * didn't make a force change from BUSY_RX_AACK
  453. * to TX_ON or TRX_OFF.
  454. */
  455. if (!force) {
  456. tim = ktime_set(0, (c->t_frame + c->t_p_ack) *
  457. NSEC_PER_USEC);
  458. goto change;
  459. }
  460. break;
  461. default:
  462. break;
  463. }
  464. break;
  465. /* Default value, means RESET state */
  466. case STATE_P_ON:
  467. switch (ctx->to_state) {
  468. case STATE_TRX_OFF:
  469. tim = ktime_set(0, c->t_reset_to_off * NSEC_PER_USEC);
  470. goto change;
  471. default:
  472. break;
  473. }
  474. break;
  475. default:
  476. break;
  477. }
  478. /* Default delay is 1us in the most cases */
  479. udelay(1);
  480. at86rf230_async_state_timer(&ctx->timer);
  481. return;
  482. change:
  483. hrtimer_start(&ctx->timer, tim, HRTIMER_MODE_REL);
  484. }
  485. static void
  486. at86rf230_async_state_change_start(void *context)
  487. {
  488. struct at86rf230_state_change *ctx = context;
  489. struct at86rf230_local *lp = ctx->lp;
  490. u8 *buf = ctx->buf;
  491. const u8 trx_state = buf[1] & TRX_STATE_MASK;
  492. int rc;
  493. /* Check for "possible" STATE_TRANSITION_IN_PROGRESS */
  494. if (trx_state == STATE_TRANSITION_IN_PROGRESS) {
  495. udelay(1);
  496. at86rf230_async_read_reg(lp, RG_TRX_STATUS, ctx,
  497. at86rf230_async_state_change_start,
  498. ctx->irq_enable);
  499. return;
  500. }
  501. /* Check if we already are in the state which we change in */
  502. if (trx_state == ctx->to_state) {
  503. if (ctx->complete)
  504. ctx->complete(context);
  505. return;
  506. }
  507. /* Set current state to the context of state change */
  508. ctx->from_state = trx_state;
  509. /* Going into the next step for a state change which do a timing
  510. * relevant delay.
  511. */
  512. buf[0] = (RG_TRX_STATE & CMD_REG_MASK) | CMD_REG | CMD_WRITE;
  513. buf[1] = ctx->to_state;
  514. ctx->msg.complete = at86rf230_async_state_delay;
  515. rc = spi_async(lp->spi, &ctx->msg);
  516. if (rc) {
  517. if (ctx->irq_enable)
  518. enable_irq(ctx->irq);
  519. at86rf230_async_error(lp, ctx, rc);
  520. }
  521. }
  522. static void
  523. at86rf230_async_state_change(struct at86rf230_local *lp,
  524. struct at86rf230_state_change *ctx,
  525. const u8 state, void (*complete)(void *context),
  526. const bool irq_enable)
  527. {
  528. /* Initialization for the state change context */
  529. ctx->to_state = state;
  530. ctx->complete = complete;
  531. ctx->irq_enable = irq_enable;
  532. at86rf230_async_read_reg(lp, RG_TRX_STATUS, ctx,
  533. at86rf230_async_state_change_start,
  534. irq_enable);
  535. }
  536. static void
  537. at86rf230_sync_state_change_complete(void *context)
  538. {
  539. struct at86rf230_state_change *ctx = context;
  540. struct at86rf230_local *lp = ctx->lp;
  541. complete(&lp->state_complete);
  542. }
  543. /* This function do a sync framework above the async state change.
  544. * Some callbacks of the IEEE 802.15.4 driver interface need to be
  545. * handled synchronously.
  546. */
  547. static int
  548. at86rf230_sync_state_change(struct at86rf230_local *lp, unsigned int state)
  549. {
  550. unsigned long rc;
  551. at86rf230_async_state_change(lp, &lp->state, state,
  552. at86rf230_sync_state_change_complete,
  553. false);
  554. rc = wait_for_completion_timeout(&lp->state_complete,
  555. msecs_to_jiffies(100));
  556. if (!rc) {
  557. at86rf230_async_error(lp, &lp->state, -ETIMEDOUT);
  558. return -ETIMEDOUT;
  559. }
  560. return 0;
  561. }
  562. static void
  563. at86rf230_tx_complete(void *context)
  564. {
  565. struct at86rf230_state_change *ctx = context;
  566. struct at86rf230_local *lp = ctx->lp;
  567. enable_irq(ctx->irq);
  568. ieee802154_xmit_complete(lp->hw, lp->tx_skb, false);
  569. }
  570. static void
  571. at86rf230_tx_on(void *context)
  572. {
  573. struct at86rf230_state_change *ctx = context;
  574. struct at86rf230_local *lp = ctx->lp;
  575. at86rf230_async_state_change(lp, ctx, STATE_RX_AACK_ON,
  576. at86rf230_tx_complete, true);
  577. }
  578. static void
  579. at86rf230_tx_trac_check(void *context)
  580. {
  581. struct at86rf230_state_change *ctx = context;
  582. struct at86rf230_local *lp = ctx->lp;
  583. const u8 *buf = ctx->buf;
  584. const u8 trac = (buf[1] & 0xe0) >> 5;
  585. /* If trac status is different than zero we need to do a state change
  586. * to STATE_FORCE_TRX_OFF then STATE_RX_AACK_ON to recover the
  587. * transceiver.
  588. */
  589. if (trac)
  590. at86rf230_async_state_change(lp, ctx, STATE_FORCE_TRX_OFF,
  591. at86rf230_tx_on, true);
  592. else
  593. at86rf230_tx_on(context);
  594. }
  595. static void
  596. at86rf230_tx_trac_status(void *context)
  597. {
  598. struct at86rf230_state_change *ctx = context;
  599. struct at86rf230_local *lp = ctx->lp;
  600. at86rf230_async_read_reg(lp, RG_TRX_STATE, ctx,
  601. at86rf230_tx_trac_check, true);
  602. }
  603. static void
  604. at86rf230_rx_read_frame_complete(void *context)
  605. {
  606. struct at86rf230_state_change *ctx = context;
  607. struct at86rf230_local *lp = ctx->lp;
  608. u8 rx_local_buf[AT86RF2XX_MAX_BUF];
  609. const u8 *buf = ctx->buf;
  610. struct sk_buff *skb;
  611. u8 len, lqi;
  612. len = buf[1];
  613. if (!ieee802154_is_valid_psdu_len(len)) {
  614. dev_vdbg(&lp->spi->dev, "corrupted frame received\n");
  615. len = IEEE802154_MTU;
  616. }
  617. lqi = buf[2 + len];
  618. memcpy(rx_local_buf, buf + 2, len);
  619. ctx->trx.len = 2;
  620. enable_irq(ctx->irq);
  621. skb = dev_alloc_skb(IEEE802154_MTU);
  622. if (!skb) {
  623. dev_vdbg(&lp->spi->dev, "failed to allocate sk_buff\n");
  624. return;
  625. }
  626. memcpy(skb_put(skb, len), rx_local_buf, len);
  627. ieee802154_rx_irqsafe(lp->hw, skb, lqi);
  628. }
  629. static void
  630. at86rf230_rx_read_frame(void *context)
  631. {
  632. struct at86rf230_state_change *ctx = context;
  633. struct at86rf230_local *lp = ctx->lp;
  634. u8 *buf = ctx->buf;
  635. int rc;
  636. buf[0] = CMD_FB;
  637. ctx->trx.len = AT86RF2XX_MAX_BUF;
  638. ctx->msg.complete = at86rf230_rx_read_frame_complete;
  639. rc = spi_async(lp->spi, &ctx->msg);
  640. if (rc) {
  641. ctx->trx.len = 2;
  642. enable_irq(ctx->irq);
  643. at86rf230_async_error(lp, ctx, rc);
  644. }
  645. }
  646. static void
  647. at86rf230_rx_trac_check(void *context)
  648. {
  649. /* Possible check on trac status here. This could be useful to make
  650. * some stats why receive is failed. Not used at the moment, but it's
  651. * maybe timing relevant. Datasheet doesn't say anything about this.
  652. * The programming guide say do it so.
  653. */
  654. at86rf230_rx_read_frame(context);
  655. }
  656. static void
  657. at86rf230_irq_trx_end(struct at86rf230_local *lp)
  658. {
  659. if (lp->is_tx) {
  660. lp->is_tx = 0;
  661. at86rf230_async_state_change(lp, &lp->irq,
  662. STATE_FORCE_TX_ON,
  663. at86rf230_tx_trac_status,
  664. true);
  665. } else {
  666. at86rf230_async_read_reg(lp, RG_TRX_STATE, &lp->irq,
  667. at86rf230_rx_trac_check, true);
  668. }
  669. }
  670. static void
  671. at86rf230_irq_status(void *context)
  672. {
  673. struct at86rf230_state_change *ctx = context;
  674. struct at86rf230_local *lp = ctx->lp;
  675. const u8 *buf = ctx->buf;
  676. const u8 irq = buf[1];
  677. if (irq & IRQ_TRX_END) {
  678. at86rf230_irq_trx_end(lp);
  679. } else {
  680. enable_irq(ctx->irq);
  681. dev_err(&lp->spi->dev, "not supported irq %02x received\n",
  682. irq);
  683. }
  684. }
  685. static irqreturn_t at86rf230_isr(int irq, void *data)
  686. {
  687. struct at86rf230_local *lp = data;
  688. struct at86rf230_state_change *ctx = &lp->irq;
  689. u8 *buf = ctx->buf;
  690. int rc;
  691. disable_irq_nosync(irq);
  692. buf[0] = (RG_IRQ_STATUS & CMD_REG_MASK) | CMD_REG;
  693. ctx->msg.complete = at86rf230_irq_status;
  694. rc = spi_async(lp->spi, &ctx->msg);
  695. if (rc) {
  696. enable_irq(irq);
  697. at86rf230_async_error(lp, ctx, rc);
  698. return IRQ_NONE;
  699. }
  700. return IRQ_HANDLED;
  701. }
  702. static void
  703. at86rf230_write_frame_complete(void *context)
  704. {
  705. struct at86rf230_state_change *ctx = context;
  706. struct at86rf230_local *lp = ctx->lp;
  707. u8 *buf = ctx->buf;
  708. int rc;
  709. ctx->trx.len = 2;
  710. if (gpio_is_valid(lp->slp_tr)) {
  711. at86rf230_slp_tr_rising_edge(lp);
  712. } else {
  713. buf[0] = (RG_TRX_STATE & CMD_REG_MASK) | CMD_REG | CMD_WRITE;
  714. buf[1] = STATE_BUSY_TX;
  715. ctx->msg.complete = NULL;
  716. rc = spi_async(lp->spi, &ctx->msg);
  717. if (rc)
  718. at86rf230_async_error(lp, ctx, rc);
  719. }
  720. }
  721. static void
  722. at86rf230_write_frame(void *context)
  723. {
  724. struct at86rf230_state_change *ctx = context;
  725. struct at86rf230_local *lp = ctx->lp;
  726. struct sk_buff *skb = lp->tx_skb;
  727. u8 *buf = ctx->buf;
  728. int rc;
  729. lp->is_tx = 1;
  730. buf[0] = CMD_FB | CMD_WRITE;
  731. buf[1] = skb->len + 2;
  732. memcpy(buf + 2, skb->data, skb->len);
  733. ctx->trx.len = skb->len + 2;
  734. ctx->msg.complete = at86rf230_write_frame_complete;
  735. rc = spi_async(lp->spi, &ctx->msg);
  736. if (rc) {
  737. ctx->trx.len = 2;
  738. at86rf230_async_error(lp, ctx, rc);
  739. }
  740. }
  741. static void
  742. at86rf230_xmit_tx_on(void *context)
  743. {
  744. struct at86rf230_state_change *ctx = context;
  745. struct at86rf230_local *lp = ctx->lp;
  746. at86rf230_async_state_change(lp, ctx, STATE_TX_ARET_ON,
  747. at86rf230_write_frame, false);
  748. }
  749. static void
  750. at86rf230_xmit_start(void *context)
  751. {
  752. struct at86rf230_state_change *ctx = context;
  753. struct at86rf230_local *lp = ctx->lp;
  754. /* check if we change from off state */
  755. if (lp->is_tx_from_off) {
  756. lp->is_tx_from_off = false;
  757. at86rf230_async_state_change(lp, ctx, STATE_TX_ARET_ON,
  758. at86rf230_write_frame,
  759. false);
  760. } else {
  761. at86rf230_async_state_change(lp, ctx, STATE_TX_ON,
  762. at86rf230_xmit_tx_on,
  763. false);
  764. }
  765. }
  766. static int
  767. at86rf230_xmit(struct ieee802154_hw *hw, struct sk_buff *skb)
  768. {
  769. struct at86rf230_local *lp = hw->priv;
  770. struct at86rf230_state_change *ctx = &lp->tx;
  771. lp->tx_skb = skb;
  772. lp->tx_retry = 0;
  773. /* After 5 minutes in PLL and the same frequency we run again the
  774. * calibration loops which is recommended by at86rf2xx datasheets.
  775. *
  776. * The calibration is initiate by a state change from TRX_OFF
  777. * to TX_ON, the lp->cal_timeout should be reinit by state_delay
  778. * function then to start in the next 5 minutes.
  779. */
  780. if (time_is_before_jiffies(lp->cal_timeout)) {
  781. lp->is_tx_from_off = true;
  782. at86rf230_async_state_change(lp, ctx, STATE_TRX_OFF,
  783. at86rf230_xmit_start, false);
  784. } else {
  785. at86rf230_xmit_start(ctx);
  786. }
  787. return 0;
  788. }
  789. static int
  790. at86rf230_ed(struct ieee802154_hw *hw, u8 *level)
  791. {
  792. BUG_ON(!level);
  793. *level = 0xbe;
  794. return 0;
  795. }
  796. static int
  797. at86rf230_start(struct ieee802154_hw *hw)
  798. {
  799. struct at86rf230_local *lp = hw->priv;
  800. at86rf230_awake(lp);
  801. enable_irq(lp->spi->irq);
  802. return at86rf230_sync_state_change(lp, STATE_RX_AACK_ON);
  803. }
  804. static void
  805. at86rf230_stop(struct ieee802154_hw *hw)
  806. {
  807. struct at86rf230_local *lp = hw->priv;
  808. u8 csma_seed[2];
  809. at86rf230_sync_state_change(lp, STATE_FORCE_TRX_OFF);
  810. disable_irq(lp->spi->irq);
  811. /* It's recommended to set random new csma_seeds before sleep state.
  812. * Makes only sense in the stop callback, not doing this inside of
  813. * at86rf230_sleep, this is also used when we don't transmit afterwards
  814. * when calling start callback again.
  815. */
  816. get_random_bytes(csma_seed, ARRAY_SIZE(csma_seed));
  817. at86rf230_write_subreg(lp, SR_CSMA_SEED_0, csma_seed[0]);
  818. at86rf230_write_subreg(lp, SR_CSMA_SEED_1, csma_seed[1]);
  819. at86rf230_sleep(lp);
  820. }
  821. static int
  822. at86rf23x_set_channel(struct at86rf230_local *lp, u8 page, u8 channel)
  823. {
  824. return at86rf230_write_subreg(lp, SR_CHANNEL, channel);
  825. }
  826. #define AT86RF2XX_MAX_ED_LEVELS 0xF
  827. static const s32 at86rf23x_ed_levels[AT86RF2XX_MAX_ED_LEVELS + 1] = {
  828. -9100, -8900, -8700, -8500, -8300, -8100, -7900, -7700, -7500, -7300,
  829. -7100, -6900, -6700, -6500, -6300, -6100,
  830. };
  831. static const s32 at86rf212_ed_levels_100[AT86RF2XX_MAX_ED_LEVELS + 1] = {
  832. -10000, -9800, -9600, -9400, -9200, -9000, -8800, -8600, -8400, -8200,
  833. -8000, -7800, -7600, -7400, -7200, -7000,
  834. };
  835. static const s32 at86rf212_ed_levels_98[AT86RF2XX_MAX_ED_LEVELS + 1] = {
  836. -9800, -9600, -9400, -9200, -9000, -8800, -8600, -8400, -8200, -8000,
  837. -7800, -7600, -7400, -7200, -7000, -6800,
  838. };
  839. static inline int
  840. at86rf212_update_cca_ed_level(struct at86rf230_local *lp, int rssi_base_val)
  841. {
  842. unsigned int cca_ed_thres;
  843. int rc;
  844. rc = at86rf230_read_subreg(lp, SR_CCA_ED_THRES, &cca_ed_thres);
  845. if (rc < 0)
  846. return rc;
  847. switch (rssi_base_val) {
  848. case -98:
  849. lp->hw->phy->supported.cca_ed_levels = at86rf212_ed_levels_98;
  850. lp->hw->phy->supported.cca_ed_levels_size = ARRAY_SIZE(at86rf212_ed_levels_98);
  851. lp->hw->phy->cca_ed_level = at86rf212_ed_levels_98[cca_ed_thres];
  852. break;
  853. case -100:
  854. lp->hw->phy->supported.cca_ed_levels = at86rf212_ed_levels_100;
  855. lp->hw->phy->supported.cca_ed_levels_size = ARRAY_SIZE(at86rf212_ed_levels_100);
  856. lp->hw->phy->cca_ed_level = at86rf212_ed_levels_100[cca_ed_thres];
  857. break;
  858. default:
  859. WARN_ON(1);
  860. }
  861. return 0;
  862. }
  863. static int
  864. at86rf212_set_channel(struct at86rf230_local *lp, u8 page, u8 channel)
  865. {
  866. int rc;
  867. if (channel == 0)
  868. rc = at86rf230_write_subreg(lp, SR_SUB_MODE, 0);
  869. else
  870. rc = at86rf230_write_subreg(lp, SR_SUB_MODE, 1);
  871. if (rc < 0)
  872. return rc;
  873. if (page == 0) {
  874. rc = at86rf230_write_subreg(lp, SR_BPSK_QPSK, 0);
  875. lp->data->rssi_base_val = -100;
  876. } else {
  877. rc = at86rf230_write_subreg(lp, SR_BPSK_QPSK, 1);
  878. lp->data->rssi_base_val = -98;
  879. }
  880. if (rc < 0)
  881. return rc;
  882. rc = at86rf212_update_cca_ed_level(lp, lp->data->rssi_base_val);
  883. if (rc < 0)
  884. return rc;
  885. /* This sets the symbol_duration according frequency on the 212.
  886. * TODO move this handling while set channel and page in cfg802154.
  887. * We can do that, this timings are according 802.15.4 standard.
  888. * If we do that in cfg802154, this is a more generic calculation.
  889. *
  890. * This should also protected from ifs_timer. Means cancel timer and
  891. * init with a new value. For now, this is okay.
  892. */
  893. if (channel == 0) {
  894. if (page == 0) {
  895. /* SUB:0 and BPSK:0 -> BPSK-20 */
  896. lp->hw->phy->symbol_duration = 50;
  897. } else {
  898. /* SUB:1 and BPSK:0 -> BPSK-40 */
  899. lp->hw->phy->symbol_duration = 25;
  900. }
  901. } else {
  902. if (page == 0)
  903. /* SUB:0 and BPSK:1 -> OQPSK-100/200/400 */
  904. lp->hw->phy->symbol_duration = 40;
  905. else
  906. /* SUB:1 and BPSK:1 -> OQPSK-250/500/1000 */
  907. lp->hw->phy->symbol_duration = 16;
  908. }
  909. lp->hw->phy->lifs_period = IEEE802154_LIFS_PERIOD *
  910. lp->hw->phy->symbol_duration;
  911. lp->hw->phy->sifs_period = IEEE802154_SIFS_PERIOD *
  912. lp->hw->phy->symbol_duration;
  913. return at86rf230_write_subreg(lp, SR_CHANNEL, channel);
  914. }
  915. static int
  916. at86rf230_channel(struct ieee802154_hw *hw, u8 page, u8 channel)
  917. {
  918. struct at86rf230_local *lp = hw->priv;
  919. int rc;
  920. rc = lp->data->set_channel(lp, page, channel);
  921. /* Wait for PLL */
  922. usleep_range(lp->data->t_channel_switch,
  923. lp->data->t_channel_switch + 10);
  924. lp->cal_timeout = jiffies + AT86RF2XX_CAL_LOOP_TIMEOUT;
  925. return rc;
  926. }
  927. static int
  928. at86rf230_set_hw_addr_filt(struct ieee802154_hw *hw,
  929. struct ieee802154_hw_addr_filt *filt,
  930. unsigned long changed)
  931. {
  932. struct at86rf230_local *lp = hw->priv;
  933. if (changed & IEEE802154_AFILT_SADDR_CHANGED) {
  934. u16 addr = le16_to_cpu(filt->short_addr);
  935. dev_vdbg(&lp->spi->dev,
  936. "at86rf230_set_hw_addr_filt called for saddr\n");
  937. __at86rf230_write(lp, RG_SHORT_ADDR_0, addr);
  938. __at86rf230_write(lp, RG_SHORT_ADDR_1, addr >> 8);
  939. }
  940. if (changed & IEEE802154_AFILT_PANID_CHANGED) {
  941. u16 pan = le16_to_cpu(filt->pan_id);
  942. dev_vdbg(&lp->spi->dev,
  943. "at86rf230_set_hw_addr_filt called for pan id\n");
  944. __at86rf230_write(lp, RG_PAN_ID_0, pan);
  945. __at86rf230_write(lp, RG_PAN_ID_1, pan >> 8);
  946. }
  947. if (changed & IEEE802154_AFILT_IEEEADDR_CHANGED) {
  948. u8 i, addr[8];
  949. memcpy(addr, &filt->ieee_addr, 8);
  950. dev_vdbg(&lp->spi->dev,
  951. "at86rf230_set_hw_addr_filt called for IEEE addr\n");
  952. for (i = 0; i < 8; i++)
  953. __at86rf230_write(lp, RG_IEEE_ADDR_0 + i, addr[i]);
  954. }
  955. if (changed & IEEE802154_AFILT_PANC_CHANGED) {
  956. dev_vdbg(&lp->spi->dev,
  957. "at86rf230_set_hw_addr_filt called for panc change\n");
  958. if (filt->pan_coord)
  959. at86rf230_write_subreg(lp, SR_AACK_I_AM_COORD, 1);
  960. else
  961. at86rf230_write_subreg(lp, SR_AACK_I_AM_COORD, 0);
  962. }
  963. return 0;
  964. }
  965. #define AT86RF23X_MAX_TX_POWERS 0xF
  966. static const s32 at86rf233_powers[AT86RF23X_MAX_TX_POWERS + 1] = {
  967. 400, 370, 340, 300, 250, 200, 100, 0, -100, -200, -300, -400, -600,
  968. -800, -1200, -1700,
  969. };
  970. static const s32 at86rf231_powers[AT86RF23X_MAX_TX_POWERS + 1] = {
  971. 300, 280, 230, 180, 130, 70, 0, -100, -200, -300, -400, -500, -700,
  972. -900, -1200, -1700,
  973. };
  974. #define AT86RF212_MAX_TX_POWERS 0x1F
  975. static const s32 at86rf212_powers[AT86RF212_MAX_TX_POWERS + 1] = {
  976. 500, 400, 300, 200, 100, 0, -100, -200, -300, -400, -500, -600, -700,
  977. -800, -900, -1000, -1100, -1200, -1300, -1400, -1500, -1600, -1700,
  978. -1800, -1900, -2000, -2100, -2200, -2300, -2400, -2500, -2600,
  979. };
  980. static int
  981. at86rf23x_set_txpower(struct at86rf230_local *lp, s32 mbm)
  982. {
  983. u32 i;
  984. for (i = 0; i < lp->hw->phy->supported.tx_powers_size; i++) {
  985. if (lp->hw->phy->supported.tx_powers[i] == mbm)
  986. return at86rf230_write_subreg(lp, SR_TX_PWR_23X, i);
  987. }
  988. return -EINVAL;
  989. }
  990. static int
  991. at86rf212_set_txpower(struct at86rf230_local *lp, s32 mbm)
  992. {
  993. u32 i;
  994. for (i = 0; i < lp->hw->phy->supported.tx_powers_size; i++) {
  995. if (lp->hw->phy->supported.tx_powers[i] == mbm)
  996. return at86rf230_write_subreg(lp, SR_TX_PWR_212, i);
  997. }
  998. return -EINVAL;
  999. }
  1000. static int
  1001. at86rf230_set_txpower(struct ieee802154_hw *hw, s32 mbm)
  1002. {
  1003. struct at86rf230_local *lp = hw->priv;
  1004. return lp->data->set_txpower(lp, mbm);
  1005. }
  1006. static int
  1007. at86rf230_set_lbt(struct ieee802154_hw *hw, bool on)
  1008. {
  1009. struct at86rf230_local *lp = hw->priv;
  1010. return at86rf230_write_subreg(lp, SR_CSMA_LBT_MODE, on);
  1011. }
  1012. static int
  1013. at86rf230_set_cca_mode(struct ieee802154_hw *hw,
  1014. const struct wpan_phy_cca *cca)
  1015. {
  1016. struct at86rf230_local *lp = hw->priv;
  1017. u8 val;
  1018. /* mapping 802.15.4 to driver spec */
  1019. switch (cca->mode) {
  1020. case NL802154_CCA_ENERGY:
  1021. val = 1;
  1022. break;
  1023. case NL802154_CCA_CARRIER:
  1024. val = 2;
  1025. break;
  1026. case NL802154_CCA_ENERGY_CARRIER:
  1027. switch (cca->opt) {
  1028. case NL802154_CCA_OPT_ENERGY_CARRIER_AND:
  1029. val = 3;
  1030. break;
  1031. case NL802154_CCA_OPT_ENERGY_CARRIER_OR:
  1032. val = 0;
  1033. break;
  1034. default:
  1035. return -EINVAL;
  1036. }
  1037. break;
  1038. default:
  1039. return -EINVAL;
  1040. }
  1041. return at86rf230_write_subreg(lp, SR_CCA_MODE, val);
  1042. }
  1043. static int
  1044. at86rf230_set_cca_ed_level(struct ieee802154_hw *hw, s32 mbm)
  1045. {
  1046. struct at86rf230_local *lp = hw->priv;
  1047. u32 i;
  1048. for (i = 0; i < hw->phy->supported.cca_ed_levels_size; i++) {
  1049. if (hw->phy->supported.cca_ed_levels[i] == mbm)
  1050. return at86rf230_write_subreg(lp, SR_CCA_ED_THRES, i);
  1051. }
  1052. return -EINVAL;
  1053. }
  1054. static int
  1055. at86rf230_set_csma_params(struct ieee802154_hw *hw, u8 min_be, u8 max_be,
  1056. u8 retries)
  1057. {
  1058. struct at86rf230_local *lp = hw->priv;
  1059. int rc;
  1060. rc = at86rf230_write_subreg(lp, SR_MIN_BE, min_be);
  1061. if (rc)
  1062. return rc;
  1063. rc = at86rf230_write_subreg(lp, SR_MAX_BE, max_be);
  1064. if (rc)
  1065. return rc;
  1066. return at86rf230_write_subreg(lp, SR_MAX_CSMA_RETRIES, retries);
  1067. }
  1068. static int
  1069. at86rf230_set_frame_retries(struct ieee802154_hw *hw, s8 retries)
  1070. {
  1071. struct at86rf230_local *lp = hw->priv;
  1072. return at86rf230_write_subreg(lp, SR_MAX_FRAME_RETRIES, retries);
  1073. }
  1074. static int
  1075. at86rf230_set_promiscuous_mode(struct ieee802154_hw *hw, const bool on)
  1076. {
  1077. struct at86rf230_local *lp = hw->priv;
  1078. int rc;
  1079. if (on) {
  1080. rc = at86rf230_write_subreg(lp, SR_AACK_DIS_ACK, 1);
  1081. if (rc < 0)
  1082. return rc;
  1083. rc = at86rf230_write_subreg(lp, SR_AACK_PROM_MODE, 1);
  1084. if (rc < 0)
  1085. return rc;
  1086. } else {
  1087. rc = at86rf230_write_subreg(lp, SR_AACK_PROM_MODE, 0);
  1088. if (rc < 0)
  1089. return rc;
  1090. rc = at86rf230_write_subreg(lp, SR_AACK_DIS_ACK, 0);
  1091. if (rc < 0)
  1092. return rc;
  1093. }
  1094. return 0;
  1095. }
  1096. static const struct ieee802154_ops at86rf230_ops = {
  1097. .owner = THIS_MODULE,
  1098. .xmit_async = at86rf230_xmit,
  1099. .ed = at86rf230_ed,
  1100. .set_channel = at86rf230_channel,
  1101. .start = at86rf230_start,
  1102. .stop = at86rf230_stop,
  1103. .set_hw_addr_filt = at86rf230_set_hw_addr_filt,
  1104. .set_txpower = at86rf230_set_txpower,
  1105. .set_lbt = at86rf230_set_lbt,
  1106. .set_cca_mode = at86rf230_set_cca_mode,
  1107. .set_cca_ed_level = at86rf230_set_cca_ed_level,
  1108. .set_csma_params = at86rf230_set_csma_params,
  1109. .set_frame_retries = at86rf230_set_frame_retries,
  1110. .set_promiscuous_mode = at86rf230_set_promiscuous_mode,
  1111. };
  1112. static struct at86rf2xx_chip_data at86rf233_data = {
  1113. .t_sleep_cycle = 330,
  1114. .t_channel_switch = 11,
  1115. .t_reset_to_off = 26,
  1116. .t_off_to_aack = 80,
  1117. .t_off_to_tx_on = 80,
  1118. .t_off_to_sleep = 35,
  1119. .t_sleep_to_off = 210,
  1120. .t_frame = 4096,
  1121. .t_p_ack = 545,
  1122. .rssi_base_val = -91,
  1123. .set_channel = at86rf23x_set_channel,
  1124. .set_txpower = at86rf23x_set_txpower,
  1125. };
  1126. static struct at86rf2xx_chip_data at86rf231_data = {
  1127. .t_sleep_cycle = 330,
  1128. .t_channel_switch = 24,
  1129. .t_reset_to_off = 37,
  1130. .t_off_to_aack = 110,
  1131. .t_off_to_tx_on = 110,
  1132. .t_off_to_sleep = 35,
  1133. .t_sleep_to_off = 380,
  1134. .t_frame = 4096,
  1135. .t_p_ack = 545,
  1136. .rssi_base_val = -91,
  1137. .set_channel = at86rf23x_set_channel,
  1138. .set_txpower = at86rf23x_set_txpower,
  1139. };
  1140. static struct at86rf2xx_chip_data at86rf212_data = {
  1141. .t_sleep_cycle = 330,
  1142. .t_channel_switch = 11,
  1143. .t_reset_to_off = 26,
  1144. .t_off_to_aack = 200,
  1145. .t_off_to_tx_on = 200,
  1146. .t_off_to_sleep = 35,
  1147. .t_sleep_to_off = 380,
  1148. .t_frame = 4096,
  1149. .t_p_ack = 545,
  1150. .rssi_base_val = -100,
  1151. .set_channel = at86rf212_set_channel,
  1152. .set_txpower = at86rf212_set_txpower,
  1153. };
  1154. static int at86rf230_hw_init(struct at86rf230_local *lp, u8 xtal_trim)
  1155. {
  1156. int rc, irq_type, irq_pol = IRQ_ACTIVE_HIGH;
  1157. unsigned int dvdd;
  1158. u8 csma_seed[2];
  1159. rc = at86rf230_sync_state_change(lp, STATE_FORCE_TRX_OFF);
  1160. if (rc)
  1161. return rc;
  1162. irq_type = irq_get_trigger_type(lp->spi->irq);
  1163. if (irq_type == IRQ_TYPE_EDGE_RISING ||
  1164. irq_type == IRQ_TYPE_EDGE_FALLING)
  1165. dev_warn(&lp->spi->dev,
  1166. "Using edge triggered irq's are not recommended!\n");
  1167. if (irq_type == IRQ_TYPE_EDGE_FALLING ||
  1168. irq_type == IRQ_TYPE_LEVEL_LOW)
  1169. irq_pol = IRQ_ACTIVE_LOW;
  1170. rc = at86rf230_write_subreg(lp, SR_IRQ_POLARITY, irq_pol);
  1171. if (rc)
  1172. return rc;
  1173. rc = at86rf230_write_subreg(lp, SR_RX_SAFE_MODE, 1);
  1174. if (rc)
  1175. return rc;
  1176. rc = at86rf230_write_subreg(lp, SR_IRQ_MASK, IRQ_TRX_END);
  1177. if (rc)
  1178. return rc;
  1179. /* reset values differs in at86rf231 and at86rf233 */
  1180. rc = at86rf230_write_subreg(lp, SR_IRQ_MASK_MODE, 0);
  1181. if (rc)
  1182. return rc;
  1183. get_random_bytes(csma_seed, ARRAY_SIZE(csma_seed));
  1184. rc = at86rf230_write_subreg(lp, SR_CSMA_SEED_0, csma_seed[0]);
  1185. if (rc)
  1186. return rc;
  1187. rc = at86rf230_write_subreg(lp, SR_CSMA_SEED_1, csma_seed[1]);
  1188. if (rc)
  1189. return rc;
  1190. /* CLKM changes are applied immediately */
  1191. rc = at86rf230_write_subreg(lp, SR_CLKM_SHA_SEL, 0x00);
  1192. if (rc)
  1193. return rc;
  1194. /* Turn CLKM Off */
  1195. rc = at86rf230_write_subreg(lp, SR_CLKM_CTRL, 0x00);
  1196. if (rc)
  1197. return rc;
  1198. /* Wait the next SLEEP cycle */
  1199. usleep_range(lp->data->t_sleep_cycle,
  1200. lp->data->t_sleep_cycle + 100);
  1201. /* xtal_trim value is calculated by:
  1202. * CL = 0.5 * (CX + CTRIM + CPAR)
  1203. *
  1204. * whereas:
  1205. * CL = capacitor of used crystal
  1206. * CX = connected capacitors at xtal pins
  1207. * CPAR = in all at86rf2xx datasheets this is a constant value 3 pF,
  1208. * but this is different on each board setup. You need to fine
  1209. * tuning this value via CTRIM.
  1210. * CTRIM = variable capacitor setting. Resolution is 0.3 pF range is
  1211. * 0 pF upto 4.5 pF.
  1212. *
  1213. * Examples:
  1214. * atben transceiver:
  1215. *
  1216. * CL = 8 pF
  1217. * CX = 12 pF
  1218. * CPAR = 3 pF (We assume the magic constant from datasheet)
  1219. * CTRIM = 0.9 pF
  1220. *
  1221. * (12+0.9+3)/2 = 7.95 which is nearly at 8 pF
  1222. *
  1223. * xtal_trim = 0x3
  1224. *
  1225. * openlabs transceiver:
  1226. *
  1227. * CL = 16 pF
  1228. * CX = 22 pF
  1229. * CPAR = 3 pF (We assume the magic constant from datasheet)
  1230. * CTRIM = 4.5 pF
  1231. *
  1232. * (22+4.5+3)/2 = 14.75 which is the nearest value to 16 pF
  1233. *
  1234. * xtal_trim = 0xf
  1235. */
  1236. rc = at86rf230_write_subreg(lp, SR_XTAL_TRIM, xtal_trim);
  1237. if (rc)
  1238. return rc;
  1239. rc = at86rf230_read_subreg(lp, SR_DVDD_OK, &dvdd);
  1240. if (rc)
  1241. return rc;
  1242. if (!dvdd) {
  1243. dev_err(&lp->spi->dev, "DVDD error\n");
  1244. return -EINVAL;
  1245. }
  1246. /* Force setting slotted operation bit to 0. Sometimes the atben
  1247. * sets this bit and I don't know why. We set this always force
  1248. * to zero while probing.
  1249. */
  1250. return at86rf230_write_subreg(lp, SR_SLOTTED_OPERATION, 0);
  1251. }
  1252. static int
  1253. at86rf230_get_pdata(struct spi_device *spi, int *rstn, int *slp_tr,
  1254. u8 *xtal_trim)
  1255. {
  1256. struct at86rf230_platform_data *pdata = spi->dev.platform_data;
  1257. int ret;
  1258. if (!IS_ENABLED(CONFIG_OF) || !spi->dev.of_node) {
  1259. if (!pdata)
  1260. return -ENOENT;
  1261. *rstn = pdata->rstn;
  1262. *slp_tr = pdata->slp_tr;
  1263. *xtal_trim = pdata->xtal_trim;
  1264. return 0;
  1265. }
  1266. *rstn = of_get_named_gpio(spi->dev.of_node, "reset-gpio", 0);
  1267. *slp_tr = of_get_named_gpio(spi->dev.of_node, "sleep-gpio", 0);
  1268. ret = of_property_read_u8(spi->dev.of_node, "xtal-trim", xtal_trim);
  1269. if (ret < 0 && ret != -EINVAL)
  1270. return ret;
  1271. return 0;
  1272. }
  1273. static int
  1274. at86rf230_detect_device(struct at86rf230_local *lp)
  1275. {
  1276. unsigned int part, version, val;
  1277. u16 man_id = 0;
  1278. const char *chip;
  1279. int rc;
  1280. rc = __at86rf230_read(lp, RG_MAN_ID_0, &val);
  1281. if (rc)
  1282. return rc;
  1283. man_id |= val;
  1284. rc = __at86rf230_read(lp, RG_MAN_ID_1, &val);
  1285. if (rc)
  1286. return rc;
  1287. man_id |= (val << 8);
  1288. rc = __at86rf230_read(lp, RG_PART_NUM, &part);
  1289. if (rc)
  1290. return rc;
  1291. rc = __at86rf230_read(lp, RG_VERSION_NUM, &version);
  1292. if (rc)
  1293. return rc;
  1294. if (man_id != 0x001f) {
  1295. dev_err(&lp->spi->dev, "Non-Atmel dev found (MAN_ID %02x %02x)\n",
  1296. man_id >> 8, man_id & 0xFF);
  1297. return -EINVAL;
  1298. }
  1299. lp->hw->flags = IEEE802154_HW_TX_OMIT_CKSUM |
  1300. IEEE802154_HW_CSMA_PARAMS |
  1301. IEEE802154_HW_FRAME_RETRIES | IEEE802154_HW_AFILT |
  1302. IEEE802154_HW_PROMISCUOUS;
  1303. lp->hw->phy->flags = WPAN_PHY_FLAG_TXPOWER |
  1304. WPAN_PHY_FLAG_CCA_ED_LEVEL |
  1305. WPAN_PHY_FLAG_CCA_MODE;
  1306. lp->hw->phy->supported.cca_modes = BIT(NL802154_CCA_ENERGY) |
  1307. BIT(NL802154_CCA_CARRIER) | BIT(NL802154_CCA_ENERGY_CARRIER);
  1308. lp->hw->phy->supported.cca_opts = BIT(NL802154_CCA_OPT_ENERGY_CARRIER_AND) |
  1309. BIT(NL802154_CCA_OPT_ENERGY_CARRIER_OR);
  1310. lp->hw->phy->supported.cca_ed_levels = at86rf23x_ed_levels;
  1311. lp->hw->phy->supported.cca_ed_levels_size = ARRAY_SIZE(at86rf23x_ed_levels);
  1312. lp->hw->phy->cca.mode = NL802154_CCA_ENERGY;
  1313. switch (part) {
  1314. case 2:
  1315. chip = "at86rf230";
  1316. rc = -ENOTSUPP;
  1317. goto not_supp;
  1318. case 3:
  1319. chip = "at86rf231";
  1320. lp->data = &at86rf231_data;
  1321. lp->hw->phy->supported.channels[0] = 0x7FFF800;
  1322. lp->hw->phy->current_channel = 11;
  1323. lp->hw->phy->symbol_duration = 16;
  1324. lp->hw->phy->supported.tx_powers = at86rf231_powers;
  1325. lp->hw->phy->supported.tx_powers_size = ARRAY_SIZE(at86rf231_powers);
  1326. break;
  1327. case 7:
  1328. chip = "at86rf212";
  1329. lp->data = &at86rf212_data;
  1330. lp->hw->flags |= IEEE802154_HW_LBT;
  1331. lp->hw->phy->supported.channels[0] = 0x00007FF;
  1332. lp->hw->phy->supported.channels[2] = 0x00007FF;
  1333. lp->hw->phy->current_channel = 5;
  1334. lp->hw->phy->symbol_duration = 25;
  1335. lp->hw->phy->supported.lbt = NL802154_SUPPORTED_BOOL_BOTH;
  1336. lp->hw->phy->supported.tx_powers = at86rf212_powers;
  1337. lp->hw->phy->supported.tx_powers_size = ARRAY_SIZE(at86rf212_powers);
  1338. lp->hw->phy->supported.cca_ed_levels = at86rf212_ed_levels_100;
  1339. lp->hw->phy->supported.cca_ed_levels_size = ARRAY_SIZE(at86rf212_ed_levels_100);
  1340. break;
  1341. case 11:
  1342. chip = "at86rf233";
  1343. lp->data = &at86rf233_data;
  1344. lp->hw->phy->supported.channels[0] = 0x7FFF800;
  1345. lp->hw->phy->current_channel = 13;
  1346. lp->hw->phy->symbol_duration = 16;
  1347. lp->hw->phy->supported.tx_powers = at86rf233_powers;
  1348. lp->hw->phy->supported.tx_powers_size = ARRAY_SIZE(at86rf233_powers);
  1349. break;
  1350. default:
  1351. chip = "unknown";
  1352. rc = -ENOTSUPP;
  1353. goto not_supp;
  1354. }
  1355. lp->hw->phy->cca_ed_level = lp->hw->phy->supported.cca_ed_levels[7];
  1356. lp->hw->phy->transmit_power = lp->hw->phy->supported.tx_powers[0];
  1357. not_supp:
  1358. dev_info(&lp->spi->dev, "Detected %s chip version %d\n", chip, version);
  1359. return rc;
  1360. }
  1361. static void
  1362. at86rf230_setup_spi_messages(struct at86rf230_local *lp)
  1363. {
  1364. lp->state.lp = lp;
  1365. lp->state.irq = lp->spi->irq;
  1366. spi_message_init(&lp->state.msg);
  1367. lp->state.msg.context = &lp->state;
  1368. lp->state.trx.len = 2;
  1369. lp->state.trx.tx_buf = lp->state.buf;
  1370. lp->state.trx.rx_buf = lp->state.buf;
  1371. spi_message_add_tail(&lp->state.trx, &lp->state.msg);
  1372. hrtimer_init(&lp->state.timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
  1373. lp->state.timer.function = at86rf230_async_state_timer;
  1374. lp->irq.lp = lp;
  1375. lp->irq.irq = lp->spi->irq;
  1376. spi_message_init(&lp->irq.msg);
  1377. lp->irq.msg.context = &lp->irq;
  1378. lp->irq.trx.len = 2;
  1379. lp->irq.trx.tx_buf = lp->irq.buf;
  1380. lp->irq.trx.rx_buf = lp->irq.buf;
  1381. spi_message_add_tail(&lp->irq.trx, &lp->irq.msg);
  1382. hrtimer_init(&lp->irq.timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
  1383. lp->irq.timer.function = at86rf230_async_state_timer;
  1384. lp->tx.lp = lp;
  1385. lp->tx.irq = lp->spi->irq;
  1386. spi_message_init(&lp->tx.msg);
  1387. lp->tx.msg.context = &lp->tx;
  1388. lp->tx.trx.len = 2;
  1389. lp->tx.trx.tx_buf = lp->tx.buf;
  1390. lp->tx.trx.rx_buf = lp->tx.buf;
  1391. spi_message_add_tail(&lp->tx.trx, &lp->tx.msg);
  1392. hrtimer_init(&lp->tx.timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
  1393. lp->tx.timer.function = at86rf230_async_state_timer;
  1394. }
  1395. static int at86rf230_probe(struct spi_device *spi)
  1396. {
  1397. struct ieee802154_hw *hw;
  1398. struct at86rf230_local *lp;
  1399. unsigned int status;
  1400. int rc, irq_type, rstn, slp_tr;
  1401. u8 xtal_trim = 0;
  1402. if (!spi->irq) {
  1403. dev_err(&spi->dev, "no IRQ specified\n");
  1404. return -EINVAL;
  1405. }
  1406. rc = at86rf230_get_pdata(spi, &rstn, &slp_tr, &xtal_trim);
  1407. if (rc < 0) {
  1408. dev_err(&spi->dev, "failed to parse platform_data: %d\n", rc);
  1409. return rc;
  1410. }
  1411. if (gpio_is_valid(rstn)) {
  1412. rc = devm_gpio_request_one(&spi->dev, rstn,
  1413. GPIOF_OUT_INIT_HIGH, "rstn");
  1414. if (rc)
  1415. return rc;
  1416. }
  1417. if (gpio_is_valid(slp_tr)) {
  1418. rc = devm_gpio_request_one(&spi->dev, slp_tr,
  1419. GPIOF_OUT_INIT_LOW, "slp_tr");
  1420. if (rc)
  1421. return rc;
  1422. }
  1423. /* Reset */
  1424. if (gpio_is_valid(rstn)) {
  1425. udelay(1);
  1426. gpio_set_value(rstn, 0);
  1427. udelay(1);
  1428. gpio_set_value(rstn, 1);
  1429. usleep_range(120, 240);
  1430. }
  1431. hw = ieee802154_alloc_hw(sizeof(*lp), &at86rf230_ops);
  1432. if (!hw)
  1433. return -ENOMEM;
  1434. lp = hw->priv;
  1435. lp->hw = hw;
  1436. lp->spi = spi;
  1437. lp->slp_tr = slp_tr;
  1438. hw->parent = &spi->dev;
  1439. ieee802154_random_extended_addr(&hw->phy->perm_extended_addr);
  1440. lp->regmap = devm_regmap_init_spi(spi, &at86rf230_regmap_spi_config);
  1441. if (IS_ERR(lp->regmap)) {
  1442. rc = PTR_ERR(lp->regmap);
  1443. dev_err(&spi->dev, "Failed to allocate register map: %d\n",
  1444. rc);
  1445. goto free_dev;
  1446. }
  1447. at86rf230_setup_spi_messages(lp);
  1448. rc = at86rf230_detect_device(lp);
  1449. if (rc < 0)
  1450. goto free_dev;
  1451. init_completion(&lp->state_complete);
  1452. spi_set_drvdata(spi, lp);
  1453. rc = at86rf230_hw_init(lp, xtal_trim);
  1454. if (rc)
  1455. goto free_dev;
  1456. /* Read irq status register to reset irq line */
  1457. rc = at86rf230_read_subreg(lp, RG_IRQ_STATUS, 0xff, 0, &status);
  1458. if (rc)
  1459. goto free_dev;
  1460. irq_type = irq_get_trigger_type(spi->irq);
  1461. if (!irq_type)
  1462. irq_type = IRQF_TRIGGER_HIGH;
  1463. rc = devm_request_irq(&spi->dev, spi->irq, at86rf230_isr,
  1464. IRQF_SHARED | irq_type, dev_name(&spi->dev), lp);
  1465. if (rc)
  1466. goto free_dev;
  1467. /* disable_irq by default and wait for starting hardware */
  1468. disable_irq(spi->irq);
  1469. /* going into sleep by default */
  1470. at86rf230_sleep(lp);
  1471. rc = ieee802154_register_hw(lp->hw);
  1472. if (rc)
  1473. goto free_dev;
  1474. return rc;
  1475. free_dev:
  1476. ieee802154_free_hw(lp->hw);
  1477. return rc;
  1478. }
  1479. static int at86rf230_remove(struct spi_device *spi)
  1480. {
  1481. struct at86rf230_local *lp = spi_get_drvdata(spi);
  1482. /* mask all at86rf230 irq's */
  1483. at86rf230_write_subreg(lp, SR_IRQ_MASK, 0);
  1484. ieee802154_unregister_hw(lp->hw);
  1485. ieee802154_free_hw(lp->hw);
  1486. dev_dbg(&spi->dev, "unregistered at86rf230\n");
  1487. return 0;
  1488. }
  1489. static const struct of_device_id at86rf230_of_match[] = {
  1490. { .compatible = "atmel,at86rf230", },
  1491. { .compatible = "atmel,at86rf231", },
  1492. { .compatible = "atmel,at86rf233", },
  1493. { .compatible = "atmel,at86rf212", },
  1494. { },
  1495. };
  1496. MODULE_DEVICE_TABLE(of, at86rf230_of_match);
  1497. static const struct spi_device_id at86rf230_device_id[] = {
  1498. { .name = "at86rf230", },
  1499. { .name = "at86rf231", },
  1500. { .name = "at86rf233", },
  1501. { .name = "at86rf212", },
  1502. { },
  1503. };
  1504. MODULE_DEVICE_TABLE(spi, at86rf230_device_id);
  1505. static struct spi_driver at86rf230_driver = {
  1506. .id_table = at86rf230_device_id,
  1507. .driver = {
  1508. .of_match_table = of_match_ptr(at86rf230_of_match),
  1509. .name = "at86rf230",
  1510. .owner = THIS_MODULE,
  1511. },
  1512. .probe = at86rf230_probe,
  1513. .remove = at86rf230_remove,
  1514. };
  1515. module_spi_driver(at86rf230_driver);
  1516. MODULE_DESCRIPTION("AT86RF230 Transceiver Driver");
  1517. MODULE_LICENSE("GPL v2");