mcdi.c 55 KB

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  1. /****************************************************************************
  2. * Driver for Solarflare network controllers and boards
  3. * Copyright 2008-2013 Solarflare Communications Inc.
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of the GNU General Public License version 2 as published
  7. * by the Free Software Foundation, incorporated herein by reference.
  8. */
  9. #include <linux/delay.h>
  10. #include <linux/moduleparam.h>
  11. #include <asm/cmpxchg.h>
  12. #include "net_driver.h"
  13. #include "nic.h"
  14. #include "io.h"
  15. #include "farch_regs.h"
  16. #include "mcdi_pcol.h"
  17. #include "phy.h"
  18. /**************************************************************************
  19. *
  20. * Management-Controller-to-Driver Interface
  21. *
  22. **************************************************************************
  23. */
  24. #define MCDI_RPC_TIMEOUT (10 * HZ)
  25. /* A reboot/assertion causes the MCDI status word to be set after the
  26. * command word is set or a REBOOT event is sent. If we notice a reboot
  27. * via these mechanisms then wait 250ms for the status word to be set.
  28. */
  29. #define MCDI_STATUS_DELAY_US 100
  30. #define MCDI_STATUS_DELAY_COUNT 2500
  31. #define MCDI_STATUS_SLEEP_MS \
  32. (MCDI_STATUS_DELAY_US * MCDI_STATUS_DELAY_COUNT / 1000)
  33. #define SEQ_MASK \
  34. EFX_MASK32(EFX_WIDTH(MCDI_HEADER_SEQ))
  35. struct efx_mcdi_async_param {
  36. struct list_head list;
  37. unsigned int cmd;
  38. size_t inlen;
  39. size_t outlen;
  40. bool quiet;
  41. efx_mcdi_async_completer *complete;
  42. unsigned long cookie;
  43. /* followed by request/response buffer */
  44. };
  45. static void efx_mcdi_timeout_async(unsigned long context);
  46. static int efx_mcdi_drv_attach(struct efx_nic *efx, bool driver_operating,
  47. bool *was_attached_out);
  48. static bool efx_mcdi_poll_once(struct efx_nic *efx);
  49. static void efx_mcdi_abandon(struct efx_nic *efx);
  50. #ifdef CONFIG_SFC_MCDI_LOGGING
  51. static bool mcdi_logging_default;
  52. module_param(mcdi_logging_default, bool, 0644);
  53. MODULE_PARM_DESC(mcdi_logging_default,
  54. "Enable MCDI logging on newly-probed functions");
  55. #endif
  56. int efx_mcdi_init(struct efx_nic *efx)
  57. {
  58. struct efx_mcdi_iface *mcdi;
  59. bool already_attached;
  60. int rc = -ENOMEM;
  61. efx->mcdi = kzalloc(sizeof(*efx->mcdi), GFP_KERNEL);
  62. if (!efx->mcdi)
  63. goto fail;
  64. mcdi = efx_mcdi(efx);
  65. mcdi->efx = efx;
  66. #ifdef CONFIG_SFC_MCDI_LOGGING
  67. /* consuming code assumes buffer is page-sized */
  68. mcdi->logging_buffer = (char *)__get_free_page(GFP_KERNEL);
  69. if (!mcdi->logging_buffer)
  70. goto fail1;
  71. mcdi->logging_enabled = mcdi_logging_default;
  72. #endif
  73. init_waitqueue_head(&mcdi->wq);
  74. spin_lock_init(&mcdi->iface_lock);
  75. mcdi->state = MCDI_STATE_QUIESCENT;
  76. mcdi->mode = MCDI_MODE_POLL;
  77. spin_lock_init(&mcdi->async_lock);
  78. INIT_LIST_HEAD(&mcdi->async_list);
  79. setup_timer(&mcdi->async_timer, efx_mcdi_timeout_async,
  80. (unsigned long)mcdi);
  81. (void) efx_mcdi_poll_reboot(efx);
  82. mcdi->new_epoch = true;
  83. /* Recover from a failed assertion before probing */
  84. rc = efx_mcdi_handle_assertion(efx);
  85. if (rc)
  86. goto fail2;
  87. /* Let the MC (and BMC, if this is a LOM) know that the driver
  88. * is loaded. We should do this before we reset the NIC.
  89. */
  90. rc = efx_mcdi_drv_attach(efx, true, &already_attached);
  91. if (rc) {
  92. netif_err(efx, probe, efx->net_dev,
  93. "Unable to register driver with MCPU\n");
  94. goto fail2;
  95. }
  96. if (already_attached)
  97. /* Not a fatal error */
  98. netif_err(efx, probe, efx->net_dev,
  99. "Host already registered with MCPU\n");
  100. if (efx->mcdi->fn_flags &
  101. (1 << MC_CMD_DRV_ATTACH_EXT_OUT_FLAG_PRIMARY))
  102. efx->primary = efx;
  103. return 0;
  104. fail2:
  105. #ifdef CONFIG_SFC_MCDI_LOGGING
  106. free_page((unsigned long)mcdi->logging_buffer);
  107. fail1:
  108. #endif
  109. kfree(efx->mcdi);
  110. efx->mcdi = NULL;
  111. fail:
  112. return rc;
  113. }
  114. void efx_mcdi_fini(struct efx_nic *efx)
  115. {
  116. if (!efx->mcdi)
  117. return;
  118. BUG_ON(efx->mcdi->iface.state != MCDI_STATE_QUIESCENT);
  119. /* Relinquish the device (back to the BMC, if this is a LOM) */
  120. efx_mcdi_drv_attach(efx, false, NULL);
  121. #ifdef CONFIG_SFC_MCDI_LOGGING
  122. free_page((unsigned long)efx->mcdi->iface.logging_buffer);
  123. #endif
  124. kfree(efx->mcdi);
  125. }
  126. static void efx_mcdi_send_request(struct efx_nic *efx, unsigned cmd,
  127. const efx_dword_t *inbuf, size_t inlen)
  128. {
  129. struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
  130. #ifdef CONFIG_SFC_MCDI_LOGGING
  131. char *buf = mcdi->logging_buffer; /* page-sized */
  132. #endif
  133. efx_dword_t hdr[2];
  134. size_t hdr_len;
  135. u32 xflags, seqno;
  136. BUG_ON(mcdi->state == MCDI_STATE_QUIESCENT);
  137. /* Serialise with efx_mcdi_ev_cpl() and efx_mcdi_ev_death() */
  138. spin_lock_bh(&mcdi->iface_lock);
  139. ++mcdi->seqno;
  140. spin_unlock_bh(&mcdi->iface_lock);
  141. seqno = mcdi->seqno & SEQ_MASK;
  142. xflags = 0;
  143. if (mcdi->mode == MCDI_MODE_EVENTS)
  144. xflags |= MCDI_HEADER_XFLAGS_EVREQ;
  145. if (efx->type->mcdi_max_ver == 1) {
  146. /* MCDI v1 */
  147. EFX_POPULATE_DWORD_7(hdr[0],
  148. MCDI_HEADER_RESPONSE, 0,
  149. MCDI_HEADER_RESYNC, 1,
  150. MCDI_HEADER_CODE, cmd,
  151. MCDI_HEADER_DATALEN, inlen,
  152. MCDI_HEADER_SEQ, seqno,
  153. MCDI_HEADER_XFLAGS, xflags,
  154. MCDI_HEADER_NOT_EPOCH, !mcdi->new_epoch);
  155. hdr_len = 4;
  156. } else {
  157. /* MCDI v2 */
  158. BUG_ON(inlen > MCDI_CTL_SDU_LEN_MAX_V2);
  159. EFX_POPULATE_DWORD_7(hdr[0],
  160. MCDI_HEADER_RESPONSE, 0,
  161. MCDI_HEADER_RESYNC, 1,
  162. MCDI_HEADER_CODE, MC_CMD_V2_EXTN,
  163. MCDI_HEADER_DATALEN, 0,
  164. MCDI_HEADER_SEQ, seqno,
  165. MCDI_HEADER_XFLAGS, xflags,
  166. MCDI_HEADER_NOT_EPOCH, !mcdi->new_epoch);
  167. EFX_POPULATE_DWORD_2(hdr[1],
  168. MC_CMD_V2_EXTN_IN_EXTENDED_CMD, cmd,
  169. MC_CMD_V2_EXTN_IN_ACTUAL_LEN, inlen);
  170. hdr_len = 8;
  171. }
  172. #ifdef CONFIG_SFC_MCDI_LOGGING
  173. if (mcdi->logging_enabled && !WARN_ON_ONCE(!buf)) {
  174. int bytes = 0;
  175. int i;
  176. /* Lengths should always be a whole number of dwords, so scream
  177. * if they're not.
  178. */
  179. WARN_ON_ONCE(hdr_len % 4);
  180. WARN_ON_ONCE(inlen % 4);
  181. /* We own the logging buffer, as only one MCDI can be in
  182. * progress on a NIC at any one time. So no need for locking.
  183. */
  184. for (i = 0; i < hdr_len / 4 && bytes < PAGE_SIZE; i++)
  185. bytes += snprintf(buf + bytes, PAGE_SIZE - bytes,
  186. " %08x", le32_to_cpu(hdr[i].u32[0]));
  187. for (i = 0; i < inlen / 4 && bytes < PAGE_SIZE; i++)
  188. bytes += snprintf(buf + bytes, PAGE_SIZE - bytes,
  189. " %08x", le32_to_cpu(inbuf[i].u32[0]));
  190. netif_info(efx, hw, efx->net_dev, "MCDI RPC REQ:%s\n", buf);
  191. }
  192. #endif
  193. efx->type->mcdi_request(efx, hdr, hdr_len, inbuf, inlen);
  194. mcdi->new_epoch = false;
  195. }
  196. static int efx_mcdi_errno(unsigned int mcdi_err)
  197. {
  198. switch (mcdi_err) {
  199. case 0:
  200. return 0;
  201. #define TRANSLATE_ERROR(name) \
  202. case MC_CMD_ERR_ ## name: \
  203. return -name;
  204. TRANSLATE_ERROR(EPERM);
  205. TRANSLATE_ERROR(ENOENT);
  206. TRANSLATE_ERROR(EINTR);
  207. TRANSLATE_ERROR(EAGAIN);
  208. TRANSLATE_ERROR(EACCES);
  209. TRANSLATE_ERROR(EBUSY);
  210. TRANSLATE_ERROR(EINVAL);
  211. TRANSLATE_ERROR(EDEADLK);
  212. TRANSLATE_ERROR(ENOSYS);
  213. TRANSLATE_ERROR(ETIME);
  214. TRANSLATE_ERROR(EALREADY);
  215. TRANSLATE_ERROR(ENOSPC);
  216. #undef TRANSLATE_ERROR
  217. case MC_CMD_ERR_ENOTSUP:
  218. return -EOPNOTSUPP;
  219. case MC_CMD_ERR_ALLOC_FAIL:
  220. return -ENOBUFS;
  221. case MC_CMD_ERR_MAC_EXIST:
  222. return -EADDRINUSE;
  223. default:
  224. return -EPROTO;
  225. }
  226. }
  227. static void efx_mcdi_read_response_header(struct efx_nic *efx)
  228. {
  229. struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
  230. unsigned int respseq, respcmd, error;
  231. #ifdef CONFIG_SFC_MCDI_LOGGING
  232. char *buf = mcdi->logging_buffer; /* page-sized */
  233. #endif
  234. efx_dword_t hdr;
  235. efx->type->mcdi_read_response(efx, &hdr, 0, 4);
  236. respseq = EFX_DWORD_FIELD(hdr, MCDI_HEADER_SEQ);
  237. respcmd = EFX_DWORD_FIELD(hdr, MCDI_HEADER_CODE);
  238. error = EFX_DWORD_FIELD(hdr, MCDI_HEADER_ERROR);
  239. if (respcmd != MC_CMD_V2_EXTN) {
  240. mcdi->resp_hdr_len = 4;
  241. mcdi->resp_data_len = EFX_DWORD_FIELD(hdr, MCDI_HEADER_DATALEN);
  242. } else {
  243. efx->type->mcdi_read_response(efx, &hdr, 4, 4);
  244. mcdi->resp_hdr_len = 8;
  245. mcdi->resp_data_len =
  246. EFX_DWORD_FIELD(hdr, MC_CMD_V2_EXTN_IN_ACTUAL_LEN);
  247. }
  248. #ifdef CONFIG_SFC_MCDI_LOGGING
  249. if (mcdi->logging_enabled && !WARN_ON_ONCE(!buf)) {
  250. size_t hdr_len, data_len;
  251. int bytes = 0;
  252. int i;
  253. WARN_ON_ONCE(mcdi->resp_hdr_len % 4);
  254. hdr_len = mcdi->resp_hdr_len / 4;
  255. /* MCDI_DECLARE_BUF ensures that underlying buffer is padded
  256. * to dword size, and the MCDI buffer is always dword size
  257. */
  258. data_len = DIV_ROUND_UP(mcdi->resp_data_len, 4);
  259. /* We own the logging buffer, as only one MCDI can be in
  260. * progress on a NIC at any one time. So no need for locking.
  261. */
  262. for (i = 0; i < hdr_len && bytes < PAGE_SIZE; i++) {
  263. efx->type->mcdi_read_response(efx, &hdr, (i * 4), 4);
  264. bytes += snprintf(buf + bytes, PAGE_SIZE - bytes,
  265. " %08x", le32_to_cpu(hdr.u32[0]));
  266. }
  267. for (i = 0; i < data_len && bytes < PAGE_SIZE; i++) {
  268. efx->type->mcdi_read_response(efx, &hdr,
  269. mcdi->resp_hdr_len + (i * 4), 4);
  270. bytes += snprintf(buf + bytes, PAGE_SIZE - bytes,
  271. " %08x", le32_to_cpu(hdr.u32[0]));
  272. }
  273. netif_info(efx, hw, efx->net_dev, "MCDI RPC RESP:%s\n", buf);
  274. }
  275. #endif
  276. if (error && mcdi->resp_data_len == 0) {
  277. netif_err(efx, hw, efx->net_dev, "MC rebooted\n");
  278. mcdi->resprc = -EIO;
  279. } else if ((respseq ^ mcdi->seqno) & SEQ_MASK) {
  280. netif_err(efx, hw, efx->net_dev,
  281. "MC response mismatch tx seq 0x%x rx seq 0x%x\n",
  282. respseq, mcdi->seqno);
  283. mcdi->resprc = -EIO;
  284. } else if (error) {
  285. efx->type->mcdi_read_response(efx, &hdr, mcdi->resp_hdr_len, 4);
  286. mcdi->resprc =
  287. efx_mcdi_errno(EFX_DWORD_FIELD(hdr, EFX_DWORD_0));
  288. } else {
  289. mcdi->resprc = 0;
  290. }
  291. }
  292. static bool efx_mcdi_poll_once(struct efx_nic *efx)
  293. {
  294. struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
  295. rmb();
  296. if (!efx->type->mcdi_poll_response(efx))
  297. return false;
  298. spin_lock_bh(&mcdi->iface_lock);
  299. efx_mcdi_read_response_header(efx);
  300. spin_unlock_bh(&mcdi->iface_lock);
  301. return true;
  302. }
  303. static int efx_mcdi_poll(struct efx_nic *efx)
  304. {
  305. struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
  306. unsigned long time, finish;
  307. unsigned int spins;
  308. int rc;
  309. /* Check for a reboot atomically with respect to efx_mcdi_copyout() */
  310. rc = efx_mcdi_poll_reboot(efx);
  311. if (rc) {
  312. spin_lock_bh(&mcdi->iface_lock);
  313. mcdi->resprc = rc;
  314. mcdi->resp_hdr_len = 0;
  315. mcdi->resp_data_len = 0;
  316. spin_unlock_bh(&mcdi->iface_lock);
  317. return 0;
  318. }
  319. /* Poll for completion. Poll quickly (once a us) for the 1st jiffy,
  320. * because generally mcdi responses are fast. After that, back off
  321. * and poll once a jiffy (approximately)
  322. */
  323. spins = TICK_USEC;
  324. finish = jiffies + MCDI_RPC_TIMEOUT;
  325. while (1) {
  326. if (spins != 0) {
  327. --spins;
  328. udelay(1);
  329. } else {
  330. schedule_timeout_uninterruptible(1);
  331. }
  332. time = jiffies;
  333. if (efx_mcdi_poll_once(efx))
  334. break;
  335. if (time_after(time, finish))
  336. return -ETIMEDOUT;
  337. }
  338. /* Return rc=0 like wait_event_timeout() */
  339. return 0;
  340. }
  341. /* Test and clear MC-rebooted flag for this port/function; reset
  342. * software state as necessary.
  343. */
  344. int efx_mcdi_poll_reboot(struct efx_nic *efx)
  345. {
  346. if (!efx->mcdi)
  347. return 0;
  348. return efx->type->mcdi_poll_reboot(efx);
  349. }
  350. static bool efx_mcdi_acquire_async(struct efx_mcdi_iface *mcdi)
  351. {
  352. return cmpxchg(&mcdi->state,
  353. MCDI_STATE_QUIESCENT, MCDI_STATE_RUNNING_ASYNC) ==
  354. MCDI_STATE_QUIESCENT;
  355. }
  356. static void efx_mcdi_acquire_sync(struct efx_mcdi_iface *mcdi)
  357. {
  358. /* Wait until the interface becomes QUIESCENT and we win the race
  359. * to mark it RUNNING_SYNC.
  360. */
  361. wait_event(mcdi->wq,
  362. cmpxchg(&mcdi->state,
  363. MCDI_STATE_QUIESCENT, MCDI_STATE_RUNNING_SYNC) ==
  364. MCDI_STATE_QUIESCENT);
  365. }
  366. static int efx_mcdi_await_completion(struct efx_nic *efx)
  367. {
  368. struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
  369. if (wait_event_timeout(mcdi->wq, mcdi->state == MCDI_STATE_COMPLETED,
  370. MCDI_RPC_TIMEOUT) == 0)
  371. return -ETIMEDOUT;
  372. /* Check if efx_mcdi_set_mode() switched us back to polled completions.
  373. * In which case, poll for completions directly. If efx_mcdi_ev_cpl()
  374. * completed the request first, then we'll just end up completing the
  375. * request again, which is safe.
  376. *
  377. * We need an smp_rmb() to synchronise with efx_mcdi_mode_poll(), which
  378. * wait_event_timeout() implicitly provides.
  379. */
  380. if (mcdi->mode == MCDI_MODE_POLL)
  381. return efx_mcdi_poll(efx);
  382. return 0;
  383. }
  384. /* If the interface is RUNNING_SYNC, switch to COMPLETED and wake the
  385. * requester. Return whether this was done. Does not take any locks.
  386. */
  387. static bool efx_mcdi_complete_sync(struct efx_mcdi_iface *mcdi)
  388. {
  389. if (cmpxchg(&mcdi->state,
  390. MCDI_STATE_RUNNING_SYNC, MCDI_STATE_COMPLETED) ==
  391. MCDI_STATE_RUNNING_SYNC) {
  392. wake_up(&mcdi->wq);
  393. return true;
  394. }
  395. return false;
  396. }
  397. static void efx_mcdi_release(struct efx_mcdi_iface *mcdi)
  398. {
  399. if (mcdi->mode == MCDI_MODE_EVENTS) {
  400. struct efx_mcdi_async_param *async;
  401. struct efx_nic *efx = mcdi->efx;
  402. /* Process the asynchronous request queue */
  403. spin_lock_bh(&mcdi->async_lock);
  404. async = list_first_entry_or_null(
  405. &mcdi->async_list, struct efx_mcdi_async_param, list);
  406. if (async) {
  407. mcdi->state = MCDI_STATE_RUNNING_ASYNC;
  408. efx_mcdi_send_request(efx, async->cmd,
  409. (const efx_dword_t *)(async + 1),
  410. async->inlen);
  411. mod_timer(&mcdi->async_timer,
  412. jiffies + MCDI_RPC_TIMEOUT);
  413. }
  414. spin_unlock_bh(&mcdi->async_lock);
  415. if (async)
  416. return;
  417. }
  418. mcdi->state = MCDI_STATE_QUIESCENT;
  419. wake_up(&mcdi->wq);
  420. }
  421. /* If the interface is RUNNING_ASYNC, switch to COMPLETED, call the
  422. * asynchronous completion function, and release the interface.
  423. * Return whether this was done. Must be called in bh-disabled
  424. * context. Will take iface_lock and async_lock.
  425. */
  426. static bool efx_mcdi_complete_async(struct efx_mcdi_iface *mcdi, bool timeout)
  427. {
  428. struct efx_nic *efx = mcdi->efx;
  429. struct efx_mcdi_async_param *async;
  430. size_t hdr_len, data_len, err_len;
  431. efx_dword_t *outbuf;
  432. MCDI_DECLARE_BUF_ERR(errbuf);
  433. int rc;
  434. if (cmpxchg(&mcdi->state,
  435. MCDI_STATE_RUNNING_ASYNC, MCDI_STATE_COMPLETED) !=
  436. MCDI_STATE_RUNNING_ASYNC)
  437. return false;
  438. spin_lock(&mcdi->iface_lock);
  439. if (timeout) {
  440. /* Ensure that if the completion event arrives later,
  441. * the seqno check in efx_mcdi_ev_cpl() will fail
  442. */
  443. ++mcdi->seqno;
  444. ++mcdi->credits;
  445. rc = -ETIMEDOUT;
  446. hdr_len = 0;
  447. data_len = 0;
  448. } else {
  449. rc = mcdi->resprc;
  450. hdr_len = mcdi->resp_hdr_len;
  451. data_len = mcdi->resp_data_len;
  452. }
  453. spin_unlock(&mcdi->iface_lock);
  454. /* Stop the timer. In case the timer function is running, we
  455. * must wait for it to return so that there is no possibility
  456. * of it aborting the next request.
  457. */
  458. if (!timeout)
  459. del_timer_sync(&mcdi->async_timer);
  460. spin_lock(&mcdi->async_lock);
  461. async = list_first_entry(&mcdi->async_list,
  462. struct efx_mcdi_async_param, list);
  463. list_del(&async->list);
  464. spin_unlock(&mcdi->async_lock);
  465. outbuf = (efx_dword_t *)(async + 1);
  466. efx->type->mcdi_read_response(efx, outbuf, hdr_len,
  467. min(async->outlen, data_len));
  468. if (!timeout && rc && !async->quiet) {
  469. err_len = min(sizeof(errbuf), data_len);
  470. efx->type->mcdi_read_response(efx, errbuf, hdr_len,
  471. sizeof(errbuf));
  472. efx_mcdi_display_error(efx, async->cmd, async->inlen, errbuf,
  473. err_len, rc);
  474. }
  475. async->complete(efx, async->cookie, rc, outbuf, data_len);
  476. kfree(async);
  477. efx_mcdi_release(mcdi);
  478. return true;
  479. }
  480. static void efx_mcdi_ev_cpl(struct efx_nic *efx, unsigned int seqno,
  481. unsigned int datalen, unsigned int mcdi_err)
  482. {
  483. struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
  484. bool wake = false;
  485. spin_lock(&mcdi->iface_lock);
  486. if ((seqno ^ mcdi->seqno) & SEQ_MASK) {
  487. if (mcdi->credits)
  488. /* The request has been cancelled */
  489. --mcdi->credits;
  490. else
  491. netif_err(efx, hw, efx->net_dev,
  492. "MC response mismatch tx seq 0x%x rx "
  493. "seq 0x%x\n", seqno, mcdi->seqno);
  494. } else {
  495. if (efx->type->mcdi_max_ver >= 2) {
  496. /* MCDI v2 responses don't fit in an event */
  497. efx_mcdi_read_response_header(efx);
  498. } else {
  499. mcdi->resprc = efx_mcdi_errno(mcdi_err);
  500. mcdi->resp_hdr_len = 4;
  501. mcdi->resp_data_len = datalen;
  502. }
  503. wake = true;
  504. }
  505. spin_unlock(&mcdi->iface_lock);
  506. if (wake) {
  507. if (!efx_mcdi_complete_async(mcdi, false))
  508. (void) efx_mcdi_complete_sync(mcdi);
  509. /* If the interface isn't RUNNING_ASYNC or
  510. * RUNNING_SYNC then we've received a duplicate
  511. * completion after we've already transitioned back to
  512. * QUIESCENT. [A subsequent invocation would increment
  513. * seqno, so would have failed the seqno check].
  514. */
  515. }
  516. }
  517. static void efx_mcdi_timeout_async(unsigned long context)
  518. {
  519. struct efx_mcdi_iface *mcdi = (struct efx_mcdi_iface *)context;
  520. efx_mcdi_complete_async(mcdi, true);
  521. }
  522. static int
  523. efx_mcdi_check_supported(struct efx_nic *efx, unsigned int cmd, size_t inlen)
  524. {
  525. if (efx->type->mcdi_max_ver < 0 ||
  526. (efx->type->mcdi_max_ver < 2 &&
  527. cmd > MC_CMD_CMD_SPACE_ESCAPE_7))
  528. return -EINVAL;
  529. if (inlen > MCDI_CTL_SDU_LEN_MAX_V2 ||
  530. (efx->type->mcdi_max_ver < 2 &&
  531. inlen > MCDI_CTL_SDU_LEN_MAX_V1))
  532. return -EMSGSIZE;
  533. return 0;
  534. }
  535. static int _efx_mcdi_rpc_finish(struct efx_nic *efx, unsigned cmd, size_t inlen,
  536. efx_dword_t *outbuf, size_t outlen,
  537. size_t *outlen_actual, bool quiet)
  538. {
  539. struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
  540. MCDI_DECLARE_BUF_ERR(errbuf);
  541. int rc;
  542. if (mcdi->mode == MCDI_MODE_POLL)
  543. rc = efx_mcdi_poll(efx);
  544. else
  545. rc = efx_mcdi_await_completion(efx);
  546. if (rc != 0) {
  547. netif_err(efx, hw, efx->net_dev,
  548. "MC command 0x%x inlen %d mode %d timed out\n",
  549. cmd, (int)inlen, mcdi->mode);
  550. if (mcdi->mode == MCDI_MODE_EVENTS && efx_mcdi_poll_once(efx)) {
  551. netif_err(efx, hw, efx->net_dev,
  552. "MCDI request was completed without an event\n");
  553. rc = 0;
  554. }
  555. efx_mcdi_abandon(efx);
  556. /* Close the race with efx_mcdi_ev_cpl() executing just too late
  557. * and completing a request we've just cancelled, by ensuring
  558. * that the seqno check therein fails.
  559. */
  560. spin_lock_bh(&mcdi->iface_lock);
  561. ++mcdi->seqno;
  562. ++mcdi->credits;
  563. spin_unlock_bh(&mcdi->iface_lock);
  564. }
  565. if (rc != 0) {
  566. if (outlen_actual)
  567. *outlen_actual = 0;
  568. } else {
  569. size_t hdr_len, data_len, err_len;
  570. /* At the very least we need a memory barrier here to ensure
  571. * we pick up changes from efx_mcdi_ev_cpl(). Protect against
  572. * a spurious efx_mcdi_ev_cpl() running concurrently by
  573. * acquiring the iface_lock. */
  574. spin_lock_bh(&mcdi->iface_lock);
  575. rc = mcdi->resprc;
  576. hdr_len = mcdi->resp_hdr_len;
  577. data_len = mcdi->resp_data_len;
  578. err_len = min(sizeof(errbuf), data_len);
  579. spin_unlock_bh(&mcdi->iface_lock);
  580. BUG_ON(rc > 0);
  581. efx->type->mcdi_read_response(efx, outbuf, hdr_len,
  582. min(outlen, data_len));
  583. if (outlen_actual)
  584. *outlen_actual = data_len;
  585. efx->type->mcdi_read_response(efx, errbuf, hdr_len, err_len);
  586. if (cmd == MC_CMD_REBOOT && rc == -EIO) {
  587. /* Don't reset if MC_CMD_REBOOT returns EIO */
  588. } else if (rc == -EIO || rc == -EINTR) {
  589. netif_err(efx, hw, efx->net_dev, "MC fatal error %d\n",
  590. -rc);
  591. efx_schedule_reset(efx, RESET_TYPE_MC_FAILURE);
  592. } else if (rc && !quiet) {
  593. efx_mcdi_display_error(efx, cmd, inlen, errbuf, err_len,
  594. rc);
  595. }
  596. if (rc == -EIO || rc == -EINTR) {
  597. msleep(MCDI_STATUS_SLEEP_MS);
  598. efx_mcdi_poll_reboot(efx);
  599. mcdi->new_epoch = true;
  600. }
  601. }
  602. efx_mcdi_release(mcdi);
  603. return rc;
  604. }
  605. static int _efx_mcdi_rpc(struct efx_nic *efx, unsigned cmd,
  606. const efx_dword_t *inbuf, size_t inlen,
  607. efx_dword_t *outbuf, size_t outlen,
  608. size_t *outlen_actual, bool quiet)
  609. {
  610. int rc;
  611. rc = efx_mcdi_rpc_start(efx, cmd, inbuf, inlen);
  612. if (rc) {
  613. if (outlen_actual)
  614. *outlen_actual = 0;
  615. return rc;
  616. }
  617. return _efx_mcdi_rpc_finish(efx, cmd, inlen, outbuf, outlen,
  618. outlen_actual, quiet);
  619. }
  620. int efx_mcdi_rpc(struct efx_nic *efx, unsigned cmd,
  621. const efx_dword_t *inbuf, size_t inlen,
  622. efx_dword_t *outbuf, size_t outlen,
  623. size_t *outlen_actual)
  624. {
  625. return _efx_mcdi_rpc(efx, cmd, inbuf, inlen, outbuf, outlen,
  626. outlen_actual, false);
  627. }
  628. /* Normally, on receiving an error code in the MCDI response,
  629. * efx_mcdi_rpc will log an error message containing (among other
  630. * things) the raw error code, by means of efx_mcdi_display_error.
  631. * This _quiet version suppresses that; if the caller wishes to log
  632. * the error conditionally on the return code, it should call this
  633. * function and is then responsible for calling efx_mcdi_display_error
  634. * as needed.
  635. */
  636. int efx_mcdi_rpc_quiet(struct efx_nic *efx, unsigned cmd,
  637. const efx_dword_t *inbuf, size_t inlen,
  638. efx_dword_t *outbuf, size_t outlen,
  639. size_t *outlen_actual)
  640. {
  641. return _efx_mcdi_rpc(efx, cmd, inbuf, inlen, outbuf, outlen,
  642. outlen_actual, true);
  643. }
  644. int efx_mcdi_rpc_start(struct efx_nic *efx, unsigned cmd,
  645. const efx_dword_t *inbuf, size_t inlen)
  646. {
  647. struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
  648. int rc;
  649. rc = efx_mcdi_check_supported(efx, cmd, inlen);
  650. if (rc)
  651. return rc;
  652. if (efx->mc_bist_for_other_fn)
  653. return -ENETDOWN;
  654. if (mcdi->mode == MCDI_MODE_FAIL)
  655. return -ENETDOWN;
  656. efx_mcdi_acquire_sync(mcdi);
  657. efx_mcdi_send_request(efx, cmd, inbuf, inlen);
  658. return 0;
  659. }
  660. static int _efx_mcdi_rpc_async(struct efx_nic *efx, unsigned int cmd,
  661. const efx_dword_t *inbuf, size_t inlen,
  662. size_t outlen,
  663. efx_mcdi_async_completer *complete,
  664. unsigned long cookie, bool quiet)
  665. {
  666. struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
  667. struct efx_mcdi_async_param *async;
  668. int rc;
  669. rc = efx_mcdi_check_supported(efx, cmd, inlen);
  670. if (rc)
  671. return rc;
  672. if (efx->mc_bist_for_other_fn)
  673. return -ENETDOWN;
  674. async = kmalloc(sizeof(*async) + ALIGN(max(inlen, outlen), 4),
  675. GFP_ATOMIC);
  676. if (!async)
  677. return -ENOMEM;
  678. async->cmd = cmd;
  679. async->inlen = inlen;
  680. async->outlen = outlen;
  681. async->quiet = quiet;
  682. async->complete = complete;
  683. async->cookie = cookie;
  684. memcpy(async + 1, inbuf, inlen);
  685. spin_lock_bh(&mcdi->async_lock);
  686. if (mcdi->mode == MCDI_MODE_EVENTS) {
  687. list_add_tail(&async->list, &mcdi->async_list);
  688. /* If this is at the front of the queue, try to start it
  689. * immediately
  690. */
  691. if (mcdi->async_list.next == &async->list &&
  692. efx_mcdi_acquire_async(mcdi)) {
  693. efx_mcdi_send_request(efx, cmd, inbuf, inlen);
  694. mod_timer(&mcdi->async_timer,
  695. jiffies + MCDI_RPC_TIMEOUT);
  696. }
  697. } else {
  698. kfree(async);
  699. rc = -ENETDOWN;
  700. }
  701. spin_unlock_bh(&mcdi->async_lock);
  702. return rc;
  703. }
  704. /**
  705. * efx_mcdi_rpc_async - Schedule an MCDI command to run asynchronously
  706. * @efx: NIC through which to issue the command
  707. * @cmd: Command type number
  708. * @inbuf: Command parameters
  709. * @inlen: Length of command parameters, in bytes
  710. * @outlen: Length to allocate for response buffer, in bytes
  711. * @complete: Function to be called on completion or cancellation.
  712. * @cookie: Arbitrary value to be passed to @complete.
  713. *
  714. * This function does not sleep and therefore may be called in atomic
  715. * context. It will fail if event queues are disabled or if MCDI
  716. * event completions have been disabled due to an error.
  717. *
  718. * If it succeeds, the @complete function will be called exactly once
  719. * in atomic context, when one of the following occurs:
  720. * (a) the completion event is received (in NAPI context)
  721. * (b) event queues are disabled (in the process that disables them)
  722. * (c) the request times-out (in timer context)
  723. */
  724. int
  725. efx_mcdi_rpc_async(struct efx_nic *efx, unsigned int cmd,
  726. const efx_dword_t *inbuf, size_t inlen, size_t outlen,
  727. efx_mcdi_async_completer *complete, unsigned long cookie)
  728. {
  729. return _efx_mcdi_rpc_async(efx, cmd, inbuf, inlen, outlen, complete,
  730. cookie, false);
  731. }
  732. int efx_mcdi_rpc_async_quiet(struct efx_nic *efx, unsigned int cmd,
  733. const efx_dword_t *inbuf, size_t inlen,
  734. size_t outlen, efx_mcdi_async_completer *complete,
  735. unsigned long cookie)
  736. {
  737. return _efx_mcdi_rpc_async(efx, cmd, inbuf, inlen, outlen, complete,
  738. cookie, true);
  739. }
  740. int efx_mcdi_rpc_finish(struct efx_nic *efx, unsigned cmd, size_t inlen,
  741. efx_dword_t *outbuf, size_t outlen,
  742. size_t *outlen_actual)
  743. {
  744. return _efx_mcdi_rpc_finish(efx, cmd, inlen, outbuf, outlen,
  745. outlen_actual, false);
  746. }
  747. int efx_mcdi_rpc_finish_quiet(struct efx_nic *efx, unsigned cmd, size_t inlen,
  748. efx_dword_t *outbuf, size_t outlen,
  749. size_t *outlen_actual)
  750. {
  751. return _efx_mcdi_rpc_finish(efx, cmd, inlen, outbuf, outlen,
  752. outlen_actual, true);
  753. }
  754. void efx_mcdi_display_error(struct efx_nic *efx, unsigned cmd,
  755. size_t inlen, efx_dword_t *outbuf,
  756. size_t outlen, int rc)
  757. {
  758. int code = 0, err_arg = 0;
  759. if (outlen >= MC_CMD_ERR_CODE_OFST + 4)
  760. code = MCDI_DWORD(outbuf, ERR_CODE);
  761. if (outlen >= MC_CMD_ERR_ARG_OFST + 4)
  762. err_arg = MCDI_DWORD(outbuf, ERR_ARG);
  763. netif_err(efx, hw, efx->net_dev,
  764. "MC command 0x%x inlen %d failed rc=%d (raw=%d) arg=%d\n",
  765. cmd, (int)inlen, rc, code, err_arg);
  766. }
  767. /* Switch to polled MCDI completions. This can be called in various
  768. * error conditions with various locks held, so it must be lockless.
  769. * Caller is responsible for flushing asynchronous requests later.
  770. */
  771. void efx_mcdi_mode_poll(struct efx_nic *efx)
  772. {
  773. struct efx_mcdi_iface *mcdi;
  774. if (!efx->mcdi)
  775. return;
  776. mcdi = efx_mcdi(efx);
  777. /* If already in polling mode, nothing to do.
  778. * If in fail-fast state, don't switch to polled completion.
  779. * FLR recovery will do that later.
  780. */
  781. if (mcdi->mode == MCDI_MODE_POLL || mcdi->mode == MCDI_MODE_FAIL)
  782. return;
  783. /* We can switch from event completion to polled completion, because
  784. * mcdi requests are always completed in shared memory. We do this by
  785. * switching the mode to POLL'd then completing the request.
  786. * efx_mcdi_await_completion() will then call efx_mcdi_poll().
  787. *
  788. * We need an smp_wmb() to synchronise with efx_mcdi_await_completion(),
  789. * which efx_mcdi_complete_sync() provides for us.
  790. */
  791. mcdi->mode = MCDI_MODE_POLL;
  792. efx_mcdi_complete_sync(mcdi);
  793. }
  794. /* Flush any running or queued asynchronous requests, after event processing
  795. * is stopped
  796. */
  797. void efx_mcdi_flush_async(struct efx_nic *efx)
  798. {
  799. struct efx_mcdi_async_param *async, *next;
  800. struct efx_mcdi_iface *mcdi;
  801. if (!efx->mcdi)
  802. return;
  803. mcdi = efx_mcdi(efx);
  804. /* We must be in poll or fail mode so no more requests can be queued */
  805. BUG_ON(mcdi->mode == MCDI_MODE_EVENTS);
  806. del_timer_sync(&mcdi->async_timer);
  807. /* If a request is still running, make sure we give the MC
  808. * time to complete it so that the response won't overwrite our
  809. * next request.
  810. */
  811. if (mcdi->state == MCDI_STATE_RUNNING_ASYNC) {
  812. efx_mcdi_poll(efx);
  813. mcdi->state = MCDI_STATE_QUIESCENT;
  814. }
  815. /* Nothing else will access the async list now, so it is safe
  816. * to walk it without holding async_lock. If we hold it while
  817. * calling a completer then lockdep may warn that we have
  818. * acquired locks in the wrong order.
  819. */
  820. list_for_each_entry_safe(async, next, &mcdi->async_list, list) {
  821. async->complete(efx, async->cookie, -ENETDOWN, NULL, 0);
  822. list_del(&async->list);
  823. kfree(async);
  824. }
  825. }
  826. void efx_mcdi_mode_event(struct efx_nic *efx)
  827. {
  828. struct efx_mcdi_iface *mcdi;
  829. if (!efx->mcdi)
  830. return;
  831. mcdi = efx_mcdi(efx);
  832. /* If already in event completion mode, nothing to do.
  833. * If in fail-fast state, don't switch to event completion. FLR
  834. * recovery will do that later.
  835. */
  836. if (mcdi->mode == MCDI_MODE_EVENTS || mcdi->mode == MCDI_MODE_FAIL)
  837. return;
  838. /* We can't switch from polled to event completion in the middle of a
  839. * request, because the completion method is specified in the request.
  840. * So acquire the interface to serialise the requestors. We don't need
  841. * to acquire the iface_lock to change the mode here, but we do need a
  842. * write memory barrier ensure that efx_mcdi_rpc() sees it, which
  843. * efx_mcdi_acquire() provides.
  844. */
  845. efx_mcdi_acquire_sync(mcdi);
  846. mcdi->mode = MCDI_MODE_EVENTS;
  847. efx_mcdi_release(mcdi);
  848. }
  849. static void efx_mcdi_ev_death(struct efx_nic *efx, int rc)
  850. {
  851. struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
  852. /* If there is an outstanding MCDI request, it has been terminated
  853. * either by a BADASSERT or REBOOT event. If the mcdi interface is
  854. * in polled mode, then do nothing because the MC reboot handler will
  855. * set the header correctly. However, if the mcdi interface is waiting
  856. * for a CMDDONE event it won't receive it [and since all MCDI events
  857. * are sent to the same queue, we can't be racing with
  858. * efx_mcdi_ev_cpl()]
  859. *
  860. * If there is an outstanding asynchronous request, we can't
  861. * complete it now (efx_mcdi_complete() would deadlock). The
  862. * reset process will take care of this.
  863. *
  864. * There's a race here with efx_mcdi_send_request(), because
  865. * we might receive a REBOOT event *before* the request has
  866. * been copied out. In polled mode (during startup) this is
  867. * irrelevant, because efx_mcdi_complete_sync() is ignored. In
  868. * event mode, this condition is just an edge-case of
  869. * receiving a REBOOT event after posting the MCDI
  870. * request. Did the mc reboot before or after the copyout? The
  871. * best we can do always is just return failure.
  872. */
  873. spin_lock(&mcdi->iface_lock);
  874. if (efx_mcdi_complete_sync(mcdi)) {
  875. if (mcdi->mode == MCDI_MODE_EVENTS) {
  876. mcdi->resprc = rc;
  877. mcdi->resp_hdr_len = 0;
  878. mcdi->resp_data_len = 0;
  879. ++mcdi->credits;
  880. }
  881. } else {
  882. int count;
  883. /* Consume the status word since efx_mcdi_rpc_finish() won't */
  884. for (count = 0; count < MCDI_STATUS_DELAY_COUNT; ++count) {
  885. if (efx_mcdi_poll_reboot(efx))
  886. break;
  887. udelay(MCDI_STATUS_DELAY_US);
  888. }
  889. mcdi->new_epoch = true;
  890. /* Nobody was waiting for an MCDI request, so trigger a reset */
  891. efx_schedule_reset(efx, RESET_TYPE_MC_FAILURE);
  892. }
  893. spin_unlock(&mcdi->iface_lock);
  894. }
  895. /* The MC is going down in to BIST mode. set the BIST flag to block
  896. * new MCDI, cancel any outstanding MCDI and and schedule a BIST-type reset
  897. * (which doesn't actually execute a reset, it waits for the controlling
  898. * function to reset it).
  899. */
  900. static void efx_mcdi_ev_bist(struct efx_nic *efx)
  901. {
  902. struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
  903. spin_lock(&mcdi->iface_lock);
  904. efx->mc_bist_for_other_fn = true;
  905. if (efx_mcdi_complete_sync(mcdi)) {
  906. if (mcdi->mode == MCDI_MODE_EVENTS) {
  907. mcdi->resprc = -EIO;
  908. mcdi->resp_hdr_len = 0;
  909. mcdi->resp_data_len = 0;
  910. ++mcdi->credits;
  911. }
  912. }
  913. mcdi->new_epoch = true;
  914. efx_schedule_reset(efx, RESET_TYPE_MC_BIST);
  915. spin_unlock(&mcdi->iface_lock);
  916. }
  917. /* MCDI timeouts seen, so make all MCDI calls fail-fast and issue an FLR to try
  918. * to recover.
  919. */
  920. static void efx_mcdi_abandon(struct efx_nic *efx)
  921. {
  922. struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
  923. if (xchg(&mcdi->mode, MCDI_MODE_FAIL) == MCDI_MODE_FAIL)
  924. return; /* it had already been done */
  925. netif_dbg(efx, hw, efx->net_dev, "MCDI is timing out; trying to recover\n");
  926. efx_schedule_reset(efx, RESET_TYPE_MCDI_TIMEOUT);
  927. }
  928. /* Called from falcon_process_eventq for MCDI events */
  929. void efx_mcdi_process_event(struct efx_channel *channel,
  930. efx_qword_t *event)
  931. {
  932. struct efx_nic *efx = channel->efx;
  933. int code = EFX_QWORD_FIELD(*event, MCDI_EVENT_CODE);
  934. u32 data = EFX_QWORD_FIELD(*event, MCDI_EVENT_DATA);
  935. switch (code) {
  936. case MCDI_EVENT_CODE_BADSSERT:
  937. netif_err(efx, hw, efx->net_dev,
  938. "MC watchdog or assertion failure at 0x%x\n", data);
  939. efx_mcdi_ev_death(efx, -EINTR);
  940. break;
  941. case MCDI_EVENT_CODE_PMNOTICE:
  942. netif_info(efx, wol, efx->net_dev, "MCDI PM event.\n");
  943. break;
  944. case MCDI_EVENT_CODE_CMDDONE:
  945. efx_mcdi_ev_cpl(efx,
  946. MCDI_EVENT_FIELD(*event, CMDDONE_SEQ),
  947. MCDI_EVENT_FIELD(*event, CMDDONE_DATALEN),
  948. MCDI_EVENT_FIELD(*event, CMDDONE_ERRNO));
  949. break;
  950. case MCDI_EVENT_CODE_LINKCHANGE:
  951. efx_mcdi_process_link_change(efx, event);
  952. break;
  953. case MCDI_EVENT_CODE_SENSOREVT:
  954. efx_mcdi_sensor_event(efx, event);
  955. break;
  956. case MCDI_EVENT_CODE_SCHEDERR:
  957. netif_dbg(efx, hw, efx->net_dev,
  958. "MC Scheduler alert (0x%x)\n", data);
  959. break;
  960. case MCDI_EVENT_CODE_REBOOT:
  961. case MCDI_EVENT_CODE_MC_REBOOT:
  962. netif_info(efx, hw, efx->net_dev, "MC Reboot\n");
  963. efx_mcdi_ev_death(efx, -EIO);
  964. break;
  965. case MCDI_EVENT_CODE_MC_BIST:
  966. netif_info(efx, hw, efx->net_dev, "MC entered BIST mode\n");
  967. efx_mcdi_ev_bist(efx);
  968. break;
  969. case MCDI_EVENT_CODE_MAC_STATS_DMA:
  970. /* MAC stats are gather lazily. We can ignore this. */
  971. break;
  972. case MCDI_EVENT_CODE_FLR:
  973. if (efx->type->sriov_flr)
  974. efx->type->sriov_flr(efx,
  975. MCDI_EVENT_FIELD(*event, FLR_VF));
  976. break;
  977. case MCDI_EVENT_CODE_PTP_RX:
  978. case MCDI_EVENT_CODE_PTP_FAULT:
  979. case MCDI_EVENT_CODE_PTP_PPS:
  980. efx_ptp_event(efx, event);
  981. break;
  982. case MCDI_EVENT_CODE_PTP_TIME:
  983. efx_time_sync_event(channel, event);
  984. break;
  985. case MCDI_EVENT_CODE_TX_FLUSH:
  986. case MCDI_EVENT_CODE_RX_FLUSH:
  987. /* Two flush events will be sent: one to the same event
  988. * queue as completions, and one to event queue 0.
  989. * In the latter case the {RX,TX}_FLUSH_TO_DRIVER
  990. * flag will be set, and we should ignore the event
  991. * because we want to wait for all completions.
  992. */
  993. BUILD_BUG_ON(MCDI_EVENT_TX_FLUSH_TO_DRIVER_LBN !=
  994. MCDI_EVENT_RX_FLUSH_TO_DRIVER_LBN);
  995. if (!MCDI_EVENT_FIELD(*event, TX_FLUSH_TO_DRIVER))
  996. efx_ef10_handle_drain_event(efx);
  997. break;
  998. case MCDI_EVENT_CODE_TX_ERR:
  999. case MCDI_EVENT_CODE_RX_ERR:
  1000. netif_err(efx, hw, efx->net_dev,
  1001. "%s DMA error (event: "EFX_QWORD_FMT")\n",
  1002. code == MCDI_EVENT_CODE_TX_ERR ? "TX" : "RX",
  1003. EFX_QWORD_VAL(*event));
  1004. efx_schedule_reset(efx, RESET_TYPE_DMA_ERROR);
  1005. break;
  1006. default:
  1007. netif_err(efx, hw, efx->net_dev, "Unknown MCDI event 0x%x\n",
  1008. code);
  1009. }
  1010. }
  1011. /**************************************************************************
  1012. *
  1013. * Specific request functions
  1014. *
  1015. **************************************************************************
  1016. */
  1017. void efx_mcdi_print_fwver(struct efx_nic *efx, char *buf, size_t len)
  1018. {
  1019. MCDI_DECLARE_BUF(outbuf, MC_CMD_GET_VERSION_OUT_LEN);
  1020. size_t outlength;
  1021. const __le16 *ver_words;
  1022. size_t offset;
  1023. int rc;
  1024. BUILD_BUG_ON(MC_CMD_GET_VERSION_IN_LEN != 0);
  1025. rc = efx_mcdi_rpc(efx, MC_CMD_GET_VERSION, NULL, 0,
  1026. outbuf, sizeof(outbuf), &outlength);
  1027. if (rc)
  1028. goto fail;
  1029. if (outlength < MC_CMD_GET_VERSION_OUT_LEN) {
  1030. rc = -EIO;
  1031. goto fail;
  1032. }
  1033. ver_words = (__le16 *)MCDI_PTR(outbuf, GET_VERSION_OUT_VERSION);
  1034. offset = snprintf(buf, len, "%u.%u.%u.%u",
  1035. le16_to_cpu(ver_words[0]), le16_to_cpu(ver_words[1]),
  1036. le16_to_cpu(ver_words[2]), le16_to_cpu(ver_words[3]));
  1037. /* EF10 may have multiple datapath firmware variants within a
  1038. * single version. Report which variants are running.
  1039. */
  1040. if (efx_nic_rev(efx) >= EFX_REV_HUNT_A0) {
  1041. struct efx_ef10_nic_data *nic_data = efx->nic_data;
  1042. offset += snprintf(buf + offset, len - offset, " rx%x tx%x",
  1043. nic_data->rx_dpcpu_fw_id,
  1044. nic_data->tx_dpcpu_fw_id);
  1045. /* It's theoretically possible for the string to exceed 31
  1046. * characters, though in practice the first three version
  1047. * components are short enough that this doesn't happen.
  1048. */
  1049. if (WARN_ON(offset >= len))
  1050. buf[0] = 0;
  1051. }
  1052. return;
  1053. fail:
  1054. netif_err(efx, probe, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
  1055. buf[0] = 0;
  1056. }
  1057. static int efx_mcdi_drv_attach(struct efx_nic *efx, bool driver_operating,
  1058. bool *was_attached)
  1059. {
  1060. MCDI_DECLARE_BUF(inbuf, MC_CMD_DRV_ATTACH_IN_LEN);
  1061. MCDI_DECLARE_BUF(outbuf, MC_CMD_DRV_ATTACH_EXT_OUT_LEN);
  1062. size_t outlen;
  1063. int rc;
  1064. MCDI_SET_DWORD(inbuf, DRV_ATTACH_IN_NEW_STATE,
  1065. driver_operating ? 1 : 0);
  1066. MCDI_SET_DWORD(inbuf, DRV_ATTACH_IN_UPDATE, 1);
  1067. MCDI_SET_DWORD(inbuf, DRV_ATTACH_IN_FIRMWARE_ID, MC_CMD_FW_LOW_LATENCY);
  1068. rc = efx_mcdi_rpc_quiet(efx, MC_CMD_DRV_ATTACH, inbuf, sizeof(inbuf),
  1069. outbuf, sizeof(outbuf), &outlen);
  1070. /* If we're not the primary PF, trying to ATTACH with a FIRMWARE_ID
  1071. * specified will fail with EPERM, and we have to tell the MC we don't
  1072. * care what firmware we get.
  1073. */
  1074. if (rc == -EPERM) {
  1075. netif_dbg(efx, probe, efx->net_dev,
  1076. "efx_mcdi_drv_attach with fw-variant setting failed EPERM, trying without it\n");
  1077. MCDI_SET_DWORD(inbuf, DRV_ATTACH_IN_FIRMWARE_ID,
  1078. MC_CMD_FW_DONT_CARE);
  1079. rc = efx_mcdi_rpc_quiet(efx, MC_CMD_DRV_ATTACH, inbuf,
  1080. sizeof(inbuf), outbuf, sizeof(outbuf),
  1081. &outlen);
  1082. }
  1083. if (rc) {
  1084. efx_mcdi_display_error(efx, MC_CMD_DRV_ATTACH, sizeof(inbuf),
  1085. outbuf, outlen, rc);
  1086. goto fail;
  1087. }
  1088. if (outlen < MC_CMD_DRV_ATTACH_OUT_LEN) {
  1089. rc = -EIO;
  1090. goto fail;
  1091. }
  1092. if (driver_operating) {
  1093. if (outlen >= MC_CMD_DRV_ATTACH_EXT_OUT_LEN) {
  1094. efx->mcdi->fn_flags =
  1095. MCDI_DWORD(outbuf,
  1096. DRV_ATTACH_EXT_OUT_FUNC_FLAGS);
  1097. } else {
  1098. /* Synthesise flags for Siena */
  1099. efx->mcdi->fn_flags =
  1100. 1 << MC_CMD_DRV_ATTACH_EXT_OUT_FLAG_LINKCTRL |
  1101. 1 << MC_CMD_DRV_ATTACH_EXT_OUT_FLAG_TRUSTED |
  1102. (efx_port_num(efx) == 0) <<
  1103. MC_CMD_DRV_ATTACH_EXT_OUT_FLAG_PRIMARY;
  1104. }
  1105. }
  1106. /* We currently assume we have control of the external link
  1107. * and are completely trusted by firmware. Abort probing
  1108. * if that's not true for this function.
  1109. */
  1110. if (was_attached != NULL)
  1111. *was_attached = MCDI_DWORD(outbuf, DRV_ATTACH_OUT_OLD_STATE);
  1112. return 0;
  1113. fail:
  1114. netif_err(efx, probe, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
  1115. return rc;
  1116. }
  1117. int efx_mcdi_get_board_cfg(struct efx_nic *efx, u8 *mac_address,
  1118. u16 *fw_subtype_list, u32 *capabilities)
  1119. {
  1120. MCDI_DECLARE_BUF(outbuf, MC_CMD_GET_BOARD_CFG_OUT_LENMAX);
  1121. size_t outlen, i;
  1122. int port_num = efx_port_num(efx);
  1123. int rc;
  1124. BUILD_BUG_ON(MC_CMD_GET_BOARD_CFG_IN_LEN != 0);
  1125. /* we need __aligned(2) for ether_addr_copy */
  1126. BUILD_BUG_ON(MC_CMD_GET_BOARD_CFG_OUT_MAC_ADDR_BASE_PORT0_OFST & 1);
  1127. BUILD_BUG_ON(MC_CMD_GET_BOARD_CFG_OUT_MAC_ADDR_BASE_PORT1_OFST & 1);
  1128. rc = efx_mcdi_rpc(efx, MC_CMD_GET_BOARD_CFG, NULL, 0,
  1129. outbuf, sizeof(outbuf), &outlen);
  1130. if (rc)
  1131. goto fail;
  1132. if (outlen < MC_CMD_GET_BOARD_CFG_OUT_LENMIN) {
  1133. rc = -EIO;
  1134. goto fail;
  1135. }
  1136. if (mac_address)
  1137. ether_addr_copy(mac_address,
  1138. port_num ?
  1139. MCDI_PTR(outbuf, GET_BOARD_CFG_OUT_MAC_ADDR_BASE_PORT1) :
  1140. MCDI_PTR(outbuf, GET_BOARD_CFG_OUT_MAC_ADDR_BASE_PORT0));
  1141. if (fw_subtype_list) {
  1142. for (i = 0;
  1143. i < MCDI_VAR_ARRAY_LEN(outlen,
  1144. GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST);
  1145. i++)
  1146. fw_subtype_list[i] = MCDI_ARRAY_WORD(
  1147. outbuf, GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST, i);
  1148. for (; i < MC_CMD_GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST_MAXNUM; i++)
  1149. fw_subtype_list[i] = 0;
  1150. }
  1151. if (capabilities) {
  1152. if (port_num)
  1153. *capabilities = MCDI_DWORD(outbuf,
  1154. GET_BOARD_CFG_OUT_CAPABILITIES_PORT1);
  1155. else
  1156. *capabilities = MCDI_DWORD(outbuf,
  1157. GET_BOARD_CFG_OUT_CAPABILITIES_PORT0);
  1158. }
  1159. return 0;
  1160. fail:
  1161. netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d len=%d\n",
  1162. __func__, rc, (int)outlen);
  1163. return rc;
  1164. }
  1165. int efx_mcdi_log_ctrl(struct efx_nic *efx, bool evq, bool uart, u32 dest_evq)
  1166. {
  1167. MCDI_DECLARE_BUF(inbuf, MC_CMD_LOG_CTRL_IN_LEN);
  1168. u32 dest = 0;
  1169. int rc;
  1170. if (uart)
  1171. dest |= MC_CMD_LOG_CTRL_IN_LOG_DEST_UART;
  1172. if (evq)
  1173. dest |= MC_CMD_LOG_CTRL_IN_LOG_DEST_EVQ;
  1174. MCDI_SET_DWORD(inbuf, LOG_CTRL_IN_LOG_DEST, dest);
  1175. MCDI_SET_DWORD(inbuf, LOG_CTRL_IN_LOG_DEST_EVQ, dest_evq);
  1176. BUILD_BUG_ON(MC_CMD_LOG_CTRL_OUT_LEN != 0);
  1177. rc = efx_mcdi_rpc(efx, MC_CMD_LOG_CTRL, inbuf, sizeof(inbuf),
  1178. NULL, 0, NULL);
  1179. return rc;
  1180. }
  1181. int efx_mcdi_nvram_types(struct efx_nic *efx, u32 *nvram_types_out)
  1182. {
  1183. MCDI_DECLARE_BUF(outbuf, MC_CMD_NVRAM_TYPES_OUT_LEN);
  1184. size_t outlen;
  1185. int rc;
  1186. BUILD_BUG_ON(MC_CMD_NVRAM_TYPES_IN_LEN != 0);
  1187. rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_TYPES, NULL, 0,
  1188. outbuf, sizeof(outbuf), &outlen);
  1189. if (rc)
  1190. goto fail;
  1191. if (outlen < MC_CMD_NVRAM_TYPES_OUT_LEN) {
  1192. rc = -EIO;
  1193. goto fail;
  1194. }
  1195. *nvram_types_out = MCDI_DWORD(outbuf, NVRAM_TYPES_OUT_TYPES);
  1196. return 0;
  1197. fail:
  1198. netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n",
  1199. __func__, rc);
  1200. return rc;
  1201. }
  1202. int efx_mcdi_nvram_info(struct efx_nic *efx, unsigned int type,
  1203. size_t *size_out, size_t *erase_size_out,
  1204. bool *protected_out)
  1205. {
  1206. MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_INFO_IN_LEN);
  1207. MCDI_DECLARE_BUF(outbuf, MC_CMD_NVRAM_INFO_OUT_LEN);
  1208. size_t outlen;
  1209. int rc;
  1210. MCDI_SET_DWORD(inbuf, NVRAM_INFO_IN_TYPE, type);
  1211. rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_INFO, inbuf, sizeof(inbuf),
  1212. outbuf, sizeof(outbuf), &outlen);
  1213. if (rc)
  1214. goto fail;
  1215. if (outlen < MC_CMD_NVRAM_INFO_OUT_LEN) {
  1216. rc = -EIO;
  1217. goto fail;
  1218. }
  1219. *size_out = MCDI_DWORD(outbuf, NVRAM_INFO_OUT_SIZE);
  1220. *erase_size_out = MCDI_DWORD(outbuf, NVRAM_INFO_OUT_ERASESIZE);
  1221. *protected_out = !!(MCDI_DWORD(outbuf, NVRAM_INFO_OUT_FLAGS) &
  1222. (1 << MC_CMD_NVRAM_INFO_OUT_PROTECTED_LBN));
  1223. return 0;
  1224. fail:
  1225. netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
  1226. return rc;
  1227. }
  1228. static int efx_mcdi_nvram_test(struct efx_nic *efx, unsigned int type)
  1229. {
  1230. MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_TEST_IN_LEN);
  1231. MCDI_DECLARE_BUF(outbuf, MC_CMD_NVRAM_TEST_OUT_LEN);
  1232. int rc;
  1233. MCDI_SET_DWORD(inbuf, NVRAM_TEST_IN_TYPE, type);
  1234. rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_TEST, inbuf, sizeof(inbuf),
  1235. outbuf, sizeof(outbuf), NULL);
  1236. if (rc)
  1237. return rc;
  1238. switch (MCDI_DWORD(outbuf, NVRAM_TEST_OUT_RESULT)) {
  1239. case MC_CMD_NVRAM_TEST_PASS:
  1240. case MC_CMD_NVRAM_TEST_NOTSUPP:
  1241. return 0;
  1242. default:
  1243. return -EIO;
  1244. }
  1245. }
  1246. int efx_mcdi_nvram_test_all(struct efx_nic *efx)
  1247. {
  1248. u32 nvram_types;
  1249. unsigned int type;
  1250. int rc;
  1251. rc = efx_mcdi_nvram_types(efx, &nvram_types);
  1252. if (rc)
  1253. goto fail1;
  1254. type = 0;
  1255. while (nvram_types != 0) {
  1256. if (nvram_types & 1) {
  1257. rc = efx_mcdi_nvram_test(efx, type);
  1258. if (rc)
  1259. goto fail2;
  1260. }
  1261. type++;
  1262. nvram_types >>= 1;
  1263. }
  1264. return 0;
  1265. fail2:
  1266. netif_err(efx, hw, efx->net_dev, "%s: failed type=%u\n",
  1267. __func__, type);
  1268. fail1:
  1269. netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
  1270. return rc;
  1271. }
  1272. /* Returns 1 if an assertion was read, 0 if no assertion had fired,
  1273. * negative on error.
  1274. */
  1275. static int efx_mcdi_read_assertion(struct efx_nic *efx)
  1276. {
  1277. MCDI_DECLARE_BUF(inbuf, MC_CMD_GET_ASSERTS_IN_LEN);
  1278. MCDI_DECLARE_BUF(outbuf, MC_CMD_GET_ASSERTS_OUT_LEN);
  1279. unsigned int flags, index;
  1280. const char *reason;
  1281. size_t outlen;
  1282. int retry;
  1283. int rc;
  1284. /* Attempt to read any stored assertion state before we reboot
  1285. * the mcfw out of the assertion handler. Retry twice, once
  1286. * because a boot-time assertion might cause this command to fail
  1287. * with EINTR. And once again because GET_ASSERTS can race with
  1288. * MC_CMD_REBOOT running on the other port. */
  1289. retry = 2;
  1290. do {
  1291. MCDI_SET_DWORD(inbuf, GET_ASSERTS_IN_CLEAR, 1);
  1292. rc = efx_mcdi_rpc_quiet(efx, MC_CMD_GET_ASSERTS,
  1293. inbuf, MC_CMD_GET_ASSERTS_IN_LEN,
  1294. outbuf, sizeof(outbuf), &outlen);
  1295. if (rc == -EPERM)
  1296. return 0;
  1297. } while ((rc == -EINTR || rc == -EIO) && retry-- > 0);
  1298. if (rc) {
  1299. efx_mcdi_display_error(efx, MC_CMD_GET_ASSERTS,
  1300. MC_CMD_GET_ASSERTS_IN_LEN, outbuf,
  1301. outlen, rc);
  1302. return rc;
  1303. }
  1304. if (outlen < MC_CMD_GET_ASSERTS_OUT_LEN)
  1305. return -EIO;
  1306. /* Print out any recorded assertion state */
  1307. flags = MCDI_DWORD(outbuf, GET_ASSERTS_OUT_GLOBAL_FLAGS);
  1308. if (flags == MC_CMD_GET_ASSERTS_FLAGS_NO_FAILS)
  1309. return 0;
  1310. reason = (flags == MC_CMD_GET_ASSERTS_FLAGS_SYS_FAIL)
  1311. ? "system-level assertion"
  1312. : (flags == MC_CMD_GET_ASSERTS_FLAGS_THR_FAIL)
  1313. ? "thread-level assertion"
  1314. : (flags == MC_CMD_GET_ASSERTS_FLAGS_WDOG_FIRED)
  1315. ? "watchdog reset"
  1316. : "unknown assertion";
  1317. netif_err(efx, hw, efx->net_dev,
  1318. "MCPU %s at PC = 0x%.8x in thread 0x%.8x\n", reason,
  1319. MCDI_DWORD(outbuf, GET_ASSERTS_OUT_SAVED_PC_OFFS),
  1320. MCDI_DWORD(outbuf, GET_ASSERTS_OUT_THREAD_OFFS));
  1321. /* Print out the registers */
  1322. for (index = 0;
  1323. index < MC_CMD_GET_ASSERTS_OUT_GP_REGS_OFFS_NUM;
  1324. index++)
  1325. netif_err(efx, hw, efx->net_dev, "R%.2d (?): 0x%.8x\n",
  1326. 1 + index,
  1327. MCDI_ARRAY_DWORD(outbuf, GET_ASSERTS_OUT_GP_REGS_OFFS,
  1328. index));
  1329. return 1;
  1330. }
  1331. static int efx_mcdi_exit_assertion(struct efx_nic *efx)
  1332. {
  1333. MCDI_DECLARE_BUF(inbuf, MC_CMD_REBOOT_IN_LEN);
  1334. int rc;
  1335. /* If the MC is running debug firmware, it might now be
  1336. * waiting for a debugger to attach, but we just want it to
  1337. * reboot. We set a flag that makes the command a no-op if it
  1338. * has already done so.
  1339. * The MCDI will thus return either 0 or -EIO.
  1340. */
  1341. BUILD_BUG_ON(MC_CMD_REBOOT_OUT_LEN != 0);
  1342. MCDI_SET_DWORD(inbuf, REBOOT_IN_FLAGS,
  1343. MC_CMD_REBOOT_FLAGS_AFTER_ASSERTION);
  1344. rc = efx_mcdi_rpc_quiet(efx, MC_CMD_REBOOT, inbuf, MC_CMD_REBOOT_IN_LEN,
  1345. NULL, 0, NULL);
  1346. if (rc == -EIO)
  1347. rc = 0;
  1348. if (rc)
  1349. efx_mcdi_display_error(efx, MC_CMD_REBOOT, MC_CMD_REBOOT_IN_LEN,
  1350. NULL, 0, rc);
  1351. return rc;
  1352. }
  1353. int efx_mcdi_handle_assertion(struct efx_nic *efx)
  1354. {
  1355. int rc;
  1356. rc = efx_mcdi_read_assertion(efx);
  1357. if (rc <= 0)
  1358. return rc;
  1359. return efx_mcdi_exit_assertion(efx);
  1360. }
  1361. void efx_mcdi_set_id_led(struct efx_nic *efx, enum efx_led_mode mode)
  1362. {
  1363. MCDI_DECLARE_BUF(inbuf, MC_CMD_SET_ID_LED_IN_LEN);
  1364. int rc;
  1365. BUILD_BUG_ON(EFX_LED_OFF != MC_CMD_LED_OFF);
  1366. BUILD_BUG_ON(EFX_LED_ON != MC_CMD_LED_ON);
  1367. BUILD_BUG_ON(EFX_LED_DEFAULT != MC_CMD_LED_DEFAULT);
  1368. BUILD_BUG_ON(MC_CMD_SET_ID_LED_OUT_LEN != 0);
  1369. MCDI_SET_DWORD(inbuf, SET_ID_LED_IN_STATE, mode);
  1370. rc = efx_mcdi_rpc(efx, MC_CMD_SET_ID_LED, inbuf, sizeof(inbuf),
  1371. NULL, 0, NULL);
  1372. }
  1373. static int efx_mcdi_reset_func(struct efx_nic *efx)
  1374. {
  1375. MCDI_DECLARE_BUF(inbuf, MC_CMD_ENTITY_RESET_IN_LEN);
  1376. int rc;
  1377. BUILD_BUG_ON(MC_CMD_ENTITY_RESET_OUT_LEN != 0);
  1378. MCDI_POPULATE_DWORD_1(inbuf, ENTITY_RESET_IN_FLAG,
  1379. ENTITY_RESET_IN_FUNCTION_RESOURCE_RESET, 1);
  1380. rc = efx_mcdi_rpc(efx, MC_CMD_ENTITY_RESET, inbuf, sizeof(inbuf),
  1381. NULL, 0, NULL);
  1382. return rc;
  1383. }
  1384. static int efx_mcdi_reset_mc(struct efx_nic *efx)
  1385. {
  1386. MCDI_DECLARE_BUF(inbuf, MC_CMD_REBOOT_IN_LEN);
  1387. int rc;
  1388. BUILD_BUG_ON(MC_CMD_REBOOT_OUT_LEN != 0);
  1389. MCDI_SET_DWORD(inbuf, REBOOT_IN_FLAGS, 0);
  1390. rc = efx_mcdi_rpc(efx, MC_CMD_REBOOT, inbuf, sizeof(inbuf),
  1391. NULL, 0, NULL);
  1392. /* White is black, and up is down */
  1393. if (rc == -EIO)
  1394. return 0;
  1395. if (rc == 0)
  1396. rc = -EIO;
  1397. return rc;
  1398. }
  1399. enum reset_type efx_mcdi_map_reset_reason(enum reset_type reason)
  1400. {
  1401. return RESET_TYPE_RECOVER_OR_ALL;
  1402. }
  1403. int efx_mcdi_reset(struct efx_nic *efx, enum reset_type method)
  1404. {
  1405. int rc;
  1406. /* If MCDI is down, we can't handle_assertion */
  1407. if (method == RESET_TYPE_MCDI_TIMEOUT) {
  1408. rc = pci_reset_function(efx->pci_dev);
  1409. if (rc)
  1410. return rc;
  1411. /* Re-enable polled MCDI completion */
  1412. if (efx->mcdi) {
  1413. struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
  1414. mcdi->mode = MCDI_MODE_POLL;
  1415. }
  1416. return 0;
  1417. }
  1418. /* Recover from a failed assertion pre-reset */
  1419. rc = efx_mcdi_handle_assertion(efx);
  1420. if (rc)
  1421. return rc;
  1422. if (method == RESET_TYPE_DATAPATH)
  1423. return 0;
  1424. else if (method == RESET_TYPE_WORLD)
  1425. return efx_mcdi_reset_mc(efx);
  1426. else
  1427. return efx_mcdi_reset_func(efx);
  1428. }
  1429. static int efx_mcdi_wol_filter_set(struct efx_nic *efx, u32 type,
  1430. const u8 *mac, int *id_out)
  1431. {
  1432. MCDI_DECLARE_BUF(inbuf, MC_CMD_WOL_FILTER_SET_IN_LEN);
  1433. MCDI_DECLARE_BUF(outbuf, MC_CMD_WOL_FILTER_SET_OUT_LEN);
  1434. size_t outlen;
  1435. int rc;
  1436. MCDI_SET_DWORD(inbuf, WOL_FILTER_SET_IN_WOL_TYPE, type);
  1437. MCDI_SET_DWORD(inbuf, WOL_FILTER_SET_IN_FILTER_MODE,
  1438. MC_CMD_FILTER_MODE_SIMPLE);
  1439. ether_addr_copy(MCDI_PTR(inbuf, WOL_FILTER_SET_IN_MAGIC_MAC), mac);
  1440. rc = efx_mcdi_rpc(efx, MC_CMD_WOL_FILTER_SET, inbuf, sizeof(inbuf),
  1441. outbuf, sizeof(outbuf), &outlen);
  1442. if (rc)
  1443. goto fail;
  1444. if (outlen < MC_CMD_WOL_FILTER_SET_OUT_LEN) {
  1445. rc = -EIO;
  1446. goto fail;
  1447. }
  1448. *id_out = (int)MCDI_DWORD(outbuf, WOL_FILTER_SET_OUT_FILTER_ID);
  1449. return 0;
  1450. fail:
  1451. *id_out = -1;
  1452. netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
  1453. return rc;
  1454. }
  1455. int
  1456. efx_mcdi_wol_filter_set_magic(struct efx_nic *efx, const u8 *mac, int *id_out)
  1457. {
  1458. return efx_mcdi_wol_filter_set(efx, MC_CMD_WOL_TYPE_MAGIC, mac, id_out);
  1459. }
  1460. int efx_mcdi_wol_filter_get_magic(struct efx_nic *efx, int *id_out)
  1461. {
  1462. MCDI_DECLARE_BUF(outbuf, MC_CMD_WOL_FILTER_GET_OUT_LEN);
  1463. size_t outlen;
  1464. int rc;
  1465. rc = efx_mcdi_rpc(efx, MC_CMD_WOL_FILTER_GET, NULL, 0,
  1466. outbuf, sizeof(outbuf), &outlen);
  1467. if (rc)
  1468. goto fail;
  1469. if (outlen < MC_CMD_WOL_FILTER_GET_OUT_LEN) {
  1470. rc = -EIO;
  1471. goto fail;
  1472. }
  1473. *id_out = (int)MCDI_DWORD(outbuf, WOL_FILTER_GET_OUT_FILTER_ID);
  1474. return 0;
  1475. fail:
  1476. *id_out = -1;
  1477. netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
  1478. return rc;
  1479. }
  1480. int efx_mcdi_wol_filter_remove(struct efx_nic *efx, int id)
  1481. {
  1482. MCDI_DECLARE_BUF(inbuf, MC_CMD_WOL_FILTER_REMOVE_IN_LEN);
  1483. int rc;
  1484. MCDI_SET_DWORD(inbuf, WOL_FILTER_REMOVE_IN_FILTER_ID, (u32)id);
  1485. rc = efx_mcdi_rpc(efx, MC_CMD_WOL_FILTER_REMOVE, inbuf, sizeof(inbuf),
  1486. NULL, 0, NULL);
  1487. return rc;
  1488. }
  1489. int efx_mcdi_flush_rxqs(struct efx_nic *efx)
  1490. {
  1491. struct efx_channel *channel;
  1492. struct efx_rx_queue *rx_queue;
  1493. MCDI_DECLARE_BUF(inbuf,
  1494. MC_CMD_FLUSH_RX_QUEUES_IN_LEN(EFX_MAX_CHANNELS));
  1495. int rc, count;
  1496. BUILD_BUG_ON(EFX_MAX_CHANNELS >
  1497. MC_CMD_FLUSH_RX_QUEUES_IN_QID_OFST_MAXNUM);
  1498. count = 0;
  1499. efx_for_each_channel(channel, efx) {
  1500. efx_for_each_channel_rx_queue(rx_queue, channel) {
  1501. if (rx_queue->flush_pending) {
  1502. rx_queue->flush_pending = false;
  1503. atomic_dec(&efx->rxq_flush_pending);
  1504. MCDI_SET_ARRAY_DWORD(
  1505. inbuf, FLUSH_RX_QUEUES_IN_QID_OFST,
  1506. count, efx_rx_queue_index(rx_queue));
  1507. count++;
  1508. }
  1509. }
  1510. }
  1511. rc = efx_mcdi_rpc(efx, MC_CMD_FLUSH_RX_QUEUES, inbuf,
  1512. MC_CMD_FLUSH_RX_QUEUES_IN_LEN(count), NULL, 0, NULL);
  1513. WARN_ON(rc < 0);
  1514. return rc;
  1515. }
  1516. int efx_mcdi_wol_filter_reset(struct efx_nic *efx)
  1517. {
  1518. int rc;
  1519. rc = efx_mcdi_rpc(efx, MC_CMD_WOL_FILTER_RESET, NULL, 0, NULL, 0, NULL);
  1520. return rc;
  1521. }
  1522. int efx_mcdi_set_workaround(struct efx_nic *efx, u32 type, bool enabled,
  1523. unsigned int *flags)
  1524. {
  1525. MCDI_DECLARE_BUF(inbuf, MC_CMD_WORKAROUND_IN_LEN);
  1526. MCDI_DECLARE_BUF(outbuf, MC_CMD_WORKAROUND_EXT_OUT_LEN);
  1527. size_t outlen;
  1528. int rc;
  1529. BUILD_BUG_ON(MC_CMD_WORKAROUND_OUT_LEN != 0);
  1530. MCDI_SET_DWORD(inbuf, WORKAROUND_IN_TYPE, type);
  1531. MCDI_SET_DWORD(inbuf, WORKAROUND_IN_ENABLED, enabled);
  1532. rc = efx_mcdi_rpc(efx, MC_CMD_WORKAROUND, inbuf, sizeof(inbuf),
  1533. outbuf, sizeof(outbuf), &outlen);
  1534. if (rc)
  1535. return rc;
  1536. if (!flags)
  1537. return 0;
  1538. if (outlen >= MC_CMD_WORKAROUND_EXT_OUT_LEN)
  1539. *flags = MCDI_DWORD(outbuf, WORKAROUND_EXT_OUT_FLAGS);
  1540. else
  1541. *flags = 0;
  1542. return 0;
  1543. }
  1544. int efx_mcdi_get_workarounds(struct efx_nic *efx, unsigned int *impl_out,
  1545. unsigned int *enabled_out)
  1546. {
  1547. MCDI_DECLARE_BUF(outbuf, MC_CMD_GET_WORKAROUNDS_OUT_LEN);
  1548. size_t outlen;
  1549. int rc;
  1550. rc = efx_mcdi_rpc(efx, MC_CMD_GET_WORKAROUNDS, NULL, 0,
  1551. outbuf, sizeof(outbuf), &outlen);
  1552. if (rc)
  1553. goto fail;
  1554. if (outlen < MC_CMD_GET_WORKAROUNDS_OUT_LEN) {
  1555. rc = -EIO;
  1556. goto fail;
  1557. }
  1558. if (impl_out)
  1559. *impl_out = MCDI_DWORD(outbuf, GET_WORKAROUNDS_OUT_IMPLEMENTED);
  1560. if (enabled_out)
  1561. *enabled_out = MCDI_DWORD(outbuf, GET_WORKAROUNDS_OUT_ENABLED);
  1562. return 0;
  1563. fail:
  1564. /* Older firmware lacks GET_WORKAROUNDS and this isn't especially
  1565. * terrifying. The call site will have to deal with it though.
  1566. */
  1567. netif_printk(efx, hw, rc == -ENOSYS ? KERN_DEBUG : KERN_ERR,
  1568. efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
  1569. return rc;
  1570. }
  1571. #ifdef CONFIG_SFC_MTD
  1572. #define EFX_MCDI_NVRAM_LEN_MAX 128
  1573. static int efx_mcdi_nvram_update_start(struct efx_nic *efx, unsigned int type)
  1574. {
  1575. MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_UPDATE_START_IN_LEN);
  1576. int rc;
  1577. MCDI_SET_DWORD(inbuf, NVRAM_UPDATE_START_IN_TYPE, type);
  1578. BUILD_BUG_ON(MC_CMD_NVRAM_UPDATE_START_OUT_LEN != 0);
  1579. rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_UPDATE_START, inbuf, sizeof(inbuf),
  1580. NULL, 0, NULL);
  1581. return rc;
  1582. }
  1583. static int efx_mcdi_nvram_read(struct efx_nic *efx, unsigned int type,
  1584. loff_t offset, u8 *buffer, size_t length)
  1585. {
  1586. MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_READ_IN_LEN);
  1587. MCDI_DECLARE_BUF(outbuf,
  1588. MC_CMD_NVRAM_READ_OUT_LEN(EFX_MCDI_NVRAM_LEN_MAX));
  1589. size_t outlen;
  1590. int rc;
  1591. MCDI_SET_DWORD(inbuf, NVRAM_READ_IN_TYPE, type);
  1592. MCDI_SET_DWORD(inbuf, NVRAM_READ_IN_OFFSET, offset);
  1593. MCDI_SET_DWORD(inbuf, NVRAM_READ_IN_LENGTH, length);
  1594. rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_READ, inbuf, sizeof(inbuf),
  1595. outbuf, sizeof(outbuf), &outlen);
  1596. if (rc)
  1597. return rc;
  1598. memcpy(buffer, MCDI_PTR(outbuf, NVRAM_READ_OUT_READ_BUFFER), length);
  1599. return 0;
  1600. }
  1601. static int efx_mcdi_nvram_write(struct efx_nic *efx, unsigned int type,
  1602. loff_t offset, const u8 *buffer, size_t length)
  1603. {
  1604. MCDI_DECLARE_BUF(inbuf,
  1605. MC_CMD_NVRAM_WRITE_IN_LEN(EFX_MCDI_NVRAM_LEN_MAX));
  1606. int rc;
  1607. MCDI_SET_DWORD(inbuf, NVRAM_WRITE_IN_TYPE, type);
  1608. MCDI_SET_DWORD(inbuf, NVRAM_WRITE_IN_OFFSET, offset);
  1609. MCDI_SET_DWORD(inbuf, NVRAM_WRITE_IN_LENGTH, length);
  1610. memcpy(MCDI_PTR(inbuf, NVRAM_WRITE_IN_WRITE_BUFFER), buffer, length);
  1611. BUILD_BUG_ON(MC_CMD_NVRAM_WRITE_OUT_LEN != 0);
  1612. rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_WRITE, inbuf,
  1613. ALIGN(MC_CMD_NVRAM_WRITE_IN_LEN(length), 4),
  1614. NULL, 0, NULL);
  1615. return rc;
  1616. }
  1617. static int efx_mcdi_nvram_erase(struct efx_nic *efx, unsigned int type,
  1618. loff_t offset, size_t length)
  1619. {
  1620. MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_ERASE_IN_LEN);
  1621. int rc;
  1622. MCDI_SET_DWORD(inbuf, NVRAM_ERASE_IN_TYPE, type);
  1623. MCDI_SET_DWORD(inbuf, NVRAM_ERASE_IN_OFFSET, offset);
  1624. MCDI_SET_DWORD(inbuf, NVRAM_ERASE_IN_LENGTH, length);
  1625. BUILD_BUG_ON(MC_CMD_NVRAM_ERASE_OUT_LEN != 0);
  1626. rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_ERASE, inbuf, sizeof(inbuf),
  1627. NULL, 0, NULL);
  1628. return rc;
  1629. }
  1630. static int efx_mcdi_nvram_update_finish(struct efx_nic *efx, unsigned int type)
  1631. {
  1632. MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_UPDATE_FINISH_IN_LEN);
  1633. int rc;
  1634. MCDI_SET_DWORD(inbuf, NVRAM_UPDATE_FINISH_IN_TYPE, type);
  1635. BUILD_BUG_ON(MC_CMD_NVRAM_UPDATE_FINISH_OUT_LEN != 0);
  1636. rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_UPDATE_FINISH, inbuf, sizeof(inbuf),
  1637. NULL, 0, NULL);
  1638. return rc;
  1639. }
  1640. int efx_mcdi_mtd_read(struct mtd_info *mtd, loff_t start,
  1641. size_t len, size_t *retlen, u8 *buffer)
  1642. {
  1643. struct efx_mcdi_mtd_partition *part = to_efx_mcdi_mtd_partition(mtd);
  1644. struct efx_nic *efx = mtd->priv;
  1645. loff_t offset = start;
  1646. loff_t end = min_t(loff_t, start + len, mtd->size);
  1647. size_t chunk;
  1648. int rc = 0;
  1649. while (offset < end) {
  1650. chunk = min_t(size_t, end - offset, EFX_MCDI_NVRAM_LEN_MAX);
  1651. rc = efx_mcdi_nvram_read(efx, part->nvram_type, offset,
  1652. buffer, chunk);
  1653. if (rc)
  1654. goto out;
  1655. offset += chunk;
  1656. buffer += chunk;
  1657. }
  1658. out:
  1659. *retlen = offset - start;
  1660. return rc;
  1661. }
  1662. int efx_mcdi_mtd_erase(struct mtd_info *mtd, loff_t start, size_t len)
  1663. {
  1664. struct efx_mcdi_mtd_partition *part = to_efx_mcdi_mtd_partition(mtd);
  1665. struct efx_nic *efx = mtd->priv;
  1666. loff_t offset = start & ~((loff_t)(mtd->erasesize - 1));
  1667. loff_t end = min_t(loff_t, start + len, mtd->size);
  1668. size_t chunk = part->common.mtd.erasesize;
  1669. int rc = 0;
  1670. if (!part->updating) {
  1671. rc = efx_mcdi_nvram_update_start(efx, part->nvram_type);
  1672. if (rc)
  1673. goto out;
  1674. part->updating = true;
  1675. }
  1676. /* The MCDI interface can in fact do multiple erase blocks at once;
  1677. * but erasing may be slow, so we make multiple calls here to avoid
  1678. * tripping the MCDI RPC timeout. */
  1679. while (offset < end) {
  1680. rc = efx_mcdi_nvram_erase(efx, part->nvram_type, offset,
  1681. chunk);
  1682. if (rc)
  1683. goto out;
  1684. offset += chunk;
  1685. }
  1686. out:
  1687. return rc;
  1688. }
  1689. int efx_mcdi_mtd_write(struct mtd_info *mtd, loff_t start,
  1690. size_t len, size_t *retlen, const u8 *buffer)
  1691. {
  1692. struct efx_mcdi_mtd_partition *part = to_efx_mcdi_mtd_partition(mtd);
  1693. struct efx_nic *efx = mtd->priv;
  1694. loff_t offset = start;
  1695. loff_t end = min_t(loff_t, start + len, mtd->size);
  1696. size_t chunk;
  1697. int rc = 0;
  1698. if (!part->updating) {
  1699. rc = efx_mcdi_nvram_update_start(efx, part->nvram_type);
  1700. if (rc)
  1701. goto out;
  1702. part->updating = true;
  1703. }
  1704. while (offset < end) {
  1705. chunk = min_t(size_t, end - offset, EFX_MCDI_NVRAM_LEN_MAX);
  1706. rc = efx_mcdi_nvram_write(efx, part->nvram_type, offset,
  1707. buffer, chunk);
  1708. if (rc)
  1709. goto out;
  1710. offset += chunk;
  1711. buffer += chunk;
  1712. }
  1713. out:
  1714. *retlen = offset - start;
  1715. return rc;
  1716. }
  1717. int efx_mcdi_mtd_sync(struct mtd_info *mtd)
  1718. {
  1719. struct efx_mcdi_mtd_partition *part = to_efx_mcdi_mtd_partition(mtd);
  1720. struct efx_nic *efx = mtd->priv;
  1721. int rc = 0;
  1722. if (part->updating) {
  1723. part->updating = false;
  1724. rc = efx_mcdi_nvram_update_finish(efx, part->nvram_type);
  1725. }
  1726. return rc;
  1727. }
  1728. void efx_mcdi_mtd_rename(struct efx_mtd_partition *part)
  1729. {
  1730. struct efx_mcdi_mtd_partition *mcdi_part =
  1731. container_of(part, struct efx_mcdi_mtd_partition, common);
  1732. struct efx_nic *efx = part->mtd.priv;
  1733. snprintf(part->name, sizeof(part->name), "%s %s:%02x",
  1734. efx->name, part->type_name, mcdi_part->fw_subtype);
  1735. }
  1736. #endif /* CONFIG_SFC_MTD */