vnic_dev.c 28 KB

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  1. /*
  2. * Copyright 2008-2010 Cisco Systems, Inc. All rights reserved.
  3. * Copyright 2007 Nuova Systems, Inc. All rights reserved.
  4. *
  5. * This program is free software; you may redistribute it and/or modify
  6. * it under the terms of the GNU General Public License as published by
  7. * the Free Software Foundation; version 2 of the License.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  10. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  11. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  12. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  13. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  14. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  15. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  16. * SOFTWARE.
  17. *
  18. */
  19. #include <linux/kernel.h>
  20. #include <linux/errno.h>
  21. #include <linux/types.h>
  22. #include <linux/pci.h>
  23. #include <linux/delay.h>
  24. #include <linux/if_ether.h>
  25. #include "vnic_resource.h"
  26. #include "vnic_devcmd.h"
  27. #include "vnic_dev.h"
  28. #include "vnic_wq.h"
  29. #include "vnic_stats.h"
  30. #include "enic.h"
  31. #define VNIC_MAX_RES_HDR_SIZE \
  32. (sizeof(struct vnic_resource_header) + \
  33. sizeof(struct vnic_resource) * RES_TYPE_MAX)
  34. #define VNIC_RES_STRIDE 128
  35. void *vnic_dev_priv(struct vnic_dev *vdev)
  36. {
  37. return vdev->priv;
  38. }
  39. static int vnic_dev_discover_res(struct vnic_dev *vdev,
  40. struct vnic_dev_bar *bar, unsigned int num_bars)
  41. {
  42. struct vnic_resource_header __iomem *rh;
  43. struct mgmt_barmap_hdr __iomem *mrh;
  44. struct vnic_resource __iomem *r;
  45. u8 type;
  46. if (num_bars == 0)
  47. return -EINVAL;
  48. if (bar->len < VNIC_MAX_RES_HDR_SIZE) {
  49. vdev_err("vNIC BAR0 res hdr length error\n");
  50. return -EINVAL;
  51. }
  52. rh = bar->vaddr;
  53. mrh = bar->vaddr;
  54. if (!rh) {
  55. vdev_err("vNIC BAR0 res hdr not mem-mapped\n");
  56. return -EINVAL;
  57. }
  58. /* Check for mgmt vnic in addition to normal vnic */
  59. if ((ioread32(&rh->magic) != VNIC_RES_MAGIC) ||
  60. (ioread32(&rh->version) != VNIC_RES_VERSION)) {
  61. if ((ioread32(&mrh->magic) != MGMTVNIC_MAGIC) ||
  62. (ioread32(&mrh->version) != MGMTVNIC_VERSION)) {
  63. vdev_err("vNIC BAR0 res magic/version error exp (%lx/%lx) or (%lx/%lx), curr (%x/%x)\n",
  64. VNIC_RES_MAGIC, VNIC_RES_VERSION,
  65. MGMTVNIC_MAGIC, MGMTVNIC_VERSION,
  66. ioread32(&rh->magic), ioread32(&rh->version));
  67. return -EINVAL;
  68. }
  69. }
  70. if (ioread32(&mrh->magic) == MGMTVNIC_MAGIC)
  71. r = (struct vnic_resource __iomem *)(mrh + 1);
  72. else
  73. r = (struct vnic_resource __iomem *)(rh + 1);
  74. while ((type = ioread8(&r->type)) != RES_TYPE_EOL) {
  75. u8 bar_num = ioread8(&r->bar);
  76. u32 bar_offset = ioread32(&r->bar_offset);
  77. u32 count = ioread32(&r->count);
  78. u32 len;
  79. r++;
  80. if (bar_num >= num_bars)
  81. continue;
  82. if (!bar[bar_num].len || !bar[bar_num].vaddr)
  83. continue;
  84. switch (type) {
  85. case RES_TYPE_WQ:
  86. case RES_TYPE_RQ:
  87. case RES_TYPE_CQ:
  88. case RES_TYPE_INTR_CTRL:
  89. /* each count is stride bytes long */
  90. len = count * VNIC_RES_STRIDE;
  91. if (len + bar_offset > bar[bar_num].len) {
  92. vdev_err("vNIC BAR0 resource %d out-of-bounds, offset 0x%x + size 0x%x > bar len 0x%lx\n",
  93. type, bar_offset, len,
  94. bar[bar_num].len);
  95. return -EINVAL;
  96. }
  97. break;
  98. case RES_TYPE_INTR_PBA_LEGACY:
  99. case RES_TYPE_DEVCMD:
  100. case RES_TYPE_DEVCMD2:
  101. len = count;
  102. break;
  103. default:
  104. continue;
  105. }
  106. vdev->res[type].count = count;
  107. vdev->res[type].vaddr = (char __iomem *)bar[bar_num].vaddr +
  108. bar_offset;
  109. vdev->res[type].bus_addr = bar[bar_num].bus_addr + bar_offset;
  110. }
  111. return 0;
  112. }
  113. unsigned int vnic_dev_get_res_count(struct vnic_dev *vdev,
  114. enum vnic_res_type type)
  115. {
  116. return vdev->res[type].count;
  117. }
  118. EXPORT_SYMBOL(vnic_dev_get_res_count);
  119. void __iomem *vnic_dev_get_res(struct vnic_dev *vdev, enum vnic_res_type type,
  120. unsigned int index)
  121. {
  122. if (!vdev->res[type].vaddr)
  123. return NULL;
  124. switch (type) {
  125. case RES_TYPE_WQ:
  126. case RES_TYPE_RQ:
  127. case RES_TYPE_CQ:
  128. case RES_TYPE_INTR_CTRL:
  129. return (char __iomem *)vdev->res[type].vaddr +
  130. index * VNIC_RES_STRIDE;
  131. default:
  132. return (char __iomem *)vdev->res[type].vaddr;
  133. }
  134. }
  135. EXPORT_SYMBOL(vnic_dev_get_res);
  136. static unsigned int vnic_dev_desc_ring_size(struct vnic_dev_ring *ring,
  137. unsigned int desc_count, unsigned int desc_size)
  138. {
  139. /* The base address of the desc rings must be 512 byte aligned.
  140. * Descriptor count is aligned to groups of 32 descriptors. A
  141. * count of 0 means the maximum 4096 descriptors. Descriptor
  142. * size is aligned to 16 bytes.
  143. */
  144. unsigned int count_align = 32;
  145. unsigned int desc_align = 16;
  146. ring->base_align = 512;
  147. if (desc_count == 0)
  148. desc_count = 4096;
  149. ring->desc_count = ALIGN(desc_count, count_align);
  150. ring->desc_size = ALIGN(desc_size, desc_align);
  151. ring->size = ring->desc_count * ring->desc_size;
  152. ring->size_unaligned = ring->size + ring->base_align;
  153. return ring->size_unaligned;
  154. }
  155. void vnic_dev_clear_desc_ring(struct vnic_dev_ring *ring)
  156. {
  157. memset(ring->descs, 0, ring->size);
  158. }
  159. int vnic_dev_alloc_desc_ring(struct vnic_dev *vdev, struct vnic_dev_ring *ring,
  160. unsigned int desc_count, unsigned int desc_size)
  161. {
  162. vnic_dev_desc_ring_size(ring, desc_count, desc_size);
  163. ring->descs_unaligned = pci_alloc_consistent(vdev->pdev,
  164. ring->size_unaligned,
  165. &ring->base_addr_unaligned);
  166. if (!ring->descs_unaligned) {
  167. vdev_err("Failed to allocate ring (size=%d), aborting\n",
  168. (int)ring->size);
  169. return -ENOMEM;
  170. }
  171. ring->base_addr = ALIGN(ring->base_addr_unaligned,
  172. ring->base_align);
  173. ring->descs = (u8 *)ring->descs_unaligned +
  174. (ring->base_addr - ring->base_addr_unaligned);
  175. vnic_dev_clear_desc_ring(ring);
  176. ring->desc_avail = ring->desc_count - 1;
  177. return 0;
  178. }
  179. void vnic_dev_free_desc_ring(struct vnic_dev *vdev, struct vnic_dev_ring *ring)
  180. {
  181. if (ring->descs) {
  182. pci_free_consistent(vdev->pdev,
  183. ring->size_unaligned,
  184. ring->descs_unaligned,
  185. ring->base_addr_unaligned);
  186. ring->descs = NULL;
  187. }
  188. }
  189. static int _vnic_dev_cmd(struct vnic_dev *vdev, enum vnic_devcmd_cmd cmd,
  190. int wait)
  191. {
  192. struct vnic_devcmd __iomem *devcmd = vdev->devcmd;
  193. unsigned int i;
  194. int delay;
  195. u32 status;
  196. int err;
  197. status = ioread32(&devcmd->status);
  198. if (status == 0xFFFFFFFF) {
  199. /* PCI-e target device is gone */
  200. return -ENODEV;
  201. }
  202. if (status & STAT_BUSY) {
  203. vdev_neterr("Busy devcmd %d\n", _CMD_N(cmd));
  204. return -EBUSY;
  205. }
  206. if (_CMD_DIR(cmd) & _CMD_DIR_WRITE) {
  207. for (i = 0; i < VNIC_DEVCMD_NARGS; i++)
  208. writeq(vdev->args[i], &devcmd->args[i]);
  209. wmb();
  210. }
  211. iowrite32(cmd, &devcmd->cmd);
  212. if ((_CMD_FLAGS(cmd) & _CMD_FLAGS_NOWAIT))
  213. return 0;
  214. for (delay = 0; delay < wait; delay++) {
  215. udelay(100);
  216. status = ioread32(&devcmd->status);
  217. if (status == 0xFFFFFFFF) {
  218. /* PCI-e target device is gone */
  219. return -ENODEV;
  220. }
  221. if (!(status & STAT_BUSY)) {
  222. if (status & STAT_ERROR) {
  223. err = (int)readq(&devcmd->args[0]);
  224. if (err == ERR_EINVAL &&
  225. cmd == CMD_CAPABILITY)
  226. return -err;
  227. if (err != ERR_ECMDUNKNOWN ||
  228. cmd != CMD_CAPABILITY)
  229. vdev_neterr("Error %d devcmd %d\n",
  230. err, _CMD_N(cmd));
  231. return -err;
  232. }
  233. if (_CMD_DIR(cmd) & _CMD_DIR_READ) {
  234. rmb();
  235. for (i = 0; i < VNIC_DEVCMD_NARGS; i++)
  236. vdev->args[i] = readq(&devcmd->args[i]);
  237. }
  238. return 0;
  239. }
  240. }
  241. vdev_neterr("Timedout devcmd %d\n", _CMD_N(cmd));
  242. return -ETIMEDOUT;
  243. }
  244. static int _vnic_dev_cmd2(struct vnic_dev *vdev, enum vnic_devcmd_cmd cmd,
  245. int wait)
  246. {
  247. struct devcmd2_controller *dc2c = vdev->devcmd2;
  248. struct devcmd2_result *result = dc2c->result + dc2c->next_result;
  249. unsigned int i;
  250. int delay, err;
  251. u32 fetch_index, new_posted;
  252. u32 posted = dc2c->posted;
  253. fetch_index = ioread32(&dc2c->wq_ctrl->fetch_index);
  254. if (fetch_index == 0xFFFFFFFF)
  255. return -ENODEV;
  256. new_posted = (posted + 1) % DEVCMD2_RING_SIZE;
  257. if (new_posted == fetch_index) {
  258. vdev_neterr("devcmd2 %d: wq is full. fetch index: %u, posted index: %u\n",
  259. _CMD_N(cmd), fetch_index, posted);
  260. return -EBUSY;
  261. }
  262. dc2c->cmd_ring[posted].cmd = cmd;
  263. dc2c->cmd_ring[posted].flags = 0;
  264. if ((_CMD_FLAGS(cmd) & _CMD_FLAGS_NOWAIT))
  265. dc2c->cmd_ring[posted].flags |= DEVCMD2_FNORESULT;
  266. if (_CMD_DIR(cmd) & _CMD_DIR_WRITE)
  267. for (i = 0; i < VNIC_DEVCMD_NARGS; i++)
  268. dc2c->cmd_ring[posted].args[i] = vdev->args[i];
  269. /* Adding write memory barrier prevents compiler and/or CPU reordering,
  270. * thus avoiding descriptor posting before descriptor is initialized.
  271. * Otherwise, hardware can read stale descriptor fields.
  272. */
  273. wmb();
  274. iowrite32(new_posted, &dc2c->wq_ctrl->posted_index);
  275. dc2c->posted = new_posted;
  276. if (dc2c->cmd_ring[posted].flags & DEVCMD2_FNORESULT)
  277. return 0;
  278. for (delay = 0; delay < wait; delay++) {
  279. if (result->color == dc2c->color) {
  280. dc2c->next_result++;
  281. if (dc2c->next_result == dc2c->result_size) {
  282. dc2c->next_result = 0;
  283. dc2c->color = dc2c->color ? 0 : 1;
  284. }
  285. if (result->error) {
  286. err = result->error;
  287. if (err != ERR_ECMDUNKNOWN ||
  288. cmd != CMD_CAPABILITY)
  289. vdev_neterr("Error %d devcmd %d\n",
  290. err, _CMD_N(cmd));
  291. return -err;
  292. }
  293. if (_CMD_DIR(cmd) & _CMD_DIR_READ)
  294. for (i = 0; i < VNIC_DEVCMD2_NARGS; i++)
  295. vdev->args[i] = result->results[i];
  296. return 0;
  297. }
  298. udelay(100);
  299. }
  300. vdev_neterr("devcmd %d timed out\n", _CMD_N(cmd));
  301. return -ETIMEDOUT;
  302. }
  303. static int vnic_dev_init_devcmd1(struct vnic_dev *vdev)
  304. {
  305. vdev->devcmd = vnic_dev_get_res(vdev, RES_TYPE_DEVCMD, 0);
  306. if (!vdev->devcmd)
  307. return -ENODEV;
  308. vdev->devcmd_rtn = _vnic_dev_cmd;
  309. return 0;
  310. }
  311. static int vnic_dev_init_devcmd2(struct vnic_dev *vdev)
  312. {
  313. int err;
  314. unsigned int fetch_index;
  315. if (vdev->devcmd2)
  316. return 0;
  317. vdev->devcmd2 = kzalloc(sizeof(*vdev->devcmd2), GFP_KERNEL);
  318. if (!vdev->devcmd2)
  319. return -ENOMEM;
  320. vdev->devcmd2->color = 1;
  321. vdev->devcmd2->result_size = DEVCMD2_RING_SIZE;
  322. err = enic_wq_devcmd2_alloc(vdev, &vdev->devcmd2->wq, DEVCMD2_RING_SIZE,
  323. DEVCMD2_DESC_SIZE);
  324. if (err)
  325. goto err_free_devcmd2;
  326. fetch_index = ioread32(&vdev->devcmd2->wq.ctrl->fetch_index);
  327. if (fetch_index == 0xFFFFFFFF) { /* check for hardware gone */
  328. vdev_err("Fatal error in devcmd2 init - hardware surprise removal");
  329. return -ENODEV;
  330. }
  331. enic_wq_init_start(&vdev->devcmd2->wq, 0, fetch_index, fetch_index, 0,
  332. 0);
  333. vdev->devcmd2->posted = fetch_index;
  334. vnic_wq_enable(&vdev->devcmd2->wq);
  335. err = vnic_dev_alloc_desc_ring(vdev, &vdev->devcmd2->results_ring,
  336. DEVCMD2_RING_SIZE, DEVCMD2_DESC_SIZE);
  337. if (err)
  338. goto err_free_wq;
  339. vdev->devcmd2->result = vdev->devcmd2->results_ring.descs;
  340. vdev->devcmd2->cmd_ring = vdev->devcmd2->wq.ring.descs;
  341. vdev->devcmd2->wq_ctrl = vdev->devcmd2->wq.ctrl;
  342. vdev->args[0] = (u64)vdev->devcmd2->results_ring.base_addr |
  343. VNIC_PADDR_TARGET;
  344. vdev->args[1] = DEVCMD2_RING_SIZE;
  345. err = _vnic_dev_cmd2(vdev, CMD_INITIALIZE_DEVCMD2, 1000);
  346. if (err)
  347. goto err_free_desc_ring;
  348. vdev->devcmd_rtn = _vnic_dev_cmd2;
  349. return 0;
  350. err_free_desc_ring:
  351. vnic_dev_free_desc_ring(vdev, &vdev->devcmd2->results_ring);
  352. err_free_wq:
  353. vnic_wq_disable(&vdev->devcmd2->wq);
  354. vnic_wq_free(&vdev->devcmd2->wq);
  355. err_free_devcmd2:
  356. kfree(vdev->devcmd2);
  357. vdev->devcmd2 = NULL;
  358. return err;
  359. }
  360. static void vnic_dev_deinit_devcmd2(struct vnic_dev *vdev)
  361. {
  362. vnic_dev_free_desc_ring(vdev, &vdev->devcmd2->results_ring);
  363. vnic_wq_disable(&vdev->devcmd2->wq);
  364. vnic_wq_free(&vdev->devcmd2->wq);
  365. kfree(vdev->devcmd2);
  366. }
  367. static int vnic_dev_cmd_proxy(struct vnic_dev *vdev,
  368. enum vnic_devcmd_cmd proxy_cmd, enum vnic_devcmd_cmd cmd,
  369. u64 *a0, u64 *a1, int wait)
  370. {
  371. u32 status;
  372. int err;
  373. memset(vdev->args, 0, sizeof(vdev->args));
  374. vdev->args[0] = vdev->proxy_index;
  375. vdev->args[1] = cmd;
  376. vdev->args[2] = *a0;
  377. vdev->args[3] = *a1;
  378. err = vdev->devcmd_rtn(vdev, proxy_cmd, wait);
  379. if (err)
  380. return err;
  381. status = (u32)vdev->args[0];
  382. if (status & STAT_ERROR) {
  383. err = (int)vdev->args[1];
  384. if (err != ERR_ECMDUNKNOWN ||
  385. cmd != CMD_CAPABILITY)
  386. vdev_neterr("Error %d proxy devcmd %d\n", err,
  387. _CMD_N(cmd));
  388. return err;
  389. }
  390. *a0 = vdev->args[1];
  391. *a1 = vdev->args[2];
  392. return 0;
  393. }
  394. static int vnic_dev_cmd_no_proxy(struct vnic_dev *vdev,
  395. enum vnic_devcmd_cmd cmd, u64 *a0, u64 *a1, int wait)
  396. {
  397. int err;
  398. vdev->args[0] = *a0;
  399. vdev->args[1] = *a1;
  400. err = vdev->devcmd_rtn(vdev, cmd, wait);
  401. *a0 = vdev->args[0];
  402. *a1 = vdev->args[1];
  403. return err;
  404. }
  405. void vnic_dev_cmd_proxy_by_index_start(struct vnic_dev *vdev, u16 index)
  406. {
  407. vdev->proxy = PROXY_BY_INDEX;
  408. vdev->proxy_index = index;
  409. }
  410. void vnic_dev_cmd_proxy_end(struct vnic_dev *vdev)
  411. {
  412. vdev->proxy = PROXY_NONE;
  413. vdev->proxy_index = 0;
  414. }
  415. int vnic_dev_cmd(struct vnic_dev *vdev, enum vnic_devcmd_cmd cmd,
  416. u64 *a0, u64 *a1, int wait)
  417. {
  418. memset(vdev->args, 0, sizeof(vdev->args));
  419. switch (vdev->proxy) {
  420. case PROXY_BY_INDEX:
  421. return vnic_dev_cmd_proxy(vdev, CMD_PROXY_BY_INDEX, cmd,
  422. a0, a1, wait);
  423. case PROXY_BY_BDF:
  424. return vnic_dev_cmd_proxy(vdev, CMD_PROXY_BY_BDF, cmd,
  425. a0, a1, wait);
  426. case PROXY_NONE:
  427. default:
  428. return vnic_dev_cmd_no_proxy(vdev, cmd, a0, a1, wait);
  429. }
  430. }
  431. static int vnic_dev_capable(struct vnic_dev *vdev, enum vnic_devcmd_cmd cmd)
  432. {
  433. u64 a0 = (u32)cmd, a1 = 0;
  434. int wait = 1000;
  435. int err;
  436. err = vnic_dev_cmd(vdev, CMD_CAPABILITY, &a0, &a1, wait);
  437. return !(err || a0);
  438. }
  439. int vnic_dev_fw_info(struct vnic_dev *vdev,
  440. struct vnic_devcmd_fw_info **fw_info)
  441. {
  442. u64 a0, a1 = 0;
  443. int wait = 1000;
  444. int err = 0;
  445. if (!vdev->fw_info) {
  446. vdev->fw_info = pci_zalloc_consistent(vdev->pdev,
  447. sizeof(struct vnic_devcmd_fw_info),
  448. &vdev->fw_info_pa);
  449. if (!vdev->fw_info)
  450. return -ENOMEM;
  451. a0 = vdev->fw_info_pa;
  452. a1 = sizeof(struct vnic_devcmd_fw_info);
  453. /* only get fw_info once and cache it */
  454. if (vnic_dev_capable(vdev, CMD_MCPU_FW_INFO))
  455. err = vnic_dev_cmd(vdev, CMD_MCPU_FW_INFO,
  456. &a0, &a1, wait);
  457. else
  458. err = vnic_dev_cmd(vdev, CMD_MCPU_FW_INFO_OLD,
  459. &a0, &a1, wait);
  460. }
  461. *fw_info = vdev->fw_info;
  462. return err;
  463. }
  464. int vnic_dev_spec(struct vnic_dev *vdev, unsigned int offset, unsigned int size,
  465. void *value)
  466. {
  467. u64 a0, a1;
  468. int wait = 1000;
  469. int err;
  470. a0 = offset;
  471. a1 = size;
  472. err = vnic_dev_cmd(vdev, CMD_DEV_SPEC, &a0, &a1, wait);
  473. switch (size) {
  474. case 1: *(u8 *)value = (u8)a0; break;
  475. case 2: *(u16 *)value = (u16)a0; break;
  476. case 4: *(u32 *)value = (u32)a0; break;
  477. case 8: *(u64 *)value = a0; break;
  478. default: BUG(); break;
  479. }
  480. return err;
  481. }
  482. int vnic_dev_stats_dump(struct vnic_dev *vdev, struct vnic_stats **stats)
  483. {
  484. u64 a0, a1;
  485. int wait = 1000;
  486. if (!vdev->stats) {
  487. vdev->stats = pci_alloc_consistent(vdev->pdev,
  488. sizeof(struct vnic_stats), &vdev->stats_pa);
  489. if (!vdev->stats)
  490. return -ENOMEM;
  491. }
  492. *stats = vdev->stats;
  493. a0 = vdev->stats_pa;
  494. a1 = sizeof(struct vnic_stats);
  495. return vnic_dev_cmd(vdev, CMD_STATS_DUMP, &a0, &a1, wait);
  496. }
  497. int vnic_dev_close(struct vnic_dev *vdev)
  498. {
  499. u64 a0 = 0, a1 = 0;
  500. int wait = 1000;
  501. return vnic_dev_cmd(vdev, CMD_CLOSE, &a0, &a1, wait);
  502. }
  503. int vnic_dev_enable_wait(struct vnic_dev *vdev)
  504. {
  505. u64 a0 = 0, a1 = 0;
  506. int wait = 1000;
  507. if (vnic_dev_capable(vdev, CMD_ENABLE_WAIT))
  508. return vnic_dev_cmd(vdev, CMD_ENABLE_WAIT, &a0, &a1, wait);
  509. else
  510. return vnic_dev_cmd(vdev, CMD_ENABLE, &a0, &a1, wait);
  511. }
  512. int vnic_dev_disable(struct vnic_dev *vdev)
  513. {
  514. u64 a0 = 0, a1 = 0;
  515. int wait = 1000;
  516. return vnic_dev_cmd(vdev, CMD_DISABLE, &a0, &a1, wait);
  517. }
  518. int vnic_dev_open(struct vnic_dev *vdev, int arg)
  519. {
  520. u64 a0 = (u32)arg, a1 = 0;
  521. int wait = 1000;
  522. return vnic_dev_cmd(vdev, CMD_OPEN, &a0, &a1, wait);
  523. }
  524. int vnic_dev_open_done(struct vnic_dev *vdev, int *done)
  525. {
  526. u64 a0 = 0, a1 = 0;
  527. int wait = 1000;
  528. int err;
  529. *done = 0;
  530. err = vnic_dev_cmd(vdev, CMD_OPEN_STATUS, &a0, &a1, wait);
  531. if (err)
  532. return err;
  533. *done = (a0 == 0);
  534. return 0;
  535. }
  536. static int vnic_dev_soft_reset(struct vnic_dev *vdev, int arg)
  537. {
  538. u64 a0 = (u32)arg, a1 = 0;
  539. int wait = 1000;
  540. return vnic_dev_cmd(vdev, CMD_SOFT_RESET, &a0, &a1, wait);
  541. }
  542. static int vnic_dev_soft_reset_done(struct vnic_dev *vdev, int *done)
  543. {
  544. u64 a0 = 0, a1 = 0;
  545. int wait = 1000;
  546. int err;
  547. *done = 0;
  548. err = vnic_dev_cmd(vdev, CMD_SOFT_RESET_STATUS, &a0, &a1, wait);
  549. if (err)
  550. return err;
  551. *done = (a0 == 0);
  552. return 0;
  553. }
  554. int vnic_dev_hang_reset(struct vnic_dev *vdev, int arg)
  555. {
  556. u64 a0 = (u32)arg, a1 = 0;
  557. int wait = 1000;
  558. int err;
  559. if (vnic_dev_capable(vdev, CMD_HANG_RESET)) {
  560. return vnic_dev_cmd(vdev, CMD_HANG_RESET,
  561. &a0, &a1, wait);
  562. } else {
  563. err = vnic_dev_soft_reset(vdev, arg);
  564. if (err)
  565. return err;
  566. return vnic_dev_init(vdev, 0);
  567. }
  568. }
  569. int vnic_dev_hang_reset_done(struct vnic_dev *vdev, int *done)
  570. {
  571. u64 a0 = 0, a1 = 0;
  572. int wait = 1000;
  573. int err;
  574. *done = 0;
  575. if (vnic_dev_capable(vdev, CMD_HANG_RESET_STATUS)) {
  576. err = vnic_dev_cmd(vdev, CMD_HANG_RESET_STATUS,
  577. &a0, &a1, wait);
  578. if (err)
  579. return err;
  580. } else {
  581. return vnic_dev_soft_reset_done(vdev, done);
  582. }
  583. *done = (a0 == 0);
  584. return 0;
  585. }
  586. int vnic_dev_hang_notify(struct vnic_dev *vdev)
  587. {
  588. u64 a0, a1;
  589. int wait = 1000;
  590. return vnic_dev_cmd(vdev, CMD_HANG_NOTIFY, &a0, &a1, wait);
  591. }
  592. int vnic_dev_get_mac_addr(struct vnic_dev *vdev, u8 *mac_addr)
  593. {
  594. u64 a0, a1;
  595. int wait = 1000;
  596. int err, i;
  597. for (i = 0; i < ETH_ALEN; i++)
  598. mac_addr[i] = 0;
  599. err = vnic_dev_cmd(vdev, CMD_GET_MAC_ADDR, &a0, &a1, wait);
  600. if (err)
  601. return err;
  602. for (i = 0; i < ETH_ALEN; i++)
  603. mac_addr[i] = ((u8 *)&a0)[i];
  604. return 0;
  605. }
  606. int vnic_dev_packet_filter(struct vnic_dev *vdev, int directed, int multicast,
  607. int broadcast, int promisc, int allmulti)
  608. {
  609. u64 a0, a1 = 0;
  610. int wait = 1000;
  611. int err;
  612. a0 = (directed ? CMD_PFILTER_DIRECTED : 0) |
  613. (multicast ? CMD_PFILTER_MULTICAST : 0) |
  614. (broadcast ? CMD_PFILTER_BROADCAST : 0) |
  615. (promisc ? CMD_PFILTER_PROMISCUOUS : 0) |
  616. (allmulti ? CMD_PFILTER_ALL_MULTICAST : 0);
  617. err = vnic_dev_cmd(vdev, CMD_PACKET_FILTER, &a0, &a1, wait);
  618. if (err)
  619. vdev_neterr("Can't set packet filter\n");
  620. return err;
  621. }
  622. int vnic_dev_add_addr(struct vnic_dev *vdev, const u8 *addr)
  623. {
  624. u64 a0 = 0, a1 = 0;
  625. int wait = 1000;
  626. int err;
  627. int i;
  628. for (i = 0; i < ETH_ALEN; i++)
  629. ((u8 *)&a0)[i] = addr[i];
  630. err = vnic_dev_cmd(vdev, CMD_ADDR_ADD, &a0, &a1, wait);
  631. if (err)
  632. vdev_neterr("Can't add addr [%pM], %d\n", addr, err);
  633. return err;
  634. }
  635. int vnic_dev_del_addr(struct vnic_dev *vdev, const u8 *addr)
  636. {
  637. u64 a0 = 0, a1 = 0;
  638. int wait = 1000;
  639. int err;
  640. int i;
  641. for (i = 0; i < ETH_ALEN; i++)
  642. ((u8 *)&a0)[i] = addr[i];
  643. err = vnic_dev_cmd(vdev, CMD_ADDR_DEL, &a0, &a1, wait);
  644. if (err)
  645. vdev_neterr("Can't del addr [%pM], %d\n", addr, err);
  646. return err;
  647. }
  648. int vnic_dev_set_ig_vlan_rewrite_mode(struct vnic_dev *vdev,
  649. u8 ig_vlan_rewrite_mode)
  650. {
  651. u64 a0 = ig_vlan_rewrite_mode, a1 = 0;
  652. int wait = 1000;
  653. if (vnic_dev_capable(vdev, CMD_IG_VLAN_REWRITE_MODE))
  654. return vnic_dev_cmd(vdev, CMD_IG_VLAN_REWRITE_MODE,
  655. &a0, &a1, wait);
  656. else
  657. return 0;
  658. }
  659. static int vnic_dev_notify_setcmd(struct vnic_dev *vdev,
  660. void *notify_addr, dma_addr_t notify_pa, u16 intr)
  661. {
  662. u64 a0, a1;
  663. int wait = 1000;
  664. int r;
  665. memset(notify_addr, 0, sizeof(struct vnic_devcmd_notify));
  666. vdev->notify = notify_addr;
  667. vdev->notify_pa = notify_pa;
  668. a0 = (u64)notify_pa;
  669. a1 = ((u64)intr << 32) & 0x0000ffff00000000ULL;
  670. a1 += sizeof(struct vnic_devcmd_notify);
  671. r = vnic_dev_cmd(vdev, CMD_NOTIFY, &a0, &a1, wait);
  672. vdev->notify_sz = (r == 0) ? (u32)a1 : 0;
  673. return r;
  674. }
  675. int vnic_dev_notify_set(struct vnic_dev *vdev, u16 intr)
  676. {
  677. void *notify_addr;
  678. dma_addr_t notify_pa;
  679. if (vdev->notify || vdev->notify_pa) {
  680. vdev_neterr("notify block %p still allocated", vdev->notify);
  681. return -EINVAL;
  682. }
  683. notify_addr = pci_alloc_consistent(vdev->pdev,
  684. sizeof(struct vnic_devcmd_notify),
  685. &notify_pa);
  686. if (!notify_addr)
  687. return -ENOMEM;
  688. return vnic_dev_notify_setcmd(vdev, notify_addr, notify_pa, intr);
  689. }
  690. static int vnic_dev_notify_unsetcmd(struct vnic_dev *vdev)
  691. {
  692. u64 a0, a1;
  693. int wait = 1000;
  694. int err;
  695. a0 = 0; /* paddr = 0 to unset notify buffer */
  696. a1 = 0x0000ffff00000000ULL; /* intr num = -1 to unreg for intr */
  697. a1 += sizeof(struct vnic_devcmd_notify);
  698. err = vnic_dev_cmd(vdev, CMD_NOTIFY, &a0, &a1, wait);
  699. vdev->notify = NULL;
  700. vdev->notify_pa = 0;
  701. vdev->notify_sz = 0;
  702. return err;
  703. }
  704. int vnic_dev_notify_unset(struct vnic_dev *vdev)
  705. {
  706. if (vdev->notify) {
  707. pci_free_consistent(vdev->pdev,
  708. sizeof(struct vnic_devcmd_notify),
  709. vdev->notify,
  710. vdev->notify_pa);
  711. }
  712. return vnic_dev_notify_unsetcmd(vdev);
  713. }
  714. static int vnic_dev_notify_ready(struct vnic_dev *vdev)
  715. {
  716. u32 *words;
  717. unsigned int nwords = vdev->notify_sz / 4;
  718. unsigned int i;
  719. u32 csum;
  720. if (!vdev->notify || !vdev->notify_sz)
  721. return 0;
  722. do {
  723. csum = 0;
  724. memcpy(&vdev->notify_copy, vdev->notify, vdev->notify_sz);
  725. words = (u32 *)&vdev->notify_copy;
  726. for (i = 1; i < nwords; i++)
  727. csum += words[i];
  728. } while (csum != words[0]);
  729. return 1;
  730. }
  731. int vnic_dev_init(struct vnic_dev *vdev, int arg)
  732. {
  733. u64 a0 = (u32)arg, a1 = 0;
  734. int wait = 1000;
  735. int r = 0;
  736. if (vnic_dev_capable(vdev, CMD_INIT))
  737. r = vnic_dev_cmd(vdev, CMD_INIT, &a0, &a1, wait);
  738. else {
  739. vnic_dev_cmd(vdev, CMD_INIT_v1, &a0, &a1, wait);
  740. if (a0 & CMD_INITF_DEFAULT_MAC) {
  741. /* Emulate these for old CMD_INIT_v1 which
  742. * didn't pass a0 so no CMD_INITF_*.
  743. */
  744. vnic_dev_cmd(vdev, CMD_GET_MAC_ADDR, &a0, &a1, wait);
  745. vnic_dev_cmd(vdev, CMD_ADDR_ADD, &a0, &a1, wait);
  746. }
  747. }
  748. return r;
  749. }
  750. int vnic_dev_deinit(struct vnic_dev *vdev)
  751. {
  752. u64 a0 = 0, a1 = 0;
  753. int wait = 1000;
  754. return vnic_dev_cmd(vdev, CMD_DEINIT, &a0, &a1, wait);
  755. }
  756. void vnic_dev_intr_coal_timer_info_default(struct vnic_dev *vdev)
  757. {
  758. /* Default: hardware intr coal timer is in units of 1.5 usecs */
  759. vdev->intr_coal_timer_info.mul = 2;
  760. vdev->intr_coal_timer_info.div = 3;
  761. vdev->intr_coal_timer_info.max_usec =
  762. vnic_dev_intr_coal_timer_hw_to_usec(vdev, 0xffff);
  763. }
  764. int vnic_dev_intr_coal_timer_info(struct vnic_dev *vdev)
  765. {
  766. int wait = 1000;
  767. int err;
  768. memset(vdev->args, 0, sizeof(vdev->args));
  769. if (vnic_dev_capable(vdev, CMD_INTR_COAL_CONVERT))
  770. err = vdev->devcmd_rtn(vdev, CMD_INTR_COAL_CONVERT, wait);
  771. else
  772. err = ERR_ECMDUNKNOWN;
  773. /* Use defaults when firmware doesn't support the devcmd at all or
  774. * supports it for only specific hardware
  775. */
  776. if ((err == ERR_ECMDUNKNOWN) ||
  777. (!err && !(vdev->args[0] && vdev->args[1] && vdev->args[2]))) {
  778. vdev_netwarn("Using default conversion factor for interrupt coalesce timer\n");
  779. vnic_dev_intr_coal_timer_info_default(vdev);
  780. return 0;
  781. }
  782. if (!err) {
  783. vdev->intr_coal_timer_info.mul = (u32) vdev->args[0];
  784. vdev->intr_coal_timer_info.div = (u32) vdev->args[1];
  785. vdev->intr_coal_timer_info.max_usec = (u32) vdev->args[2];
  786. }
  787. return err;
  788. }
  789. int vnic_dev_link_status(struct vnic_dev *vdev)
  790. {
  791. if (!vnic_dev_notify_ready(vdev))
  792. return 0;
  793. return vdev->notify_copy.link_state;
  794. }
  795. u32 vnic_dev_port_speed(struct vnic_dev *vdev)
  796. {
  797. if (!vnic_dev_notify_ready(vdev))
  798. return 0;
  799. return vdev->notify_copy.port_speed;
  800. }
  801. u32 vnic_dev_msg_lvl(struct vnic_dev *vdev)
  802. {
  803. if (!vnic_dev_notify_ready(vdev))
  804. return 0;
  805. return vdev->notify_copy.msglvl;
  806. }
  807. u32 vnic_dev_mtu(struct vnic_dev *vdev)
  808. {
  809. if (!vnic_dev_notify_ready(vdev))
  810. return 0;
  811. return vdev->notify_copy.mtu;
  812. }
  813. void vnic_dev_set_intr_mode(struct vnic_dev *vdev,
  814. enum vnic_dev_intr_mode intr_mode)
  815. {
  816. vdev->intr_mode = intr_mode;
  817. }
  818. enum vnic_dev_intr_mode vnic_dev_get_intr_mode(
  819. struct vnic_dev *vdev)
  820. {
  821. return vdev->intr_mode;
  822. }
  823. u32 vnic_dev_intr_coal_timer_usec_to_hw(struct vnic_dev *vdev, u32 usec)
  824. {
  825. return (usec * vdev->intr_coal_timer_info.mul) /
  826. vdev->intr_coal_timer_info.div;
  827. }
  828. u32 vnic_dev_intr_coal_timer_hw_to_usec(struct vnic_dev *vdev, u32 hw_cycles)
  829. {
  830. return (hw_cycles * vdev->intr_coal_timer_info.div) /
  831. vdev->intr_coal_timer_info.mul;
  832. }
  833. u32 vnic_dev_get_intr_coal_timer_max(struct vnic_dev *vdev)
  834. {
  835. return vdev->intr_coal_timer_info.max_usec;
  836. }
  837. void vnic_dev_unregister(struct vnic_dev *vdev)
  838. {
  839. if (vdev) {
  840. if (vdev->notify)
  841. pci_free_consistent(vdev->pdev,
  842. sizeof(struct vnic_devcmd_notify),
  843. vdev->notify,
  844. vdev->notify_pa);
  845. if (vdev->stats)
  846. pci_free_consistent(vdev->pdev,
  847. sizeof(struct vnic_stats),
  848. vdev->stats, vdev->stats_pa);
  849. if (vdev->fw_info)
  850. pci_free_consistent(vdev->pdev,
  851. sizeof(struct vnic_devcmd_fw_info),
  852. vdev->fw_info, vdev->fw_info_pa);
  853. if (vdev->devcmd2)
  854. vnic_dev_deinit_devcmd2(vdev);
  855. kfree(vdev);
  856. }
  857. }
  858. EXPORT_SYMBOL(vnic_dev_unregister);
  859. struct vnic_dev *vnic_dev_register(struct vnic_dev *vdev,
  860. void *priv, struct pci_dev *pdev, struct vnic_dev_bar *bar,
  861. unsigned int num_bars)
  862. {
  863. if (!vdev) {
  864. vdev = kzalloc(sizeof(struct vnic_dev), GFP_ATOMIC);
  865. if (!vdev)
  866. return NULL;
  867. }
  868. vdev->priv = priv;
  869. vdev->pdev = pdev;
  870. if (vnic_dev_discover_res(vdev, bar, num_bars))
  871. goto err_out;
  872. return vdev;
  873. err_out:
  874. vnic_dev_unregister(vdev);
  875. return NULL;
  876. }
  877. EXPORT_SYMBOL(vnic_dev_register);
  878. struct pci_dev *vnic_dev_get_pdev(struct vnic_dev *vdev)
  879. {
  880. return vdev->pdev;
  881. }
  882. EXPORT_SYMBOL(vnic_dev_get_pdev);
  883. int vnic_devcmd_init(struct vnic_dev *vdev)
  884. {
  885. void __iomem *res;
  886. int err;
  887. res = vnic_dev_get_res(vdev, RES_TYPE_DEVCMD2, 0);
  888. if (res) {
  889. err = vnic_dev_init_devcmd2(vdev);
  890. if (err)
  891. vdev_warn("DEVCMD2 init failed: %d, Using DEVCMD1",
  892. err);
  893. else
  894. return 0;
  895. } else {
  896. vdev_warn("DEVCMD2 resource not found (old firmware?) Using DEVCMD1\n");
  897. }
  898. err = vnic_dev_init_devcmd1(vdev);
  899. if (err)
  900. vdev_err("DEVCMD1 initialization failed: %d", err);
  901. return err;
  902. }
  903. int vnic_dev_init_prov2(struct vnic_dev *vdev, u8 *buf, u32 len)
  904. {
  905. u64 a0, a1 = len;
  906. int wait = 1000;
  907. dma_addr_t prov_pa;
  908. void *prov_buf;
  909. int ret;
  910. prov_buf = pci_alloc_consistent(vdev->pdev, len, &prov_pa);
  911. if (!prov_buf)
  912. return -ENOMEM;
  913. memcpy(prov_buf, buf, len);
  914. a0 = prov_pa;
  915. ret = vnic_dev_cmd(vdev, CMD_INIT_PROV_INFO2, &a0, &a1, wait);
  916. pci_free_consistent(vdev->pdev, len, prov_buf, prov_pa);
  917. return ret;
  918. }
  919. int vnic_dev_enable2(struct vnic_dev *vdev, int active)
  920. {
  921. u64 a0, a1 = 0;
  922. int wait = 1000;
  923. a0 = (active ? CMD_ENABLE2_ACTIVE : 0);
  924. return vnic_dev_cmd(vdev, CMD_ENABLE2, &a0, &a1, wait);
  925. }
  926. static int vnic_dev_cmd_status(struct vnic_dev *vdev, enum vnic_devcmd_cmd cmd,
  927. int *status)
  928. {
  929. u64 a0 = cmd, a1 = 0;
  930. int wait = 1000;
  931. int ret;
  932. ret = vnic_dev_cmd(vdev, CMD_STATUS, &a0, &a1, wait);
  933. if (!ret)
  934. *status = (int)a0;
  935. return ret;
  936. }
  937. int vnic_dev_enable2_done(struct vnic_dev *vdev, int *status)
  938. {
  939. return vnic_dev_cmd_status(vdev, CMD_ENABLE2, status);
  940. }
  941. int vnic_dev_deinit_done(struct vnic_dev *vdev, int *status)
  942. {
  943. return vnic_dev_cmd_status(vdev, CMD_DEINIT, status);
  944. }
  945. int vnic_dev_set_mac_addr(struct vnic_dev *vdev, u8 *mac_addr)
  946. {
  947. u64 a0, a1;
  948. int wait = 1000;
  949. int i;
  950. for (i = 0; i < ETH_ALEN; i++)
  951. ((u8 *)&a0)[i] = mac_addr[i];
  952. return vnic_dev_cmd(vdev, CMD_SET_MAC_ADDR, &a0, &a1, wait);
  953. }
  954. /* vnic_dev_classifier: Add/Delete classifier entries
  955. * @vdev: vdev of the device
  956. * @cmd: CLSF_ADD for Add filter
  957. * CLSF_DEL for Delete filter
  958. * @entry: In case of ADD filter, the caller passes the RQ number in this
  959. * variable.
  960. *
  961. * This function stores the filter_id returned by the firmware in the
  962. * same variable before return;
  963. *
  964. * In case of DEL filter, the caller passes the RQ number. Return
  965. * value is irrelevant.
  966. * @data: filter data
  967. */
  968. int vnic_dev_classifier(struct vnic_dev *vdev, u8 cmd, u16 *entry,
  969. struct filter *data)
  970. {
  971. u64 a0, a1;
  972. int wait = 1000;
  973. dma_addr_t tlv_pa;
  974. int ret = -EINVAL;
  975. struct filter_tlv *tlv, *tlv_va;
  976. struct filter_action *action;
  977. u64 tlv_size;
  978. if (cmd == CLSF_ADD) {
  979. tlv_size = sizeof(struct filter) +
  980. sizeof(struct filter_action) +
  981. 2 * sizeof(struct filter_tlv);
  982. tlv_va = pci_alloc_consistent(vdev->pdev, tlv_size, &tlv_pa);
  983. if (!tlv_va)
  984. return -ENOMEM;
  985. tlv = tlv_va;
  986. a0 = tlv_pa;
  987. a1 = tlv_size;
  988. memset(tlv, 0, tlv_size);
  989. tlv->type = CLSF_TLV_FILTER;
  990. tlv->length = sizeof(struct filter);
  991. *(struct filter *)&tlv->val = *data;
  992. tlv = (struct filter_tlv *)((char *)tlv +
  993. sizeof(struct filter_tlv) +
  994. sizeof(struct filter));
  995. tlv->type = CLSF_TLV_ACTION;
  996. tlv->length = sizeof(struct filter_action);
  997. action = (struct filter_action *)&tlv->val;
  998. action->type = FILTER_ACTION_RQ_STEERING;
  999. action->u.rq_idx = *entry;
  1000. ret = vnic_dev_cmd(vdev, CMD_ADD_FILTER, &a0, &a1, wait);
  1001. *entry = (u16)a0;
  1002. pci_free_consistent(vdev->pdev, tlv_size, tlv_va, tlv_pa);
  1003. } else if (cmd == CLSF_DEL) {
  1004. a0 = *entry;
  1005. ret = vnic_dev_cmd(vdev, CMD_DEL_FILTER, &a0, &a1, wait);
  1006. }
  1007. return ret;
  1008. }