isp.c 65 KB

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  1. /*
  2. * isp.c
  3. *
  4. * TI OMAP3 ISP - Core
  5. *
  6. * Copyright (C) 2006-2010 Nokia Corporation
  7. * Copyright (C) 2007-2009 Texas Instruments, Inc.
  8. *
  9. * Contacts: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
  10. * Sakari Ailus <sakari.ailus@iki.fi>
  11. *
  12. * Contributors:
  13. * Laurent Pinchart <laurent.pinchart@ideasonboard.com>
  14. * Sakari Ailus <sakari.ailus@iki.fi>
  15. * David Cohen <dacohen@gmail.com>
  16. * Stanimir Varbanov <svarbanov@mm-sol.com>
  17. * Vimarsh Zutshi <vimarsh.zutshi@gmail.com>
  18. * Tuukka Toivonen <tuukkat76@gmail.com>
  19. * Sergio Aguirre <saaguirre@ti.com>
  20. * Antti Koskipaa <akoskipa@gmail.com>
  21. * Ivan T. Ivanov <iivanov@mm-sol.com>
  22. * RaniSuneela <r-m@ti.com>
  23. * Atanas Filipov <afilipov@mm-sol.com>
  24. * Gjorgji Rosikopulos <grosikopulos@mm-sol.com>
  25. * Hiroshi DOYU <hiroshi.doyu@nokia.com>
  26. * Nayden Kanchev <nkanchev@mm-sol.com>
  27. * Phil Carmody <ext-phil.2.carmody@nokia.com>
  28. * Artem Bityutskiy <artem.bityutskiy@nokia.com>
  29. * Dominic Curran <dcurran@ti.com>
  30. * Ilkka Myllyperkio <ilkka.myllyperkio@sofica.fi>
  31. * Pallavi Kulkarni <p-kulkarni@ti.com>
  32. * Vaibhav Hiremath <hvaibhav@ti.com>
  33. * Mohit Jalori <mjalori@ti.com>
  34. * Sameer Venkatraman <sameerv@ti.com>
  35. * Senthilvadivu Guruswamy <svadivu@ti.com>
  36. * Thara Gopinath <thara@ti.com>
  37. * Toni Leinonen <toni.leinonen@nokia.com>
  38. * Troy Laramy <t-laramy@ti.com>
  39. *
  40. * This program is free software; you can redistribute it and/or modify
  41. * it under the terms of the GNU General Public License version 2 as
  42. * published by the Free Software Foundation.
  43. */
  44. #include <asm/cacheflush.h>
  45. #include <linux/clk.h>
  46. #include <linux/clkdev.h>
  47. #include <linux/delay.h>
  48. #include <linux/device.h>
  49. #include <linux/dma-mapping.h>
  50. #include <linux/i2c.h>
  51. #include <linux/interrupt.h>
  52. #include <linux/mfd/syscon.h>
  53. #include <linux/module.h>
  54. #include <linux/omap-iommu.h>
  55. #include <linux/platform_device.h>
  56. #include <linux/regulator/consumer.h>
  57. #include <linux/slab.h>
  58. #include <linux/sched.h>
  59. #include <linux/vmalloc.h>
  60. #include <asm/dma-iommu.h>
  61. #include <media/v4l2-common.h>
  62. #include <media/v4l2-device.h>
  63. #include <media/v4l2-of.h>
  64. #include "isp.h"
  65. #include "ispreg.h"
  66. #include "ispccdc.h"
  67. #include "isppreview.h"
  68. #include "ispresizer.h"
  69. #include "ispcsi2.h"
  70. #include "ispccp2.h"
  71. #include "isph3a.h"
  72. #include "isphist.h"
  73. static unsigned int autoidle;
  74. module_param(autoidle, int, 0444);
  75. MODULE_PARM_DESC(autoidle, "Enable OMAP3ISP AUTOIDLE support");
  76. static void isp_save_ctx(struct isp_device *isp);
  77. static void isp_restore_ctx(struct isp_device *isp);
  78. static const struct isp_res_mapping isp_res_maps[] = {
  79. {
  80. .isp_rev = ISP_REVISION_2_0,
  81. .offset = {
  82. /* first MMIO area */
  83. 0x0000, /* base, len 0x0070 */
  84. 0x0400, /* ccp2, len 0x01f0 */
  85. 0x0600, /* ccdc, len 0x00a8 */
  86. 0x0a00, /* hist, len 0x0048 */
  87. 0x0c00, /* h3a, len 0x0060 */
  88. 0x0e00, /* preview, len 0x00a0 */
  89. 0x1000, /* resizer, len 0x00ac */
  90. 0x1200, /* sbl, len 0x00fc */
  91. /* second MMIO area */
  92. 0x0000, /* csi2a, len 0x0170 */
  93. 0x0170, /* csiphy2, len 0x000c */
  94. },
  95. .phy_type = ISP_PHY_TYPE_3430,
  96. },
  97. {
  98. .isp_rev = ISP_REVISION_15_0,
  99. .offset = {
  100. /* first MMIO area */
  101. 0x0000, /* base, len 0x0070 */
  102. 0x0400, /* ccp2, len 0x01f0 */
  103. 0x0600, /* ccdc, len 0x00a8 */
  104. 0x0a00, /* hist, len 0x0048 */
  105. 0x0c00, /* h3a, len 0x0060 */
  106. 0x0e00, /* preview, len 0x00a0 */
  107. 0x1000, /* resizer, len 0x00ac */
  108. 0x1200, /* sbl, len 0x00fc */
  109. /* second MMIO area */
  110. 0x0000, /* csi2a, len 0x0170 (1st area) */
  111. 0x0170, /* csiphy2, len 0x000c */
  112. 0x01c0, /* csi2a, len 0x0040 (2nd area) */
  113. 0x0400, /* csi2c, len 0x0170 (1st area) */
  114. 0x0570, /* csiphy1, len 0x000c */
  115. 0x05c0, /* csi2c, len 0x0040 (2nd area) */
  116. },
  117. .phy_type = ISP_PHY_TYPE_3630,
  118. },
  119. };
  120. /* Structure for saving/restoring ISP module registers */
  121. static struct isp_reg isp_reg_list[] = {
  122. {OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG, 0},
  123. {OMAP3_ISP_IOMEM_MAIN, ISP_CTRL, 0},
  124. {OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL, 0},
  125. {0, ISP_TOK_TERM, 0}
  126. };
  127. /*
  128. * omap3isp_flush - Post pending L3 bus writes by doing a register readback
  129. * @isp: OMAP3 ISP device
  130. *
  131. * In order to force posting of pending writes, we need to write and
  132. * readback the same register, in this case the revision register.
  133. *
  134. * See this link for reference:
  135. * http://www.mail-archive.com/linux-omap@vger.kernel.org/msg08149.html
  136. */
  137. void omap3isp_flush(struct isp_device *isp)
  138. {
  139. isp_reg_writel(isp, 0, OMAP3_ISP_IOMEM_MAIN, ISP_REVISION);
  140. isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_REVISION);
  141. }
  142. /* -----------------------------------------------------------------------------
  143. * XCLK
  144. */
  145. #define to_isp_xclk(_hw) container_of(_hw, struct isp_xclk, hw)
  146. static void isp_xclk_update(struct isp_xclk *xclk, u32 divider)
  147. {
  148. switch (xclk->id) {
  149. case ISP_XCLK_A:
  150. isp_reg_clr_set(xclk->isp, OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL,
  151. ISPTCTRL_CTRL_DIVA_MASK,
  152. divider << ISPTCTRL_CTRL_DIVA_SHIFT);
  153. break;
  154. case ISP_XCLK_B:
  155. isp_reg_clr_set(xclk->isp, OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL,
  156. ISPTCTRL_CTRL_DIVB_MASK,
  157. divider << ISPTCTRL_CTRL_DIVB_SHIFT);
  158. break;
  159. }
  160. }
  161. static int isp_xclk_prepare(struct clk_hw *hw)
  162. {
  163. struct isp_xclk *xclk = to_isp_xclk(hw);
  164. omap3isp_get(xclk->isp);
  165. return 0;
  166. }
  167. static void isp_xclk_unprepare(struct clk_hw *hw)
  168. {
  169. struct isp_xclk *xclk = to_isp_xclk(hw);
  170. omap3isp_put(xclk->isp);
  171. }
  172. static int isp_xclk_enable(struct clk_hw *hw)
  173. {
  174. struct isp_xclk *xclk = to_isp_xclk(hw);
  175. unsigned long flags;
  176. spin_lock_irqsave(&xclk->lock, flags);
  177. isp_xclk_update(xclk, xclk->divider);
  178. xclk->enabled = true;
  179. spin_unlock_irqrestore(&xclk->lock, flags);
  180. return 0;
  181. }
  182. static void isp_xclk_disable(struct clk_hw *hw)
  183. {
  184. struct isp_xclk *xclk = to_isp_xclk(hw);
  185. unsigned long flags;
  186. spin_lock_irqsave(&xclk->lock, flags);
  187. isp_xclk_update(xclk, 0);
  188. xclk->enabled = false;
  189. spin_unlock_irqrestore(&xclk->lock, flags);
  190. }
  191. static unsigned long isp_xclk_recalc_rate(struct clk_hw *hw,
  192. unsigned long parent_rate)
  193. {
  194. struct isp_xclk *xclk = to_isp_xclk(hw);
  195. return parent_rate / xclk->divider;
  196. }
  197. static u32 isp_xclk_calc_divider(unsigned long *rate, unsigned long parent_rate)
  198. {
  199. u32 divider;
  200. if (*rate >= parent_rate) {
  201. *rate = parent_rate;
  202. return ISPTCTRL_CTRL_DIV_BYPASS;
  203. }
  204. if (*rate == 0)
  205. *rate = 1;
  206. divider = DIV_ROUND_CLOSEST(parent_rate, *rate);
  207. if (divider >= ISPTCTRL_CTRL_DIV_BYPASS)
  208. divider = ISPTCTRL_CTRL_DIV_BYPASS - 1;
  209. *rate = parent_rate / divider;
  210. return divider;
  211. }
  212. static long isp_xclk_round_rate(struct clk_hw *hw, unsigned long rate,
  213. unsigned long *parent_rate)
  214. {
  215. isp_xclk_calc_divider(&rate, *parent_rate);
  216. return rate;
  217. }
  218. static int isp_xclk_set_rate(struct clk_hw *hw, unsigned long rate,
  219. unsigned long parent_rate)
  220. {
  221. struct isp_xclk *xclk = to_isp_xclk(hw);
  222. unsigned long flags;
  223. u32 divider;
  224. divider = isp_xclk_calc_divider(&rate, parent_rate);
  225. spin_lock_irqsave(&xclk->lock, flags);
  226. xclk->divider = divider;
  227. if (xclk->enabled)
  228. isp_xclk_update(xclk, divider);
  229. spin_unlock_irqrestore(&xclk->lock, flags);
  230. dev_dbg(xclk->isp->dev, "%s: cam_xclk%c set to %lu Hz (div %u)\n",
  231. __func__, xclk->id == ISP_XCLK_A ? 'a' : 'b', rate, divider);
  232. return 0;
  233. }
  234. static const struct clk_ops isp_xclk_ops = {
  235. .prepare = isp_xclk_prepare,
  236. .unprepare = isp_xclk_unprepare,
  237. .enable = isp_xclk_enable,
  238. .disable = isp_xclk_disable,
  239. .recalc_rate = isp_xclk_recalc_rate,
  240. .round_rate = isp_xclk_round_rate,
  241. .set_rate = isp_xclk_set_rate,
  242. };
  243. static const char *isp_xclk_parent_name = "cam_mclk";
  244. static const struct clk_init_data isp_xclk_init_data = {
  245. .name = "cam_xclk",
  246. .ops = &isp_xclk_ops,
  247. .parent_names = &isp_xclk_parent_name,
  248. .num_parents = 1,
  249. };
  250. static struct clk *isp_xclk_src_get(struct of_phandle_args *clkspec, void *data)
  251. {
  252. unsigned int idx = clkspec->args[0];
  253. struct isp_device *isp = data;
  254. if (idx >= ARRAY_SIZE(isp->xclks))
  255. return ERR_PTR(-ENOENT);
  256. return isp->xclks[idx].clk;
  257. }
  258. static int isp_xclk_init(struct isp_device *isp)
  259. {
  260. struct device_node *np = isp->dev->of_node;
  261. struct clk_init_data init;
  262. unsigned int i;
  263. for (i = 0; i < ARRAY_SIZE(isp->xclks); ++i)
  264. isp->xclks[i].clk = ERR_PTR(-EINVAL);
  265. for (i = 0; i < ARRAY_SIZE(isp->xclks); ++i) {
  266. struct isp_xclk *xclk = &isp->xclks[i];
  267. xclk->isp = isp;
  268. xclk->id = i == 0 ? ISP_XCLK_A : ISP_XCLK_B;
  269. xclk->divider = 1;
  270. spin_lock_init(&xclk->lock);
  271. init.name = i == 0 ? "cam_xclka" : "cam_xclkb";
  272. init.ops = &isp_xclk_ops;
  273. init.parent_names = &isp_xclk_parent_name;
  274. init.num_parents = 1;
  275. xclk->hw.init = &init;
  276. /*
  277. * The first argument is NULL in order to avoid circular
  278. * reference, as this driver takes reference on the
  279. * sensor subdevice modules and the sensors would take
  280. * reference on this module through clk_get().
  281. */
  282. xclk->clk = clk_register(NULL, &xclk->hw);
  283. if (IS_ERR(xclk->clk))
  284. return PTR_ERR(xclk->clk);
  285. }
  286. if (np)
  287. of_clk_add_provider(np, isp_xclk_src_get, isp);
  288. return 0;
  289. }
  290. static void isp_xclk_cleanup(struct isp_device *isp)
  291. {
  292. struct device_node *np = isp->dev->of_node;
  293. unsigned int i;
  294. if (np)
  295. of_clk_del_provider(np);
  296. for (i = 0; i < ARRAY_SIZE(isp->xclks); ++i) {
  297. struct isp_xclk *xclk = &isp->xclks[i];
  298. if (!IS_ERR(xclk->clk))
  299. clk_unregister(xclk->clk);
  300. }
  301. }
  302. /* -----------------------------------------------------------------------------
  303. * Interrupts
  304. */
  305. /*
  306. * isp_enable_interrupts - Enable ISP interrupts.
  307. * @isp: OMAP3 ISP device
  308. */
  309. static void isp_enable_interrupts(struct isp_device *isp)
  310. {
  311. static const u32 irq = IRQ0ENABLE_CSIA_IRQ
  312. | IRQ0ENABLE_CSIB_IRQ
  313. | IRQ0ENABLE_CCDC_LSC_PREF_ERR_IRQ
  314. | IRQ0ENABLE_CCDC_LSC_DONE_IRQ
  315. | IRQ0ENABLE_CCDC_VD0_IRQ
  316. | IRQ0ENABLE_CCDC_VD1_IRQ
  317. | IRQ0ENABLE_HS_VS_IRQ
  318. | IRQ0ENABLE_HIST_DONE_IRQ
  319. | IRQ0ENABLE_H3A_AWB_DONE_IRQ
  320. | IRQ0ENABLE_H3A_AF_DONE_IRQ
  321. | IRQ0ENABLE_PRV_DONE_IRQ
  322. | IRQ0ENABLE_RSZ_DONE_IRQ;
  323. isp_reg_writel(isp, irq, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
  324. isp_reg_writel(isp, irq, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0ENABLE);
  325. }
  326. /*
  327. * isp_disable_interrupts - Disable ISP interrupts.
  328. * @isp: OMAP3 ISP device
  329. */
  330. static void isp_disable_interrupts(struct isp_device *isp)
  331. {
  332. isp_reg_writel(isp, 0, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0ENABLE);
  333. }
  334. /*
  335. * isp_core_init - ISP core settings
  336. * @isp: OMAP3 ISP device
  337. * @idle: Consider idle state.
  338. *
  339. * Set the power settings for the ISP and SBL bus and configure the HS/VS
  340. * interrupt source.
  341. *
  342. * We need to configure the HS/VS interrupt source before interrupts get
  343. * enabled, as the sensor might be free-running and the ISP default setting
  344. * (HS edge) would put an unnecessary burden on the CPU.
  345. */
  346. static void isp_core_init(struct isp_device *isp, int idle)
  347. {
  348. isp_reg_writel(isp,
  349. ((idle ? ISP_SYSCONFIG_MIDLEMODE_SMARTSTANDBY :
  350. ISP_SYSCONFIG_MIDLEMODE_FORCESTANDBY) <<
  351. ISP_SYSCONFIG_MIDLEMODE_SHIFT) |
  352. ((isp->revision == ISP_REVISION_15_0) ?
  353. ISP_SYSCONFIG_AUTOIDLE : 0),
  354. OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG);
  355. isp_reg_writel(isp,
  356. (isp->autoidle ? ISPCTRL_SBL_AUTOIDLE : 0) |
  357. ISPCTRL_SYNC_DETECT_VSRISE,
  358. OMAP3_ISP_IOMEM_MAIN, ISP_CTRL);
  359. }
  360. /*
  361. * Configure the bridge and lane shifter. Valid inputs are
  362. *
  363. * CCDC_INPUT_PARALLEL: Parallel interface
  364. * CCDC_INPUT_CSI2A: CSI2a receiver
  365. * CCDC_INPUT_CCP2B: CCP2b receiver
  366. * CCDC_INPUT_CSI2C: CSI2c receiver
  367. *
  368. * The bridge and lane shifter are configured according to the selected input
  369. * and the ISP platform data.
  370. */
  371. void omap3isp_configure_bridge(struct isp_device *isp,
  372. enum ccdc_input_entity input,
  373. const struct isp_parallel_cfg *parcfg,
  374. unsigned int shift, unsigned int bridge)
  375. {
  376. u32 ispctrl_val;
  377. ispctrl_val = isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL);
  378. ispctrl_val &= ~ISPCTRL_SHIFT_MASK;
  379. ispctrl_val &= ~ISPCTRL_PAR_CLK_POL_INV;
  380. ispctrl_val &= ~ISPCTRL_PAR_SER_CLK_SEL_MASK;
  381. ispctrl_val &= ~ISPCTRL_PAR_BRIDGE_MASK;
  382. ispctrl_val |= bridge;
  383. switch (input) {
  384. case CCDC_INPUT_PARALLEL:
  385. ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_PARALLEL;
  386. ispctrl_val |= parcfg->clk_pol << ISPCTRL_PAR_CLK_POL_SHIFT;
  387. shift += parcfg->data_lane_shift * 2;
  388. break;
  389. case CCDC_INPUT_CSI2A:
  390. ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_CSIA;
  391. break;
  392. case CCDC_INPUT_CCP2B:
  393. ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_CSIB;
  394. break;
  395. case CCDC_INPUT_CSI2C:
  396. ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_CSIC;
  397. break;
  398. default:
  399. return;
  400. }
  401. ispctrl_val |= ((shift/2) << ISPCTRL_SHIFT_SHIFT) & ISPCTRL_SHIFT_MASK;
  402. isp_reg_writel(isp, ispctrl_val, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL);
  403. }
  404. void omap3isp_hist_dma_done(struct isp_device *isp)
  405. {
  406. if (omap3isp_ccdc_busy(&isp->isp_ccdc) ||
  407. omap3isp_stat_pcr_busy(&isp->isp_hist)) {
  408. /* Histogram cannot be enabled in this frame anymore */
  409. atomic_set(&isp->isp_hist.buf_err, 1);
  410. dev_dbg(isp->dev, "hist: Out of synchronization with "
  411. "CCDC. Ignoring next buffer.\n");
  412. }
  413. }
  414. static inline void isp_isr_dbg(struct isp_device *isp, u32 irqstatus)
  415. {
  416. static const char *name[] = {
  417. "CSIA_IRQ",
  418. "res1",
  419. "res2",
  420. "CSIB_LCM_IRQ",
  421. "CSIB_IRQ",
  422. "res5",
  423. "res6",
  424. "res7",
  425. "CCDC_VD0_IRQ",
  426. "CCDC_VD1_IRQ",
  427. "CCDC_VD2_IRQ",
  428. "CCDC_ERR_IRQ",
  429. "H3A_AF_DONE_IRQ",
  430. "H3A_AWB_DONE_IRQ",
  431. "res14",
  432. "res15",
  433. "HIST_DONE_IRQ",
  434. "CCDC_LSC_DONE",
  435. "CCDC_LSC_PREFETCH_COMPLETED",
  436. "CCDC_LSC_PREFETCH_ERROR",
  437. "PRV_DONE_IRQ",
  438. "CBUFF_IRQ",
  439. "res22",
  440. "res23",
  441. "RSZ_DONE_IRQ",
  442. "OVF_IRQ",
  443. "res26",
  444. "res27",
  445. "MMU_ERR_IRQ",
  446. "OCP_ERR_IRQ",
  447. "SEC_ERR_IRQ",
  448. "HS_VS_IRQ",
  449. };
  450. int i;
  451. dev_dbg(isp->dev, "ISP IRQ: ");
  452. for (i = 0; i < ARRAY_SIZE(name); i++) {
  453. if ((1 << i) & irqstatus)
  454. printk(KERN_CONT "%s ", name[i]);
  455. }
  456. printk(KERN_CONT "\n");
  457. }
  458. static void isp_isr_sbl(struct isp_device *isp)
  459. {
  460. struct device *dev = isp->dev;
  461. struct isp_pipeline *pipe;
  462. u32 sbl_pcr;
  463. /*
  464. * Handle shared buffer logic overflows for video buffers.
  465. * ISPSBL_PCR_CCDCPRV_2_RSZ_OVF can be safely ignored.
  466. */
  467. sbl_pcr = isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_PCR);
  468. isp_reg_writel(isp, sbl_pcr, OMAP3_ISP_IOMEM_SBL, ISPSBL_PCR);
  469. sbl_pcr &= ~ISPSBL_PCR_CCDCPRV_2_RSZ_OVF;
  470. if (sbl_pcr)
  471. dev_dbg(dev, "SBL overflow (PCR = 0x%08x)\n", sbl_pcr);
  472. if (sbl_pcr & ISPSBL_PCR_CSIB_WBL_OVF) {
  473. pipe = to_isp_pipeline(&isp->isp_ccp2.subdev.entity);
  474. if (pipe != NULL)
  475. pipe->error = true;
  476. }
  477. if (sbl_pcr & ISPSBL_PCR_CSIA_WBL_OVF) {
  478. pipe = to_isp_pipeline(&isp->isp_csi2a.subdev.entity);
  479. if (pipe != NULL)
  480. pipe->error = true;
  481. }
  482. if (sbl_pcr & ISPSBL_PCR_CCDC_WBL_OVF) {
  483. pipe = to_isp_pipeline(&isp->isp_ccdc.subdev.entity);
  484. if (pipe != NULL)
  485. pipe->error = true;
  486. }
  487. if (sbl_pcr & ISPSBL_PCR_PRV_WBL_OVF) {
  488. pipe = to_isp_pipeline(&isp->isp_prev.subdev.entity);
  489. if (pipe != NULL)
  490. pipe->error = true;
  491. }
  492. if (sbl_pcr & (ISPSBL_PCR_RSZ1_WBL_OVF
  493. | ISPSBL_PCR_RSZ2_WBL_OVF
  494. | ISPSBL_PCR_RSZ3_WBL_OVF
  495. | ISPSBL_PCR_RSZ4_WBL_OVF)) {
  496. pipe = to_isp_pipeline(&isp->isp_res.subdev.entity);
  497. if (pipe != NULL)
  498. pipe->error = true;
  499. }
  500. if (sbl_pcr & ISPSBL_PCR_H3A_AF_WBL_OVF)
  501. omap3isp_stat_sbl_overflow(&isp->isp_af);
  502. if (sbl_pcr & ISPSBL_PCR_H3A_AEAWB_WBL_OVF)
  503. omap3isp_stat_sbl_overflow(&isp->isp_aewb);
  504. }
  505. /*
  506. * isp_isr - Interrupt Service Routine for Camera ISP module.
  507. * @irq: Not used currently.
  508. * @_isp: Pointer to the OMAP3 ISP device
  509. *
  510. * Handles the corresponding callback if plugged in.
  511. */
  512. static irqreturn_t isp_isr(int irq, void *_isp)
  513. {
  514. static const u32 ccdc_events = IRQ0STATUS_CCDC_LSC_PREF_ERR_IRQ |
  515. IRQ0STATUS_CCDC_LSC_DONE_IRQ |
  516. IRQ0STATUS_CCDC_VD0_IRQ |
  517. IRQ0STATUS_CCDC_VD1_IRQ |
  518. IRQ0STATUS_HS_VS_IRQ;
  519. struct isp_device *isp = _isp;
  520. u32 irqstatus;
  521. irqstatus = isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
  522. isp_reg_writel(isp, irqstatus, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
  523. isp_isr_sbl(isp);
  524. if (irqstatus & IRQ0STATUS_CSIA_IRQ)
  525. omap3isp_csi2_isr(&isp->isp_csi2a);
  526. if (irqstatus & IRQ0STATUS_CSIB_IRQ)
  527. omap3isp_ccp2_isr(&isp->isp_ccp2);
  528. if (irqstatus & IRQ0STATUS_CCDC_VD0_IRQ) {
  529. if (isp->isp_ccdc.output & CCDC_OUTPUT_PREVIEW)
  530. omap3isp_preview_isr_frame_sync(&isp->isp_prev);
  531. if (isp->isp_ccdc.output & CCDC_OUTPUT_RESIZER)
  532. omap3isp_resizer_isr_frame_sync(&isp->isp_res);
  533. omap3isp_stat_isr_frame_sync(&isp->isp_aewb);
  534. omap3isp_stat_isr_frame_sync(&isp->isp_af);
  535. omap3isp_stat_isr_frame_sync(&isp->isp_hist);
  536. }
  537. if (irqstatus & ccdc_events)
  538. omap3isp_ccdc_isr(&isp->isp_ccdc, irqstatus & ccdc_events);
  539. if (irqstatus & IRQ0STATUS_PRV_DONE_IRQ) {
  540. if (isp->isp_prev.output & PREVIEW_OUTPUT_RESIZER)
  541. omap3isp_resizer_isr_frame_sync(&isp->isp_res);
  542. omap3isp_preview_isr(&isp->isp_prev);
  543. }
  544. if (irqstatus & IRQ0STATUS_RSZ_DONE_IRQ)
  545. omap3isp_resizer_isr(&isp->isp_res);
  546. if (irqstatus & IRQ0STATUS_H3A_AWB_DONE_IRQ)
  547. omap3isp_stat_isr(&isp->isp_aewb);
  548. if (irqstatus & IRQ0STATUS_H3A_AF_DONE_IRQ)
  549. omap3isp_stat_isr(&isp->isp_af);
  550. if (irqstatus & IRQ0STATUS_HIST_DONE_IRQ)
  551. omap3isp_stat_isr(&isp->isp_hist);
  552. omap3isp_flush(isp);
  553. #if defined(DEBUG) && defined(ISP_ISR_DEBUG)
  554. isp_isr_dbg(isp, irqstatus);
  555. #endif
  556. return IRQ_HANDLED;
  557. }
  558. /* -----------------------------------------------------------------------------
  559. * Pipeline power management
  560. *
  561. * Entities must be powered up when part of a pipeline that contains at least
  562. * one open video device node.
  563. *
  564. * To achieve this use the entity use_count field to track the number of users.
  565. * For entities corresponding to video device nodes the use_count field stores
  566. * the users count of the node. For entities corresponding to subdevs the
  567. * use_count field stores the total number of users of all video device nodes
  568. * in the pipeline.
  569. *
  570. * The omap3isp_pipeline_pm_use() function must be called in the open() and
  571. * close() handlers of video device nodes. It increments or decrements the use
  572. * count of all subdev entities in the pipeline.
  573. *
  574. * To react to link management on powered pipelines, the link setup notification
  575. * callback updates the use count of all entities in the source and sink sides
  576. * of the link.
  577. */
  578. /*
  579. * isp_pipeline_pm_use_count - Count the number of users of a pipeline
  580. * @entity: The entity
  581. *
  582. * Return the total number of users of all video device nodes in the pipeline.
  583. */
  584. static int isp_pipeline_pm_use_count(struct media_entity *entity)
  585. {
  586. struct media_entity_graph graph;
  587. int use = 0;
  588. media_entity_graph_walk_start(&graph, entity);
  589. while ((entity = media_entity_graph_walk_next(&graph))) {
  590. if (media_entity_type(entity) == MEDIA_ENT_T_DEVNODE)
  591. use += entity->use_count;
  592. }
  593. return use;
  594. }
  595. /*
  596. * isp_pipeline_pm_power_one - Apply power change to an entity
  597. * @entity: The entity
  598. * @change: Use count change
  599. *
  600. * Change the entity use count by @change. If the entity is a subdev update its
  601. * power state by calling the core::s_power operation when the use count goes
  602. * from 0 to != 0 or from != 0 to 0.
  603. *
  604. * Return 0 on success or a negative error code on failure.
  605. */
  606. static int isp_pipeline_pm_power_one(struct media_entity *entity, int change)
  607. {
  608. struct v4l2_subdev *subdev;
  609. int ret;
  610. subdev = media_entity_type(entity) == MEDIA_ENT_T_V4L2_SUBDEV
  611. ? media_entity_to_v4l2_subdev(entity) : NULL;
  612. if (entity->use_count == 0 && change > 0 && subdev != NULL) {
  613. ret = v4l2_subdev_call(subdev, core, s_power, 1);
  614. if (ret < 0 && ret != -ENOIOCTLCMD)
  615. return ret;
  616. }
  617. entity->use_count += change;
  618. WARN_ON(entity->use_count < 0);
  619. if (entity->use_count == 0 && change < 0 && subdev != NULL)
  620. v4l2_subdev_call(subdev, core, s_power, 0);
  621. return 0;
  622. }
  623. /*
  624. * isp_pipeline_pm_power - Apply power change to all entities in a pipeline
  625. * @entity: The entity
  626. * @change: Use count change
  627. *
  628. * Walk the pipeline to update the use count and the power state of all non-node
  629. * entities.
  630. *
  631. * Return 0 on success or a negative error code on failure.
  632. */
  633. static int isp_pipeline_pm_power(struct media_entity *entity, int change)
  634. {
  635. struct media_entity_graph graph;
  636. struct media_entity *first = entity;
  637. int ret = 0;
  638. if (!change)
  639. return 0;
  640. media_entity_graph_walk_start(&graph, entity);
  641. while (!ret && (entity = media_entity_graph_walk_next(&graph)))
  642. if (media_entity_type(entity) != MEDIA_ENT_T_DEVNODE)
  643. ret = isp_pipeline_pm_power_one(entity, change);
  644. if (!ret)
  645. return 0;
  646. media_entity_graph_walk_start(&graph, first);
  647. while ((first = media_entity_graph_walk_next(&graph))
  648. && first != entity)
  649. if (media_entity_type(first) != MEDIA_ENT_T_DEVNODE)
  650. isp_pipeline_pm_power_one(first, -change);
  651. return ret;
  652. }
  653. /*
  654. * omap3isp_pipeline_pm_use - Update the use count of an entity
  655. * @entity: The entity
  656. * @use: Use (1) or stop using (0) the entity
  657. *
  658. * Update the use count of all entities in the pipeline and power entities on or
  659. * off accordingly.
  660. *
  661. * Return 0 on success or a negative error code on failure. Powering entities
  662. * off is assumed to never fail. No failure can occur when the use parameter is
  663. * set to 0.
  664. */
  665. int omap3isp_pipeline_pm_use(struct media_entity *entity, int use)
  666. {
  667. int change = use ? 1 : -1;
  668. int ret;
  669. mutex_lock(&entity->parent->graph_mutex);
  670. /* Apply use count to node. */
  671. entity->use_count += change;
  672. WARN_ON(entity->use_count < 0);
  673. /* Apply power change to connected non-nodes. */
  674. ret = isp_pipeline_pm_power(entity, change);
  675. if (ret < 0)
  676. entity->use_count -= change;
  677. mutex_unlock(&entity->parent->graph_mutex);
  678. return ret;
  679. }
  680. /*
  681. * isp_pipeline_link_notify - Link management notification callback
  682. * @link: The link
  683. * @flags: New link flags that will be applied
  684. * @notification: The link's state change notification type (MEDIA_DEV_NOTIFY_*)
  685. *
  686. * React to link management on powered pipelines by updating the use count of
  687. * all entities in the source and sink sides of the link. Entities are powered
  688. * on or off accordingly.
  689. *
  690. * Return 0 on success or a negative error code on failure. Powering entities
  691. * off is assumed to never fail. This function will not fail for disconnection
  692. * events.
  693. */
  694. static int isp_pipeline_link_notify(struct media_link *link, u32 flags,
  695. unsigned int notification)
  696. {
  697. struct media_entity *source = link->source->entity;
  698. struct media_entity *sink = link->sink->entity;
  699. int source_use = isp_pipeline_pm_use_count(source);
  700. int sink_use = isp_pipeline_pm_use_count(sink);
  701. int ret;
  702. if (notification == MEDIA_DEV_NOTIFY_POST_LINK_CH &&
  703. !(flags & MEDIA_LNK_FL_ENABLED)) {
  704. /* Powering off entities is assumed to never fail. */
  705. isp_pipeline_pm_power(source, -sink_use);
  706. isp_pipeline_pm_power(sink, -source_use);
  707. return 0;
  708. }
  709. if (notification == MEDIA_DEV_NOTIFY_PRE_LINK_CH &&
  710. (flags & MEDIA_LNK_FL_ENABLED)) {
  711. ret = isp_pipeline_pm_power(source, sink_use);
  712. if (ret < 0)
  713. return ret;
  714. ret = isp_pipeline_pm_power(sink, source_use);
  715. if (ret < 0)
  716. isp_pipeline_pm_power(source, -sink_use);
  717. return ret;
  718. }
  719. return 0;
  720. }
  721. /* -----------------------------------------------------------------------------
  722. * Pipeline stream management
  723. */
  724. /*
  725. * isp_pipeline_enable - Enable streaming on a pipeline
  726. * @pipe: ISP pipeline
  727. * @mode: Stream mode (single shot or continuous)
  728. *
  729. * Walk the entities chain starting at the pipeline output video node and start
  730. * all modules in the chain in the given mode.
  731. *
  732. * Return 0 if successful, or the return value of the failed video::s_stream
  733. * operation otherwise.
  734. */
  735. static int isp_pipeline_enable(struct isp_pipeline *pipe,
  736. enum isp_pipeline_stream_state mode)
  737. {
  738. struct isp_device *isp = pipe->output->isp;
  739. struct media_entity *entity;
  740. struct media_pad *pad;
  741. struct v4l2_subdev *subdev;
  742. unsigned long flags;
  743. int ret;
  744. /* Refuse to start streaming if an entity included in the pipeline has
  745. * crashed. This check must be performed before the loop below to avoid
  746. * starting entities if the pipeline won't start anyway (those entities
  747. * would then likely fail to stop, making the problem worse).
  748. */
  749. if (pipe->entities & isp->crashed)
  750. return -EIO;
  751. spin_lock_irqsave(&pipe->lock, flags);
  752. pipe->state &= ~(ISP_PIPELINE_IDLE_INPUT | ISP_PIPELINE_IDLE_OUTPUT);
  753. spin_unlock_irqrestore(&pipe->lock, flags);
  754. pipe->do_propagation = false;
  755. entity = &pipe->output->video.entity;
  756. while (1) {
  757. pad = &entity->pads[0];
  758. if (!(pad->flags & MEDIA_PAD_FL_SINK))
  759. break;
  760. pad = media_entity_remote_pad(pad);
  761. if (pad == NULL ||
  762. media_entity_type(pad->entity) != MEDIA_ENT_T_V4L2_SUBDEV)
  763. break;
  764. entity = pad->entity;
  765. subdev = media_entity_to_v4l2_subdev(entity);
  766. ret = v4l2_subdev_call(subdev, video, s_stream, mode);
  767. if (ret < 0 && ret != -ENOIOCTLCMD)
  768. return ret;
  769. if (subdev == &isp->isp_ccdc.subdev) {
  770. v4l2_subdev_call(&isp->isp_aewb.subdev, video,
  771. s_stream, mode);
  772. v4l2_subdev_call(&isp->isp_af.subdev, video,
  773. s_stream, mode);
  774. v4l2_subdev_call(&isp->isp_hist.subdev, video,
  775. s_stream, mode);
  776. pipe->do_propagation = true;
  777. }
  778. }
  779. return 0;
  780. }
  781. static int isp_pipeline_wait_resizer(struct isp_device *isp)
  782. {
  783. return omap3isp_resizer_busy(&isp->isp_res);
  784. }
  785. static int isp_pipeline_wait_preview(struct isp_device *isp)
  786. {
  787. return omap3isp_preview_busy(&isp->isp_prev);
  788. }
  789. static int isp_pipeline_wait_ccdc(struct isp_device *isp)
  790. {
  791. return omap3isp_stat_busy(&isp->isp_af)
  792. || omap3isp_stat_busy(&isp->isp_aewb)
  793. || omap3isp_stat_busy(&isp->isp_hist)
  794. || omap3isp_ccdc_busy(&isp->isp_ccdc);
  795. }
  796. #define ISP_STOP_TIMEOUT msecs_to_jiffies(1000)
  797. static int isp_pipeline_wait(struct isp_device *isp,
  798. int(*busy)(struct isp_device *isp))
  799. {
  800. unsigned long timeout = jiffies + ISP_STOP_TIMEOUT;
  801. while (!time_after(jiffies, timeout)) {
  802. if (!busy(isp))
  803. return 0;
  804. }
  805. return 1;
  806. }
  807. /*
  808. * isp_pipeline_disable - Disable streaming on a pipeline
  809. * @pipe: ISP pipeline
  810. *
  811. * Walk the entities chain starting at the pipeline output video node and stop
  812. * all modules in the chain. Wait synchronously for the modules to be stopped if
  813. * necessary.
  814. *
  815. * Return 0 if all modules have been properly stopped, or -ETIMEDOUT if a module
  816. * can't be stopped (in which case a software reset of the ISP is probably
  817. * necessary).
  818. */
  819. static int isp_pipeline_disable(struct isp_pipeline *pipe)
  820. {
  821. struct isp_device *isp = pipe->output->isp;
  822. struct media_entity *entity;
  823. struct media_pad *pad;
  824. struct v4l2_subdev *subdev;
  825. int failure = 0;
  826. int ret;
  827. /*
  828. * We need to stop all the modules after CCDC first or they'll
  829. * never stop since they may not get a full frame from CCDC.
  830. */
  831. entity = &pipe->output->video.entity;
  832. while (1) {
  833. pad = &entity->pads[0];
  834. if (!(pad->flags & MEDIA_PAD_FL_SINK))
  835. break;
  836. pad = media_entity_remote_pad(pad);
  837. if (pad == NULL ||
  838. media_entity_type(pad->entity) != MEDIA_ENT_T_V4L2_SUBDEV)
  839. break;
  840. entity = pad->entity;
  841. subdev = media_entity_to_v4l2_subdev(entity);
  842. if (subdev == &isp->isp_ccdc.subdev) {
  843. v4l2_subdev_call(&isp->isp_aewb.subdev,
  844. video, s_stream, 0);
  845. v4l2_subdev_call(&isp->isp_af.subdev,
  846. video, s_stream, 0);
  847. v4l2_subdev_call(&isp->isp_hist.subdev,
  848. video, s_stream, 0);
  849. }
  850. ret = v4l2_subdev_call(subdev, video, s_stream, 0);
  851. if (subdev == &isp->isp_res.subdev)
  852. ret |= isp_pipeline_wait(isp, isp_pipeline_wait_resizer);
  853. else if (subdev == &isp->isp_prev.subdev)
  854. ret |= isp_pipeline_wait(isp, isp_pipeline_wait_preview);
  855. else if (subdev == &isp->isp_ccdc.subdev)
  856. ret |= isp_pipeline_wait(isp, isp_pipeline_wait_ccdc);
  857. /* Handle stop failures. An entity that fails to stop can
  858. * usually just be restarted. Flag the stop failure nonetheless
  859. * to trigger an ISP reset the next time the device is released,
  860. * just in case.
  861. *
  862. * The preview engine is a special case. A failure to stop can
  863. * mean a hardware crash. When that happens the preview engine
  864. * won't respond to read/write operations on the L4 bus anymore,
  865. * resulting in a bus fault and a kernel oops next time it gets
  866. * accessed. Mark it as crashed to prevent pipelines including
  867. * it from being started.
  868. */
  869. if (ret) {
  870. dev_info(isp->dev, "Unable to stop %s\n", subdev->name);
  871. isp->stop_failure = true;
  872. if (subdev == &isp->isp_prev.subdev)
  873. isp->crashed |= 1U << subdev->entity.id;
  874. failure = -ETIMEDOUT;
  875. }
  876. }
  877. return failure;
  878. }
  879. /*
  880. * omap3isp_pipeline_set_stream - Enable/disable streaming on a pipeline
  881. * @pipe: ISP pipeline
  882. * @state: Stream state (stopped, single shot or continuous)
  883. *
  884. * Set the pipeline to the given stream state. Pipelines can be started in
  885. * single-shot or continuous mode.
  886. *
  887. * Return 0 if successful, or the return value of the failed video::s_stream
  888. * operation otherwise. The pipeline state is not updated when the operation
  889. * fails, except when stopping the pipeline.
  890. */
  891. int omap3isp_pipeline_set_stream(struct isp_pipeline *pipe,
  892. enum isp_pipeline_stream_state state)
  893. {
  894. int ret;
  895. if (state == ISP_PIPELINE_STREAM_STOPPED)
  896. ret = isp_pipeline_disable(pipe);
  897. else
  898. ret = isp_pipeline_enable(pipe, state);
  899. if (ret == 0 || state == ISP_PIPELINE_STREAM_STOPPED)
  900. pipe->stream_state = state;
  901. return ret;
  902. }
  903. /*
  904. * omap3isp_pipeline_cancel_stream - Cancel stream on a pipeline
  905. * @pipe: ISP pipeline
  906. *
  907. * Cancelling a stream mark all buffers on all video nodes in the pipeline as
  908. * erroneous and makes sure no new buffer can be queued. This function is called
  909. * when a fatal error that prevents any further operation on the pipeline
  910. * occurs.
  911. */
  912. void omap3isp_pipeline_cancel_stream(struct isp_pipeline *pipe)
  913. {
  914. if (pipe->input)
  915. omap3isp_video_cancel_stream(pipe->input);
  916. if (pipe->output)
  917. omap3isp_video_cancel_stream(pipe->output);
  918. }
  919. /*
  920. * isp_pipeline_resume - Resume streaming on a pipeline
  921. * @pipe: ISP pipeline
  922. *
  923. * Resume video output and input and re-enable pipeline.
  924. */
  925. static void isp_pipeline_resume(struct isp_pipeline *pipe)
  926. {
  927. int singleshot = pipe->stream_state == ISP_PIPELINE_STREAM_SINGLESHOT;
  928. omap3isp_video_resume(pipe->output, !singleshot);
  929. if (singleshot)
  930. omap3isp_video_resume(pipe->input, 0);
  931. isp_pipeline_enable(pipe, pipe->stream_state);
  932. }
  933. /*
  934. * isp_pipeline_suspend - Suspend streaming on a pipeline
  935. * @pipe: ISP pipeline
  936. *
  937. * Suspend pipeline.
  938. */
  939. static void isp_pipeline_suspend(struct isp_pipeline *pipe)
  940. {
  941. isp_pipeline_disable(pipe);
  942. }
  943. /*
  944. * isp_pipeline_is_last - Verify if entity has an enabled link to the output
  945. * video node
  946. * @me: ISP module's media entity
  947. *
  948. * Returns 1 if the entity has an enabled link to the output video node or 0
  949. * otherwise. It's true only while pipeline can have no more than one output
  950. * node.
  951. */
  952. static int isp_pipeline_is_last(struct media_entity *me)
  953. {
  954. struct isp_pipeline *pipe;
  955. struct media_pad *pad;
  956. if (!me->pipe)
  957. return 0;
  958. pipe = to_isp_pipeline(me);
  959. if (pipe->stream_state == ISP_PIPELINE_STREAM_STOPPED)
  960. return 0;
  961. pad = media_entity_remote_pad(&pipe->output->pad);
  962. return pad->entity == me;
  963. }
  964. /*
  965. * isp_suspend_module_pipeline - Suspend pipeline to which belongs the module
  966. * @me: ISP module's media entity
  967. *
  968. * Suspend the whole pipeline if module's entity has an enabled link to the
  969. * output video node. It works only while pipeline can have no more than one
  970. * output node.
  971. */
  972. static void isp_suspend_module_pipeline(struct media_entity *me)
  973. {
  974. if (isp_pipeline_is_last(me))
  975. isp_pipeline_suspend(to_isp_pipeline(me));
  976. }
  977. /*
  978. * isp_resume_module_pipeline - Resume pipeline to which belongs the module
  979. * @me: ISP module's media entity
  980. *
  981. * Resume the whole pipeline if module's entity has an enabled link to the
  982. * output video node. It works only while pipeline can have no more than one
  983. * output node.
  984. */
  985. static void isp_resume_module_pipeline(struct media_entity *me)
  986. {
  987. if (isp_pipeline_is_last(me))
  988. isp_pipeline_resume(to_isp_pipeline(me));
  989. }
  990. /*
  991. * isp_suspend_modules - Suspend ISP submodules.
  992. * @isp: OMAP3 ISP device
  993. *
  994. * Returns 0 if suspend left in idle state all the submodules properly,
  995. * or returns 1 if a general Reset is required to suspend the submodules.
  996. */
  997. static int isp_suspend_modules(struct isp_device *isp)
  998. {
  999. unsigned long timeout;
  1000. omap3isp_stat_suspend(&isp->isp_aewb);
  1001. omap3isp_stat_suspend(&isp->isp_af);
  1002. omap3isp_stat_suspend(&isp->isp_hist);
  1003. isp_suspend_module_pipeline(&isp->isp_res.subdev.entity);
  1004. isp_suspend_module_pipeline(&isp->isp_prev.subdev.entity);
  1005. isp_suspend_module_pipeline(&isp->isp_ccdc.subdev.entity);
  1006. isp_suspend_module_pipeline(&isp->isp_csi2a.subdev.entity);
  1007. isp_suspend_module_pipeline(&isp->isp_ccp2.subdev.entity);
  1008. timeout = jiffies + ISP_STOP_TIMEOUT;
  1009. while (omap3isp_stat_busy(&isp->isp_af)
  1010. || omap3isp_stat_busy(&isp->isp_aewb)
  1011. || omap3isp_stat_busy(&isp->isp_hist)
  1012. || omap3isp_preview_busy(&isp->isp_prev)
  1013. || omap3isp_resizer_busy(&isp->isp_res)
  1014. || omap3isp_ccdc_busy(&isp->isp_ccdc)) {
  1015. if (time_after(jiffies, timeout)) {
  1016. dev_info(isp->dev, "can't stop modules.\n");
  1017. return 1;
  1018. }
  1019. msleep(1);
  1020. }
  1021. return 0;
  1022. }
  1023. /*
  1024. * isp_resume_modules - Resume ISP submodules.
  1025. * @isp: OMAP3 ISP device
  1026. */
  1027. static void isp_resume_modules(struct isp_device *isp)
  1028. {
  1029. omap3isp_stat_resume(&isp->isp_aewb);
  1030. omap3isp_stat_resume(&isp->isp_af);
  1031. omap3isp_stat_resume(&isp->isp_hist);
  1032. isp_resume_module_pipeline(&isp->isp_res.subdev.entity);
  1033. isp_resume_module_pipeline(&isp->isp_prev.subdev.entity);
  1034. isp_resume_module_pipeline(&isp->isp_ccdc.subdev.entity);
  1035. isp_resume_module_pipeline(&isp->isp_csi2a.subdev.entity);
  1036. isp_resume_module_pipeline(&isp->isp_ccp2.subdev.entity);
  1037. }
  1038. /*
  1039. * isp_reset - Reset ISP with a timeout wait for idle.
  1040. * @isp: OMAP3 ISP device
  1041. */
  1042. static int isp_reset(struct isp_device *isp)
  1043. {
  1044. unsigned long timeout = 0;
  1045. isp_reg_writel(isp,
  1046. isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG)
  1047. | ISP_SYSCONFIG_SOFTRESET,
  1048. OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG);
  1049. while (!(isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN,
  1050. ISP_SYSSTATUS) & 0x1)) {
  1051. if (timeout++ > 10000) {
  1052. dev_alert(isp->dev, "cannot reset ISP\n");
  1053. return -ETIMEDOUT;
  1054. }
  1055. udelay(1);
  1056. }
  1057. isp->stop_failure = false;
  1058. isp->crashed = 0;
  1059. return 0;
  1060. }
  1061. /*
  1062. * isp_save_context - Saves the values of the ISP module registers.
  1063. * @isp: OMAP3 ISP device
  1064. * @reg_list: Structure containing pairs of register address and value to
  1065. * modify on OMAP.
  1066. */
  1067. static void
  1068. isp_save_context(struct isp_device *isp, struct isp_reg *reg_list)
  1069. {
  1070. struct isp_reg *next = reg_list;
  1071. for (; next->reg != ISP_TOK_TERM; next++)
  1072. next->val = isp_reg_readl(isp, next->mmio_range, next->reg);
  1073. }
  1074. /*
  1075. * isp_restore_context - Restores the values of the ISP module registers.
  1076. * @isp: OMAP3 ISP device
  1077. * @reg_list: Structure containing pairs of register address and value to
  1078. * modify on OMAP.
  1079. */
  1080. static void
  1081. isp_restore_context(struct isp_device *isp, struct isp_reg *reg_list)
  1082. {
  1083. struct isp_reg *next = reg_list;
  1084. for (; next->reg != ISP_TOK_TERM; next++)
  1085. isp_reg_writel(isp, next->val, next->mmio_range, next->reg);
  1086. }
  1087. /*
  1088. * isp_save_ctx - Saves ISP, CCDC, HIST, H3A, PREV, RESZ & MMU context.
  1089. * @isp: OMAP3 ISP device
  1090. *
  1091. * Routine for saving the context of each module in the ISP.
  1092. * CCDC, HIST, H3A, PREV, RESZ and MMU.
  1093. */
  1094. static void isp_save_ctx(struct isp_device *isp)
  1095. {
  1096. isp_save_context(isp, isp_reg_list);
  1097. omap_iommu_save_ctx(isp->dev);
  1098. }
  1099. /*
  1100. * isp_restore_ctx - Restores ISP, CCDC, HIST, H3A, PREV, RESZ & MMU context.
  1101. * @isp: OMAP3 ISP device
  1102. *
  1103. * Routine for restoring the context of each module in the ISP.
  1104. * CCDC, HIST, H3A, PREV, RESZ and MMU.
  1105. */
  1106. static void isp_restore_ctx(struct isp_device *isp)
  1107. {
  1108. isp_restore_context(isp, isp_reg_list);
  1109. omap_iommu_restore_ctx(isp->dev);
  1110. omap3isp_ccdc_restore_context(isp);
  1111. omap3isp_preview_restore_context(isp);
  1112. }
  1113. /* -----------------------------------------------------------------------------
  1114. * SBL resources management
  1115. */
  1116. #define OMAP3_ISP_SBL_READ (OMAP3_ISP_SBL_CSI1_READ | \
  1117. OMAP3_ISP_SBL_CCDC_LSC_READ | \
  1118. OMAP3_ISP_SBL_PREVIEW_READ | \
  1119. OMAP3_ISP_SBL_RESIZER_READ)
  1120. #define OMAP3_ISP_SBL_WRITE (OMAP3_ISP_SBL_CSI1_WRITE | \
  1121. OMAP3_ISP_SBL_CSI2A_WRITE | \
  1122. OMAP3_ISP_SBL_CSI2C_WRITE | \
  1123. OMAP3_ISP_SBL_CCDC_WRITE | \
  1124. OMAP3_ISP_SBL_PREVIEW_WRITE)
  1125. void omap3isp_sbl_enable(struct isp_device *isp, enum isp_sbl_resource res)
  1126. {
  1127. u32 sbl = 0;
  1128. isp->sbl_resources |= res;
  1129. if (isp->sbl_resources & OMAP3_ISP_SBL_CSI1_READ)
  1130. sbl |= ISPCTRL_SBL_SHARED_RPORTA;
  1131. if (isp->sbl_resources & OMAP3_ISP_SBL_CCDC_LSC_READ)
  1132. sbl |= ISPCTRL_SBL_SHARED_RPORTB;
  1133. if (isp->sbl_resources & OMAP3_ISP_SBL_CSI2C_WRITE)
  1134. sbl |= ISPCTRL_SBL_SHARED_WPORTC;
  1135. if (isp->sbl_resources & OMAP3_ISP_SBL_RESIZER_WRITE)
  1136. sbl |= ISPCTRL_SBL_WR0_RAM_EN;
  1137. if (isp->sbl_resources & OMAP3_ISP_SBL_WRITE)
  1138. sbl |= ISPCTRL_SBL_WR1_RAM_EN;
  1139. if (isp->sbl_resources & OMAP3_ISP_SBL_READ)
  1140. sbl |= ISPCTRL_SBL_RD_RAM_EN;
  1141. isp_reg_set(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL, sbl);
  1142. }
  1143. void omap3isp_sbl_disable(struct isp_device *isp, enum isp_sbl_resource res)
  1144. {
  1145. u32 sbl = 0;
  1146. isp->sbl_resources &= ~res;
  1147. if (!(isp->sbl_resources & OMAP3_ISP_SBL_CSI1_READ))
  1148. sbl |= ISPCTRL_SBL_SHARED_RPORTA;
  1149. if (!(isp->sbl_resources & OMAP3_ISP_SBL_CCDC_LSC_READ))
  1150. sbl |= ISPCTRL_SBL_SHARED_RPORTB;
  1151. if (!(isp->sbl_resources & OMAP3_ISP_SBL_CSI2C_WRITE))
  1152. sbl |= ISPCTRL_SBL_SHARED_WPORTC;
  1153. if (!(isp->sbl_resources & OMAP3_ISP_SBL_RESIZER_WRITE))
  1154. sbl |= ISPCTRL_SBL_WR0_RAM_EN;
  1155. if (!(isp->sbl_resources & OMAP3_ISP_SBL_WRITE))
  1156. sbl |= ISPCTRL_SBL_WR1_RAM_EN;
  1157. if (!(isp->sbl_resources & OMAP3_ISP_SBL_READ))
  1158. sbl |= ISPCTRL_SBL_RD_RAM_EN;
  1159. isp_reg_clr(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL, sbl);
  1160. }
  1161. /*
  1162. * isp_module_sync_idle - Helper to sync module with its idle state
  1163. * @me: ISP submodule's media entity
  1164. * @wait: ISP submodule's wait queue for streamoff/interrupt synchronization
  1165. * @stopping: flag which tells module wants to stop
  1166. *
  1167. * This function checks if ISP submodule needs to wait for next interrupt. If
  1168. * yes, makes the caller to sleep while waiting for such event.
  1169. */
  1170. int omap3isp_module_sync_idle(struct media_entity *me, wait_queue_head_t *wait,
  1171. atomic_t *stopping)
  1172. {
  1173. struct isp_pipeline *pipe = to_isp_pipeline(me);
  1174. if (pipe->stream_state == ISP_PIPELINE_STREAM_STOPPED ||
  1175. (pipe->stream_state == ISP_PIPELINE_STREAM_SINGLESHOT &&
  1176. !isp_pipeline_ready(pipe)))
  1177. return 0;
  1178. /*
  1179. * atomic_set() doesn't include memory barrier on ARM platform for SMP
  1180. * scenario. We'll call it here to avoid race conditions.
  1181. */
  1182. atomic_set(stopping, 1);
  1183. smp_mb();
  1184. /*
  1185. * If module is the last one, it's writing to memory. In this case,
  1186. * it's necessary to check if the module is already paused due to
  1187. * DMA queue underrun or if it has to wait for next interrupt to be
  1188. * idle.
  1189. * If it isn't the last one, the function won't sleep but *stopping
  1190. * will still be set to warn next submodule caller's interrupt the
  1191. * module wants to be idle.
  1192. */
  1193. if (isp_pipeline_is_last(me)) {
  1194. struct isp_video *video = pipe->output;
  1195. unsigned long flags;
  1196. spin_lock_irqsave(&video->irqlock, flags);
  1197. if (video->dmaqueue_flags & ISP_VIDEO_DMAQUEUE_UNDERRUN) {
  1198. spin_unlock_irqrestore(&video->irqlock, flags);
  1199. atomic_set(stopping, 0);
  1200. smp_mb();
  1201. return 0;
  1202. }
  1203. spin_unlock_irqrestore(&video->irqlock, flags);
  1204. if (!wait_event_timeout(*wait, !atomic_read(stopping),
  1205. msecs_to_jiffies(1000))) {
  1206. atomic_set(stopping, 0);
  1207. smp_mb();
  1208. return -ETIMEDOUT;
  1209. }
  1210. }
  1211. return 0;
  1212. }
  1213. /*
  1214. * omap3isp_module_sync_is_stopping - Helper to verify if module was stopping
  1215. * @wait: ISP submodule's wait queue for streamoff/interrupt synchronization
  1216. * @stopping: flag which tells module wants to stop
  1217. *
  1218. * This function checks if ISP submodule was stopping. In case of yes, it
  1219. * notices the caller by setting stopping to 0 and waking up the wait queue.
  1220. * Returns 1 if it was stopping or 0 otherwise.
  1221. */
  1222. int omap3isp_module_sync_is_stopping(wait_queue_head_t *wait,
  1223. atomic_t *stopping)
  1224. {
  1225. if (atomic_cmpxchg(stopping, 1, 0)) {
  1226. wake_up(wait);
  1227. return 1;
  1228. }
  1229. return 0;
  1230. }
  1231. /* --------------------------------------------------------------------------
  1232. * Clock management
  1233. */
  1234. #define ISPCTRL_CLKS_MASK (ISPCTRL_H3A_CLK_EN | \
  1235. ISPCTRL_HIST_CLK_EN | \
  1236. ISPCTRL_RSZ_CLK_EN | \
  1237. (ISPCTRL_CCDC_CLK_EN | ISPCTRL_CCDC_RAM_EN) | \
  1238. (ISPCTRL_PREV_CLK_EN | ISPCTRL_PREV_RAM_EN))
  1239. static void __isp_subclk_update(struct isp_device *isp)
  1240. {
  1241. u32 clk = 0;
  1242. /* AEWB and AF share the same clock. */
  1243. if (isp->subclk_resources &
  1244. (OMAP3_ISP_SUBCLK_AEWB | OMAP3_ISP_SUBCLK_AF))
  1245. clk |= ISPCTRL_H3A_CLK_EN;
  1246. if (isp->subclk_resources & OMAP3_ISP_SUBCLK_HIST)
  1247. clk |= ISPCTRL_HIST_CLK_EN;
  1248. if (isp->subclk_resources & OMAP3_ISP_SUBCLK_RESIZER)
  1249. clk |= ISPCTRL_RSZ_CLK_EN;
  1250. /* NOTE: For CCDC & Preview submodules, we need to affect internal
  1251. * RAM as well.
  1252. */
  1253. if (isp->subclk_resources & OMAP3_ISP_SUBCLK_CCDC)
  1254. clk |= ISPCTRL_CCDC_CLK_EN | ISPCTRL_CCDC_RAM_EN;
  1255. if (isp->subclk_resources & OMAP3_ISP_SUBCLK_PREVIEW)
  1256. clk |= ISPCTRL_PREV_CLK_EN | ISPCTRL_PREV_RAM_EN;
  1257. isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL,
  1258. ISPCTRL_CLKS_MASK, clk);
  1259. }
  1260. void omap3isp_subclk_enable(struct isp_device *isp,
  1261. enum isp_subclk_resource res)
  1262. {
  1263. isp->subclk_resources |= res;
  1264. __isp_subclk_update(isp);
  1265. }
  1266. void omap3isp_subclk_disable(struct isp_device *isp,
  1267. enum isp_subclk_resource res)
  1268. {
  1269. isp->subclk_resources &= ~res;
  1270. __isp_subclk_update(isp);
  1271. }
  1272. /*
  1273. * isp_enable_clocks - Enable ISP clocks
  1274. * @isp: OMAP3 ISP device
  1275. *
  1276. * Return 0 if successful, or clk_prepare_enable return value if any of them
  1277. * fails.
  1278. */
  1279. static int isp_enable_clocks(struct isp_device *isp)
  1280. {
  1281. int r;
  1282. unsigned long rate;
  1283. r = clk_prepare_enable(isp->clock[ISP_CLK_CAM_ICK]);
  1284. if (r) {
  1285. dev_err(isp->dev, "failed to enable cam_ick clock\n");
  1286. goto out_clk_enable_ick;
  1287. }
  1288. r = clk_set_rate(isp->clock[ISP_CLK_CAM_MCLK], CM_CAM_MCLK_HZ);
  1289. if (r) {
  1290. dev_err(isp->dev, "clk_set_rate for cam_mclk failed\n");
  1291. goto out_clk_enable_mclk;
  1292. }
  1293. r = clk_prepare_enable(isp->clock[ISP_CLK_CAM_MCLK]);
  1294. if (r) {
  1295. dev_err(isp->dev, "failed to enable cam_mclk clock\n");
  1296. goto out_clk_enable_mclk;
  1297. }
  1298. rate = clk_get_rate(isp->clock[ISP_CLK_CAM_MCLK]);
  1299. if (rate != CM_CAM_MCLK_HZ)
  1300. dev_warn(isp->dev, "unexpected cam_mclk rate:\n"
  1301. " expected : %d\n"
  1302. " actual : %ld\n", CM_CAM_MCLK_HZ, rate);
  1303. r = clk_prepare_enable(isp->clock[ISP_CLK_CSI2_FCK]);
  1304. if (r) {
  1305. dev_err(isp->dev, "failed to enable csi2_fck clock\n");
  1306. goto out_clk_enable_csi2_fclk;
  1307. }
  1308. return 0;
  1309. out_clk_enable_csi2_fclk:
  1310. clk_disable_unprepare(isp->clock[ISP_CLK_CAM_MCLK]);
  1311. out_clk_enable_mclk:
  1312. clk_disable_unprepare(isp->clock[ISP_CLK_CAM_ICK]);
  1313. out_clk_enable_ick:
  1314. return r;
  1315. }
  1316. /*
  1317. * isp_disable_clocks - Disable ISP clocks
  1318. * @isp: OMAP3 ISP device
  1319. */
  1320. static void isp_disable_clocks(struct isp_device *isp)
  1321. {
  1322. clk_disable_unprepare(isp->clock[ISP_CLK_CAM_ICK]);
  1323. clk_disable_unprepare(isp->clock[ISP_CLK_CAM_MCLK]);
  1324. clk_disable_unprepare(isp->clock[ISP_CLK_CSI2_FCK]);
  1325. }
  1326. static const char *isp_clocks[] = {
  1327. "cam_ick",
  1328. "cam_mclk",
  1329. "csi2_96m_fck",
  1330. "l3_ick",
  1331. };
  1332. static int isp_get_clocks(struct isp_device *isp)
  1333. {
  1334. struct clk *clk;
  1335. unsigned int i;
  1336. for (i = 0; i < ARRAY_SIZE(isp_clocks); ++i) {
  1337. clk = devm_clk_get(isp->dev, isp_clocks[i]);
  1338. if (IS_ERR(clk)) {
  1339. dev_err(isp->dev, "clk_get %s failed\n", isp_clocks[i]);
  1340. return PTR_ERR(clk);
  1341. }
  1342. isp->clock[i] = clk;
  1343. }
  1344. return 0;
  1345. }
  1346. /*
  1347. * omap3isp_get - Acquire the ISP resource.
  1348. *
  1349. * Initializes the clocks for the first acquire.
  1350. *
  1351. * Increment the reference count on the ISP. If the first reference is taken,
  1352. * enable clocks and power-up all submodules.
  1353. *
  1354. * Return a pointer to the ISP device structure, or NULL if an error occurred.
  1355. */
  1356. static struct isp_device *__omap3isp_get(struct isp_device *isp, bool irq)
  1357. {
  1358. struct isp_device *__isp = isp;
  1359. if (isp == NULL)
  1360. return NULL;
  1361. mutex_lock(&isp->isp_mutex);
  1362. if (isp->ref_count > 0)
  1363. goto out;
  1364. if (isp_enable_clocks(isp) < 0) {
  1365. __isp = NULL;
  1366. goto out;
  1367. }
  1368. /* We don't want to restore context before saving it! */
  1369. if (isp->has_context)
  1370. isp_restore_ctx(isp);
  1371. if (irq)
  1372. isp_enable_interrupts(isp);
  1373. out:
  1374. if (__isp != NULL)
  1375. isp->ref_count++;
  1376. mutex_unlock(&isp->isp_mutex);
  1377. return __isp;
  1378. }
  1379. struct isp_device *omap3isp_get(struct isp_device *isp)
  1380. {
  1381. return __omap3isp_get(isp, true);
  1382. }
  1383. /*
  1384. * omap3isp_put - Release the ISP
  1385. *
  1386. * Decrement the reference count on the ISP. If the last reference is released,
  1387. * power-down all submodules, disable clocks and free temporary buffers.
  1388. */
  1389. static void __omap3isp_put(struct isp_device *isp, bool save_ctx)
  1390. {
  1391. if (isp == NULL)
  1392. return;
  1393. mutex_lock(&isp->isp_mutex);
  1394. BUG_ON(isp->ref_count == 0);
  1395. if (--isp->ref_count == 0) {
  1396. isp_disable_interrupts(isp);
  1397. if (save_ctx) {
  1398. isp_save_ctx(isp);
  1399. isp->has_context = 1;
  1400. }
  1401. /* Reset the ISP if an entity has failed to stop. This is the
  1402. * only way to recover from such conditions.
  1403. */
  1404. if (isp->crashed || isp->stop_failure)
  1405. isp_reset(isp);
  1406. isp_disable_clocks(isp);
  1407. }
  1408. mutex_unlock(&isp->isp_mutex);
  1409. }
  1410. void omap3isp_put(struct isp_device *isp)
  1411. {
  1412. __omap3isp_put(isp, true);
  1413. }
  1414. /* --------------------------------------------------------------------------
  1415. * Platform device driver
  1416. */
  1417. /*
  1418. * omap3isp_print_status - Prints the values of the ISP Control Module registers
  1419. * @isp: OMAP3 ISP device
  1420. */
  1421. #define ISP_PRINT_REGISTER(isp, name)\
  1422. dev_dbg(isp->dev, "###ISP " #name "=0x%08x\n", \
  1423. isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_##name))
  1424. #define SBL_PRINT_REGISTER(isp, name)\
  1425. dev_dbg(isp->dev, "###SBL " #name "=0x%08x\n", \
  1426. isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_##name))
  1427. void omap3isp_print_status(struct isp_device *isp)
  1428. {
  1429. dev_dbg(isp->dev, "-------------ISP Register dump--------------\n");
  1430. ISP_PRINT_REGISTER(isp, SYSCONFIG);
  1431. ISP_PRINT_REGISTER(isp, SYSSTATUS);
  1432. ISP_PRINT_REGISTER(isp, IRQ0ENABLE);
  1433. ISP_PRINT_REGISTER(isp, IRQ0STATUS);
  1434. ISP_PRINT_REGISTER(isp, TCTRL_GRESET_LENGTH);
  1435. ISP_PRINT_REGISTER(isp, TCTRL_PSTRB_REPLAY);
  1436. ISP_PRINT_REGISTER(isp, CTRL);
  1437. ISP_PRINT_REGISTER(isp, TCTRL_CTRL);
  1438. ISP_PRINT_REGISTER(isp, TCTRL_FRAME);
  1439. ISP_PRINT_REGISTER(isp, TCTRL_PSTRB_DELAY);
  1440. ISP_PRINT_REGISTER(isp, TCTRL_STRB_DELAY);
  1441. ISP_PRINT_REGISTER(isp, TCTRL_SHUT_DELAY);
  1442. ISP_PRINT_REGISTER(isp, TCTRL_PSTRB_LENGTH);
  1443. ISP_PRINT_REGISTER(isp, TCTRL_STRB_LENGTH);
  1444. ISP_PRINT_REGISTER(isp, TCTRL_SHUT_LENGTH);
  1445. SBL_PRINT_REGISTER(isp, PCR);
  1446. SBL_PRINT_REGISTER(isp, SDR_REQ_EXP);
  1447. dev_dbg(isp->dev, "--------------------------------------------\n");
  1448. }
  1449. #ifdef CONFIG_PM
  1450. /*
  1451. * Power management support.
  1452. *
  1453. * As the ISP can't properly handle an input video stream interruption on a non
  1454. * frame boundary, the ISP pipelines need to be stopped before sensors get
  1455. * suspended. However, as suspending the sensors can require a running clock,
  1456. * which can be provided by the ISP, the ISP can't be completely suspended
  1457. * before the sensor.
  1458. *
  1459. * To solve this problem power management support is split into prepare/complete
  1460. * and suspend/resume operations. The pipelines are stopped in prepare() and the
  1461. * ISP clocks get disabled in suspend(). Similarly, the clocks are reenabled in
  1462. * resume(), and the the pipelines are restarted in complete().
  1463. *
  1464. * TODO: PM dependencies between the ISP and sensors are not modelled explicitly
  1465. * yet.
  1466. */
  1467. static int isp_pm_prepare(struct device *dev)
  1468. {
  1469. struct isp_device *isp = dev_get_drvdata(dev);
  1470. int reset;
  1471. WARN_ON(mutex_is_locked(&isp->isp_mutex));
  1472. if (isp->ref_count == 0)
  1473. return 0;
  1474. reset = isp_suspend_modules(isp);
  1475. isp_disable_interrupts(isp);
  1476. isp_save_ctx(isp);
  1477. if (reset)
  1478. isp_reset(isp);
  1479. return 0;
  1480. }
  1481. static int isp_pm_suspend(struct device *dev)
  1482. {
  1483. struct isp_device *isp = dev_get_drvdata(dev);
  1484. WARN_ON(mutex_is_locked(&isp->isp_mutex));
  1485. if (isp->ref_count)
  1486. isp_disable_clocks(isp);
  1487. return 0;
  1488. }
  1489. static int isp_pm_resume(struct device *dev)
  1490. {
  1491. struct isp_device *isp = dev_get_drvdata(dev);
  1492. if (isp->ref_count == 0)
  1493. return 0;
  1494. return isp_enable_clocks(isp);
  1495. }
  1496. static void isp_pm_complete(struct device *dev)
  1497. {
  1498. struct isp_device *isp = dev_get_drvdata(dev);
  1499. if (isp->ref_count == 0)
  1500. return;
  1501. isp_restore_ctx(isp);
  1502. isp_enable_interrupts(isp);
  1503. isp_resume_modules(isp);
  1504. }
  1505. #else
  1506. #define isp_pm_prepare NULL
  1507. #define isp_pm_suspend NULL
  1508. #define isp_pm_resume NULL
  1509. #define isp_pm_complete NULL
  1510. #endif /* CONFIG_PM */
  1511. static void isp_unregister_entities(struct isp_device *isp)
  1512. {
  1513. omap3isp_csi2_unregister_entities(&isp->isp_csi2a);
  1514. omap3isp_ccp2_unregister_entities(&isp->isp_ccp2);
  1515. omap3isp_ccdc_unregister_entities(&isp->isp_ccdc);
  1516. omap3isp_preview_unregister_entities(&isp->isp_prev);
  1517. omap3isp_resizer_unregister_entities(&isp->isp_res);
  1518. omap3isp_stat_unregister_entities(&isp->isp_aewb);
  1519. omap3isp_stat_unregister_entities(&isp->isp_af);
  1520. omap3isp_stat_unregister_entities(&isp->isp_hist);
  1521. v4l2_device_unregister(&isp->v4l2_dev);
  1522. media_device_unregister(&isp->media_dev);
  1523. }
  1524. static int isp_link_entity(
  1525. struct isp_device *isp, struct media_entity *entity,
  1526. enum isp_interface_type interface)
  1527. {
  1528. struct media_entity *input;
  1529. unsigned int flags;
  1530. unsigned int pad;
  1531. unsigned int i;
  1532. /* Connect the sensor to the correct interface module.
  1533. * Parallel sensors are connected directly to the CCDC, while
  1534. * serial sensors are connected to the CSI2a, CCP2b or CSI2c
  1535. * receiver through CSIPHY1 or CSIPHY2.
  1536. */
  1537. switch (interface) {
  1538. case ISP_INTERFACE_PARALLEL:
  1539. input = &isp->isp_ccdc.subdev.entity;
  1540. pad = CCDC_PAD_SINK;
  1541. flags = 0;
  1542. break;
  1543. case ISP_INTERFACE_CSI2A_PHY2:
  1544. input = &isp->isp_csi2a.subdev.entity;
  1545. pad = CSI2_PAD_SINK;
  1546. flags = MEDIA_LNK_FL_IMMUTABLE | MEDIA_LNK_FL_ENABLED;
  1547. break;
  1548. case ISP_INTERFACE_CCP2B_PHY1:
  1549. case ISP_INTERFACE_CCP2B_PHY2:
  1550. input = &isp->isp_ccp2.subdev.entity;
  1551. pad = CCP2_PAD_SINK;
  1552. flags = 0;
  1553. break;
  1554. case ISP_INTERFACE_CSI2C_PHY1:
  1555. input = &isp->isp_csi2c.subdev.entity;
  1556. pad = CSI2_PAD_SINK;
  1557. flags = MEDIA_LNK_FL_IMMUTABLE | MEDIA_LNK_FL_ENABLED;
  1558. break;
  1559. default:
  1560. dev_err(isp->dev, "%s: invalid interface type %u\n", __func__,
  1561. interface);
  1562. return -EINVAL;
  1563. }
  1564. /*
  1565. * Not all interfaces are available on all revisions of the
  1566. * ISP. The sub-devices of those interfaces aren't initialised
  1567. * in such a case. Check this by ensuring the num_pads is
  1568. * non-zero.
  1569. */
  1570. if (!input->num_pads) {
  1571. dev_err(isp->dev, "%s: invalid input %u\n", entity->name,
  1572. interface);
  1573. return -EINVAL;
  1574. }
  1575. for (i = 0; i < entity->num_pads; i++) {
  1576. if (entity->pads[i].flags & MEDIA_PAD_FL_SOURCE)
  1577. break;
  1578. }
  1579. if (i == entity->num_pads) {
  1580. dev_err(isp->dev, "%s: no source pad in external entity\n",
  1581. __func__);
  1582. return -EINVAL;
  1583. }
  1584. return media_entity_create_link(entity, i, input, pad, flags);
  1585. }
  1586. static int isp_register_entities(struct isp_device *isp)
  1587. {
  1588. int ret;
  1589. isp->media_dev.dev = isp->dev;
  1590. strlcpy(isp->media_dev.model, "TI OMAP3 ISP",
  1591. sizeof(isp->media_dev.model));
  1592. isp->media_dev.hw_revision = isp->revision;
  1593. isp->media_dev.link_notify = isp_pipeline_link_notify;
  1594. ret = media_device_register(&isp->media_dev);
  1595. if (ret < 0) {
  1596. dev_err(isp->dev, "%s: Media device registration failed (%d)\n",
  1597. __func__, ret);
  1598. return ret;
  1599. }
  1600. isp->v4l2_dev.mdev = &isp->media_dev;
  1601. ret = v4l2_device_register(isp->dev, &isp->v4l2_dev);
  1602. if (ret < 0) {
  1603. dev_err(isp->dev, "%s: V4L2 device registration failed (%d)\n",
  1604. __func__, ret);
  1605. goto done;
  1606. }
  1607. /* Register internal entities */
  1608. ret = omap3isp_ccp2_register_entities(&isp->isp_ccp2, &isp->v4l2_dev);
  1609. if (ret < 0)
  1610. goto done;
  1611. ret = omap3isp_csi2_register_entities(&isp->isp_csi2a, &isp->v4l2_dev);
  1612. if (ret < 0)
  1613. goto done;
  1614. ret = omap3isp_ccdc_register_entities(&isp->isp_ccdc, &isp->v4l2_dev);
  1615. if (ret < 0)
  1616. goto done;
  1617. ret = omap3isp_preview_register_entities(&isp->isp_prev,
  1618. &isp->v4l2_dev);
  1619. if (ret < 0)
  1620. goto done;
  1621. ret = omap3isp_resizer_register_entities(&isp->isp_res, &isp->v4l2_dev);
  1622. if (ret < 0)
  1623. goto done;
  1624. ret = omap3isp_stat_register_entities(&isp->isp_aewb, &isp->v4l2_dev);
  1625. if (ret < 0)
  1626. goto done;
  1627. ret = omap3isp_stat_register_entities(&isp->isp_af, &isp->v4l2_dev);
  1628. if (ret < 0)
  1629. goto done;
  1630. ret = omap3isp_stat_register_entities(&isp->isp_hist, &isp->v4l2_dev);
  1631. if (ret < 0)
  1632. goto done;
  1633. done:
  1634. if (ret < 0)
  1635. isp_unregister_entities(isp);
  1636. return ret;
  1637. }
  1638. static void isp_cleanup_modules(struct isp_device *isp)
  1639. {
  1640. omap3isp_h3a_aewb_cleanup(isp);
  1641. omap3isp_h3a_af_cleanup(isp);
  1642. omap3isp_hist_cleanup(isp);
  1643. omap3isp_resizer_cleanup(isp);
  1644. omap3isp_preview_cleanup(isp);
  1645. omap3isp_ccdc_cleanup(isp);
  1646. omap3isp_ccp2_cleanup(isp);
  1647. omap3isp_csi2_cleanup(isp);
  1648. }
  1649. static int isp_initialize_modules(struct isp_device *isp)
  1650. {
  1651. int ret;
  1652. ret = omap3isp_csiphy_init(isp);
  1653. if (ret < 0) {
  1654. dev_err(isp->dev, "CSI PHY initialization failed\n");
  1655. goto error_csiphy;
  1656. }
  1657. ret = omap3isp_csi2_init(isp);
  1658. if (ret < 0) {
  1659. dev_err(isp->dev, "CSI2 initialization failed\n");
  1660. goto error_csi2;
  1661. }
  1662. ret = omap3isp_ccp2_init(isp);
  1663. if (ret < 0) {
  1664. dev_err(isp->dev, "CCP2 initialization failed\n");
  1665. goto error_ccp2;
  1666. }
  1667. ret = omap3isp_ccdc_init(isp);
  1668. if (ret < 0) {
  1669. dev_err(isp->dev, "CCDC initialization failed\n");
  1670. goto error_ccdc;
  1671. }
  1672. ret = omap3isp_preview_init(isp);
  1673. if (ret < 0) {
  1674. dev_err(isp->dev, "Preview initialization failed\n");
  1675. goto error_preview;
  1676. }
  1677. ret = omap3isp_resizer_init(isp);
  1678. if (ret < 0) {
  1679. dev_err(isp->dev, "Resizer initialization failed\n");
  1680. goto error_resizer;
  1681. }
  1682. ret = omap3isp_hist_init(isp);
  1683. if (ret < 0) {
  1684. dev_err(isp->dev, "Histogram initialization failed\n");
  1685. goto error_hist;
  1686. }
  1687. ret = omap3isp_h3a_aewb_init(isp);
  1688. if (ret < 0) {
  1689. dev_err(isp->dev, "H3A AEWB initialization failed\n");
  1690. goto error_h3a_aewb;
  1691. }
  1692. ret = omap3isp_h3a_af_init(isp);
  1693. if (ret < 0) {
  1694. dev_err(isp->dev, "H3A AF initialization failed\n");
  1695. goto error_h3a_af;
  1696. }
  1697. /* Connect the submodules. */
  1698. ret = media_entity_create_link(
  1699. &isp->isp_csi2a.subdev.entity, CSI2_PAD_SOURCE,
  1700. &isp->isp_ccdc.subdev.entity, CCDC_PAD_SINK, 0);
  1701. if (ret < 0)
  1702. goto error_link;
  1703. ret = media_entity_create_link(
  1704. &isp->isp_ccp2.subdev.entity, CCP2_PAD_SOURCE,
  1705. &isp->isp_ccdc.subdev.entity, CCDC_PAD_SINK, 0);
  1706. if (ret < 0)
  1707. goto error_link;
  1708. ret = media_entity_create_link(
  1709. &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
  1710. &isp->isp_prev.subdev.entity, PREV_PAD_SINK, 0);
  1711. if (ret < 0)
  1712. goto error_link;
  1713. ret = media_entity_create_link(
  1714. &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_OF,
  1715. &isp->isp_res.subdev.entity, RESZ_PAD_SINK, 0);
  1716. if (ret < 0)
  1717. goto error_link;
  1718. ret = media_entity_create_link(
  1719. &isp->isp_prev.subdev.entity, PREV_PAD_SOURCE,
  1720. &isp->isp_res.subdev.entity, RESZ_PAD_SINK, 0);
  1721. if (ret < 0)
  1722. goto error_link;
  1723. ret = media_entity_create_link(
  1724. &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
  1725. &isp->isp_aewb.subdev.entity, 0,
  1726. MEDIA_LNK_FL_ENABLED | MEDIA_LNK_FL_IMMUTABLE);
  1727. if (ret < 0)
  1728. goto error_link;
  1729. ret = media_entity_create_link(
  1730. &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
  1731. &isp->isp_af.subdev.entity, 0,
  1732. MEDIA_LNK_FL_ENABLED | MEDIA_LNK_FL_IMMUTABLE);
  1733. if (ret < 0)
  1734. goto error_link;
  1735. ret = media_entity_create_link(
  1736. &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
  1737. &isp->isp_hist.subdev.entity, 0,
  1738. MEDIA_LNK_FL_ENABLED | MEDIA_LNK_FL_IMMUTABLE);
  1739. if (ret < 0)
  1740. goto error_link;
  1741. return 0;
  1742. error_link:
  1743. omap3isp_h3a_af_cleanup(isp);
  1744. error_h3a_af:
  1745. omap3isp_h3a_aewb_cleanup(isp);
  1746. error_h3a_aewb:
  1747. omap3isp_hist_cleanup(isp);
  1748. error_hist:
  1749. omap3isp_resizer_cleanup(isp);
  1750. error_resizer:
  1751. omap3isp_preview_cleanup(isp);
  1752. error_preview:
  1753. omap3isp_ccdc_cleanup(isp);
  1754. error_ccdc:
  1755. omap3isp_ccp2_cleanup(isp);
  1756. error_ccp2:
  1757. omap3isp_csi2_cleanup(isp);
  1758. error_csi2:
  1759. error_csiphy:
  1760. return ret;
  1761. }
  1762. static void isp_detach_iommu(struct isp_device *isp)
  1763. {
  1764. arm_iommu_release_mapping(isp->mapping);
  1765. isp->mapping = NULL;
  1766. iommu_group_remove_device(isp->dev);
  1767. }
  1768. static int isp_attach_iommu(struct isp_device *isp)
  1769. {
  1770. struct dma_iommu_mapping *mapping;
  1771. struct iommu_group *group;
  1772. int ret;
  1773. /* Create a device group and add the device to it. */
  1774. group = iommu_group_alloc();
  1775. if (IS_ERR(group)) {
  1776. dev_err(isp->dev, "failed to allocate IOMMU group\n");
  1777. return PTR_ERR(group);
  1778. }
  1779. ret = iommu_group_add_device(group, isp->dev);
  1780. iommu_group_put(group);
  1781. if (ret < 0) {
  1782. dev_err(isp->dev, "failed to add device to IPMMU group\n");
  1783. return ret;
  1784. }
  1785. /*
  1786. * Create the ARM mapping, used by the ARM DMA mapping core to allocate
  1787. * VAs. This will allocate a corresponding IOMMU domain.
  1788. */
  1789. mapping = arm_iommu_create_mapping(&platform_bus_type, SZ_1G, SZ_2G);
  1790. if (IS_ERR(mapping)) {
  1791. dev_err(isp->dev, "failed to create ARM IOMMU mapping\n");
  1792. ret = PTR_ERR(mapping);
  1793. goto error;
  1794. }
  1795. isp->mapping = mapping;
  1796. /* Attach the ARM VA mapping to the device. */
  1797. ret = arm_iommu_attach_device(isp->dev, mapping);
  1798. if (ret < 0) {
  1799. dev_err(isp->dev, "failed to attach device to VA mapping\n");
  1800. goto error;
  1801. }
  1802. return 0;
  1803. error:
  1804. isp_detach_iommu(isp);
  1805. return ret;
  1806. }
  1807. /*
  1808. * isp_remove - Remove ISP platform device
  1809. * @pdev: Pointer to ISP platform device
  1810. *
  1811. * Always returns 0.
  1812. */
  1813. static int isp_remove(struct platform_device *pdev)
  1814. {
  1815. struct isp_device *isp = platform_get_drvdata(pdev);
  1816. v4l2_async_notifier_unregister(&isp->notifier);
  1817. isp_unregister_entities(isp);
  1818. isp_cleanup_modules(isp);
  1819. isp_xclk_cleanup(isp);
  1820. __omap3isp_get(isp, false);
  1821. isp_detach_iommu(isp);
  1822. __omap3isp_put(isp, false);
  1823. return 0;
  1824. }
  1825. enum isp_of_phy {
  1826. ISP_OF_PHY_PARALLEL = 0,
  1827. ISP_OF_PHY_CSIPHY1,
  1828. ISP_OF_PHY_CSIPHY2,
  1829. };
  1830. static int isp_of_parse_node(struct device *dev, struct device_node *node,
  1831. struct isp_async_subdev *isd)
  1832. {
  1833. struct isp_bus_cfg *buscfg = &isd->bus;
  1834. struct v4l2_of_endpoint vep;
  1835. unsigned int i;
  1836. v4l2_of_parse_endpoint(node, &vep);
  1837. dev_dbg(dev, "parsing endpoint %s, interface %u\n", node->full_name,
  1838. vep.base.port);
  1839. switch (vep.base.port) {
  1840. case ISP_OF_PHY_PARALLEL:
  1841. buscfg->interface = ISP_INTERFACE_PARALLEL;
  1842. buscfg->bus.parallel.data_lane_shift =
  1843. vep.bus.parallel.data_shift;
  1844. buscfg->bus.parallel.clk_pol =
  1845. !!(vep.bus.parallel.flags
  1846. & V4L2_MBUS_PCLK_SAMPLE_FALLING);
  1847. buscfg->bus.parallel.hs_pol =
  1848. !!(vep.bus.parallel.flags & V4L2_MBUS_VSYNC_ACTIVE_LOW);
  1849. buscfg->bus.parallel.vs_pol =
  1850. !!(vep.bus.parallel.flags & V4L2_MBUS_HSYNC_ACTIVE_LOW);
  1851. buscfg->bus.parallel.fld_pol =
  1852. !!(vep.bus.parallel.flags & V4L2_MBUS_FIELD_EVEN_LOW);
  1853. buscfg->bus.parallel.data_pol =
  1854. !!(vep.bus.parallel.flags & V4L2_MBUS_DATA_ACTIVE_LOW);
  1855. break;
  1856. case ISP_OF_PHY_CSIPHY1:
  1857. case ISP_OF_PHY_CSIPHY2:
  1858. /* FIXME: always assume CSI-2 for now. */
  1859. switch (vep.base.port) {
  1860. case ISP_OF_PHY_CSIPHY1:
  1861. buscfg->interface = ISP_INTERFACE_CSI2C_PHY1;
  1862. break;
  1863. case ISP_OF_PHY_CSIPHY2:
  1864. buscfg->interface = ISP_INTERFACE_CSI2A_PHY2;
  1865. break;
  1866. }
  1867. buscfg->bus.csi2.lanecfg.clk.pos = vep.bus.mipi_csi2.clock_lane;
  1868. buscfg->bus.csi2.lanecfg.clk.pol =
  1869. vep.bus.mipi_csi2.lane_polarities[0];
  1870. dev_dbg(dev, "clock lane polarity %u, pos %u\n",
  1871. buscfg->bus.csi2.lanecfg.clk.pol,
  1872. buscfg->bus.csi2.lanecfg.clk.pos);
  1873. for (i = 0; i < ISP_CSIPHY2_NUM_DATA_LANES; i++) {
  1874. buscfg->bus.csi2.lanecfg.data[i].pos =
  1875. vep.bus.mipi_csi2.data_lanes[i];
  1876. buscfg->bus.csi2.lanecfg.data[i].pol =
  1877. vep.bus.mipi_csi2.lane_polarities[i + 1];
  1878. dev_dbg(dev, "data lane %u polarity %u, pos %u\n", i,
  1879. buscfg->bus.csi2.lanecfg.data[i].pol,
  1880. buscfg->bus.csi2.lanecfg.data[i].pos);
  1881. }
  1882. /*
  1883. * FIXME: now we assume the CRC is always there.
  1884. * Implement a way to obtain this information from the
  1885. * sensor. Frame descriptors, perhaps?
  1886. */
  1887. buscfg->bus.csi2.crc = 1;
  1888. break;
  1889. default:
  1890. dev_warn(dev, "%s: invalid interface %u\n", node->full_name,
  1891. vep.base.port);
  1892. break;
  1893. }
  1894. return 0;
  1895. }
  1896. static int isp_of_parse_nodes(struct device *dev,
  1897. struct v4l2_async_notifier *notifier)
  1898. {
  1899. struct device_node *node = NULL;
  1900. notifier->subdevs = devm_kcalloc(
  1901. dev, ISP_MAX_SUBDEVS, sizeof(*notifier->subdevs), GFP_KERNEL);
  1902. if (!notifier->subdevs)
  1903. return -ENOMEM;
  1904. while (notifier->num_subdevs < ISP_MAX_SUBDEVS &&
  1905. (node = of_graph_get_next_endpoint(dev->of_node, node))) {
  1906. struct isp_async_subdev *isd;
  1907. isd = devm_kzalloc(dev, sizeof(*isd), GFP_KERNEL);
  1908. if (!isd) {
  1909. of_node_put(node);
  1910. return -ENOMEM;
  1911. }
  1912. notifier->subdevs[notifier->num_subdevs] = &isd->asd;
  1913. if (isp_of_parse_node(dev, node, isd)) {
  1914. of_node_put(node);
  1915. return -EINVAL;
  1916. }
  1917. isd->asd.match.of.node = of_graph_get_remote_port_parent(node);
  1918. of_node_put(node);
  1919. if (!isd->asd.match.of.node) {
  1920. dev_warn(dev, "bad remote port parent\n");
  1921. return -EINVAL;
  1922. }
  1923. isd->asd.match_type = V4L2_ASYNC_MATCH_OF;
  1924. notifier->num_subdevs++;
  1925. }
  1926. return notifier->num_subdevs;
  1927. }
  1928. static int isp_subdev_notifier_bound(struct v4l2_async_notifier *async,
  1929. struct v4l2_subdev *subdev,
  1930. struct v4l2_async_subdev *asd)
  1931. {
  1932. struct isp_device *isp = container_of(async, struct isp_device,
  1933. notifier);
  1934. struct isp_async_subdev *isd =
  1935. container_of(asd, struct isp_async_subdev, asd);
  1936. int ret;
  1937. ret = isp_link_entity(isp, &subdev->entity, isd->bus.interface);
  1938. if (ret < 0)
  1939. return ret;
  1940. isd->sd = subdev;
  1941. isd->sd->host_priv = &isd->bus;
  1942. return ret;
  1943. }
  1944. static int isp_subdev_notifier_complete(struct v4l2_async_notifier *async)
  1945. {
  1946. struct isp_device *isp = container_of(async, struct isp_device,
  1947. notifier);
  1948. return v4l2_device_register_subdev_nodes(&isp->v4l2_dev);
  1949. }
  1950. /*
  1951. * isp_probe - Probe ISP platform device
  1952. * @pdev: Pointer to ISP platform device
  1953. *
  1954. * Returns 0 if successful,
  1955. * -ENOMEM if no memory available,
  1956. * -ENODEV if no platform device resources found
  1957. * or no space for remapping registers,
  1958. * -EINVAL if couldn't install ISR,
  1959. * or clk_get return error value.
  1960. */
  1961. static int isp_probe(struct platform_device *pdev)
  1962. {
  1963. struct isp_device *isp;
  1964. struct resource *mem;
  1965. int ret;
  1966. int i, m;
  1967. isp = devm_kzalloc(&pdev->dev, sizeof(*isp), GFP_KERNEL);
  1968. if (!isp) {
  1969. dev_err(&pdev->dev, "could not allocate memory\n");
  1970. return -ENOMEM;
  1971. }
  1972. ret = of_property_read_u32(pdev->dev.of_node, "ti,phy-type",
  1973. &isp->phy_type);
  1974. if (ret)
  1975. return ret;
  1976. isp->syscon = syscon_regmap_lookup_by_phandle(pdev->dev.of_node,
  1977. "syscon");
  1978. if (IS_ERR(isp->syscon))
  1979. return PTR_ERR(isp->syscon);
  1980. ret = of_property_read_u32_index(pdev->dev.of_node, "syscon", 1,
  1981. &isp->syscon_offset);
  1982. if (ret)
  1983. return ret;
  1984. ret = isp_of_parse_nodes(&pdev->dev, &isp->notifier);
  1985. if (ret < 0)
  1986. return ret;
  1987. isp->autoidle = autoidle;
  1988. mutex_init(&isp->isp_mutex);
  1989. spin_lock_init(&isp->stat_lock);
  1990. isp->dev = &pdev->dev;
  1991. isp->ref_count = 0;
  1992. ret = dma_coerce_mask_and_coherent(isp->dev, DMA_BIT_MASK(32));
  1993. if (ret)
  1994. goto error;
  1995. platform_set_drvdata(pdev, isp);
  1996. /* Regulators */
  1997. isp->isp_csiphy1.vdd = devm_regulator_get(&pdev->dev, "vdd-csiphy1");
  1998. isp->isp_csiphy2.vdd = devm_regulator_get(&pdev->dev, "vdd-csiphy2");
  1999. /* Clocks
  2000. *
  2001. * The ISP clock tree is revision-dependent. We thus need to enable ICLK
  2002. * manually to read the revision before calling __omap3isp_get().
  2003. *
  2004. * Start by mapping the ISP MMIO area, which is in two pieces.
  2005. * The ISP IOMMU is in between. Map both now, and fill in the
  2006. * ISP revision specific portions a little later in the
  2007. * function.
  2008. */
  2009. for (i = 0; i < 2; i++) {
  2010. unsigned int map_idx = i ? OMAP3_ISP_IOMEM_CSI2A_REGS1 : 0;
  2011. mem = platform_get_resource(pdev, IORESOURCE_MEM, i);
  2012. isp->mmio_base[map_idx] =
  2013. devm_ioremap_resource(isp->dev, mem);
  2014. if (IS_ERR(isp->mmio_base[map_idx]))
  2015. return PTR_ERR(isp->mmio_base[map_idx]);
  2016. }
  2017. ret = isp_get_clocks(isp);
  2018. if (ret < 0)
  2019. goto error;
  2020. ret = clk_enable(isp->clock[ISP_CLK_CAM_ICK]);
  2021. if (ret < 0)
  2022. goto error;
  2023. isp->revision = isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_REVISION);
  2024. dev_info(isp->dev, "Revision %d.%d found\n",
  2025. (isp->revision & 0xf0) >> 4, isp->revision & 0x0f);
  2026. clk_disable(isp->clock[ISP_CLK_CAM_ICK]);
  2027. if (__omap3isp_get(isp, false) == NULL) {
  2028. ret = -ENODEV;
  2029. goto error;
  2030. }
  2031. ret = isp_reset(isp);
  2032. if (ret < 0)
  2033. goto error_isp;
  2034. ret = isp_xclk_init(isp);
  2035. if (ret < 0)
  2036. goto error_isp;
  2037. /* Memory resources */
  2038. for (m = 0; m < ARRAY_SIZE(isp_res_maps); m++)
  2039. if (isp->revision == isp_res_maps[m].isp_rev)
  2040. break;
  2041. if (m == ARRAY_SIZE(isp_res_maps)) {
  2042. dev_err(isp->dev, "No resource map found for ISP rev %d.%d\n",
  2043. (isp->revision & 0xf0) >> 4, isp->revision & 0xf);
  2044. ret = -ENODEV;
  2045. goto error_isp;
  2046. }
  2047. for (i = 1; i < OMAP3_ISP_IOMEM_CSI2A_REGS1; i++)
  2048. isp->mmio_base[i] =
  2049. isp->mmio_base[0] + isp_res_maps[m].offset[i];
  2050. for (i = OMAP3_ISP_IOMEM_CSIPHY2; i < OMAP3_ISP_IOMEM_LAST; i++)
  2051. isp->mmio_base[i] =
  2052. isp->mmio_base[OMAP3_ISP_IOMEM_CSI2A_REGS1]
  2053. + isp_res_maps[m].offset[i];
  2054. isp->mmio_hist_base_phys =
  2055. mem->start + isp_res_maps[m].offset[OMAP3_ISP_IOMEM_HIST];
  2056. /* IOMMU */
  2057. ret = isp_attach_iommu(isp);
  2058. if (ret < 0) {
  2059. dev_err(&pdev->dev, "unable to attach to IOMMU\n");
  2060. goto error_isp;
  2061. }
  2062. /* Interrupt */
  2063. isp->irq_num = platform_get_irq(pdev, 0);
  2064. if (isp->irq_num <= 0) {
  2065. dev_err(isp->dev, "No IRQ resource\n");
  2066. ret = -ENODEV;
  2067. goto error_iommu;
  2068. }
  2069. if (devm_request_irq(isp->dev, isp->irq_num, isp_isr, IRQF_SHARED,
  2070. "OMAP3 ISP", isp)) {
  2071. dev_err(isp->dev, "Unable to request IRQ\n");
  2072. ret = -EINVAL;
  2073. goto error_iommu;
  2074. }
  2075. /* Entities */
  2076. ret = isp_initialize_modules(isp);
  2077. if (ret < 0)
  2078. goto error_iommu;
  2079. ret = isp_register_entities(isp);
  2080. if (ret < 0)
  2081. goto error_modules;
  2082. isp->notifier.bound = isp_subdev_notifier_bound;
  2083. isp->notifier.complete = isp_subdev_notifier_complete;
  2084. ret = v4l2_async_notifier_register(&isp->v4l2_dev, &isp->notifier);
  2085. if (ret)
  2086. goto error_register_entities;
  2087. isp_core_init(isp, 1);
  2088. omap3isp_put(isp);
  2089. return 0;
  2090. error_register_entities:
  2091. isp_unregister_entities(isp);
  2092. error_modules:
  2093. isp_cleanup_modules(isp);
  2094. error_iommu:
  2095. isp_detach_iommu(isp);
  2096. error_isp:
  2097. isp_xclk_cleanup(isp);
  2098. __omap3isp_put(isp, false);
  2099. error:
  2100. mutex_destroy(&isp->isp_mutex);
  2101. return ret;
  2102. }
  2103. static const struct dev_pm_ops omap3isp_pm_ops = {
  2104. .prepare = isp_pm_prepare,
  2105. .suspend = isp_pm_suspend,
  2106. .resume = isp_pm_resume,
  2107. .complete = isp_pm_complete,
  2108. };
  2109. static struct platform_device_id omap3isp_id_table[] = {
  2110. { "omap3isp", 0 },
  2111. { },
  2112. };
  2113. MODULE_DEVICE_TABLE(platform, omap3isp_id_table);
  2114. static const struct of_device_id omap3isp_of_table[] = {
  2115. { .compatible = "ti,omap3-isp" },
  2116. { },
  2117. };
  2118. static struct platform_driver omap3isp_driver = {
  2119. .probe = isp_probe,
  2120. .remove = isp_remove,
  2121. .id_table = omap3isp_id_table,
  2122. .driver = {
  2123. .name = "omap3isp",
  2124. .pm = &omap3isp_pm_ops,
  2125. .of_match_table = omap3isp_of_table,
  2126. },
  2127. };
  2128. module_platform_driver(omap3isp_driver);
  2129. MODULE_AUTHOR("Nokia Corporation");
  2130. MODULE_DESCRIPTION("TI OMAP3 ISP driver");
  2131. MODULE_LICENSE("GPL");
  2132. MODULE_VERSION(ISP_VIDEO_DRIVER_VERSION);